1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "insn-config.h"
92 #include "insn-codes.h"
96 #include "hard-reg-set.h"
100 #ifndef REGISTER_MOVE_COST
101 #define REGISTER_MOVE_COST(x, y) 2
104 /* The variables set up by `find_reloads' are:
106 n_reloads number of distinct reloads needed; max reload # + 1
107 tables indexed by reload number
108 reload_in rtx for value to reload from
109 reload_out rtx for where to store reload-reg afterward if nec
110 (often the same as reload_in)
111 reload_reg_class enum reg_class, saying what regs to reload into
112 reload_inmode enum machine_mode; mode this operand should have
113 when reloaded, on input.
114 reload_outmode enum machine_mode; mode this operand should have
115 when reloaded, on output.
116 reload_optional char, nonzero for an optional reload.
117 Optional reloads are ignored unless the
118 value is already sitting in a register.
119 reload_inc int, positive amount to increment or decrement by if
120 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
121 Ignored otherwise (don't assume it is zero).
122 reload_in_reg rtx. A reg for which reload_in is the equivalent.
123 If reload_in is a symbol_ref which came from
124 reg_equiv_constant, then this is the pseudo
125 which has that symbol_ref as equivalent.
126 reload_reg_rtx rtx. This is the register to reload into.
127 If it is zero when `find_reloads' returns,
128 you must find a suitable register in the class
129 specified by reload_reg_class, and store here
130 an rtx for that register with mode from
131 reload_inmode or reload_outmode.
132 reload_nocombine char, nonzero if this reload shouldn't be
133 combined with another reload.
134 reload_opnum int, operand number being reloaded. This is
135 used to group related reloads and need not always
136 be equal to the actual operand number in the insn,
137 though it current will be; for in-out operands, it
138 is one of the two operand numbers.
139 reload_when_needed enum, classifies reload as needed either for
140 addressing an input reload, addressing an output,
141 for addressing a non-reloaded mem ref,
142 or for unspecified purposes (i.e., more than one
144 reload_secondary_reload int, gives the reload number of a secondary
145 reload, when needed; otherwise -1
146 reload_secondary_p int, 1 if this is a secondary register for one
148 reload_secondary_icode enum insn_code, if a secondary reload is required,
149 gives the INSN_CODE that uses the secondary
150 reload as a scratch register, or CODE_FOR_nothing
151 if the secondary reload register is to be an
152 intermediate register. */
155 rtx reload_in
[MAX_RELOADS
];
156 rtx reload_out
[MAX_RELOADS
];
157 enum reg_class reload_reg_class
[MAX_RELOADS
];
158 enum machine_mode reload_inmode
[MAX_RELOADS
];
159 enum machine_mode reload_outmode
[MAX_RELOADS
];
160 rtx reload_reg_rtx
[MAX_RELOADS
];
161 char reload_optional
[MAX_RELOADS
];
162 int reload_inc
[MAX_RELOADS
];
163 rtx reload_in_reg
[MAX_RELOADS
];
164 char reload_nocombine
[MAX_RELOADS
];
165 int reload_opnum
[MAX_RELOADS
];
166 enum reload_type reload_when_needed
[MAX_RELOADS
];
167 int reload_secondary_reload
[MAX_RELOADS
];
168 int reload_secondary_p
[MAX_RELOADS
];
169 enum insn_code reload_secondary_icode
[MAX_RELOADS
];
171 /* All the "earlyclobber" operands of the current insn
172 are recorded here. */
174 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
176 int reload_n_operands
;
178 /* Replacing reloads.
180 If `replace_reloads' is nonzero, then as each reload is recorded
181 an entry is made for it in the table `replacements'.
182 Then later `subst_reloads' can look through that table and
183 perform all the replacements needed. */
185 /* Nonzero means record the places to replace. */
186 static int replace_reloads
;
188 /* Each replacement is recorded with a structure like this. */
191 rtx
*where
; /* Location to store in */
192 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
193 a SUBREG; 0 otherwise. */
194 int what
; /* which reload this is for */
195 enum machine_mode mode
; /* mode it must have */
198 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
200 /* Number of replacements currently recorded. */
201 static int n_replacements
;
203 /* Used to track what is modified by an operand. */
206 int reg_flag
; /* Nonzero if referencing a register. */
207 int safe
; /* Nonzero if this can't conflict with anything. */
208 rtx base
; /* Base adddress for MEM. */
209 HOST_WIDE_INT start
; /* Starting offset or register number. */
210 HOST_WIDE_INT end
; /* Endinf offset or register number. */
213 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
214 (see reg_equiv_address). */
215 static rtx memlocs
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
216 static int n_memlocs
;
218 #ifdef SECONDARY_MEMORY_NEEDED
220 /* Save MEMs needed to copy from one class of registers to another. One MEM
221 is used per mode, but normally only one or two modes are ever used.
223 We keep two versions, before and after register elimination. The one
224 after register elimination is record separately for each operand. This
225 is done in case the address is not valid to be sure that we separately
228 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
229 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
232 /* The instruction we are doing reloads for;
233 so we can test whether a register dies in it. */
234 static rtx this_insn
;
236 /* Nonzero if this instruction is a user-specified asm with operands. */
237 static int this_insn_is_asm
;
239 /* If hard_regs_live_known is nonzero,
240 we can tell which hard regs are currently live,
241 at least enough to succeed in choosing dummy reloads. */
242 static int hard_regs_live_known
;
244 /* Indexed by hard reg number,
245 element is nonegative if hard reg has been spilled.
246 This vector is passed to `find_reloads' as an argument
247 and is not changed here. */
248 static short *static_reload_reg_p
;
250 /* Set to 1 in subst_reg_equivs if it changes anything. */
251 static int subst_reg_equivs_changed
;
253 /* On return from push_reload, holds the reload-number for the OUT
254 operand, which can be different for that from the input operand. */
255 static int output_reloadnum
;
257 static enum reg_class find_secondary_reload
PROTO((rtx
, enum reg_class
,
258 enum machine_mode
, int,
263 enum machine_mode
*));
264 static int push_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
265 enum machine_mode
, enum machine_mode
,
266 int, int, int, enum reload_type
));
267 static void push_replacement
PROTO((rtx
*, int, enum machine_mode
));
268 static void combine_reloads
PROTO((void));
269 static rtx find_dummy_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*,
270 enum machine_mode
, enum machine_mode
,
271 enum reg_class
, int));
272 static int earlyclobber_operand_p
PROTO((rtx
));
273 static int hard_reg_set_here_p
PROTO((int, int, rtx
));
274 static struct decomposition decompose
PROTO((rtx
));
275 static int immune_p
PROTO((rtx
, rtx
, struct decomposition
));
276 static int alternative_allows_memconst
PROTO((char *, int));
277 static rtx find_reloads_toplev
PROTO((rtx
, int, enum reload_type
, int, int));
278 static rtx make_memloc
PROTO((rtx
, int));
279 static int find_reloads_address
PROTO((enum machine_mode
, rtx
*, rtx
, rtx
*,
280 int, enum reload_type
, int));
281 static rtx subst_reg_equivs
PROTO((rtx
));
282 static rtx subst_indexed_address
PROTO((rtx
));
283 static int find_reloads_address_1
PROTO((rtx
, int, rtx
*, int,
284 enum reload_type
,int));
285 static void find_reloads_address_part
PROTO((rtx
, rtx
*, enum reg_class
,
286 enum machine_mode
, int,
287 enum reload_type
, int));
288 static int find_inc_amount
PROTO((rtx
, rtx
));
290 #ifdef HAVE_SECONDARY_RELOADS
292 /* Determine if any secondary reloads are needed for loading (if IN_P is
293 non-zero) or storing (if IN_P is zero) X to or from a reload register of
294 register class RELOAD_CLASS in mode RELOAD_MODE.
296 Return the register class of a secondary reload register, or NO_REGS if
297 none. *PMODE is set to the mode that the register is required in.
298 If the reload register is needed as a scratch register instead of an
299 intermediate register, *PICODE is set to the insn_code of the insn to be
300 used to load or store the primary reload register; otherwise *PICODE
301 is set to CODE_FOR_nothing.
303 In some cases (such as storing MQ into an external memory location on
304 the RT), both an intermediate register and a scratch register. In that
305 case, *PICODE is set to CODE_FOR_nothing, the class for the intermediate
306 register is returned, and the *PTERTIARY_... variables are set to describe
307 the scratch register. */
309 static enum reg_class
310 find_secondary_reload (x
, reload_class
, reload_mode
, in_p
, picode
, pmode
,
311 ptertiary_class
, ptertiary_icode
, ptertiary_mode
)
313 enum reg_class reload_class
;
314 enum machine_mode reload_mode
;
316 enum insn_code
*picode
;
317 enum machine_mode
*pmode
;
318 enum reg_class
*ptertiary_class
;
319 enum insn_code
*ptertiary_icode
;
320 enum machine_mode
*ptertiary_mode
;
322 enum reg_class
class = NO_REGS
;
323 enum machine_mode mode
= reload_mode
;
324 enum insn_code icode
= CODE_FOR_nothing
;
325 enum reg_class t_class
= NO_REGS
;
326 enum machine_mode t_mode
= VOIDmode
;
327 enum insn_code t_icode
= CODE_FOR_nothing
;
329 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
330 is still a pseudo-register by now, it *must* have an equivalent MEM
331 but we don't want to assume that), use that equivalent when seeing if
332 a secondary reload is needed since whether or not a reload is needed
333 might be sensitive to the form of the MEM. */
335 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
336 && reg_equiv_mem
[REGNO (x
)] != 0)
337 x
= reg_equiv_mem
[REGNO (x
)];
339 #ifdef SECONDARY_INPUT_RELOAD_CLASS
341 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
344 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
346 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
349 /* If we don't need any secondary registers, go away; the rest of the
350 values won't be used. */
351 if (class == NO_REGS
)
354 /* Get a possible insn to use. If the predicate doesn't accept X, don't
357 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
358 : reload_out_optab
[(int) reload_mode
]);
360 if (icode
!= CODE_FOR_nothing
361 && insn_operand_predicate
[(int) icode
][in_p
]
362 && (! (insn_operand_predicate
[(int) icode
][in_p
]) (x
, reload_mode
)))
363 icode
= CODE_FOR_nothing
;
365 /* If we will be using an insn, see if it can directly handle the reload
366 register we will be using. If it can, the secondary reload is for a
367 scratch register. If it can't, we will use the secondary reload for
368 an intermediate register and require a tertiary reload for the scratch
371 if (icode
!= CODE_FOR_nothing
)
373 /* If IN_P is non-zero, the reload register will be the output in
374 operand 0. If IN_P is zero, the reload register will be the input
375 in operand 1. Outputs should have an initial "=", which we must
378 char insn_letter
= insn_operand_constraint
[(int) icode
][!in_p
][in_p
];
379 enum reg_class insn_class
380 = (insn_letter
== 'r' ? GENERAL_REGS
381 : REG_CLASS_FROM_LETTER (insn_letter
));
383 if (insn_class
== NO_REGS
384 || (in_p
&& insn_operand_constraint
[(int) icode
][!in_p
][0] != '=')
385 /* The scratch register's constraint must start with "=&". */
386 || insn_operand_constraint
[(int) icode
][2][0] != '='
387 || insn_operand_constraint
[(int) icode
][2][1] != '&')
390 if (reg_class_subset_p (reload_class
, insn_class
))
391 mode
= insn_operand_mode
[(int) icode
][2];
394 char t_letter
= insn_operand_constraint
[(int) icode
][2][2];
396 t_mode
= insn_operand_mode
[(int) icode
][2];
397 t_class
= (t_letter
== 'r' ? GENERAL_REGS
398 : REG_CLASS_FROM_LETTER (t_letter
));
400 icode
= CODE_FOR_nothing
;
406 *ptertiary_class
= t_class
;
407 *ptertiary_mode
= t_mode
;
408 *ptertiary_icode
= t_icode
;
412 #endif /* HAVE_SECONDARY_RELOADS */
414 #ifdef SECONDARY_MEMORY_NEEDED
416 /* Return a memory location that will be used to copy X in mode MODE.
417 If we haven't already made a location for this mode in this insn,
418 call find_reloads_address on the location being returned. */
421 get_secondary_mem (x
, mode
, opnum
, type
)
423 enum machine_mode mode
;
425 enum reload_type type
;
430 /* If MODE is narrower than a word, widen it. This is required because
431 most machines that require these memory locations do not support
432 short load and stores from all registers (e.g., FP registers). We could
433 possibly conditionalize this, but we lose nothing by doing the wider
436 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
437 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
439 /* If we already have made a MEM for this operand in MODE, return it. */
440 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
441 return secondary_memlocs_elim
[(int) mode
][opnum
];
443 /* If this is the first time we've tried to get a MEM for this mode,
444 allocate a new one. `something_changed' in reload will get set
445 by noticing that the frame size has changed. */
447 if (secondary_memlocs
[(int) mode
] == 0)
449 #ifdef SECONDARY_MEMORY_NEEDED_RTX
450 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
452 secondary_memlocs
[(int) mode
]
453 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
457 /* Get a version of the address doing any eliminations needed. If that
458 didn't give us a new MEM, make a new one if it isn't valid. */
460 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
461 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
463 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
464 loc
= copy_rtx (loc
);
466 /* The only time the call below will do anything is if the stack
467 offset is too large. In that case IND_LEVELS doesn't matter, so we
468 can just pass a zero. Adjust the type to be the address of the
469 corresponding object. If the address was valid, save the eliminated
470 address. If it wasn't valid, we need to make a reload each time, so
475 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
476 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
479 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
483 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
487 /* Clear any secondary memory locations we've made. */
490 clear_secondary_mem ()
492 bzero (secondary_memlocs
, sizeof secondary_memlocs
);
494 #endif /* SECONDARY_MEMORY_NEEDED */
496 /* Record one reload that needs to be performed.
497 IN is an rtx saying where the data are to be found before this instruction.
498 OUT says where they must be stored after the instruction.
499 (IN is zero for data not read, and OUT is zero for data not written.)
500 INLOC and OUTLOC point to the places in the instructions where
501 IN and OUT were found.
502 If IN and OUT are both non-zero, it means the same register must be used
503 to reload both IN and OUT.
505 CLASS is a register class required for the reloaded data.
506 INMODE is the machine mode that the instruction requires
507 for the reg that replaces IN and OUTMODE is likewise for OUT.
509 If IN is zero, then OUT's location and mode should be passed as
512 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
514 OPTIONAL nonzero means this reload does not need to be performed:
515 it can be discarded if that is more convenient.
517 OPNUM and TYPE say what the purpose of this reload is.
519 The return value is the reload-number for this reload.
521 If both IN and OUT are nonzero, in some rare cases we might
522 want to make two separate reloads. (Actually we never do this now.)
523 Therefore, the reload-number for OUT is stored in
524 output_reloadnum when we return; the return value applies to IN.
525 Usually (presently always), when IN and OUT are nonzero,
526 the two reload-numbers are equal, but the caller should be careful to
530 push_reload (in
, out
, inloc
, outloc
, class,
531 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
532 register rtx in
, out
;
534 enum reg_class
class;
535 enum machine_mode inmode
, outmode
;
539 enum reload_type type
;
543 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
544 int secondary_reload
= -1;
545 enum insn_code secondary_icode
= CODE_FOR_nothing
;
547 /* Compare two RTX's. */
548 #define MATCHES(x, y) \
549 (x == y || (x != 0 && (GET_CODE (x) == REG \
550 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
551 : rtx_equal_p (x, y) && ! side_effects_p (x))))
553 /* Indicates if two reloads purposes are for similar enough things that we
554 can merge their reloads. */
555 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
556 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
557 || ((when1) == (when2) && (op1) == (op2)) \
558 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
559 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
560 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
561 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
562 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
564 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
565 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
566 ((when1) != (when2) \
567 || ! ((op1) == (op2) \
568 || (when1) == RELOAD_FOR_INPUT \
569 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
570 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
572 /* INMODE and/or OUTMODE could be VOIDmode if no mode
573 has been specified for the operand. In that case,
574 use the operand's mode as the mode to reload. */
575 if (inmode
== VOIDmode
&& in
!= 0)
576 inmode
= GET_MODE (in
);
577 if (outmode
== VOIDmode
&& out
!= 0)
578 outmode
= GET_MODE (out
);
580 /* If IN is a pseudo register everywhere-equivalent to a constant, and
581 it is not in a hard register, reload straight from the constant,
582 since we want to get rid of such pseudo registers.
583 Often this is done earlier, but not always in find_reloads_address. */
584 if (in
!= 0 && GET_CODE (in
) == REG
)
586 register int regno
= REGNO (in
);
588 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
589 && reg_equiv_constant
[regno
] != 0)
590 in
= reg_equiv_constant
[regno
];
593 /* Likewise for OUT. Of course, OUT will never be equivalent to
594 an actual constant, but it might be equivalent to a memory location
595 (in the case of a parameter). */
596 if (out
!= 0 && GET_CODE (out
) == REG
)
598 register int regno
= REGNO (out
);
600 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
601 && reg_equiv_constant
[regno
] != 0)
602 out
= reg_equiv_constant
[regno
];
605 /* If we have a read-write operand with an address side-effect,
606 change either IN or OUT so the side-effect happens only once. */
607 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
609 if (GET_CODE (XEXP (in
, 0)) == POST_INC
610 || GET_CODE (XEXP (in
, 0)) == POST_DEC
)
611 in
= gen_rtx (MEM
, GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
612 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
613 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
)
614 out
= gen_rtx (MEM
, GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
617 /* If we are reloading a (SUBREG constant ...), really reload just the
618 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
619 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
620 a pseudo and hence will become a MEM) with M1 wider than M2 and the
621 register is a pseudo, also reload the inside expression.
622 For machines that extend byte loads, do this for any SUBREG of a pseudo
623 where both M1 and M2 are a word or smaller unless they are the same
625 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
626 either M1 is not valid for R or M2 is wider than a word but we only
627 need one word to store an M2-sized quantity in R.
628 (However, if OUT is nonzero, we need to reload the reg *and*
629 the subreg, so do nothing here, and let following statement handle it.)
631 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
632 we can't handle it here because CONST_INT does not indicate a mode.
634 Similarly, we must reload the inside expression if we have a
635 STRICT_LOW_PART (presumably, in == out in the cas).
637 Also reload the inner expression if it does not require a secondary
638 reload but the SUBREG does. */
640 if (in
!= 0 && GET_CODE (in
) == SUBREG
641 && (CONSTANT_P (SUBREG_REG (in
))
642 || GET_CODE (SUBREG_REG (in
)) == PLUS
644 || (((GET_CODE (SUBREG_REG (in
)) == REG
645 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
646 || GET_CODE (SUBREG_REG (in
)) == MEM
)
647 #ifdef LOAD_EXTEND_OP
648 && GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
649 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) <= UNITS_PER_WORD
650 && (GET_MODE_SIZE (inmode
)
651 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
653 && (GET_MODE_SIZE (inmode
)
654 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
657 || (GET_CODE (SUBREG_REG (in
)) == REG
658 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
659 /* The case where out is nonzero
660 is handled differently in the following statement. */
661 && (out
== 0 || SUBREG_WORD (in
) == 0)
662 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
663 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
665 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
667 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
668 GET_MODE (SUBREG_REG (in
)))))
669 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in
))
672 #ifdef SECONDARY_INPUT_RELOAD_CLASS
673 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
674 && (SECONDARY_INPUT_RELOAD_CLASS (class,
675 GET_MODE (SUBREG_REG (in
)),
681 in_subreg_loc
= inloc
;
682 inloc
= &SUBREG_REG (in
);
684 #ifndef LOAD_EXTEND_OP
685 if (GET_CODE (in
) == MEM
)
686 /* This is supposed to happen only for paradoxical subregs made by
687 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
688 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
691 inmode
= GET_MODE (in
);
694 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
695 either M1 is not valid for R or M2 is wider than a word but we only
696 need one word to store an M2-sized quantity in R.
698 However, we must reload the inner reg *as well as* the subreg in
701 if (in
!= 0 && GET_CODE (in
) == SUBREG
702 && GET_CODE (SUBREG_REG (in
)) == REG
703 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
704 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in
)), inmode
)
705 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
706 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
708 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
710 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
711 GET_MODE (SUBREG_REG (in
)))))))
713 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), NULL_PTR
,
714 GENERAL_REGS
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
718 /* Similarly for paradoxical and problematical SUBREGs on the output.
719 Note that there is no reason we need worry about the previous value
720 of SUBREG_REG (out); even if wider than out,
721 storing in a subreg is entitled to clobber it all
722 (except in the case of STRICT_LOW_PART,
723 and in that case the constraint should label it input-output.) */
724 if (out
!= 0 && GET_CODE (out
) == SUBREG
725 && (CONSTANT_P (SUBREG_REG (out
))
727 || (((GET_CODE (SUBREG_REG (out
)) == REG
728 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
729 || GET_CODE (SUBREG_REG (out
)) == MEM
)
730 #ifdef LOAD_EXTEND_OP
731 && GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
732 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) <= UNITS_PER_WORD
733 && (GET_MODE_SIZE (outmode
)
734 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
736 && (GET_MODE_SIZE (outmode
)
737 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
740 || (GET_CODE (SUBREG_REG (out
)) == REG
741 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
742 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
743 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
745 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
747 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
748 GET_MODE (SUBREG_REG (out
)))))
749 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out
))
750 + SUBREG_WORD (out
)),
752 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
753 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
754 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
755 GET_MODE (SUBREG_REG (out
)),
761 out_subreg_loc
= outloc
;
762 outloc
= &SUBREG_REG (out
);
764 #ifndef LOAD_EXTEND_OP
765 if (GET_CODE (out
) == MEM
766 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
769 outmode
= GET_MODE (out
);
772 /* If IN appears in OUT, we can't share any input-only reload for IN. */
773 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
774 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
775 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
778 /* If IN is a SUBREG of a hard register, make a new REG. This
779 simplifies some of the cases below. */
781 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
782 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
783 in
= gen_rtx (REG
, GET_MODE (in
),
784 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
786 /* Similarly for OUT. */
787 if (out
!= 0 && GET_CODE (out
) == SUBREG
788 && GET_CODE (SUBREG_REG (out
)) == REG
789 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
790 out
= gen_rtx (REG
, GET_MODE (out
),
791 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
793 /* Narrow down the class of register wanted if that is
794 desirable on this machine for efficiency. */
796 class = PREFERRED_RELOAD_CLASS (in
, class);
798 /* Output reloads may need analogous treatment, different in detail. */
799 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
801 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
804 /* Make sure we use a class that can handle the actual pseudo
805 inside any subreg. For example, on the 386, QImode regs
806 can appear within SImode subregs. Although GENERAL_REGS
807 can handle SImode, QImode needs a smaller class. */
808 #ifdef LIMIT_RELOAD_CLASS
810 class = LIMIT_RELOAD_CLASS (inmode
, class);
811 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
812 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
815 class = LIMIT_RELOAD_CLASS (outmode
, class);
816 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
817 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
820 /* Verify that this class is at least possible for the mode that
822 if (this_insn_is_asm
)
824 enum machine_mode mode
;
825 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
829 if (mode
== VOIDmode
)
831 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
838 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
839 if (HARD_REGNO_MODE_OK (i
, mode
)
840 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
842 int nregs
= HARD_REGNO_NREGS (i
, mode
);
845 for (j
= 1; j
< nregs
; j
++)
846 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
851 if (i
== FIRST_PSEUDO_REGISTER
)
853 error_for_asm (this_insn
, "impossible register constraint in `asm'");
858 if (class == NO_REGS
)
861 /* We can use an existing reload if the class is right
862 and at least one of IN and OUT is a match
863 and the other is at worst neutral.
864 (A zero compared against anything is neutral.)
866 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
867 for the same thing since that can cause us to need more reload registers
868 than we otherwise would. */
870 for (i
= 0; i
< n_reloads
; i
++)
871 if ((reg_class_subset_p (class, reload_reg_class
[i
])
872 || reg_class_subset_p (reload_reg_class
[i
], class))
873 /* If the existing reload has a register, it must fit our class. */
874 && (reload_reg_rtx
[i
] == 0
875 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
876 true_regnum (reload_reg_rtx
[i
])))
877 && ((in
!= 0 && MATCHES (reload_in
[i
], in
) && ! dont_share
878 && (out
== 0 || reload_out
[i
] == 0 || MATCHES (reload_out
[i
], out
)))
880 (out
!= 0 && MATCHES (reload_out
[i
], out
)
881 && (in
== 0 || reload_in
[i
] == 0 || MATCHES (reload_in
[i
], in
))))
882 && (reg_class_size
[(int) class] == 1
883 #ifdef SMALL_REGISTER_CLASSES
887 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
888 opnum
, reload_opnum
[i
]))
891 /* Reloading a plain reg for input can match a reload to postincrement
892 that reg, since the postincrement's value is the right value.
893 Likewise, it can match a preincrement reload, since we regard
894 the preincrementation as happening before any ref in this insn
897 for (i
= 0; i
< n_reloads
; i
++)
898 if ((reg_class_subset_p (class, reload_reg_class
[i
])
899 || reg_class_subset_p (reload_reg_class
[i
], class))
900 /* If the existing reload has a register, it must fit our class. */
901 && (reload_reg_rtx
[i
] == 0
902 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
903 true_regnum (reload_reg_rtx
[i
])))
904 && out
== 0 && reload_out
[i
] == 0 && reload_in
[i
] != 0
905 && ((GET_CODE (in
) == REG
906 && (GET_CODE (reload_in
[i
]) == POST_INC
907 || GET_CODE (reload_in
[i
]) == POST_DEC
908 || GET_CODE (reload_in
[i
]) == PRE_INC
909 || GET_CODE (reload_in
[i
]) == PRE_DEC
)
910 && MATCHES (XEXP (reload_in
[i
], 0), in
))
912 (GET_CODE (reload_in
[i
]) == REG
913 && (GET_CODE (in
) == POST_INC
914 || GET_CODE (in
) == POST_DEC
915 || GET_CODE (in
) == PRE_INC
916 || GET_CODE (in
) == PRE_DEC
)
917 && MATCHES (XEXP (in
, 0), reload_in
[i
])))
918 && (reg_class_size
[(int) class] == 1
919 #ifdef SMALL_REGISTER_CLASSES
923 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
924 opnum
, reload_opnum
[i
]))
926 /* Make sure reload_in ultimately has the increment,
927 not the plain register. */
928 if (GET_CODE (in
) == REG
)
935 #ifdef HAVE_SECONDARY_RELOADS
936 enum reg_class secondary_class
= NO_REGS
;
937 enum reg_class secondary_out_class
= NO_REGS
;
938 enum machine_mode secondary_mode
= inmode
;
939 enum machine_mode secondary_out_mode
= outmode
;
940 enum insn_code secondary_icode
;
941 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
942 enum reg_class tertiary_class
= NO_REGS
;
943 enum reg_class tertiary_out_class
= NO_REGS
;
944 enum machine_mode tertiary_mode
;
945 enum machine_mode tertiary_out_mode
;
946 enum insn_code tertiary_icode
;
947 enum insn_code tertiary_out_icode
= CODE_FOR_nothing
;
948 int tertiary_reload
= -1;
950 /* See if we need a secondary reload register to move between
951 CLASS and IN or CLASS and OUT. Get the modes and icodes to
952 use for each of them if so. */
954 #ifdef SECONDARY_INPUT_RELOAD_CLASS
957 = find_secondary_reload (in
, class, inmode
, 1, &secondary_icode
,
958 &secondary_mode
, &tertiary_class
,
959 &tertiary_icode
, &tertiary_mode
);
962 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
963 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
965 = find_secondary_reload (out
, class, outmode
, 0,
966 &secondary_out_icode
, &secondary_out_mode
,
967 &tertiary_out_class
, &tertiary_out_icode
,
971 /* We can only record one secondary and one tertiary reload. If both
972 IN and OUT need secondary reloads, we can only make an in-out
973 reload if neither need an insn and if the classes are compatible.
974 If they aren't, all we can do is abort since making two separate
975 reloads is invalid. */
977 if (secondary_class
!= NO_REGS
&& secondary_out_class
!= NO_REGS
978 && reg_class_subset_p (secondary_out_class
, secondary_class
))
979 secondary_class
= secondary_out_class
;
981 if (secondary_class
!= NO_REGS
&& secondary_out_class
!= NO_REGS
982 && (! reg_class_subset_p (secondary_class
, secondary_out_class
)
983 || secondary_icode
!= CODE_FOR_nothing
984 || secondary_out_icode
!= CODE_FOR_nothing
))
987 /* If we need a secondary reload for OUT but not IN, copy the
989 if (secondary_class
== NO_REGS
&& secondary_out_class
!= NO_REGS
)
991 secondary_class
= secondary_out_class
;
992 secondary_icode
= secondary_out_icode
;
993 tertiary_class
= tertiary_out_class
;
994 tertiary_icode
= tertiary_out_icode
;
995 tertiary_mode
= tertiary_out_mode
;
998 if (secondary_class
!= NO_REGS
)
1000 /* Secondary reloads don't conflict as badly as the primary object
1001 being reload. Specifically, we can always treat them as
1002 being for an input or output address and hence allowed to be
1003 reused in the same manner such address components could be
1004 reused. This is used as the reload_type for our secondary
1007 enum reload_type secondary_type
1008 = (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
1009 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
1012 /* This case isn't valid, so fail. Reload is allowed to use the
1013 same register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT
1014 reloads, but in the case of a secondary register, we actually
1015 need two different registers for correct code. We fail here
1016 to prevent the possibility of silently generating incorrect code
1019 The convention is that secondary input reloads are valid only if
1020 the secondary_class is different from class. If you have such
1021 a case, you can not use secondary reloads, you must work around
1022 the problem some other way. */
1024 if (type
== RELOAD_FOR_INPUT
&& secondary_class
== class)
1027 /* If we need a tertiary reload, see if we have one we can reuse
1028 or else make one. */
1030 if (tertiary_class
!= NO_REGS
)
1032 for (tertiary_reload
= 0; tertiary_reload
< n_reloads
;
1034 if (reload_secondary_p
[tertiary_reload
]
1035 && (reg_class_subset_p (tertiary_class
,
1036 reload_reg_class
[tertiary_reload
])
1037 || reg_class_subset_p (reload_reg_class
[tertiary_reload
],
1039 && ((reload_inmode
[tertiary_reload
] == tertiary_mode
)
1040 || reload_inmode
[tertiary_reload
] == VOIDmode
)
1041 && ((reload_outmode
[tertiary_reload
] == tertiary_mode
)
1042 || reload_outmode
[tertiary_reload
] == VOIDmode
)
1043 && (reload_secondary_icode
[tertiary_reload
]
1044 == CODE_FOR_nothing
)
1045 && (reg_class_size
[(int) tertiary_class
] == 1
1046 #ifdef SMALL_REGISTER_CLASSES
1050 && MERGABLE_RELOADS (secondary_type
,
1051 reload_when_needed
[tertiary_reload
],
1052 opnum
, reload_opnum
[tertiary_reload
]))
1054 if (tertiary_mode
!= VOIDmode
)
1055 reload_inmode
[tertiary_reload
] = tertiary_mode
;
1056 if (tertiary_out_mode
!= VOIDmode
)
1057 reload_outmode
[tertiary_reload
] = tertiary_mode
;
1058 if (reg_class_subset_p (tertiary_class
,
1059 reload_reg_class
[tertiary_reload
]))
1060 reload_reg_class
[tertiary_reload
] = tertiary_class
;
1061 if (MERGE_TO_OTHER (secondary_type
,
1062 reload_when_needed
[tertiary_reload
],
1064 reload_opnum
[tertiary_reload
]))
1065 reload_when_needed
[tertiary_reload
] = RELOAD_OTHER
;
1066 reload_opnum
[tertiary_reload
]
1067 = MIN (reload_opnum
[tertiary_reload
], opnum
);
1068 reload_optional
[tertiary_reload
] &= optional
;
1069 reload_secondary_p
[tertiary_reload
] = 1;
1072 if (tertiary_reload
== n_reloads
)
1074 /* We need to make a new tertiary reload for this register
1076 reload_in
[tertiary_reload
] = reload_out
[tertiary_reload
] = 0;
1077 reload_reg_class
[tertiary_reload
] = tertiary_class
;
1078 reload_inmode
[tertiary_reload
] = tertiary_mode
;
1079 reload_outmode
[tertiary_reload
] = tertiary_mode
;
1080 reload_reg_rtx
[tertiary_reload
] = 0;
1081 reload_optional
[tertiary_reload
] = optional
;
1082 reload_inc
[tertiary_reload
] = 0;
1083 /* Maybe we could combine these, but it seems too tricky. */
1084 reload_nocombine
[tertiary_reload
] = 1;
1085 reload_in_reg
[tertiary_reload
] = 0;
1086 reload_opnum
[tertiary_reload
] = opnum
;
1087 reload_when_needed
[tertiary_reload
] = secondary_type
;
1088 reload_secondary_reload
[tertiary_reload
] = -1;
1089 reload_secondary_icode
[tertiary_reload
] = CODE_FOR_nothing
;
1090 reload_secondary_p
[tertiary_reload
] = 1;
1097 /* See if we can reuse an existing secondary reload. */
1098 for (secondary_reload
= 0; secondary_reload
< n_reloads
;
1100 if (reload_secondary_p
[secondary_reload
]
1101 && (reg_class_subset_p (secondary_class
,
1102 reload_reg_class
[secondary_reload
])
1103 || reg_class_subset_p (reload_reg_class
[secondary_reload
],
1105 && ((reload_inmode
[secondary_reload
] == secondary_mode
)
1106 || reload_inmode
[secondary_reload
] == VOIDmode
)
1107 && ((reload_outmode
[secondary_reload
] == secondary_out_mode
)
1108 || reload_outmode
[secondary_reload
] == VOIDmode
)
1109 && reload_secondary_reload
[secondary_reload
] == tertiary_reload
1110 && reload_secondary_icode
[secondary_reload
] == tertiary_icode
1111 && (reg_class_size
[(int) secondary_class
] == 1
1112 #ifdef SMALL_REGISTER_CLASSES
1116 && MERGABLE_RELOADS (secondary_type
,
1117 reload_when_needed
[secondary_reload
],
1118 opnum
, reload_opnum
[secondary_reload
]))
1120 if (secondary_mode
!= VOIDmode
)
1121 reload_inmode
[secondary_reload
] = secondary_mode
;
1122 if (secondary_out_mode
!= VOIDmode
)
1123 reload_outmode
[secondary_reload
] = secondary_out_mode
;
1124 if (reg_class_subset_p (secondary_class
,
1125 reload_reg_class
[secondary_reload
]))
1126 reload_reg_class
[secondary_reload
] = secondary_class
;
1127 if (MERGE_TO_OTHER (secondary_type
,
1128 reload_when_needed
[secondary_reload
],
1129 opnum
, reload_opnum
[secondary_reload
]))
1130 reload_when_needed
[secondary_reload
] = RELOAD_OTHER
;
1131 reload_opnum
[secondary_reload
]
1132 = MIN (reload_opnum
[secondary_reload
], opnum
);
1133 reload_optional
[secondary_reload
] &= optional
;
1134 reload_secondary_p
[secondary_reload
] = 1;
1137 if (secondary_reload
== n_reloads
)
1139 /* We need to make a new secondary reload for this register
1141 reload_in
[secondary_reload
] = reload_out
[secondary_reload
] = 0;
1142 reload_reg_class
[secondary_reload
] = secondary_class
;
1143 reload_inmode
[secondary_reload
] = secondary_mode
;
1144 reload_outmode
[secondary_reload
] = secondary_out_mode
;
1145 reload_reg_rtx
[secondary_reload
] = 0;
1146 reload_optional
[secondary_reload
] = optional
;
1147 reload_inc
[secondary_reload
] = 0;
1148 /* Maybe we could combine these, but it seems too tricky. */
1149 reload_nocombine
[secondary_reload
] = 1;
1150 reload_in_reg
[secondary_reload
] = 0;
1151 reload_opnum
[secondary_reload
] = opnum
;
1152 reload_when_needed
[secondary_reload
] = secondary_type
;
1153 reload_secondary_reload
[secondary_reload
] = tertiary_reload
;
1154 reload_secondary_icode
[secondary_reload
] = tertiary_icode
;
1155 reload_secondary_p
[secondary_reload
] = 1;
1160 #ifdef SECONDARY_MEMORY_NEEDED
1161 /* If we need a memory location to copy between the two
1162 reload regs, set it up now. */
1164 if (in
!= 0 && secondary_icode
== CODE_FOR_nothing
1165 && SECONDARY_MEMORY_NEEDED (secondary_class
, class, inmode
))
1166 get_secondary_mem (in
, inmode
, opnum
, type
);
1168 if (out
!= 0 && secondary_icode
== CODE_FOR_nothing
1169 && SECONDARY_MEMORY_NEEDED (class, secondary_class
, outmode
))
1170 get_secondary_mem (out
, outmode
, opnum
, type
);
1176 /* We found no existing reload suitable for re-use.
1177 So add an additional reload. */
1180 reload_out
[i
] = out
;
1181 reload_reg_class
[i
] = class;
1182 reload_inmode
[i
] = inmode
;
1183 reload_outmode
[i
] = outmode
;
1184 reload_reg_rtx
[i
] = 0;
1185 reload_optional
[i
] = optional
;
1187 reload_nocombine
[i
] = 0;
1188 reload_in_reg
[i
] = inloc
? *inloc
: 0;
1189 reload_opnum
[i
] = opnum
;
1190 reload_when_needed
[i
] = type
;
1191 reload_secondary_reload
[i
] = secondary_reload
;
1192 reload_secondary_icode
[i
] = secondary_icode
;
1193 reload_secondary_p
[i
] = 0;
1197 #ifdef SECONDARY_MEMORY_NEEDED
1198 /* If a memory location is needed for the copy, make one. */
1199 if (in
!= 0 && GET_CODE (in
) == REG
1200 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1201 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1203 get_secondary_mem (in
, inmode
, opnum
, type
);
1205 if (out
!= 0 && GET_CODE (out
) == REG
1206 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1207 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1209 get_secondary_mem (out
, outmode
, opnum
, type
);
1214 /* We are reusing an existing reload,
1215 but we may have additional information for it.
1216 For example, we may now have both IN and OUT
1217 while the old one may have just one of them. */
1219 if (inmode
!= VOIDmode
)
1220 reload_inmode
[i
] = inmode
;
1221 if (outmode
!= VOIDmode
)
1222 reload_outmode
[i
] = outmode
;
1226 reload_out
[i
] = out
;
1227 if (reg_class_subset_p (class, reload_reg_class
[i
]))
1228 reload_reg_class
[i
] = class;
1229 reload_optional
[i
] &= optional
;
1230 if (MERGE_TO_OTHER (type
, reload_when_needed
[i
],
1231 opnum
, reload_opnum
[i
]))
1232 reload_when_needed
[i
] = RELOAD_OTHER
;
1233 reload_opnum
[i
] = MIN (reload_opnum
[i
], opnum
);
1236 /* If the ostensible rtx being reload differs from the rtx found
1237 in the location to substitute, this reload is not safe to combine
1238 because we cannot reliably tell whether it appears in the insn. */
1240 if (in
!= 0 && in
!= *inloc
)
1241 reload_nocombine
[i
] = 1;
1244 /* This was replaced by changes in find_reloads_address_1 and the new
1245 function inc_for_reload, which go with a new meaning of reload_inc. */
1247 /* If this is an IN/OUT reload in an insn that sets the CC,
1248 it must be for an autoincrement. It doesn't work to store
1249 the incremented value after the insn because that would clobber the CC.
1250 So we must do the increment of the value reloaded from,
1251 increment it, store it back, then decrement again. */
1252 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1256 reload_inc
[i
] = find_inc_amount (PATTERN (this_insn
), in
);
1257 /* If we did not find a nonzero amount-to-increment-by,
1258 that contradicts the belief that IN is being incremented
1259 in an address in this insn. */
1260 if (reload_inc
[i
] == 0)
1265 /* If we will replace IN and OUT with the reload-reg,
1266 record where they are located so that substitution need
1267 not do a tree walk. */
1269 if (replace_reloads
)
1273 register struct replacement
*r
= &replacements
[n_replacements
++];
1275 r
->subreg_loc
= in_subreg_loc
;
1279 if (outloc
!= 0 && outloc
!= inloc
)
1281 register struct replacement
*r
= &replacements
[n_replacements
++];
1284 r
->subreg_loc
= out_subreg_loc
;
1289 /* If this reload is just being introduced and it has both
1290 an incoming quantity and an outgoing quantity that are
1291 supposed to be made to match, see if either one of the two
1292 can serve as the place to reload into.
1294 If one of them is acceptable, set reload_reg_rtx[i]
1297 if (in
!= 0 && out
!= 0 && in
!= out
&& reload_reg_rtx
[i
] == 0)
1299 reload_reg_rtx
[i
] = find_dummy_reload (in
, out
, inloc
, outloc
,
1301 reload_reg_class
[i
], i
);
1303 /* If the outgoing register already contains the same value
1304 as the incoming one, we can dispense with loading it.
1305 The easiest way to tell the caller that is to give a phony
1306 value for the incoming operand (same as outgoing one). */
1307 if (reload_reg_rtx
[i
] == out
1308 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1309 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1310 static_reload_reg_p
, i
, inmode
))
1314 /* If this is an input reload and the operand contains a register that
1315 dies in this insn and is used nowhere else, see if it is the right class
1316 to be used for this reload. Use it if so. (This occurs most commonly
1317 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1318 this if it is also an output reload that mentions the register unless
1319 the output is a SUBREG that clobbers an entire register.
1321 Note that the operand might be one of the spill regs, if it is a
1322 pseudo reg and we are in a block where spilling has not taken place.
1323 But if there is no spilling in this block, that is OK.
1324 An explicitly used hard reg cannot be a spill reg. */
1326 if (reload_reg_rtx
[i
] == 0 && in
!= 0)
1331 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1332 if (REG_NOTE_KIND (note
) == REG_DEAD
1333 && GET_CODE (XEXP (note
, 0)) == REG
1334 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1335 && reg_mentioned_p (XEXP (note
, 0), in
)
1336 && ! refers_to_regno_for_reload_p (regno
,
1338 + HARD_REGNO_NREGS (regno
,
1340 PATTERN (this_insn
), inloc
)
1341 /* If this is also an output reload, IN cannot be used as
1342 the reload register if it is set in this insn unless IN
1344 && (out
== 0 || in
== out
1345 || ! hard_reg_set_here_p (regno
,
1347 + HARD_REGNO_NREGS (regno
,
1349 PATTERN (this_insn
)))
1350 /* ??? Why is this code so different from the previous?
1351 Is there any simple coherent way to describe the two together?
1352 What's going on here. */
1354 || (GET_CODE (in
) == SUBREG
1355 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1357 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1358 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1359 /* Make sure the operand fits in the reg that dies. */
1360 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1361 && HARD_REGNO_MODE_OK (regno
, inmode
)
1362 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1363 && HARD_REGNO_MODE_OK (regno
, outmode
)
1364 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], regno
)
1365 && !fixed_regs
[regno
])
1367 reload_reg_rtx
[i
] = gen_rtx (REG
, inmode
, regno
);
1373 output_reloadnum
= i
;
1378 /* Record an additional place we must replace a value
1379 for which we have already recorded a reload.
1380 RELOADNUM is the value returned by push_reload
1381 when the reload was recorded.
1382 This is used in insn patterns that use match_dup. */
1385 push_replacement (loc
, reloadnum
, mode
)
1388 enum machine_mode mode
;
1390 if (replace_reloads
)
1392 register struct replacement
*r
= &replacements
[n_replacements
++];
1393 r
->what
= reloadnum
;
1400 /* Transfer all replacements that used to be in reload FROM to be in
1404 transfer_replacements (to
, from
)
1409 for (i
= 0; i
< n_replacements
; i
++)
1410 if (replacements
[i
].what
== from
)
1411 replacements
[i
].what
= to
;
1414 /* If there is only one output reload, and it is not for an earlyclobber
1415 operand, try to combine it with a (logically unrelated) input reload
1416 to reduce the number of reload registers needed.
1418 This is safe if the input reload does not appear in
1419 the value being output-reloaded, because this implies
1420 it is not needed any more once the original insn completes.
1422 If that doesn't work, see we can use any of the registers that
1423 die in this insn as a reload register. We can if it is of the right
1424 class and does not appear in the value being output-reloaded. */
1430 int output_reload
= -1;
1433 /* Find the output reload; return unless there is exactly one
1434 and that one is mandatory. */
1436 for (i
= 0; i
< n_reloads
; i
++)
1437 if (reload_out
[i
] != 0)
1439 if (output_reload
>= 0)
1444 if (output_reload
< 0 || reload_optional
[output_reload
])
1447 /* An input-output reload isn't combinable. */
1449 if (reload_in
[output_reload
] != 0)
1452 /* If this reload is for an earlyclobber operand, we can't do anything. */
1453 if (earlyclobber_operand_p (reload_out
[output_reload
]))
1456 /* Check each input reload; can we combine it? */
1458 for (i
= 0; i
< n_reloads
; i
++)
1459 if (reload_in
[i
] && ! reload_optional
[i
] && ! reload_nocombine
[i
]
1460 /* Life span of this reload must not extend past main insn. */
1461 && reload_when_needed
[i
] != RELOAD_FOR_OUTPUT_ADDRESS
1462 && reload_when_needed
[i
] != RELOAD_OTHER
1463 && (CLASS_MAX_NREGS (reload_reg_class
[i
], reload_inmode
[i
])
1464 == CLASS_MAX_NREGS (reload_reg_class
[output_reload
],
1465 reload_outmode
[output_reload
]))
1466 && reload_inc
[i
] == 0
1467 && reload_reg_rtx
[i
] == 0
1468 /* Don't combine two reloads with different secondary reloads. */
1469 && (reload_secondary_reload
[i
] == reload_secondary_reload
[output_reload
]
1470 || reload_secondary_reload
[i
] == -1
1471 || reload_secondary_reload
[output_reload
] == -1)
1472 #ifdef SECONDARY_MEMORY_NEEDED
1473 /* Likewise for different secondary memory locations. */
1474 && (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]] == 0
1475 || secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] == 0
1476 || rtx_equal_p (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]],
1477 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]]))
1479 #ifdef SMALL_REGISTER_CLASSES
1480 && reload_reg_class
[i
] == reload_reg_class
[output_reload
]
1482 && (reg_class_subset_p (reload_reg_class
[i
],
1483 reload_reg_class
[output_reload
])
1484 || reg_class_subset_p (reload_reg_class
[output_reload
],
1485 reload_reg_class
[i
]))
1487 && (MATCHES (reload_in
[i
], reload_out
[output_reload
])
1488 /* Args reversed because the first arg seems to be
1489 the one that we imagine being modified
1490 while the second is the one that might be affected. */
1491 || (! reg_overlap_mentioned_for_reload_p (reload_out
[output_reload
],
1493 /* However, if the input is a register that appears inside
1494 the output, then we also can't share.
1495 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1496 If the same reload reg is used for both reg 69 and the
1497 result to be stored in memory, then that result
1498 will clobber the address of the memory ref. */
1499 && ! (GET_CODE (reload_in
[i
]) == REG
1500 && reg_overlap_mentioned_for_reload_p (reload_in
[i
],
1501 reload_out
[output_reload
]))))
1502 && (reg_class_size
[(int) reload_reg_class
[i
]]
1503 #ifdef SMALL_REGISTER_CLASSES
1507 /* We will allow making things slightly worse by combining an
1508 input and an output, but no worse than that. */
1509 && (reload_when_needed
[i
] == RELOAD_FOR_INPUT
1510 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT
))
1514 /* We have found a reload to combine with! */
1515 reload_out
[i
] = reload_out
[output_reload
];
1516 reload_outmode
[i
] = reload_outmode
[output_reload
];
1517 /* Mark the old output reload as inoperative. */
1518 reload_out
[output_reload
] = 0;
1519 /* The combined reload is needed for the entire insn. */
1520 reload_when_needed
[i
] = RELOAD_OTHER
;
1521 /* If the output reload had a secondary reload, copy it. */
1522 if (reload_secondary_reload
[output_reload
] != -1)
1523 reload_secondary_reload
[i
] = reload_secondary_reload
[output_reload
];
1524 #ifdef SECONDARY_MEMORY_NEEDED
1525 /* Copy any secondary MEM. */
1526 if (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] != 0)
1527 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]]
1528 = secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]];
1530 /* If required, minimize the register class. */
1531 if (reg_class_subset_p (reload_reg_class
[output_reload
],
1532 reload_reg_class
[i
]))
1533 reload_reg_class
[i
] = reload_reg_class
[output_reload
];
1535 /* Transfer all replacements from the old reload to the combined. */
1536 for (j
= 0; j
< n_replacements
; j
++)
1537 if (replacements
[j
].what
== output_reload
)
1538 replacements
[j
].what
= i
;
1543 /* If this insn has only one operand that is modified or written (assumed
1544 to be the first), it must be the one corresponding to this reload. It
1545 is safe to use anything that dies in this insn for that output provided
1546 that it does not occur in the output (we already know it isn't an
1547 earlyclobber. If this is an asm insn, give up. */
1549 if (INSN_CODE (this_insn
) == -1)
1552 for (i
= 1; i
< insn_n_operands
[INSN_CODE (this_insn
)]; i
++)
1553 if (insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '='
1554 || insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '+')
1557 /* See if some hard register that dies in this insn and is not used in
1558 the output is the right class. Only works if the register we pick
1559 up can fully hold our output reload. */
1560 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1561 if (REG_NOTE_KIND (note
) == REG_DEAD
1562 && GET_CODE (XEXP (note
, 0)) == REG
1563 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1564 reload_out
[output_reload
])
1565 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1566 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1567 && TEST_HARD_REG_BIT (reg_class_contents
[(int) reload_reg_class
[output_reload
]],
1568 REGNO (XEXP (note
, 0)))
1569 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1570 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1571 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1573 reload_reg_rtx
[output_reload
] = gen_rtx (REG
,
1574 reload_outmode
[output_reload
],
1575 REGNO (XEXP (note
, 0)));
1580 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1581 See if one of IN and OUT is a register that may be used;
1582 this is desirable since a spill-register won't be needed.
1583 If so, return the register rtx that proves acceptable.
1585 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1586 CLASS is the register class required for the reload.
1588 If FOR_REAL is >= 0, it is the number of the reload,
1589 and in some cases when it can be discovered that OUT doesn't need
1590 to be computed, clear out reload_out[FOR_REAL].
1592 If FOR_REAL is -1, this should not be done, because this call
1593 is just to see if a register can be found, not to find and install it. */
1596 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1597 inmode
, outmode
, class, for_real
)
1598 rtx real_in
, real_out
;
1599 rtx
*inloc
, *outloc
;
1600 enum machine_mode inmode
, outmode
;
1601 enum reg_class
class;
1610 /* If operands exceed a word, we can't use either of them
1611 unless they have the same size. */
1612 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1613 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1614 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1617 /* Find the inside of any subregs. */
1618 while (GET_CODE (out
) == SUBREG
)
1620 out_offset
= SUBREG_WORD (out
);
1621 out
= SUBREG_REG (out
);
1623 while (GET_CODE (in
) == SUBREG
)
1625 in_offset
= SUBREG_WORD (in
);
1626 in
= SUBREG_REG (in
);
1629 /* Narrow down the reg class, the same way push_reload will;
1630 otherwise we might find a dummy now, but push_reload won't. */
1631 class = PREFERRED_RELOAD_CLASS (in
, class);
1633 /* See if OUT will do. */
1634 if (GET_CODE (out
) == REG
1635 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1637 register int regno
= REGNO (out
) + out_offset
;
1638 int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1641 /* When we consider whether the insn uses OUT,
1642 ignore references within IN. They don't prevent us
1643 from copying IN into OUT, because those refs would
1644 move into the insn that reloads IN.
1646 However, we only ignore IN in its role as this reload.
1647 If the insn uses IN elsewhere and it contains OUT,
1648 that counts. We can't be sure it's the "same" operand
1649 so it might not go through this reload. */
1651 *inloc
= const0_rtx
;
1653 if (regno
< FIRST_PSEUDO_REGISTER
1654 /* A fixed reg that can overlap other regs better not be used
1655 for reloading in any way. */
1656 #ifdef OVERLAPPING_REGNO_P
1657 && ! (fixed_regs
[regno
] && OVERLAPPING_REGNO_P (regno
))
1659 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1660 PATTERN (this_insn
), outloc
))
1663 for (i
= 0; i
< nwords
; i
++)
1664 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1670 if (GET_CODE (real_out
) == REG
)
1673 value
= gen_rtx (REG
, outmode
, regno
);
1680 /* Consider using IN if OUT was not acceptable
1681 or if OUT dies in this insn (like the quotient in a divmod insn).
1682 We can't use IN unless it is dies in this insn,
1683 which means we must know accurately which hard regs are live.
1684 Also, the result can't go in IN if IN is used within OUT. */
1685 if (hard_regs_live_known
1686 && GET_CODE (in
) == REG
1687 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1689 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1690 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1691 && !fixed_regs
[REGNO (in
)]
1692 && HARD_REGNO_MODE_OK (REGNO (in
),
1693 /* The only case where out and real_out might
1694 have different modes is where real_out
1695 is a subreg, and in that case, out
1697 (GET_MODE (out
) != VOIDmode
1698 ? GET_MODE (out
) : outmode
)))
1700 register int regno
= REGNO (in
) + in_offset
;
1701 int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1703 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1704 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1705 PATTERN (this_insn
)))
1708 for (i
= 0; i
< nwords
; i
++)
1709 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1715 /* If we were going to use OUT as the reload reg
1716 and changed our mind, it means OUT is a dummy that
1717 dies here. So don't bother copying value to it. */
1718 if (for_real
>= 0 && value
== real_out
)
1719 reload_out
[for_real
] = 0;
1720 if (GET_CODE (real_in
) == REG
)
1723 value
= gen_rtx (REG
, inmode
, regno
);
1731 /* This page contains subroutines used mainly for determining
1732 whether the IN or an OUT of a reload can serve as the
1735 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1738 earlyclobber_operand_p (x
)
1743 for (i
= 0; i
< n_earlyclobbers
; i
++)
1744 if (reload_earlyclobbers
[i
] == x
)
1750 /* Return 1 if expression X alters a hard reg in the range
1751 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1752 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1753 X should be the body of an instruction. */
1756 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1757 register int beg_regno
, end_regno
;
1760 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1762 register rtx op0
= SET_DEST (x
);
1763 while (GET_CODE (op0
) == SUBREG
)
1764 op0
= SUBREG_REG (op0
);
1765 if (GET_CODE (op0
) == REG
)
1767 register int r
= REGNO (op0
);
1768 /* See if this reg overlaps range under consideration. */
1770 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1774 else if (GET_CODE (x
) == PARALLEL
)
1776 register int i
= XVECLEN (x
, 0) - 1;
1778 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1785 /* Return 1 if ADDR is a valid memory address for mode MODE,
1786 and check that each pseudo reg has the proper kind of
1790 strict_memory_address_p (mode
, addr
)
1791 enum machine_mode mode
;
1794 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1801 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1802 if they are the same hard reg, and has special hacks for
1803 autoincrement and autodecrement.
1804 This is specifically intended for find_reloads to use
1805 in determining whether two operands match.
1806 X is the operand whose number is the lower of the two.
1808 The value is 2 if Y contains a pre-increment that matches
1809 a non-incrementing address in X. */
1811 /* ??? To be completely correct, we should arrange to pass
1812 for X the output operand and for Y the input operand.
1813 For now, we assume that the output operand has the lower number
1814 because that is natural in (SET output (... input ...)). */
1817 operands_match_p (x
, y
)
1821 register RTX_CODE code
= GET_CODE (x
);
1827 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
1828 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
1829 && GET_CODE (SUBREG_REG (y
)) == REG
)))
1835 i
= REGNO (SUBREG_REG (x
));
1836 if (i
>= FIRST_PSEUDO_REGISTER
)
1838 i
+= SUBREG_WORD (x
);
1843 if (GET_CODE (y
) == SUBREG
)
1845 j
= REGNO (SUBREG_REG (y
));
1846 if (j
>= FIRST_PSEUDO_REGISTER
)
1848 j
+= SUBREG_WORD (y
);
1853 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1854 multiple hard register group, so that for example (reg:DI 0) and
1855 (reg:SI 1) will be considered the same register. */
1856 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
1857 && i
< FIRST_PSEUDO_REGISTER
)
1858 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
1859 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
1860 && j
< FIRST_PSEUDO_REGISTER
)
1861 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
1865 /* If two operands must match, because they are really a single
1866 operand of an assembler insn, then two postincrements are invalid
1867 because the assembler insn would increment only once.
1868 On the other hand, an postincrement matches ordinary indexing
1869 if the postincrement is the output operand. */
1870 if (code
== POST_DEC
|| code
== POST_INC
)
1871 return operands_match_p (XEXP (x
, 0), y
);
1872 /* Two preincrements are invalid
1873 because the assembler insn would increment only once.
1874 On the other hand, an preincrement matches ordinary indexing
1875 if the preincrement is the input operand.
1876 In this case, return 2, since some callers need to do special
1877 things when this happens. */
1878 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
)
1879 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
1883 /* Now we have disposed of all the cases
1884 in which different rtx codes can match. */
1885 if (code
!= GET_CODE (y
))
1887 if (code
== LABEL_REF
)
1888 return XEXP (x
, 0) == XEXP (y
, 0);
1889 if (code
== SYMBOL_REF
)
1890 return XSTR (x
, 0) == XSTR (y
, 0);
1892 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1894 if (GET_MODE (x
) != GET_MODE (y
))
1897 /* Compare the elements. If any pair of corresponding elements
1898 fail to match, return 0 for the whole things. */
1901 fmt
= GET_RTX_FORMAT (code
);
1902 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1908 if (XWINT (x
, i
) != XWINT (y
, i
))
1913 if (XINT (x
, i
) != XINT (y
, i
))
1918 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
1921 /* If any subexpression returns 2,
1922 we should return 2 if we are successful. */
1930 /* It is believed that rtx's at this level will never
1931 contain anything but integers and other rtx's,
1932 except for within LABEL_REFs and SYMBOL_REFs. */
1937 return 1 + success_2
;
1940 /* Return the number of times character C occurs in string S. */
1943 n_occurrences (c
, s
)
1953 /* Describe the range of registers or memory referenced by X.
1954 If X is a register, set REG_FLAG and put the first register
1955 number into START and the last plus one into END.
1956 If X is a memory reference, put a base address into BASE
1957 and a range of integer offsets into START and END.
1958 If X is pushing on the stack, we can assume it causes no trouble,
1959 so we set the SAFE field. */
1961 static struct decomposition
1965 struct decomposition val
;
1970 if (GET_CODE (x
) == MEM
)
1972 rtx base
, offset
= 0;
1973 rtx addr
= XEXP (x
, 0);
1975 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
1976 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
1978 val
.base
= XEXP (addr
, 0);
1979 val
.start
= - GET_MODE_SIZE (GET_MODE (x
));
1980 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
1981 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
1985 if (GET_CODE (addr
) == CONST
)
1987 addr
= XEXP (addr
, 0);
1990 if (GET_CODE (addr
) == PLUS
)
1992 if (CONSTANT_P (XEXP (addr
, 0)))
1994 base
= XEXP (addr
, 1);
1995 offset
= XEXP (addr
, 0);
1997 else if (CONSTANT_P (XEXP (addr
, 1)))
1999 base
= XEXP (addr
, 0);
2000 offset
= XEXP (addr
, 1);
2007 offset
= const0_rtx
;
2009 if (GET_CODE (offset
) == CONST
)
2010 offset
= XEXP (offset
, 0);
2011 if (GET_CODE (offset
) == PLUS
)
2013 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2015 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 1));
2016 offset
= XEXP (offset
, 0);
2018 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2020 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 0));
2021 offset
= XEXP (offset
, 1);
2025 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
2026 offset
= const0_rtx
;
2029 else if (GET_CODE (offset
) != CONST_INT
)
2031 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
2032 offset
= const0_rtx
;
2035 if (all_const
&& GET_CODE (base
) == PLUS
)
2036 base
= gen_rtx (CONST
, GET_MODE (base
), base
);
2038 if (GET_CODE (offset
) != CONST_INT
)
2041 val
.start
= INTVAL (offset
);
2042 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2046 else if (GET_CODE (x
) == REG
)
2049 val
.start
= true_regnum (x
);
2052 /* A pseudo with no hard reg. */
2053 val
.start
= REGNO (x
);
2054 val
.end
= val
.start
+ 1;
2058 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2060 else if (GET_CODE (x
) == SUBREG
)
2062 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2063 /* This could be more precise, but it's good enough. */
2064 return decompose (SUBREG_REG (x
));
2066 val
.start
= true_regnum (x
);
2068 return decompose (SUBREG_REG (x
));
2071 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2073 else if (CONSTANT_P (x
)
2074 /* This hasn't been assigned yet, so it can't conflict yet. */
2075 || GET_CODE (x
) == SCRATCH
)
2082 /* Return 1 if altering Y will not modify the value of X.
2083 Y is also described by YDATA, which should be decompose (Y). */
2086 immune_p (x
, y
, ydata
)
2088 struct decomposition ydata
;
2090 struct decomposition xdata
;
2093 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
2097 if (GET_CODE (y
) != MEM
)
2099 /* If Y is memory and X is not, Y can't affect X. */
2100 if (GET_CODE (x
) != MEM
)
2103 xdata
= decompose (x
);
2105 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2107 /* If bases are distinct symbolic constants, there is no overlap. */
2108 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2110 /* Constants and stack slots never overlap. */
2111 if (CONSTANT_P (xdata
.base
)
2112 && (ydata
.base
== frame_pointer_rtx
2113 || ydata
.base
== hard_frame_pointer_rtx
2114 || ydata
.base
== stack_pointer_rtx
))
2116 if (CONSTANT_P (ydata
.base
)
2117 && (xdata
.base
== frame_pointer_rtx
2118 || xdata
.base
== hard_frame_pointer_rtx
2119 || xdata
.base
== stack_pointer_rtx
))
2121 /* If either base is variable, we don't know anything. */
2126 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2129 /* Similar, but calls decompose. */
2132 safe_from_earlyclobber (op
, clobber
)
2135 struct decomposition early_data
;
2137 early_data
= decompose (clobber
);
2138 return immune_p (op
, clobber
, early_data
);
2141 /* Main entry point of this file: search the body of INSN
2142 for values that need reloading and record them with push_reload.
2143 REPLACE nonzero means record also where the values occur
2144 so that subst_reloads can be used.
2146 IND_LEVELS says how many levels of indirection are supported by this
2147 machine; a value of zero means that a memory reference is not a valid
2150 LIVE_KNOWN says we have valid information about which hard
2151 regs are live at each point in the program; this is true when
2152 we are called from global_alloc but false when stupid register
2153 allocation has been done.
2155 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2156 which is nonnegative if the reg has been commandeered for reloading into.
2157 It is copied into STATIC_RELOAD_REG_P and referenced from there
2158 by various subroutines. */
2161 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2163 int replace
, ind_levels
;
2165 short *reload_reg_p
;
2167 #ifdef REGISTER_CONSTRAINTS
2169 register int insn_code_number
;
2172 /* These are the constraints for the insn. We don't change them. */
2173 char *constraints1
[MAX_RECOG_OPERANDS
];
2174 /* These start out as the constraints for the insn
2175 and they are chewed up as we consider alternatives. */
2176 char *constraints
[MAX_RECOG_OPERANDS
];
2177 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2179 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2180 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2181 /* Nonzero for a MEM operand whose entire address needs a reload. */
2182 int address_reloaded
[MAX_RECOG_OPERANDS
];
2183 /* Value of enum reload_type to use for operand. */
2184 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2185 /* Value of enum reload_type to use within address of operand. */
2186 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2187 /* Save the usage of each operand. */
2188 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2189 int no_input_reloads
= 0, no_output_reloads
= 0;
2191 int this_alternative
[MAX_RECOG_OPERANDS
];
2192 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2193 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2194 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2195 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2197 int goal_alternative
[MAX_RECOG_OPERANDS
];
2198 int this_alternative_number
;
2199 int goal_alternative_number
;
2200 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2201 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2202 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2203 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2204 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2205 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2206 int goal_alternative_swapped
;
2209 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2210 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2211 rtx body
= PATTERN (insn
);
2212 rtx set
= single_set (insn
);
2213 int goal_earlyclobber
, this_earlyclobber
;
2214 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2217 this_insn_is_asm
= 0; /* Tentative. */
2221 n_earlyclobbers
= 0;
2222 replace_reloads
= replace
;
2223 hard_regs_live_known
= live_known
;
2224 static_reload_reg_p
= reload_reg_p
;
2226 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2227 neither are insns that SET cc0. Insns that use CC0 are not allowed
2228 to have any input reloads. */
2229 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2230 no_output_reloads
= 1;
2233 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2234 no_input_reloads
= 1;
2235 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2236 no_output_reloads
= 1;
2239 #ifdef SECONDARY_MEMORY_NEEDED
2240 /* The eliminated forms of any secondary memory locations are per-insn, so
2241 clear them out here. */
2243 bzero (secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2246 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2247 Make OPERANDS point to a vector of operand values.
2248 Make OPERAND_LOCS point to a vector of pointers to
2249 where the operands were found.
2250 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2251 constraint-strings for this insn.
2252 Return if the insn needs no reload processing. */
2254 switch (GET_CODE (body
))
2264 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2265 is cheap to move between them. If it is not, there may not be an insn
2266 to do the copy, so we may need a reload. */
2267 if (GET_CODE (SET_DEST (body
)) == REG
2268 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2269 && GET_CODE (SET_SRC (body
)) == REG
2270 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2271 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2272 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2276 reload_n_operands
= noperands
= asm_noperands (body
);
2279 /* This insn is an `asm' with operands. */
2281 insn_code_number
= -1;
2282 this_insn_is_asm
= 1;
2284 /* expand_asm_operands makes sure there aren't too many operands. */
2285 if (noperands
> MAX_RECOG_OPERANDS
)
2288 /* Now get the operand values and constraints out of the insn. */
2290 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
2291 constraints
, operand_mode
);
2294 bcopy (constraints
, constraints1
, noperands
* sizeof (char *));
2295 n_alternatives
= n_occurrences (',', constraints
[0]) + 1;
2296 for (i
= 1; i
< noperands
; i
++)
2297 if (n_alternatives
!= n_occurrences (',', constraints
[i
]) + 1)
2299 error_for_asm (insn
, "operand constraints differ in number of alternatives");
2300 /* Avoid further trouble with this insn. */
2301 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
2310 /* Ordinary insn: recognize it, get the operands via insn_extract
2311 and get the constraints. */
2313 insn_code_number
= recog_memoized (insn
);
2314 if (insn_code_number
< 0)
2315 fatal_insn_not_found (insn
);
2317 reload_n_operands
= noperands
= insn_n_operands
[insn_code_number
];
2318 n_alternatives
= insn_n_alternatives
[insn_code_number
];
2319 /* Just return "no reloads" if insn has no operands with constraints. */
2320 if (n_alternatives
== 0)
2322 insn_extract (insn
);
2323 for (i
= 0; i
< noperands
; i
++)
2325 constraints
[i
] = constraints1
[i
]
2326 = insn_operand_constraint
[insn_code_number
][i
];
2327 operand_mode
[i
] = insn_operand_mode
[insn_code_number
][i
];
2336 /* If we will need to know, later, whether some pair of operands
2337 are the same, we must compare them now and save the result.
2338 Reloading the base and index registers will clobber them
2339 and afterward they will fail to match. */
2341 for (i
= 0; i
< noperands
; i
++)
2346 substed_operand
[i
] = recog_operand
[i
];
2349 modified
[i
] = RELOAD_READ
;
2351 /* Scan this operand's constraint to see if it is an output operand,
2352 an in-out operand, is commutative, or should match another. */
2357 modified
[i
] = RELOAD_WRITE
;
2359 modified
[i
] = RELOAD_READ_WRITE
;
2362 /* The last operand should not be marked commutative. */
2363 if (i
== noperands
- 1)
2365 if (this_insn_is_asm
)
2366 warning_for_asm (this_insn
,
2367 "`%%' constraint used with last operand");
2374 else if (c
>= '0' && c
<= '9')
2377 operands_match
[c
][i
]
2378 = operands_match_p (recog_operand
[c
], recog_operand
[i
]);
2380 /* An operand may not match itself. */
2383 if (this_insn_is_asm
)
2384 warning_for_asm (this_insn
,
2385 "operand %d has constraint %d", i
, c
);
2390 /* If C can be commuted with C+1, and C might need to match I,
2391 then C+1 might also need to match I. */
2392 if (commutative
>= 0)
2394 if (c
== commutative
|| c
== commutative
+ 1)
2396 int other
= c
+ (c
== commutative
? 1 : -1);
2397 operands_match
[other
][i
]
2398 = operands_match_p (recog_operand
[other
], recog_operand
[i
]);
2400 if (i
== commutative
|| i
== commutative
+ 1)
2402 int other
= i
+ (i
== commutative
? 1 : -1);
2403 operands_match
[c
][other
]
2404 = operands_match_p (recog_operand
[c
], recog_operand
[other
]);
2406 /* Note that C is supposed to be less than I.
2407 No need to consider altering both C and I because in
2408 that case we would alter one into the other. */
2414 /* Examine each operand that is a memory reference or memory address
2415 and reload parts of the addresses into index registers.
2416 Also here any references to pseudo regs that didn't get hard regs
2417 but are equivalent to constants get replaced in the insn itself
2418 with those constants. Nobody will ever see them again.
2420 Finally, set up the preferred classes of each operand. */
2422 for (i
= 0; i
< noperands
; i
++)
2424 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
2426 address_reloaded
[i
] = 0;
2427 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2428 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2431 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2432 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2435 if (*constraints
[i
] == 0)
2436 /* Ignore things like match_operator operands. */
2438 else if (constraints
[i
][0] == 'p')
2440 find_reloads_address (VOIDmode
, NULL_PTR
,
2441 recog_operand
[i
], recog_operand_loc
[i
],
2442 i
, operand_type
[i
], ind_levels
);
2443 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2445 else if (code
== MEM
)
2447 if (find_reloads_address (GET_MODE (recog_operand
[i
]),
2448 recog_operand_loc
[i
],
2449 XEXP (recog_operand
[i
], 0),
2450 &XEXP (recog_operand
[i
], 0),
2451 i
, address_type
[i
], ind_levels
))
2452 address_reloaded
[i
] = 1;
2453 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2455 else if (code
== SUBREG
)
2456 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2457 = find_reloads_toplev (recog_operand
[i
], i
, address_type
[i
],
2460 && &SET_DEST (set
) == recog_operand_loc
[i
]);
2461 else if (code
== PLUS
)
2462 /* We can get a PLUS as an "operand" as a result of
2463 register elimination. See eliminate_regs and gen_input_reload. */
2464 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2465 = find_reloads_toplev (recog_operand
[i
], i
, address_type
[i
],
2467 else if (code
== REG
)
2469 /* This is equivalent to calling find_reloads_toplev.
2470 The code is duplicated for speed.
2471 When we find a pseudo always equivalent to a constant,
2472 we replace it by the constant. We must be sure, however,
2473 that we don't try to replace it in the insn in which it
2475 register int regno
= REGNO (recog_operand
[i
]);
2476 if (reg_equiv_constant
[regno
] != 0
2477 && (set
== 0 || &SET_DEST (set
) != recog_operand_loc
[i
]))
2478 substed_operand
[i
] = recog_operand
[i
]
2479 = reg_equiv_constant
[regno
];
2480 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2481 that feeds this insn. */
2482 if (reg_equiv_mem
[regno
] != 0)
2483 substed_operand
[i
] = recog_operand
[i
]
2484 = reg_equiv_mem
[regno
];
2486 if (reg_equiv_address
[regno
] != 0)
2488 /* If reg_equiv_address is not a constant address, copy it,
2489 since it may be shared. */
2490 rtx address
= reg_equiv_address
[regno
];
2492 if (rtx_varies_p (address
))
2493 address
= copy_rtx (address
);
2495 /* If this is an output operand, we must output a CLOBBER
2496 after INSN so find_equiv_reg knows REGNO is being written.
2497 Mark this insn specially, do we can put our output reloads
2500 if (modified
[i
] != RELOAD_READ
)
2501 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER
, VOIDmode
,
2506 *recog_operand_loc
[i
] = recog_operand
[i
]
2507 = gen_rtx (MEM
, GET_MODE (recog_operand
[i
]), address
);
2508 RTX_UNCHANGING_P (recog_operand
[i
])
2509 = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
2510 find_reloads_address (GET_MODE (recog_operand
[i
]),
2511 recog_operand_loc
[i
],
2512 XEXP (recog_operand
[i
], 0),
2513 &XEXP (recog_operand
[i
], 0),
2514 i
, address_type
[i
], ind_levels
);
2515 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2518 /* If the operand is still a register (we didn't replace it with an
2519 equivalent), get the preferred class to reload it into. */
2520 code
= GET_CODE (recog_operand
[i
]);
2522 = ((code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
)
2523 ? reg_preferred_class (REGNO (recog_operand
[i
])) : NO_REGS
);
2525 = (code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
2526 && reg_alternate_class (REGNO (recog_operand
[i
])) == NO_REGS
);
2529 /* If this is simply a copy from operand 1 to operand 0, merge the
2530 preferred classes for the operands. */
2531 if (set
!= 0 && noperands
>= 2 && recog_operand
[0] == SET_DEST (set
)
2532 && recog_operand
[1] == SET_SRC (set
))
2534 preferred_class
[0] = preferred_class
[1]
2535 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2536 pref_or_nothing
[0] |= pref_or_nothing
[1];
2537 pref_or_nothing
[1] |= pref_or_nothing
[0];
2540 /* Now see what we need for pseudo-regs that didn't get hard regs
2541 or got the wrong kind of hard reg. For this, we must consider
2542 all the operands together against the register constraints. */
2544 best
= MAX_RECOG_OPERANDS
+ 300;
2547 goal_alternative_swapped
= 0;
2550 /* The constraints are made of several alternatives.
2551 Each operand's constraint looks like foo,bar,... with commas
2552 separating the alternatives. The first alternatives for all
2553 operands go together, the second alternatives go together, etc.
2555 First loop over alternatives. */
2557 for (this_alternative_number
= 0;
2558 this_alternative_number
< n_alternatives
;
2559 this_alternative_number
++)
2561 /* Loop over operands for one constraint alternative. */
2562 /* LOSERS counts those that don't fit this alternative
2563 and would require loading. */
2565 /* BAD is set to 1 if it some operand can't fit this alternative
2566 even after reloading. */
2568 /* REJECT is a count of how undesirable this alternative says it is
2569 if any reloading is required. If the alternative matches exactly
2570 then REJECT is ignored, but otherwise it gets this much
2571 counted against it in addition to the reloading needed. Each
2572 ? counts three times here since we want the disparaging caused by
2573 a bad register class to only count 1/3 as much. */
2576 this_earlyclobber
= 0;
2578 for (i
= 0; i
< noperands
; i
++)
2580 register char *p
= constraints
[i
];
2581 register int win
= 0;
2582 /* 0 => this operand can be reloaded somehow for this alternative */
2584 /* 0 => this operand can be reloaded if the alternative allows regs. */
2587 register rtx operand
= recog_operand
[i
];
2589 /* Nonzero means this is a MEM that must be reloaded into a reg
2590 regardless of what the constraint says. */
2591 int force_reload
= 0;
2593 int earlyclobber
= 0;
2595 /* If the operand is a SUBREG, extract
2596 the REG or MEM (or maybe even a constant) within.
2597 (Constants can occur as a result of reg_equiv_constant.) */
2599 while (GET_CODE (operand
) == SUBREG
)
2601 offset
+= SUBREG_WORD (operand
);
2602 operand
= SUBREG_REG (operand
);
2603 /* Force reload if this is a constant or PLUS or if there may may
2604 be a problem accessing OPERAND in the outer mode. */
2605 if (CONSTANT_P (operand
)
2606 || GET_CODE (operand
) == PLUS
2607 #ifdef LOAD_EXTEND_OP
2608 /* If we have a SUBREG where both the inner and outer
2609 modes are different size but no wider than a word,
2610 combine.c has made assumptions about the behavior of
2611 the machine in such register access. If the data is,
2612 in fact, in memory we must always load using the size
2613 assumed to be in the register and let the insn do the
2614 different-sized accesses. */
2615 || ((GET_CODE (operand
) == MEM
2616 || (GET_CODE (operand
)== REG
2617 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2618 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2619 && GET_MODE_SIZE (GET_MODE (operand
)) <= UNITS_PER_WORD
2620 && (GET_MODE_SIZE (operand_mode
[i
])
2621 != GET_MODE_SIZE (GET_MODE (operand
))))
2623 /* Subreg of a hard reg which can't handle the subreg's mode
2624 or which would handle that mode in the wrong number of
2625 registers for subregging to work. */
2626 || (GET_CODE (operand
) == REG
2627 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2628 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2629 && (GET_MODE_SIZE (GET_MODE (operand
))
2631 && ((GET_MODE_SIZE (GET_MODE (operand
))
2633 != HARD_REGNO_NREGS (REGNO (operand
),
2634 GET_MODE (operand
))))
2635 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2640 this_alternative
[i
] = (int) NO_REGS
;
2641 this_alternative_win
[i
] = 0;
2642 this_alternative_offmemok
[i
] = 0;
2643 this_alternative_earlyclobber
[i
] = 0;
2644 this_alternative_matches
[i
] = -1;
2646 /* An empty constraint or empty alternative
2647 allows anything which matched the pattern. */
2648 if (*p
== 0 || *p
== ',')
2651 /* Scan this alternative's specs for this operand;
2652 set WIN if the operand fits any letter in this alternative.
2653 Otherwise, clear BADOP if this operand could
2654 fit some letter after reloads,
2655 or set WINREG if this operand could fit after reloads
2656 provided the constraint allows some registers. */
2658 while (*p
&& (c
= *p
++) != ',')
2667 /* The last operand should not be marked commutative. */
2668 if (i
!= noperands
- 1)
2681 /* Ignore rest of this alternative as far as
2682 reloading is concerned. */
2683 while (*p
&& *p
!= ',') p
++;
2692 this_alternative_matches
[i
] = c
;
2693 /* We are supposed to match a previous operand.
2694 If we do, we win if that one did.
2695 If we do not, count both of the operands as losers.
2696 (This is too conservative, since most of the time
2697 only a single reload insn will be needed to make
2698 the two operands win. As a result, this alternative
2699 may be rejected when it is actually desirable.) */
2700 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2701 /* If we are matching as if two operands were swapped,
2702 also pretend that operands_match had been computed
2704 But if I is the second of those and C is the first,
2705 don't exchange them, because operands_match is valid
2706 only on one side of its diagonal. */
2708 [(c
== commutative
|| c
== commutative
+ 1)
2709 ? 2*commutative
+ 1 - c
: c
]
2710 [(i
== commutative
|| i
== commutative
+ 1)
2711 ? 2*commutative
+ 1 - i
: i
])
2712 : operands_match
[c
][i
])
2713 win
= this_alternative_win
[c
];
2716 /* Operands don't match. */
2718 /* Retroactively mark the operand we had to match
2719 as a loser, if it wasn't already. */
2720 if (this_alternative_win
[c
])
2722 this_alternative_win
[c
] = 0;
2723 if (this_alternative
[c
] == (int) NO_REGS
)
2725 /* But count the pair only once in the total badness of
2726 this alternative, if the pair can be a dummy reload. */
2728 = find_dummy_reload (recog_operand
[i
], recog_operand
[c
],
2729 recog_operand_loc
[i
], recog_operand_loc
[c
],
2730 operand_mode
[i
], operand_mode
[c
],
2731 this_alternative
[c
], -1);
2736 /* This can be fixed with reloads if the operand
2737 we are supposed to match can be fixed with reloads. */
2739 this_alternative
[i
] = this_alternative
[c
];
2741 /* If we have to reload this operand and some previous
2742 operand also had to match the same thing as this
2743 operand, we don't know how to do that. So reject this
2745 if (! win
|| force_reload
)
2746 for (j
= 0; j
< i
; j
++)
2747 if (this_alternative_matches
[j
]
2748 == this_alternative_matches
[i
])
2754 /* All necessary reloads for an address_operand
2755 were handled in find_reloads_address. */
2756 this_alternative
[i
] = (int) ALL_REGS
;
2763 if (GET_CODE (operand
) == MEM
2764 || (GET_CODE (operand
) == REG
2765 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2766 && reg_renumber
[REGNO (operand
)] < 0))
2768 if (CONSTANT_P (operand
))
2773 if (GET_CODE (operand
) == MEM
2774 && ! address_reloaded
[i
]
2775 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2776 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2781 if (GET_CODE (operand
) == MEM
2782 && ! address_reloaded
[i
]
2783 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2784 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
2788 /* Memory operand whose address is not offsettable. */
2792 if (GET_CODE (operand
) == MEM
2793 && ! (ind_levels
? offsettable_memref_p (operand
)
2794 : offsettable_nonstrict_memref_p (operand
))
2795 /* Certain mem addresses will become offsettable
2796 after they themselves are reloaded. This is important;
2797 we don't want our own handling of unoffsettables
2798 to override the handling of reg_equiv_address. */
2799 && !(GET_CODE (XEXP (operand
, 0)) == REG
2801 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
2805 /* Memory operand whose address is offsettable. */
2809 if ((GET_CODE (operand
) == MEM
2810 /* If IND_LEVELS, find_reloads_address won't reload a
2811 pseudo that didn't get a hard reg, so we have to
2812 reject that case. */
2813 && (ind_levels
? offsettable_memref_p (operand
)
2814 : offsettable_nonstrict_memref_p (operand
)))
2815 /* Certain mem addresses will become offsettable
2816 after they themselves are reloaded. This is important;
2817 we don't want our own handling of unoffsettables
2818 to override the handling of reg_equiv_address. */
2819 || (GET_CODE (operand
) == MEM
2820 && GET_CODE (XEXP (operand
, 0)) == REG
2822 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0))
2823 || (GET_CODE (operand
) == REG
2824 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2825 && reg_renumber
[REGNO (operand
)] < 0
2826 /* If reg_equiv_address is nonzero, we will be
2827 loading it into a register; hence it will be
2828 offsettable, but we cannot say that reg_equiv_mem
2829 is offsettable without checking. */
2830 && ((reg_equiv_mem
[REGNO (operand
)] != 0
2831 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
2832 || (reg_equiv_address
[REGNO (operand
)] != 0))))
2834 if (CONSTANT_P (operand
) || GET_CODE (operand
) == MEM
)
2840 /* Output operand that is stored before the need for the
2841 input operands (and their index registers) is over. */
2842 earlyclobber
= 1, this_earlyclobber
= 1;
2846 /* Match any floating double constant, but only if
2847 we can examine the bits of it reliably. */
2848 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
2849 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
2850 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
2852 if (GET_CODE (operand
) == CONST_DOUBLE
)
2857 if (GET_CODE (operand
) == CONST_DOUBLE
)
2863 if (GET_CODE (operand
) == CONST_DOUBLE
2864 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
2869 if (GET_CODE (operand
) == CONST_INT
2870 || (GET_CODE (operand
) == CONST_DOUBLE
2871 && GET_MODE (operand
) == VOIDmode
))
2874 if (CONSTANT_P (operand
)
2875 #ifdef LEGITIMATE_PIC_OPERAND_P
2876 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
2883 if (GET_CODE (operand
) == CONST_INT
2884 || (GET_CODE (operand
) == CONST_DOUBLE
2885 && GET_MODE (operand
) == VOIDmode
))
2897 if (GET_CODE (operand
) == CONST_INT
2898 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
2908 /* A PLUS is never a valid operand, but reload can make
2909 it from a register when eliminating registers. */
2910 && GET_CODE (operand
) != PLUS
2911 /* A SCRATCH is not a valid operand. */
2912 && GET_CODE (operand
) != SCRATCH
2913 #ifdef LEGITIMATE_PIC_OPERAND_P
2914 && (! CONSTANT_P (operand
)
2916 || LEGITIMATE_PIC_OPERAND_P (operand
))
2918 && (GENERAL_REGS
== ALL_REGS
2919 || GET_CODE (operand
) != REG
2920 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2921 && reg_renumber
[REGNO (operand
)] < 0)))
2923 /* Drop through into 'r' case */
2927 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
2930 #ifdef EXTRA_CONSTRAINT
2936 if (EXTRA_CONSTRAINT (operand
, c
))
2943 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
2946 if (GET_MODE (operand
) == BLKmode
)
2949 if (GET_CODE (operand
) == REG
2950 && reg_fits_class_p (operand
, this_alternative
[i
],
2951 offset
, GET_MODE (recog_operand
[i
])))
2958 /* If this operand could be handled with a reg,
2959 and some reg is allowed, then this operand can be handled. */
2960 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
2963 /* Record which operands fit this alternative. */
2964 this_alternative_earlyclobber
[i
] = earlyclobber
;
2965 if (win
&& ! force_reload
)
2966 this_alternative_win
[i
] = 1;
2969 this_alternative_offmemok
[i
] = offmemok
;
2973 /* Alternative loses if it has no regs for a reg operand. */
2974 if (GET_CODE (operand
) == REG
2975 && this_alternative
[i
] == (int) NO_REGS
2976 && this_alternative_matches
[i
] < 0)
2979 /* Alternative loses if it requires a type of reload not
2980 permitted for this insn. We can always reload SCRATCH
2981 and objects with a REG_UNUSED note. */
2982 if (GET_CODE (operand
) != SCRATCH
2983 && modified
[i
] != RELOAD_READ
&& no_output_reloads
2984 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
2986 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
)
2989 /* If this is a constant that is reloaded into the desired
2990 class by copying it to memory first, count that as another
2991 reload. This is consistent with other code and is
2992 required to avoid chosing another alternative when
2993 the constant is moved into memory by this function on
2994 an early reload pass. Note that the test here is
2995 precisely the same as in the code below that calls
2997 if (CONSTANT_P (operand
)
2998 && (PREFERRED_RELOAD_CLASS (operand
,
2999 (enum reg_class
) this_alternative
[i
])
3001 && this_alternative
[i
] != (int) NO_REGS
3002 && operand_mode
[i
] != VOIDmode
)
3005 /* We prefer to reload pseudos over reloading other things,
3006 since such reloads may be able to be eliminated later.
3007 If we are reloading a SCRATCH, we won't be generating any
3008 insns, just using a register, so it is also preferred.
3009 So bump REJECT in other cases. */
3010 if (! (GET_CODE (operand
) == REG
3011 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3012 && GET_CODE (operand
) != SCRATCH
)
3016 /* If this operand is a pseudo register that didn't get a hard
3017 reg and this alternative accepts some register, see if the
3018 class that we want is a subset of the preferred class for this
3019 register. If not, but it intersects that class, use the
3020 preferred class instead. If it does not intersect the preferred
3021 class, show that usage of this alternative should be discouraged;
3022 it will be discouraged more still if the register is `preferred
3023 or nothing'. We do this because it increases the chance of
3024 reusing our spill register in a later insn and avoiding a pair
3025 of memory stores and loads.
3027 Don't bother with this if this alternative will accept this
3030 Don't do this for a multiword operand, if
3031 we have to worry about small classes, because making reg groups
3032 harder to allocate is asking for trouble.
3034 Don't do this if the preferred class has only one register
3035 because we might otherwise exhaust the class. */
3038 if (! win
&& this_alternative
[i
] != (int) NO_REGS
3039 #ifdef SMALL_REGISTER_CLASSES
3040 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3042 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3044 if (! reg_class_subset_p (this_alternative
[i
],
3045 preferred_class
[i
]))
3047 /* Since we don't have a way of forming the intersection,
3048 we just do something special if the preferred class
3049 is a subset of the class we have; that's the most
3050 common case anyway. */
3051 if (reg_class_subset_p (preferred_class
[i
],
3052 this_alternative
[i
]))
3053 this_alternative
[i
] = (int) preferred_class
[i
];
3055 reject
+= (1 + pref_or_nothing
[i
]);
3060 /* Now see if any output operands that are marked "earlyclobber"
3061 in this alternative conflict with any input operands
3062 or any memory addresses. */
3064 for (i
= 0; i
< noperands
; i
++)
3065 if (this_alternative_earlyclobber
[i
]
3066 && this_alternative_win
[i
])
3068 struct decomposition early_data
;
3070 early_data
= decompose (recog_operand
[i
]);
3072 if (modified
[i
] == RELOAD_READ
)
3074 if (this_insn_is_asm
)
3075 warning_for_asm (this_insn
,
3076 "`&' constraint used with input operand");
3082 if (this_alternative
[i
] == NO_REGS
)
3084 this_alternative_earlyclobber
[i
] = 0;
3085 if (this_insn_is_asm
)
3086 error_for_asm (this_insn
,
3087 "`&' constraint used with no register class");
3092 for (j
= 0; j
< noperands
; j
++)
3093 /* Is this an input operand or a memory ref? */
3094 if ((GET_CODE (recog_operand
[j
]) == MEM
3095 || modified
[j
] != RELOAD_WRITE
)
3097 /* Ignore things like match_operator operands. */
3098 && *constraints1
[j
] != 0
3099 /* Don't count an input operand that is constrained to match
3100 the early clobber operand. */
3101 && ! (this_alternative_matches
[j
] == i
3102 && rtx_equal_p (recog_operand
[i
], recog_operand
[j
]))
3103 /* Is it altered by storing the earlyclobber operand? */
3104 && !immune_p (recog_operand
[j
], recog_operand
[i
], early_data
))
3106 /* If the output is in a single-reg class,
3107 it's costly to reload it, so reload the input instead. */
3108 if (reg_class_size
[this_alternative
[i
]] == 1
3109 && (GET_CODE (recog_operand
[j
]) == REG
3110 || GET_CODE (recog_operand
[j
]) == SUBREG
))
3113 this_alternative_win
[j
] = 0;
3118 /* If an earlyclobber operand conflicts with something,
3119 it must be reloaded, so request this and count the cost. */
3123 this_alternative_win
[i
] = 0;
3124 for (j
= 0; j
< noperands
; j
++)
3125 if (this_alternative_matches
[j
] == i
3126 && this_alternative_win
[j
])
3128 this_alternative_win
[j
] = 0;
3134 /* If one alternative accepts all the operands, no reload required,
3135 choose that alternative; don't consider the remaining ones. */
3138 /* Unswap these so that they are never swapped at `finish'. */
3139 if (commutative
>= 0)
3141 recog_operand
[commutative
] = substed_operand
[commutative
];
3142 recog_operand
[commutative
+ 1]
3143 = substed_operand
[commutative
+ 1];
3145 for (i
= 0; i
< noperands
; i
++)
3147 goal_alternative_win
[i
] = 1;
3148 goal_alternative
[i
] = this_alternative
[i
];
3149 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3150 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3151 goal_alternative_earlyclobber
[i
]
3152 = this_alternative_earlyclobber
[i
];
3154 goal_alternative_number
= this_alternative_number
;
3155 goal_alternative_swapped
= swapped
;
3156 goal_earlyclobber
= this_earlyclobber
;
3160 /* REJECT, set by the ! and ? constraint characters and when a register
3161 would be reloaded into a non-preferred class, discourages the use of
3162 this alternative for a reload goal. REJECT is incremented by three
3163 for each ? and one for each non-preferred class. */
3164 losers
= losers
* 3 + reject
;
3166 /* If this alternative can be made to work by reloading,
3167 and it needs less reloading than the others checked so far,
3168 record it as the chosen goal for reloading. */
3169 if (! bad
&& best
> losers
)
3171 for (i
= 0; i
< noperands
; i
++)
3173 goal_alternative
[i
] = this_alternative
[i
];
3174 goal_alternative_win
[i
] = this_alternative_win
[i
];
3175 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3176 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3177 goal_alternative_earlyclobber
[i
]
3178 = this_alternative_earlyclobber
[i
];
3180 goal_alternative_swapped
= swapped
;
3182 goal_alternative_number
= this_alternative_number
;
3183 goal_earlyclobber
= this_earlyclobber
;
3187 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3188 then we need to try each alternative twice,
3189 the second time matching those two operands
3190 as if we had exchanged them.
3191 To do this, really exchange them in operands.
3193 If we have just tried the alternatives the second time,
3194 return operands to normal and drop through. */
3196 if (commutative
>= 0)
3201 register enum reg_class tclass
;
3204 recog_operand
[commutative
] = substed_operand
[commutative
+ 1];
3205 recog_operand
[commutative
+ 1] = substed_operand
[commutative
];
3207 tclass
= preferred_class
[commutative
];
3208 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3209 preferred_class
[commutative
+ 1] = tclass
;
3211 t
= pref_or_nothing
[commutative
];
3212 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3213 pref_or_nothing
[commutative
+ 1] = t
;
3215 bcopy (constraints1
, constraints
, noperands
* sizeof (char *));
3220 recog_operand
[commutative
] = substed_operand
[commutative
];
3221 recog_operand
[commutative
+ 1] = substed_operand
[commutative
+ 1];
3225 /* The operands don't meet the constraints.
3226 goal_alternative describes the alternative
3227 that we could reach by reloading the fewest operands.
3228 Reload so as to fit it. */
3230 if (best
== MAX_RECOG_OPERANDS
+ 300)
3232 /* No alternative works with reloads?? */
3233 if (insn_code_number
>= 0)
3235 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3236 /* Avoid further trouble with this insn. */
3237 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3242 /* Jump to `finish' from above if all operands are valid already.
3243 In that case, goal_alternative_win is all 1. */
3246 /* Right now, for any pair of operands I and J that are required to match,
3248 goal_alternative_matches[J] is I.
3249 Set up goal_alternative_matched as the inverse function:
3250 goal_alternative_matched[I] = J. */
3252 for (i
= 0; i
< noperands
; i
++)
3253 goal_alternative_matched
[i
] = -1;
3255 for (i
= 0; i
< noperands
; i
++)
3256 if (! goal_alternative_win
[i
]
3257 && goal_alternative_matches
[i
] >= 0)
3258 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3260 /* If the best alternative is with operands 1 and 2 swapped,
3261 consider them swapped before reporting the reloads. Update the
3262 operand numbers of any reloads already pushed. */
3264 if (goal_alternative_swapped
)
3268 tem
= substed_operand
[commutative
];
3269 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3270 substed_operand
[commutative
+ 1] = tem
;
3271 tem
= recog_operand
[commutative
];
3272 recog_operand
[commutative
] = recog_operand
[commutative
+ 1];
3273 recog_operand
[commutative
+ 1] = tem
;
3275 for (i
= 0; i
< n_reloads
; i
++)
3277 if (reload_opnum
[i
] == commutative
)
3278 reload_opnum
[i
] = commutative
+ 1;
3279 else if (reload_opnum
[i
] == commutative
+ 1)
3280 reload_opnum
[i
] = commutative
;
3284 /* Perform whatever substitutions on the operands we are supposed
3285 to make due to commutativity or replacement of registers
3286 with equivalent constants or memory slots. */
3288 for (i
= 0; i
< noperands
; i
++)
3290 *recog_operand_loc
[i
] = substed_operand
[i
];
3291 /* While we are looping on operands, initialize this. */
3292 operand_reloadnum
[i
] = -1;
3294 /* If this is an earlyclobber operand, we need to widen the scope.
3295 The reload must remain valid from the start of the insn being
3296 reloaded until after the operand is stored into its destination.
3297 We approximate this with RELOAD_OTHER even though we know that we
3298 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3300 One special case that is worth checking is when we have an
3301 output that is earlyclobber but isn't used past the insn (typically
3302 a SCRATCH). In this case, we only need have the reload live
3303 through the insn itself, but not for any of our input or output
3306 In any case, anything needed to address this operand can remain
3307 however they were previously categorized. */
3309 if (goal_alternative_earlyclobber
[i
])
3311 = (find_reg_note (insn
, REG_UNUSED
, recog_operand
[i
])
3312 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3315 /* Any constants that aren't allowed and can't be reloaded
3316 into registers are here changed into memory references. */
3317 for (i
= 0; i
< noperands
; i
++)
3318 if (! goal_alternative_win
[i
]
3319 && CONSTANT_P (recog_operand
[i
])
3320 && (PREFERRED_RELOAD_CLASS (recog_operand
[i
],
3321 (enum reg_class
) goal_alternative
[i
])
3323 && operand_mode
[i
] != VOIDmode
)
3325 *recog_operand_loc
[i
] = recog_operand
[i
]
3326 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3328 i
, address_type
[i
], ind_levels
, 0);
3329 if (alternative_allows_memconst (constraints1
[i
],
3330 goal_alternative_number
))
3331 goal_alternative_win
[i
] = 1;
3334 /* Record the values of the earlyclobber operands for the caller. */
3335 if (goal_earlyclobber
)
3336 for (i
= 0; i
< noperands
; i
++)
3337 if (goal_alternative_earlyclobber
[i
])
3338 reload_earlyclobbers
[n_earlyclobbers
++] = recog_operand
[i
];
3340 /* Now record reloads for all the operands that need them. */
3341 for (i
= 0; i
< noperands
; i
++)
3342 if (! goal_alternative_win
[i
])
3344 /* Operands that match previous ones have already been handled. */
3345 if (goal_alternative_matches
[i
] >= 0)
3347 /* Handle an operand with a nonoffsettable address
3348 appearing where an offsettable address will do
3349 by reloading the address into a base register.
3351 ??? We can also do this when the operand is a register and
3352 reg_equiv_mem is not offsettable, but this is a bit tricky,
3353 so we don't bother with it. It may not be worth doing. */
3354 else if (goal_alternative_matched
[i
] == -1
3355 && goal_alternative_offmemok
[i
]
3356 && GET_CODE (recog_operand
[i
]) == MEM
)
3358 operand_reloadnum
[i
]
3359 = push_reload (XEXP (recog_operand
[i
], 0), NULL_RTX
,
3360 &XEXP (recog_operand
[i
], 0), NULL_PTR
,
3361 BASE_REG_CLASS
, GET_MODE (XEXP (recog_operand
[i
], 0)),
3362 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3363 reload_inc
[operand_reloadnum
[i
]]
3364 = GET_MODE_SIZE (GET_MODE (recog_operand
[i
]));
3366 /* If this operand is an output, we will have made any
3367 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3368 now we are treating part of the operand as an input, so
3369 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3371 if (operand_type
[i
] == RELOAD_FOR_OUTPUT
)
3372 for (j
= 0; j
< n_reloads
; j
++)
3373 if (reload_opnum
[j
] == i
3374 && reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3375 reload_when_needed
[j
] = RELOAD_FOR_INPUT_ADDRESS
;
3377 else if (goal_alternative_matched
[i
] == -1)
3378 operand_reloadnum
[i
] =
3379 push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3380 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3381 (modified
[i
] != RELOAD_WRITE
?
3382 recog_operand_loc
[i
] : 0),
3383 modified
[i
] != RELOAD_READ
? recog_operand_loc
[i
] : 0,
3384 (enum reg_class
) goal_alternative
[i
],
3385 (modified
[i
] == RELOAD_WRITE
3386 ? VOIDmode
: operand_mode
[i
]),
3387 (modified
[i
] == RELOAD_READ
3388 ? VOIDmode
: operand_mode
[i
]),
3389 (insn_code_number
< 0 ? 0
3390 : insn_operand_strict_low
[insn_code_number
][i
]),
3391 0, i
, operand_type
[i
]);
3392 /* In a matching pair of operands, one must be input only
3393 and the other must be output only.
3394 Pass the input operand as IN and the other as OUT. */
3395 else if (modified
[i
] == RELOAD_READ
3396 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3398 operand_reloadnum
[i
]
3399 = push_reload (recog_operand
[i
],
3400 recog_operand
[goal_alternative_matched
[i
]],
3401 recog_operand_loc
[i
],
3402 recog_operand_loc
[goal_alternative_matched
[i
]],
3403 (enum reg_class
) goal_alternative
[i
],
3405 operand_mode
[goal_alternative_matched
[i
]],
3406 0, 0, i
, RELOAD_OTHER
);
3407 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3409 else if (modified
[i
] == RELOAD_WRITE
3410 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3412 operand_reloadnum
[goal_alternative_matched
[i
]]
3413 = push_reload (recog_operand
[goal_alternative_matched
[i
]],
3415 recog_operand_loc
[goal_alternative_matched
[i
]],
3416 recog_operand_loc
[i
],
3417 (enum reg_class
) goal_alternative
[i
],
3418 operand_mode
[goal_alternative_matched
[i
]],
3420 0, 0, i
, RELOAD_OTHER
);
3421 operand_reloadnum
[i
] = output_reloadnum
;
3423 else if (insn_code_number
>= 0)
3427 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3428 /* Avoid further trouble with this insn. */
3429 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3434 else if (goal_alternative_matched
[i
] < 0
3435 && goal_alternative_matches
[i
] < 0
3438 /* For each non-matching operand that's a MEM or a pseudo-register
3439 that didn't get a hard register, make an optional reload.
3440 This may get done even if the insn needs no reloads otherwise. */
3442 rtx operand
= recog_operand
[i
];
3444 while (GET_CODE (operand
) == SUBREG
)
3445 operand
= XEXP (operand
, 0);
3446 if ((GET_CODE (operand
) == MEM
3447 || (GET_CODE (operand
) == REG
3448 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3449 && (enum reg_class
) goal_alternative
[i
] != NO_REGS
3450 && ! no_input_reloads
3451 /* Optional output reloads don't do anything and we mustn't
3452 make in-out reloads on insns that are not permitted output
3454 && (modified
[i
] == RELOAD_READ
3455 || (modified
[i
] == RELOAD_READ_WRITE
&& ! no_output_reloads
)))
3456 operand_reloadnum
[i
]
3457 = push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3458 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3459 (modified
[i
] != RELOAD_WRITE
3460 ? recog_operand_loc
[i
] : 0),
3461 (modified
[i
] != RELOAD_READ
3462 ? recog_operand_loc
[i
] : 0),
3463 (enum reg_class
) goal_alternative
[i
],
3464 (modified
[i
] == RELOAD_WRITE
3465 ? VOIDmode
: operand_mode
[i
]),
3466 (modified
[i
] == RELOAD_READ
3467 ? VOIDmode
: operand_mode
[i
]),
3468 (insn_code_number
< 0 ? 0
3469 : insn_operand_strict_low
[insn_code_number
][i
]),
3470 1, i
, operand_type
[i
]);
3472 else if (goal_alternative_matches
[i
] >= 0
3473 && goal_alternative_win
[goal_alternative_matches
[i
]]
3474 && modified
[i
] == RELOAD_READ
3475 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3476 && ! no_input_reloads
&& ! no_output_reloads
3479 /* Similarly, make an optional reload for a pair of matching
3480 objects that are in MEM or a pseudo that didn't get a hard reg. */
3482 rtx operand
= recog_operand
[i
];
3484 while (GET_CODE (operand
) == SUBREG
)
3485 operand
= XEXP (operand
, 0);
3486 if ((GET_CODE (operand
) == MEM
3487 || (GET_CODE (operand
) == REG
3488 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3489 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3491 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3492 = push_reload (recog_operand
[goal_alternative_matches
[i
]],
3494 recog_operand_loc
[goal_alternative_matches
[i
]],
3495 recog_operand_loc
[i
],
3496 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3497 operand_mode
[goal_alternative_matches
[i
]],
3499 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3502 /* If this insn pattern contains any MATCH_DUP's, make sure that
3503 they will be substituted if the operands they match are substituted.
3504 Also do now any substitutions we already did on the operands.
3506 Don't do this if we aren't making replacements because we might be
3507 propagating things allocated by frame pointer elimination into places
3508 it doesn't expect. */
3510 if (insn_code_number
>= 0 && replace
)
3511 for (i
= insn_n_dups
[insn_code_number
] - 1; i
>= 0; i
--)
3513 int opno
= recog_dup_num
[i
];
3514 *recog_dup_loc
[i
] = *recog_operand_loc
[opno
];
3515 if (operand_reloadnum
[opno
] >= 0)
3516 push_replacement (recog_dup_loc
[i
], operand_reloadnum
[opno
],
3517 insn_operand_mode
[insn_code_number
][opno
]);
3521 /* This loses because reloading of prior insns can invalidate the equivalence
3522 (or at least find_equiv_reg isn't smart enough to find it any more),
3523 causing this insn to need more reload regs than it needed before.
3524 It may be too late to make the reload regs available.
3525 Now this optimization is done safely in choose_reload_regs. */
3527 /* For each reload of a reg into some other class of reg,
3528 search for an existing equivalent reg (same value now) in the right class.
3529 We can use it as long as we don't need to change its contents. */
3530 for (i
= 0; i
< n_reloads
; i
++)
3531 if (reload_reg_rtx
[i
] == 0
3532 && reload_in
[i
] != 0
3533 && GET_CODE (reload_in
[i
]) == REG
3534 && reload_out
[i
] == 0)
3537 = find_equiv_reg (reload_in
[i
], insn
, reload_reg_class
[i
], -1,
3538 static_reload_reg_p
, 0, reload_inmode
[i
]);
3539 /* Prevent generation of insn to load the value
3540 because the one we found already has the value. */
3541 if (reload_reg_rtx
[i
])
3542 reload_in
[i
] = reload_reg_rtx
[i
];
3546 /* Perhaps an output reload can be combined with another
3547 to reduce needs by one. */
3548 if (!goal_earlyclobber
)
3551 /* If we have a pair of reloads for parts of an address, they are reloading
3552 the same object, the operands themselves were not reloaded, and they
3553 are for two operands that are supposed to match, merge the reloads and
3554 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3556 for (i
= 0; i
< n_reloads
; i
++)
3560 for (j
= i
+ 1; j
< n_reloads
; j
++)
3561 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3562 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3563 && (reload_when_needed
[j
] == RELOAD_FOR_INPUT_ADDRESS
3564 || reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3565 && rtx_equal_p (reload_in
[i
], reload_in
[j
])
3566 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3567 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]])
3568 && (operand_reloadnum
[reload_opnum
[j
]] < 0
3569 || reload_optional
[operand_reloadnum
[reload_opnum
[j
]]])
3570 && (goal_alternative_matches
[reload_opnum
[i
]] == reload_opnum
[j
]
3571 || (goal_alternative_matches
[reload_opnum
[j
]]
3572 == reload_opnum
[i
])))
3574 for (k
= 0; k
< n_replacements
; k
++)
3575 if (replacements
[k
].what
== j
)
3576 replacements
[k
].what
= i
;
3578 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3583 /* Scan all the reloads and update their type.
3584 If a reload is for the address of an operand and we didn't reload
3585 that operand, change the type. Similarly, change the operand number
3586 of a reload when two operands match. If a reload is optional, treat it
3587 as though the operand isn't reloaded.
3589 ??? This latter case is somewhat odd because if we do the optional
3590 reload, it means the object is hanging around. Thus we need only
3591 do the address reload if the optional reload was NOT done.
3593 Change secondary reloads to be the address type of their operand, not
3596 If an operand's reload is now RELOAD_OTHER, change any
3597 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3598 RELOAD_FOR_OTHER_ADDRESS. */
3600 for (i
= 0; i
< n_reloads
; i
++)
3602 if (reload_secondary_p
[i
]
3603 && reload_when_needed
[i
] == operand_type
[reload_opnum
[i
]])
3604 reload_when_needed
[i
] = address_type
[reload_opnum
[i
]];
3606 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3607 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3608 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3609 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]]))
3610 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3612 if (reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3613 && operand_reloadnum
[reload_opnum
[i
]] >= 0
3614 && (reload_when_needed
[operand_reloadnum
[reload_opnum
[i
]]]
3616 reload_when_needed
[i
] = RELOAD_FOR_OTHER_ADDRESS
;
3618 if (goal_alternative_matches
[reload_opnum
[i
]] >= 0)
3619 reload_opnum
[i
] = goal_alternative_matches
[reload_opnum
[i
]];
3622 /* See if we have any reloads that are now allowed to be merged
3623 because we've changed when the reload is needed to
3624 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3625 check for the most common cases. */
3627 for (i
= 0; i
< n_reloads
; i
++)
3628 if (reload_in
[i
] != 0 && reload_out
[i
] == 0
3629 && (reload_when_needed
[i
] == RELOAD_FOR_OPERAND_ADDRESS
3630 || reload_when_needed
[i
] == RELOAD_FOR_OTHER_ADDRESS
))
3631 for (j
= 0; j
< n_reloads
; j
++)
3632 if (i
!= j
&& reload_in
[j
] != 0 && reload_out
[j
] == 0
3633 && reload_when_needed
[j
] == reload_when_needed
[i
]
3634 && MATCHES (reload_in
[i
], reload_in
[j
])
3635 && reload_reg_class
[i
] == reload_reg_class
[j
]
3636 && !reload_nocombine
[i
] && !reload_nocombine
[j
]
3637 && reload_reg_rtx
[i
] == reload_reg_rtx
[j
])
3639 reload_opnum
[i
] = MIN (reload_opnum
[i
], reload_opnum
[j
]);
3640 transfer_replacements (i
, j
);
3644 #else /* no REGISTER_CONSTRAINTS */
3646 int insn_code_number
;
3647 int goal_earlyclobber
= 0; /* Always 0, to make combine_reloads happen. */
3649 rtx body
= PATTERN (insn
);
3653 n_earlyclobbers
= 0;
3654 replace_reloads
= replace
;
3657 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3658 Store the operand values in RECOG_OPERAND and the locations
3659 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3660 Return if the insn needs no reload processing. */
3662 switch (GET_CODE (body
))
3673 noperands
= asm_noperands (body
);
3676 /* This insn is an `asm' with operands.
3677 First, find out how many operands, and allocate space. */
3679 insn_code_number
= -1;
3680 /* ??? This is a bug! ???
3681 Give up and delete this insn if it has too many operands. */
3682 if (noperands
> MAX_RECOG_OPERANDS
)
3685 /* Now get the operand values out of the insn. */
3687 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
3688 NULL_PTR
, NULL_PTR
);
3693 /* Ordinary insn: recognize it, allocate space for operands and
3694 constraints, and get them out via insn_extract. */
3696 insn_code_number
= recog_memoized (insn
);
3697 noperands
= insn_n_operands
[insn_code_number
];
3698 insn_extract (insn
);
3704 for (i
= 0; i
< noperands
; i
++)
3706 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
3707 int is_set_dest
= GET_CODE (body
) == SET
&& (i
== 0);
3709 if (insn_code_number
>= 0)
3710 if (insn_operand_address_p
[insn_code_number
][i
])
3711 find_reloads_address (VOIDmode
, NULL_PTR
,
3712 recog_operand
[i
], recog_operand_loc
[i
],
3713 i
, RELOAD_FOR_INPUT
, ind_levels
);
3715 /* In these cases, we can't tell if the operand is an input
3716 or an output, so be conservative. In practice it won't be
3720 find_reloads_address (GET_MODE (recog_operand
[i
]),
3721 recog_operand_loc
[i
],
3722 XEXP (recog_operand
[i
], 0),
3723 &XEXP (recog_operand
[i
], 0),
3724 i
, RELOAD_OTHER
, ind_levels
);
3726 recog_operand
[i
] = *recog_operand_loc
[i
]
3727 = find_reloads_toplev (recog_operand
[i
], i
, RELOAD_OTHER
,
3728 ind_levels
, is_set_dest
);
3731 register int regno
= REGNO (recog_operand
[i
]);
3732 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3733 recog_operand
[i
] = *recog_operand_loc
[i
]
3734 = reg_equiv_constant
[regno
];
3735 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3736 that feeds this insn. */
3737 if (reg_equiv_mem
[regno
] != 0)
3738 recog_operand
[i
] = *recog_operand_loc
[i
]
3739 = reg_equiv_mem
[regno
];
3744 /* Perhaps an output reload can be combined with another
3745 to reduce needs by one. */
3746 if (!goal_earlyclobber
)
3748 #endif /* no REGISTER_CONSTRAINTS */
3751 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3752 accepts a memory operand with constant address. */
3755 alternative_allows_memconst (constraint
, altnum
)
3760 /* Skip alternatives before the one requested. */
3763 while (*constraint
++ != ',');
3766 /* Scan the requested alternative for 'm' or 'o'.
3767 If one of them is present, this alternative accepts memory constants. */
3768 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
3769 if (c
== 'm' || c
== 'o')
3774 /* Scan X for memory references and scan the addresses for reloading.
3775 Also checks for references to "constant" regs that we want to eliminate
3776 and replaces them with the values they stand for.
3777 We may alter X destructively if it contains a reference to such.
3778 If X is just a constant reg, we return the equivalent value
3781 IND_LEVELS says how many levels of indirect addressing this machine
3784 OPNUM and TYPE identify the purpose of the reload.
3786 IS_SET_DEST is true if X is the destination of a SET, which is not
3787 appropriate to be replaced by a constant. */
3790 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
)
3793 enum reload_type type
;
3797 register RTX_CODE code
= GET_CODE (x
);
3799 register char *fmt
= GET_RTX_FORMAT (code
);
3804 /* This code is duplicated for speed in find_reloads. */
3805 register int regno
= REGNO (x
);
3806 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3807 x
= reg_equiv_constant
[regno
];
3809 /* This creates (subreg (mem...)) which would cause an unnecessary
3810 reload of the mem. */
3811 else if (reg_equiv_mem
[regno
] != 0)
3812 x
= reg_equiv_mem
[regno
];
3814 else if (reg_equiv_address
[regno
] != 0)
3816 /* If reg_equiv_address varies, it may be shared, so copy it. */
3817 rtx addr
= reg_equiv_address
[regno
];
3819 if (rtx_varies_p (addr
))
3820 addr
= copy_rtx (addr
);
3822 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
3823 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3824 find_reloads_address (GET_MODE (x
), NULL_PTR
,
3826 &XEXP (x
, 0), opnum
, type
, ind_levels
);
3833 find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
3834 opnum
, type
, ind_levels
);
3838 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
3840 /* Check for SUBREG containing a REG that's equivalent to a constant.
3841 If the constant has a known value, truncate it right now.
3842 Similarly if we are extracting a single-word of a multi-word
3843 constant. If the constant is symbolic, allow it to be substituted
3844 normally. push_reload will strip the subreg later. If the
3845 constant is VOIDmode, abort because we will lose the mode of
3846 the register (this should never happen because one of the cases
3847 above should handle it). */
3849 register int regno
= REGNO (SUBREG_REG (x
));
3852 if (subreg_lowpart_p (x
)
3853 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3854 && reg_equiv_constant
[regno
] != 0
3855 && (tem
= gen_lowpart_common (GET_MODE (x
),
3856 reg_equiv_constant
[regno
])) != 0)
3859 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
3860 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3861 && reg_equiv_constant
[regno
] != 0
3862 && (tem
= operand_subword (reg_equiv_constant
[regno
],
3864 GET_MODE (SUBREG_REG (x
)))) != 0)
3867 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3868 && reg_equiv_constant
[regno
] != 0
3869 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
3872 /* If the subreg contains a reg that will be converted to a mem,
3873 convert the subreg to a narrower memref now.
3874 Otherwise, we would get (subreg (mem ...) ...),
3875 which would force reload of the mem.
3877 We also need to do this if there is an equivalent MEM that is
3878 not offsettable. In that case, alter_subreg would produce an
3879 invalid address on big-endian machines.
3881 For machines that extend byte loads, we must not reload using
3882 a wider mode if we have a paradoxical SUBREG. find_reloads will
3883 force a reload in that case. So we should not do anything here. */
3885 else if (regno
>= FIRST_PSEUDO_REGISTER
3886 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
3887 && (GET_MODE_SIZE (GET_MODE (x
))
3888 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
3890 && (reg_equiv_address
[regno
] != 0
3891 || (reg_equiv_mem
[regno
] != 0
3892 && (! strict_memory_address_p (GET_MODE (x
),
3893 XEXP (reg_equiv_mem
[regno
], 0))
3894 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))))
3896 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
3897 rtx addr
= (reg_equiv_address
[regno
] ? reg_equiv_address
[regno
]
3898 : XEXP (reg_equiv_mem
[regno
], 0));
3899 #if BYTES_BIG_ENDIAN
3901 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
3902 offset
+= MIN (size
, UNITS_PER_WORD
);
3903 size
= GET_MODE_SIZE (GET_MODE (x
));
3904 offset
-= MIN (size
, UNITS_PER_WORD
);
3906 addr
= plus_constant (addr
, offset
);
3907 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
3908 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3909 find_reloads_address (GET_MODE (x
), NULL_PTR
,
3911 &XEXP (x
, 0), opnum
, type
, ind_levels
);
3916 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3919 XEXP (x
, i
) = find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
3920 ind_levels
, is_set_dest
);
3925 /* Return a mem ref for the memory equivalent of reg REGNO.
3926 This mem ref is not shared with anything. */
3929 make_memloc (ad
, regno
)
3934 rtx tem
= reg_equiv_address
[regno
];
3936 #if 0 /* We cannot safely reuse a memloc made here;
3937 if the pseudo appears twice, and its mem needs a reload,
3938 it gets two separate reloads assigned, but it only
3939 gets substituted with the second of them;
3940 then it can get used before that reload reg gets loaded up. */
3941 for (i
= 0; i
< n_memlocs
; i
++)
3942 if (rtx_equal_p (tem
, XEXP (memlocs
[i
], 0)))
3946 /* If TEM might contain a pseudo, we must copy it to avoid
3947 modifying it when we do the substitution for the reload. */
3948 if (rtx_varies_p (tem
))
3949 tem
= copy_rtx (tem
);
3951 tem
= gen_rtx (MEM
, GET_MODE (ad
), tem
);
3952 RTX_UNCHANGING_P (tem
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3953 memlocs
[n_memlocs
++] = tem
;
3957 /* Record all reloads needed for handling memory address AD
3958 which appears in *LOC in a memory reference to mode MODE
3959 which itself is found in location *MEMREFLOC.
3960 Note that we take shortcuts assuming that no multi-reg machine mode
3961 occurs as part of an address.
3963 OPNUM and TYPE specify the purpose of this reload.
3965 IND_LEVELS says how many levels of indirect addressing this machine
3968 Value is nonzero if this address is reloaded or replaced as a whole.
3969 This is interesting to the caller if the address is an autoincrement.
3971 Note that there is no verification that the address will be valid after
3972 this routine does its work. Instead, we rely on the fact that the address
3973 was valid when reload started. So we need only undo things that reload
3974 could have broken. These are wrong register types, pseudos not allocated
3975 to a hard register, and frame pointer elimination. */
3978 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
)
3979 enum machine_mode mode
;
3984 enum reload_type type
;
3990 /* If the address is a register, see if it is a legitimate address and
3991 reload if not. We first handle the cases where we need not reload
3992 or where we must reload in a non-standard way. */
3994 if (GET_CODE (ad
) == REG
)
3998 if (reg_equiv_constant
[regno
] != 0
3999 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
4001 *loc
= ad
= reg_equiv_constant
[regno
];
4005 else if (reg_equiv_address
[regno
] != 0)
4007 tem
= make_memloc (ad
, regno
);
4008 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
4009 &XEXP (tem
, 0), opnum
, type
, ind_levels
);
4010 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4011 GET_MODE (ad
), VOIDmode
, 0, 0,
4016 /* We can avoid a reload if the register's equivalent memory expression
4017 is valid as an indirect memory address.
4018 But not all addresses are valid in a mem used as an indirect address:
4019 only reg or reg+constant. */
4021 else if (reg_equiv_mem
[regno
] != 0 && ind_levels
> 0
4022 && strict_memory_address_p (mode
, reg_equiv_mem
[regno
])
4023 && (GET_CODE (XEXP (reg_equiv_mem
[regno
], 0)) == REG
4024 || (GET_CODE (XEXP (reg_equiv_mem
[regno
], 0)) == PLUS
4025 && GET_CODE (XEXP (XEXP (reg_equiv_mem
[regno
], 0), 0)) == REG
4026 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem
[regno
], 0), 0)))))
4029 /* The only remaining case where we can avoid a reload is if this is a
4030 hard register that is valid as a base register and which is not the
4031 subject of a CLOBBER in this insn. */
4033 else if (regno
< FIRST_PSEUDO_REGISTER
&& REGNO_OK_FOR_BASE_P (regno
)
4034 && ! regno_clobbered_p (regno
, this_insn
))
4037 /* If we do not have one of the cases above, we must do the reload. */
4038 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4039 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4043 if (strict_memory_address_p (mode
, ad
))
4045 /* The address appears valid, so reloads are not needed.
4046 But the address may contain an eliminable register.
4047 This can happen because a machine with indirect addressing
4048 may consider a pseudo register by itself a valid address even when
4049 it has failed to get a hard reg.
4050 So do a tree-walk to find and eliminate all such regs. */
4052 /* But first quickly dispose of a common case. */
4053 if (GET_CODE (ad
) == PLUS
4054 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4055 && GET_CODE (XEXP (ad
, 0)) == REG
4056 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4059 subst_reg_equivs_changed
= 0;
4060 *loc
= subst_reg_equivs (ad
);
4062 if (! subst_reg_equivs_changed
)
4065 /* Check result for validity after substitution. */
4066 if (strict_memory_address_p (mode
, ad
))
4070 /* The address is not valid. We have to figure out why. One possibility
4071 is that it is itself a MEM. This can happen when the frame pointer is
4072 being eliminated, a pseudo is not allocated to a hard register, and the
4073 offset between the frame and stack pointers is not its initial value.
4074 In that case the pseudo will have been replaced by a MEM referring to
4075 the stack pointer. */
4076 if (GET_CODE (ad
) == MEM
)
4078 /* First ensure that the address in this MEM is valid. Then, unless
4079 indirect addresses are valid, reload the MEM into a register. */
4081 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4082 opnum
, type
, ind_levels
== 0 ? 0 : ind_levels
- 1);
4084 /* If tem was changed, then we must create a new memory reference to
4085 hold it and store it back into memrefloc. */
4086 if (tem
!= ad
&& memrefloc
)
4088 *memrefloc
= copy_rtx (*memrefloc
);
4089 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4090 loc
= &XEXP (*memrefloc
, 0);
4093 /* Check similar cases as for indirect addresses as above except
4094 that we can allow pseudos and a MEM since they should have been
4095 taken care of above. */
4098 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4099 || GET_CODE (XEXP (tem
, 0)) == MEM
4100 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4101 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4102 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4103 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4105 /* Must use TEM here, not AD, since it is the one that will
4106 have any subexpressions reloaded, if needed. */
4107 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4108 BASE_REG_CLASS
, GET_MODE (tem
), VOIDmode
, 0,
4116 /* If we have address of a stack slot but it's not valid
4117 (displacement is too large), compute the sum in a register. */
4118 else if (GET_CODE (ad
) == PLUS
4119 && (XEXP (ad
, 0) == frame_pointer_rtx
4120 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4121 || XEXP (ad
, 0) == hard_frame_pointer_rtx
4123 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4124 || XEXP (ad
, 0) == arg_pointer_rtx
4126 || XEXP (ad
, 0) == stack_pointer_rtx
)
4127 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4129 /* Unshare the MEM rtx so we can safely alter it. */
4132 rtx oldref
= *memrefloc
;
4133 *memrefloc
= copy_rtx (*memrefloc
);
4134 loc
= &XEXP (*memrefloc
, 0);
4136 if (double_reg_address_ok
)
4138 /* Unshare the sum as well. */
4139 *loc
= ad
= copy_rtx (ad
);
4140 /* Reload the displacement into an index reg.
4141 We assume the frame pointer or arg pointer is a base reg. */
4142 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4143 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4148 /* If the sum of two regs is not necessarily valid,
4149 reload the sum into a base reg.
4150 That will at least work. */
4151 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
,
4152 opnum
, type
, ind_levels
);
4157 /* If we have an indexed stack slot, there are three possible reasons why
4158 it might be invalid: The index might need to be reloaded, the address
4159 might have been made by frame pointer elimination and hence have a
4160 constant out of range, or both reasons might apply.
4162 We can easily check for an index needing reload, but even if that is the
4163 case, we might also have an invalid constant. To avoid making the
4164 conservative assumption and requiring two reloads, we see if this address
4165 is valid when not interpreted strictly. If it is, the only problem is
4166 that the index needs a reload and find_reloads_address_1 will take care
4169 There is still a case when we might generate an extra reload,
4170 however. In certain cases eliminate_regs will return a MEM for a REG
4171 (see the code there for details). In those cases, memory_address_p
4172 applied to our address will return 0 so we will think that our offset
4173 must be too large. But it might indeed be valid and the only problem
4174 is that a MEM is present where a REG should be. This case should be
4175 very rare and there doesn't seem to be any way to avoid it.
4177 If we decide to do something here, it must be that
4178 `double_reg_address_ok' is true and that this address rtl was made by
4179 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4180 rework the sum so that the reload register will be added to the index.
4181 This is safe because we know the address isn't shared.
4183 We check for fp/ap/sp as both the first and second operand of the
4186 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4187 && GET_CODE (XEXP (ad
, 0)) == PLUS
4188 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4189 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4190 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4192 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4193 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4195 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4196 && ! memory_address_p (mode
, ad
))
4198 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4199 plus_constant (XEXP (XEXP (ad
, 0), 0),
4200 INTVAL (XEXP (ad
, 1))),
4201 XEXP (XEXP (ad
, 0), 1));
4202 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4203 GET_MODE (ad
), opnum
, type
, ind_levels
);
4204 find_reloads_address_1 (XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
, type
, 0);
4209 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4210 && GET_CODE (XEXP (ad
, 0)) == PLUS
4211 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4212 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4213 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4215 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4216 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4218 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4219 && ! memory_address_p (mode
, ad
))
4221 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4222 plus_constant (XEXP (XEXP (ad
, 0), 1),
4223 INTVAL (XEXP (ad
, 1))),
4224 XEXP (XEXP (ad
, 0), 0));
4225 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4226 GET_MODE (ad
), opnum
, type
, ind_levels
);
4227 find_reloads_address_1 (XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
, type
, 0);
4232 /* See if address becomes valid when an eliminable register
4233 in a sum is replaced. */
4236 if (GET_CODE (ad
) == PLUS
)
4237 tem
= subst_indexed_address (ad
);
4238 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4240 /* Ok, we win that way. Replace any additional eliminable
4243 subst_reg_equivs_changed
= 0;
4244 tem
= subst_reg_equivs (tem
);
4246 /* Make sure that didn't make the address invalid again. */
4248 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4255 /* If constants aren't valid addresses, reload the constant address
4257 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4259 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4260 Unshare it so we can safely alter it. */
4261 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4262 && CONSTANT_POOL_ADDRESS_P (ad
))
4264 rtx oldref
= *memrefloc
;
4265 *memrefloc
= copy_rtx (*memrefloc
);
4266 loc
= &XEXP (*memrefloc
, 0);
4269 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4274 return find_reloads_address_1 (ad
, 0, loc
, opnum
, type
, ind_levels
);
4277 /* Find all pseudo regs appearing in AD
4278 that are eliminable in favor of equivalent values
4279 and do not have hard regs; replace them by their equivalents. */
4282 subst_reg_equivs (ad
)
4285 register RTX_CODE code
= GET_CODE (ad
);
4303 register int regno
= REGNO (ad
);
4305 if (reg_equiv_constant
[regno
] != 0)
4307 subst_reg_equivs_changed
= 1;
4308 return reg_equiv_constant
[regno
];
4314 /* Quickly dispose of a common case. */
4315 if (XEXP (ad
, 0) == frame_pointer_rtx
4316 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4320 fmt
= GET_RTX_FORMAT (code
);
4321 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4323 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
));
4327 /* Compute the sum of X and Y, making canonicalizations assumed in an
4328 address, namely: sum constant integers, surround the sum of two
4329 constants with a CONST, put the constant as the second operand, and
4330 group the constant on the outermost sum.
4332 This routine assumes both inputs are already in canonical form. */
4339 enum machine_mode mode
= GET_MODE (x
);
4341 if (mode
== VOIDmode
)
4342 mode
= GET_MODE (y
);
4344 if (mode
== VOIDmode
)
4347 if (GET_CODE (x
) == CONST_INT
)
4348 return plus_constant (y
, INTVAL (x
));
4349 else if (GET_CODE (y
) == CONST_INT
)
4350 return plus_constant (x
, INTVAL (y
));
4351 else if (CONSTANT_P (x
))
4352 tem
= x
, x
= y
, y
= tem
;
4354 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4355 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4357 /* Note that if the operands of Y are specified in the opposite
4358 order in the recursive calls below, infinite recursion will occur. */
4359 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4360 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4362 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4363 constant will have been placed second. */
4364 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4366 if (GET_CODE (x
) == CONST
)
4368 if (GET_CODE (y
) == CONST
)
4371 return gen_rtx (CONST
, VOIDmode
, gen_rtx (PLUS
, mode
, x
, y
));
4374 return gen_rtx (PLUS
, mode
, x
, y
);
4377 /* If ADDR is a sum containing a pseudo register that should be
4378 replaced with a constant (from reg_equiv_constant),
4379 return the result of doing so, and also apply the associative
4380 law so that the result is more likely to be a valid address.
4381 (But it is not guaranteed to be one.)
4383 Note that at most one register is replaced, even if more are
4384 replaceable. Also, we try to put the result into a canonical form
4385 so it is more likely to be a valid address.
4387 In all other cases, return ADDR. */
4390 subst_indexed_address (addr
)
4393 rtx op0
= 0, op1
= 0, op2
= 0;
4397 if (GET_CODE (addr
) == PLUS
)
4399 /* Try to find a register to replace. */
4400 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4401 if (GET_CODE (op0
) == REG
4402 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4403 && reg_renumber
[regno
] < 0
4404 && reg_equiv_constant
[regno
] != 0)
4405 op0
= reg_equiv_constant
[regno
];
4406 else if (GET_CODE (op1
) == REG
4407 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4408 && reg_renumber
[regno
] < 0
4409 && reg_equiv_constant
[regno
] != 0)
4410 op1
= reg_equiv_constant
[regno
];
4411 else if (GET_CODE (op0
) == PLUS
4412 && (tem
= subst_indexed_address (op0
)) != op0
)
4414 else if (GET_CODE (op1
) == PLUS
4415 && (tem
= subst_indexed_address (op1
)) != op1
)
4420 /* Pick out up to three things to add. */
4421 if (GET_CODE (op1
) == PLUS
)
4422 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4423 else if (GET_CODE (op0
) == PLUS
)
4424 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4426 /* Compute the sum. */
4428 op1
= form_sum (op1
, op2
);
4430 op0
= form_sum (op0
, op1
);
4437 /* Record the pseudo registers we must reload into hard registers
4438 in a subexpression of a would-be memory address, X.
4439 (This function is not called if the address we find is strictly valid.)
4440 CONTEXT = 1 means we are considering regs as index regs,
4441 = 0 means we are considering them as base regs.
4443 OPNUM and TYPE specify the purpose of any reloads made.
4445 IND_LEVELS says how many levels of indirect addressing are
4446 supported at this point in the address.
4448 We return nonzero if X, as a whole, is reloaded or replaced. */
4450 /* Note that we take shortcuts assuming that no multi-reg machine mode
4451 occurs as part of an address.
4452 Also, this is not fully machine-customizable; it works for machines
4453 such as vaxes and 68000's and 32000's, but other possible machines
4454 could have addressing modes that this does not handle right. */
4457 find_reloads_address_1 (x
, context
, loc
, opnum
, type
, ind_levels
)
4462 enum reload_type type
;
4465 register RTX_CODE code
= GET_CODE (x
);
4469 register rtx orig_op0
= XEXP (x
, 0);
4470 register rtx orig_op1
= XEXP (x
, 1);
4471 register RTX_CODE code0
= GET_CODE (orig_op0
);
4472 register RTX_CODE code1
= GET_CODE (orig_op1
);
4473 register rtx op0
= orig_op0
;
4474 register rtx op1
= orig_op1
;
4476 if (GET_CODE (op0
) == SUBREG
)
4478 op0
= SUBREG_REG (op0
);
4479 code0
= GET_CODE (op0
);
4481 if (GET_CODE (op1
) == SUBREG
)
4483 op1
= SUBREG_REG (op1
);
4484 code1
= GET_CODE (op1
);
4487 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code1
== MEM
)
4489 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4491 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4494 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code0
== MEM
)
4496 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4498 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4501 else if (code0
== CONST_INT
|| code0
== CONST
4502 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
4503 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
, ind_levels
);
4504 else if (code1
== CONST_INT
|| code1
== CONST
4505 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
4506 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
, ind_levels
);
4507 else if (code0
== REG
&& code1
== REG
)
4509 if (REG_OK_FOR_INDEX_P (op0
)
4510 && REG_OK_FOR_BASE_P (op1
))
4512 else if (REG_OK_FOR_INDEX_P (op1
)
4513 && REG_OK_FOR_BASE_P (op0
))
4515 else if (REG_OK_FOR_BASE_P (op1
))
4516 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4518 else if (REG_OK_FOR_BASE_P (op0
))
4519 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4521 else if (REG_OK_FOR_INDEX_P (op1
))
4522 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4524 else if (REG_OK_FOR_INDEX_P (op0
))
4525 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4529 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4531 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4535 else if (code0
== REG
)
4537 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4539 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4542 else if (code1
== REG
)
4544 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4546 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4550 else if (code
== POST_INC
|| code
== POST_DEC
4551 || code
== PRE_INC
|| code
== PRE_DEC
)
4553 if (GET_CODE (XEXP (x
, 0)) == REG
)
4555 register int regno
= REGNO (XEXP (x
, 0));
4559 /* A register that is incremented cannot be constant! */
4560 if (regno
>= FIRST_PSEUDO_REGISTER
4561 && reg_equiv_constant
[regno
] != 0)
4564 /* Handle a register that is equivalent to a memory location
4565 which cannot be addressed directly. */
4566 if (reg_equiv_address
[regno
] != 0)
4568 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
4569 /* First reload the memory location's address. */
4570 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
4571 &XEXP (tem
, 0), opnum
, type
, ind_levels
);
4572 /* Put this inside a new increment-expression. */
4573 x
= gen_rtx (GET_CODE (x
), GET_MODE (x
), tem
);
4574 /* Proceed to reload that, as if it contained a register. */
4577 /* If we have a hard register that is ok as an index,
4578 don't make a reload. If an autoincrement of a nice register
4579 isn't "valid", it must be that no autoincrement is "valid".
4580 If that is true and something made an autoincrement anyway,
4581 this must be a special context where one is allowed.
4582 (For example, a "push" instruction.)
4583 We can't improve this address, so leave it alone. */
4585 /* Otherwise, reload the autoincrement into a suitable hard reg
4586 and record how much to increment by. */
4588 if (reg_renumber
[regno
] >= 0)
4589 regno
= reg_renumber
[regno
];
4590 if ((regno
>= FIRST_PSEUDO_REGISTER
4591 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4592 : REGNO_OK_FOR_BASE_P (regno
))))
4597 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4598 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4599 GET_MODE (x
), GET_MODE (x
), VOIDmode
, 0,
4601 reload_inc
[reloadnum
]
4602 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
4607 /* Update the REG_INC notes. */
4609 for (link
= REG_NOTES (this_insn
);
4610 link
; link
= XEXP (link
, 1))
4611 if (REG_NOTE_KIND (link
) == REG_INC
4612 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
4613 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4618 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
4620 /* This is probably the result of a substitution, by eliminate_regs,
4621 of an equivalent address for a pseudo that was not allocated to a
4622 hard register. Verify that the specified address is valid and
4623 reload it into a register. */
4624 rtx tem
= XEXP (x
, 0);
4628 /* Since we know we are going to reload this item, don't decrement
4629 for the indirection level.
4631 Note that this is actually conservative: it would be slightly
4632 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4634 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
4635 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
4636 opnum
, type
, ind_levels
);
4638 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4639 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4640 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4641 reload_inc
[reloadnum
]
4642 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
4644 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
4646 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4651 else if (code
== MEM
)
4653 /* This is probably the result of a substitution, by eliminate_regs,
4654 of an equivalent address for a pseudo that was not allocated to a
4655 hard register. Verify that the specified address is valid and reload
4658 Since we know we are going to reload this item, don't decrement
4659 for the indirection level.
4661 Note that this is actually conservative: it would be slightly more
4662 efficient to use the value of SPILL_INDIRECT_LEVELS from
4665 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
4666 opnum
, type
, ind_levels
);
4668 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
4669 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4670 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4673 else if (code
== REG
)
4675 register int regno
= REGNO (x
);
4677 if (reg_equiv_constant
[regno
] != 0)
4679 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
4680 (context
? INDEX_REG_CLASS
4682 GET_MODE (x
), opnum
, type
, ind_levels
);
4686 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4687 that feeds this insn. */
4688 if (reg_equiv_mem
[regno
] != 0)
4690 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
4691 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4692 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4696 if (reg_equiv_address
[regno
] != 0)
4698 x
= make_memloc (x
, regno
);
4699 find_reloads_address (GET_MODE (x
), 0, XEXP (x
, 0), &XEXP (x
, 0),
4700 opnum
, type
, ind_levels
);
4703 if (reg_renumber
[regno
] >= 0)
4704 regno
= reg_renumber
[regno
];
4705 if ((regno
>= FIRST_PSEUDO_REGISTER
4706 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4707 : REGNO_OK_FOR_BASE_P (regno
))))
4709 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4710 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4711 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4715 /* If a register appearing in an address is the subject of a CLOBBER
4716 in this insn, reload it into some other register to be safe.
4717 The CLOBBER is supposed to make the register unavailable
4718 from before this insn to after it. */
4719 if (regno_clobbered_p (regno
, this_insn
))
4721 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4722 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4723 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4729 register char *fmt
= GET_RTX_FORMAT (code
);
4731 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4734 find_reloads_address_1 (XEXP (x
, i
), context
, &XEXP (x
, i
),
4735 opnum
, type
, ind_levels
);
4742 /* X, which is found at *LOC, is a part of an address that needs to be
4743 reloaded into a register of class CLASS. If X is a constant, or if
4744 X is a PLUS that contains a constant, check that the constant is a
4745 legitimate operand and that we are supposed to be able to load
4746 it into the register.
4748 If not, force the constant into memory and reload the MEM instead.
4750 MODE is the mode to use, in case X is an integer constant.
4752 OPNUM and TYPE describe the purpose of any reloads made.
4754 IND_LEVELS says how many levels of indirect addressing this machine
4758 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
4761 enum reg_class
class;
4762 enum machine_mode mode
;
4764 enum reload_type type
;
4768 && (! LEGITIMATE_CONSTANT_P (x
)
4769 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
4771 rtx tem
= x
= force_const_mem (mode
, x
);
4772 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
4773 opnum
, type
, ind_levels
);
4776 else if (GET_CODE (x
) == PLUS
4777 && CONSTANT_P (XEXP (x
, 1))
4778 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
4779 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
4781 rtx tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
4783 x
= gen_rtx (PLUS
, GET_MODE (x
), XEXP (x
, 0), tem
);
4784 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
4785 opnum
, type
, ind_levels
);
4788 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
4789 mode
, VOIDmode
, 0, 0, opnum
, type
);
4792 /* Substitute into the current INSN the registers into which we have reloaded
4793 the things that need reloading. The array `replacements'
4794 says contains the locations of all pointers that must be changed
4795 and says what to replace them with.
4797 Return the rtx that X translates into; usually X, but modified. */
4804 for (i
= 0; i
< n_replacements
; i
++)
4806 register struct replacement
*r
= &replacements
[i
];
4807 register rtx reloadreg
= reload_reg_rtx
[r
->what
];
4810 /* Encapsulate RELOADREG so its machine mode matches what
4811 used to be there. Note that gen_lowpart_common will
4812 do the wrong thing if RELOADREG is multi-word. RELOADREG
4813 will always be a REG here. */
4814 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
4815 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
4817 /* If we are putting this into a SUBREG and RELOADREG is a
4818 SUBREG, we would be making nested SUBREGs, so we have to fix
4819 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4821 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
4823 if (GET_MODE (*r
->subreg_loc
)
4824 == GET_MODE (SUBREG_REG (reloadreg
)))
4825 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
4828 *r
->where
= SUBREG_REG (reloadreg
);
4829 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
4833 *r
->where
= reloadreg
;
4835 /* If reload got no reg and isn't optional, something's wrong. */
4836 else if (! reload_optional
[r
->what
])
4841 /* Make a copy of any replacements being done into X and move those copies
4842 to locations in Y, a copy of X. We only look at the highest level of
4846 copy_replacements (x
, y
)
4851 enum rtx_code code
= GET_CODE (x
);
4852 char *fmt
= GET_RTX_FORMAT (code
);
4853 struct replacement
*r
;
4855 /* We can't support X being a SUBREG because we might then need to know its
4856 location if something inside it was replaced. */
4860 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4862 for (j
= 0; j
< n_replacements
; j
++)
4864 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
4866 r
= &replacements
[n_replacements
++];
4867 r
->where
= replacements
[j
].where
;
4868 r
->subreg_loc
= &XEXP (y
, i
);
4869 r
->what
= replacements
[j
].what
;
4870 r
->mode
= replacements
[j
].mode
;
4872 else if (replacements
[j
].where
== &XEXP (x
, i
))
4874 r
= &replacements
[n_replacements
++];
4875 r
->where
= &XEXP (y
, i
);
4877 r
->what
= replacements
[j
].what
;
4878 r
->mode
= replacements
[j
].mode
;
4883 /* If LOC was scheduled to be replaced by something, return the replacement.
4884 Otherwise, return *LOC. */
4887 find_replacement (loc
)
4890 struct replacement
*r
;
4892 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
4894 rtx reloadreg
= reload_reg_rtx
[r
->what
];
4896 if (reloadreg
&& r
->where
== loc
)
4898 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
4899 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
4903 else if (reloadreg
&& r
->subreg_loc
== loc
)
4905 /* RELOADREG must be either a REG or a SUBREG.
4907 ??? Is it actually still ever a SUBREG? If so, why? */
4909 if (GET_CODE (reloadreg
) == REG
)
4910 return gen_rtx (REG
, GET_MODE (*loc
),
4911 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
4912 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
4915 return gen_rtx (SUBREG
, GET_MODE (*loc
), SUBREG_REG (reloadreg
),
4916 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
4923 /* Return nonzero if register in range [REGNO, ENDREGNO)
4924 appears either explicitly or implicitly in X
4925 other than being stored into (except for earlyclobber operands).
4927 References contained within the substructure at LOC do not count.
4928 LOC may be zero, meaning don't ignore anything.
4930 This is similar to refers_to_regno_p in rtlanal.c except that we
4931 look at equivalences for pseudos that didn't get hard registers. */
4934 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
4935 int regno
, endregno
;
4940 register RTX_CODE code
;
4947 code
= GET_CODE (x
);
4954 /* If this is a pseudo, a hard register must not have been allocated.
4955 X must therefore either be a constant or be in memory. */
4956 if (i
>= FIRST_PSEUDO_REGISTER
)
4958 if (reg_equiv_memory_loc
[i
])
4959 return refers_to_regno_for_reload_p (regno
, endregno
,
4960 reg_equiv_memory_loc
[i
],
4963 if (reg_equiv_constant
[i
])
4969 return (endregno
> i
4970 && regno
< i
+ (i
< FIRST_PSEUDO_REGISTER
4971 ? HARD_REGNO_NREGS (i
, GET_MODE (x
))
4975 /* If this is a SUBREG of a hard reg, we can see exactly which
4976 registers are being modified. Otherwise, handle normally. */
4977 if (GET_CODE (SUBREG_REG (x
)) == REG
4978 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
4980 int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
4982 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
4983 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
4985 return endregno
> inner_regno
&& regno
< inner_endregno
;
4991 if (&SET_DEST (x
) != loc
4992 /* Note setting a SUBREG counts as referring to the REG it is in for
4993 a pseudo but not for hard registers since we can
4994 treat each word individually. */
4995 && ((GET_CODE (SET_DEST (x
)) == SUBREG
4996 && loc
!= &SUBREG_REG (SET_DEST (x
))
4997 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
4998 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
4999 && refers_to_regno_for_reload_p (regno
, endregno
,
5000 SUBREG_REG (SET_DEST (x
)),
5002 /* If the ouput is an earlyclobber operand, this is
5004 || ((GET_CODE (SET_DEST (x
)) != REG
5005 || earlyclobber_operand_p (SET_DEST (x
)))
5006 && refers_to_regno_for_reload_p (regno
, endregno
,
5007 SET_DEST (x
), loc
))))
5010 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
5016 /* X does not match, so try its subexpressions. */
5018 fmt
= GET_RTX_FORMAT (code
);
5019 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5021 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
5029 if (refers_to_regno_for_reload_p (regno
, endregno
,
5033 else if (fmt
[i
] == 'E')
5036 for (j
= XVECLEN (x
, i
) - 1; j
>=0; j
--)
5037 if (loc
!= &XVECEXP (x
, i
, j
)
5038 && refers_to_regno_for_reload_p (regno
, endregno
,
5039 XVECEXP (x
, i
, j
), loc
))
5046 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5047 we check if any register number in X conflicts with the relevant register
5048 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5049 contains a MEM (we don't bother checking for memory addresses that can't
5050 conflict because we expect this to be a rare case.
5052 This function is similar to reg_overlap_mention_p in rtlanal.c except
5053 that we look at equivalences for pseudos that didn't get hard registers. */
5056 reg_overlap_mentioned_for_reload_p (x
, in
)
5059 int regno
, endregno
;
5061 if (GET_CODE (x
) == SUBREG
)
5063 regno
= REGNO (SUBREG_REG (x
));
5064 if (regno
< FIRST_PSEUDO_REGISTER
)
5065 regno
+= SUBREG_WORD (x
);
5067 else if (GET_CODE (x
) == REG
)
5071 /* If this is a pseudo, it must not have been assigned a hard register.
5072 Therefore, it must either be in memory or be a constant. */
5074 if (regno
>= FIRST_PSEUDO_REGISTER
)
5076 if (reg_equiv_memory_loc
[regno
])
5077 return refers_to_mem_for_reload_p (in
);
5078 else if (reg_equiv_constant
[regno
])
5083 else if (CONSTANT_P (x
))
5085 else if (GET_CODE (x
) == MEM
)
5086 return refers_to_mem_for_reload_p (in
);
5087 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
5088 || GET_CODE (x
) == CC0
)
5089 return reg_mentioned_p (x
, in
);
5093 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
5094 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5096 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
5099 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5103 refers_to_mem_for_reload_p (x
)
5109 if (GET_CODE (x
) == MEM
)
5112 if (GET_CODE (x
) == REG
)
5113 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
5114 && reg_equiv_memory_loc
[REGNO (x
)]);
5116 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
5117 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
5119 && (GET_CODE (XEXP (x
, i
)) == MEM
5120 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
5126 /* Check the insns before INSN to see if there is a suitable register
5127 containing the same value as GOAL.
5128 If OTHER is -1, look for a register in class CLASS.
5129 Otherwise, just see if register number OTHER shares GOAL's value.
5131 Return an rtx for the register found, or zero if none is found.
5133 If RELOAD_REG_P is (short *)1,
5134 we reject any hard reg that appears in reload_reg_rtx
5135 because such a hard reg is also needed coming into this insn.
5137 If RELOAD_REG_P is any other nonzero value,
5138 it is a vector indexed by hard reg number
5139 and we reject any hard reg whose element in the vector is nonnegative
5140 as well as any that appears in reload_reg_rtx.
5142 If GOAL is zero, then GOALREG is a register number; we look
5143 for an equivalent for that register.
5145 MODE is the machine mode of the value we want an equivalence for.
5146 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5148 This function is used by jump.c as well as in the reload pass.
5150 If GOAL is the sum of the stack pointer and a constant, we treat it
5151 as if it were a constant except that sp is required to be unchanging. */
5154 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
5157 enum reg_class
class;
5159 short *reload_reg_p
;
5161 enum machine_mode mode
;
5163 register rtx p
= insn
;
5164 rtx goaltry
, valtry
, value
, where
;
5166 register int regno
= -1;
5170 int goal_mem_addr_varies
= 0;
5171 int need_stable_sp
= 0;
5177 else if (GET_CODE (goal
) == REG
)
5178 regno
= REGNO (goal
);
5179 else if (GET_CODE (goal
) == MEM
)
5181 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
5182 if (MEM_VOLATILE_P (goal
))
5184 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
5186 /* An address with side effects must be reexecuted. */
5197 else if (CONSTANT_P (goal
))
5199 else if (GET_CODE (goal
) == PLUS
5200 && XEXP (goal
, 0) == stack_pointer_rtx
5201 && CONSTANT_P (XEXP (goal
, 1)))
5202 goal_const
= need_stable_sp
= 1;
5206 /* On some machines, certain regs must always be rejected
5207 because they don't behave the way ordinary registers do. */
5209 #ifdef OVERLAPPING_REGNO_P
5210 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5211 && OVERLAPPING_REGNO_P (regno
))
5215 /* Scan insns back from INSN, looking for one that copies
5216 a value into or out of GOAL.
5217 Stop and give up if we reach a label. */
5222 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
5224 if (GET_CODE (p
) == INSN
5225 /* If we don't want spill regs ... */
5226 && (! (reload_reg_p
!= 0
5227 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
5228 /* ... then ignore insns introduced by reload; they aren't useful
5229 and can cause results in reload_as_needed to be different
5230 from what they were when calculating the need for spills.
5231 If we notice an input-reload insn here, we will reject it below,
5232 but it might hide a usable equivalent. That makes bad code.
5233 It may even abort: perhaps no reg was spilled for this insn
5234 because it was assumed we would find that equivalent. */
5235 || INSN_UID (p
) < reload_first_uid
))
5238 pat
= single_set (p
);
5239 /* First check for something that sets some reg equal to GOAL. */
5242 && true_regnum (SET_SRC (pat
)) == regno
5243 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5246 && true_regnum (SET_DEST (pat
)) == regno
5247 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
5249 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
5250 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5252 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
5253 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
5255 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
5256 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
5257 /* If we are looking for a constant,
5258 and something equivalent to that constant was copied
5259 into a reg, we can use that reg. */
5260 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5262 && rtx_equal_p (XEXP (tem
, 0), goal
)
5263 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5264 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5266 && GET_CODE (SET_DEST (pat
)) == REG
5267 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5268 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5269 && GET_CODE (goal
) == CONST_INT
5270 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 0, 0,
5272 && rtx_equal_p (goal
, goaltry
)
5273 && (valtry
= operand_subword (SET_DEST (pat
), 0, 0,
5275 && (valueno
= true_regnum (valtry
)) >= 0)
5276 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5278 && GET_CODE (SET_DEST (pat
)) == REG
5279 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5280 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5281 && GET_CODE (goal
) == CONST_INT
5282 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
5284 && rtx_equal_p (goal
, goaltry
)
5286 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
5287 && (valueno
= true_regnum (valtry
)) >= 0)))
5290 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
5291 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
5301 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5302 (or copying VALUE into GOAL, if GOAL is also a register).
5303 Now verify that VALUE is really valid. */
5305 /* VALUENO is the register number of VALUE; a hard register. */
5307 /* Don't try to re-use something that is killed in this insn. We want
5308 to be able to trust REG_UNUSED notes. */
5309 if (find_reg_note (where
, REG_UNUSED
, value
))
5312 /* If we propose to get the value from the stack pointer or if GOAL is
5313 a MEM based on the stack pointer, we need a stable SP. */
5314 if (valueno
== STACK_POINTER_REGNUM
5315 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
5319 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5320 if (GET_MODE (value
) != mode
)
5323 /* Reject VALUE if it was loaded from GOAL
5324 and is also a register that appears in the address of GOAL. */
5326 if (goal_mem
&& value
== SET_DEST (PATTERN (where
))
5327 && refers_to_regno_for_reload_p (valueno
,
5329 + HARD_REGNO_NREGS (valueno
, mode
)),
5333 /* Reject registers that overlap GOAL. */
5335 if (!goal_mem
&& !goal_const
5336 && regno
+ HARD_REGNO_NREGS (regno
, mode
) > valueno
5337 && regno
< valueno
+ HARD_REGNO_NREGS (valueno
, mode
))
5340 /* Reject VALUE if it is one of the regs reserved for reloads.
5341 Reload1 knows how to reuse them anyway, and it would get
5342 confused if we allocated one without its knowledge.
5343 (Now that insns introduced by reload are ignored above,
5344 this case shouldn't happen, but I'm not positive.) */
5346 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1
5347 && reload_reg_p
[valueno
] >= 0)
5350 /* On some machines, certain regs must always be rejected
5351 because they don't behave the way ordinary registers do. */
5353 #ifdef OVERLAPPING_REGNO_P
5354 if (OVERLAPPING_REGNO_P (valueno
))
5358 nregs
= HARD_REGNO_NREGS (regno
, mode
);
5359 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
5361 /* Reject VALUE if it is a register being used for an input reload
5362 even if it is not one of those reserved. */
5364 if (reload_reg_p
!= 0)
5367 for (i
= 0; i
< n_reloads
; i
++)
5368 if (reload_reg_rtx
[i
] != 0 && reload_in
[i
])
5370 int regno1
= REGNO (reload_reg_rtx
[i
]);
5371 int nregs1
= HARD_REGNO_NREGS (regno1
,
5372 GET_MODE (reload_reg_rtx
[i
]));
5373 if (regno1
< valueno
+ valuenregs
5374 && regno1
+ nregs1
> valueno
)
5380 /* We must treat frame pointer as varying here,
5381 since it can vary--in a nonlocal goto as generated by expand_goto. */
5382 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
5384 /* Now verify that the values of GOAL and VALUE remain unaltered
5385 until INSN is reached. */
5394 /* Don't trust the conversion past a function call
5395 if either of the two is in a call-clobbered register, or memory. */
5396 if (GET_CODE (p
) == CALL_INSN
5397 && ((regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5398 && call_used_regs
[regno
])
5400 (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5401 && call_used_regs
[valueno
])
5407 #ifdef INSN_CLOBBERS_REGNO_P
5408 if ((valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5409 && INSN_CLOBBERS_REGNO_P (p
, valueno
))
5410 || (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5411 && INSN_CLOBBERS_REGNO_P (p
, regno
)))
5415 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
5417 /* If this insn P stores in either GOAL or VALUE, return 0.
5418 If GOAL is a memory ref and this insn writes memory, return 0.
5419 If GOAL is a memory ref and its address is not constant,
5420 and this insn P changes a register used in GOAL, return 0. */
5423 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
5425 register rtx dest
= SET_DEST (pat
);
5426 while (GET_CODE (dest
) == SUBREG
5427 || GET_CODE (dest
) == ZERO_EXTRACT
5428 || GET_CODE (dest
) == SIGN_EXTRACT
5429 || GET_CODE (dest
) == STRICT_LOW_PART
)
5430 dest
= XEXP (dest
, 0);
5431 if (GET_CODE (dest
) == REG
)
5433 register int xregno
= REGNO (dest
);
5435 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5436 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5439 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
5441 if (xregno
< valueno
+ valuenregs
5442 && xregno
+ xnregs
> valueno
)
5444 if (goal_mem_addr_varies
5445 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
5448 else if (goal_mem
&& GET_CODE (dest
) == MEM
5449 && ! push_operand (dest
, GET_MODE (dest
)))
5451 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
5454 else if (GET_CODE (pat
) == PARALLEL
)
5457 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
5459 register rtx v1
= XVECEXP (pat
, 0, i
);
5460 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
5462 register rtx dest
= SET_DEST (v1
);
5463 while (GET_CODE (dest
) == SUBREG
5464 || GET_CODE (dest
) == ZERO_EXTRACT
5465 || GET_CODE (dest
) == SIGN_EXTRACT
5466 || GET_CODE (dest
) == STRICT_LOW_PART
)
5467 dest
= XEXP (dest
, 0);
5468 if (GET_CODE (dest
) == REG
)
5470 register int xregno
= REGNO (dest
);
5472 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5473 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5476 if (xregno
< regno
+ nregs
5477 && xregno
+ xnregs
> regno
)
5479 if (xregno
< valueno
+ valuenregs
5480 && xregno
+ xnregs
> valueno
)
5482 if (goal_mem_addr_varies
5483 && reg_overlap_mentioned_for_reload_p (dest
,
5487 else if (goal_mem
&& GET_CODE (dest
) == MEM
5488 && ! push_operand (dest
, GET_MODE (dest
)))
5490 else if (need_stable_sp
5491 && push_operand (dest
, GET_MODE (dest
)))
5498 /* If this insn auto-increments or auto-decrements
5499 either regno or valueno, return 0 now.
5500 If GOAL is a memory ref and its address is not constant,
5501 and this insn P increments a register used in GOAL, return 0. */
5505 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
5506 if (REG_NOTE_KIND (link
) == REG_INC
5507 && GET_CODE (XEXP (link
, 0)) == REG
)
5509 register int incno
= REGNO (XEXP (link
, 0));
5510 if (incno
< regno
+ nregs
&& incno
>= regno
)
5512 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
5514 if (goal_mem_addr_varies
5515 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
5525 /* Find a place where INCED appears in an increment or decrement operator
5526 within X, and return the amount INCED is incremented or decremented by.
5527 The value is always positive. */
5530 find_inc_amount (x
, inced
)
5533 register enum rtx_code code
= GET_CODE (x
);
5539 register rtx addr
= XEXP (x
, 0);
5540 if ((GET_CODE (addr
) == PRE_DEC
5541 || GET_CODE (addr
) == POST_DEC
5542 || GET_CODE (addr
) == PRE_INC
5543 || GET_CODE (addr
) == POST_INC
)
5544 && XEXP (addr
, 0) == inced
)
5545 return GET_MODE_SIZE (GET_MODE (x
));
5548 fmt
= GET_RTX_FORMAT (code
);
5549 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5553 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
5560 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
5562 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
5572 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5575 regno_clobbered_p (regno
, insn
)
5579 if (GET_CODE (PATTERN (insn
)) == CLOBBER
5580 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
5581 return REGNO (XEXP (PATTERN (insn
), 0)) == regno
;
5583 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
5585 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
5589 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
5590 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
5591 && REGNO (XEXP (elt
, 0)) == regno
)