1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92, 93, 1994 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "insn-config.h"
92 #include "insn-codes.h"
96 #include "hard-reg-set.h"
100 #ifndef REGISTER_MOVE_COST
101 #define REGISTER_MOVE_COST(x, y) 2
104 /* The variables set up by `find_reloads' are:
106 n_reloads number of distinct reloads needed; max reload # + 1
107 tables indexed by reload number
108 reload_in rtx for value to reload from
109 reload_out rtx for where to store reload-reg afterward if nec
110 (often the same as reload_in)
111 reload_reg_class enum reg_class, saying what regs to reload into
112 reload_inmode enum machine_mode; mode this operand should have
113 when reloaded, on input.
114 reload_outmode enum machine_mode; mode this operand should have
115 when reloaded, on output.
116 reload_optional char, nonzero for an optional reload.
117 Optional reloads are ignored unless the
118 value is already sitting in a register.
119 reload_inc int, positive amount to increment or decrement by if
120 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
121 Ignored otherwise (don't assume it is zero).
122 reload_in_reg rtx. A reg for which reload_in is the equivalent.
123 If reload_in is a symbol_ref which came from
124 reg_equiv_constant, then this is the pseudo
125 which has that symbol_ref as equivalent.
126 reload_reg_rtx rtx. This is the register to reload into.
127 If it is zero when `find_reloads' returns,
128 you must find a suitable register in the class
129 specified by reload_reg_class, and store here
130 an rtx for that register with mode from
131 reload_inmode or reload_outmode.
132 reload_nocombine char, nonzero if this reload shouldn't be
133 combined with another reload.
134 reload_opnum int, operand number being reloaded. This is
135 used to group related reloads and need not always
136 be equal to the actual operand number in the insn,
137 though it current will be; for in-out operands, it
138 is one of the two operand numbers.
139 reload_when_needed enum, classifies reload as needed either for
140 addressing an input reload, addressing an output,
141 for addressing a non-reloaded mem ref,
142 or for unspecified purposes (i.e., more than one
144 reload_secondary_p int, 1 if this is a secondary register for one
146 reload_secondary_in_reload
147 reload_secondary_out_reload
148 int, gives the reload number of a secondary
149 reload, when needed; otherwise -1
150 reload_secondary_in_icode
151 reload_secondary_out_icode
152 enum insn_code, if a secondary reload is required,
153 gives the INSN_CODE that uses the secondary
154 reload as a scratch register, or CODE_FOR_nothing
155 if the secondary reload register is to be an
156 intermediate register. */
159 rtx reload_in
[MAX_RELOADS
];
160 rtx reload_out
[MAX_RELOADS
];
161 enum reg_class reload_reg_class
[MAX_RELOADS
];
162 enum machine_mode reload_inmode
[MAX_RELOADS
];
163 enum machine_mode reload_outmode
[MAX_RELOADS
];
164 rtx reload_reg_rtx
[MAX_RELOADS
];
165 char reload_optional
[MAX_RELOADS
];
166 int reload_inc
[MAX_RELOADS
];
167 rtx reload_in_reg
[MAX_RELOADS
];
168 char reload_nocombine
[MAX_RELOADS
];
169 int reload_opnum
[MAX_RELOADS
];
170 enum reload_type reload_when_needed
[MAX_RELOADS
];
171 int reload_secondary_p
[MAX_RELOADS
];
172 int reload_secondary_in_reload
[MAX_RELOADS
];
173 int reload_secondary_out_reload
[MAX_RELOADS
];
174 enum insn_code reload_secondary_in_icode
[MAX_RELOADS
];
175 enum insn_code reload_secondary_out_icode
[MAX_RELOADS
];
177 /* All the "earlyclobber" operands of the current insn
178 are recorded here. */
180 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
182 int reload_n_operands
;
184 /* Replacing reloads.
186 If `replace_reloads' is nonzero, then as each reload is recorded
187 an entry is made for it in the table `replacements'.
188 Then later `subst_reloads' can look through that table and
189 perform all the replacements needed. */
191 /* Nonzero means record the places to replace. */
192 static int replace_reloads
;
194 /* Each replacement is recorded with a structure like this. */
197 rtx
*where
; /* Location to store in */
198 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
199 a SUBREG; 0 otherwise. */
200 int what
; /* which reload this is for */
201 enum machine_mode mode
; /* mode it must have */
204 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
206 /* Number of replacements currently recorded. */
207 static int n_replacements
;
209 /* Used to track what is modified by an operand. */
212 int reg_flag
; /* Nonzero if referencing a register. */
213 int safe
; /* Nonzero if this can't conflict with anything. */
214 rtx base
; /* Base adddress for MEM. */
215 HOST_WIDE_INT start
; /* Starting offset or register number. */
216 HOST_WIDE_INT end
; /* Endinf offset or register number. */
219 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
220 (see reg_equiv_address). */
221 static rtx memlocs
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
222 static int n_memlocs
;
224 #ifdef SECONDARY_MEMORY_NEEDED
226 /* Save MEMs needed to copy from one class of registers to another. One MEM
227 is used per mode, but normally only one or two modes are ever used.
229 We keep two versions, before and after register elimination. The one
230 after register elimination is record separately for each operand. This
231 is done in case the address is not valid to be sure that we separately
234 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
235 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
238 /* The instruction we are doing reloads for;
239 so we can test whether a register dies in it. */
240 static rtx this_insn
;
242 /* Nonzero if this instruction is a user-specified asm with operands. */
243 static int this_insn_is_asm
;
245 /* If hard_regs_live_known is nonzero,
246 we can tell which hard regs are currently live,
247 at least enough to succeed in choosing dummy reloads. */
248 static int hard_regs_live_known
;
250 /* Indexed by hard reg number,
251 element is nonegative if hard reg has been spilled.
252 This vector is passed to `find_reloads' as an argument
253 and is not changed here. */
254 static short *static_reload_reg_p
;
256 /* Set to 1 in subst_reg_equivs if it changes anything. */
257 static int subst_reg_equivs_changed
;
259 /* On return from push_reload, holds the reload-number for the OUT
260 operand, which can be different for that from the input operand. */
261 static int output_reloadnum
;
263 /* Compare two RTX's. */
264 #define MATCHES(x, y) \
265 (x == y || (x != 0 && (GET_CODE (x) == REG \
266 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
267 : rtx_equal_p (x, y) && ! side_effects_p (x))))
269 /* Indicates if two reloads purposes are for similar enough things that we
270 can merge their reloads. */
271 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
272 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
273 || ((when1) == (when2) && (op1) == (op2)) \
274 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
275 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
276 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
277 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
278 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
280 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
281 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
282 ((when1) != (when2) \
283 || ! ((op1) == (op2) \
284 || (when1) == RELOAD_FOR_INPUT \
285 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
286 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
288 static int push_secondary_reload
PROTO((int, rtx
, int, int, enum reg_class
,
289 enum machine_mode
, enum reload_type
,
291 static int push_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
292 enum machine_mode
, enum machine_mode
,
293 int, int, int, enum reload_type
));
294 static void push_replacement
PROTO((rtx
*, int, enum machine_mode
));
295 static void combine_reloads
PROTO((void));
296 static rtx find_dummy_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*,
297 enum machine_mode
, enum machine_mode
,
298 enum reg_class
, int));
299 static int earlyclobber_operand_p
PROTO((rtx
));
300 static int hard_reg_set_here_p
PROTO((int, int, rtx
));
301 static struct decomposition decompose
PROTO((rtx
));
302 static int immune_p
PROTO((rtx
, rtx
, struct decomposition
));
303 static int alternative_allows_memconst
PROTO((char *, int));
304 static rtx find_reloads_toplev
PROTO((rtx
, int, enum reload_type
, int, int));
305 static rtx make_memloc
PROTO((rtx
, int));
306 static int find_reloads_address
PROTO((enum machine_mode
, rtx
*, rtx
, rtx
*,
307 int, enum reload_type
, int));
308 static rtx subst_reg_equivs
PROTO((rtx
));
309 static rtx subst_indexed_address
PROTO((rtx
));
310 static int find_reloads_address_1
PROTO((rtx
, int, rtx
*, int,
311 enum reload_type
,int));
312 static void find_reloads_address_part
PROTO((rtx
, rtx
*, enum reg_class
,
313 enum machine_mode
, int,
314 enum reload_type
, int));
315 static int find_inc_amount
PROTO((rtx
, rtx
));
317 #ifdef HAVE_SECONDARY_RELOADS
319 /* Determine if any secondary reloads are needed for loading (if IN_P is
320 non-zero) or storing (if IN_P is zero) X to or from a reload register of
321 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
322 are needed, push them.
324 Return the reload number of the secondary reload we made, or -1 if
325 we didn't need one. *PICODE is set to the insn_code to use if we do
326 need a secondary reload. */
329 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
335 enum reg_class reload_class
;
336 enum machine_mode reload_mode
;
337 enum reload_type type
;
338 enum insn_code
*picode
;
340 enum reg_class
class = NO_REGS
;
341 enum machine_mode mode
= reload_mode
;
342 enum insn_code icode
= CODE_FOR_nothing
;
343 enum reg_class t_class
= NO_REGS
;
344 enum machine_mode t_mode
= VOIDmode
;
345 enum insn_code t_icode
= CODE_FOR_nothing
;
346 enum reload_type secondary_type
;
348 int s_reload
, t_reload
= -1;
350 if (type
== RELOAD_FOR_INPUT_ADDRESS
|| type
== RELOAD_FOR_OUTPUT_ADDRESS
)
351 secondary_type
= type
;
353 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
355 *picode
= CODE_FOR_nothing
;
357 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
358 is still a pseudo-register by now, it *must* have an equivalent MEM
359 but we don't want to assume that), use that equivalent when seeing if
360 a secondary reload is needed since whether or not a reload is needed
361 might be sensitive to the form of the MEM. */
363 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
364 && reg_equiv_mem
[REGNO (x
)] != 0)
365 x
= reg_equiv_mem
[REGNO (x
)];
367 #ifdef SECONDARY_INPUT_RELOAD_CLASS
369 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
372 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
374 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
377 /* If we don't need any secondary registers, done. */
378 if (class == NO_REGS
)
381 /* Get a possible insn to use. If the predicate doesn't accept X, don't
384 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
385 : reload_out_optab
[(int) reload_mode
]);
387 if (icode
!= CODE_FOR_nothing
388 && insn_operand_predicate
[(int) icode
][in_p
]
389 && (! (insn_operand_predicate
[(int) icode
][in_p
]) (x
, reload_mode
)))
390 icode
= CODE_FOR_nothing
;
392 /* If we will be using an insn, see if it can directly handle the reload
393 register we will be using. If it can, the secondary reload is for a
394 scratch register. If it can't, we will use the secondary reload for
395 an intermediate register and require a tertiary reload for the scratch
398 if (icode
!= CODE_FOR_nothing
)
400 /* If IN_P is non-zero, the reload register will be the output in
401 operand 0. If IN_P is zero, the reload register will be the input
402 in operand 1. Outputs should have an initial "=", which we must
405 char insn_letter
= insn_operand_constraint
[(int) icode
][!in_p
][in_p
];
406 enum reg_class insn_class
407 = (insn_letter
== 'r' ? GENERAL_REGS
408 : REG_CLASS_FROM_LETTER (insn_letter
));
410 if (insn_class
== NO_REGS
411 || (in_p
&& insn_operand_constraint
[(int) icode
][!in_p
][0] != '=')
412 /* The scratch register's constraint must start with "=&". */
413 || insn_operand_constraint
[(int) icode
][2][0] != '='
414 || insn_operand_constraint
[(int) icode
][2][1] != '&')
417 if (reg_class_subset_p (reload_class
, insn_class
))
418 mode
= insn_operand_mode
[(int) icode
][2];
421 char t_letter
= insn_operand_constraint
[(int) icode
][2][2];
423 t_mode
= insn_operand_mode
[(int) icode
][2];
424 t_class
= (t_letter
== 'r' ? GENERAL_REGS
425 : REG_CLASS_FROM_LETTER (t_letter
));
427 icode
= CODE_FOR_nothing
;
431 /* This case isn't valid, so fail. Reload is allowed to use the same
432 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
433 in the case of a secondary register, we actually need two different
434 registers for correct code. We fail here to prevent the possibility of
435 silently generating incorrect code later.
437 The convention is that secondary input reloads are valid only if the
438 secondary_class is different from class. If you have such a case, you
439 can not use secondary reloads, you must work around the problem some
442 Allow this when MODE is not reload_mode and assume that the generated
443 code handles this case (it does on the Alpha, which is the only place
444 this currently happens). */
446 if (in_p
&& class == reload_class
&& mode
== reload_mode
)
449 /* If we need a tertiary reload, see if we have one we can reuse or else
452 if (t_class
!= NO_REGS
)
454 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
455 if (reload_secondary_p
[t_reload
]
456 && (reg_class_subset_p (t_class
, reload_reg_class
[t_reload
])
457 || reg_class_subset_p (reload_reg_class
[t_reload
], t_class
))
458 && ((in_p
&& reload_inmode
[t_reload
] == t_mode
)
459 || (! in_p
&& reload_outmode
[t_reload
] == t_mode
))
460 && ((in_p
&& (reload_secondary_in_icode
[t_reload
]
461 == CODE_FOR_nothing
))
462 || (! in_p
&&(reload_secondary_out_icode
[t_reload
]
463 == CODE_FOR_nothing
)))
464 && (reg_class_size
[(int) t_class
] == 1
465 #ifdef SMALL_REGISTER_CLASSES
469 && MERGABLE_RELOADS (secondary_type
,
470 reload_when_needed
[t_reload
],
471 opnum
, reload_opnum
[t_reload
]))
474 reload_inmode
[t_reload
] = t_mode
;
476 reload_outmode
[t_reload
] = t_mode
;
478 if (reg_class_subset_p (t_class
, reload_reg_class
[t_reload
]))
479 reload_reg_class
[t_reload
] = t_class
;
481 reload_opnum
[t_reload
] = MIN (reload_opnum
[t_reload
], opnum
);
482 reload_optional
[t_reload
] &= optional
;
483 reload_secondary_p
[t_reload
] = 1;
484 if (MERGE_TO_OTHER (secondary_type
, reload_when_needed
[t_reload
],
485 opnum
, reload_opnum
[t_reload
]))
486 reload_when_needed
[t_reload
] = RELOAD_OTHER
;
489 if (t_reload
== n_reloads
)
491 /* We need to make a new tertiary reload for this register class. */
492 reload_in
[t_reload
] = reload_out
[t_reload
] = 0;
493 reload_reg_class
[t_reload
] = t_class
;
494 reload_inmode
[t_reload
] = in_p
? t_mode
: VOIDmode
;
495 reload_outmode
[t_reload
] = ! in_p
? t_mode
: VOIDmode
;
496 reload_reg_rtx
[t_reload
] = 0;
497 reload_optional
[t_reload
] = optional
;
498 reload_inc
[t_reload
] = 0;
499 /* Maybe we could combine these, but it seems too tricky. */
500 reload_nocombine
[t_reload
] = 1;
501 reload_in_reg
[t_reload
] = 0;
502 reload_opnum
[t_reload
] = opnum
;
503 reload_when_needed
[t_reload
] = secondary_type
;
504 reload_secondary_in_reload
[t_reload
] = -1;
505 reload_secondary_out_reload
[t_reload
] = -1;
506 reload_secondary_in_icode
[t_reload
] = CODE_FOR_nothing
;
507 reload_secondary_out_icode
[t_reload
] = CODE_FOR_nothing
;
508 reload_secondary_p
[t_reload
] = 1;
514 /* See if we can reuse an existing secondary reload. */
515 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
516 if (reload_secondary_p
[s_reload
]
517 && (reg_class_subset_p (class, reload_reg_class
[s_reload
])
518 || reg_class_subset_p (reload_reg_class
[s_reload
], class))
519 && ((in_p
&& reload_inmode
[s_reload
] == mode
)
520 || (! in_p
&& reload_outmode
[s_reload
] == mode
))
521 && ((in_p
&& reload_secondary_in_reload
[s_reload
] == t_reload
)
522 || (! in_p
&& reload_secondary_out_reload
[s_reload
] == t_reload
))
523 && ((in_p
&& reload_secondary_in_icode
[s_reload
] == t_icode
)
524 || (! in_p
&& reload_secondary_out_icode
[s_reload
] == t_icode
))
525 && (reg_class_size
[(int) class] == 1
526 #ifdef SMALL_REGISTER_CLASSES
530 && MERGABLE_RELOADS (secondary_type
, reload_when_needed
[s_reload
],
531 opnum
, reload_opnum
[s_reload
]))
534 reload_inmode
[s_reload
] = mode
;
536 reload_outmode
[s_reload
] = mode
;
538 if (reg_class_subset_p (class, reload_reg_class
[s_reload
]))
539 reload_reg_class
[s_reload
] = class;
541 reload_opnum
[s_reload
] = MIN (reload_opnum
[s_reload
], opnum
);
542 reload_optional
[s_reload
] &= optional
;
543 reload_secondary_p
[s_reload
] = 1;
544 if (MERGE_TO_OTHER (secondary_type
, reload_when_needed
[s_reload
],
545 opnum
, reload_opnum
[s_reload
]))
546 reload_when_needed
[s_reload
] = RELOAD_OTHER
;
549 if (s_reload
== n_reloads
)
551 /* We need to make a new secondary reload for this register class. */
552 reload_in
[s_reload
] = reload_out
[s_reload
] = 0;
553 reload_reg_class
[s_reload
] = class;
555 reload_inmode
[s_reload
] = in_p
? mode
: VOIDmode
;
556 reload_outmode
[s_reload
] = ! in_p
? mode
: VOIDmode
;
557 reload_reg_rtx
[s_reload
] = 0;
558 reload_optional
[s_reload
] = optional
;
559 reload_inc
[s_reload
] = 0;
560 /* Maybe we could combine these, but it seems too tricky. */
561 reload_nocombine
[s_reload
] = 1;
562 reload_in_reg
[s_reload
] = 0;
563 reload_opnum
[s_reload
] = opnum
;
564 reload_when_needed
[s_reload
] = secondary_type
;
565 reload_secondary_in_reload
[s_reload
] = in_p
? t_reload
: -1;
566 reload_secondary_out_reload
[s_reload
] = ! in_p
? t_reload
: -1;
567 reload_secondary_in_icode
[s_reload
] = in_p
? t_icode
: CODE_FOR_nothing
;
568 reload_secondary_out_icode
[s_reload
]
569 = ! in_p
? t_icode
: CODE_FOR_nothing
;
570 reload_secondary_p
[s_reload
] = 1;
574 #ifdef SECONDARY_MEMORY_NEEDED
575 /* If we need a memory location to copy between the two reload regs,
578 if (in_p
&& icode
== CODE_FOR_nothing
579 && SECONDARY_MEMORY_NEEDED (class, reload_class
, reload_mode
))
580 get_secondary_mem (x
, reload_mode
, opnum
, type
);
582 if (! in_p
&& icode
== CODE_FOR_nothing
583 && SECONDARY_MEMORY_NEEDED (reload_class
, class, reload_mode
))
584 get_secondary_mem (x
, reload_mode
, opnum
, type
);
591 #endif /* HAVE_SECONDARY_RELOADS */
593 #ifdef SECONDARY_MEMORY_NEEDED
595 /* Return a memory location that will be used to copy X in mode MODE.
596 If we haven't already made a location for this mode in this insn,
597 call find_reloads_address on the location being returned. */
600 get_secondary_mem (x
, mode
, opnum
, type
)
602 enum machine_mode mode
;
604 enum reload_type type
;
609 /* By default, if MODE is narrower than a word, widen it to a word.
610 This is required because most machines that require these memory
611 locations do not support short load and stores from all registers
612 (e.g., FP registers). */
614 #ifdef SECONDARY_MEMORY_NEEDED_MODE
615 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
617 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
618 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
621 /* If we already have made a MEM for this operand in MODE, return it. */
622 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
623 return secondary_memlocs_elim
[(int) mode
][opnum
];
625 /* If this is the first time we've tried to get a MEM for this mode,
626 allocate a new one. `something_changed' in reload will get set
627 by noticing that the frame size has changed. */
629 if (secondary_memlocs
[(int) mode
] == 0)
631 #ifdef SECONDARY_MEMORY_NEEDED_RTX
632 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
634 secondary_memlocs
[(int) mode
]
635 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
639 /* Get a version of the address doing any eliminations needed. If that
640 didn't give us a new MEM, make a new one if it isn't valid. */
642 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
643 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
645 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
646 loc
= copy_rtx (loc
);
648 /* The only time the call below will do anything is if the stack
649 offset is too large. In that case IND_LEVELS doesn't matter, so we
650 can just pass a zero. Adjust the type to be the address of the
651 corresponding object. If the address was valid, save the eliminated
652 address. If it wasn't valid, we need to make a reload each time, so
657 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
658 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
661 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
665 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
669 /* Clear any secondary memory locations we've made. */
672 clear_secondary_mem ()
674 bzero ((char *) secondary_memlocs
, sizeof secondary_memlocs
);
676 #endif /* SECONDARY_MEMORY_NEEDED */
678 /* Record one reload that needs to be performed.
679 IN is an rtx saying where the data are to be found before this instruction.
680 OUT says where they must be stored after the instruction.
681 (IN is zero for data not read, and OUT is zero for data not written.)
682 INLOC and OUTLOC point to the places in the instructions where
683 IN and OUT were found.
684 If IN and OUT are both non-zero, it means the same register must be used
685 to reload both IN and OUT.
687 CLASS is a register class required for the reloaded data.
688 INMODE is the machine mode that the instruction requires
689 for the reg that replaces IN and OUTMODE is likewise for OUT.
691 If IN is zero, then OUT's location and mode should be passed as
694 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
696 OPTIONAL nonzero means this reload does not need to be performed:
697 it can be discarded if that is more convenient.
699 OPNUM and TYPE say what the purpose of this reload is.
701 The return value is the reload-number for this reload.
703 If both IN and OUT are nonzero, in some rare cases we might
704 want to make two separate reloads. (Actually we never do this now.)
705 Therefore, the reload-number for OUT is stored in
706 output_reloadnum when we return; the return value applies to IN.
707 Usually (presently always), when IN and OUT are nonzero,
708 the two reload-numbers are equal, but the caller should be careful to
712 push_reload (in
, out
, inloc
, outloc
, class,
713 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
714 register rtx in
, out
;
716 enum reg_class
class;
717 enum machine_mode inmode
, outmode
;
721 enum reload_type type
;
725 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
726 int secondary_in_reload
= -1, secondary_out_reload
= -1;
727 enum insn_code secondary_in_icode
, secondary_out_icode
;
729 /* INMODE and/or OUTMODE could be VOIDmode if no mode
730 has been specified for the operand. In that case,
731 use the operand's mode as the mode to reload. */
732 if (inmode
== VOIDmode
&& in
!= 0)
733 inmode
= GET_MODE (in
);
734 if (outmode
== VOIDmode
&& out
!= 0)
735 outmode
= GET_MODE (out
);
737 /* If IN is a pseudo register everywhere-equivalent to a constant, and
738 it is not in a hard register, reload straight from the constant,
739 since we want to get rid of such pseudo registers.
740 Often this is done earlier, but not always in find_reloads_address. */
741 if (in
!= 0 && GET_CODE (in
) == REG
)
743 register int regno
= REGNO (in
);
745 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
746 && reg_equiv_constant
[regno
] != 0)
747 in
= reg_equiv_constant
[regno
];
750 /* Likewise for OUT. Of course, OUT will never be equivalent to
751 an actual constant, but it might be equivalent to a memory location
752 (in the case of a parameter). */
753 if (out
!= 0 && GET_CODE (out
) == REG
)
755 register int regno
= REGNO (out
);
757 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
758 && reg_equiv_constant
[regno
] != 0)
759 out
= reg_equiv_constant
[regno
];
762 /* If we have a read-write operand with an address side-effect,
763 change either IN or OUT so the side-effect happens only once. */
764 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
766 if (GET_CODE (XEXP (in
, 0)) == POST_INC
767 || GET_CODE (XEXP (in
, 0)) == POST_DEC
)
768 in
= gen_rtx (MEM
, GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
769 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
770 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
)
771 out
= gen_rtx (MEM
, GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
774 /* If we are reloading a (SUBREG constant ...), really reload just the
775 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
776 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
777 a pseudo and hence will become a MEM) with M1 wider than M2 and the
778 register is a pseudo, also reload the inside expression.
779 For machines that extend byte loads, do this for any SUBREG of a pseudo
780 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
781 M2 is an integral mode that gets extended when loaded.
782 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
783 either M1 is not valid for R or M2 is wider than a word but we only
784 need one word to store an M2-sized quantity in R.
785 (However, if OUT is nonzero, we need to reload the reg *and*
786 the subreg, so do nothing here, and let following statement handle it.)
788 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
789 we can't handle it here because CONST_INT does not indicate a mode.
791 Similarly, we must reload the inside expression if we have a
792 STRICT_LOW_PART (presumably, in == out in the cas).
794 Also reload the inner expression if it does not require a secondary
795 reload but the SUBREG does.
797 Finally, reload the inner expression if it is a register that is in
798 the class whose registers cannot be referenced in a different size
799 and M1 is not the same size as M2. */
801 if (in
!= 0 && GET_CODE (in
) == SUBREG
802 && (CONSTANT_P (SUBREG_REG (in
))
803 || GET_CODE (SUBREG_REG (in
)) == PLUS
805 || (((GET_CODE (SUBREG_REG (in
)) == REG
806 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
807 || GET_CODE (SUBREG_REG (in
)) == MEM
)
808 && ((GET_MODE_SIZE (inmode
)
809 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
810 #ifdef LOAD_EXTEND_OP
811 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
812 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
814 && (GET_MODE_SIZE (inmode
)
815 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
816 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
817 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
820 || (GET_CODE (SUBREG_REG (in
)) == REG
821 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
822 /* The case where out is nonzero
823 is handled differently in the following statement. */
824 && (out
== 0 || SUBREG_WORD (in
) == 0)
825 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
826 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
828 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
830 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
831 GET_MODE (SUBREG_REG (in
)))))
832 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in
))
835 #ifdef SECONDARY_INPUT_RELOAD_CLASS
836 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
837 && (SECONDARY_INPUT_RELOAD_CLASS (class,
838 GET_MODE (SUBREG_REG (in
)),
842 #ifdef CLASS_CANNOT_CHANGE_SIZE
843 || (GET_CODE (SUBREG_REG (in
)) == REG
844 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
845 && (TEST_HARD_REG_BIT
846 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
847 REGNO (SUBREG_REG (in
))))
848 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
849 != GET_MODE_SIZE (inmode
)))
853 in_subreg_loc
= inloc
;
854 inloc
= &SUBREG_REG (in
);
856 #ifndef LOAD_EXTEND_OP
857 if (GET_CODE (in
) == MEM
)
858 /* This is supposed to happen only for paradoxical subregs made by
859 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
860 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
863 inmode
= GET_MODE (in
);
866 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
867 either M1 is not valid for R or M2 is wider than a word but we only
868 need one word to store an M2-sized quantity in R.
870 However, we must reload the inner reg *as well as* the subreg in
873 if (in
!= 0 && GET_CODE (in
) == SUBREG
874 && GET_CODE (SUBREG_REG (in
)) == REG
875 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
876 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in
)), inmode
)
877 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
878 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
880 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
882 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
883 GET_MODE (SUBREG_REG (in
)))))))
885 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), NULL_PTR
,
886 GENERAL_REGS
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
890 /* Similarly for paradoxical and problematical SUBREGs on the output.
891 Note that there is no reason we need worry about the previous value
892 of SUBREG_REG (out); even if wider than out,
893 storing in a subreg is entitled to clobber it all
894 (except in the case of STRICT_LOW_PART,
895 and in that case the constraint should label it input-output.) */
896 if (out
!= 0 && GET_CODE (out
) == SUBREG
897 && (CONSTANT_P (SUBREG_REG (out
))
899 || (((GET_CODE (SUBREG_REG (out
)) == REG
900 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
901 || GET_CODE (SUBREG_REG (out
)) == MEM
)
902 && ((GET_MODE_SIZE (outmode
)
903 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))))
904 || (GET_CODE (SUBREG_REG (out
)) == REG
905 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
906 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
907 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
909 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
911 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
912 GET_MODE (SUBREG_REG (out
)))))
913 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out
))
914 + SUBREG_WORD (out
)),
916 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
917 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
918 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
919 GET_MODE (SUBREG_REG (out
)),
923 #ifdef CLASS_CANNOT_CHANGE_SIZE
924 || (GET_CODE (SUBREG_REG (out
)) == REG
925 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
926 && (TEST_HARD_REG_BIT
927 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
928 REGNO (SUBREG_REG (out
))))
929 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
930 != GET_MODE_SIZE (outmode
)))
934 out_subreg_loc
= outloc
;
935 outloc
= &SUBREG_REG (out
);
937 #ifndef LOAD_EXTEND_OP
938 if (GET_CODE (out
) == MEM
939 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
942 outmode
= GET_MODE (out
);
945 /* If IN appears in OUT, we can't share any input-only reload for IN. */
946 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
947 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
948 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
951 /* If IN is a SUBREG of a hard register, make a new REG. This
952 simplifies some of the cases below. */
954 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
955 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
956 in
= gen_rtx (REG
, GET_MODE (in
),
957 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
959 /* Similarly for OUT. */
960 if (out
!= 0 && GET_CODE (out
) == SUBREG
961 && GET_CODE (SUBREG_REG (out
)) == REG
962 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
963 out
= gen_rtx (REG
, GET_MODE (out
),
964 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
966 /* Narrow down the class of register wanted if that is
967 desirable on this machine for efficiency. */
969 class = PREFERRED_RELOAD_CLASS (in
, class);
971 /* Output reloads may need analogous treatment, different in detail. */
972 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
974 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
977 /* Make sure we use a class that can handle the actual pseudo
978 inside any subreg. For example, on the 386, QImode regs
979 can appear within SImode subregs. Although GENERAL_REGS
980 can handle SImode, QImode needs a smaller class. */
981 #ifdef LIMIT_RELOAD_CLASS
983 class = LIMIT_RELOAD_CLASS (inmode
, class);
984 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
985 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
988 class = LIMIT_RELOAD_CLASS (outmode
, class);
989 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
990 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
993 /* Verify that this class is at least possible for the mode that
995 if (this_insn_is_asm
)
997 enum machine_mode mode
;
998 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1002 if (mode
== VOIDmode
)
1004 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1009 outmode
= word_mode
;
1011 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1012 if (HARD_REGNO_MODE_OK (i
, mode
)
1013 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1015 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1018 for (j
= 1; j
< nregs
; j
++)
1019 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1024 if (i
== FIRST_PSEUDO_REGISTER
)
1026 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1031 if (class == NO_REGS
)
1034 /* We can use an existing reload if the class is right
1035 and at least one of IN and OUT is a match
1036 and the other is at worst neutral.
1037 (A zero compared against anything is neutral.)
1039 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
1040 for the same thing since that can cause us to need more reload registers
1041 than we otherwise would. */
1043 for (i
= 0; i
< n_reloads
; i
++)
1044 if ((reg_class_subset_p (class, reload_reg_class
[i
])
1045 || reg_class_subset_p (reload_reg_class
[i
], class))
1046 /* If the existing reload has a register, it must fit our class. */
1047 && (reload_reg_rtx
[i
] == 0
1048 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1049 true_regnum (reload_reg_rtx
[i
])))
1050 && ((in
!= 0 && MATCHES (reload_in
[i
], in
) && ! dont_share
1051 && (out
== 0 || reload_out
[i
] == 0 || MATCHES (reload_out
[i
], out
)))
1053 (out
!= 0 && MATCHES (reload_out
[i
], out
)
1054 && (in
== 0 || reload_in
[i
] == 0 || MATCHES (reload_in
[i
], in
))))
1055 && (reg_class_size
[(int) class] == 1
1056 #ifdef SMALL_REGISTER_CLASSES
1060 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
1061 opnum
, reload_opnum
[i
]))
1064 /* Reloading a plain reg for input can match a reload to postincrement
1065 that reg, since the postincrement's value is the right value.
1066 Likewise, it can match a preincrement reload, since we regard
1067 the preincrementation as happening before any ref in this insn
1068 to that register. */
1070 for (i
= 0; i
< n_reloads
; i
++)
1071 if ((reg_class_subset_p (class, reload_reg_class
[i
])
1072 || reg_class_subset_p (reload_reg_class
[i
], class))
1073 /* If the existing reload has a register, it must fit our class. */
1074 && (reload_reg_rtx
[i
] == 0
1075 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1076 true_regnum (reload_reg_rtx
[i
])))
1077 && out
== 0 && reload_out
[i
] == 0 && reload_in
[i
] != 0
1078 && ((GET_CODE (in
) == REG
1079 && (GET_CODE (reload_in
[i
]) == POST_INC
1080 || GET_CODE (reload_in
[i
]) == POST_DEC
1081 || GET_CODE (reload_in
[i
]) == PRE_INC
1082 || GET_CODE (reload_in
[i
]) == PRE_DEC
)
1083 && MATCHES (XEXP (reload_in
[i
], 0), in
))
1085 (GET_CODE (reload_in
[i
]) == REG
1086 && (GET_CODE (in
) == POST_INC
1087 || GET_CODE (in
) == POST_DEC
1088 || GET_CODE (in
) == PRE_INC
1089 || GET_CODE (in
) == PRE_DEC
)
1090 && MATCHES (XEXP (in
, 0), reload_in
[i
])))
1091 && (reg_class_size
[(int) class] == 1
1092 #ifdef SMALL_REGISTER_CLASSES
1096 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
1097 opnum
, reload_opnum
[i
]))
1099 /* Make sure reload_in ultimately has the increment,
1100 not the plain register. */
1101 if (GET_CODE (in
) == REG
)
1108 /* See if we need a secondary reload register to move between CLASS
1109 and IN or CLASS and OUT. Get the icode and push any required reloads
1110 needed for each of them if so. */
1112 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1115 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1116 &secondary_in_icode
);
1119 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1120 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1121 secondary_out_reload
1122 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1123 type
, &secondary_out_icode
);
1126 /* We found no existing reload suitable for re-use.
1127 So add an additional reload. */
1131 reload_out
[i
] = out
;
1132 reload_reg_class
[i
] = class;
1133 reload_inmode
[i
] = inmode
;
1134 reload_outmode
[i
] = outmode
;
1135 reload_reg_rtx
[i
] = 0;
1136 reload_optional
[i
] = optional
;
1138 reload_nocombine
[i
] = 0;
1139 reload_in_reg
[i
] = inloc
? *inloc
: 0;
1140 reload_opnum
[i
] = opnum
;
1141 reload_when_needed
[i
] = type
;
1142 reload_secondary_in_reload
[i
] = secondary_in_reload
;
1143 reload_secondary_out_reload
[i
] = secondary_out_reload
;
1144 reload_secondary_in_icode
[i
] = secondary_in_icode
;
1145 reload_secondary_out_icode
[i
] = secondary_out_icode
;
1146 reload_secondary_p
[i
] = 0;
1150 #ifdef SECONDARY_MEMORY_NEEDED
1151 /* If a memory location is needed for the copy, make one. */
1152 if (in
!= 0 && GET_CODE (in
) == REG
1153 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1154 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1156 get_secondary_mem (in
, inmode
, opnum
, type
);
1158 if (out
!= 0 && GET_CODE (out
) == REG
1159 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1160 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1162 get_secondary_mem (out
, outmode
, opnum
, type
);
1167 /* We are reusing an existing reload,
1168 but we may have additional information for it.
1169 For example, we may now have both IN and OUT
1170 while the old one may have just one of them. */
1172 if (inmode
!= VOIDmode
)
1173 reload_inmode
[i
] = inmode
;
1174 if (outmode
!= VOIDmode
)
1175 reload_outmode
[i
] = outmode
;
1179 reload_out
[i
] = out
;
1180 if (reg_class_subset_p (class, reload_reg_class
[i
]))
1181 reload_reg_class
[i
] = class;
1182 reload_optional
[i
] &= optional
;
1183 if (MERGE_TO_OTHER (type
, reload_when_needed
[i
],
1184 opnum
, reload_opnum
[i
]))
1185 reload_when_needed
[i
] = RELOAD_OTHER
;
1186 reload_opnum
[i
] = MIN (reload_opnum
[i
], opnum
);
1189 /* If the ostensible rtx being reload differs from the rtx found
1190 in the location to substitute, this reload is not safe to combine
1191 because we cannot reliably tell whether it appears in the insn. */
1193 if (in
!= 0 && in
!= *inloc
)
1194 reload_nocombine
[i
] = 1;
1197 /* This was replaced by changes in find_reloads_address_1 and the new
1198 function inc_for_reload, which go with a new meaning of reload_inc. */
1200 /* If this is an IN/OUT reload in an insn that sets the CC,
1201 it must be for an autoincrement. It doesn't work to store
1202 the incremented value after the insn because that would clobber the CC.
1203 So we must do the increment of the value reloaded from,
1204 increment it, store it back, then decrement again. */
1205 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1209 reload_inc
[i
] = find_inc_amount (PATTERN (this_insn
), in
);
1210 /* If we did not find a nonzero amount-to-increment-by,
1211 that contradicts the belief that IN is being incremented
1212 in an address in this insn. */
1213 if (reload_inc
[i
] == 0)
1218 /* If we will replace IN and OUT with the reload-reg,
1219 record where they are located so that substitution need
1220 not do a tree walk. */
1222 if (replace_reloads
)
1226 register struct replacement
*r
= &replacements
[n_replacements
++];
1228 r
->subreg_loc
= in_subreg_loc
;
1232 if (outloc
!= 0 && outloc
!= inloc
)
1234 register struct replacement
*r
= &replacements
[n_replacements
++];
1237 r
->subreg_loc
= out_subreg_loc
;
1242 /* If this reload is just being introduced and it has both
1243 an incoming quantity and an outgoing quantity that are
1244 supposed to be made to match, see if either one of the two
1245 can serve as the place to reload into.
1247 If one of them is acceptable, set reload_reg_rtx[i]
1250 if (in
!= 0 && out
!= 0 && in
!= out
&& reload_reg_rtx
[i
] == 0)
1252 reload_reg_rtx
[i
] = find_dummy_reload (in
, out
, inloc
, outloc
,
1254 reload_reg_class
[i
], i
);
1256 /* If the outgoing register already contains the same value
1257 as the incoming one, we can dispense with loading it.
1258 The easiest way to tell the caller that is to give a phony
1259 value for the incoming operand (same as outgoing one). */
1260 if (reload_reg_rtx
[i
] == out
1261 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1262 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1263 static_reload_reg_p
, i
, inmode
))
1267 /* If this is an input reload and the operand contains a register that
1268 dies in this insn and is used nowhere else, see if it is the right class
1269 to be used for this reload. Use it if so. (This occurs most commonly
1270 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1271 this if it is also an output reload that mentions the register unless
1272 the output is a SUBREG that clobbers an entire register.
1274 Note that the operand might be one of the spill regs, if it is a
1275 pseudo reg and we are in a block where spilling has not taken place.
1276 But if there is no spilling in this block, that is OK.
1277 An explicitly used hard reg cannot be a spill reg. */
1279 if (reload_reg_rtx
[i
] == 0 && in
!= 0)
1284 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1285 if (REG_NOTE_KIND (note
) == REG_DEAD
1286 && GET_CODE (XEXP (note
, 0)) == REG
1287 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1288 && reg_mentioned_p (XEXP (note
, 0), in
)
1289 && ! refers_to_regno_for_reload_p (regno
,
1291 + HARD_REGNO_NREGS (regno
,
1293 PATTERN (this_insn
), inloc
)
1294 /* If this is also an output reload, IN cannot be used as
1295 the reload register if it is set in this insn unless IN
1297 && (out
== 0 || in
== out
1298 || ! hard_reg_set_here_p (regno
,
1300 + HARD_REGNO_NREGS (regno
,
1302 PATTERN (this_insn
)))
1303 /* ??? Why is this code so different from the previous?
1304 Is there any simple coherent way to describe the two together?
1305 What's going on here. */
1307 || (GET_CODE (in
) == SUBREG
1308 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1310 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1311 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1312 /* Make sure the operand fits in the reg that dies. */
1313 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1314 && HARD_REGNO_MODE_OK (regno
, inmode
)
1315 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1316 && HARD_REGNO_MODE_OK (regno
, outmode
)
1317 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], regno
)
1318 && !fixed_regs
[regno
])
1320 reload_reg_rtx
[i
] = gen_rtx (REG
, inmode
, regno
);
1326 output_reloadnum
= i
;
1331 /* Record an additional place we must replace a value
1332 for which we have already recorded a reload.
1333 RELOADNUM is the value returned by push_reload
1334 when the reload was recorded.
1335 This is used in insn patterns that use match_dup. */
1338 push_replacement (loc
, reloadnum
, mode
)
1341 enum machine_mode mode
;
1343 if (replace_reloads
)
1345 register struct replacement
*r
= &replacements
[n_replacements
++];
1346 r
->what
= reloadnum
;
1353 /* Transfer all replacements that used to be in reload FROM to be in
1357 transfer_replacements (to
, from
)
1362 for (i
= 0; i
< n_replacements
; i
++)
1363 if (replacements
[i
].what
== from
)
1364 replacements
[i
].what
= to
;
1367 /* If there is only one output reload, and it is not for an earlyclobber
1368 operand, try to combine it with a (logically unrelated) input reload
1369 to reduce the number of reload registers needed.
1371 This is safe if the input reload does not appear in
1372 the value being output-reloaded, because this implies
1373 it is not needed any more once the original insn completes.
1375 If that doesn't work, see we can use any of the registers that
1376 die in this insn as a reload register. We can if it is of the right
1377 class and does not appear in the value being output-reloaded. */
1383 int output_reload
= -1;
1386 /* Find the output reload; return unless there is exactly one
1387 and that one is mandatory. */
1389 for (i
= 0; i
< n_reloads
; i
++)
1390 if (reload_out
[i
] != 0)
1392 if (output_reload
>= 0)
1397 if (output_reload
< 0 || reload_optional
[output_reload
])
1400 /* An input-output reload isn't combinable. */
1402 if (reload_in
[output_reload
] != 0)
1405 /* If this reload is for an earlyclobber operand, we can't do anything. */
1406 if (earlyclobber_operand_p (reload_out
[output_reload
]))
1409 /* Check each input reload; can we combine it? */
1411 for (i
= 0; i
< n_reloads
; i
++)
1412 if (reload_in
[i
] && ! reload_optional
[i
] && ! reload_nocombine
[i
]
1413 /* Life span of this reload must not extend past main insn. */
1414 && reload_when_needed
[i
] != RELOAD_FOR_OUTPUT_ADDRESS
1415 && reload_when_needed
[i
] != RELOAD_OTHER
1416 && (CLASS_MAX_NREGS (reload_reg_class
[i
], reload_inmode
[i
])
1417 == CLASS_MAX_NREGS (reload_reg_class
[output_reload
],
1418 reload_outmode
[output_reload
]))
1419 && reload_inc
[i
] == 0
1420 && reload_reg_rtx
[i
] == 0
1421 #ifdef SECONDARY_MEMORY_NEEDED
1422 /* Don't combine two reloads with different secondary
1423 memory locations. */
1424 && (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]] == 0
1425 || secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] == 0
1426 || rtx_equal_p (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]],
1427 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]]))
1429 #ifdef SMALL_REGISTER_CLASSES
1430 && reload_reg_class
[i
] == reload_reg_class
[output_reload
]
1432 && (reg_class_subset_p (reload_reg_class
[i
],
1433 reload_reg_class
[output_reload
])
1434 || reg_class_subset_p (reload_reg_class
[output_reload
],
1435 reload_reg_class
[i
]))
1437 && (MATCHES (reload_in
[i
], reload_out
[output_reload
])
1438 /* Args reversed because the first arg seems to be
1439 the one that we imagine being modified
1440 while the second is the one that might be affected. */
1441 || (! reg_overlap_mentioned_for_reload_p (reload_out
[output_reload
],
1443 /* However, if the input is a register that appears inside
1444 the output, then we also can't share.
1445 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1446 If the same reload reg is used for both reg 69 and the
1447 result to be stored in memory, then that result
1448 will clobber the address of the memory ref. */
1449 && ! (GET_CODE (reload_in
[i
]) == REG
1450 && reg_overlap_mentioned_for_reload_p (reload_in
[i
],
1451 reload_out
[output_reload
]))))
1452 && (reg_class_size
[(int) reload_reg_class
[i
]]
1453 #ifdef SMALL_REGISTER_CLASSES
1457 /* We will allow making things slightly worse by combining an
1458 input and an output, but no worse than that. */
1459 && (reload_when_needed
[i
] == RELOAD_FOR_INPUT
1460 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT
))
1464 /* We have found a reload to combine with! */
1465 reload_out
[i
] = reload_out
[output_reload
];
1466 reload_outmode
[i
] = reload_outmode
[output_reload
];
1467 /* Mark the old output reload as inoperative. */
1468 reload_out
[output_reload
] = 0;
1469 /* The combined reload is needed for the entire insn. */
1470 reload_when_needed
[i
] = RELOAD_OTHER
;
1471 /* If the output reload had a secondary reload, copy it. */
1472 if (reload_secondary_out_reload
[output_reload
] != -1)
1474 reload_secondary_out_reload
[i
]
1475 = reload_secondary_out_reload
[output_reload
];
1476 reload_secondary_out_icode
[i
]
1477 = reload_secondary_out_icode
[output_reload
];
1480 #ifdef SECONDARY_MEMORY_NEEDED
1481 /* Copy any secondary MEM. */
1482 if (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] != 0)
1483 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]]
1484 = secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]];
1486 /* If required, minimize the register class. */
1487 if (reg_class_subset_p (reload_reg_class
[output_reload
],
1488 reload_reg_class
[i
]))
1489 reload_reg_class
[i
] = reload_reg_class
[output_reload
];
1491 /* Transfer all replacements from the old reload to the combined. */
1492 for (j
= 0; j
< n_replacements
; j
++)
1493 if (replacements
[j
].what
== output_reload
)
1494 replacements
[j
].what
= i
;
1499 /* If this insn has only one operand that is modified or written (assumed
1500 to be the first), it must be the one corresponding to this reload. It
1501 is safe to use anything that dies in this insn for that output provided
1502 that it does not occur in the output (we already know it isn't an
1503 earlyclobber. If this is an asm insn, give up. */
1505 if (INSN_CODE (this_insn
) == -1)
1508 for (i
= 1; i
< insn_n_operands
[INSN_CODE (this_insn
)]; i
++)
1509 if (insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '='
1510 || insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '+')
1513 /* See if some hard register that dies in this insn and is not used in
1514 the output is the right class. Only works if the register we pick
1515 up can fully hold our output reload. */
1516 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1517 if (REG_NOTE_KIND (note
) == REG_DEAD
1518 && GET_CODE (XEXP (note
, 0)) == REG
1519 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1520 reload_out
[output_reload
])
1521 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1522 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1523 && TEST_HARD_REG_BIT (reg_class_contents
[(int) reload_reg_class
[output_reload
]],
1524 REGNO (XEXP (note
, 0)))
1525 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1526 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1527 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1529 reload_reg_rtx
[output_reload
] = gen_rtx (REG
,
1530 reload_outmode
[output_reload
],
1531 REGNO (XEXP (note
, 0)));
1536 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1537 See if one of IN and OUT is a register that may be used;
1538 this is desirable since a spill-register won't be needed.
1539 If so, return the register rtx that proves acceptable.
1541 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1542 CLASS is the register class required for the reload.
1544 If FOR_REAL is >= 0, it is the number of the reload,
1545 and in some cases when it can be discovered that OUT doesn't need
1546 to be computed, clear out reload_out[FOR_REAL].
1548 If FOR_REAL is -1, this should not be done, because this call
1549 is just to see if a register can be found, not to find and install it. */
1552 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1553 inmode
, outmode
, class, for_real
)
1554 rtx real_in
, real_out
;
1555 rtx
*inloc
, *outloc
;
1556 enum machine_mode inmode
, outmode
;
1557 enum reg_class
class;
1566 /* If operands exceed a word, we can't use either of them
1567 unless they have the same size. */
1568 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1569 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1570 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1573 /* Find the inside of any subregs. */
1574 while (GET_CODE (out
) == SUBREG
)
1576 out_offset
= SUBREG_WORD (out
);
1577 out
= SUBREG_REG (out
);
1579 while (GET_CODE (in
) == SUBREG
)
1581 in_offset
= SUBREG_WORD (in
);
1582 in
= SUBREG_REG (in
);
1585 /* Narrow down the reg class, the same way push_reload will;
1586 otherwise we might find a dummy now, but push_reload won't. */
1587 class = PREFERRED_RELOAD_CLASS (in
, class);
1589 /* See if OUT will do. */
1590 if (GET_CODE (out
) == REG
1591 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1593 register int regno
= REGNO (out
) + out_offset
;
1594 int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1597 /* When we consider whether the insn uses OUT,
1598 ignore references within IN. They don't prevent us
1599 from copying IN into OUT, because those refs would
1600 move into the insn that reloads IN.
1602 However, we only ignore IN in its role as this reload.
1603 If the insn uses IN elsewhere and it contains OUT,
1604 that counts. We can't be sure it's the "same" operand
1605 so it might not go through this reload. */
1607 *inloc
= const0_rtx
;
1609 if (regno
< FIRST_PSEUDO_REGISTER
1610 /* A fixed reg that can overlap other regs better not be used
1611 for reloading in any way. */
1612 #ifdef OVERLAPPING_REGNO_P
1613 && ! (fixed_regs
[regno
] && OVERLAPPING_REGNO_P (regno
))
1615 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1616 PATTERN (this_insn
), outloc
))
1619 for (i
= 0; i
< nwords
; i
++)
1620 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1626 if (GET_CODE (real_out
) == REG
)
1629 value
= gen_rtx (REG
, outmode
, regno
);
1636 /* Consider using IN if OUT was not acceptable
1637 or if OUT dies in this insn (like the quotient in a divmod insn).
1638 We can't use IN unless it is dies in this insn,
1639 which means we must know accurately which hard regs are live.
1640 Also, the result can't go in IN if IN is used within OUT. */
1641 if (hard_regs_live_known
1642 && GET_CODE (in
) == REG
1643 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1645 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1646 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1647 && !fixed_regs
[REGNO (in
)]
1648 && HARD_REGNO_MODE_OK (REGNO (in
),
1649 /* The only case where out and real_out might
1650 have different modes is where real_out
1651 is a subreg, and in that case, out
1653 (GET_MODE (out
) != VOIDmode
1654 ? GET_MODE (out
) : outmode
)))
1656 register int regno
= REGNO (in
) + in_offset
;
1657 int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1659 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1660 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1661 PATTERN (this_insn
)))
1664 for (i
= 0; i
< nwords
; i
++)
1665 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1671 /* If we were going to use OUT as the reload reg
1672 and changed our mind, it means OUT is a dummy that
1673 dies here. So don't bother copying value to it. */
1674 if (for_real
>= 0 && value
== real_out
)
1675 reload_out
[for_real
] = 0;
1676 if (GET_CODE (real_in
) == REG
)
1679 value
= gen_rtx (REG
, inmode
, regno
);
1687 /* This page contains subroutines used mainly for determining
1688 whether the IN or an OUT of a reload can serve as the
1691 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1694 earlyclobber_operand_p (x
)
1699 for (i
= 0; i
< n_earlyclobbers
; i
++)
1700 if (reload_earlyclobbers
[i
] == x
)
1706 /* Return 1 if expression X alters a hard reg in the range
1707 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1708 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1709 X should be the body of an instruction. */
1712 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1713 register int beg_regno
, end_regno
;
1716 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1718 register rtx op0
= SET_DEST (x
);
1719 while (GET_CODE (op0
) == SUBREG
)
1720 op0
= SUBREG_REG (op0
);
1721 if (GET_CODE (op0
) == REG
)
1723 register int r
= REGNO (op0
);
1724 /* See if this reg overlaps range under consideration. */
1726 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1730 else if (GET_CODE (x
) == PARALLEL
)
1732 register int i
= XVECLEN (x
, 0) - 1;
1734 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1741 /* Return 1 if ADDR is a valid memory address for mode MODE,
1742 and check that each pseudo reg has the proper kind of
1746 strict_memory_address_p (mode
, addr
)
1747 enum machine_mode mode
;
1750 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1757 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1758 if they are the same hard reg, and has special hacks for
1759 autoincrement and autodecrement.
1760 This is specifically intended for find_reloads to use
1761 in determining whether two operands match.
1762 X is the operand whose number is the lower of the two.
1764 The value is 2 if Y contains a pre-increment that matches
1765 a non-incrementing address in X. */
1767 /* ??? To be completely correct, we should arrange to pass
1768 for X the output operand and for Y the input operand.
1769 For now, we assume that the output operand has the lower number
1770 because that is natural in (SET output (... input ...)). */
1773 operands_match_p (x
, y
)
1777 register RTX_CODE code
= GET_CODE (x
);
1783 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
1784 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
1785 && GET_CODE (SUBREG_REG (y
)) == REG
)))
1791 i
= REGNO (SUBREG_REG (x
));
1792 if (i
>= FIRST_PSEUDO_REGISTER
)
1794 i
+= SUBREG_WORD (x
);
1799 if (GET_CODE (y
) == SUBREG
)
1801 j
= REGNO (SUBREG_REG (y
));
1802 if (j
>= FIRST_PSEUDO_REGISTER
)
1804 j
+= SUBREG_WORD (y
);
1809 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1810 multiple hard register group, so that for example (reg:DI 0) and
1811 (reg:SI 1) will be considered the same register. */
1812 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
1813 && i
< FIRST_PSEUDO_REGISTER
)
1814 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
1815 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
1816 && j
< FIRST_PSEUDO_REGISTER
)
1817 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
1821 /* If two operands must match, because they are really a single
1822 operand of an assembler insn, then two postincrements are invalid
1823 because the assembler insn would increment only once.
1824 On the other hand, an postincrement matches ordinary indexing
1825 if the postincrement is the output operand. */
1826 if (code
== POST_DEC
|| code
== POST_INC
)
1827 return operands_match_p (XEXP (x
, 0), y
);
1828 /* Two preincrements are invalid
1829 because the assembler insn would increment only once.
1830 On the other hand, an preincrement matches ordinary indexing
1831 if the preincrement is the input operand.
1832 In this case, return 2, since some callers need to do special
1833 things when this happens. */
1834 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
)
1835 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
1839 /* Now we have disposed of all the cases
1840 in which different rtx codes can match. */
1841 if (code
!= GET_CODE (y
))
1843 if (code
== LABEL_REF
)
1844 return XEXP (x
, 0) == XEXP (y
, 0);
1845 if (code
== SYMBOL_REF
)
1846 return XSTR (x
, 0) == XSTR (y
, 0);
1848 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1850 if (GET_MODE (x
) != GET_MODE (y
))
1853 /* Compare the elements. If any pair of corresponding elements
1854 fail to match, return 0 for the whole things. */
1857 fmt
= GET_RTX_FORMAT (code
);
1858 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1864 if (XWINT (x
, i
) != XWINT (y
, i
))
1869 if (XINT (x
, i
) != XINT (y
, i
))
1874 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
1877 /* If any subexpression returns 2,
1878 we should return 2 if we are successful. */
1886 /* It is believed that rtx's at this level will never
1887 contain anything but integers and other rtx's,
1888 except for within LABEL_REFs and SYMBOL_REFs. */
1893 return 1 + success_2
;
1896 /* Return the number of times character C occurs in string S. */
1899 n_occurrences (c
, s
)
1909 /* Describe the range of registers or memory referenced by X.
1910 If X is a register, set REG_FLAG and put the first register
1911 number into START and the last plus one into END.
1912 If X is a memory reference, put a base address into BASE
1913 and a range of integer offsets into START and END.
1914 If X is pushing on the stack, we can assume it causes no trouble,
1915 so we set the SAFE field. */
1917 static struct decomposition
1921 struct decomposition val
;
1926 if (GET_CODE (x
) == MEM
)
1928 rtx base
, offset
= 0;
1929 rtx addr
= XEXP (x
, 0);
1931 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
1932 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
1934 val
.base
= XEXP (addr
, 0);
1935 val
.start
= - GET_MODE_SIZE (GET_MODE (x
));
1936 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
1937 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
1941 if (GET_CODE (addr
) == CONST
)
1943 addr
= XEXP (addr
, 0);
1946 if (GET_CODE (addr
) == PLUS
)
1948 if (CONSTANT_P (XEXP (addr
, 0)))
1950 base
= XEXP (addr
, 1);
1951 offset
= XEXP (addr
, 0);
1953 else if (CONSTANT_P (XEXP (addr
, 1)))
1955 base
= XEXP (addr
, 0);
1956 offset
= XEXP (addr
, 1);
1963 offset
= const0_rtx
;
1965 if (GET_CODE (offset
) == CONST
)
1966 offset
= XEXP (offset
, 0);
1967 if (GET_CODE (offset
) == PLUS
)
1969 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
1971 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 1));
1972 offset
= XEXP (offset
, 0);
1974 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
1976 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 0));
1977 offset
= XEXP (offset
, 1);
1981 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
1982 offset
= const0_rtx
;
1985 else if (GET_CODE (offset
) != CONST_INT
)
1987 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
1988 offset
= const0_rtx
;
1991 if (all_const
&& GET_CODE (base
) == PLUS
)
1992 base
= gen_rtx (CONST
, GET_MODE (base
), base
);
1994 if (GET_CODE (offset
) != CONST_INT
)
1997 val
.start
= INTVAL (offset
);
1998 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2002 else if (GET_CODE (x
) == REG
)
2005 val
.start
= true_regnum (x
);
2008 /* A pseudo with no hard reg. */
2009 val
.start
= REGNO (x
);
2010 val
.end
= val
.start
+ 1;
2014 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2016 else if (GET_CODE (x
) == SUBREG
)
2018 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2019 /* This could be more precise, but it's good enough. */
2020 return decompose (SUBREG_REG (x
));
2022 val
.start
= true_regnum (x
);
2024 return decompose (SUBREG_REG (x
));
2027 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2029 else if (CONSTANT_P (x
)
2030 /* This hasn't been assigned yet, so it can't conflict yet. */
2031 || GET_CODE (x
) == SCRATCH
)
2038 /* Return 1 if altering Y will not modify the value of X.
2039 Y is also described by YDATA, which should be decompose (Y). */
2042 immune_p (x
, y
, ydata
)
2044 struct decomposition ydata
;
2046 struct decomposition xdata
;
2049 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
2053 if (GET_CODE (y
) != MEM
)
2055 /* If Y is memory and X is not, Y can't affect X. */
2056 if (GET_CODE (x
) != MEM
)
2059 xdata
= decompose (x
);
2061 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2063 /* If bases are distinct symbolic constants, there is no overlap. */
2064 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2066 /* Constants and stack slots never overlap. */
2067 if (CONSTANT_P (xdata
.base
)
2068 && (ydata
.base
== frame_pointer_rtx
2069 || ydata
.base
== hard_frame_pointer_rtx
2070 || ydata
.base
== stack_pointer_rtx
))
2072 if (CONSTANT_P (ydata
.base
)
2073 && (xdata
.base
== frame_pointer_rtx
2074 || xdata
.base
== hard_frame_pointer_rtx
2075 || xdata
.base
== stack_pointer_rtx
))
2077 /* If either base is variable, we don't know anything. */
2082 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2085 /* Similar, but calls decompose. */
2088 safe_from_earlyclobber (op
, clobber
)
2091 struct decomposition early_data
;
2093 early_data
= decompose (clobber
);
2094 return immune_p (op
, clobber
, early_data
);
2097 /* Main entry point of this file: search the body of INSN
2098 for values that need reloading and record them with push_reload.
2099 REPLACE nonzero means record also where the values occur
2100 so that subst_reloads can be used.
2102 IND_LEVELS says how many levels of indirection are supported by this
2103 machine; a value of zero means that a memory reference is not a valid
2106 LIVE_KNOWN says we have valid information about which hard
2107 regs are live at each point in the program; this is true when
2108 we are called from global_alloc but false when stupid register
2109 allocation has been done.
2111 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2112 which is nonnegative if the reg has been commandeered for reloading into.
2113 It is copied into STATIC_RELOAD_REG_P and referenced from there
2114 by various subroutines. */
2117 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2119 int replace
, ind_levels
;
2121 short *reload_reg_p
;
2123 #ifdef REGISTER_CONSTRAINTS
2125 register int insn_code_number
;
2128 /* These are the constraints for the insn. We don't change them. */
2129 char *constraints1
[MAX_RECOG_OPERANDS
];
2130 /* These start out as the constraints for the insn
2131 and they are chewed up as we consider alternatives. */
2132 char *constraints
[MAX_RECOG_OPERANDS
];
2133 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2135 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2136 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2137 /* Nonzero for a MEM operand whose entire address needs a reload. */
2138 int address_reloaded
[MAX_RECOG_OPERANDS
];
2139 /* Value of enum reload_type to use for operand. */
2140 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2141 /* Value of enum reload_type to use within address of operand. */
2142 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2143 /* Save the usage of each operand. */
2144 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2145 int no_input_reloads
= 0, no_output_reloads
= 0;
2147 int this_alternative
[MAX_RECOG_OPERANDS
];
2148 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2149 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2150 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2151 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2153 int goal_alternative
[MAX_RECOG_OPERANDS
];
2154 int this_alternative_number
;
2155 int goal_alternative_number
;
2156 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2157 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2158 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2159 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2160 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2161 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2162 int goal_alternative_swapped
;
2165 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2166 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2167 rtx body
= PATTERN (insn
);
2168 rtx set
= single_set (insn
);
2169 int goal_earlyclobber
, this_earlyclobber
;
2170 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2173 this_insn_is_asm
= 0; /* Tentative. */
2177 n_earlyclobbers
= 0;
2178 replace_reloads
= replace
;
2179 hard_regs_live_known
= live_known
;
2180 static_reload_reg_p
= reload_reg_p
;
2182 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2183 neither are insns that SET cc0. Insns that use CC0 are not allowed
2184 to have any input reloads. */
2185 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2186 no_output_reloads
= 1;
2189 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2190 no_input_reloads
= 1;
2191 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2192 no_output_reloads
= 1;
2195 #ifdef SECONDARY_MEMORY_NEEDED
2196 /* The eliminated forms of any secondary memory locations are per-insn, so
2197 clear them out here. */
2199 bzero ((char *) secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2202 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2203 Make OPERANDS point to a vector of operand values.
2204 Make OPERAND_LOCS point to a vector of pointers to
2205 where the operands were found.
2206 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2207 constraint-strings for this insn.
2208 Return if the insn needs no reload processing. */
2210 switch (GET_CODE (body
))
2220 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2221 is cheap to move between them. If it is not, there may not be an insn
2222 to do the copy, so we may need a reload. */
2223 if (GET_CODE (SET_DEST (body
)) == REG
2224 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2225 && GET_CODE (SET_SRC (body
)) == REG
2226 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2227 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2228 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2232 reload_n_operands
= noperands
= asm_noperands (body
);
2235 /* This insn is an `asm' with operands. */
2237 insn_code_number
= -1;
2238 this_insn_is_asm
= 1;
2240 /* expand_asm_operands makes sure there aren't too many operands. */
2241 if (noperands
> MAX_RECOG_OPERANDS
)
2244 /* Now get the operand values and constraints out of the insn. */
2246 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
2247 constraints
, operand_mode
);
2250 bcopy ((char *) constraints
, (char *) constraints1
,
2251 noperands
* sizeof (char *));
2252 n_alternatives
= n_occurrences (',', constraints
[0]) + 1;
2253 for (i
= 1; i
< noperands
; i
++)
2254 if (n_alternatives
!= n_occurrences (',', constraints
[i
]) + 1)
2256 error_for_asm (insn
, "operand constraints differ in number of alternatives");
2257 /* Avoid further trouble with this insn. */
2258 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
2267 /* Ordinary insn: recognize it, get the operands via insn_extract
2268 and get the constraints. */
2270 insn_code_number
= recog_memoized (insn
);
2271 if (insn_code_number
< 0)
2272 fatal_insn_not_found (insn
);
2274 reload_n_operands
= noperands
= insn_n_operands
[insn_code_number
];
2275 n_alternatives
= insn_n_alternatives
[insn_code_number
];
2276 /* Just return "no reloads" if insn has no operands with constraints. */
2277 if (n_alternatives
== 0)
2279 insn_extract (insn
);
2280 for (i
= 0; i
< noperands
; i
++)
2282 constraints
[i
] = constraints1
[i
]
2283 = insn_operand_constraint
[insn_code_number
][i
];
2284 operand_mode
[i
] = insn_operand_mode
[insn_code_number
][i
];
2293 /* If we will need to know, later, whether some pair of operands
2294 are the same, we must compare them now and save the result.
2295 Reloading the base and index registers will clobber them
2296 and afterward they will fail to match. */
2298 for (i
= 0; i
< noperands
; i
++)
2303 substed_operand
[i
] = recog_operand
[i
];
2306 modified
[i
] = RELOAD_READ
;
2308 /* Scan this operand's constraint to see if it is an output operand,
2309 an in-out operand, is commutative, or should match another. */
2314 modified
[i
] = RELOAD_WRITE
;
2316 modified
[i
] = RELOAD_READ_WRITE
;
2319 /* The last operand should not be marked commutative. */
2320 if (i
== noperands
- 1)
2322 if (this_insn_is_asm
)
2323 warning_for_asm (this_insn
,
2324 "`%%' constraint used with last operand");
2331 else if (c
>= '0' && c
<= '9')
2334 operands_match
[c
][i
]
2335 = operands_match_p (recog_operand
[c
], recog_operand
[i
]);
2337 /* An operand may not match itself. */
2340 if (this_insn_is_asm
)
2341 warning_for_asm (this_insn
,
2342 "operand %d has constraint %d", i
, c
);
2347 /* If C can be commuted with C+1, and C might need to match I,
2348 then C+1 might also need to match I. */
2349 if (commutative
>= 0)
2351 if (c
== commutative
|| c
== commutative
+ 1)
2353 int other
= c
+ (c
== commutative
? 1 : -1);
2354 operands_match
[other
][i
]
2355 = operands_match_p (recog_operand
[other
], recog_operand
[i
]);
2357 if (i
== commutative
|| i
== commutative
+ 1)
2359 int other
= i
+ (i
== commutative
? 1 : -1);
2360 operands_match
[c
][other
]
2361 = operands_match_p (recog_operand
[c
], recog_operand
[other
]);
2363 /* Note that C is supposed to be less than I.
2364 No need to consider altering both C and I because in
2365 that case we would alter one into the other. */
2371 /* Examine each operand that is a memory reference or memory address
2372 and reload parts of the addresses into index registers.
2373 Also here any references to pseudo regs that didn't get hard regs
2374 but are equivalent to constants get replaced in the insn itself
2375 with those constants. Nobody will ever see them again.
2377 Finally, set up the preferred classes of each operand. */
2379 for (i
= 0; i
< noperands
; i
++)
2381 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
2383 address_reloaded
[i
] = 0;
2384 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2385 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2388 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2389 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2392 if (*constraints
[i
] == 0)
2393 /* Ignore things like match_operator operands. */
2395 else if (constraints
[i
][0] == 'p')
2397 find_reloads_address (VOIDmode
, NULL_PTR
,
2398 recog_operand
[i
], recog_operand_loc
[i
],
2399 i
, operand_type
[i
], ind_levels
);
2400 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2402 else if (code
== MEM
)
2404 if (find_reloads_address (GET_MODE (recog_operand
[i
]),
2405 recog_operand_loc
[i
],
2406 XEXP (recog_operand
[i
], 0),
2407 &XEXP (recog_operand
[i
], 0),
2408 i
, address_type
[i
], ind_levels
))
2409 address_reloaded
[i
] = 1;
2410 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2412 else if (code
== SUBREG
)
2413 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2414 = find_reloads_toplev (recog_operand
[i
], i
, address_type
[i
],
2417 && &SET_DEST (set
) == recog_operand_loc
[i
]);
2418 else if (code
== PLUS
)
2419 /* We can get a PLUS as an "operand" as a result of
2420 register elimination. See eliminate_regs and gen_input_reload. */
2421 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2422 = find_reloads_toplev (recog_operand
[i
], i
, address_type
[i
],
2424 else if (code
== REG
)
2426 /* This is equivalent to calling find_reloads_toplev.
2427 The code is duplicated for speed.
2428 When we find a pseudo always equivalent to a constant,
2429 we replace it by the constant. We must be sure, however,
2430 that we don't try to replace it in the insn in which it
2432 register int regno
= REGNO (recog_operand
[i
]);
2433 if (reg_equiv_constant
[regno
] != 0
2434 && (set
== 0 || &SET_DEST (set
) != recog_operand_loc
[i
]))
2435 substed_operand
[i
] = recog_operand
[i
]
2436 = reg_equiv_constant
[regno
];
2437 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2438 that feeds this insn. */
2439 if (reg_equiv_mem
[regno
] != 0)
2440 substed_operand
[i
] = recog_operand
[i
]
2441 = reg_equiv_mem
[regno
];
2443 if (reg_equiv_address
[regno
] != 0)
2445 /* If reg_equiv_address is not a constant address, copy it,
2446 since it may be shared. */
2447 rtx address
= reg_equiv_address
[regno
];
2449 if (rtx_varies_p (address
))
2450 address
= copy_rtx (address
);
2452 /* If this is an output operand, we must output a CLOBBER
2453 after INSN so find_equiv_reg knows REGNO is being written.
2454 Mark this insn specially, do we can put our output reloads
2457 if (modified
[i
] != RELOAD_READ
)
2458 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER
, VOIDmode
,
2463 *recog_operand_loc
[i
] = recog_operand
[i
]
2464 = gen_rtx (MEM
, GET_MODE (recog_operand
[i
]), address
);
2465 RTX_UNCHANGING_P (recog_operand
[i
])
2466 = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
2467 find_reloads_address (GET_MODE (recog_operand
[i
]),
2468 recog_operand_loc
[i
],
2469 XEXP (recog_operand
[i
], 0),
2470 &XEXP (recog_operand
[i
], 0),
2471 i
, address_type
[i
], ind_levels
);
2472 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2475 /* If the operand is still a register (we didn't replace it with an
2476 equivalent), get the preferred class to reload it into. */
2477 code
= GET_CODE (recog_operand
[i
]);
2479 = ((code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
)
2480 ? reg_preferred_class (REGNO (recog_operand
[i
])) : NO_REGS
);
2482 = (code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
2483 && reg_alternate_class (REGNO (recog_operand
[i
])) == NO_REGS
);
2486 /* If this is simply a copy from operand 1 to operand 0, merge the
2487 preferred classes for the operands. */
2488 if (set
!= 0 && noperands
>= 2 && recog_operand
[0] == SET_DEST (set
)
2489 && recog_operand
[1] == SET_SRC (set
))
2491 preferred_class
[0] = preferred_class
[1]
2492 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2493 pref_or_nothing
[0] |= pref_or_nothing
[1];
2494 pref_or_nothing
[1] |= pref_or_nothing
[0];
2497 /* Now see what we need for pseudo-regs that didn't get hard regs
2498 or got the wrong kind of hard reg. For this, we must consider
2499 all the operands together against the register constraints. */
2501 best
= MAX_RECOG_OPERANDS
+ 300;
2504 goal_alternative_swapped
= 0;
2507 /* The constraints are made of several alternatives.
2508 Each operand's constraint looks like foo,bar,... with commas
2509 separating the alternatives. The first alternatives for all
2510 operands go together, the second alternatives go together, etc.
2512 First loop over alternatives. */
2514 for (this_alternative_number
= 0;
2515 this_alternative_number
< n_alternatives
;
2516 this_alternative_number
++)
2518 /* Loop over operands for one constraint alternative. */
2519 /* LOSERS counts those that don't fit this alternative
2520 and would require loading. */
2522 /* BAD is set to 1 if it some operand can't fit this alternative
2523 even after reloading. */
2525 /* REJECT is a count of how undesirable this alternative says it is
2526 if any reloading is required. If the alternative matches exactly
2527 then REJECT is ignored, but otherwise it gets this much
2528 counted against it in addition to the reloading needed. Each
2529 ? counts three times here since we want the disparaging caused by
2530 a bad register class to only count 1/3 as much. */
2533 this_earlyclobber
= 0;
2535 for (i
= 0; i
< noperands
; i
++)
2537 register char *p
= constraints
[i
];
2538 register int win
= 0;
2539 /* 0 => this operand can be reloaded somehow for this alternative */
2541 /* 0 => this operand can be reloaded if the alternative allows regs. */
2544 register rtx operand
= recog_operand
[i
];
2546 /* Nonzero means this is a MEM that must be reloaded into a reg
2547 regardless of what the constraint says. */
2548 int force_reload
= 0;
2550 /* Nonzero if a constant forced into memory would be OK for this
2553 int earlyclobber
= 0;
2555 /* If the operand is a SUBREG, extract
2556 the REG or MEM (or maybe even a constant) within.
2557 (Constants can occur as a result of reg_equiv_constant.) */
2559 while (GET_CODE (operand
) == SUBREG
)
2561 offset
+= SUBREG_WORD (operand
);
2562 operand
= SUBREG_REG (operand
);
2563 /* Force reload if this is a constant or PLUS or if there may may
2564 be a problem accessing OPERAND in the outer mode. */
2565 if (CONSTANT_P (operand
)
2566 || GET_CODE (operand
) == PLUS
2567 /* We must force a reload of paradoxical SUBREGs
2568 of a MEM because the alignment of the inner value
2569 may not be enough to do the outer reference.
2571 On machines that extend byte operations and we have a
2572 SUBREG where both the inner and outer modes are no wider
2573 than a word and the inner mode is narrower, is integral,
2574 and gets extended when loaded from memory, combine.c has
2575 made assumptions about the behavior of the machine in such
2576 register access. If the data is, in fact, in memory we
2577 must always load using the size assumed to be in the
2578 register and let the insn do the different-sized
2580 || ((GET_CODE (operand
) == MEM
2581 || (GET_CODE (operand
)== REG
2582 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2583 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2584 < BIGGEST_ALIGNMENT
)
2585 && (GET_MODE_SIZE (operand_mode
[i
])
2586 > GET_MODE_SIZE (GET_MODE (operand
))))
2587 #ifdef LOAD_EXTEND_OP
2588 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2589 && (GET_MODE_SIZE (GET_MODE (operand
))
2591 && (GET_MODE_SIZE (operand_mode
[i
])
2592 > GET_MODE_SIZE (GET_MODE (operand
)))
2593 && INTEGRAL_MODE_P (GET_MODE (operand
))
2594 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2597 /* Subreg of a hard reg which can't handle the subreg's mode
2598 or which would handle that mode in the wrong number of
2599 registers for subregging to work. */
2600 || (GET_CODE (operand
) == REG
2601 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2602 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2603 && (GET_MODE_SIZE (GET_MODE (operand
))
2605 && ((GET_MODE_SIZE (GET_MODE (operand
))
2607 != HARD_REGNO_NREGS (REGNO (operand
),
2608 GET_MODE (operand
))))
2609 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2614 this_alternative
[i
] = (int) NO_REGS
;
2615 this_alternative_win
[i
] = 0;
2616 this_alternative_offmemok
[i
] = 0;
2617 this_alternative_earlyclobber
[i
] = 0;
2618 this_alternative_matches
[i
] = -1;
2620 /* An empty constraint or empty alternative
2621 allows anything which matched the pattern. */
2622 if (*p
== 0 || *p
== ',')
2625 /* Scan this alternative's specs for this operand;
2626 set WIN if the operand fits any letter in this alternative.
2627 Otherwise, clear BADOP if this operand could
2628 fit some letter after reloads,
2629 or set WINREG if this operand could fit after reloads
2630 provided the constraint allows some registers. */
2632 while (*p
&& (c
= *p
++) != ',')
2641 /* The last operand should not be marked commutative. */
2642 if (i
!= noperands
- 1)
2655 /* Ignore rest of this alternative as far as
2656 reloading is concerned. */
2657 while (*p
&& *p
!= ',') p
++;
2666 this_alternative_matches
[i
] = c
;
2667 /* We are supposed to match a previous operand.
2668 If we do, we win if that one did.
2669 If we do not, count both of the operands as losers.
2670 (This is too conservative, since most of the time
2671 only a single reload insn will be needed to make
2672 the two operands win. As a result, this alternative
2673 may be rejected when it is actually desirable.) */
2674 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2675 /* If we are matching as if two operands were swapped,
2676 also pretend that operands_match had been computed
2678 But if I is the second of those and C is the first,
2679 don't exchange them, because operands_match is valid
2680 only on one side of its diagonal. */
2682 [(c
== commutative
|| c
== commutative
+ 1)
2683 ? 2*commutative
+ 1 - c
: c
]
2684 [(i
== commutative
|| i
== commutative
+ 1)
2685 ? 2*commutative
+ 1 - i
: i
])
2686 : operands_match
[c
][i
])
2687 win
= this_alternative_win
[c
];
2690 /* Operands don't match. */
2692 /* Retroactively mark the operand we had to match
2693 as a loser, if it wasn't already. */
2694 if (this_alternative_win
[c
])
2696 this_alternative_win
[c
] = 0;
2697 if (this_alternative
[c
] == (int) NO_REGS
)
2699 /* But count the pair only once in the total badness of
2700 this alternative, if the pair can be a dummy reload. */
2702 = find_dummy_reload (recog_operand
[i
], recog_operand
[c
],
2703 recog_operand_loc
[i
], recog_operand_loc
[c
],
2704 operand_mode
[i
], operand_mode
[c
],
2705 this_alternative
[c
], -1);
2710 /* This can be fixed with reloads if the operand
2711 we are supposed to match can be fixed with reloads. */
2713 this_alternative
[i
] = this_alternative
[c
];
2715 /* If we have to reload this operand and some previous
2716 operand also had to match the same thing as this
2717 operand, we don't know how to do that. So reject this
2719 if (! win
|| force_reload
)
2720 for (j
= 0; j
< i
; j
++)
2721 if (this_alternative_matches
[j
]
2722 == this_alternative_matches
[i
])
2728 /* All necessary reloads for an address_operand
2729 were handled in find_reloads_address. */
2730 this_alternative
[i
] = (int) ALL_REGS
;
2737 if (GET_CODE (operand
) == MEM
2738 || (GET_CODE (operand
) == REG
2739 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2740 && reg_renumber
[REGNO (operand
)] < 0))
2742 if (CONSTANT_P (operand
))
2748 if (GET_CODE (operand
) == MEM
2749 && ! address_reloaded
[i
]
2750 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2751 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2756 if (GET_CODE (operand
) == MEM
2757 && ! address_reloaded
[i
]
2758 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2759 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
2763 /* Memory operand whose address is not offsettable. */
2767 if (GET_CODE (operand
) == MEM
2768 && ! (ind_levels
? offsettable_memref_p (operand
)
2769 : offsettable_nonstrict_memref_p (operand
))
2770 /* Certain mem addresses will become offsettable
2771 after they themselves are reloaded. This is important;
2772 we don't want our own handling of unoffsettables
2773 to override the handling of reg_equiv_address. */
2774 && !(GET_CODE (XEXP (operand
, 0)) == REG
2776 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
2780 /* Memory operand whose address is offsettable. */
2784 if ((GET_CODE (operand
) == MEM
2785 /* If IND_LEVELS, find_reloads_address won't reload a
2786 pseudo that didn't get a hard reg, so we have to
2787 reject that case. */
2788 && (ind_levels
? offsettable_memref_p (operand
)
2789 : offsettable_nonstrict_memref_p (operand
)))
2790 /* Certain mem addresses will become offsettable
2791 after they themselves are reloaded. This is important;
2792 we don't want our own handling of unoffsettables
2793 to override the handling of reg_equiv_address. */
2794 || (GET_CODE (operand
) == MEM
2795 && GET_CODE (XEXP (operand
, 0)) == REG
2797 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0))
2798 || (GET_CODE (operand
) == REG
2799 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2800 && reg_renumber
[REGNO (operand
)] < 0
2801 /* If reg_equiv_address is nonzero, we will be
2802 loading it into a register; hence it will be
2803 offsettable, but we cannot say that reg_equiv_mem
2804 is offsettable without checking. */
2805 && ((reg_equiv_mem
[REGNO (operand
)] != 0
2806 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
2807 || (reg_equiv_address
[REGNO (operand
)] != 0))))
2809 if (CONSTANT_P (operand
) || GET_CODE (operand
) == MEM
)
2816 /* Output operand that is stored before the need for the
2817 input operands (and their index registers) is over. */
2818 earlyclobber
= 1, this_earlyclobber
= 1;
2822 /* Match any floating double constant, but only if
2823 we can examine the bits of it reliably. */
2824 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
2825 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
2826 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
2828 if (GET_CODE (operand
) == CONST_DOUBLE
)
2833 if (GET_CODE (operand
) == CONST_DOUBLE
)
2839 if (GET_CODE (operand
) == CONST_DOUBLE
2840 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
2845 if (GET_CODE (operand
) == CONST_INT
2846 || (GET_CODE (operand
) == CONST_DOUBLE
2847 && GET_MODE (operand
) == VOIDmode
))
2850 if (CONSTANT_P (operand
)
2851 #ifdef LEGITIMATE_PIC_OPERAND_P
2852 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
2859 if (GET_CODE (operand
) == CONST_INT
2860 || (GET_CODE (operand
) == CONST_DOUBLE
2861 && GET_MODE (operand
) == VOIDmode
))
2873 if (GET_CODE (operand
) == CONST_INT
2874 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
2884 /* A PLUS is never a valid operand, but reload can make
2885 it from a register when eliminating registers. */
2886 && GET_CODE (operand
) != PLUS
2887 /* A SCRATCH is not a valid operand. */
2888 && GET_CODE (operand
) != SCRATCH
2889 #ifdef LEGITIMATE_PIC_OPERAND_P
2890 && (! CONSTANT_P (operand
)
2892 || LEGITIMATE_PIC_OPERAND_P (operand
))
2894 && (GENERAL_REGS
== ALL_REGS
2895 || GET_CODE (operand
) != REG
2896 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2897 && reg_renumber
[REGNO (operand
)] < 0)))
2899 /* Drop through into 'r' case */
2903 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
2906 #ifdef EXTRA_CONSTRAINT
2912 if (EXTRA_CONSTRAINT (operand
, c
))
2919 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
2922 if (GET_MODE (operand
) == BLKmode
)
2925 if (GET_CODE (operand
) == REG
2926 && reg_fits_class_p (operand
, this_alternative
[i
],
2927 offset
, GET_MODE (recog_operand
[i
])))
2934 /* If this operand could be handled with a reg,
2935 and some reg is allowed, then this operand can be handled. */
2936 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
2939 /* Record which operands fit this alternative. */
2940 this_alternative_earlyclobber
[i
] = earlyclobber
;
2941 if (win
&& ! force_reload
)
2942 this_alternative_win
[i
] = 1;
2945 int const_to_mem
= 0;
2947 this_alternative_offmemok
[i
] = offmemok
;
2951 /* Alternative loses if it has no regs for a reg operand. */
2952 if (GET_CODE (operand
) == REG
2953 && this_alternative
[i
] == (int) NO_REGS
2954 && this_alternative_matches
[i
] < 0)
2957 /* Alternative loses if it requires a type of reload not
2958 permitted for this insn. We can always reload SCRATCH
2959 and objects with a REG_UNUSED note. */
2960 if (GET_CODE (operand
) != SCRATCH
2961 && modified
[i
] != RELOAD_READ
&& no_output_reloads
2962 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
2964 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
)
2967 /* If this is a constant that is reloaded into the desired
2968 class by copying it to memory first, count that as another
2969 reload. This is consistent with other code and is
2970 required to avoid chosing another alternative when
2971 the constant is moved into memory by this function on
2972 an early reload pass. Note that the test here is
2973 precisely the same as in the code below that calls
2975 if (CONSTANT_P (operand
)
2976 /* force_const_mem does not accept HIGH. */
2977 && GET_CODE (operand
) != HIGH
2978 && (PREFERRED_RELOAD_CLASS (operand
,
2979 (enum reg_class
) this_alternative
[i
])
2981 && operand_mode
[i
] != VOIDmode
)
2984 if (this_alternative
[i
] != (int) NO_REGS
)
2988 /* If we can't reload this value at all, reject this
2989 alternative. Note that we could also lose due to
2990 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
2993 if (! CONSTANT_P (operand
)
2994 && (enum reg_class
) this_alternative
[i
] != NO_REGS
2995 && (PREFERRED_RELOAD_CLASS (operand
,
2996 (enum reg_class
) this_alternative
[i
])
3000 /* We prefer to reload pseudos over reloading other things,
3001 since such reloads may be able to be eliminated later.
3002 If we are reloading a SCRATCH, we won't be generating any
3003 insns, just using a register, so it is also preferred.
3004 So bump REJECT in other cases. Don't do this in the
3005 case where we are forcing a constant into memory and
3006 it will then win since we don't want to have a different
3007 alternative match then. */
3008 if (! (GET_CODE (operand
) == REG
3009 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3010 && GET_CODE (operand
) != SCRATCH
3011 && ! (const_to_mem
&& constmemok
))
3015 /* If this operand is a pseudo register that didn't get a hard
3016 reg and this alternative accepts some register, see if the
3017 class that we want is a subset of the preferred class for this
3018 register. If not, but it intersects that class, use the
3019 preferred class instead. If it does not intersect the preferred
3020 class, show that usage of this alternative should be discouraged;
3021 it will be discouraged more still if the register is `preferred
3022 or nothing'. We do this because it increases the chance of
3023 reusing our spill register in a later insn and avoiding a pair
3024 of memory stores and loads.
3026 Don't bother with this if this alternative will accept this
3029 Don't do this for a multiword operand, since it is only a
3030 small win and has the risk of requiring more spill registers,
3031 which could cause a large loss.
3033 Don't do this if the preferred class has only one register
3034 because we might otherwise exhaust the class. */
3037 if (! win
&& this_alternative
[i
] != (int) NO_REGS
3038 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3039 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3041 if (! reg_class_subset_p (this_alternative
[i
],
3042 preferred_class
[i
]))
3044 /* Since we don't have a way of forming the intersection,
3045 we just do something special if the preferred class
3046 is a subset of the class we have; that's the most
3047 common case anyway. */
3048 if (reg_class_subset_p (preferred_class
[i
],
3049 this_alternative
[i
]))
3050 this_alternative
[i
] = (int) preferred_class
[i
];
3052 reject
+= (1 + pref_or_nothing
[i
]);
3057 /* Now see if any output operands that are marked "earlyclobber"
3058 in this alternative conflict with any input operands
3059 or any memory addresses. */
3061 for (i
= 0; i
< noperands
; i
++)
3062 if (this_alternative_earlyclobber
[i
]
3063 && this_alternative_win
[i
])
3065 struct decomposition early_data
;
3067 early_data
= decompose (recog_operand
[i
]);
3069 if (modified
[i
] == RELOAD_READ
)
3071 if (this_insn_is_asm
)
3072 warning_for_asm (this_insn
,
3073 "`&' constraint used with input operand");
3079 if (this_alternative
[i
] == NO_REGS
)
3081 this_alternative_earlyclobber
[i
] = 0;
3082 if (this_insn_is_asm
)
3083 error_for_asm (this_insn
,
3084 "`&' constraint used with no register class");
3089 for (j
= 0; j
< noperands
; j
++)
3090 /* Is this an input operand or a memory ref? */
3091 if ((GET_CODE (recog_operand
[j
]) == MEM
3092 || modified
[j
] != RELOAD_WRITE
)
3094 /* Ignore things like match_operator operands. */
3095 && *constraints1
[j
] != 0
3096 /* Don't count an input operand that is constrained to match
3097 the early clobber operand. */
3098 && ! (this_alternative_matches
[j
] == i
3099 && rtx_equal_p (recog_operand
[i
], recog_operand
[j
]))
3100 /* Is it altered by storing the earlyclobber operand? */
3101 && !immune_p (recog_operand
[j
], recog_operand
[i
], early_data
))
3103 /* If the output is in a single-reg class,
3104 it's costly to reload it, so reload the input instead. */
3105 if (reg_class_size
[this_alternative
[i
]] == 1
3106 && (GET_CODE (recog_operand
[j
]) == REG
3107 || GET_CODE (recog_operand
[j
]) == SUBREG
))
3110 this_alternative_win
[j
] = 0;
3115 /* If an earlyclobber operand conflicts with something,
3116 it must be reloaded, so request this and count the cost. */
3120 this_alternative_win
[i
] = 0;
3121 for (j
= 0; j
< noperands
; j
++)
3122 if (this_alternative_matches
[j
] == i
3123 && this_alternative_win
[j
])
3125 this_alternative_win
[j
] = 0;
3131 /* If one alternative accepts all the operands, no reload required,
3132 choose that alternative; don't consider the remaining ones. */
3135 /* Unswap these so that they are never swapped at `finish'. */
3136 if (commutative
>= 0)
3138 recog_operand
[commutative
] = substed_operand
[commutative
];
3139 recog_operand
[commutative
+ 1]
3140 = substed_operand
[commutative
+ 1];
3142 for (i
= 0; i
< noperands
; i
++)
3144 goal_alternative_win
[i
] = 1;
3145 goal_alternative
[i
] = this_alternative
[i
];
3146 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3147 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3148 goal_alternative_earlyclobber
[i
]
3149 = this_alternative_earlyclobber
[i
];
3151 goal_alternative_number
= this_alternative_number
;
3152 goal_alternative_swapped
= swapped
;
3153 goal_earlyclobber
= this_earlyclobber
;
3157 /* REJECT, set by the ! and ? constraint characters and when a register
3158 would be reloaded into a non-preferred class, discourages the use of
3159 this alternative for a reload goal. REJECT is incremented by three
3160 for each ? and one for each non-preferred class. */
3161 losers
= losers
* 3 + reject
;
3163 /* If this alternative can be made to work by reloading,
3164 and it needs less reloading than the others checked so far,
3165 record it as the chosen goal for reloading. */
3166 if (! bad
&& best
> losers
)
3168 for (i
= 0; i
< noperands
; i
++)
3170 goal_alternative
[i
] = this_alternative
[i
];
3171 goal_alternative_win
[i
] = this_alternative_win
[i
];
3172 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3173 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3174 goal_alternative_earlyclobber
[i
]
3175 = this_alternative_earlyclobber
[i
];
3177 goal_alternative_swapped
= swapped
;
3179 goal_alternative_number
= this_alternative_number
;
3180 goal_earlyclobber
= this_earlyclobber
;
3184 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3185 then we need to try each alternative twice,
3186 the second time matching those two operands
3187 as if we had exchanged them.
3188 To do this, really exchange them in operands.
3190 If we have just tried the alternatives the second time,
3191 return operands to normal and drop through. */
3193 if (commutative
>= 0)
3198 register enum reg_class tclass
;
3201 recog_operand
[commutative
] = substed_operand
[commutative
+ 1];
3202 recog_operand
[commutative
+ 1] = substed_operand
[commutative
];
3204 tclass
= preferred_class
[commutative
];
3205 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3206 preferred_class
[commutative
+ 1] = tclass
;
3208 t
= pref_or_nothing
[commutative
];
3209 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3210 pref_or_nothing
[commutative
+ 1] = t
;
3212 bcopy ((char *) constraints1
, (char *) constraints
,
3213 noperands
* sizeof (char *));
3218 recog_operand
[commutative
] = substed_operand
[commutative
];
3219 recog_operand
[commutative
+ 1] = substed_operand
[commutative
+ 1];
3223 /* The operands don't meet the constraints.
3224 goal_alternative describes the alternative
3225 that we could reach by reloading the fewest operands.
3226 Reload so as to fit it. */
3228 if (best
== MAX_RECOG_OPERANDS
+ 300)
3230 /* No alternative works with reloads?? */
3231 if (insn_code_number
>= 0)
3233 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3234 /* Avoid further trouble with this insn. */
3235 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3240 /* Jump to `finish' from above if all operands are valid already.
3241 In that case, goal_alternative_win is all 1. */
3244 /* Right now, for any pair of operands I and J that are required to match,
3246 goal_alternative_matches[J] is I.
3247 Set up goal_alternative_matched as the inverse function:
3248 goal_alternative_matched[I] = J. */
3250 for (i
= 0; i
< noperands
; i
++)
3251 goal_alternative_matched
[i
] = -1;
3253 for (i
= 0; i
< noperands
; i
++)
3254 if (! goal_alternative_win
[i
]
3255 && goal_alternative_matches
[i
] >= 0)
3256 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3258 /* If the best alternative is with operands 1 and 2 swapped,
3259 consider them swapped before reporting the reloads. Update the
3260 operand numbers of any reloads already pushed. */
3262 if (goal_alternative_swapped
)
3266 tem
= substed_operand
[commutative
];
3267 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3268 substed_operand
[commutative
+ 1] = tem
;
3269 tem
= recog_operand
[commutative
];
3270 recog_operand
[commutative
] = recog_operand
[commutative
+ 1];
3271 recog_operand
[commutative
+ 1] = tem
;
3273 for (i
= 0; i
< n_reloads
; i
++)
3275 if (reload_opnum
[i
] == commutative
)
3276 reload_opnum
[i
] = commutative
+ 1;
3277 else if (reload_opnum
[i
] == commutative
+ 1)
3278 reload_opnum
[i
] = commutative
;
3282 /* Perform whatever substitutions on the operands we are supposed
3283 to make due to commutativity or replacement of registers
3284 with equivalent constants or memory slots. */
3286 for (i
= 0; i
< noperands
; i
++)
3288 *recog_operand_loc
[i
] = substed_operand
[i
];
3289 /* While we are looping on operands, initialize this. */
3290 operand_reloadnum
[i
] = -1;
3292 /* If this is an earlyclobber operand, we need to widen the scope.
3293 The reload must remain valid from the start of the insn being
3294 reloaded until after the operand is stored into its destination.
3295 We approximate this with RELOAD_OTHER even though we know that we
3296 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3298 One special case that is worth checking is when we have an
3299 output that is earlyclobber but isn't used past the insn (typically
3300 a SCRATCH). In this case, we only need have the reload live
3301 through the insn itself, but not for any of our input or output
3304 In any case, anything needed to address this operand can remain
3305 however they were previously categorized. */
3307 if (goal_alternative_earlyclobber
[i
])
3309 = (find_reg_note (insn
, REG_UNUSED
, recog_operand
[i
])
3310 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3313 /* Any constants that aren't allowed and can't be reloaded
3314 into registers are here changed into memory references. */
3315 for (i
= 0; i
< noperands
; i
++)
3316 if (! goal_alternative_win
[i
]
3317 && CONSTANT_P (recog_operand
[i
])
3318 /* force_const_mem does not accept HIGH. */
3319 && GET_CODE (recog_operand
[i
]) != HIGH
3320 && (PREFERRED_RELOAD_CLASS (recog_operand
[i
],
3321 (enum reg_class
) goal_alternative
[i
])
3323 && operand_mode
[i
] != VOIDmode
)
3325 *recog_operand_loc
[i
] = recog_operand
[i
]
3326 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3328 i
, address_type
[i
], ind_levels
, 0);
3329 if (alternative_allows_memconst (constraints1
[i
],
3330 goal_alternative_number
))
3331 goal_alternative_win
[i
] = 1;
3334 /* Record the values of the earlyclobber operands for the caller. */
3335 if (goal_earlyclobber
)
3336 for (i
= 0; i
< noperands
; i
++)
3337 if (goal_alternative_earlyclobber
[i
])
3338 reload_earlyclobbers
[n_earlyclobbers
++] = recog_operand
[i
];
3340 /* Now record reloads for all the operands that need them. */
3341 for (i
= 0; i
< noperands
; i
++)
3342 if (! goal_alternative_win
[i
])
3344 /* Operands that match previous ones have already been handled. */
3345 if (goal_alternative_matches
[i
] >= 0)
3347 /* Handle an operand with a nonoffsettable address
3348 appearing where an offsettable address will do
3349 by reloading the address into a base register.
3351 ??? We can also do this when the operand is a register and
3352 reg_equiv_mem is not offsettable, but this is a bit tricky,
3353 so we don't bother with it. It may not be worth doing. */
3354 else if (goal_alternative_matched
[i
] == -1
3355 && goal_alternative_offmemok
[i
]
3356 && GET_CODE (recog_operand
[i
]) == MEM
)
3358 operand_reloadnum
[i
]
3359 = push_reload (XEXP (recog_operand
[i
], 0), NULL_RTX
,
3360 &XEXP (recog_operand
[i
], 0), NULL_PTR
,
3361 BASE_REG_CLASS
, GET_MODE (XEXP (recog_operand
[i
], 0)),
3362 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3363 reload_inc
[operand_reloadnum
[i
]]
3364 = GET_MODE_SIZE (GET_MODE (recog_operand
[i
]));
3366 /* If this operand is an output, we will have made any
3367 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3368 now we are treating part of the operand as an input, so
3369 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3371 if (modified
[i
] == RELOAD_WRITE
)
3372 for (j
= 0; j
< n_reloads
; j
++)
3373 if (reload_opnum
[j
] == i
3374 && reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3375 reload_when_needed
[j
] = RELOAD_FOR_INPUT_ADDRESS
;
3377 else if (goal_alternative_matched
[i
] == -1)
3378 operand_reloadnum
[i
] =
3379 push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3380 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3381 (modified
[i
] != RELOAD_WRITE
?
3382 recog_operand_loc
[i
] : 0),
3383 modified
[i
] != RELOAD_READ
? recog_operand_loc
[i
] : 0,
3384 (enum reg_class
) goal_alternative
[i
],
3385 (modified
[i
] == RELOAD_WRITE
3386 ? VOIDmode
: operand_mode
[i
]),
3387 (modified
[i
] == RELOAD_READ
3388 ? VOIDmode
: operand_mode
[i
]),
3389 (insn_code_number
< 0 ? 0
3390 : insn_operand_strict_low
[insn_code_number
][i
]),
3391 0, i
, operand_type
[i
]);
3392 /* In a matching pair of operands, one must be input only
3393 and the other must be output only.
3394 Pass the input operand as IN and the other as OUT. */
3395 else if (modified
[i
] == RELOAD_READ
3396 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3398 operand_reloadnum
[i
]
3399 = push_reload (recog_operand
[i
],
3400 recog_operand
[goal_alternative_matched
[i
]],
3401 recog_operand_loc
[i
],
3402 recog_operand_loc
[goal_alternative_matched
[i
]],
3403 (enum reg_class
) goal_alternative
[i
],
3405 operand_mode
[goal_alternative_matched
[i
]],
3406 0, 0, i
, RELOAD_OTHER
);
3407 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3409 else if (modified
[i
] == RELOAD_WRITE
3410 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3412 operand_reloadnum
[goal_alternative_matched
[i
]]
3413 = push_reload (recog_operand
[goal_alternative_matched
[i
]],
3415 recog_operand_loc
[goal_alternative_matched
[i
]],
3416 recog_operand_loc
[i
],
3417 (enum reg_class
) goal_alternative
[i
],
3418 operand_mode
[goal_alternative_matched
[i
]],
3420 0, 0, i
, RELOAD_OTHER
);
3421 operand_reloadnum
[i
] = output_reloadnum
;
3423 else if (insn_code_number
>= 0)
3427 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3428 /* Avoid further trouble with this insn. */
3429 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3434 else if (goal_alternative_matched
[i
] < 0
3435 && goal_alternative_matches
[i
] < 0
3438 /* For each non-matching operand that's a MEM or a pseudo-register
3439 that didn't get a hard register, make an optional reload.
3440 This may get done even if the insn needs no reloads otherwise. */
3442 rtx operand
= recog_operand
[i
];
3444 while (GET_CODE (operand
) == SUBREG
)
3445 operand
= XEXP (operand
, 0);
3446 if ((GET_CODE (operand
) == MEM
3447 || (GET_CODE (operand
) == REG
3448 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3449 && (enum reg_class
) goal_alternative
[i
] != NO_REGS
3450 && ! no_input_reloads
3451 /* Optional output reloads don't do anything and we mustn't
3452 make in-out reloads on insns that are not permitted output
3454 && (modified
[i
] == RELOAD_READ
3455 || (modified
[i
] == RELOAD_READ_WRITE
&& ! no_output_reloads
)))
3456 operand_reloadnum
[i
]
3457 = push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3458 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3459 (modified
[i
] != RELOAD_WRITE
3460 ? recog_operand_loc
[i
] : 0),
3461 (modified
[i
] != RELOAD_READ
3462 ? recog_operand_loc
[i
] : 0),
3463 (enum reg_class
) goal_alternative
[i
],
3464 (modified
[i
] == RELOAD_WRITE
3465 ? VOIDmode
: operand_mode
[i
]),
3466 (modified
[i
] == RELOAD_READ
3467 ? VOIDmode
: operand_mode
[i
]),
3468 (insn_code_number
< 0 ? 0
3469 : insn_operand_strict_low
[insn_code_number
][i
]),
3470 1, i
, operand_type
[i
]);
3472 else if (goal_alternative_matches
[i
] >= 0
3473 && goal_alternative_win
[goal_alternative_matches
[i
]]
3474 && modified
[i
] == RELOAD_READ
3475 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3476 && ! no_input_reloads
&& ! no_output_reloads
3479 /* Similarly, make an optional reload for a pair of matching
3480 objects that are in MEM or a pseudo that didn't get a hard reg. */
3482 rtx operand
= recog_operand
[i
];
3484 while (GET_CODE (operand
) == SUBREG
)
3485 operand
= XEXP (operand
, 0);
3486 if ((GET_CODE (operand
) == MEM
3487 || (GET_CODE (operand
) == REG
3488 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3489 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3491 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3492 = push_reload (recog_operand
[goal_alternative_matches
[i
]],
3494 recog_operand_loc
[goal_alternative_matches
[i
]],
3495 recog_operand_loc
[i
],
3496 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3497 operand_mode
[goal_alternative_matches
[i
]],
3499 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3502 /* If this insn pattern contains any MATCH_DUP's, make sure that
3503 they will be substituted if the operands they match are substituted.
3504 Also do now any substitutions we already did on the operands.
3506 Don't do this if we aren't making replacements because we might be
3507 propagating things allocated by frame pointer elimination into places
3508 it doesn't expect. */
3510 if (insn_code_number
>= 0 && replace
)
3511 for (i
= insn_n_dups
[insn_code_number
] - 1; i
>= 0; i
--)
3513 int opno
= recog_dup_num
[i
];
3514 *recog_dup_loc
[i
] = *recog_operand_loc
[opno
];
3515 if (operand_reloadnum
[opno
] >= 0)
3516 push_replacement (recog_dup_loc
[i
], operand_reloadnum
[opno
],
3517 insn_operand_mode
[insn_code_number
][opno
]);
3521 /* This loses because reloading of prior insns can invalidate the equivalence
3522 (or at least find_equiv_reg isn't smart enough to find it any more),
3523 causing this insn to need more reload regs than it needed before.
3524 It may be too late to make the reload regs available.
3525 Now this optimization is done safely in choose_reload_regs. */
3527 /* For each reload of a reg into some other class of reg,
3528 search for an existing equivalent reg (same value now) in the right class.
3529 We can use it as long as we don't need to change its contents. */
3530 for (i
= 0; i
< n_reloads
; i
++)
3531 if (reload_reg_rtx
[i
] == 0
3532 && reload_in
[i
] != 0
3533 && GET_CODE (reload_in
[i
]) == REG
3534 && reload_out
[i
] == 0)
3537 = find_equiv_reg (reload_in
[i
], insn
, reload_reg_class
[i
], -1,
3538 static_reload_reg_p
, 0, reload_inmode
[i
]);
3539 /* Prevent generation of insn to load the value
3540 because the one we found already has the value. */
3541 if (reload_reg_rtx
[i
])
3542 reload_in
[i
] = reload_reg_rtx
[i
];
3546 /* Perhaps an output reload can be combined with another
3547 to reduce needs by one. */
3548 if (!goal_earlyclobber
)
3551 /* If we have a pair of reloads for parts of an address, they are reloading
3552 the same object, the operands themselves were not reloaded, and they
3553 are for two operands that are supposed to match, merge the reloads and
3554 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3556 for (i
= 0; i
< n_reloads
; i
++)
3560 for (j
= i
+ 1; j
< n_reloads
; j
++)
3561 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3562 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3563 && (reload_when_needed
[j
] == RELOAD_FOR_INPUT_ADDRESS
3564 || reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3565 && rtx_equal_p (reload_in
[i
], reload_in
[j
])
3566 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3567 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]])
3568 && (operand_reloadnum
[reload_opnum
[j
]] < 0
3569 || reload_optional
[operand_reloadnum
[reload_opnum
[j
]]])
3570 && (goal_alternative_matches
[reload_opnum
[i
]] == reload_opnum
[j
]
3571 || (goal_alternative_matches
[reload_opnum
[j
]]
3572 == reload_opnum
[i
])))
3574 for (k
= 0; k
< n_replacements
; k
++)
3575 if (replacements
[k
].what
== j
)
3576 replacements
[k
].what
= i
;
3578 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3583 /* Scan all the reloads and update their type.
3584 If a reload is for the address of an operand and we didn't reload
3585 that operand, change the type. Similarly, change the operand number
3586 of a reload when two operands match. If a reload is optional, treat it
3587 as though the operand isn't reloaded.
3589 ??? This latter case is somewhat odd because if we do the optional
3590 reload, it means the object is hanging around. Thus we need only
3591 do the address reload if the optional reload was NOT done.
3593 Change secondary reloads to be the address type of their operand, not
3596 If an operand's reload is now RELOAD_OTHER, change any
3597 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3598 RELOAD_FOR_OTHER_ADDRESS. */
3600 for (i
= 0; i
< n_reloads
; i
++)
3602 if (reload_secondary_p
[i
]
3603 && reload_when_needed
[i
] == operand_type
[reload_opnum
[i
]])
3604 reload_when_needed
[i
] = address_type
[reload_opnum
[i
]];
3606 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3607 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3608 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3609 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]]))
3611 /* If we have a secondary reload to go along with this reload,
3612 change its type to RELOAD_FOR_OPADDR_ADDR. */
3614 if (reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3615 && reload_secondary_in_reload
[i
] != -1)
3617 int secondary_in_reload
= reload_secondary_in_reload
[i
];
3619 reload_when_needed
[secondary_in_reload
] =
3620 RELOAD_FOR_OPADDR_ADDR
;
3622 /* If there's a tertiary reload we have to change it also. */
3623 if (secondary_in_reload
> 0
3624 && reload_secondary_in_reload
[secondary_in_reload
] != -1)
3625 reload_when_needed
[reload_secondary_in_reload
[secondary_in_reload
]]
3626 = RELOAD_FOR_OPADDR_ADDR
;
3629 if (reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
3630 && reload_secondary_out_reload
[i
] != -1)
3632 int secondary_out_reload
= reload_secondary_out_reload
[i
];
3634 reload_when_needed
[secondary_out_reload
] =
3635 RELOAD_FOR_OPADDR_ADDR
;
3637 /* If there's a tertiary reload we have to change it also. */
3638 if (secondary_out_reload
3639 && reload_secondary_out_reload
[secondary_out_reload
] != -1)
3640 reload_when_needed
[reload_secondary_out_reload
[secondary_out_reload
]]
3641 = RELOAD_FOR_OPADDR_ADDR
;
3643 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3646 if (reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3647 && operand_reloadnum
[reload_opnum
[i
]] >= 0
3648 && (reload_when_needed
[operand_reloadnum
[reload_opnum
[i
]]]
3650 reload_when_needed
[i
] = RELOAD_FOR_OTHER_ADDRESS
;
3652 if (goal_alternative_matches
[reload_opnum
[i
]] >= 0)
3653 reload_opnum
[i
] = goal_alternative_matches
[reload_opnum
[i
]];
3656 /* See if we have any reloads that are now allowed to be merged
3657 because we've changed when the reload is needed to
3658 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3659 check for the most common cases. */
3661 for (i
= 0; i
< n_reloads
; i
++)
3662 if (reload_in
[i
] != 0 && reload_out
[i
] == 0
3663 && (reload_when_needed
[i
] == RELOAD_FOR_OPERAND_ADDRESS
3664 || reload_when_needed
[i
] == RELOAD_FOR_OTHER_ADDRESS
))
3665 for (j
= 0; j
< n_reloads
; j
++)
3666 if (i
!= j
&& reload_in
[j
] != 0 && reload_out
[j
] == 0
3667 && reload_when_needed
[j
] == reload_when_needed
[i
]
3668 && MATCHES (reload_in
[i
], reload_in
[j
])
3669 && reload_reg_class
[i
] == reload_reg_class
[j
]
3670 && !reload_nocombine
[i
] && !reload_nocombine
[j
]
3671 && reload_reg_rtx
[i
] == reload_reg_rtx
[j
])
3673 reload_opnum
[i
] = MIN (reload_opnum
[i
], reload_opnum
[j
]);
3674 transfer_replacements (i
, j
);
3678 #else /* no REGISTER_CONSTRAINTS */
3680 int insn_code_number
;
3681 int goal_earlyclobber
= 0; /* Always 0, to make combine_reloads happen. */
3683 rtx body
= PATTERN (insn
);
3687 n_earlyclobbers
= 0;
3688 replace_reloads
= replace
;
3691 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3692 Store the operand values in RECOG_OPERAND and the locations
3693 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3694 Return if the insn needs no reload processing. */
3696 switch (GET_CODE (body
))
3707 noperands
= asm_noperands (body
);
3710 /* This insn is an `asm' with operands.
3711 First, find out how many operands, and allocate space. */
3713 insn_code_number
= -1;
3714 /* ??? This is a bug! ???
3715 Give up and delete this insn if it has too many operands. */
3716 if (noperands
> MAX_RECOG_OPERANDS
)
3719 /* Now get the operand values out of the insn. */
3721 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
3722 NULL_PTR
, NULL_PTR
);
3727 /* Ordinary insn: recognize it, allocate space for operands and
3728 constraints, and get them out via insn_extract. */
3730 insn_code_number
= recog_memoized (insn
);
3731 noperands
= insn_n_operands
[insn_code_number
];
3732 insn_extract (insn
);
3738 for (i
= 0; i
< noperands
; i
++)
3740 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
3741 int is_set_dest
= GET_CODE (body
) == SET
&& (i
== 0);
3743 if (insn_code_number
>= 0)
3744 if (insn_operand_address_p
[insn_code_number
][i
])
3745 find_reloads_address (VOIDmode
, NULL_PTR
,
3746 recog_operand
[i
], recog_operand_loc
[i
],
3747 i
, RELOAD_FOR_INPUT
, ind_levels
);
3749 /* In these cases, we can't tell if the operand is an input
3750 or an output, so be conservative. In practice it won't be
3754 find_reloads_address (GET_MODE (recog_operand
[i
]),
3755 recog_operand_loc
[i
],
3756 XEXP (recog_operand
[i
], 0),
3757 &XEXP (recog_operand
[i
], 0),
3758 i
, RELOAD_OTHER
, ind_levels
);
3760 recog_operand
[i
] = *recog_operand_loc
[i
]
3761 = find_reloads_toplev (recog_operand
[i
], i
, RELOAD_OTHER
,
3762 ind_levels
, is_set_dest
);
3765 register int regno
= REGNO (recog_operand
[i
]);
3766 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3767 recog_operand
[i
] = *recog_operand_loc
[i
]
3768 = reg_equiv_constant
[regno
];
3769 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3770 that feeds this insn. */
3771 if (reg_equiv_mem
[regno
] != 0)
3772 recog_operand
[i
] = *recog_operand_loc
[i
]
3773 = reg_equiv_mem
[regno
];
3778 /* Perhaps an output reload can be combined with another
3779 to reduce needs by one. */
3780 if (!goal_earlyclobber
)
3782 #endif /* no REGISTER_CONSTRAINTS */
3785 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3786 accepts a memory operand with constant address. */
3789 alternative_allows_memconst (constraint
, altnum
)
3794 /* Skip alternatives before the one requested. */
3797 while (*constraint
++ != ',');
3800 /* Scan the requested alternative for 'm' or 'o'.
3801 If one of them is present, this alternative accepts memory constants. */
3802 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
3803 if (c
== 'm' || c
== 'o')
3808 /* Scan X for memory references and scan the addresses for reloading.
3809 Also checks for references to "constant" regs that we want to eliminate
3810 and replaces them with the values they stand for.
3811 We may alter X destructively if it contains a reference to such.
3812 If X is just a constant reg, we return the equivalent value
3815 IND_LEVELS says how many levels of indirect addressing this machine
3818 OPNUM and TYPE identify the purpose of the reload.
3820 IS_SET_DEST is true if X is the destination of a SET, which is not
3821 appropriate to be replaced by a constant. */
3824 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
)
3827 enum reload_type type
;
3831 register RTX_CODE code
= GET_CODE (x
);
3833 register char *fmt
= GET_RTX_FORMAT (code
);
3838 /* This code is duplicated for speed in find_reloads. */
3839 register int regno
= REGNO (x
);
3840 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3841 x
= reg_equiv_constant
[regno
];
3843 /* This creates (subreg (mem...)) which would cause an unnecessary
3844 reload of the mem. */
3845 else if (reg_equiv_mem
[regno
] != 0)
3846 x
= reg_equiv_mem
[regno
];
3848 else if (reg_equiv_address
[regno
] != 0)
3850 /* If reg_equiv_address varies, it may be shared, so copy it. */
3851 rtx addr
= reg_equiv_address
[regno
];
3853 if (rtx_varies_p (addr
))
3854 addr
= copy_rtx (addr
);
3856 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
3857 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3858 find_reloads_address (GET_MODE (x
), NULL_PTR
,
3860 &XEXP (x
, 0), opnum
, type
, ind_levels
);
3867 find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
3868 opnum
, type
, ind_levels
);
3872 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
3874 /* Check for SUBREG containing a REG that's equivalent to a constant.
3875 If the constant has a known value, truncate it right now.
3876 Similarly if we are extracting a single-word of a multi-word
3877 constant. If the constant is symbolic, allow it to be substituted
3878 normally. push_reload will strip the subreg later. If the
3879 constant is VOIDmode, abort because we will lose the mode of
3880 the register (this should never happen because one of the cases
3881 above should handle it). */
3883 register int regno
= REGNO (SUBREG_REG (x
));
3886 if (subreg_lowpart_p (x
)
3887 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3888 && reg_equiv_constant
[regno
] != 0
3889 && (tem
= gen_lowpart_common (GET_MODE (x
),
3890 reg_equiv_constant
[regno
])) != 0)
3893 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
3894 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3895 && reg_equiv_constant
[regno
] != 0
3896 && (tem
= operand_subword (reg_equiv_constant
[regno
],
3898 GET_MODE (SUBREG_REG (x
)))) != 0)
3901 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3902 && reg_equiv_constant
[regno
] != 0
3903 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
3906 /* If the subreg contains a reg that will be converted to a mem,
3907 convert the subreg to a narrower memref now.
3908 Otherwise, we would get (subreg (mem ...) ...),
3909 which would force reload of the mem.
3911 We also need to do this if there is an equivalent MEM that is
3912 not offsettable. In that case, alter_subreg would produce an
3913 invalid address on big-endian machines.
3915 For machines that extend byte loads, we must not reload using
3916 a wider mode if we have a paradoxical SUBREG. find_reloads will
3917 force a reload in that case. So we should not do anything here. */
3919 else if (regno
>= FIRST_PSEUDO_REGISTER
3920 #ifdef LOAD_EXTEND_OP
3921 && (GET_MODE_SIZE (GET_MODE (x
))
3922 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
3924 && (reg_equiv_address
[regno
] != 0
3925 || (reg_equiv_mem
[regno
] != 0
3926 && (! strict_memory_address_p (GET_MODE (x
),
3927 XEXP (reg_equiv_mem
[regno
], 0))
3928 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))))
3930 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
3931 rtx addr
= (reg_equiv_address
[regno
] ? reg_equiv_address
[regno
]
3932 : XEXP (reg_equiv_mem
[regno
], 0));
3933 #if BYTES_BIG_ENDIAN
3935 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
3936 offset
+= MIN (size
, UNITS_PER_WORD
);
3937 size
= GET_MODE_SIZE (GET_MODE (x
));
3938 offset
-= MIN (size
, UNITS_PER_WORD
);
3940 addr
= plus_constant (addr
, offset
);
3941 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
3942 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3943 find_reloads_address (GET_MODE (x
), NULL_PTR
,
3945 &XEXP (x
, 0), opnum
, type
, ind_levels
);
3950 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3953 XEXP (x
, i
) = find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
3954 ind_levels
, is_set_dest
);
3959 /* Return a mem ref for the memory equivalent of reg REGNO.
3960 This mem ref is not shared with anything. */
3963 make_memloc (ad
, regno
)
3968 rtx tem
= reg_equiv_address
[regno
];
3970 #if 0 /* We cannot safely reuse a memloc made here;
3971 if the pseudo appears twice, and its mem needs a reload,
3972 it gets two separate reloads assigned, but it only
3973 gets substituted with the second of them;
3974 then it can get used before that reload reg gets loaded up. */
3975 for (i
= 0; i
< n_memlocs
; i
++)
3976 if (rtx_equal_p (tem
, XEXP (memlocs
[i
], 0)))
3980 /* If TEM might contain a pseudo, we must copy it to avoid
3981 modifying it when we do the substitution for the reload. */
3982 if (rtx_varies_p (tem
))
3983 tem
= copy_rtx (tem
);
3985 tem
= gen_rtx (MEM
, GET_MODE (ad
), tem
);
3986 RTX_UNCHANGING_P (tem
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3987 memlocs
[n_memlocs
++] = tem
;
3991 /* Record all reloads needed for handling memory address AD
3992 which appears in *LOC in a memory reference to mode MODE
3993 which itself is found in location *MEMREFLOC.
3994 Note that we take shortcuts assuming that no multi-reg machine mode
3995 occurs as part of an address.
3997 OPNUM and TYPE specify the purpose of this reload.
3999 IND_LEVELS says how many levels of indirect addressing this machine
4002 Value is nonzero if this address is reloaded or replaced as a whole.
4003 This is interesting to the caller if the address is an autoincrement.
4005 Note that there is no verification that the address will be valid after
4006 this routine does its work. Instead, we rely on the fact that the address
4007 was valid when reload started. So we need only undo things that reload
4008 could have broken. These are wrong register types, pseudos not allocated
4009 to a hard register, and frame pointer elimination. */
4012 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
)
4013 enum machine_mode mode
;
4018 enum reload_type type
;
4024 /* If the address is a register, see if it is a legitimate address and
4025 reload if not. We first handle the cases where we need not reload
4026 or where we must reload in a non-standard way. */
4028 if (GET_CODE (ad
) == REG
)
4032 if (reg_equiv_constant
[regno
] != 0
4033 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
4035 *loc
= ad
= reg_equiv_constant
[regno
];
4039 else if (reg_equiv_address
[regno
] != 0)
4041 tem
= make_memloc (ad
, regno
);
4042 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
4043 &XEXP (tem
, 0), opnum
, type
, ind_levels
);
4044 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4045 GET_MODE (ad
), VOIDmode
, 0, 0,
4050 /* We can avoid a reload if the register's equivalent memory expression
4051 is valid as an indirect memory address.
4052 But not all addresses are valid in a mem used as an indirect address:
4053 only reg or reg+constant. */
4055 else if (reg_equiv_mem
[regno
] != 0 && ind_levels
> 0
4056 && strict_memory_address_p (mode
, reg_equiv_mem
[regno
])
4057 && (GET_CODE (XEXP (reg_equiv_mem
[regno
], 0)) == REG
4058 || (GET_CODE (XEXP (reg_equiv_mem
[regno
], 0)) == PLUS
4059 && GET_CODE (XEXP (XEXP (reg_equiv_mem
[regno
], 0), 0)) == REG
4060 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem
[regno
], 0), 0)))))
4063 /* The only remaining case where we can avoid a reload is if this is a
4064 hard register that is valid as a base register and which is not the
4065 subject of a CLOBBER in this insn. */
4067 else if (regno
< FIRST_PSEUDO_REGISTER
&& REGNO_OK_FOR_BASE_P (regno
)
4068 && ! regno_clobbered_p (regno
, this_insn
))
4071 /* If we do not have one of the cases above, we must do the reload. */
4072 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4073 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4077 if (strict_memory_address_p (mode
, ad
))
4079 /* The address appears valid, so reloads are not needed.
4080 But the address may contain an eliminable register.
4081 This can happen because a machine with indirect addressing
4082 may consider a pseudo register by itself a valid address even when
4083 it has failed to get a hard reg.
4084 So do a tree-walk to find and eliminate all such regs. */
4086 /* But first quickly dispose of a common case. */
4087 if (GET_CODE (ad
) == PLUS
4088 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4089 && GET_CODE (XEXP (ad
, 0)) == REG
4090 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4093 subst_reg_equivs_changed
= 0;
4094 *loc
= subst_reg_equivs (ad
);
4096 if (! subst_reg_equivs_changed
)
4099 /* Check result for validity after substitution. */
4100 if (strict_memory_address_p (mode
, ad
))
4104 /* The address is not valid. We have to figure out why. One possibility
4105 is that it is itself a MEM. This can happen when the frame pointer is
4106 being eliminated, a pseudo is not allocated to a hard register, and the
4107 offset between the frame and stack pointers is not its initial value.
4108 In that case the pseudo will have been replaced by a MEM referring to
4109 the stack pointer. */
4110 if (GET_CODE (ad
) == MEM
)
4112 /* First ensure that the address in this MEM is valid. Then, unless
4113 indirect addresses are valid, reload the MEM into a register. */
4115 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4116 opnum
, type
, ind_levels
== 0 ? 0 : ind_levels
- 1);
4118 /* If tem was changed, then we must create a new memory reference to
4119 hold it and store it back into memrefloc. */
4120 if (tem
!= ad
&& memrefloc
)
4122 *memrefloc
= copy_rtx (*memrefloc
);
4123 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4124 loc
= &XEXP (*memrefloc
, 0);
4127 /* Check similar cases as for indirect addresses as above except
4128 that we can allow pseudos and a MEM since they should have been
4129 taken care of above. */
4132 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4133 || GET_CODE (XEXP (tem
, 0)) == MEM
4134 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4135 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4136 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4137 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4139 /* Must use TEM here, not AD, since it is the one that will
4140 have any subexpressions reloaded, if needed. */
4141 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4142 BASE_REG_CLASS
, GET_MODE (tem
), VOIDmode
, 0,
4150 /* If we have address of a stack slot but it's not valid
4151 (displacement is too large), compute the sum in a register. */
4152 else if (GET_CODE (ad
) == PLUS
4153 && (XEXP (ad
, 0) == frame_pointer_rtx
4154 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4155 || XEXP (ad
, 0) == hard_frame_pointer_rtx
4157 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4158 || XEXP (ad
, 0) == arg_pointer_rtx
4160 || XEXP (ad
, 0) == stack_pointer_rtx
)
4161 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4163 /* Unshare the MEM rtx so we can safely alter it. */
4166 *memrefloc
= copy_rtx (*memrefloc
);
4167 loc
= &XEXP (*memrefloc
, 0);
4169 if (double_reg_address_ok
)
4171 /* Unshare the sum as well. */
4172 *loc
= ad
= copy_rtx (ad
);
4173 /* Reload the displacement into an index reg.
4174 We assume the frame pointer or arg pointer is a base reg. */
4175 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4176 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4181 /* If the sum of two regs is not necessarily valid,
4182 reload the sum into a base reg.
4183 That will at least work. */
4184 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
,
4185 opnum
, type
, ind_levels
);
4190 /* If we have an indexed stack slot, there are three possible reasons why
4191 it might be invalid: The index might need to be reloaded, the address
4192 might have been made by frame pointer elimination and hence have a
4193 constant out of range, or both reasons might apply.
4195 We can easily check for an index needing reload, but even if that is the
4196 case, we might also have an invalid constant. To avoid making the
4197 conservative assumption and requiring two reloads, we see if this address
4198 is valid when not interpreted strictly. If it is, the only problem is
4199 that the index needs a reload and find_reloads_address_1 will take care
4202 There is still a case when we might generate an extra reload,
4203 however. In certain cases eliminate_regs will return a MEM for a REG
4204 (see the code there for details). In those cases, memory_address_p
4205 applied to our address will return 0 so we will think that our offset
4206 must be too large. But it might indeed be valid and the only problem
4207 is that a MEM is present where a REG should be. This case should be
4208 very rare and there doesn't seem to be any way to avoid it.
4210 If we decide to do something here, it must be that
4211 `double_reg_address_ok' is true and that this address rtl was made by
4212 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4213 rework the sum so that the reload register will be added to the index.
4214 This is safe because we know the address isn't shared.
4216 We check for fp/ap/sp as both the first and second operand of the
4219 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4220 && GET_CODE (XEXP (ad
, 0)) == PLUS
4221 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4222 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4223 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4225 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4226 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4228 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4229 && ! memory_address_p (mode
, ad
))
4231 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4232 plus_constant (XEXP (XEXP (ad
, 0), 0),
4233 INTVAL (XEXP (ad
, 1))),
4234 XEXP (XEXP (ad
, 0), 1));
4235 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4236 GET_MODE (ad
), opnum
, type
, ind_levels
);
4237 find_reloads_address_1 (XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
, type
, 0);
4242 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4243 && GET_CODE (XEXP (ad
, 0)) == PLUS
4244 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4245 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4246 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4248 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4249 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4251 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4252 && ! memory_address_p (mode
, ad
))
4254 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4255 plus_constant (XEXP (XEXP (ad
, 0), 1),
4256 INTVAL (XEXP (ad
, 1))),
4257 XEXP (XEXP (ad
, 0), 0));
4258 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4259 GET_MODE (ad
), opnum
, type
, ind_levels
);
4260 find_reloads_address_1 (XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
, type
, 0);
4265 /* See if address becomes valid when an eliminable register
4266 in a sum is replaced. */
4269 if (GET_CODE (ad
) == PLUS
)
4270 tem
= subst_indexed_address (ad
);
4271 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4273 /* Ok, we win that way. Replace any additional eliminable
4276 subst_reg_equivs_changed
= 0;
4277 tem
= subst_reg_equivs (tem
);
4279 /* Make sure that didn't make the address invalid again. */
4281 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4288 /* If constants aren't valid addresses, reload the constant address
4290 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4292 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4293 Unshare it so we can safely alter it. */
4294 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4295 && CONSTANT_POOL_ADDRESS_P (ad
))
4297 *memrefloc
= copy_rtx (*memrefloc
);
4298 loc
= &XEXP (*memrefloc
, 0);
4301 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4306 return find_reloads_address_1 (ad
, 0, loc
, opnum
, type
, ind_levels
);
4309 /* Find all pseudo regs appearing in AD
4310 that are eliminable in favor of equivalent values
4311 and do not have hard regs; replace them by their equivalents. */
4314 subst_reg_equivs (ad
)
4317 register RTX_CODE code
= GET_CODE (ad
);
4335 register int regno
= REGNO (ad
);
4337 if (reg_equiv_constant
[regno
] != 0)
4339 subst_reg_equivs_changed
= 1;
4340 return reg_equiv_constant
[regno
];
4346 /* Quickly dispose of a common case. */
4347 if (XEXP (ad
, 0) == frame_pointer_rtx
4348 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4352 fmt
= GET_RTX_FORMAT (code
);
4353 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4355 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
));
4359 /* Compute the sum of X and Y, making canonicalizations assumed in an
4360 address, namely: sum constant integers, surround the sum of two
4361 constants with a CONST, put the constant as the second operand, and
4362 group the constant on the outermost sum.
4364 This routine assumes both inputs are already in canonical form. */
4371 enum machine_mode mode
= GET_MODE (x
);
4373 if (mode
== VOIDmode
)
4374 mode
= GET_MODE (y
);
4376 if (mode
== VOIDmode
)
4379 if (GET_CODE (x
) == CONST_INT
)
4380 return plus_constant (y
, INTVAL (x
));
4381 else if (GET_CODE (y
) == CONST_INT
)
4382 return plus_constant (x
, INTVAL (y
));
4383 else if (CONSTANT_P (x
))
4384 tem
= x
, x
= y
, y
= tem
;
4386 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4387 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4389 /* Note that if the operands of Y are specified in the opposite
4390 order in the recursive calls below, infinite recursion will occur. */
4391 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4392 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4394 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4395 constant will have been placed second. */
4396 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4398 if (GET_CODE (x
) == CONST
)
4400 if (GET_CODE (y
) == CONST
)
4403 return gen_rtx (CONST
, VOIDmode
, gen_rtx (PLUS
, mode
, x
, y
));
4406 return gen_rtx (PLUS
, mode
, x
, y
);
4409 /* If ADDR is a sum containing a pseudo register that should be
4410 replaced with a constant (from reg_equiv_constant),
4411 return the result of doing so, and also apply the associative
4412 law so that the result is more likely to be a valid address.
4413 (But it is not guaranteed to be one.)
4415 Note that at most one register is replaced, even if more are
4416 replaceable. Also, we try to put the result into a canonical form
4417 so it is more likely to be a valid address.
4419 In all other cases, return ADDR. */
4422 subst_indexed_address (addr
)
4425 rtx op0
= 0, op1
= 0, op2
= 0;
4429 if (GET_CODE (addr
) == PLUS
)
4431 /* Try to find a register to replace. */
4432 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4433 if (GET_CODE (op0
) == REG
4434 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4435 && reg_renumber
[regno
] < 0
4436 && reg_equiv_constant
[regno
] != 0)
4437 op0
= reg_equiv_constant
[regno
];
4438 else if (GET_CODE (op1
) == REG
4439 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4440 && reg_renumber
[regno
] < 0
4441 && reg_equiv_constant
[regno
] != 0)
4442 op1
= reg_equiv_constant
[regno
];
4443 else if (GET_CODE (op0
) == PLUS
4444 && (tem
= subst_indexed_address (op0
)) != op0
)
4446 else if (GET_CODE (op1
) == PLUS
4447 && (tem
= subst_indexed_address (op1
)) != op1
)
4452 /* Pick out up to three things to add. */
4453 if (GET_CODE (op1
) == PLUS
)
4454 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4455 else if (GET_CODE (op0
) == PLUS
)
4456 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4458 /* Compute the sum. */
4460 op1
= form_sum (op1
, op2
);
4462 op0
= form_sum (op0
, op1
);
4469 /* Record the pseudo registers we must reload into hard registers
4470 in a subexpression of a would-be memory address, X.
4471 (This function is not called if the address we find is strictly valid.)
4472 CONTEXT = 1 means we are considering regs as index regs,
4473 = 0 means we are considering them as base regs.
4475 OPNUM and TYPE specify the purpose of any reloads made.
4477 IND_LEVELS says how many levels of indirect addressing are
4478 supported at this point in the address.
4480 We return nonzero if X, as a whole, is reloaded or replaced. */
4482 /* Note that we take shortcuts assuming that no multi-reg machine mode
4483 occurs as part of an address.
4484 Also, this is not fully machine-customizable; it works for machines
4485 such as vaxes and 68000's and 32000's, but other possible machines
4486 could have addressing modes that this does not handle right. */
4489 find_reloads_address_1 (x
, context
, loc
, opnum
, type
, ind_levels
)
4494 enum reload_type type
;
4497 register RTX_CODE code
= GET_CODE (x
);
4503 register rtx orig_op0
= XEXP (x
, 0);
4504 register rtx orig_op1
= XEXP (x
, 1);
4505 register RTX_CODE code0
= GET_CODE (orig_op0
);
4506 register RTX_CODE code1
= GET_CODE (orig_op1
);
4507 register rtx op0
= orig_op0
;
4508 register rtx op1
= orig_op1
;
4510 if (GET_CODE (op0
) == SUBREG
)
4512 op0
= SUBREG_REG (op0
);
4513 code0
= GET_CODE (op0
);
4516 if (GET_CODE (op1
) == SUBREG
)
4518 op1
= SUBREG_REG (op1
);
4519 code1
= GET_CODE (op1
);
4522 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code1
== MEM
)
4524 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4526 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4530 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code0
== MEM
)
4532 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4534 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4538 else if (code0
== CONST_INT
|| code0
== CONST
4539 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
4540 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4543 else if (code1
== CONST_INT
|| code1
== CONST
4544 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
4545 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4548 else if (code0
== REG
&& code1
== REG
)
4550 if (REG_OK_FOR_INDEX_P (op0
)
4551 && REG_OK_FOR_BASE_P (op1
))
4553 else if (REG_OK_FOR_INDEX_P (op1
)
4554 && REG_OK_FOR_BASE_P (op0
))
4556 else if (REG_OK_FOR_BASE_P (op1
))
4557 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4559 else if (REG_OK_FOR_BASE_P (op0
))
4560 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4562 else if (REG_OK_FOR_INDEX_P (op1
))
4563 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4565 else if (REG_OK_FOR_INDEX_P (op0
))
4566 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4570 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4572 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4577 else if (code0
== REG
)
4579 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4581 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4585 else if (code1
== REG
)
4587 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4589 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4600 if (GET_CODE (XEXP (x
, 0)) == REG
)
4602 register int regno
= REGNO (XEXP (x
, 0));
4606 /* A register that is incremented cannot be constant! */
4607 if (regno
>= FIRST_PSEUDO_REGISTER
4608 && reg_equiv_constant
[regno
] != 0)
4611 /* Handle a register that is equivalent to a memory location
4612 which cannot be addressed directly. */
4613 if (reg_equiv_address
[regno
] != 0)
4615 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
4616 /* First reload the memory location's address. */
4617 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
4618 &XEXP (tem
, 0), opnum
, type
, ind_levels
);
4619 /* Put this inside a new increment-expression. */
4620 x
= gen_rtx (GET_CODE (x
), GET_MODE (x
), tem
);
4621 /* Proceed to reload that, as if it contained a register. */
4624 /* If we have a hard register that is ok as an index,
4625 don't make a reload. If an autoincrement of a nice register
4626 isn't "valid", it must be that no autoincrement is "valid".
4627 If that is true and something made an autoincrement anyway,
4628 this must be a special context where one is allowed.
4629 (For example, a "push" instruction.)
4630 We can't improve this address, so leave it alone. */
4632 /* Otherwise, reload the autoincrement into a suitable hard reg
4633 and record how much to increment by. */
4635 if (reg_renumber
[regno
] >= 0)
4636 regno
= reg_renumber
[regno
];
4637 if ((regno
>= FIRST_PSEUDO_REGISTER
4638 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4639 : REGNO_OK_FOR_BASE_P (regno
))))
4644 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4645 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4646 GET_MODE (x
), GET_MODE (x
), VOIDmode
, 0,
4648 reload_inc
[reloadnum
]
4649 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
4654 /* Update the REG_INC notes. */
4656 for (link
= REG_NOTES (this_insn
);
4657 link
; link
= XEXP (link
, 1))
4658 if (REG_NOTE_KIND (link
) == REG_INC
4659 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
4660 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4666 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
4668 /* This is probably the result of a substitution, by eliminate_regs,
4669 of an equivalent address for a pseudo that was not allocated to a
4670 hard register. Verify that the specified address is valid and
4671 reload it into a register. */
4672 rtx tem
= XEXP (x
, 0);
4676 /* Since we know we are going to reload this item, don't decrement
4677 for the indirection level.
4679 Note that this is actually conservative: it would be slightly
4680 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4682 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
4683 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
4684 opnum
, type
, ind_levels
);
4686 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4687 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4688 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4689 reload_inc
[reloadnum
]
4690 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
4692 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
4694 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4701 /* This is probably the result of a substitution, by eliminate_regs, of
4702 an equivalent address for a pseudo that was not allocated to a hard
4703 register. Verify that the specified address is valid and reload it
4706 Since we know we are going to reload this item, don't decrement for
4707 the indirection level.
4709 Note that this is actually conservative: it would be slightly more
4710 efficient to use the value of SPILL_INDIRECT_LEVELS from
4713 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
4714 opnum
, type
, ind_levels
);
4715 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
4716 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4717 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4722 register int regno
= REGNO (x
);
4724 if (reg_equiv_constant
[regno
] != 0)
4726 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
4727 (context
? INDEX_REG_CLASS
4729 GET_MODE (x
), opnum
, type
, ind_levels
);
4733 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4734 that feeds this insn. */
4735 if (reg_equiv_mem
[regno
] != 0)
4737 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
4738 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4739 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4744 if (reg_equiv_address
[regno
] != 0)
4746 x
= make_memloc (x
, regno
);
4747 find_reloads_address (GET_MODE (x
), 0, XEXP (x
, 0), &XEXP (x
, 0),
4748 opnum
, type
, ind_levels
);
4751 if (reg_renumber
[regno
] >= 0)
4752 regno
= reg_renumber
[regno
];
4754 if ((regno
>= FIRST_PSEUDO_REGISTER
4755 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4756 : REGNO_OK_FOR_BASE_P (regno
))))
4758 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4759 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4760 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4764 /* If a register appearing in an address is the subject of a CLOBBER
4765 in this insn, reload it into some other register to be safe.
4766 The CLOBBER is supposed to make the register unavailable
4767 from before this insn to after it. */
4768 if (regno_clobbered_p (regno
, this_insn
))
4770 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4771 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4772 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4779 /* If this is a SUBREG of a hard register and the resulting register is
4780 of the wrong class, reload the whole SUBREG. This avoids needless
4781 copies if SUBREG_REG is multi-word. */
4782 if (GET_CODE (SUBREG_REG (x
)) == REG
4783 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
4785 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
4787 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
4788 : REGNO_OK_FOR_BASE_P (regno
)))
4790 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4791 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4792 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4800 register char *fmt
= GET_RTX_FORMAT (code
);
4803 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4806 find_reloads_address_1 (XEXP (x
, i
), context
, &XEXP (x
, i
),
4807 opnum
, type
, ind_levels
);
4814 /* X, which is found at *LOC, is a part of an address that needs to be
4815 reloaded into a register of class CLASS. If X is a constant, or if
4816 X is a PLUS that contains a constant, check that the constant is a
4817 legitimate operand and that we are supposed to be able to load
4818 it into the register.
4820 If not, force the constant into memory and reload the MEM instead.
4822 MODE is the mode to use, in case X is an integer constant.
4824 OPNUM and TYPE describe the purpose of any reloads made.
4826 IND_LEVELS says how many levels of indirect addressing this machine
4830 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
4833 enum reg_class
class;
4834 enum machine_mode mode
;
4836 enum reload_type type
;
4840 && (! LEGITIMATE_CONSTANT_P (x
)
4841 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
4843 rtx tem
= x
= force_const_mem (mode
, x
);
4844 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
4845 opnum
, type
, ind_levels
);
4848 else if (GET_CODE (x
) == PLUS
4849 && CONSTANT_P (XEXP (x
, 1))
4850 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
4851 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
4853 rtx tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
4855 x
= gen_rtx (PLUS
, GET_MODE (x
), XEXP (x
, 0), tem
);
4856 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
4857 opnum
, type
, ind_levels
);
4860 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
4861 mode
, VOIDmode
, 0, 0, opnum
, type
);
4864 /* Substitute into the current INSN the registers into which we have reloaded
4865 the things that need reloading. The array `replacements'
4866 says contains the locations of all pointers that must be changed
4867 and says what to replace them with.
4869 Return the rtx that X translates into; usually X, but modified. */
4876 for (i
= 0; i
< n_replacements
; i
++)
4878 register struct replacement
*r
= &replacements
[i
];
4879 register rtx reloadreg
= reload_reg_rtx
[r
->what
];
4882 /* Encapsulate RELOADREG so its machine mode matches what
4883 used to be there. Note that gen_lowpart_common will
4884 do the wrong thing if RELOADREG is multi-word. RELOADREG
4885 will always be a REG here. */
4886 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
4887 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
4889 /* If we are putting this into a SUBREG and RELOADREG is a
4890 SUBREG, we would be making nested SUBREGs, so we have to fix
4891 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4893 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
4895 if (GET_MODE (*r
->subreg_loc
)
4896 == GET_MODE (SUBREG_REG (reloadreg
)))
4897 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
4900 *r
->where
= SUBREG_REG (reloadreg
);
4901 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
4905 *r
->where
= reloadreg
;
4907 /* If reload got no reg and isn't optional, something's wrong. */
4908 else if (! reload_optional
[r
->what
])
4913 /* Make a copy of any replacements being done into X and move those copies
4914 to locations in Y, a copy of X. We only look at the highest level of
4918 copy_replacements (x
, y
)
4923 enum rtx_code code
= GET_CODE (x
);
4924 char *fmt
= GET_RTX_FORMAT (code
);
4925 struct replacement
*r
;
4927 /* We can't support X being a SUBREG because we might then need to know its
4928 location if something inside it was replaced. */
4932 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4934 for (j
= 0; j
< n_replacements
; j
++)
4936 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
4938 r
= &replacements
[n_replacements
++];
4939 r
->where
= replacements
[j
].where
;
4940 r
->subreg_loc
= &XEXP (y
, i
);
4941 r
->what
= replacements
[j
].what
;
4942 r
->mode
= replacements
[j
].mode
;
4944 else if (replacements
[j
].where
== &XEXP (x
, i
))
4946 r
= &replacements
[n_replacements
++];
4947 r
->where
= &XEXP (y
, i
);
4949 r
->what
= replacements
[j
].what
;
4950 r
->mode
= replacements
[j
].mode
;
4955 /* If LOC was scheduled to be replaced by something, return the replacement.
4956 Otherwise, return *LOC. */
4959 find_replacement (loc
)
4962 struct replacement
*r
;
4964 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
4966 rtx reloadreg
= reload_reg_rtx
[r
->what
];
4968 if (reloadreg
&& r
->where
== loc
)
4970 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
4971 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
4975 else if (reloadreg
&& r
->subreg_loc
== loc
)
4977 /* RELOADREG must be either a REG or a SUBREG.
4979 ??? Is it actually still ever a SUBREG? If so, why? */
4981 if (GET_CODE (reloadreg
) == REG
)
4982 return gen_rtx (REG
, GET_MODE (*loc
),
4983 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
4984 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
4987 return gen_rtx (SUBREG
, GET_MODE (*loc
), SUBREG_REG (reloadreg
),
4988 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
4995 /* Return nonzero if register in range [REGNO, ENDREGNO)
4996 appears either explicitly or implicitly in X
4997 other than being stored into (except for earlyclobber operands).
4999 References contained within the substructure at LOC do not count.
5000 LOC may be zero, meaning don't ignore anything.
5002 This is similar to refers_to_regno_p in rtlanal.c except that we
5003 look at equivalences for pseudos that didn't get hard registers. */
5006 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
5007 int regno
, endregno
;
5012 register RTX_CODE code
;
5019 code
= GET_CODE (x
);
5026 /* If this is a pseudo, a hard register must not have been allocated.
5027 X must therefore either be a constant or be in memory. */
5028 if (i
>= FIRST_PSEUDO_REGISTER
)
5030 if (reg_equiv_memory_loc
[i
])
5031 return refers_to_regno_for_reload_p (regno
, endregno
,
5032 reg_equiv_memory_loc
[i
],
5035 if (reg_equiv_constant
[i
])
5041 return (endregno
> i
5042 && regno
< i
+ (i
< FIRST_PSEUDO_REGISTER
5043 ? HARD_REGNO_NREGS (i
, GET_MODE (x
))
5047 /* If this is a SUBREG of a hard reg, we can see exactly which
5048 registers are being modified. Otherwise, handle normally. */
5049 if (GET_CODE (SUBREG_REG (x
)) == REG
5050 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5052 int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5054 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
5055 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5057 return endregno
> inner_regno
&& regno
< inner_endregno
;
5063 if (&SET_DEST (x
) != loc
5064 /* Note setting a SUBREG counts as referring to the REG it is in for
5065 a pseudo but not for hard registers since we can
5066 treat each word individually. */
5067 && ((GET_CODE (SET_DEST (x
)) == SUBREG
5068 && loc
!= &SUBREG_REG (SET_DEST (x
))
5069 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
5070 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
5071 && refers_to_regno_for_reload_p (regno
, endregno
,
5072 SUBREG_REG (SET_DEST (x
)),
5074 /* If the ouput is an earlyclobber operand, this is
5076 || ((GET_CODE (SET_DEST (x
)) != REG
5077 || earlyclobber_operand_p (SET_DEST (x
)))
5078 && refers_to_regno_for_reload_p (regno
, endregno
,
5079 SET_DEST (x
), loc
))))
5082 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
5088 /* X does not match, so try its subexpressions. */
5090 fmt
= GET_RTX_FORMAT (code
);
5091 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5093 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
5101 if (refers_to_regno_for_reload_p (regno
, endregno
,
5105 else if (fmt
[i
] == 'E')
5108 for (j
= XVECLEN (x
, i
) - 1; j
>=0; j
--)
5109 if (loc
!= &XVECEXP (x
, i
, j
)
5110 && refers_to_regno_for_reload_p (regno
, endregno
,
5111 XVECEXP (x
, i
, j
), loc
))
5118 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5119 we check if any register number in X conflicts with the relevant register
5120 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5121 contains a MEM (we don't bother checking for memory addresses that can't
5122 conflict because we expect this to be a rare case.
5124 This function is similar to reg_overlap_mention_p in rtlanal.c except
5125 that we look at equivalences for pseudos that didn't get hard registers. */
5128 reg_overlap_mentioned_for_reload_p (x
, in
)
5131 int regno
, endregno
;
5133 if (GET_CODE (x
) == SUBREG
)
5135 regno
= REGNO (SUBREG_REG (x
));
5136 if (regno
< FIRST_PSEUDO_REGISTER
)
5137 regno
+= SUBREG_WORD (x
);
5139 else if (GET_CODE (x
) == REG
)
5143 /* If this is a pseudo, it must not have been assigned a hard register.
5144 Therefore, it must either be in memory or be a constant. */
5146 if (regno
>= FIRST_PSEUDO_REGISTER
)
5148 if (reg_equiv_memory_loc
[regno
])
5149 return refers_to_mem_for_reload_p (in
);
5150 else if (reg_equiv_constant
[regno
])
5155 else if (CONSTANT_P (x
))
5157 else if (GET_CODE (x
) == MEM
)
5158 return refers_to_mem_for_reload_p (in
);
5159 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
5160 || GET_CODE (x
) == CC0
)
5161 return reg_mentioned_p (x
, in
);
5165 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
5166 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5168 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
5171 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5175 refers_to_mem_for_reload_p (x
)
5181 if (GET_CODE (x
) == MEM
)
5184 if (GET_CODE (x
) == REG
)
5185 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
5186 && reg_equiv_memory_loc
[REGNO (x
)]);
5188 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
5189 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
5191 && (GET_CODE (XEXP (x
, i
)) == MEM
5192 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
5198 /* Check the insns before INSN to see if there is a suitable register
5199 containing the same value as GOAL.
5200 If OTHER is -1, look for a register in class CLASS.
5201 Otherwise, just see if register number OTHER shares GOAL's value.
5203 Return an rtx for the register found, or zero if none is found.
5205 If RELOAD_REG_P is (short *)1,
5206 we reject any hard reg that appears in reload_reg_rtx
5207 because such a hard reg is also needed coming into this insn.
5209 If RELOAD_REG_P is any other nonzero value,
5210 it is a vector indexed by hard reg number
5211 and we reject any hard reg whose element in the vector is nonnegative
5212 as well as any that appears in reload_reg_rtx.
5214 If GOAL is zero, then GOALREG is a register number; we look
5215 for an equivalent for that register.
5217 MODE is the machine mode of the value we want an equivalence for.
5218 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5220 This function is used by jump.c as well as in the reload pass.
5222 If GOAL is the sum of the stack pointer and a constant, we treat it
5223 as if it were a constant except that sp is required to be unchanging. */
5226 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
5229 enum reg_class
class;
5231 short *reload_reg_p
;
5233 enum machine_mode mode
;
5235 register rtx p
= insn
;
5236 rtx goaltry
, valtry
, value
, where
;
5238 register int regno
= -1;
5242 int goal_mem_addr_varies
= 0;
5243 int need_stable_sp
= 0;
5249 else if (GET_CODE (goal
) == REG
)
5250 regno
= REGNO (goal
);
5251 else if (GET_CODE (goal
) == MEM
)
5253 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
5254 if (MEM_VOLATILE_P (goal
))
5256 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
5258 /* An address with side effects must be reexecuted. */
5269 else if (CONSTANT_P (goal
))
5271 else if (GET_CODE (goal
) == PLUS
5272 && XEXP (goal
, 0) == stack_pointer_rtx
5273 && CONSTANT_P (XEXP (goal
, 1)))
5274 goal_const
= need_stable_sp
= 1;
5278 /* On some machines, certain regs must always be rejected
5279 because they don't behave the way ordinary registers do. */
5281 #ifdef OVERLAPPING_REGNO_P
5282 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5283 && OVERLAPPING_REGNO_P (regno
))
5287 /* Scan insns back from INSN, looking for one that copies
5288 a value into or out of GOAL.
5289 Stop and give up if we reach a label. */
5294 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
5296 if (GET_CODE (p
) == INSN
5297 /* If we don't want spill regs ... */
5298 && (! (reload_reg_p
!= 0
5299 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
5300 /* ... then ignore insns introduced by reload; they aren't useful
5301 and can cause results in reload_as_needed to be different
5302 from what they were when calculating the need for spills.
5303 If we notice an input-reload insn here, we will reject it below,
5304 but it might hide a usable equivalent. That makes bad code.
5305 It may even abort: perhaps no reg was spilled for this insn
5306 because it was assumed we would find that equivalent. */
5307 || INSN_UID (p
) < reload_first_uid
))
5310 pat
= single_set (p
);
5311 /* First check for something that sets some reg equal to GOAL. */
5314 && true_regnum (SET_SRC (pat
)) == regno
5315 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5318 && true_regnum (SET_DEST (pat
)) == regno
5319 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
5321 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
5322 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5324 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
5325 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
5327 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
5328 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
5329 /* If we are looking for a constant,
5330 and something equivalent to that constant was copied
5331 into a reg, we can use that reg. */
5332 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5334 && rtx_equal_p (XEXP (tem
, 0), goal
)
5335 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5336 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5338 && GET_CODE (SET_DEST (pat
)) == REG
5339 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5340 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5341 && GET_CODE (goal
) == CONST_INT
5342 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 0, 0,
5344 && rtx_equal_p (goal
, goaltry
)
5345 && (valtry
= operand_subword (SET_DEST (pat
), 0, 0,
5347 && (valueno
= true_regnum (valtry
)) >= 0)
5348 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5350 && GET_CODE (SET_DEST (pat
)) == REG
5351 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5352 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5353 && GET_CODE (goal
) == CONST_INT
5354 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
5356 && rtx_equal_p (goal
, goaltry
)
5358 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
5359 && (valueno
= true_regnum (valtry
)) >= 0)))
5362 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
5363 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
5373 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5374 (or copying VALUE into GOAL, if GOAL is also a register).
5375 Now verify that VALUE is really valid. */
5377 /* VALUENO is the register number of VALUE; a hard register. */
5379 /* Don't try to re-use something that is killed in this insn. We want
5380 to be able to trust REG_UNUSED notes. */
5381 if (find_reg_note (where
, REG_UNUSED
, value
))
5384 /* If we propose to get the value from the stack pointer or if GOAL is
5385 a MEM based on the stack pointer, we need a stable SP. */
5386 if (valueno
== STACK_POINTER_REGNUM
5387 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
5391 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5392 if (GET_MODE (value
) != mode
)
5395 /* Reject VALUE if it was loaded from GOAL
5396 and is also a register that appears in the address of GOAL. */
5398 if (goal_mem
&& value
== SET_DEST (PATTERN (where
))
5399 && refers_to_regno_for_reload_p (valueno
,
5401 + HARD_REGNO_NREGS (valueno
, mode
)),
5405 /* Reject registers that overlap GOAL. */
5407 if (!goal_mem
&& !goal_const
5408 && regno
+ HARD_REGNO_NREGS (regno
, mode
) > valueno
5409 && regno
< valueno
+ HARD_REGNO_NREGS (valueno
, mode
))
5412 /* Reject VALUE if it is one of the regs reserved for reloads.
5413 Reload1 knows how to reuse them anyway, and it would get
5414 confused if we allocated one without its knowledge.
5415 (Now that insns introduced by reload are ignored above,
5416 this case shouldn't happen, but I'm not positive.) */
5418 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1
5419 && reload_reg_p
[valueno
] >= 0)
5422 /* On some machines, certain regs must always be rejected
5423 because they don't behave the way ordinary registers do. */
5425 #ifdef OVERLAPPING_REGNO_P
5426 if (OVERLAPPING_REGNO_P (valueno
))
5430 nregs
= HARD_REGNO_NREGS (regno
, mode
);
5431 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
5433 /* Reject VALUE if it is a register being used for an input reload
5434 even if it is not one of those reserved. */
5436 if (reload_reg_p
!= 0)
5439 for (i
= 0; i
< n_reloads
; i
++)
5440 if (reload_reg_rtx
[i
] != 0 && reload_in
[i
])
5442 int regno1
= REGNO (reload_reg_rtx
[i
]);
5443 int nregs1
= HARD_REGNO_NREGS (regno1
,
5444 GET_MODE (reload_reg_rtx
[i
]));
5445 if (regno1
< valueno
+ valuenregs
5446 && regno1
+ nregs1
> valueno
)
5452 /* We must treat frame pointer as varying here,
5453 since it can vary--in a nonlocal goto as generated by expand_goto. */
5454 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
5456 /* Now verify that the values of GOAL and VALUE remain unaltered
5457 until INSN is reached. */
5466 /* Don't trust the conversion past a function call
5467 if either of the two is in a call-clobbered register, or memory. */
5468 if (GET_CODE (p
) == CALL_INSN
5469 && ((regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5470 && call_used_regs
[regno
])
5472 (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5473 && call_used_regs
[valueno
])
5479 #ifdef INSN_CLOBBERS_REGNO_P
5480 if ((valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5481 && INSN_CLOBBERS_REGNO_P (p
, valueno
))
5482 || (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5483 && INSN_CLOBBERS_REGNO_P (p
, regno
)))
5487 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
5489 /* If this insn P stores in either GOAL or VALUE, return 0.
5490 If GOAL is a memory ref and this insn writes memory, return 0.
5491 If GOAL is a memory ref and its address is not constant,
5492 and this insn P changes a register used in GOAL, return 0. */
5495 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
5497 register rtx dest
= SET_DEST (pat
);
5498 while (GET_CODE (dest
) == SUBREG
5499 || GET_CODE (dest
) == ZERO_EXTRACT
5500 || GET_CODE (dest
) == SIGN_EXTRACT
5501 || GET_CODE (dest
) == STRICT_LOW_PART
)
5502 dest
= XEXP (dest
, 0);
5503 if (GET_CODE (dest
) == REG
)
5505 register int xregno
= REGNO (dest
);
5507 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5508 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5511 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
5513 if (xregno
< valueno
+ valuenregs
5514 && xregno
+ xnregs
> valueno
)
5516 if (goal_mem_addr_varies
5517 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
5520 else if (goal_mem
&& GET_CODE (dest
) == MEM
5521 && ! push_operand (dest
, GET_MODE (dest
)))
5523 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
5526 else if (GET_CODE (pat
) == PARALLEL
)
5529 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
5531 register rtx v1
= XVECEXP (pat
, 0, i
);
5532 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
5534 register rtx dest
= SET_DEST (v1
);
5535 while (GET_CODE (dest
) == SUBREG
5536 || GET_CODE (dest
) == ZERO_EXTRACT
5537 || GET_CODE (dest
) == SIGN_EXTRACT
5538 || GET_CODE (dest
) == STRICT_LOW_PART
)
5539 dest
= XEXP (dest
, 0);
5540 if (GET_CODE (dest
) == REG
)
5542 register int xregno
= REGNO (dest
);
5544 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5545 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5548 if (xregno
< regno
+ nregs
5549 && xregno
+ xnregs
> regno
)
5551 if (xregno
< valueno
+ valuenregs
5552 && xregno
+ xnregs
> valueno
)
5554 if (goal_mem_addr_varies
5555 && reg_overlap_mentioned_for_reload_p (dest
,
5559 else if (goal_mem
&& GET_CODE (dest
) == MEM
5560 && ! push_operand (dest
, GET_MODE (dest
)))
5562 else if (need_stable_sp
5563 && push_operand (dest
, GET_MODE (dest
)))
5570 /* If this insn auto-increments or auto-decrements
5571 either regno or valueno, return 0 now.
5572 If GOAL is a memory ref and its address is not constant,
5573 and this insn P increments a register used in GOAL, return 0. */
5577 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
5578 if (REG_NOTE_KIND (link
) == REG_INC
5579 && GET_CODE (XEXP (link
, 0)) == REG
)
5581 register int incno
= REGNO (XEXP (link
, 0));
5582 if (incno
< regno
+ nregs
&& incno
>= regno
)
5584 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
5586 if (goal_mem_addr_varies
5587 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
5597 /* Find a place where INCED appears in an increment or decrement operator
5598 within X, and return the amount INCED is incremented or decremented by.
5599 The value is always positive. */
5602 find_inc_amount (x
, inced
)
5605 register enum rtx_code code
= GET_CODE (x
);
5611 register rtx addr
= XEXP (x
, 0);
5612 if ((GET_CODE (addr
) == PRE_DEC
5613 || GET_CODE (addr
) == POST_DEC
5614 || GET_CODE (addr
) == PRE_INC
5615 || GET_CODE (addr
) == POST_INC
)
5616 && XEXP (addr
, 0) == inced
)
5617 return GET_MODE_SIZE (GET_MODE (x
));
5620 fmt
= GET_RTX_FORMAT (code
);
5621 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5625 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
5632 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
5634 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
5644 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5647 regno_clobbered_p (regno
, insn
)
5651 if (GET_CODE (PATTERN (insn
)) == CLOBBER
5652 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
5653 return REGNO (XEXP (PATTERN (insn
), 0)) == regno
;
5655 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
5657 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
5661 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
5662 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
5663 && REGNO (XEXP (elt
, 0)) == regno
)