1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 /* This file contains subroutines used only from the file reload1.c.
21 It knows how to scan one insn for operands and values
22 that need to be copied into registers to make valid code.
23 It also finds other operands and values which are valid
24 but for which equivalent values in registers exist and
25 ought to be used instead.
27 Before processing the first insn of the function, call `init_reload'.
28 init_reload actually has to be called earlier anyway.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
72 Using a reload register for several reloads in one insn:
74 When an insn has reloads, it is considered as having three parts:
75 the input reloads, the insn itself after reloading, and the output reloads.
76 Reloads of values used in memory addresses are often needed for only one part.
78 When this is so, reload_when_needed records which part needs the reload.
79 Two reloads for different parts of the insn can share the same reload
82 When a reload is used for addresses in multiple parts, or when it is
83 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
84 a register with any other reload. */
88 /* We do not enable this with ENABLE_CHECKING, since it is awfully slow. */
93 #include "coretypes.h"
95 #include "rtl-error.h"
97 #include "insn-config.h"
101 #include "dominance.h"
104 #include "basic-block.h"
108 #include "addresses.h"
109 #include "hard-reg-set.h"
112 #include "hash-set.h"
114 #include "machmode.h"
116 #include "function.h"
121 /* True if X is a constant that can be forced into the constant pool.
122 MODE is the mode of the operand, or VOIDmode if not known. */
123 #define CONST_POOL_OK_P(MODE, X) \
124 ((MODE) != VOIDmode \
126 && GET_CODE (X) != HIGH \
127 && !targetm.cannot_force_const_mem (MODE, X))
129 /* True if C is a non-empty register class that has too few registers
130 to be safely used as a reload target class. */
133 small_register_class_p (reg_class_t rclass
)
135 return (reg_class_size
[(int) rclass
] == 1
136 || (reg_class_size
[(int) rclass
] >= 1
137 && targetm
.class_likely_spilled_p (rclass
)));
141 /* All reloads of the current insn are recorded here. See reload.h for
144 struct reload rld
[MAX_RELOADS
];
146 /* All the "earlyclobber" operands of the current insn
147 are recorded here. */
149 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
151 int reload_n_operands
;
153 /* Replacing reloads.
155 If `replace_reloads' is nonzero, then as each reload is recorded
156 an entry is made for it in the table `replacements'.
157 Then later `subst_reloads' can look through that table and
158 perform all the replacements needed. */
160 /* Nonzero means record the places to replace. */
161 static int replace_reloads
;
163 /* Each replacement is recorded with a structure like this. */
166 rtx
*where
; /* Location to store in */
167 int what
; /* which reload this is for */
168 enum machine_mode mode
; /* mode it must have */
171 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
173 /* Number of replacements currently recorded. */
174 static int n_replacements
;
176 /* Used to track what is modified by an operand. */
179 int reg_flag
; /* Nonzero if referencing a register. */
180 int safe
; /* Nonzero if this can't conflict with anything. */
181 rtx base
; /* Base address for MEM. */
182 HOST_WIDE_INT start
; /* Starting offset or register number. */
183 HOST_WIDE_INT end
; /* Ending offset or register number. */
186 #ifdef SECONDARY_MEMORY_NEEDED
188 /* Save MEMs needed to copy from one class of registers to another. One MEM
189 is used per mode, but normally only one or two modes are ever used.
191 We keep two versions, before and after register elimination. The one
192 after register elimination is record separately for each operand. This
193 is done in case the address is not valid to be sure that we separately
196 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
197 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
198 static int secondary_memlocs_elim_used
= 0;
201 /* The instruction we are doing reloads for;
202 so we can test whether a register dies in it. */
203 static rtx_insn
*this_insn
;
205 /* Nonzero if this instruction is a user-specified asm with operands. */
206 static int this_insn_is_asm
;
208 /* If hard_regs_live_known is nonzero,
209 we can tell which hard regs are currently live,
210 at least enough to succeed in choosing dummy reloads. */
211 static int hard_regs_live_known
;
213 /* Indexed by hard reg number,
214 element is nonnegative if hard reg has been spilled.
215 This vector is passed to `find_reloads' as an argument
216 and is not changed here. */
217 static short *static_reload_reg_p
;
219 /* Set to 1 in subst_reg_equivs if it changes anything. */
220 static int subst_reg_equivs_changed
;
222 /* On return from push_reload, holds the reload-number for the OUT
223 operand, which can be different for that from the input operand. */
224 static int output_reloadnum
;
226 /* Compare two RTX's. */
227 #define MATCHES(x, y) \
228 (x == y || (x != 0 && (REG_P (x) \
229 ? REG_P (y) && REGNO (x) == REGNO (y) \
230 : rtx_equal_p (x, y) && ! side_effects_p (x))))
232 /* Indicates if two reloads purposes are for similar enough things that we
233 can merge their reloads. */
234 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
235 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
236 || ((when1) == (when2) && (op1) == (op2)) \
237 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
238 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
239 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
240 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
241 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
243 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
244 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
245 ((when1) != (when2) \
246 || ! ((op1) == (op2) \
247 || (when1) == RELOAD_FOR_INPUT \
248 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
249 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
251 /* If we are going to reload an address, compute the reload type to
253 #define ADDR_TYPE(type) \
254 ((type) == RELOAD_FOR_INPUT_ADDRESS \
255 ? RELOAD_FOR_INPADDR_ADDRESS \
256 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
257 ? RELOAD_FOR_OUTADDR_ADDRESS \
260 static int push_secondary_reload (int, rtx
, int, int, enum reg_class
,
261 enum machine_mode
, enum reload_type
,
262 enum insn_code
*, secondary_reload_info
*);
263 static enum reg_class
find_valid_class (enum machine_mode
, enum machine_mode
,
265 static void push_replacement (rtx
*, int, enum machine_mode
);
266 static void dup_replacements (rtx
*, rtx
*);
267 static void combine_reloads (void);
268 static int find_reusable_reload (rtx
*, rtx
, enum reg_class
,
269 enum reload_type
, int, int);
270 static rtx
find_dummy_reload (rtx
, rtx
, rtx
*, rtx
*, enum machine_mode
,
271 enum machine_mode
, reg_class_t
, int, int);
272 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx
);
273 static struct decomposition
decompose (rtx
);
274 static int immune_p (rtx
, rtx
, struct decomposition
);
275 static bool alternative_allows_const_pool_ref (rtx
, const char *, int);
276 static rtx
find_reloads_toplev (rtx
, int, enum reload_type
, int, int,
278 static rtx
make_memloc (rtx
, int);
279 static int maybe_memory_address_addr_space_p (enum machine_mode
, rtx
,
280 addr_space_t
, rtx
*);
281 static int find_reloads_address (enum machine_mode
, rtx
*, rtx
, rtx
*,
282 int, enum reload_type
, int, rtx_insn
*);
283 static rtx
subst_reg_equivs (rtx
, rtx_insn
*);
284 static rtx
subst_indexed_address (rtx
);
285 static void update_auto_inc_notes (rtx_insn
*, int, int);
286 static int find_reloads_address_1 (enum machine_mode
, addr_space_t
, rtx
, int,
287 enum rtx_code
, enum rtx_code
, rtx
*,
288 int, enum reload_type
,int, rtx_insn
*);
289 static void find_reloads_address_part (rtx
, rtx
*, enum reg_class
,
290 enum machine_mode
, int,
291 enum reload_type
, int);
292 static rtx
find_reloads_subreg_address (rtx
, int, enum reload_type
,
293 int, rtx_insn
*, int *);
294 static void copy_replacements_1 (rtx
*, rtx
*, int);
295 static int find_inc_amount (rtx
, rtx
);
296 static int refers_to_mem_for_reload_p (rtx
);
297 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
300 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
304 push_reg_equiv_alt_mem (int regno
, rtx mem
)
308 for (it
= reg_equiv_alt_mem_list (regno
); it
; it
= XEXP (it
, 1))
309 if (rtx_equal_p (XEXP (it
, 0), mem
))
312 reg_equiv_alt_mem_list (regno
)
313 = alloc_EXPR_LIST (REG_EQUIV
, mem
,
314 reg_equiv_alt_mem_list (regno
));
317 /* Determine if any secondary reloads are needed for loading (if IN_P is
318 nonzero) or storing (if IN_P is zero) X to or from a reload register of
319 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
320 are needed, push them.
322 Return the reload number of the secondary reload we made, or -1 if
323 we didn't need one. *PICODE is set to the insn_code to use if we do
324 need a secondary reload. */
327 push_secondary_reload (int in_p
, rtx x
, int opnum
, int optional
,
328 enum reg_class reload_class
,
329 enum machine_mode reload_mode
, enum reload_type type
,
330 enum insn_code
*picode
, secondary_reload_info
*prev_sri
)
332 enum reg_class rclass
= NO_REGS
;
333 enum reg_class scratch_class
;
334 enum machine_mode mode
= reload_mode
;
335 enum insn_code icode
= CODE_FOR_nothing
;
336 enum insn_code t_icode
= CODE_FOR_nothing
;
337 enum reload_type secondary_type
;
338 int s_reload
, t_reload
= -1;
339 const char *scratch_constraint
;
340 secondary_reload_info sri
;
342 if (type
== RELOAD_FOR_INPUT_ADDRESS
343 || type
== RELOAD_FOR_OUTPUT_ADDRESS
344 || type
== RELOAD_FOR_INPADDR_ADDRESS
345 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
346 secondary_type
= type
;
348 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
350 *picode
= CODE_FOR_nothing
;
352 /* If X is a paradoxical SUBREG, use the inner value to determine both the
353 mode and object being reloaded. */
354 if (paradoxical_subreg_p (x
))
357 reload_mode
= GET_MODE (x
);
360 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
361 is still a pseudo-register by now, it *must* have an equivalent MEM
362 but we don't want to assume that), use that equivalent when seeing if
363 a secondary reload is needed since whether or not a reload is needed
364 might be sensitive to the form of the MEM. */
366 if (REG_P (x
) && REGNO (x
) >= FIRST_PSEUDO_REGISTER
367 && reg_equiv_mem (REGNO (x
)))
368 x
= reg_equiv_mem (REGNO (x
));
370 sri
.icode
= CODE_FOR_nothing
;
371 sri
.prev_sri
= prev_sri
;
372 rclass
= (enum reg_class
) targetm
.secondary_reload (in_p
, x
, reload_class
,
374 icode
= (enum insn_code
) sri
.icode
;
376 /* If we don't need any secondary registers, done. */
377 if (rclass
== NO_REGS
&& icode
== CODE_FOR_nothing
)
380 if (rclass
!= NO_REGS
)
381 t_reload
= push_secondary_reload (in_p
, x
, opnum
, optional
, rclass
,
382 reload_mode
, type
, &t_icode
, &sri
);
384 /* If we will be using an insn, the secondary reload is for a
387 if (icode
!= CODE_FOR_nothing
)
389 /* If IN_P is nonzero, the reload register will be the output in
390 operand 0. If IN_P is zero, the reload register will be the input
391 in operand 1. Outputs should have an initial "=", which we must
394 /* ??? It would be useful to be able to handle only two, or more than
395 three, operands, but for now we can only handle the case of having
396 exactly three: output, input and one temp/scratch. */
397 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
399 /* ??? We currently have no way to represent a reload that needs
400 an icode to reload from an intermediate tertiary reload register.
401 We should probably have a new field in struct reload to tag a
402 chain of scratch operand reloads onto. */
403 gcc_assert (rclass
== NO_REGS
);
405 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
406 gcc_assert (*scratch_constraint
== '=');
407 scratch_constraint
++;
408 if (*scratch_constraint
== '&')
409 scratch_constraint
++;
410 scratch_class
= (reg_class_for_constraint
411 (lookup_constraint (scratch_constraint
)));
413 rclass
= scratch_class
;
414 mode
= insn_data
[(int) icode
].operand
[2].mode
;
417 /* This case isn't valid, so fail. Reload is allowed to use the same
418 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
419 in the case of a secondary register, we actually need two different
420 registers for correct code. We fail here to prevent the possibility of
421 silently generating incorrect code later.
423 The convention is that secondary input reloads are valid only if the
424 secondary_class is different from class. If you have such a case, you
425 can not use secondary reloads, you must work around the problem some
428 Allow this when a reload_in/out pattern is being used. I.e. assume
429 that the generated code handles this case. */
431 gcc_assert (!in_p
|| rclass
!= reload_class
|| icode
!= CODE_FOR_nothing
432 || t_icode
!= CODE_FOR_nothing
);
434 /* See if we can reuse an existing secondary reload. */
435 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
436 if (rld
[s_reload
].secondary_p
437 && (reg_class_subset_p (rclass
, rld
[s_reload
].rclass
)
438 || reg_class_subset_p (rld
[s_reload
].rclass
, rclass
))
439 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
440 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
441 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
442 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
443 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
444 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
445 && (small_register_class_p (rclass
)
446 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
447 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
448 opnum
, rld
[s_reload
].opnum
))
451 rld
[s_reload
].inmode
= mode
;
453 rld
[s_reload
].outmode
= mode
;
455 if (reg_class_subset_p (rclass
, rld
[s_reload
].rclass
))
456 rld
[s_reload
].rclass
= rclass
;
458 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
459 rld
[s_reload
].optional
&= optional
;
460 rld
[s_reload
].secondary_p
= 1;
461 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
462 opnum
, rld
[s_reload
].opnum
))
463 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
468 if (s_reload
== n_reloads
)
470 #ifdef SECONDARY_MEMORY_NEEDED
471 /* If we need a memory location to copy between the two reload regs,
472 set it up now. Note that we do the input case before making
473 the reload and the output case after. This is due to the
474 way reloads are output. */
476 if (in_p
&& icode
== CODE_FOR_nothing
477 && SECONDARY_MEMORY_NEEDED (rclass
, reload_class
, mode
))
479 get_secondary_mem (x
, reload_mode
, opnum
, type
);
481 /* We may have just added new reloads. Make sure we add
482 the new reload at the end. */
483 s_reload
= n_reloads
;
487 /* We need to make a new secondary reload for this register class. */
488 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
489 rld
[s_reload
].rclass
= rclass
;
491 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
492 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
493 rld
[s_reload
].reg_rtx
= 0;
494 rld
[s_reload
].optional
= optional
;
495 rld
[s_reload
].inc
= 0;
496 /* Maybe we could combine these, but it seems too tricky. */
497 rld
[s_reload
].nocombine
= 1;
498 rld
[s_reload
].in_reg
= 0;
499 rld
[s_reload
].out_reg
= 0;
500 rld
[s_reload
].opnum
= opnum
;
501 rld
[s_reload
].when_needed
= secondary_type
;
502 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
503 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
504 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
505 rld
[s_reload
].secondary_out_icode
506 = ! in_p
? t_icode
: CODE_FOR_nothing
;
507 rld
[s_reload
].secondary_p
= 1;
511 #ifdef SECONDARY_MEMORY_NEEDED
512 if (! in_p
&& icode
== CODE_FOR_nothing
513 && SECONDARY_MEMORY_NEEDED (reload_class
, rclass
, mode
))
514 get_secondary_mem (x
, mode
, opnum
, type
);
522 /* If a secondary reload is needed, return its class. If both an intermediate
523 register and a scratch register is needed, we return the class of the
524 intermediate register. */
526 secondary_reload_class (bool in_p
, reg_class_t rclass
, enum machine_mode mode
,
529 enum insn_code icode
;
530 secondary_reload_info sri
;
532 sri
.icode
= CODE_FOR_nothing
;
535 = (enum reg_class
) targetm
.secondary_reload (in_p
, x
, rclass
, mode
, &sri
);
536 icode
= (enum insn_code
) sri
.icode
;
538 /* If there are no secondary reloads at all, we return NO_REGS.
539 If an intermediate register is needed, we return its class. */
540 if (icode
== CODE_FOR_nothing
|| rclass
!= NO_REGS
)
543 /* No intermediate register is needed, but we have a special reload
544 pattern, which we assume for now needs a scratch register. */
545 return scratch_reload_class (icode
);
548 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
549 three operands, verify that operand 2 is an output operand, and return
551 ??? We'd like to be able to handle any pattern with at least 2 operands,
552 for zero or more scratch registers, but that needs more infrastructure. */
554 scratch_reload_class (enum insn_code icode
)
556 const char *scratch_constraint
;
557 enum reg_class rclass
;
559 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
560 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
561 gcc_assert (*scratch_constraint
== '=');
562 scratch_constraint
++;
563 if (*scratch_constraint
== '&')
564 scratch_constraint
++;
565 rclass
= reg_class_for_constraint (lookup_constraint (scratch_constraint
));
566 gcc_assert (rclass
!= NO_REGS
);
570 #ifdef SECONDARY_MEMORY_NEEDED
572 /* Return a memory location that will be used to copy X in mode MODE.
573 If we haven't already made a location for this mode in this insn,
574 call find_reloads_address on the location being returned. */
577 get_secondary_mem (rtx x ATTRIBUTE_UNUSED
, enum machine_mode mode
,
578 int opnum
, enum reload_type type
)
583 /* By default, if MODE is narrower than a word, widen it to a word.
584 This is required because most machines that require these memory
585 locations do not support short load and stores from all registers
586 (e.g., FP registers). */
588 #ifdef SECONDARY_MEMORY_NEEDED_MODE
589 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
591 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
592 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
595 /* If we already have made a MEM for this operand in MODE, return it. */
596 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
597 return secondary_memlocs_elim
[(int) mode
][opnum
];
599 /* If this is the first time we've tried to get a MEM for this mode,
600 allocate a new one. `something_changed' in reload will get set
601 by noticing that the frame size has changed. */
603 if (secondary_memlocs
[(int) mode
] == 0)
605 #ifdef SECONDARY_MEMORY_NEEDED_RTX
606 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
608 secondary_memlocs
[(int) mode
]
609 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
613 /* Get a version of the address doing any eliminations needed. If that
614 didn't give us a new MEM, make a new one if it isn't valid. */
616 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
617 mem_valid
= strict_memory_address_addr_space_p (mode
, XEXP (loc
, 0),
618 MEM_ADDR_SPACE (loc
));
620 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
621 loc
= copy_rtx (loc
);
623 /* The only time the call below will do anything is if the stack
624 offset is too large. In that case IND_LEVELS doesn't matter, so we
625 can just pass a zero. Adjust the type to be the address of the
626 corresponding object. If the address was valid, save the eliminated
627 address. If it wasn't valid, we need to make a reload each time, so
632 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
633 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
636 find_reloads_address (mode
, &loc
, XEXP (loc
, 0), &XEXP (loc
, 0),
640 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
641 if (secondary_memlocs_elim_used
<= (int)mode
)
642 secondary_memlocs_elim_used
= (int)mode
+ 1;
646 /* Clear any secondary memory locations we've made. */
649 clear_secondary_mem (void)
651 memset (secondary_memlocs
, 0, sizeof secondary_memlocs
);
653 #endif /* SECONDARY_MEMORY_NEEDED */
656 /* Find the largest class which has at least one register valid in
657 mode INNER, and which for every such register, that register number
658 plus N is also valid in OUTER (if in range) and is cheap to move
659 into REGNO. Such a class must exist. */
661 static enum reg_class
662 find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED
,
663 enum machine_mode inner ATTRIBUTE_UNUSED
, int n
,
664 unsigned int dest_regno ATTRIBUTE_UNUSED
)
669 enum reg_class best_class
= NO_REGS
;
670 enum reg_class dest_class ATTRIBUTE_UNUSED
= REGNO_REG_CLASS (dest_regno
);
671 unsigned int best_size
= 0;
674 for (rclass
= 1; rclass
< N_REG_CLASSES
; rclass
++)
678 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
- n
&& ! bad
; regno
++)
679 if (TEST_HARD_REG_BIT (reg_class_contents
[rclass
], regno
))
681 if (HARD_REGNO_MODE_OK (regno
, inner
))
684 if (TEST_HARD_REG_BIT (reg_class_contents
[rclass
], regno
+ n
)
685 && ! HARD_REGNO_MODE_OK (regno
+ n
, outer
))
692 cost
= register_move_cost (outer
, (enum reg_class
) rclass
, dest_class
);
694 if ((reg_class_size
[rclass
] > best_size
695 && (best_cost
< 0 || best_cost
>= cost
))
698 best_class
= (enum reg_class
) rclass
;
699 best_size
= reg_class_size
[rclass
];
700 best_cost
= register_move_cost (outer
, (enum reg_class
) rclass
,
705 gcc_assert (best_size
!= 0);
710 /* We are trying to reload a subreg of something that is not a register.
711 Find the largest class which contains only registers valid in
712 mode MODE. OUTER is the mode of the subreg, DEST_CLASS the class in
713 which we would eventually like to obtain the object. */
715 static enum reg_class
716 find_valid_class_1 (enum machine_mode outer ATTRIBUTE_UNUSED
,
717 enum machine_mode mode ATTRIBUTE_UNUSED
,
718 enum reg_class dest_class ATTRIBUTE_UNUSED
)
723 enum reg_class best_class
= NO_REGS
;
724 unsigned int best_size
= 0;
727 for (rclass
= 1; rclass
< N_REG_CLASSES
; rclass
++)
730 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& !bad
; regno
++)
732 if (in_hard_reg_set_p (reg_class_contents
[rclass
], mode
, regno
)
733 && !HARD_REGNO_MODE_OK (regno
, mode
))
740 cost
= register_move_cost (outer
, (enum reg_class
) rclass
, dest_class
);
742 if ((reg_class_size
[rclass
] > best_size
743 && (best_cost
< 0 || best_cost
>= cost
))
746 best_class
= (enum reg_class
) rclass
;
747 best_size
= reg_class_size
[rclass
];
748 best_cost
= register_move_cost (outer
, (enum reg_class
) rclass
,
753 gcc_assert (best_size
!= 0);
755 #ifdef LIMIT_RELOAD_CLASS
756 best_class
= LIMIT_RELOAD_CLASS (mode
, best_class
);
761 /* Return the number of a previously made reload that can be combined with
762 a new one, or n_reloads if none of the existing reloads can be used.
763 OUT, RCLASS, TYPE and OPNUM are the same arguments as passed to
764 push_reload, they determine the kind of the new reload that we try to
765 combine. P_IN points to the corresponding value of IN, which can be
766 modified by this function.
767 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
770 find_reusable_reload (rtx
*p_in
, rtx out
, enum reg_class rclass
,
771 enum reload_type type
, int opnum
, int dont_share
)
775 /* We can't merge two reloads if the output of either one is
778 if (earlyclobber_operand_p (out
))
781 /* We can use an existing reload if the class is right
782 and at least one of IN and OUT is a match
783 and the other is at worst neutral.
784 (A zero compared against anything is neutral.)
786 For targets with small register classes, don't use existing reloads
787 unless they are for the same thing since that can cause us to need
788 more reload registers than we otherwise would. */
790 for (i
= 0; i
< n_reloads
; i
++)
791 if ((reg_class_subset_p (rclass
, rld
[i
].rclass
)
792 || reg_class_subset_p (rld
[i
].rclass
, rclass
))
793 /* If the existing reload has a register, it must fit our class. */
794 && (rld
[i
].reg_rtx
== 0
795 || TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
796 true_regnum (rld
[i
].reg_rtx
)))
797 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
798 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
799 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
800 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
801 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
802 && (small_register_class_p (rclass
)
803 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
804 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
807 /* Reloading a plain reg for input can match a reload to postincrement
808 that reg, since the postincrement's value is the right value.
809 Likewise, it can match a preincrement reload, since we regard
810 the preincrementation as happening before any ref in this insn
812 for (i
= 0; i
< n_reloads
; i
++)
813 if ((reg_class_subset_p (rclass
, rld
[i
].rclass
)
814 || reg_class_subset_p (rld
[i
].rclass
, rclass
))
815 /* If the existing reload has a register, it must fit our
817 && (rld
[i
].reg_rtx
== 0
818 || TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
819 true_regnum (rld
[i
].reg_rtx
)))
820 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
822 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == RTX_AUTOINC
823 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
824 || (REG_P (rld
[i
].in
)
825 && GET_RTX_CLASS (GET_CODE (in
)) == RTX_AUTOINC
826 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
827 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
828 && (small_register_class_p (rclass
)
829 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
830 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
831 opnum
, rld
[i
].opnum
))
833 /* Make sure reload_in ultimately has the increment,
834 not the plain register. */
842 /* Return true if X is a SUBREG that will need reloading of its SUBREG_REG
843 expression. MODE is the mode that X will be used in. OUTPUT is true if
844 the function is invoked for the output part of an enclosing reload. */
847 reload_inner_reg_of_subreg (rtx x
, enum machine_mode mode
, bool output
)
851 /* Only SUBREGs are problematical. */
852 if (GET_CODE (x
) != SUBREG
)
855 inner
= SUBREG_REG (x
);
857 /* If INNER is a constant or PLUS, then INNER will need reloading. */
858 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
861 /* If INNER is not a hard register, then INNER will not need reloading. */
862 if (!(REG_P (inner
) && HARD_REGISTER_P (inner
)))
865 /* If INNER is not ok for MODE, then INNER will need reloading. */
866 if (!HARD_REGNO_MODE_OK (subreg_regno (x
), mode
))
869 /* If this is for an output, and the outer part is a word or smaller,
870 INNER is larger than a word and the number of registers in INNER is
871 not the same as the number of words in INNER, then INNER will need
872 reloading (with an in-out reload). */
874 && GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
875 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
876 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
877 != (int) hard_regno_nregs
[REGNO (inner
)][GET_MODE (inner
)]));
880 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
881 requiring an extra reload register. The caller has already found that
882 IN contains some reference to REGNO, so check that we can produce the
883 new value in a single step. E.g. if we have
884 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
885 instruction that adds one to a register, this should succeed.
886 However, if we have something like
887 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
888 needs to be loaded into a register first, we need a separate reload
890 Such PLUS reloads are generated by find_reload_address_part.
891 The out-of-range PLUS expressions are usually introduced in the instruction
892 patterns by register elimination and substituting pseudos without a home
893 by their function-invariant equivalences. */
895 can_reload_into (rtx in
, int regno
, enum machine_mode mode
)
900 struct recog_data_d save_recog_data
;
902 /* For matching constraints, we often get notional input reloads where
903 we want to use the original register as the reload register. I.e.
904 technically this is a non-optional input-output reload, but IN is
905 already a valid register, and has been chosen as the reload register.
906 Speed this up, since it trivially works. */
910 /* To test MEMs properly, we'd have to take into account all the reloads
911 that are already scheduled, which can become quite complicated.
912 And since we've already handled address reloads for this MEM, it
913 should always succeed anyway. */
917 /* If we can make a simple SET insn that does the job, everything should
919 dst
= gen_rtx_REG (mode
, regno
);
920 test_insn
= make_insn_raw (gen_rtx_SET (VOIDmode
, dst
, in
));
921 save_recog_data
= recog_data
;
922 if (recog_memoized (test_insn
) >= 0)
924 extract_insn (test_insn
);
925 r
= constrain_operands (1, get_enabled_alternatives (test_insn
));
927 recog_data
= save_recog_data
;
931 /* Record one reload that needs to be performed.
932 IN is an rtx saying where the data are to be found before this instruction.
933 OUT says where they must be stored after the instruction.
934 (IN is zero for data not read, and OUT is zero for data not written.)
935 INLOC and OUTLOC point to the places in the instructions where
936 IN and OUT were found.
937 If IN and OUT are both nonzero, it means the same register must be used
938 to reload both IN and OUT.
940 RCLASS is a register class required for the reloaded data.
941 INMODE is the machine mode that the instruction requires
942 for the reg that replaces IN and OUTMODE is likewise for OUT.
944 If IN is zero, then OUT's location and mode should be passed as
947 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
949 OPTIONAL nonzero means this reload does not need to be performed:
950 it can be discarded if that is more convenient.
952 OPNUM and TYPE say what the purpose of this reload is.
954 The return value is the reload-number for this reload.
956 If both IN and OUT are nonzero, in some rare cases we might
957 want to make two separate reloads. (Actually we never do this now.)
958 Therefore, the reload-number for OUT is stored in
959 output_reloadnum when we return; the return value applies to IN.
960 Usually (presently always), when IN and OUT are nonzero,
961 the two reload-numbers are equal, but the caller should be careful to
965 push_reload (rtx in
, rtx out
, rtx
*inloc
, rtx
*outloc
,
966 enum reg_class rclass
, enum machine_mode inmode
,
967 enum machine_mode outmode
, int strict_low
, int optional
,
968 int opnum
, enum reload_type type
)
972 int dont_remove_subreg
= 0;
973 #ifdef LIMIT_RELOAD_CLASS
974 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
976 int secondary_in_reload
= -1, secondary_out_reload
= -1;
977 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
978 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
979 enum reg_class subreg_in_class ATTRIBUTE_UNUSED
;
980 subreg_in_class
= NO_REGS
;
982 /* INMODE and/or OUTMODE could be VOIDmode if no mode
983 has been specified for the operand. In that case,
984 use the operand's mode as the mode to reload. */
985 if (inmode
== VOIDmode
&& in
!= 0)
986 inmode
= GET_MODE (in
);
987 if (outmode
== VOIDmode
&& out
!= 0)
988 outmode
= GET_MODE (out
);
990 /* If find_reloads and friends until now missed to replace a pseudo
991 with a constant of reg_equiv_constant something went wrong
993 Note that it can't simply be done here if we missed it earlier
994 since the constant might need to be pushed into the literal pool
995 and the resulting memref would probably need further
997 if (in
!= 0 && REG_P (in
))
999 int regno
= REGNO (in
);
1001 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
1002 || reg_renumber
[regno
] >= 0
1003 || reg_equiv_constant (regno
) == NULL_RTX
);
1006 /* reg_equiv_constant only contains constants which are obviously
1007 not appropriate as destination. So if we would need to replace
1008 the destination pseudo with a constant we are in real
1010 if (out
!= 0 && REG_P (out
))
1012 int regno
= REGNO (out
);
1014 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
1015 || reg_renumber
[regno
] >= 0
1016 || reg_equiv_constant (regno
) == NULL_RTX
);
1019 /* If we have a read-write operand with an address side-effect,
1020 change either IN or OUT so the side-effect happens only once. */
1021 if (in
!= 0 && out
!= 0 && MEM_P (in
) && rtx_equal_p (in
, out
))
1022 switch (GET_CODE (XEXP (in
, 0)))
1024 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
1025 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
1028 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
1029 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
1036 /* If we are reloading a (SUBREG constant ...), really reload just the
1037 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
1038 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
1039 a pseudo and hence will become a MEM) with M1 wider than M2 and the
1040 register is a pseudo, also reload the inside expression.
1041 For machines that extend byte loads, do this for any SUBREG of a pseudo
1042 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
1043 M2 is an integral mode that gets extended when loaded.
1044 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1045 where either M1 is not valid for R or M2 is wider than a word but we
1046 only need one register to store an M2-sized quantity in R.
1047 (However, if OUT is nonzero, we need to reload the reg *and*
1048 the subreg, so do nothing here, and let following statement handle it.)
1050 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
1051 we can't handle it here because CONST_INT does not indicate a mode.
1053 Similarly, we must reload the inside expression if we have a
1054 STRICT_LOW_PART (presumably, in == out in this case).
1056 Also reload the inner expression if it does not require a secondary
1057 reload but the SUBREG does.
1059 Finally, reload the inner expression if it is a register that is in
1060 the class whose registers cannot be referenced in a different size
1061 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
1062 cannot reload just the inside since we might end up with the wrong
1063 register class. But if it is inside a STRICT_LOW_PART, we have
1064 no choice, so we hope we do get the right register class there. */
1066 if (in
!= 0 && GET_CODE (in
) == SUBREG
1067 && (subreg_lowpart_p (in
) || strict_low
)
1068 #ifdef CANNOT_CHANGE_MODE_CLASS
1069 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in
)), inmode
, rclass
)
1071 && contains_reg_of_mode
[(int) rclass
][(int) GET_MODE (SUBREG_REG (in
))]
1072 && (CONSTANT_P (SUBREG_REG (in
))
1073 || GET_CODE (SUBREG_REG (in
)) == PLUS
1075 || (((REG_P (SUBREG_REG (in
))
1076 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
1077 || MEM_P (SUBREG_REG (in
)))
1078 && ((GET_MODE_PRECISION (inmode
)
1079 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (in
))))
1080 #ifdef LOAD_EXTEND_OP
1081 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1082 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1084 && (GET_MODE_PRECISION (inmode
)
1085 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (in
))))
1086 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
1087 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != UNKNOWN
)
1089 #ifdef WORD_REGISTER_OPERATIONS
1090 || ((GET_MODE_PRECISION (inmode
)
1091 < GET_MODE_PRECISION (GET_MODE (SUBREG_REG (in
))))
1092 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
1093 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
1097 || (REG_P (SUBREG_REG (in
))
1098 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1099 /* The case where out is nonzero
1100 is handled differently in the following statement. */
1101 && (out
== 0 || subreg_lowpart_p (in
))
1102 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1103 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1105 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1107 != (int) hard_regno_nregs
[REGNO (SUBREG_REG (in
))]
1108 [GET_MODE (SUBREG_REG (in
))]))
1109 || ! HARD_REGNO_MODE_OK (subreg_regno (in
), inmode
)))
1110 || (secondary_reload_class (1, rclass
, inmode
, in
) != NO_REGS
1111 && (secondary_reload_class (1, rclass
, GET_MODE (SUBREG_REG (in
)),
1114 #ifdef CANNOT_CHANGE_MODE_CLASS
1115 || (REG_P (SUBREG_REG (in
))
1116 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1117 && REG_CANNOT_CHANGE_MODE_P
1118 (REGNO (SUBREG_REG (in
)), GET_MODE (SUBREG_REG (in
)), inmode
))
1122 #ifdef LIMIT_RELOAD_CLASS
1123 in_subreg_loc
= inloc
;
1125 inloc
= &SUBREG_REG (in
);
1127 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1129 /* This is supposed to happen only for paradoxical subregs made by
1130 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1131 gcc_assert (GET_MODE_SIZE (GET_MODE (in
)) <= GET_MODE_SIZE (inmode
));
1133 inmode
= GET_MODE (in
);
1136 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1137 where M1 is not valid for R if it was not handled by the code above.
1139 Similar issue for (SUBREG constant ...) if it was not handled by the
1140 code above. This can happen if SUBREG_BYTE != 0.
1142 However, we must reload the inner reg *as well as* the subreg in
1145 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
, false))
1147 if (REG_P (SUBREG_REG (in
)))
1149 = find_valid_class (inmode
, GET_MODE (SUBREG_REG (in
)),
1150 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1151 GET_MODE (SUBREG_REG (in
)),
1154 REGNO (SUBREG_REG (in
)));
1155 else if (GET_CODE (SUBREG_REG (in
)) == SYMBOL_REF
)
1156 subreg_in_class
= find_valid_class_1 (inmode
,
1157 GET_MODE (SUBREG_REG (in
)),
1160 /* This relies on the fact that emit_reload_insns outputs the
1161 instructions for input reloads of type RELOAD_OTHER in the same
1162 order as the reloads. Thus if the outer reload is also of type
1163 RELOAD_OTHER, we are guaranteed that this inner reload will be
1164 output before the outer reload. */
1165 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*) 0,
1166 subreg_in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1167 dont_remove_subreg
= 1;
1170 /* Similarly for paradoxical and problematical SUBREGs on the output.
1171 Note that there is no reason we need worry about the previous value
1172 of SUBREG_REG (out); even if wider than out, storing in a subreg is
1173 entitled to clobber it all (except in the case of a word mode subreg
1174 or of a STRICT_LOW_PART, in that latter case the constraint should
1175 label it input-output.) */
1176 if (out
!= 0 && GET_CODE (out
) == SUBREG
1177 && (subreg_lowpart_p (out
) || strict_low
)
1178 #ifdef CANNOT_CHANGE_MODE_CLASS
1179 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out
)), outmode
, rclass
)
1181 && contains_reg_of_mode
[(int) rclass
][(int) GET_MODE (SUBREG_REG (out
))]
1182 && (CONSTANT_P (SUBREG_REG (out
))
1184 || (((REG_P (SUBREG_REG (out
))
1185 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1186 || MEM_P (SUBREG_REG (out
)))
1187 && ((GET_MODE_PRECISION (outmode
)
1188 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (out
))))
1189 #ifdef WORD_REGISTER_OPERATIONS
1190 || ((GET_MODE_PRECISION (outmode
)
1191 < GET_MODE_PRECISION (GET_MODE (SUBREG_REG (out
))))
1192 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1193 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1197 || (REG_P (SUBREG_REG (out
))
1198 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1199 /* The case of a word mode subreg
1200 is handled differently in the following statement. */
1201 && ! (GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1202 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1204 && ! HARD_REGNO_MODE_OK (subreg_regno (out
), outmode
))
1205 || (secondary_reload_class (0, rclass
, outmode
, out
) != NO_REGS
1206 && (secondary_reload_class (0, rclass
, GET_MODE (SUBREG_REG (out
)),
1209 #ifdef CANNOT_CHANGE_MODE_CLASS
1210 || (REG_P (SUBREG_REG (out
))
1211 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1212 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out
)),
1213 GET_MODE (SUBREG_REG (out
)),
1218 #ifdef LIMIT_RELOAD_CLASS
1219 out_subreg_loc
= outloc
;
1221 outloc
= &SUBREG_REG (out
);
1223 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1224 gcc_assert (!MEM_P (out
)
1225 || GET_MODE_SIZE (GET_MODE (out
))
1226 <= GET_MODE_SIZE (outmode
));
1228 outmode
= GET_MODE (out
);
1231 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1232 where either M1 is not valid for R or M2 is wider than a word but we
1233 only need one register to store an M2-sized quantity in R.
1235 However, we must reload the inner reg *as well as* the subreg in
1236 that case and the inner reg is an in-out reload. */
1238 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
, true))
1240 enum reg_class in_out_class
1241 = find_valid_class (outmode
, GET_MODE (SUBREG_REG (out
)),
1242 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1243 GET_MODE (SUBREG_REG (out
)),
1246 REGNO (SUBREG_REG (out
)));
1248 /* This relies on the fact that emit_reload_insns outputs the
1249 instructions for output reloads of type RELOAD_OTHER in reverse
1250 order of the reloads. Thus if the outer reload is also of type
1251 RELOAD_OTHER, we are guaranteed that this inner reload will be
1252 output after the outer reload. */
1253 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1254 &SUBREG_REG (out
), in_out_class
, VOIDmode
, VOIDmode
,
1255 0, 0, opnum
, RELOAD_OTHER
);
1256 dont_remove_subreg
= 1;
1259 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1260 if (in
!= 0 && out
!= 0 && MEM_P (out
)
1261 && (REG_P (in
) || MEM_P (in
) || GET_CODE (in
) == PLUS
)
1262 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1265 /* If IN is a SUBREG of a hard register, make a new REG. This
1266 simplifies some of the cases below. */
1268 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))
1269 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1270 && ! dont_remove_subreg
)
1271 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1273 /* Similarly for OUT. */
1274 if (out
!= 0 && GET_CODE (out
) == SUBREG
1275 && REG_P (SUBREG_REG (out
))
1276 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1277 && ! dont_remove_subreg
)
1278 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1280 /* Narrow down the class of register wanted if that is
1281 desirable on this machine for efficiency. */
1283 reg_class_t preferred_class
= rclass
;
1286 preferred_class
= targetm
.preferred_reload_class (in
, rclass
);
1288 /* Output reloads may need analogous treatment, different in detail. */
1291 = targetm
.preferred_output_reload_class (out
, preferred_class
);
1293 /* Discard what the target said if we cannot do it. */
1294 if (preferred_class
!= NO_REGS
1295 || (optional
&& type
== RELOAD_FOR_OUTPUT
))
1296 rclass
= (enum reg_class
) preferred_class
;
1299 /* Make sure we use a class that can handle the actual pseudo
1300 inside any subreg. For example, on the 386, QImode regs
1301 can appear within SImode subregs. Although GENERAL_REGS
1302 can handle SImode, QImode needs a smaller class. */
1303 #ifdef LIMIT_RELOAD_CLASS
1305 rclass
= LIMIT_RELOAD_CLASS (inmode
, rclass
);
1306 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1307 rclass
= LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), rclass
);
1310 rclass
= LIMIT_RELOAD_CLASS (outmode
, rclass
);
1311 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1312 rclass
= LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), rclass
);
1315 /* Verify that this class is at least possible for the mode that
1317 if (this_insn_is_asm
)
1319 enum machine_mode mode
;
1320 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1324 if (mode
== VOIDmode
)
1326 error_for_asm (this_insn
, "cannot reload integer constant "
1327 "operand in %<asm%>");
1332 outmode
= word_mode
;
1334 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1335 if (HARD_REGNO_MODE_OK (i
, mode
)
1336 && in_hard_reg_set_p (reg_class_contents
[(int) rclass
], mode
, i
))
1338 if (i
== FIRST_PSEUDO_REGISTER
)
1340 error_for_asm (this_insn
, "impossible register constraint "
1342 /* Avoid further trouble with this insn. */
1343 PATTERN (this_insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
1344 /* We used to continue here setting class to ALL_REGS, but it triggers
1345 sanity check on i386 for:
1346 void foo(long double d)
1350 Returning zero here ought to be safe as we take care in
1351 find_reloads to not process the reloads when instruction was
1358 /* Optional output reloads are always OK even if we have no register class,
1359 since the function of these reloads is only to have spill_reg_store etc.
1360 set, so that the storing insn can be deleted later. */
1361 gcc_assert (rclass
!= NO_REGS
1362 || (optional
!= 0 && type
== RELOAD_FOR_OUTPUT
));
1364 i
= find_reusable_reload (&in
, out
, rclass
, type
, opnum
, dont_share
);
1368 /* See if we need a secondary reload register to move between CLASS
1369 and IN or CLASS and OUT. Get the icode and push any required reloads
1370 needed for each of them if so. */
1374 = push_secondary_reload (1, in
, opnum
, optional
, rclass
, inmode
, type
,
1375 &secondary_in_icode
, NULL
);
1376 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1377 secondary_out_reload
1378 = push_secondary_reload (0, out
, opnum
, optional
, rclass
, outmode
,
1379 type
, &secondary_out_icode
, NULL
);
1381 /* We found no existing reload suitable for re-use.
1382 So add an additional reload. */
1384 #ifdef SECONDARY_MEMORY_NEEDED
1385 if (subreg_in_class
== NO_REGS
1388 || (GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))))
1389 && reg_or_subregno (in
) < FIRST_PSEUDO_REGISTER
)
1390 subreg_in_class
= REGNO_REG_CLASS (reg_or_subregno (in
));
1391 /* If a memory location is needed for the copy, make one. */
1392 if (subreg_in_class
!= NO_REGS
1393 && SECONDARY_MEMORY_NEEDED (subreg_in_class
, rclass
, inmode
))
1394 get_secondary_mem (in
, inmode
, opnum
, type
);
1400 rld
[i
].rclass
= rclass
;
1401 rld
[i
].inmode
= inmode
;
1402 rld
[i
].outmode
= outmode
;
1404 rld
[i
].optional
= optional
;
1406 rld
[i
].nocombine
= 0;
1407 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1408 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1409 rld
[i
].opnum
= opnum
;
1410 rld
[i
].when_needed
= type
;
1411 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1412 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1413 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1414 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1415 rld
[i
].secondary_p
= 0;
1419 #ifdef SECONDARY_MEMORY_NEEDED
1422 || (GET_CODE (out
) == SUBREG
&& REG_P (SUBREG_REG (out
))))
1423 && reg_or_subregno (out
) < FIRST_PSEUDO_REGISTER
1424 && SECONDARY_MEMORY_NEEDED (rclass
,
1425 REGNO_REG_CLASS (reg_or_subregno (out
)),
1427 get_secondary_mem (out
, outmode
, opnum
, type
);
1432 /* We are reusing an existing reload,
1433 but we may have additional information for it.
1434 For example, we may now have both IN and OUT
1435 while the old one may have just one of them. */
1437 /* The modes can be different. If they are, we want to reload in
1438 the larger mode, so that the value is valid for both modes. */
1439 if (inmode
!= VOIDmode
1440 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1441 rld
[i
].inmode
= inmode
;
1442 if (outmode
!= VOIDmode
1443 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1444 rld
[i
].outmode
= outmode
;
1447 rtx in_reg
= inloc
? *inloc
: 0;
1448 /* If we merge reloads for two distinct rtl expressions that
1449 are identical in content, there might be duplicate address
1450 reloads. Remove the extra set now, so that if we later find
1451 that we can inherit this reload, we can get rid of the
1452 address reloads altogether.
1454 Do not do this if both reloads are optional since the result
1455 would be an optional reload which could potentially leave
1456 unresolved address replacements.
1458 It is not sufficient to call transfer_replacements since
1459 choose_reload_regs will remove the replacements for address
1460 reloads of inherited reloads which results in the same
1462 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1463 && ! (rld
[i
].optional
&& optional
))
1465 /* We must keep the address reload with the lower operand
1467 if (opnum
> rld
[i
].opnum
)
1469 remove_address_replacements (in
);
1471 in_reg
= rld
[i
].in_reg
;
1474 remove_address_replacements (rld
[i
].in
);
1476 /* When emitting reloads we don't necessarily look at the in-
1477 and outmode, but also directly at the operands (in and out).
1478 So we can't simply overwrite them with whatever we have found
1479 for this (to-be-merged) reload, we have to "merge" that too.
1480 Reusing another reload already verified that we deal with the
1481 same operands, just possibly in different modes. So we
1482 overwrite the operands only when the new mode is larger.
1483 See also PR33613. */
1485 || GET_MODE_SIZE (GET_MODE (in
))
1486 > GET_MODE_SIZE (GET_MODE (rld
[i
].in
)))
1490 && GET_MODE_SIZE (GET_MODE (in_reg
))
1491 > GET_MODE_SIZE (GET_MODE (rld
[i
].in_reg
))))
1492 rld
[i
].in_reg
= in_reg
;
1498 && GET_MODE_SIZE (GET_MODE (out
))
1499 > GET_MODE_SIZE (GET_MODE (rld
[i
].out
))))
1503 || GET_MODE_SIZE (GET_MODE (*outloc
))
1504 > GET_MODE_SIZE (GET_MODE (rld
[i
].out_reg
))))
1505 rld
[i
].out_reg
= *outloc
;
1507 if (reg_class_subset_p (rclass
, rld
[i
].rclass
))
1508 rld
[i
].rclass
= rclass
;
1509 rld
[i
].optional
&= optional
;
1510 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1511 opnum
, rld
[i
].opnum
))
1512 rld
[i
].when_needed
= RELOAD_OTHER
;
1513 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1516 /* If the ostensible rtx being reloaded differs from the rtx found
1517 in the location to substitute, this reload is not safe to combine
1518 because we cannot reliably tell whether it appears in the insn. */
1520 if (in
!= 0 && in
!= *inloc
)
1521 rld
[i
].nocombine
= 1;
1524 /* This was replaced by changes in find_reloads_address_1 and the new
1525 function inc_for_reload, which go with a new meaning of reload_inc. */
1527 /* If this is an IN/OUT reload in an insn that sets the CC,
1528 it must be for an autoincrement. It doesn't work to store
1529 the incremented value after the insn because that would clobber the CC.
1530 So we must do the increment of the value reloaded from,
1531 increment it, store it back, then decrement again. */
1532 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1536 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1537 /* If we did not find a nonzero amount-to-increment-by,
1538 that contradicts the belief that IN is being incremented
1539 in an address in this insn. */
1540 gcc_assert (rld
[i
].inc
!= 0);
1544 /* If we will replace IN and OUT with the reload-reg,
1545 record where they are located so that substitution need
1546 not do a tree walk. */
1548 if (replace_reloads
)
1552 struct replacement
*r
= &replacements
[n_replacements
++];
1557 if (outloc
!= 0 && outloc
!= inloc
)
1559 struct replacement
*r
= &replacements
[n_replacements
++];
1566 /* If this reload is just being introduced and it has both
1567 an incoming quantity and an outgoing quantity that are
1568 supposed to be made to match, see if either one of the two
1569 can serve as the place to reload into.
1571 If one of them is acceptable, set rld[i].reg_rtx
1574 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1576 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1579 earlyclobber_operand_p (out
));
1581 /* If the outgoing register already contains the same value
1582 as the incoming one, we can dispense with loading it.
1583 The easiest way to tell the caller that is to give a phony
1584 value for the incoming operand (same as outgoing one). */
1585 if (rld
[i
].reg_rtx
== out
1586 && (REG_P (in
) || CONSTANT_P (in
))
1587 && 0 != find_equiv_reg (in
, this_insn
, NO_REGS
, REGNO (out
),
1588 static_reload_reg_p
, i
, inmode
))
1592 /* If this is an input reload and the operand contains a register that
1593 dies in this insn and is used nowhere else, see if it is the right class
1594 to be used for this reload. Use it if so. (This occurs most commonly
1595 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1596 this if it is also an output reload that mentions the register unless
1597 the output is a SUBREG that clobbers an entire register.
1599 Note that the operand might be one of the spill regs, if it is a
1600 pseudo reg and we are in a block where spilling has not taken place.
1601 But if there is no spilling in this block, that is OK.
1602 An explicitly used hard reg cannot be a spill reg. */
1604 if (rld
[i
].reg_rtx
== 0 && in
!= 0 && hard_regs_live_known
)
1608 enum machine_mode rel_mode
= inmode
;
1610 if (out
&& GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (inmode
))
1613 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1614 if (REG_NOTE_KIND (note
) == REG_DEAD
1615 && REG_P (XEXP (note
, 0))
1616 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1617 && reg_mentioned_p (XEXP (note
, 0), in
)
1618 /* Check that a former pseudo is valid; see find_dummy_reload. */
1619 && (ORIGINAL_REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1620 || (! bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)),
1621 ORIGINAL_REGNO (XEXP (note
, 0)))
1622 && hard_regno_nregs
[regno
][GET_MODE (XEXP (note
, 0))] == 1))
1623 && ! refers_to_regno_for_reload_p (regno
,
1624 end_hard_regno (rel_mode
,
1626 PATTERN (this_insn
), inloc
)
1627 /* If this is also an output reload, IN cannot be used as
1628 the reload register if it is set in this insn unless IN
1630 && (out
== 0 || in
== out
1631 || ! hard_reg_set_here_p (regno
,
1632 end_hard_regno (rel_mode
, regno
),
1633 PATTERN (this_insn
)))
1634 /* ??? Why is this code so different from the previous?
1635 Is there any simple coherent way to describe the two together?
1636 What's going on here. */
1638 || (GET_CODE (in
) == SUBREG
1639 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1641 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1642 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1643 /* Make sure the operand fits in the reg that dies. */
1644 && (GET_MODE_SIZE (rel_mode
)
1645 <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1646 && HARD_REGNO_MODE_OK (regno
, inmode
)
1647 && HARD_REGNO_MODE_OK (regno
, outmode
))
1650 unsigned int nregs
= MAX (hard_regno_nregs
[regno
][inmode
],
1651 hard_regno_nregs
[regno
][outmode
]);
1653 for (offs
= 0; offs
< nregs
; offs
++)
1654 if (fixed_regs
[regno
+ offs
]
1655 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
1660 && (! (refers_to_regno_for_reload_p
1661 (regno
, end_hard_regno (inmode
, regno
), in
, (rtx
*) 0))
1662 || can_reload_into (in
, regno
, inmode
)))
1664 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1671 output_reloadnum
= i
;
1676 /* Record an additional place we must replace a value
1677 for which we have already recorded a reload.
1678 RELOADNUM is the value returned by push_reload
1679 when the reload was recorded.
1680 This is used in insn patterns that use match_dup. */
1683 push_replacement (rtx
*loc
, int reloadnum
, enum machine_mode mode
)
1685 if (replace_reloads
)
1687 struct replacement
*r
= &replacements
[n_replacements
++];
1688 r
->what
= reloadnum
;
1694 /* Duplicate any replacement we have recorded to apply at
1695 location ORIG_LOC to also be performed at DUP_LOC.
1696 This is used in insn patterns that use match_dup. */
1699 dup_replacements (rtx
*dup_loc
, rtx
*orig_loc
)
1701 int i
, n
= n_replacements
;
1703 for (i
= 0; i
< n
; i
++)
1705 struct replacement
*r
= &replacements
[i
];
1706 if (r
->where
== orig_loc
)
1707 push_replacement (dup_loc
, r
->what
, r
->mode
);
1711 /* Transfer all replacements that used to be in reload FROM to be in
1715 transfer_replacements (int to
, int from
)
1719 for (i
= 0; i
< n_replacements
; i
++)
1720 if (replacements
[i
].what
== from
)
1721 replacements
[i
].what
= to
;
1724 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1725 or a subpart of it. If we have any replacements registered for IN_RTX,
1726 cancel the reloads that were supposed to load them.
1727 Return nonzero if we canceled any reloads. */
1729 remove_address_replacements (rtx in_rtx
)
1732 char reload_flags
[MAX_RELOADS
];
1733 int something_changed
= 0;
1735 memset (reload_flags
, 0, sizeof reload_flags
);
1736 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1738 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1739 reload_flags
[replacements
[i
].what
] |= 1;
1742 replacements
[j
++] = replacements
[i
];
1743 reload_flags
[replacements
[i
].what
] |= 2;
1746 /* Note that the following store must be done before the recursive calls. */
1749 for (i
= n_reloads
- 1; i
>= 0; i
--)
1751 if (reload_flags
[i
] == 1)
1753 deallocate_reload_reg (i
);
1754 remove_address_replacements (rld
[i
].in
);
1756 something_changed
= 1;
1759 return something_changed
;
1762 /* If there is only one output reload, and it is not for an earlyclobber
1763 operand, try to combine it with a (logically unrelated) input reload
1764 to reduce the number of reload registers needed.
1766 This is safe if the input reload does not appear in
1767 the value being output-reloaded, because this implies
1768 it is not needed any more once the original insn completes.
1770 If that doesn't work, see we can use any of the registers that
1771 die in this insn as a reload register. We can if it is of the right
1772 class and does not appear in the value being output-reloaded. */
1775 combine_reloads (void)
1778 int output_reload
= -1;
1779 int secondary_out
= -1;
1782 /* Find the output reload; return unless there is exactly one
1783 and that one is mandatory. */
1785 for (i
= 0; i
< n_reloads
; i
++)
1786 if (rld
[i
].out
!= 0)
1788 if (output_reload
>= 0)
1793 if (output_reload
< 0 || rld
[output_reload
].optional
)
1796 /* An input-output reload isn't combinable. */
1798 if (rld
[output_reload
].in
!= 0)
1801 /* If this reload is for an earlyclobber operand, we can't do anything. */
1802 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1805 /* If there is a reload for part of the address of this operand, we would
1806 need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1807 its life to the point where doing this combine would not lower the
1808 number of spill registers needed. */
1809 for (i
= 0; i
< n_reloads
; i
++)
1810 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
1811 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
1812 && rld
[i
].opnum
== rld
[output_reload
].opnum
)
1815 /* Check each input reload; can we combine it? */
1817 for (i
= 0; i
< n_reloads
; i
++)
1818 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1819 /* Life span of this reload must not extend past main insn. */
1820 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1821 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1822 && rld
[i
].when_needed
!= RELOAD_OTHER
1823 && (ira_reg_class_max_nregs
[(int)rld
[i
].rclass
][(int) rld
[i
].inmode
]
1824 == ira_reg_class_max_nregs
[(int) rld
[output_reload
].rclass
]
1825 [(int) rld
[output_reload
].outmode
])
1827 && rld
[i
].reg_rtx
== 0
1828 #ifdef SECONDARY_MEMORY_NEEDED
1829 /* Don't combine two reloads with different secondary
1830 memory locations. */
1831 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1832 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1833 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1834 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1836 && (targetm
.small_register_classes_for_mode_p (VOIDmode
)
1837 ? (rld
[i
].rclass
== rld
[output_reload
].rclass
)
1838 : (reg_class_subset_p (rld
[i
].rclass
,
1839 rld
[output_reload
].rclass
)
1840 || reg_class_subset_p (rld
[output_reload
].rclass
,
1842 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1843 /* Args reversed because the first arg seems to be
1844 the one that we imagine being modified
1845 while the second is the one that might be affected. */
1846 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1848 /* However, if the input is a register that appears inside
1849 the output, then we also can't share.
1850 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1851 If the same reload reg is used for both reg 69 and the
1852 result to be stored in memory, then that result
1853 will clobber the address of the memory ref. */
1854 && ! (REG_P (rld
[i
].in
)
1855 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1856 rld
[output_reload
].out
))))
1857 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
,
1858 rld
[i
].when_needed
!= RELOAD_FOR_INPUT
)
1859 && (reg_class_size
[(int) rld
[i
].rclass
]
1860 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
1861 /* We will allow making things slightly worse by combining an
1862 input and an output, but no worse than that. */
1863 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1864 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1868 /* We have found a reload to combine with! */
1869 rld
[i
].out
= rld
[output_reload
].out
;
1870 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1871 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1872 /* Mark the old output reload as inoperative. */
1873 rld
[output_reload
].out
= 0;
1874 /* The combined reload is needed for the entire insn. */
1875 rld
[i
].when_needed
= RELOAD_OTHER
;
1876 /* If the output reload had a secondary reload, copy it. */
1877 if (rld
[output_reload
].secondary_out_reload
!= -1)
1879 rld
[i
].secondary_out_reload
1880 = rld
[output_reload
].secondary_out_reload
;
1881 rld
[i
].secondary_out_icode
1882 = rld
[output_reload
].secondary_out_icode
;
1885 #ifdef SECONDARY_MEMORY_NEEDED
1886 /* Copy any secondary MEM. */
1887 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1888 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1889 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1891 /* If required, minimize the register class. */
1892 if (reg_class_subset_p (rld
[output_reload
].rclass
,
1894 rld
[i
].rclass
= rld
[output_reload
].rclass
;
1896 /* Transfer all replacements from the old reload to the combined. */
1897 for (j
= 0; j
< n_replacements
; j
++)
1898 if (replacements
[j
].what
== output_reload
)
1899 replacements
[j
].what
= i
;
1904 /* If this insn has only one operand that is modified or written (assumed
1905 to be the first), it must be the one corresponding to this reload. It
1906 is safe to use anything that dies in this insn for that output provided
1907 that it does not occur in the output (we already know it isn't an
1908 earlyclobber. If this is an asm insn, give up. */
1910 if (INSN_CODE (this_insn
) == -1)
1913 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1914 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1915 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1918 /* See if some hard register that dies in this insn and is not used in
1919 the output is the right class. Only works if the register we pick
1920 up can fully hold our output reload. */
1921 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1922 if (REG_NOTE_KIND (note
) == REG_DEAD
1923 && REG_P (XEXP (note
, 0))
1924 && !reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1925 rld
[output_reload
].out
)
1926 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1927 && HARD_REGNO_MODE_OK (regno
, rld
[output_reload
].outmode
)
1928 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].rclass
],
1930 && (hard_regno_nregs
[regno
][rld
[output_reload
].outmode
]
1931 <= hard_regno_nregs
[regno
][GET_MODE (XEXP (note
, 0))])
1932 /* Ensure that a secondary or tertiary reload for this output
1933 won't want this register. */
1934 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1935 || (!(TEST_HARD_REG_BIT
1936 (reg_class_contents
[(int) rld
[secondary_out
].rclass
], regno
))
1937 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1938 || !(TEST_HARD_REG_BIT
1939 (reg_class_contents
[(int) rld
[secondary_out
].rclass
],
1941 && !fixed_regs
[regno
]
1942 /* Check that a former pseudo is valid; see find_dummy_reload. */
1943 && (ORIGINAL_REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1944 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)),
1945 ORIGINAL_REGNO (XEXP (note
, 0)))
1946 && hard_regno_nregs
[regno
][GET_MODE (XEXP (note
, 0))] == 1)))
1948 rld
[output_reload
].reg_rtx
1949 = gen_rtx_REG (rld
[output_reload
].outmode
, regno
);
1954 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1955 See if one of IN and OUT is a register that may be used;
1956 this is desirable since a spill-register won't be needed.
1957 If so, return the register rtx that proves acceptable.
1959 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1960 RCLASS is the register class required for the reload.
1962 If FOR_REAL is >= 0, it is the number of the reload,
1963 and in some cases when it can be discovered that OUT doesn't need
1964 to be computed, clear out rld[FOR_REAL].out.
1966 If FOR_REAL is -1, this should not be done, because this call
1967 is just to see if a register can be found, not to find and install it.
1969 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1970 puts an additional constraint on being able to use IN for OUT since
1971 IN must not appear elsewhere in the insn (it is assumed that IN itself
1972 is safe from the earlyclobber). */
1975 find_dummy_reload (rtx real_in
, rtx real_out
, rtx
*inloc
, rtx
*outloc
,
1976 enum machine_mode inmode
, enum machine_mode outmode
,
1977 reg_class_t rclass
, int for_real
, int earlyclobber
)
1985 /* If operands exceed a word, we can't use either of them
1986 unless they have the same size. */
1987 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1988 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1989 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1992 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1993 respectively refers to a hard register. */
1995 /* Find the inside of any subregs. */
1996 while (GET_CODE (out
) == SUBREG
)
1998 if (REG_P (SUBREG_REG (out
))
1999 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
2000 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
2001 GET_MODE (SUBREG_REG (out
)),
2004 out
= SUBREG_REG (out
);
2006 while (GET_CODE (in
) == SUBREG
)
2008 if (REG_P (SUBREG_REG (in
))
2009 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
2010 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
2011 GET_MODE (SUBREG_REG (in
)),
2014 in
= SUBREG_REG (in
);
2017 /* Narrow down the reg class, the same way push_reload will;
2018 otherwise we might find a dummy now, but push_reload won't. */
2020 reg_class_t preferred_class
= targetm
.preferred_reload_class (in
, rclass
);
2021 if (preferred_class
!= NO_REGS
)
2022 rclass
= (enum reg_class
) preferred_class
;
2025 /* See if OUT will do. */
2027 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
2029 unsigned int regno
= REGNO (out
) + out_offset
;
2030 unsigned int nwords
= hard_regno_nregs
[regno
][outmode
];
2033 /* When we consider whether the insn uses OUT,
2034 ignore references within IN. They don't prevent us
2035 from copying IN into OUT, because those refs would
2036 move into the insn that reloads IN.
2038 However, we only ignore IN in its role as this reload.
2039 If the insn uses IN elsewhere and it contains OUT,
2040 that counts. We can't be sure it's the "same" operand
2041 so it might not go through this reload.
2043 We also need to avoid using OUT if it, or part of it, is a
2044 fixed register. Modifying such registers, even transiently,
2045 may have undefined effects on the machine, such as modifying
2046 the stack pointer. */
2048 *inloc
= const0_rtx
;
2050 if (regno
< FIRST_PSEUDO_REGISTER
2051 && HARD_REGNO_MODE_OK (regno
, outmode
)
2052 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
2053 PATTERN (this_insn
), outloc
))
2057 for (i
= 0; i
< nwords
; i
++)
2058 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
2060 || fixed_regs
[regno
+ i
])
2065 if (REG_P (real_out
))
2068 value
= gen_rtx_REG (outmode
, regno
);
2075 /* Consider using IN if OUT was not acceptable
2076 or if OUT dies in this insn (like the quotient in a divmod insn).
2077 We can't use IN unless it is dies in this insn,
2078 which means we must know accurately which hard regs are live.
2079 Also, the result can't go in IN if IN is used within OUT,
2080 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
2081 if (hard_regs_live_known
2083 && REGNO (in
) < FIRST_PSEUDO_REGISTER
2085 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
2086 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
2087 && !fixed_regs
[REGNO (in
)]
2088 && HARD_REGNO_MODE_OK (REGNO (in
),
2089 /* The only case where out and real_out might
2090 have different modes is where real_out
2091 is a subreg, and in that case, out
2093 (GET_MODE (out
) != VOIDmode
2094 ? GET_MODE (out
) : outmode
))
2095 && (ORIGINAL_REGNO (in
) < FIRST_PSEUDO_REGISTER
2096 /* However only do this if we can be sure that this input
2097 operand doesn't correspond with an uninitialized pseudo.
2098 global can assign some hardreg to it that is the same as
2099 the one assigned to a different, also live pseudo (as it
2100 can ignore the conflict). We must never introduce writes
2101 to such hardregs, as they would clobber the other live
2102 pseudo. See PR 20973. */
2103 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)),
2104 ORIGINAL_REGNO (in
))
2105 /* Similarly, only do this if we can be sure that the death
2106 note is still valid. global can assign some hardreg to
2107 the pseudo referenced in the note and simultaneously a
2108 subword of this hardreg to a different, also live pseudo,
2109 because only another subword of the hardreg is actually
2110 used in the insn. This cannot happen if the pseudo has
2111 been assigned exactly one hardreg. See PR 33732. */
2112 && hard_regno_nregs
[REGNO (in
)][GET_MODE (in
)] == 1)))
2114 unsigned int regno
= REGNO (in
) + in_offset
;
2115 unsigned int nwords
= hard_regno_nregs
[regno
][inmode
];
2117 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*) 0)
2118 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
2119 PATTERN (this_insn
))
2121 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
2122 PATTERN (this_insn
), inloc
)))
2126 for (i
= 0; i
< nwords
; i
++)
2127 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
2133 /* If we were going to use OUT as the reload reg
2134 and changed our mind, it means OUT is a dummy that
2135 dies here. So don't bother copying value to it. */
2136 if (for_real
>= 0 && value
== real_out
)
2137 rld
[for_real
].out
= 0;
2138 if (REG_P (real_in
))
2141 value
= gen_rtx_REG (inmode
, regno
);
2149 /* This page contains subroutines used mainly for determining
2150 whether the IN or an OUT of a reload can serve as the
2153 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2156 earlyclobber_operand_p (rtx x
)
2160 for (i
= 0; i
< n_earlyclobbers
; i
++)
2161 if (reload_earlyclobbers
[i
] == x
)
2167 /* Return 1 if expression X alters a hard reg in the range
2168 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2169 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2170 X should be the body of an instruction. */
2173 hard_reg_set_here_p (unsigned int beg_regno
, unsigned int end_regno
, rtx x
)
2175 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
2177 rtx op0
= SET_DEST (x
);
2179 while (GET_CODE (op0
) == SUBREG
)
2180 op0
= SUBREG_REG (op0
);
2183 unsigned int r
= REGNO (op0
);
2185 /* See if this reg overlaps range under consideration. */
2187 && end_hard_regno (GET_MODE (op0
), r
) > beg_regno
)
2191 else if (GET_CODE (x
) == PARALLEL
)
2193 int i
= XVECLEN (x
, 0) - 1;
2196 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
2203 /* Return 1 if ADDR is a valid memory address for mode MODE
2204 in address space AS, and check that each pseudo reg has the
2205 proper kind of hard reg. */
2208 strict_memory_address_addr_space_p (enum machine_mode mode ATTRIBUTE_UNUSED
,
2209 rtx addr
, addr_space_t as
)
2211 #ifdef GO_IF_LEGITIMATE_ADDRESS
2212 gcc_assert (ADDR_SPACE_GENERIC_P (as
));
2213 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2219 return targetm
.addr_space
.legitimate_address_p (mode
, addr
, 1, as
);
2223 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2224 if they are the same hard reg, and has special hacks for
2225 autoincrement and autodecrement.
2226 This is specifically intended for find_reloads to use
2227 in determining whether two operands match.
2228 X is the operand whose number is the lower of the two.
2230 The value is 2 if Y contains a pre-increment that matches
2231 a non-incrementing address in X. */
2233 /* ??? To be completely correct, we should arrange to pass
2234 for X the output operand and for Y the input operand.
2235 For now, we assume that the output operand has the lower number
2236 because that is natural in (SET output (... input ...)). */
2239 operands_match_p (rtx x
, rtx y
)
2242 RTX_CODE code
= GET_CODE (x
);
2248 if ((code
== REG
|| (code
== SUBREG
&& REG_P (SUBREG_REG (x
))))
2249 && (REG_P (y
) || (GET_CODE (y
) == SUBREG
2250 && REG_P (SUBREG_REG (y
)))))
2256 i
= REGNO (SUBREG_REG (x
));
2257 if (i
>= FIRST_PSEUDO_REGISTER
)
2259 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2260 GET_MODE (SUBREG_REG (x
)),
2267 if (GET_CODE (y
) == SUBREG
)
2269 j
= REGNO (SUBREG_REG (y
));
2270 if (j
>= FIRST_PSEUDO_REGISTER
)
2272 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2273 GET_MODE (SUBREG_REG (y
)),
2280 /* On a REG_WORDS_BIG_ENDIAN machine, point to the last register of a
2281 multiple hard register group of scalar integer registers, so that
2282 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2284 if (REG_WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2285 && SCALAR_INT_MODE_P (GET_MODE (x
))
2286 && i
< FIRST_PSEUDO_REGISTER
)
2287 i
+= hard_regno_nregs
[i
][GET_MODE (x
)] - 1;
2288 if (REG_WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2289 && SCALAR_INT_MODE_P (GET_MODE (y
))
2290 && j
< FIRST_PSEUDO_REGISTER
)
2291 j
+= hard_regno_nregs
[j
][GET_MODE (y
)] - 1;
2295 /* If two operands must match, because they are really a single
2296 operand of an assembler insn, then two postincrements are invalid
2297 because the assembler insn would increment only once.
2298 On the other hand, a postincrement matches ordinary indexing
2299 if the postincrement is the output operand. */
2300 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2301 return operands_match_p (XEXP (x
, 0), y
);
2302 /* Two preincrements are invalid
2303 because the assembler insn would increment only once.
2304 On the other hand, a preincrement matches ordinary indexing
2305 if the preincrement is the input operand.
2306 In this case, return 2, since some callers need to do special
2307 things when this happens. */
2308 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2309 || GET_CODE (y
) == PRE_MODIFY
)
2310 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2314 /* Now we have disposed of all the cases in which different rtx codes
2316 if (code
!= GET_CODE (y
))
2319 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2320 if (GET_MODE (x
) != GET_MODE (y
))
2323 /* MEMs referring to different address space are not equivalent. */
2324 if (code
== MEM
&& MEM_ADDR_SPACE (x
) != MEM_ADDR_SPACE (y
))
2333 return LABEL_REF_LABEL (x
) == LABEL_REF_LABEL (y
);
2335 return XSTR (x
, 0) == XSTR (y
, 0);
2341 /* Compare the elements. If any pair of corresponding elements
2342 fail to match, return 0 for the whole things. */
2345 fmt
= GET_RTX_FORMAT (code
);
2346 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2352 if (XWINT (x
, i
) != XWINT (y
, i
))
2357 if (XINT (x
, i
) != XINT (y
, i
))
2362 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2365 /* If any subexpression returns 2,
2366 we should return 2 if we are successful. */
2375 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2377 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2379 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2387 /* It is believed that rtx's at this level will never
2388 contain anything but integers and other rtx's,
2389 except for within LABEL_REFs and SYMBOL_REFs. */
2394 return 1 + success_2
;
2397 /* Describe the range of registers or memory referenced by X.
2398 If X is a register, set REG_FLAG and put the first register
2399 number into START and the last plus one into END.
2400 If X is a memory reference, put a base address into BASE
2401 and a range of integer offsets into START and END.
2402 If X is pushing on the stack, we can assume it causes no trouble,
2403 so we set the SAFE field. */
2405 static struct decomposition
2408 struct decomposition val
;
2411 memset (&val
, 0, sizeof (val
));
2413 switch (GET_CODE (x
))
2417 rtx base
= NULL_RTX
, offset
= 0;
2418 rtx addr
= XEXP (x
, 0);
2420 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2421 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2423 val
.base
= XEXP (addr
, 0);
2424 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2425 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2426 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2430 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2432 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2433 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2434 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2436 val
.base
= XEXP (addr
, 0);
2437 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2438 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2439 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2444 if (GET_CODE (addr
) == CONST
)
2446 addr
= XEXP (addr
, 0);
2449 if (GET_CODE (addr
) == PLUS
)
2451 if (CONSTANT_P (XEXP (addr
, 0)))
2453 base
= XEXP (addr
, 1);
2454 offset
= XEXP (addr
, 0);
2456 else if (CONSTANT_P (XEXP (addr
, 1)))
2458 base
= XEXP (addr
, 0);
2459 offset
= XEXP (addr
, 1);
2466 offset
= const0_rtx
;
2468 if (GET_CODE (offset
) == CONST
)
2469 offset
= XEXP (offset
, 0);
2470 if (GET_CODE (offset
) == PLUS
)
2472 if (CONST_INT_P (XEXP (offset
, 0)))
2474 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2475 offset
= XEXP (offset
, 0);
2477 else if (CONST_INT_P (XEXP (offset
, 1)))
2479 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2480 offset
= XEXP (offset
, 1);
2484 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2485 offset
= const0_rtx
;
2488 else if (!CONST_INT_P (offset
))
2490 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2491 offset
= const0_rtx
;
2494 if (all_const
&& GET_CODE (base
) == PLUS
)
2495 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2497 gcc_assert (CONST_INT_P (offset
));
2499 val
.start
= INTVAL (offset
);
2500 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2507 val
.start
= true_regnum (x
);
2508 if (val
.start
< 0 || val
.start
>= FIRST_PSEUDO_REGISTER
)
2510 /* A pseudo with no hard reg. */
2511 val
.start
= REGNO (x
);
2512 val
.end
= val
.start
+ 1;
2516 val
.end
= end_hard_regno (GET_MODE (x
), val
.start
);
2520 if (!REG_P (SUBREG_REG (x
)))
2521 /* This could be more precise, but it's good enough. */
2522 return decompose (SUBREG_REG (x
));
2524 val
.start
= true_regnum (x
);
2525 if (val
.start
< 0 || val
.start
>= FIRST_PSEUDO_REGISTER
)
2526 return decompose (SUBREG_REG (x
));
2529 val
.end
= val
.start
+ subreg_nregs (x
);
2533 /* This hasn't been assigned yet, so it can't conflict yet. */
2538 gcc_assert (CONSTANT_P (x
));
2545 /* Return 1 if altering Y will not modify the value of X.
2546 Y is also described by YDATA, which should be decompose (Y). */
2549 immune_p (rtx x
, rtx y
, struct decomposition ydata
)
2551 struct decomposition xdata
;
2554 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, (rtx
*) 0);
2558 gcc_assert (MEM_P (y
));
2559 /* If Y is memory and X is not, Y can't affect X. */
2563 xdata
= decompose (x
);
2565 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2567 /* If bases are distinct symbolic constants, there is no overlap. */
2568 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2570 /* Constants and stack slots never overlap. */
2571 if (CONSTANT_P (xdata
.base
)
2572 && (ydata
.base
== frame_pointer_rtx
2573 || ydata
.base
== hard_frame_pointer_rtx
2574 || ydata
.base
== stack_pointer_rtx
))
2576 if (CONSTANT_P (ydata
.base
)
2577 && (xdata
.base
== frame_pointer_rtx
2578 || xdata
.base
== hard_frame_pointer_rtx
2579 || xdata
.base
== stack_pointer_rtx
))
2581 /* If either base is variable, we don't know anything. */
2585 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2588 /* Similar, but calls decompose. */
2591 safe_from_earlyclobber (rtx op
, rtx clobber
)
2593 struct decomposition early_data
;
2595 early_data
= decompose (clobber
);
2596 return immune_p (op
, clobber
, early_data
);
2599 /* Main entry point of this file: search the body of INSN
2600 for values that need reloading and record them with push_reload.
2601 REPLACE nonzero means record also where the values occur
2602 so that subst_reloads can be used.
2604 IND_LEVELS says how many levels of indirection are supported by this
2605 machine; a value of zero means that a memory reference is not a valid
2608 LIVE_KNOWN says we have valid information about which hard
2609 regs are live at each point in the program; this is true when
2610 we are called from global_alloc but false when stupid register
2611 allocation has been done.
2613 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2614 which is nonnegative if the reg has been commandeered for reloading into.
2615 It is copied into STATIC_RELOAD_REG_P and referenced from there
2616 by various subroutines.
2618 Return TRUE if some operands need to be changed, because of swapping
2619 commutative operands, reg_equiv_address substitution, or whatever. */
2622 find_reloads (rtx_insn
*insn
, int replace
, int ind_levels
, int live_known
,
2623 short *reload_reg_p
)
2625 int insn_code_number
;
2628 /* These start out as the constraints for the insn
2629 and they are chewed up as we consider alternatives. */
2630 const char *constraints
[MAX_RECOG_OPERANDS
];
2631 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2633 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2634 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2635 /* Nonzero for a MEM operand whose entire address needs a reload.
2636 May be -1 to indicate the entire address may or may not need a reload. */
2637 int address_reloaded
[MAX_RECOG_OPERANDS
];
2638 /* Nonzero for an address operand that needs to be completely reloaded.
2639 May be -1 to indicate the entire operand may or may not need a reload. */
2640 int address_operand_reloaded
[MAX_RECOG_OPERANDS
];
2641 /* Value of enum reload_type to use for operand. */
2642 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2643 /* Value of enum reload_type to use within address of operand. */
2644 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2645 /* Save the usage of each operand. */
2646 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2647 int no_input_reloads
= 0, no_output_reloads
= 0;
2649 reg_class_t this_alternative
[MAX_RECOG_OPERANDS
];
2650 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2651 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2652 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2653 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2654 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2655 reg_class_t goal_alternative
[MAX_RECOG_OPERANDS
];
2656 int this_alternative_number
;
2657 int goal_alternative_number
= 0;
2658 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2659 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2660 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2661 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2662 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2663 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2664 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2665 int goal_alternative_swapped
;
2668 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2669 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2670 rtx body
= PATTERN (insn
);
2671 rtx set
= single_set (insn
);
2672 int goal_earlyclobber
= 0, this_earlyclobber
;
2673 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2679 n_earlyclobbers
= 0;
2680 replace_reloads
= replace
;
2681 hard_regs_live_known
= live_known
;
2682 static_reload_reg_p
= reload_reg_p
;
2684 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2685 neither are insns that SET cc0. Insns that use CC0 are not allowed
2686 to have any input reloads. */
2687 if (JUMP_P (insn
) || CALL_P (insn
))
2688 no_output_reloads
= 1;
2691 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2692 no_input_reloads
= 1;
2693 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2694 no_output_reloads
= 1;
2697 #ifdef SECONDARY_MEMORY_NEEDED
2698 /* The eliminated forms of any secondary memory locations are per-insn, so
2699 clear them out here. */
2701 if (secondary_memlocs_elim_used
)
2703 memset (secondary_memlocs_elim
, 0,
2704 sizeof (secondary_memlocs_elim
[0]) * secondary_memlocs_elim_used
);
2705 secondary_memlocs_elim_used
= 0;
2709 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2710 is cheap to move between them. If it is not, there may not be an insn
2711 to do the copy, so we may need a reload. */
2712 if (GET_CODE (body
) == SET
2713 && REG_P (SET_DEST (body
))
2714 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2715 && REG_P (SET_SRC (body
))
2716 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2717 && register_move_cost (GET_MODE (SET_SRC (body
)),
2718 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2719 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2722 extract_insn (insn
);
2724 noperands
= reload_n_operands
= recog_data
.n_operands
;
2725 n_alternatives
= recog_data
.n_alternatives
;
2727 /* Just return "no reloads" if insn has no operands with constraints. */
2728 if (noperands
== 0 || n_alternatives
== 0)
2731 insn_code_number
= INSN_CODE (insn
);
2732 this_insn_is_asm
= insn_code_number
< 0;
2734 memcpy (operand_mode
, recog_data
.operand_mode
,
2735 noperands
* sizeof (enum machine_mode
));
2736 memcpy (constraints
, recog_data
.constraints
,
2737 noperands
* sizeof (const char *));
2741 /* If we will need to know, later, whether some pair of operands
2742 are the same, we must compare them now and save the result.
2743 Reloading the base and index registers will clobber them
2744 and afterward they will fail to match. */
2746 for (i
= 0; i
< noperands
; i
++)
2752 substed_operand
[i
] = recog_data
.operand
[i
];
2755 modified
[i
] = RELOAD_READ
;
2757 /* Scan this operand's constraint to see if it is an output operand,
2758 an in-out operand, is commutative, or should match another. */
2762 p
+= CONSTRAINT_LEN (c
, p
);
2766 modified
[i
] = RELOAD_WRITE
;
2769 modified
[i
] = RELOAD_READ_WRITE
;
2773 /* The last operand should not be marked commutative. */
2774 gcc_assert (i
!= noperands
- 1);
2776 /* We currently only support one commutative pair of
2777 operands. Some existing asm code currently uses more
2778 than one pair. Previously, that would usually work,
2779 but sometimes it would crash the compiler. We
2780 continue supporting that case as well as we can by
2781 silently ignoring all but the first pair. In the
2782 future we may handle it correctly. */
2783 if (commutative
< 0)
2786 gcc_assert (this_insn_is_asm
);
2789 /* Use of ISDIGIT is tempting here, but it may get expensive because
2790 of locale support we don't want. */
2791 case '0': case '1': case '2': case '3': case '4':
2792 case '5': case '6': case '7': case '8': case '9':
2794 c
= strtoul (p
- 1, &end
, 10);
2797 operands_match
[c
][i
]
2798 = operands_match_p (recog_data
.operand
[c
],
2799 recog_data
.operand
[i
]);
2801 /* An operand may not match itself. */
2802 gcc_assert (c
!= i
);
2804 /* If C can be commuted with C+1, and C might need to match I,
2805 then C+1 might also need to match I. */
2806 if (commutative
>= 0)
2808 if (c
== commutative
|| c
== commutative
+ 1)
2810 int other
= c
+ (c
== commutative
? 1 : -1);
2811 operands_match
[other
][i
]
2812 = operands_match_p (recog_data
.operand
[other
],
2813 recog_data
.operand
[i
]);
2815 if (i
== commutative
|| i
== commutative
+ 1)
2817 int other
= i
+ (i
== commutative
? 1 : -1);
2818 operands_match
[c
][other
]
2819 = operands_match_p (recog_data
.operand
[c
],
2820 recog_data
.operand
[other
]);
2822 /* Note that C is supposed to be less than I.
2823 No need to consider altering both C and I because in
2824 that case we would alter one into the other. */
2831 /* Examine each operand that is a memory reference or memory address
2832 and reload parts of the addresses into index registers.
2833 Also here any references to pseudo regs that didn't get hard regs
2834 but are equivalent to constants get replaced in the insn itself
2835 with those constants. Nobody will ever see them again.
2837 Finally, set up the preferred classes of each operand. */
2839 for (i
= 0; i
< noperands
; i
++)
2841 RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2843 address_reloaded
[i
] = 0;
2844 address_operand_reloaded
[i
] = 0;
2845 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2846 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2849 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2850 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2853 if (*constraints
[i
] == 0)
2854 /* Ignore things like match_operator operands. */
2856 else if (insn_extra_address_constraint
2857 (lookup_constraint (constraints
[i
])))
2859 address_operand_reloaded
[i
]
2860 = find_reloads_address (recog_data
.operand_mode
[i
], (rtx
*) 0,
2861 recog_data
.operand
[i
],
2862 recog_data
.operand_loc
[i
],
2863 i
, operand_type
[i
], ind_levels
, insn
);
2865 /* If we now have a simple operand where we used to have a
2866 PLUS or MULT, re-recognize and try again. */
2867 if ((OBJECT_P (*recog_data
.operand_loc
[i
])
2868 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2869 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2870 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2872 INSN_CODE (insn
) = -1;
2873 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2878 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2879 substed_operand
[i
] = recog_data
.operand
[i
];
2881 /* Address operands are reloaded in their existing mode,
2882 no matter what is specified in the machine description. */
2883 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2885 /* If the address is a single CONST_INT pick address mode
2886 instead otherwise we will later not know in which mode
2887 the reload should be performed. */
2888 if (operand_mode
[i
] == VOIDmode
)
2889 operand_mode
[i
] = Pmode
;
2892 else if (code
== MEM
)
2895 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2896 recog_data
.operand_loc
[i
],
2897 XEXP (recog_data
.operand
[i
], 0),
2898 &XEXP (recog_data
.operand
[i
], 0),
2899 i
, address_type
[i
], ind_levels
, insn
);
2900 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2901 substed_operand
[i
] = recog_data
.operand
[i
];
2903 else if (code
== SUBREG
)
2905 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2907 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2910 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2912 &address_reloaded
[i
]);
2914 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2915 that didn't get a hard register, emit a USE with a REG_EQUAL
2916 note in front so that we might inherit a previous, possibly
2922 && (GET_MODE_SIZE (GET_MODE (reg
))
2923 >= GET_MODE_SIZE (GET_MODE (op
)))
2924 && reg_equiv_constant (REGNO (reg
)) == 0)
2925 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
),
2927 REG_EQUAL
, reg_equiv_memory_loc (REGNO (reg
)));
2929 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2931 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == RTX_UNARY
)
2932 /* We can get a PLUS as an "operand" as a result of register
2933 elimination. See eliminate_regs and gen_reload. We handle
2934 a unary operator by reloading the operand. */
2935 substed_operand
[i
] = recog_data
.operand
[i
]
2936 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2937 ind_levels
, 0, insn
,
2938 &address_reloaded
[i
]);
2939 else if (code
== REG
)
2941 /* This is equivalent to calling find_reloads_toplev.
2942 The code is duplicated for speed.
2943 When we find a pseudo always equivalent to a constant,
2944 we replace it by the constant. We must be sure, however,
2945 that we don't try to replace it in the insn in which it
2947 int regno
= REGNO (recog_data
.operand
[i
]);
2948 if (reg_equiv_constant (regno
) != 0
2949 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2951 /* Record the existing mode so that the check if constants are
2952 allowed will work when operand_mode isn't specified. */
2954 if (operand_mode
[i
] == VOIDmode
)
2955 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2957 substed_operand
[i
] = recog_data
.operand
[i
]
2958 = reg_equiv_constant (regno
);
2960 if (reg_equiv_memory_loc (regno
) != 0
2961 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
2962 /* We need not give a valid is_set_dest argument since the case
2963 of a constant equivalence was checked above. */
2964 substed_operand
[i
] = recog_data
.operand
[i
]
2965 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2966 ind_levels
, 0, insn
,
2967 &address_reloaded
[i
]);
2969 /* If the operand is still a register (we didn't replace it with an
2970 equivalent), get the preferred class to reload it into. */
2971 code
= GET_CODE (recog_data
.operand
[i
]);
2973 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2974 >= FIRST_PSEUDO_REGISTER
)
2975 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2979 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2980 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2983 /* If this is simply a copy from operand 1 to operand 0, merge the
2984 preferred classes for the operands. */
2985 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2986 && recog_data
.operand
[1] == SET_SRC (set
))
2988 preferred_class
[0] = preferred_class
[1]
2989 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2990 pref_or_nothing
[0] |= pref_or_nothing
[1];
2991 pref_or_nothing
[1] |= pref_or_nothing
[0];
2994 /* Now see what we need for pseudo-regs that didn't get hard regs
2995 or got the wrong kind of hard reg. For this, we must consider
2996 all the operands together against the register constraints. */
2998 best
= MAX_RECOG_OPERANDS
* 2 + 600;
3000 goal_alternative_swapped
= 0;
3002 /* The constraints are made of several alternatives.
3003 Each operand's constraint looks like foo,bar,... with commas
3004 separating the alternatives. The first alternatives for all
3005 operands go together, the second alternatives go together, etc.
3007 First loop over alternatives. */
3009 alternative_mask enabled
= get_enabled_alternatives (insn
);
3010 for (this_alternative_number
= 0;
3011 this_alternative_number
< n_alternatives
;
3012 this_alternative_number
++)
3016 if (!TEST_BIT (enabled
, this_alternative_number
))
3020 for (i
= 0; i
< recog_data
.n_operands
; i
++)
3021 constraints
[i
] = skip_alternative (constraints
[i
]);
3026 /* If insn is commutative (it's safe to exchange a certain pair
3027 of operands) then we need to try each alternative twice, the
3028 second time matching those two operands as if we had
3029 exchanged them. To do this, really exchange them in
3031 for (swapped
= 0; swapped
< (commutative
>= 0 ? 2 : 1); swapped
++)
3033 /* Loop over operands for one constraint alternative. */
3034 /* LOSERS counts those that don't fit this alternative
3035 and would require loading. */
3037 /* BAD is set to 1 if it some operand can't fit this alternative
3038 even after reloading. */
3040 /* REJECT is a count of how undesirable this alternative says it is
3041 if any reloading is required. If the alternative matches exactly
3042 then REJECT is ignored, but otherwise it gets this much
3043 counted against it in addition to the reloading needed. Each
3044 ? counts three times here since we want the disparaging caused by
3045 a bad register class to only count 1/3 as much. */
3050 enum reg_class tclass
;
3053 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3054 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3055 /* Swap the duplicates too. */
3056 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3057 if (recog_data
.dup_num
[i
] == commutative
3058 || recog_data
.dup_num
[i
] == commutative
+ 1)
3059 *recog_data
.dup_loc
[i
]
3060 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3062 tclass
= preferred_class
[commutative
];
3063 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3064 preferred_class
[commutative
+ 1] = tclass
;
3066 t
= pref_or_nothing
[commutative
];
3067 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3068 pref_or_nothing
[commutative
+ 1] = t
;
3070 t
= address_reloaded
[commutative
];
3071 address_reloaded
[commutative
] = address_reloaded
[commutative
+ 1];
3072 address_reloaded
[commutative
+ 1] = t
;
3075 this_earlyclobber
= 0;
3077 for (i
= 0; i
< noperands
; i
++)
3079 const char *p
= constraints
[i
];
3084 /* 0 => this operand can be reloaded somehow for this alternative. */
3086 /* 0 => this operand can be reloaded if the alternative allows regs. */
3090 rtx operand
= recog_data
.operand
[i
];
3092 /* Nonzero means this is a MEM that must be reloaded into a reg
3093 regardless of what the constraint says. */
3094 int force_reload
= 0;
3096 /* Nonzero if a constant forced into memory would be OK for this
3099 int earlyclobber
= 0;
3100 enum constraint_num cn
;
3103 /* If the predicate accepts a unary operator, it means that
3104 we need to reload the operand, but do not do this for
3105 match_operator and friends. */
3106 if (UNARY_P (operand
) && *p
!= 0)
3107 operand
= XEXP (operand
, 0);
3109 /* If the operand is a SUBREG, extract
3110 the REG or MEM (or maybe even a constant) within.
3111 (Constants can occur as a result of reg_equiv_constant.) */
3113 while (GET_CODE (operand
) == SUBREG
)
3115 /* Offset only matters when operand is a REG and
3116 it is a hard reg. This is because it is passed
3117 to reg_fits_class_p if it is a REG and all pseudos
3118 return 0 from that function. */
3119 if (REG_P (SUBREG_REG (operand
))
3120 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
3122 if (simplify_subreg_regno (REGNO (SUBREG_REG (operand
)),
3123 GET_MODE (SUBREG_REG (operand
)),
3124 SUBREG_BYTE (operand
),
3125 GET_MODE (operand
)) < 0)
3127 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
3128 GET_MODE (SUBREG_REG (operand
)),
3129 SUBREG_BYTE (operand
),
3130 GET_MODE (operand
));
3132 operand
= SUBREG_REG (operand
);
3133 /* Force reload if this is a constant or PLUS or if there may
3134 be a problem accessing OPERAND in the outer mode. */
3135 if (CONSTANT_P (operand
)
3136 || GET_CODE (operand
) == PLUS
3137 /* We must force a reload of paradoxical SUBREGs
3138 of a MEM because the alignment of the inner value
3139 may not be enough to do the outer reference. On
3140 big-endian machines, it may also reference outside
3143 On machines that extend byte operations and we have a
3144 SUBREG where both the inner and outer modes are no wider
3145 than a word and the inner mode is narrower, is integral,
3146 and gets extended when loaded from memory, combine.c has
3147 made assumptions about the behavior of the machine in such
3148 register access. If the data is, in fact, in memory we
3149 must always load using the size assumed to be in the
3150 register and let the insn do the different-sized
3153 This is doubly true if WORD_REGISTER_OPERATIONS. In
3154 this case eliminate_regs has left non-paradoxical
3155 subregs for push_reload to see. Make sure it does
3156 by forcing the reload.
3158 ??? When is it right at this stage to have a subreg
3159 of a mem that is _not_ to be handled specially? IMO
3160 those should have been reduced to just a mem. */
3161 || ((MEM_P (operand
)
3163 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3164 #ifndef WORD_REGISTER_OPERATIONS
3165 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
3166 < BIGGEST_ALIGNMENT
)
3167 && (GET_MODE_SIZE (operand_mode
[i
])
3168 > GET_MODE_SIZE (GET_MODE (operand
))))
3170 #ifdef LOAD_EXTEND_OP
3171 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3172 && (GET_MODE_SIZE (GET_MODE (operand
))
3174 && (GET_MODE_SIZE (operand_mode
[i
])
3175 > GET_MODE_SIZE (GET_MODE (operand
)))
3176 && INTEGRAL_MODE_P (GET_MODE (operand
))
3177 && LOAD_EXTEND_OP (GET_MODE (operand
)) != UNKNOWN
)
3186 this_alternative
[i
] = NO_REGS
;
3187 this_alternative_win
[i
] = 0;
3188 this_alternative_match_win
[i
] = 0;
3189 this_alternative_offmemok
[i
] = 0;
3190 this_alternative_earlyclobber
[i
] = 0;
3191 this_alternative_matches
[i
] = -1;
3193 /* An empty constraint or empty alternative
3194 allows anything which matched the pattern. */
3195 if (*p
== 0 || *p
== ',')
3198 /* Scan this alternative's specs for this operand;
3199 set WIN if the operand fits any letter in this alternative.
3200 Otherwise, clear BADOP if this operand could
3201 fit some letter after reloads,
3202 or set WINREG if this operand could fit after reloads
3203 provided the constraint allows some registers. */
3206 switch ((c
= *p
, len
= CONSTRAINT_LEN (c
, p
)), c
)
3224 /* Ignore rest of this alternative as far as
3225 reloading is concerned. */
3228 while (*p
&& *p
!= ',');
3232 case '0': case '1': case '2': case '3': case '4':
3233 case '5': case '6': case '7': case '8': case '9':
3234 m
= strtoul (p
, &end
, 10);
3238 this_alternative_matches
[i
] = m
;
3239 /* We are supposed to match a previous operand.
3240 If we do, we win if that one did.
3241 If we do not, count both of the operands as losers.
3242 (This is too conservative, since most of the time
3243 only a single reload insn will be needed to make
3244 the two operands win. As a result, this alternative
3245 may be rejected when it is actually desirable.) */
3246 if ((swapped
&& (m
!= commutative
|| i
!= commutative
+ 1))
3247 /* If we are matching as if two operands were swapped,
3248 also pretend that operands_match had been computed
3250 But if I is the second of those and C is the first,
3251 don't exchange them, because operands_match is valid
3252 only on one side of its diagonal. */
3254 [(m
== commutative
|| m
== commutative
+ 1)
3255 ? 2 * commutative
+ 1 - m
: m
]
3256 [(i
== commutative
|| i
== commutative
+ 1)
3257 ? 2 * commutative
+ 1 - i
: i
])
3258 : operands_match
[m
][i
])
3260 /* If we are matching a non-offsettable address where an
3261 offsettable address was expected, then we must reject
3262 this combination, because we can't reload it. */
3263 if (this_alternative_offmemok
[m
]
3264 && MEM_P (recog_data
.operand
[m
])
3265 && this_alternative
[m
] == NO_REGS
3266 && ! this_alternative_win
[m
])
3269 did_match
= this_alternative_win
[m
];
3273 /* Operands don't match. */
3276 /* Retroactively mark the operand we had to match
3277 as a loser, if it wasn't already. */
3278 if (this_alternative_win
[m
])
3280 this_alternative_win
[m
] = 0;
3281 if (this_alternative
[m
] == NO_REGS
)
3283 /* But count the pair only once in the total badness of
3284 this alternative, if the pair can be a dummy reload.
3285 The pointers in operand_loc are not swapped; swap
3286 them by hand if necessary. */
3287 if (swapped
&& i
== commutative
)
3288 loc1
= commutative
+ 1;
3289 else if (swapped
&& i
== commutative
+ 1)
3293 if (swapped
&& m
== commutative
)
3294 loc2
= commutative
+ 1;
3295 else if (swapped
&& m
== commutative
+ 1)
3300 = find_dummy_reload (recog_data
.operand
[i
],
3301 recog_data
.operand
[m
],
3302 recog_data
.operand_loc
[loc1
],
3303 recog_data
.operand_loc
[loc2
],
3304 operand_mode
[i
], operand_mode
[m
],
3305 this_alternative
[m
], -1,
3306 this_alternative_earlyclobber
[m
]);
3311 /* This can be fixed with reloads if the operand
3312 we are supposed to match can be fixed with reloads. */
3314 this_alternative
[i
] = this_alternative
[m
];
3316 /* If we have to reload this operand and some previous
3317 operand also had to match the same thing as this
3318 operand, we don't know how to do that. So reject this
3320 if (! did_match
|| force_reload
)
3321 for (j
= 0; j
< i
; j
++)
3322 if (this_alternative_matches
[j
]
3323 == this_alternative_matches
[i
])
3331 /* All necessary reloads for an address_operand
3332 were handled in find_reloads_address. */
3334 = base_reg_class (VOIDmode
, ADDR_SPACE_GENERIC
,
3340 case TARGET_MEM_CONSTRAINT
:
3345 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3346 && reg_renumber
[REGNO (operand
)] < 0))
3348 if (CONST_POOL_OK_P (operand_mode
[i
], operand
))
3355 && ! address_reloaded
[i
]
3356 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3357 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3363 && ! address_reloaded
[i
]
3364 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3365 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3369 /* Memory operand whose address is not offsettable. */
3374 && ! (ind_levels
? offsettable_memref_p (operand
)
3375 : offsettable_nonstrict_memref_p (operand
))
3376 /* Certain mem addresses will become offsettable
3377 after they themselves are reloaded. This is important;
3378 we don't want our own handling of unoffsettables
3379 to override the handling of reg_equiv_address. */
3380 && !(REG_P (XEXP (operand
, 0))
3382 || reg_equiv_address (REGNO (XEXP (operand
, 0))) != 0)))
3386 /* Memory operand whose address is offsettable. */
3390 if ((MEM_P (operand
)
3391 /* If IND_LEVELS, find_reloads_address won't reload a
3392 pseudo that didn't get a hard reg, so we have to
3393 reject that case. */
3394 && ((ind_levels
? offsettable_memref_p (operand
)
3395 : offsettable_nonstrict_memref_p (operand
))
3396 /* A reloaded address is offsettable because it is now
3397 just a simple register indirect. */
3398 || address_reloaded
[i
] == 1))
3400 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3401 && reg_renumber
[REGNO (operand
)] < 0
3402 /* If reg_equiv_address is nonzero, we will be
3403 loading it into a register; hence it will be
3404 offsettable, but we cannot say that reg_equiv_mem
3405 is offsettable without checking. */
3406 && ((reg_equiv_mem (REGNO (operand
)) != 0
3407 && offsettable_memref_p (reg_equiv_mem (REGNO (operand
))))
3408 || (reg_equiv_address (REGNO (operand
)) != 0))))
3410 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3418 /* Output operand that is stored before the need for the
3419 input operands (and their index registers) is over. */
3420 earlyclobber
= 1, this_earlyclobber
= 1;
3430 /* A PLUS is never a valid operand, but reload can make
3431 it from a register when eliminating registers. */
3432 && GET_CODE (operand
) != PLUS
3433 /* A SCRATCH is not a valid operand. */
3434 && GET_CODE (operand
) != SCRATCH
3435 && (! CONSTANT_P (operand
)
3437 || LEGITIMATE_PIC_OPERAND_P (operand
))
3438 && (GENERAL_REGS
== ALL_REGS
3440 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3441 && reg_renumber
[REGNO (operand
)] < 0)))
3447 cn
= lookup_constraint (p
);
3448 switch (get_constraint_type (cn
))
3451 cl
= reg_class_for_constraint (cn
);
3457 if (CONST_INT_P (operand
)
3458 && (insn_const_int_ok_for_constraint
3459 (INTVAL (operand
), cn
)))
3466 if (constraint_satisfied_p (operand
, cn
))
3468 /* If the address was already reloaded,
3470 else if (MEM_P (operand
) && address_reloaded
[i
] == 1)
3472 /* Likewise if the address will be reloaded because
3473 reg_equiv_address is nonzero. For reg_equiv_mem
3474 we have to check. */
3475 else if (REG_P (operand
)
3476 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3477 && reg_renumber
[REGNO (operand
)] < 0
3478 && ((reg_equiv_mem (REGNO (operand
)) != 0
3479 && (constraint_satisfied_p
3480 (reg_equiv_mem (REGNO (operand
)),
3482 || (reg_equiv_address (REGNO (operand
))
3486 /* If we didn't already win, we can reload
3487 constants via force_const_mem, and other
3488 MEMs by reloading the address like for 'o'. */
3489 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3497 if (constraint_satisfied_p (operand
, cn
))
3500 /* If we didn't already win, we can reload
3501 the address into a base register. */
3503 = base_reg_class (VOIDmode
, ADDR_SPACE_GENERIC
,
3509 if (constraint_satisfied_p (operand
, cn
))
3517 = reg_class_subunion
[this_alternative
[i
]][cl
];
3518 if (GET_MODE (operand
) == BLKmode
)
3522 && reg_fits_class_p (operand
, this_alternative
[i
],
3523 offset
, GET_MODE (recog_data
.operand
[i
])))
3527 while ((p
+= len
), c
);
3529 if (swapped
== (commutative
>= 0 ? 1 : 0))
3532 /* If this operand could be handled with a reg,
3533 and some reg is allowed, then this operand can be handled. */
3534 if (winreg
&& this_alternative
[i
] != NO_REGS
3535 && (win
|| !class_only_fixed_regs
[this_alternative
[i
]]))
3538 /* Record which operands fit this alternative. */
3539 this_alternative_earlyclobber
[i
] = earlyclobber
;
3540 if (win
&& ! force_reload
)
3541 this_alternative_win
[i
] = 1;
3542 else if (did_match
&& ! force_reload
)
3543 this_alternative_match_win
[i
] = 1;
3546 int const_to_mem
= 0;
3548 this_alternative_offmemok
[i
] = offmemok
;
3552 /* Alternative loses if it has no regs for a reg operand. */
3554 && this_alternative
[i
] == NO_REGS
3555 && this_alternative_matches
[i
] < 0)
3558 /* If this is a constant that is reloaded into the desired
3559 class by copying it to memory first, count that as another
3560 reload. This is consistent with other code and is
3561 required to avoid choosing another alternative when
3562 the constant is moved into memory by this function on
3563 an early reload pass. Note that the test here is
3564 precisely the same as in the code below that calls
3566 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3567 && ((targetm
.preferred_reload_class (operand
,
3568 this_alternative
[i
])
3570 || no_input_reloads
))
3573 if (this_alternative
[i
] != NO_REGS
)
3577 /* Alternative loses if it requires a type of reload not
3578 permitted for this insn. We can always reload SCRATCH
3579 and objects with a REG_UNUSED note. */
3580 if (GET_CODE (operand
) != SCRATCH
3581 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3582 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3584 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3588 /* If we can't reload this value at all, reject this
3589 alternative. Note that we could also lose due to
3590 LIMIT_RELOAD_CLASS, but we don't check that
3593 if (! CONSTANT_P (operand
) && this_alternative
[i
] != NO_REGS
)
3595 if (targetm
.preferred_reload_class (operand
,
3596 this_alternative
[i
])
3600 if (operand_type
[i
] == RELOAD_FOR_OUTPUT
3601 && (targetm
.preferred_output_reload_class (operand
,
3602 this_alternative
[i
])
3607 /* We prefer to reload pseudos over reloading other things,
3608 since such reloads may be able to be eliminated later.
3609 If we are reloading a SCRATCH, we won't be generating any
3610 insns, just using a register, so it is also preferred.
3611 So bump REJECT in other cases. Don't do this in the
3612 case where we are forcing a constant into memory and
3613 it will then win since we don't want to have a different
3614 alternative match then. */
3615 if (! (REG_P (operand
)
3616 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3617 && GET_CODE (operand
) != SCRATCH
3618 && ! (const_to_mem
&& constmemok
))
3621 /* Input reloads can be inherited more often than output
3622 reloads can be removed, so penalize output reloads. */
3623 if (operand_type
[i
] != RELOAD_FOR_INPUT
3624 && GET_CODE (operand
) != SCRATCH
)
3628 /* If this operand is a pseudo register that didn't get
3629 a hard reg and this alternative accepts some
3630 register, see if the class that we want is a subset
3631 of the preferred class for this register. If not,
3632 but it intersects that class, use the preferred class
3633 instead. If it does not intersect the preferred
3634 class, show that usage of this alternative should be
3635 discouraged; it will be discouraged more still if the
3636 register is `preferred or nothing'. We do this
3637 because it increases the chance of reusing our spill
3638 register in a later insn and avoiding a pair of
3639 memory stores and loads.
3641 Don't bother with this if this alternative will
3642 accept this operand.
3644 Don't do this for a multiword operand, since it is
3645 only a small win and has the risk of requiring more
3646 spill registers, which could cause a large loss.
3648 Don't do this if the preferred class has only one
3649 register because we might otherwise exhaust the
3652 if (! win
&& ! did_match
3653 && this_alternative
[i
] != NO_REGS
3654 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3655 && reg_class_size
[(int) preferred_class
[i
]] > 0
3656 && ! small_register_class_p (preferred_class
[i
]))
3658 if (! reg_class_subset_p (this_alternative
[i
],
3659 preferred_class
[i
]))
3661 /* Since we don't have a way of forming the intersection,
3662 we just do something special if the preferred class
3663 is a subset of the class we have; that's the most
3664 common case anyway. */
3665 if (reg_class_subset_p (preferred_class
[i
],
3666 this_alternative
[i
]))
3667 this_alternative
[i
] = preferred_class
[i
];
3669 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3674 /* Now see if any output operands that are marked "earlyclobber"
3675 in this alternative conflict with any input operands
3676 or any memory addresses. */
3678 for (i
= 0; i
< noperands
; i
++)
3679 if (this_alternative_earlyclobber
[i
]
3680 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3682 struct decomposition early_data
;
3684 early_data
= decompose (recog_data
.operand
[i
]);
3686 gcc_assert (modified
[i
] != RELOAD_READ
);
3688 if (this_alternative
[i
] == NO_REGS
)
3690 this_alternative_earlyclobber
[i
] = 0;
3691 gcc_assert (this_insn_is_asm
);
3692 error_for_asm (this_insn
,
3693 "%<&%> constraint used with no register class");
3696 for (j
= 0; j
< noperands
; j
++)
3697 /* Is this an input operand or a memory ref? */
3698 if ((MEM_P (recog_data
.operand
[j
])
3699 || modified
[j
] != RELOAD_WRITE
)
3701 /* Ignore things like match_operator operands. */
3702 && !recog_data
.is_operator
[j
]
3703 /* Don't count an input operand that is constrained to match
3704 the early clobber operand. */
3705 && ! (this_alternative_matches
[j
] == i
3706 && rtx_equal_p (recog_data
.operand
[i
],
3707 recog_data
.operand
[j
]))
3708 /* Is it altered by storing the earlyclobber operand? */
3709 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3712 /* If the output is in a non-empty few-regs class,
3713 it's costly to reload it, so reload the input instead. */
3714 if (small_register_class_p (this_alternative
[i
])
3715 && (REG_P (recog_data
.operand
[j
])
3716 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3719 this_alternative_win
[j
] = 0;
3720 this_alternative_match_win
[j
] = 0;
3725 /* If an earlyclobber operand conflicts with something,
3726 it must be reloaded, so request this and count the cost. */
3730 this_alternative_win
[i
] = 0;
3731 this_alternative_match_win
[j
] = 0;
3732 for (j
= 0; j
< noperands
; j
++)
3733 if (this_alternative_matches
[j
] == i
3734 && this_alternative_match_win
[j
])
3736 this_alternative_win
[j
] = 0;
3737 this_alternative_match_win
[j
] = 0;
3743 /* If one alternative accepts all the operands, no reload required,
3744 choose that alternative; don't consider the remaining ones. */
3747 /* Unswap these so that they are never swapped at `finish'. */
3750 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3751 recog_data
.operand
[commutative
+ 1]
3752 = substed_operand
[commutative
+ 1];
3754 for (i
= 0; i
< noperands
; i
++)
3756 goal_alternative_win
[i
] = this_alternative_win
[i
];
3757 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3758 goal_alternative
[i
] = this_alternative
[i
];
3759 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3760 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3761 goal_alternative_earlyclobber
[i
]
3762 = this_alternative_earlyclobber
[i
];
3764 goal_alternative_number
= this_alternative_number
;
3765 goal_alternative_swapped
= swapped
;
3766 goal_earlyclobber
= this_earlyclobber
;
3770 /* REJECT, set by the ! and ? constraint characters and when a register
3771 would be reloaded into a non-preferred class, discourages the use of
3772 this alternative for a reload goal. REJECT is incremented by six
3773 for each ? and two for each non-preferred class. */
3774 losers
= losers
* 6 + reject
;
3776 /* If this alternative can be made to work by reloading,
3777 and it needs less reloading than the others checked so far,
3778 record it as the chosen goal for reloading. */
3783 for (i
= 0; i
< noperands
; i
++)
3785 goal_alternative
[i
] = this_alternative
[i
];
3786 goal_alternative_win
[i
] = this_alternative_win
[i
];
3787 goal_alternative_match_win
[i
]
3788 = this_alternative_match_win
[i
];
3789 goal_alternative_offmemok
[i
]
3790 = this_alternative_offmemok
[i
];
3791 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3792 goal_alternative_earlyclobber
[i
]
3793 = this_alternative_earlyclobber
[i
];
3795 goal_alternative_swapped
= swapped
;
3797 goal_alternative_number
= this_alternative_number
;
3798 goal_earlyclobber
= this_earlyclobber
;
3804 enum reg_class tclass
;
3807 /* If the commutative operands have been swapped, swap
3808 them back in order to check the next alternative. */
3809 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3810 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
+ 1];
3811 /* Unswap the duplicates too. */
3812 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3813 if (recog_data
.dup_num
[i
] == commutative
3814 || recog_data
.dup_num
[i
] == commutative
+ 1)
3815 *recog_data
.dup_loc
[i
]
3816 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3818 /* Unswap the operand related information as well. */
3819 tclass
= preferred_class
[commutative
];
3820 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3821 preferred_class
[commutative
+ 1] = tclass
;
3823 t
= pref_or_nothing
[commutative
];
3824 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3825 pref_or_nothing
[commutative
+ 1] = t
;
3827 t
= address_reloaded
[commutative
];
3828 address_reloaded
[commutative
] = address_reloaded
[commutative
+ 1];
3829 address_reloaded
[commutative
+ 1] = t
;
3834 /* The operands don't meet the constraints.
3835 goal_alternative describes the alternative
3836 that we could reach by reloading the fewest operands.
3837 Reload so as to fit it. */
3839 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3841 /* No alternative works with reloads?? */
3842 if (insn_code_number
>= 0)
3843 fatal_insn ("unable to generate reloads for:", insn
);
3844 error_for_asm (insn
, "inconsistent operand constraints in an %<asm%>");
3845 /* Avoid further trouble with this insn. */
3846 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3851 /* Jump to `finish' from above if all operands are valid already.
3852 In that case, goal_alternative_win is all 1. */
3855 /* Right now, for any pair of operands I and J that are required to match,
3857 goal_alternative_matches[J] is I.
3858 Set up goal_alternative_matched as the inverse function:
3859 goal_alternative_matched[I] = J. */
3861 for (i
= 0; i
< noperands
; i
++)
3862 goal_alternative_matched
[i
] = -1;
3864 for (i
= 0; i
< noperands
; i
++)
3865 if (! goal_alternative_win
[i
]
3866 && goal_alternative_matches
[i
] >= 0)
3867 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3869 for (i
= 0; i
< noperands
; i
++)
3870 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3872 /* If the best alternative is with operands 1 and 2 swapped,
3873 consider them swapped before reporting the reloads. Update the
3874 operand numbers of any reloads already pushed. */
3876 if (goal_alternative_swapped
)
3880 tem
= substed_operand
[commutative
];
3881 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3882 substed_operand
[commutative
+ 1] = tem
;
3883 tem
= recog_data
.operand
[commutative
];
3884 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3885 recog_data
.operand
[commutative
+ 1] = tem
;
3886 tem
= *recog_data
.operand_loc
[commutative
];
3887 *recog_data
.operand_loc
[commutative
]
3888 = *recog_data
.operand_loc
[commutative
+ 1];
3889 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3891 for (i
= 0; i
< n_reloads
; i
++)
3893 if (rld
[i
].opnum
== commutative
)
3894 rld
[i
].opnum
= commutative
+ 1;
3895 else if (rld
[i
].opnum
== commutative
+ 1)
3896 rld
[i
].opnum
= commutative
;
3900 for (i
= 0; i
< noperands
; i
++)
3902 operand_reloadnum
[i
] = -1;
3904 /* If this is an earlyclobber operand, we need to widen the scope.
3905 The reload must remain valid from the start of the insn being
3906 reloaded until after the operand is stored into its destination.
3907 We approximate this with RELOAD_OTHER even though we know that we
3908 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3910 One special case that is worth checking is when we have an
3911 output that is earlyclobber but isn't used past the insn (typically
3912 a SCRATCH). In this case, we only need have the reload live
3913 through the insn itself, but not for any of our input or output
3915 But we must not accidentally narrow the scope of an existing
3916 RELOAD_OTHER reload - leave these alone.
3918 In any case, anything needed to address this operand can remain
3919 however they were previously categorized. */
3921 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3923 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3924 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3927 /* Any constants that aren't allowed and can't be reloaded
3928 into registers are here changed into memory references. */
3929 for (i
= 0; i
< noperands
; i
++)
3930 if (! goal_alternative_win
[i
])
3932 rtx op
= recog_data
.operand
[i
];
3933 rtx subreg
= NULL_RTX
;
3934 rtx plus
= NULL_RTX
;
3935 enum machine_mode mode
= operand_mode
[i
];
3937 /* Reloads of SUBREGs of CONSTANT RTXs are handled later in
3938 push_reload so we have to let them pass here. */
3939 if (GET_CODE (op
) == SUBREG
)
3942 op
= SUBREG_REG (op
);
3943 mode
= GET_MODE (op
);
3946 if (GET_CODE (op
) == PLUS
)
3952 if (CONST_POOL_OK_P (mode
, op
)
3953 && ((targetm
.preferred_reload_class (op
, goal_alternative
[i
])
3955 || no_input_reloads
))
3957 int this_address_reloaded
;
3958 rtx tem
= force_const_mem (mode
, op
);
3960 /* If we stripped a SUBREG or a PLUS above add it back. */
3961 if (plus
!= NULL_RTX
)
3962 tem
= gen_rtx_PLUS (mode
, XEXP (plus
, 0), tem
);
3964 if (subreg
!= NULL_RTX
)
3965 tem
= gen_rtx_SUBREG (operand_mode
[i
], tem
, SUBREG_BYTE (subreg
));
3967 this_address_reloaded
= 0;
3968 substed_operand
[i
] = recog_data
.operand
[i
]
3969 = find_reloads_toplev (tem
, i
, address_type
[i
], ind_levels
,
3970 0, insn
, &this_address_reloaded
);
3972 /* If the alternative accepts constant pool refs directly
3973 there will be no reload needed at all. */
3974 if (plus
== NULL_RTX
3975 && subreg
== NULL_RTX
3976 && alternative_allows_const_pool_ref (this_address_reloaded
== 0
3977 ? substed_operand
[i
]
3979 recog_data
.constraints
[i
],
3980 goal_alternative_number
))
3981 goal_alternative_win
[i
] = 1;
3985 /* Record the values of the earlyclobber operands for the caller. */
3986 if (goal_earlyclobber
)
3987 for (i
= 0; i
< noperands
; i
++)
3988 if (goal_alternative_earlyclobber
[i
])
3989 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3991 /* Now record reloads for all the operands that need them. */
3992 for (i
= 0; i
< noperands
; i
++)
3993 if (! goal_alternative_win
[i
])
3995 /* Operands that match previous ones have already been handled. */
3996 if (goal_alternative_matches
[i
] >= 0)
3998 /* Handle an operand with a nonoffsettable address
3999 appearing where an offsettable address will do
4000 by reloading the address into a base register.
4002 ??? We can also do this when the operand is a register and
4003 reg_equiv_mem is not offsettable, but this is a bit tricky,
4004 so we don't bother with it. It may not be worth doing. */
4005 else if (goal_alternative_matched
[i
] == -1
4006 && goal_alternative_offmemok
[i
]
4007 && MEM_P (recog_data
.operand
[i
]))
4009 /* If the address to be reloaded is a VOIDmode constant,
4010 use the default address mode as mode of the reload register,
4011 as would have been done by find_reloads_address. */
4012 addr_space_t as
= MEM_ADDR_SPACE (recog_data
.operand
[i
]);
4013 enum machine_mode address_mode
;
4015 address_mode
= get_address_mode (recog_data
.operand
[i
]);
4016 operand_reloadnum
[i
]
4017 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
4018 &XEXP (recog_data
.operand
[i
], 0), (rtx
*) 0,
4019 base_reg_class (VOIDmode
, as
, MEM
, SCRATCH
),
4021 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
4022 rld
[operand_reloadnum
[i
]].inc
4023 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
4025 /* If this operand is an output, we will have made any
4026 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
4027 now we are treating part of the operand as an input, so
4028 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
4030 if (modified
[i
] == RELOAD_WRITE
)
4032 for (j
= 0; j
< n_reloads
; j
++)
4034 if (rld
[j
].opnum
== i
)
4036 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
4037 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
4038 else if (rld
[j
].when_needed
4039 == RELOAD_FOR_OUTADDR_ADDRESS
)
4040 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
4045 else if (goal_alternative_matched
[i
] == -1)
4047 operand_reloadnum
[i
]
4048 = push_reload ((modified
[i
] != RELOAD_WRITE
4049 ? recog_data
.operand
[i
] : 0),
4050 (modified
[i
] != RELOAD_READ
4051 ? recog_data
.operand
[i
] : 0),
4052 (modified
[i
] != RELOAD_WRITE
4053 ? recog_data
.operand_loc
[i
] : 0),
4054 (modified
[i
] != RELOAD_READ
4055 ? recog_data
.operand_loc
[i
] : 0),
4056 (enum reg_class
) goal_alternative
[i
],
4057 (modified
[i
] == RELOAD_WRITE
4058 ? VOIDmode
: operand_mode
[i
]),
4059 (modified
[i
] == RELOAD_READ
4060 ? VOIDmode
: operand_mode
[i
]),
4061 (insn_code_number
< 0 ? 0
4062 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
4063 0, i
, operand_type
[i
]);
4065 /* In a matching pair of operands, one must be input only
4066 and the other must be output only.
4067 Pass the input operand as IN and the other as OUT. */
4068 else if (modified
[i
] == RELOAD_READ
4069 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
4071 operand_reloadnum
[i
]
4072 = push_reload (recog_data
.operand
[i
],
4073 recog_data
.operand
[goal_alternative_matched
[i
]],
4074 recog_data
.operand_loc
[i
],
4075 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
4076 (enum reg_class
) goal_alternative
[i
],
4078 operand_mode
[goal_alternative_matched
[i
]],
4079 0, 0, i
, RELOAD_OTHER
);
4080 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
4082 else if (modified
[i
] == RELOAD_WRITE
4083 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
4085 operand_reloadnum
[goal_alternative_matched
[i
]]
4086 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
4087 recog_data
.operand
[i
],
4088 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
4089 recog_data
.operand_loc
[i
],
4090 (enum reg_class
) goal_alternative
[i
],
4091 operand_mode
[goal_alternative_matched
[i
]],
4093 0, 0, i
, RELOAD_OTHER
);
4094 operand_reloadnum
[i
] = output_reloadnum
;
4098 gcc_assert (insn_code_number
< 0);
4099 error_for_asm (insn
, "inconsistent operand constraints "
4101 /* Avoid further trouble with this insn. */
4102 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
4107 else if (goal_alternative_matched
[i
] < 0
4108 && goal_alternative_matches
[i
] < 0
4109 && address_operand_reloaded
[i
] != 1
4112 /* For each non-matching operand that's a MEM or a pseudo-register
4113 that didn't get a hard register, make an optional reload.
4114 This may get done even if the insn needs no reloads otherwise. */
4116 rtx operand
= recog_data
.operand
[i
];
4118 while (GET_CODE (operand
) == SUBREG
)
4119 operand
= SUBREG_REG (operand
);
4120 if ((MEM_P (operand
)
4122 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4123 /* If this is only for an output, the optional reload would not
4124 actually cause us to use a register now, just note that
4125 something is stored here. */
4126 && (goal_alternative
[i
] != NO_REGS
4127 || modified
[i
] == RELOAD_WRITE
)
4128 && ! no_input_reloads
4129 /* An optional output reload might allow to delete INSN later.
4130 We mustn't make in-out reloads on insns that are not permitted
4132 If this is an asm, we can't delete it; we must not even call
4133 push_reload for an optional output reload in this case,
4134 because we can't be sure that the constraint allows a register,
4135 and push_reload verifies the constraints for asms. */
4136 && (modified
[i
] == RELOAD_READ
4137 || (! no_output_reloads
&& ! this_insn_is_asm
)))
4138 operand_reloadnum
[i
]
4139 = push_reload ((modified
[i
] != RELOAD_WRITE
4140 ? recog_data
.operand
[i
] : 0),
4141 (modified
[i
] != RELOAD_READ
4142 ? recog_data
.operand
[i
] : 0),
4143 (modified
[i
] != RELOAD_WRITE
4144 ? recog_data
.operand_loc
[i
] : 0),
4145 (modified
[i
] != RELOAD_READ
4146 ? recog_data
.operand_loc
[i
] : 0),
4147 (enum reg_class
) goal_alternative
[i
],
4148 (modified
[i
] == RELOAD_WRITE
4149 ? VOIDmode
: operand_mode
[i
]),
4150 (modified
[i
] == RELOAD_READ
4151 ? VOIDmode
: operand_mode
[i
]),
4152 (insn_code_number
< 0 ? 0
4153 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
4154 1, i
, operand_type
[i
]);
4155 /* If a memory reference remains (either as a MEM or a pseudo that
4156 did not get a hard register), yet we can't make an optional
4157 reload, check if this is actually a pseudo register reference;
4158 we then need to emit a USE and/or a CLOBBER so that reload
4159 inheritance will do the right thing. */
4163 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
4164 && reg_renumber
[REGNO (operand
)] < 0)))
4166 operand
= *recog_data
.operand_loc
[i
];
4168 while (GET_CODE (operand
) == SUBREG
)
4169 operand
= SUBREG_REG (operand
);
4170 if (REG_P (operand
))
4172 if (modified
[i
] != RELOAD_WRITE
)
4173 /* We mark the USE with QImode so that we recognize
4174 it as one that can be safely deleted at the end
4176 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, operand
),
4178 if (modified
[i
] != RELOAD_READ
)
4179 emit_insn_after (gen_clobber (operand
), insn
);
4183 else if (goal_alternative_matches
[i
] >= 0
4184 && goal_alternative_win
[goal_alternative_matches
[i
]]
4185 && modified
[i
] == RELOAD_READ
4186 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
4187 && ! no_input_reloads
&& ! no_output_reloads
4190 /* Similarly, make an optional reload for a pair of matching
4191 objects that are in MEM or a pseudo that didn't get a hard reg. */
4193 rtx operand
= recog_data
.operand
[i
];
4195 while (GET_CODE (operand
) == SUBREG
)
4196 operand
= SUBREG_REG (operand
);
4197 if ((MEM_P (operand
)
4199 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4200 && (goal_alternative
[goal_alternative_matches
[i
]] != NO_REGS
))
4201 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
4202 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
4203 recog_data
.operand
[i
],
4204 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
4205 recog_data
.operand_loc
[i
],
4206 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
4207 operand_mode
[goal_alternative_matches
[i
]],
4209 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
4212 /* Perform whatever substitutions on the operands we are supposed
4213 to make due to commutativity or replacement of registers
4214 with equivalent constants or memory slots. */
4216 for (i
= 0; i
< noperands
; i
++)
4218 /* We only do this on the last pass through reload, because it is
4219 possible for some data (like reg_equiv_address) to be changed during
4220 later passes. Moreover, we lose the opportunity to get a useful
4221 reload_{in,out}_reg when we do these replacements. */
4225 rtx substitution
= substed_operand
[i
];
4227 *recog_data
.operand_loc
[i
] = substitution
;
4229 /* If we're replacing an operand with a LABEL_REF, we need to
4230 make sure that there's a REG_LABEL_OPERAND note attached to
4231 this instruction. */
4232 if (GET_CODE (substitution
) == LABEL_REF
4233 && !find_reg_note (insn
, REG_LABEL_OPERAND
,
4234 LABEL_REF_LABEL (substitution
))
4235 /* For a JUMP_P, if it was a branch target it must have
4236 already been recorded as such. */
4238 || !label_is_jump_target_p (LABEL_REF_LABEL (substitution
),
4241 add_reg_note (insn
, REG_LABEL_OPERAND
,
4242 LABEL_REF_LABEL (substitution
));
4243 if (LABEL_P (LABEL_REF_LABEL (substitution
)))
4244 ++LABEL_NUSES (LABEL_REF_LABEL (substitution
));
4249 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
4252 /* If this insn pattern contains any MATCH_DUP's, make sure that
4253 they will be substituted if the operands they match are substituted.
4254 Also do now any substitutions we already did on the operands.
4256 Don't do this if we aren't making replacements because we might be
4257 propagating things allocated by frame pointer elimination into places
4258 it doesn't expect. */
4260 if (insn_code_number
>= 0 && replace
)
4261 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
4263 int opno
= recog_data
.dup_num
[i
];
4264 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
4265 dup_replacements (recog_data
.dup_loc
[i
], recog_data
.operand_loc
[opno
]);
4269 /* This loses because reloading of prior insns can invalidate the equivalence
4270 (or at least find_equiv_reg isn't smart enough to find it any more),
4271 causing this insn to need more reload regs than it needed before.
4272 It may be too late to make the reload regs available.
4273 Now this optimization is done safely in choose_reload_regs. */
4275 /* For each reload of a reg into some other class of reg,
4276 search for an existing equivalent reg (same value now) in the right class.
4277 We can use it as long as we don't need to change its contents. */
4278 for (i
= 0; i
< n_reloads
; i
++)
4279 if (rld
[i
].reg_rtx
== 0
4281 && REG_P (rld
[i
].in
)
4285 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].rclass
, -1,
4286 static_reload_reg_p
, 0, rld
[i
].inmode
);
4287 /* Prevent generation of insn to load the value
4288 because the one we found already has the value. */
4290 rld
[i
].in
= rld
[i
].reg_rtx
;
4294 /* If we detected error and replaced asm instruction by USE, forget about the
4296 if (GET_CODE (PATTERN (insn
)) == USE
4297 && CONST_INT_P (XEXP (PATTERN (insn
), 0)))
4300 /* Perhaps an output reload can be combined with another
4301 to reduce needs by one. */
4302 if (!goal_earlyclobber
)
4305 /* If we have a pair of reloads for parts of an address, they are reloading
4306 the same object, the operands themselves were not reloaded, and they
4307 are for two operands that are supposed to match, merge the reloads and
4308 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4310 for (i
= 0; i
< n_reloads
; i
++)
4314 for (j
= i
+ 1; j
< n_reloads
; j
++)
4315 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4316 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4317 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4318 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4319 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4320 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4321 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4322 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4323 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
4324 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4325 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
4326 && (operand_reloadnum
[rld
[j
].opnum
] < 0
4327 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
4328 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
4329 || (goal_alternative_matches
[rld
[j
].opnum
]
4332 for (k
= 0; k
< n_replacements
; k
++)
4333 if (replacements
[k
].what
== j
)
4334 replacements
[k
].what
= i
;
4336 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4337 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4338 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4340 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4345 /* Scan all the reloads and update their type.
4346 If a reload is for the address of an operand and we didn't reload
4347 that operand, change the type. Similarly, change the operand number
4348 of a reload when two operands match. If a reload is optional, treat it
4349 as though the operand isn't reloaded.
4351 ??? This latter case is somewhat odd because if we do the optional
4352 reload, it means the object is hanging around. Thus we need only
4353 do the address reload if the optional reload was NOT done.
4355 Change secondary reloads to be the address type of their operand, not
4358 If an operand's reload is now RELOAD_OTHER, change any
4359 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4360 RELOAD_FOR_OTHER_ADDRESS. */
4362 for (i
= 0; i
< n_reloads
; i
++)
4364 if (rld
[i
].secondary_p
4365 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
4366 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
4368 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4369 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4370 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4371 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4372 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4373 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
4375 /* If we have a secondary reload to go along with this reload,
4376 change its type to RELOAD_FOR_OPADDR_ADDR. */
4378 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4379 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4380 && rld
[i
].secondary_in_reload
!= -1)
4382 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4384 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4386 /* If there's a tertiary reload we have to change it also. */
4387 if (secondary_in_reload
> 0
4388 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4389 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4390 = RELOAD_FOR_OPADDR_ADDR
;
4393 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4394 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4395 && rld
[i
].secondary_out_reload
!= -1)
4397 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4399 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4401 /* If there's a tertiary reload we have to change it also. */
4402 if (secondary_out_reload
4403 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4404 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4405 = RELOAD_FOR_OPADDR_ADDR
;
4408 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4409 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4410 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4412 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4415 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4416 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4417 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4418 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4420 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4422 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4423 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4426 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4427 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4428 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4430 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4431 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4432 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4433 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4434 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4435 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4436 This is complicated by the fact that a single operand can have more
4437 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4438 choose_reload_regs without affecting code quality, and cases that
4439 actually fail are extremely rare, so it turns out to be better to fix
4440 the problem here by not generating cases that choose_reload_regs will
4442 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4443 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4445 We can reduce the register pressure by exploiting that a
4446 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4447 does not conflict with any of them, if it is only used for the first of
4448 the RELOAD_FOR_X_ADDRESS reloads. */
4450 int first_op_addr_num
= -2;
4451 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4452 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4453 int need_change
= 0;
4454 /* We use last_op_addr_reload and the contents of the above arrays
4455 first as flags - -2 means no instance encountered, -1 means exactly
4456 one instance encountered.
4457 If more than one instance has been encountered, we store the reload
4458 number of the first reload of the kind in question; reload numbers
4459 are known to be non-negative. */
4460 for (i
= 0; i
< noperands
; i
++)
4461 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4462 for (i
= n_reloads
- 1; i
>= 0; i
--)
4464 switch (rld
[i
].when_needed
)
4466 case RELOAD_FOR_OPERAND_ADDRESS
:
4467 if (++first_op_addr_num
>= 0)
4469 first_op_addr_num
= i
;
4473 case RELOAD_FOR_INPUT_ADDRESS
:
4474 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4476 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4480 case RELOAD_FOR_OUTPUT_ADDRESS
:
4481 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4483 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4494 for (i
= 0; i
< n_reloads
; i
++)
4497 enum reload_type type
;
4499 switch (rld
[i
].when_needed
)
4501 case RELOAD_FOR_OPADDR_ADDR
:
4502 first_num
= first_op_addr_num
;
4503 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4505 case RELOAD_FOR_INPADDR_ADDRESS
:
4506 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4507 type
= RELOAD_FOR_INPUT_ADDRESS
;
4509 case RELOAD_FOR_OUTADDR_ADDRESS
:
4510 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4511 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4518 else if (i
> first_num
)
4519 rld
[i
].when_needed
= type
;
4522 /* Check if the only TYPE reload that uses reload I is
4523 reload FIRST_NUM. */
4524 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4526 if (rld
[j
].when_needed
== type
4527 && (rld
[i
].secondary_p
4528 ? rld
[j
].secondary_in_reload
== i
4529 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4531 rld
[i
].when_needed
= type
;
4540 /* See if we have any reloads that are now allowed to be merged
4541 because we've changed when the reload is needed to
4542 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4543 check for the most common cases. */
4545 for (i
= 0; i
< n_reloads
; i
++)
4546 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4547 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4548 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4549 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4550 for (j
= 0; j
< n_reloads
; j
++)
4551 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4552 && rld
[j
].when_needed
== rld
[i
].when_needed
4553 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4554 && rld
[i
].rclass
== rld
[j
].rclass
4555 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4556 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4558 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4559 transfer_replacements (i
, j
);
4564 /* If we made any reloads for addresses, see if they violate a
4565 "no input reloads" requirement for this insn. But loads that we
4566 do after the insn (such as for output addresses) are fine. */
4567 if (no_input_reloads
)
4568 for (i
= 0; i
< n_reloads
; i
++)
4569 gcc_assert (rld
[i
].in
== 0
4570 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
4571 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
);
4574 /* Compute reload_mode and reload_nregs. */
4575 for (i
= 0; i
< n_reloads
; i
++)
4578 = (rld
[i
].inmode
== VOIDmode
4579 || (GET_MODE_SIZE (rld
[i
].outmode
)
4580 > GET_MODE_SIZE (rld
[i
].inmode
)))
4581 ? rld
[i
].outmode
: rld
[i
].inmode
;
4583 rld
[i
].nregs
= ira_reg_class_max_nregs
[rld
[i
].rclass
][rld
[i
].mode
];
4586 /* Special case a simple move with an input reload and a
4587 destination of a hard reg, if the hard reg is ok, use it. */
4588 for (i
= 0; i
< n_reloads
; i
++)
4589 if (rld
[i
].when_needed
== RELOAD_FOR_INPUT
4590 && GET_CODE (PATTERN (insn
)) == SET
4591 && REG_P (SET_DEST (PATTERN (insn
)))
4592 && (SET_SRC (PATTERN (insn
)) == rld
[i
].in
4593 || SET_SRC (PATTERN (insn
)) == rld
[i
].in_reg
)
4594 && !elimination_target_reg_p (SET_DEST (PATTERN (insn
))))
4596 rtx dest
= SET_DEST (PATTERN (insn
));
4597 unsigned int regno
= REGNO (dest
);
4599 if (regno
< FIRST_PSEUDO_REGISTER
4600 && TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].rclass
], regno
)
4601 && HARD_REGNO_MODE_OK (regno
, rld
[i
].mode
))
4603 int nr
= hard_regno_nregs
[regno
][rld
[i
].mode
];
4606 for (nri
= 1; nri
< nr
; nri
++)
4607 if (! TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].rclass
], regno
+ nri
))
4614 rld
[i
].reg_rtx
= dest
;
4621 /* Return true if alternative number ALTNUM in constraint-string
4622 CONSTRAINT is guaranteed to accept a reloaded constant-pool reference.
4623 MEM gives the reference if it didn't need any reloads, otherwise it
4627 alternative_allows_const_pool_ref (rtx mem ATTRIBUTE_UNUSED
,
4628 const char *constraint
, int altnum
)
4632 /* Skip alternatives before the one requested. */
4635 while (*constraint
++ != ',')
4639 /* Scan the requested alternative for TARGET_MEM_CONSTRAINT or 'o'.
4640 If one of them is present, this alternative accepts the result of
4641 passing a constant-pool reference through find_reloads_toplev.
4643 The same is true of extra memory constraints if the address
4644 was reloaded into a register. However, the target may elect
4645 to disallow the original constant address, forcing it to be
4646 reloaded into a register instead. */
4647 for (; (c
= *constraint
) && c
!= ',' && c
!= '#';
4648 constraint
+= CONSTRAINT_LEN (c
, constraint
))
4650 enum constraint_num cn
= lookup_constraint (constraint
);
4651 if (insn_extra_memory_constraint (cn
)
4652 && (mem
== NULL
|| constraint_satisfied_p (mem
, cn
)))
4658 /* Scan X for memory references and scan the addresses for reloading.
4659 Also checks for references to "constant" regs that we want to eliminate
4660 and replaces them with the values they stand for.
4661 We may alter X destructively if it contains a reference to such.
4662 If X is just a constant reg, we return the equivalent value
4665 IND_LEVELS says how many levels of indirect addressing this machine
4668 OPNUM and TYPE identify the purpose of the reload.
4670 IS_SET_DEST is true if X is the destination of a SET, which is not
4671 appropriate to be replaced by a constant.
4673 INSN, if nonzero, is the insn in which we do the reload. It is used
4674 to determine if we may generate output reloads, and where to put USEs
4675 for pseudos that we have to replace with stack slots.
4677 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4678 result of find_reloads_address. */
4681 find_reloads_toplev (rtx x
, int opnum
, enum reload_type type
,
4682 int ind_levels
, int is_set_dest
, rtx_insn
*insn
,
4683 int *address_reloaded
)
4685 RTX_CODE code
= GET_CODE (x
);
4687 const char *fmt
= GET_RTX_FORMAT (code
);
4693 /* This code is duplicated for speed in find_reloads. */
4694 int regno
= REGNO (x
);
4695 if (reg_equiv_constant (regno
) != 0 && !is_set_dest
)
4696 x
= reg_equiv_constant (regno
);
4698 /* This creates (subreg (mem...)) which would cause an unnecessary
4699 reload of the mem. */
4700 else if (reg_equiv_mem (regno
) != 0)
4701 x
= reg_equiv_mem (regno
);
4703 else if (reg_equiv_memory_loc (regno
)
4704 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
4706 rtx mem
= make_memloc (x
, regno
);
4707 if (reg_equiv_address (regno
)
4708 || ! rtx_equal_p (mem
, reg_equiv_mem (regno
)))
4710 /* If this is not a toplevel operand, find_reloads doesn't see
4711 this substitution. We have to emit a USE of the pseudo so
4712 that delete_output_reload can see it. */
4713 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4714 /* We mark the USE with QImode so that we recognize it
4715 as one that can be safely deleted at the end of
4717 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
),
4720 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4721 opnum
, type
, ind_levels
, insn
);
4722 if (!rtx_equal_p (x
, mem
))
4723 push_reg_equiv_alt_mem (regno
, x
);
4724 if (address_reloaded
)
4725 *address_reloaded
= i
;
4734 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4735 opnum
, type
, ind_levels
, insn
);
4736 if (address_reloaded
)
4737 *address_reloaded
= i
;
4742 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
)))
4744 /* Check for SUBREG containing a REG that's equivalent to a
4745 constant. If the constant has a known value, truncate it
4746 right now. Similarly if we are extracting a single-word of a
4747 multi-word constant. If the constant is symbolic, allow it
4748 to be substituted normally. push_reload will strip the
4749 subreg later. The constant must not be VOIDmode, because we
4750 will lose the mode of the register (this should never happen
4751 because one of the cases above should handle it). */
4753 int regno
= REGNO (SUBREG_REG (x
));
4756 if (regno
>= FIRST_PSEUDO_REGISTER
4757 && reg_renumber
[regno
] < 0
4758 && reg_equiv_constant (regno
) != 0)
4761 simplify_gen_subreg (GET_MODE (x
), reg_equiv_constant (regno
),
4762 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
4764 if (CONSTANT_P (tem
)
4765 && !targetm
.legitimate_constant_p (GET_MODE (x
), tem
))
4767 tem
= force_const_mem (GET_MODE (x
), tem
);
4768 i
= find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4769 &XEXP (tem
, 0), opnum
, type
,
4771 if (address_reloaded
)
4772 *address_reloaded
= i
;
4777 /* If the subreg contains a reg that will be converted to a mem,
4778 attempt to convert the whole subreg to a (narrower or wider)
4779 memory reference instead. If this succeeds, we're done --
4780 otherwise fall through to check whether the inner reg still
4781 needs address reloads anyway. */
4783 if (regno
>= FIRST_PSEUDO_REGISTER
4784 && reg_equiv_memory_loc (regno
) != 0)
4786 tem
= find_reloads_subreg_address (x
, opnum
, type
, ind_levels
,
4787 insn
, address_reloaded
);
4793 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4797 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4798 ind_levels
, is_set_dest
, insn
,
4800 /* If we have replaced a reg with it's equivalent memory loc -
4801 that can still be handled here e.g. if it's in a paradoxical
4802 subreg - we must make the change in a copy, rather than using
4803 a destructive change. This way, find_reloads can still elect
4804 not to do the change. */
4805 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4807 x
= shallow_copy_rtx (x
);
4810 XEXP (x
, i
) = new_part
;
4816 /* Return a mem ref for the memory equivalent of reg REGNO.
4817 This mem ref is not shared with anything. */
4820 make_memloc (rtx ad
, int regno
)
4822 /* We must rerun eliminate_regs, in case the elimination
4823 offsets have changed. */
4825 = XEXP (eliminate_regs (reg_equiv_memory_loc (regno
), VOIDmode
, NULL_RTX
),
4828 /* If TEM might contain a pseudo, we must copy it to avoid
4829 modifying it when we do the substitution for the reload. */
4830 if (rtx_varies_p (tem
, 0))
4831 tem
= copy_rtx (tem
);
4833 tem
= replace_equiv_address_nv (reg_equiv_memory_loc (regno
), tem
);
4834 tem
= adjust_address_nv (tem
, GET_MODE (ad
), 0);
4836 /* Copy the result if it's still the same as the equivalence, to avoid
4837 modifying it when we do the substitution for the reload. */
4838 if (tem
== reg_equiv_memory_loc (regno
))
4839 tem
= copy_rtx (tem
);
4843 /* Returns true if AD could be turned into a valid memory reference
4844 to mode MODE in address space AS by reloading the part pointed to
4845 by PART into a register. */
4848 maybe_memory_address_addr_space_p (enum machine_mode mode
, rtx ad
,
4849 addr_space_t as
, rtx
*part
)
4853 rtx reg
= gen_rtx_REG (GET_MODE (tem
), max_reg_num ());
4856 retv
= memory_address_addr_space_p (mode
, ad
, as
);
4862 /* Record all reloads needed for handling memory address AD
4863 which appears in *LOC in a memory reference to mode MODE
4864 which itself is found in location *MEMREFLOC.
4865 Note that we take shortcuts assuming that no multi-reg machine mode
4866 occurs as part of an address.
4868 OPNUM and TYPE specify the purpose of this reload.
4870 IND_LEVELS says how many levels of indirect addressing this machine
4873 INSN, if nonzero, is the insn in which we do the reload. It is used
4874 to determine if we may generate output reloads, and where to put USEs
4875 for pseudos that we have to replace with stack slots.
4877 Value is one if this address is reloaded or replaced as a whole; it is
4878 zero if the top level of this address was not reloaded or replaced, and
4879 it is -1 if it may or may not have been reloaded or replaced.
4881 Note that there is no verification that the address will be valid after
4882 this routine does its work. Instead, we rely on the fact that the address
4883 was valid when reload started. So we need only undo things that reload
4884 could have broken. These are wrong register types, pseudos not allocated
4885 to a hard register, and frame pointer elimination. */
4888 find_reloads_address (enum machine_mode mode
, rtx
*memrefloc
, rtx ad
,
4889 rtx
*loc
, int opnum
, enum reload_type type
,
4890 int ind_levels
, rtx_insn
*insn
)
4892 addr_space_t as
= memrefloc
? MEM_ADDR_SPACE (*memrefloc
)
4893 : ADDR_SPACE_GENERIC
;
4895 int removed_and
= 0;
4899 /* If the address is a register, see if it is a legitimate address and
4900 reload if not. We first handle the cases where we need not reload
4901 or where we must reload in a non-standard way. */
4907 if (reg_equiv_constant (regno
) != 0)
4909 find_reloads_address_part (reg_equiv_constant (regno
), loc
,
4910 base_reg_class (mode
, as
, MEM
, SCRATCH
),
4911 GET_MODE (ad
), opnum
, type
, ind_levels
);
4915 tem
= reg_equiv_memory_loc (regno
);
4918 if (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
)
4920 tem
= make_memloc (ad
, regno
);
4921 if (! strict_memory_address_addr_space_p (GET_MODE (tem
),
4923 MEM_ADDR_SPACE (tem
)))
4927 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4928 &XEXP (tem
, 0), opnum
,
4929 ADDR_TYPE (type
), ind_levels
, insn
);
4930 if (!rtx_equal_p (tem
, orig
))
4931 push_reg_equiv_alt_mem (regno
, tem
);
4933 /* We can avoid a reload if the register's equivalent memory
4934 expression is valid as an indirect memory address.
4935 But not all addresses are valid in a mem used as an indirect
4936 address: only reg or reg+constant. */
4939 && strict_memory_address_addr_space_p (mode
, tem
, as
)
4940 && (REG_P (XEXP (tem
, 0))
4941 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4942 && REG_P (XEXP (XEXP (tem
, 0), 0))
4943 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4945 /* TEM is not the same as what we'll be replacing the
4946 pseudo with after reload, put a USE in front of INSN
4947 in the final reload pass. */
4949 && num_not_at_initial_offset
4950 && ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
4953 /* We mark the USE with QImode so that we
4954 recognize it as one that can be safely
4955 deleted at the end of reload. */
4956 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
),
4959 /* This doesn't really count as replacing the address
4960 as a whole, since it is still a memory access. */
4968 /* The only remaining case where we can avoid a reload is if this is a
4969 hard register that is valid as a base register and which is not the
4970 subject of a CLOBBER in this insn. */
4972 else if (regno
< FIRST_PSEUDO_REGISTER
4973 && regno_ok_for_base_p (regno
, mode
, as
, MEM
, SCRATCH
)
4974 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4977 /* If we do not have one of the cases above, we must do the reload. */
4978 push_reload (ad
, NULL_RTX
, loc
, (rtx
*) 0,
4979 base_reg_class (mode
, as
, MEM
, SCRATCH
),
4980 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4984 if (strict_memory_address_addr_space_p (mode
, ad
, as
))
4986 /* The address appears valid, so reloads are not needed.
4987 But the address may contain an eliminable register.
4988 This can happen because a machine with indirect addressing
4989 may consider a pseudo register by itself a valid address even when
4990 it has failed to get a hard reg.
4991 So do a tree-walk to find and eliminate all such regs. */
4993 /* But first quickly dispose of a common case. */
4994 if (GET_CODE (ad
) == PLUS
4995 && CONST_INT_P (XEXP (ad
, 1))
4996 && REG_P (XEXP (ad
, 0))
4997 && reg_equiv_constant (REGNO (XEXP (ad
, 0))) == 0)
5000 subst_reg_equivs_changed
= 0;
5001 *loc
= subst_reg_equivs (ad
, insn
);
5003 if (! subst_reg_equivs_changed
)
5006 /* Check result for validity after substitution. */
5007 if (strict_memory_address_addr_space_p (mode
, ad
, as
))
5011 #ifdef LEGITIMIZE_RELOAD_ADDRESS
5014 if (memrefloc
&& ADDR_SPACE_GENERIC_P (as
))
5016 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
5021 *memrefloc
= copy_rtx (*memrefloc
);
5022 XEXP (*memrefloc
, 0) = ad
;
5023 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
5029 /* The address is not valid. We have to figure out why. First see if
5030 we have an outer AND and remove it if so. Then analyze what's inside. */
5032 if (GET_CODE (ad
) == AND
)
5035 loc
= &XEXP (ad
, 0);
5039 /* One possibility for why the address is invalid is that it is itself
5040 a MEM. This can happen when the frame pointer is being eliminated, a
5041 pseudo is not allocated to a hard register, and the offset between the
5042 frame and stack pointers is not its initial value. In that case the
5043 pseudo will have been replaced by a MEM referring to the
5047 /* First ensure that the address in this MEM is valid. Then, unless
5048 indirect addresses are valid, reload the MEM into a register. */
5050 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
5051 opnum
, ADDR_TYPE (type
),
5052 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
5054 /* If tem was changed, then we must create a new memory reference to
5055 hold it and store it back into memrefloc. */
5056 if (tem
!= ad
&& memrefloc
)
5058 *memrefloc
= copy_rtx (*memrefloc
);
5059 copy_replacements (tem
, XEXP (*memrefloc
, 0));
5060 loc
= &XEXP (*memrefloc
, 0);
5062 loc
= &XEXP (*loc
, 0);
5065 /* Check similar cases as for indirect addresses as above except
5066 that we can allow pseudos and a MEM since they should have been
5067 taken care of above. */
5070 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
5071 || MEM_P (XEXP (tem
, 0))
5072 || ! (REG_P (XEXP (tem
, 0))
5073 || (GET_CODE (XEXP (tem
, 0)) == PLUS
5074 && REG_P (XEXP (XEXP (tem
, 0), 0))
5075 && CONST_INT_P (XEXP (XEXP (tem
, 0), 1)))))
5077 /* Must use TEM here, not AD, since it is the one that will
5078 have any subexpressions reloaded, if needed. */
5079 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0,
5080 base_reg_class (mode
, as
, MEM
, SCRATCH
), GET_MODE (tem
),
5083 return ! removed_and
;
5089 /* If we have address of a stack slot but it's not valid because the
5090 displacement is too large, compute the sum in a register.
5091 Handle all base registers here, not just fp/ap/sp, because on some
5092 targets (namely SH) we can also get too large displacements from
5093 big-endian corrections. */
5094 else if (GET_CODE (ad
) == PLUS
5095 && REG_P (XEXP (ad
, 0))
5096 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
5097 && CONST_INT_P (XEXP (ad
, 1))
5098 && (regno_ok_for_base_p (REGNO (XEXP (ad
, 0)), mode
, as
, PLUS
,
5100 /* Similarly, if we were to reload the base register and the
5101 mem+offset address is still invalid, then we want to reload
5102 the whole address, not just the base register. */
5103 || ! maybe_memory_address_addr_space_p
5104 (mode
, ad
, as
, &(XEXP (ad
, 0)))))
5107 /* Unshare the MEM rtx so we can safely alter it. */
5110 *memrefloc
= copy_rtx (*memrefloc
);
5111 loc
= &XEXP (*memrefloc
, 0);
5113 loc
= &XEXP (*loc
, 0);
5116 if (double_reg_address_ok
5117 && regno_ok_for_base_p (REGNO (XEXP (ad
, 0)), mode
, as
,
5120 /* Unshare the sum as well. */
5121 *loc
= ad
= copy_rtx (ad
);
5123 /* Reload the displacement into an index reg.
5124 We assume the frame pointer or arg pointer is a base reg. */
5125 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
5126 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
5132 /* If the sum of two regs is not necessarily valid,
5133 reload the sum into a base reg.
5134 That will at least work. */
5135 find_reloads_address_part (ad
, loc
,
5136 base_reg_class (mode
, as
, MEM
, SCRATCH
),
5137 GET_MODE (ad
), opnum
, type
, ind_levels
);
5139 return ! removed_and
;
5142 /* If we have an indexed stack slot, there are three possible reasons why
5143 it might be invalid: The index might need to be reloaded, the address
5144 might have been made by frame pointer elimination and hence have a
5145 constant out of range, or both reasons might apply.
5147 We can easily check for an index needing reload, but even if that is the
5148 case, we might also have an invalid constant. To avoid making the
5149 conservative assumption and requiring two reloads, we see if this address
5150 is valid when not interpreted strictly. If it is, the only problem is
5151 that the index needs a reload and find_reloads_address_1 will take care
5154 Handle all base registers here, not just fp/ap/sp, because on some
5155 targets (namely SPARC) we can also get invalid addresses from preventive
5156 subreg big-endian corrections made by find_reloads_toplev. We
5157 can also get expressions involving LO_SUM (rather than PLUS) from
5158 find_reloads_subreg_address.
5160 If we decide to do something, it must be that `double_reg_address_ok'
5161 is true. We generate a reload of the base register + constant and
5162 rework the sum so that the reload register will be added to the index.
5163 This is safe because we know the address isn't shared.
5165 We check for the base register as both the first and second operand of
5166 the innermost PLUS and/or LO_SUM. */
5168 for (op_index
= 0; op_index
< 2; ++op_index
)
5170 rtx operand
, addend
;
5171 enum rtx_code inner_code
;
5173 if (GET_CODE (ad
) != PLUS
)
5176 inner_code
= GET_CODE (XEXP (ad
, 0));
5177 if (!(GET_CODE (ad
) == PLUS
5178 && CONST_INT_P (XEXP (ad
, 1))
5179 && (inner_code
== PLUS
|| inner_code
== LO_SUM
)))
5182 operand
= XEXP (XEXP (ad
, 0), op_index
);
5183 if (!REG_P (operand
) || REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
5186 addend
= XEXP (XEXP (ad
, 0), 1 - op_index
);
5188 if ((regno_ok_for_base_p (REGNO (operand
), mode
, as
, inner_code
,
5190 || operand
== frame_pointer_rtx
5191 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
5192 || operand
== hard_frame_pointer_rtx
5194 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5195 || operand
== arg_pointer_rtx
5197 || operand
== stack_pointer_rtx
)
5198 && ! maybe_memory_address_addr_space_p
5199 (mode
, ad
, as
, &XEXP (XEXP (ad
, 0), 1 - op_index
)))
5204 offset_reg
= plus_constant (GET_MODE (ad
), operand
,
5205 INTVAL (XEXP (ad
, 1)));
5207 /* Form the adjusted address. */
5208 if (GET_CODE (XEXP (ad
, 0)) == PLUS
)
5209 ad
= gen_rtx_PLUS (GET_MODE (ad
),
5210 op_index
== 0 ? offset_reg
: addend
,
5211 op_index
== 0 ? addend
: offset_reg
);
5213 ad
= gen_rtx_LO_SUM (GET_MODE (ad
),
5214 op_index
== 0 ? offset_reg
: addend
,
5215 op_index
== 0 ? addend
: offset_reg
);
5218 cls
= base_reg_class (mode
, as
, MEM
, GET_CODE (addend
));
5219 find_reloads_address_part (XEXP (ad
, op_index
),
5220 &XEXP (ad
, op_index
), cls
,
5221 GET_MODE (ad
), opnum
, type
, ind_levels
);
5222 find_reloads_address_1 (mode
, as
,
5223 XEXP (ad
, 1 - op_index
), 1, GET_CODE (ad
),
5224 GET_CODE (XEXP (ad
, op_index
)),
5225 &XEXP (ad
, 1 - op_index
), opnum
,
5232 /* See if address becomes valid when an eliminable register
5233 in a sum is replaced. */
5236 if (GET_CODE (ad
) == PLUS
)
5237 tem
= subst_indexed_address (ad
);
5238 if (tem
!= ad
&& strict_memory_address_addr_space_p (mode
, tem
, as
))
5240 /* Ok, we win that way. Replace any additional eliminable
5243 subst_reg_equivs_changed
= 0;
5244 tem
= subst_reg_equivs (tem
, insn
);
5246 /* Make sure that didn't make the address invalid again. */
5248 if (! subst_reg_equivs_changed
5249 || strict_memory_address_addr_space_p (mode
, tem
, as
))
5256 /* If constants aren't valid addresses, reload the constant address
5258 if (CONSTANT_P (ad
) && ! strict_memory_address_addr_space_p (mode
, ad
, as
))
5260 enum machine_mode address_mode
= GET_MODE (ad
);
5261 if (address_mode
== VOIDmode
)
5262 address_mode
= targetm
.addr_space
.address_mode (as
);
5264 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5265 Unshare it so we can safely alter it. */
5266 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
5267 && CONSTANT_POOL_ADDRESS_P (ad
))
5269 *memrefloc
= copy_rtx (*memrefloc
);
5270 loc
= &XEXP (*memrefloc
, 0);
5272 loc
= &XEXP (*loc
, 0);
5275 find_reloads_address_part (ad
, loc
,
5276 base_reg_class (mode
, as
, MEM
, SCRATCH
),
5277 address_mode
, opnum
, type
, ind_levels
);
5278 return ! removed_and
;
5281 return find_reloads_address_1 (mode
, as
, ad
, 0, MEM
, SCRATCH
, loc
,
5282 opnum
, type
, ind_levels
, insn
);
5285 /* Find all pseudo regs appearing in AD
5286 that are eliminable in favor of equivalent values
5287 and do not have hard regs; replace them by their equivalents.
5288 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5289 front of it for pseudos that we have to replace with stack slots. */
5292 subst_reg_equivs (rtx ad
, rtx_insn
*insn
)
5294 RTX_CODE code
= GET_CODE (ad
);
5311 int regno
= REGNO (ad
);
5313 if (reg_equiv_constant (regno
) != 0)
5315 subst_reg_equivs_changed
= 1;
5316 return reg_equiv_constant (regno
);
5318 if (reg_equiv_memory_loc (regno
) && num_not_at_initial_offset
)
5320 rtx mem
= make_memloc (ad
, regno
);
5321 if (! rtx_equal_p (mem
, reg_equiv_mem (regno
)))
5323 subst_reg_equivs_changed
= 1;
5324 /* We mark the USE with QImode so that we recognize it
5325 as one that can be safely deleted at the end of
5327 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
),
5336 /* Quickly dispose of a common case. */
5337 if (XEXP (ad
, 0) == frame_pointer_rtx
5338 && CONST_INT_P (XEXP (ad
, 1)))
5346 fmt
= GET_RTX_FORMAT (code
);
5347 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5349 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
5353 /* Compute the sum of X and Y, making canonicalizations assumed in an
5354 address, namely: sum constant integers, surround the sum of two
5355 constants with a CONST, put the constant as the second operand, and
5356 group the constant on the outermost sum.
5358 This routine assumes both inputs are already in canonical form. */
5361 form_sum (enum machine_mode mode
, rtx x
, rtx y
)
5365 gcc_assert (GET_MODE (x
) == mode
|| GET_MODE (x
) == VOIDmode
);
5366 gcc_assert (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
);
5368 if (CONST_INT_P (x
))
5369 return plus_constant (mode
, y
, INTVAL (x
));
5370 else if (CONST_INT_P (y
))
5371 return plus_constant (mode
, x
, INTVAL (y
));
5372 else if (CONSTANT_P (x
))
5373 tem
= x
, x
= y
, y
= tem
;
5375 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
5376 return form_sum (mode
, XEXP (x
, 0), form_sum (mode
, XEXP (x
, 1), y
));
5378 /* Note that if the operands of Y are specified in the opposite
5379 order in the recursive calls below, infinite recursion will occur. */
5380 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
5381 return form_sum (mode
, form_sum (mode
, x
, XEXP (y
, 0)), XEXP (y
, 1));
5383 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5384 constant will have been placed second. */
5385 if (CONSTANT_P (x
) && CONSTANT_P (y
))
5387 if (GET_CODE (x
) == CONST
)
5389 if (GET_CODE (y
) == CONST
)
5392 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
5395 return gen_rtx_PLUS (mode
, x
, y
);
5398 /* If ADDR is a sum containing a pseudo register that should be
5399 replaced with a constant (from reg_equiv_constant),
5400 return the result of doing so, and also apply the associative
5401 law so that the result is more likely to be a valid address.
5402 (But it is not guaranteed to be one.)
5404 Note that at most one register is replaced, even if more are
5405 replaceable. Also, we try to put the result into a canonical form
5406 so it is more likely to be a valid address.
5408 In all other cases, return ADDR. */
5411 subst_indexed_address (rtx addr
)
5413 rtx op0
= 0, op1
= 0, op2
= 0;
5417 if (GET_CODE (addr
) == PLUS
)
5419 /* Try to find a register to replace. */
5420 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5422 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5423 && reg_renumber
[regno
] < 0
5424 && reg_equiv_constant (regno
) != 0)
5425 op0
= reg_equiv_constant (regno
);
5426 else if (REG_P (op1
)
5427 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5428 && reg_renumber
[regno
] < 0
5429 && reg_equiv_constant (regno
) != 0)
5430 op1
= reg_equiv_constant (regno
);
5431 else if (GET_CODE (op0
) == PLUS
5432 && (tem
= subst_indexed_address (op0
)) != op0
)
5434 else if (GET_CODE (op1
) == PLUS
5435 && (tem
= subst_indexed_address (op1
)) != op1
)
5440 /* Pick out up to three things to add. */
5441 if (GET_CODE (op1
) == PLUS
)
5442 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5443 else if (GET_CODE (op0
) == PLUS
)
5444 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5446 /* Compute the sum. */
5448 op1
= form_sum (GET_MODE (addr
), op1
, op2
);
5450 op0
= form_sum (GET_MODE (addr
), op0
, op1
);
5457 /* Update the REG_INC notes for an insn. It updates all REG_INC
5458 notes for the instruction which refer to REGNO the to refer
5459 to the reload number.
5461 INSN is the insn for which any REG_INC notes need updating.
5463 REGNO is the register number which has been reloaded.
5465 RELOADNUM is the reload number. */
5468 update_auto_inc_notes (rtx_insn
*insn ATTRIBUTE_UNUSED
, int regno ATTRIBUTE_UNUSED
,
5469 int reloadnum ATTRIBUTE_UNUSED
)
5474 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5475 if (REG_NOTE_KIND (link
) == REG_INC
5476 && (int) REGNO (XEXP (link
, 0)) == regno
)
5477 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5481 /* Record the pseudo registers we must reload into hard registers in a
5482 subexpression of a would-be memory address, X referring to a value
5483 in mode MODE. (This function is not called if the address we find
5486 CONTEXT = 1 means we are considering regs as index regs,
5487 = 0 means we are considering them as base regs.
5488 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5490 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5491 is the code of the index part of the address. Otherwise, pass SCRATCH
5493 OPNUM and TYPE specify the purpose of any reloads made.
5495 IND_LEVELS says how many levels of indirect addressing are
5496 supported at this point in the address.
5498 INSN, if nonzero, is the insn in which we do the reload. It is used
5499 to determine if we may generate output reloads.
5501 We return nonzero if X, as a whole, is reloaded or replaced. */
5503 /* Note that we take shortcuts assuming that no multi-reg machine mode
5504 occurs as part of an address.
5505 Also, this is not fully machine-customizable; it works for machines
5506 such as VAXen and 68000's and 32000's, but other possible machines
5507 could have addressing modes that this does not handle right.
5508 If you add push_reload calls here, you need to make sure gen_reload
5509 handles those cases gracefully. */
5512 find_reloads_address_1 (enum machine_mode mode
, addr_space_t as
,
5514 enum rtx_code outer_code
, enum rtx_code index_code
,
5515 rtx
*loc
, int opnum
, enum reload_type type
,
5516 int ind_levels
, rtx_insn
*insn
)
5518 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, AS, OUTER, INDEX) \
5520 ? regno_ok_for_base_p (REGNO, MODE, AS, OUTER, INDEX) \
5521 : REGNO_OK_FOR_INDEX_P (REGNO))
5523 enum reg_class context_reg_class
;
5524 RTX_CODE code
= GET_CODE (x
);
5525 bool reloaded_inner_of_autoinc
= false;
5528 context_reg_class
= INDEX_REG_CLASS
;
5530 context_reg_class
= base_reg_class (mode
, as
, outer_code
, index_code
);
5536 rtx orig_op0
= XEXP (x
, 0);
5537 rtx orig_op1
= XEXP (x
, 1);
5538 RTX_CODE code0
= GET_CODE (orig_op0
);
5539 RTX_CODE code1
= GET_CODE (orig_op1
);
5543 if (GET_CODE (op0
) == SUBREG
)
5545 op0
= SUBREG_REG (op0
);
5546 code0
= GET_CODE (op0
);
5547 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5548 op0
= gen_rtx_REG (word_mode
,
5550 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5551 GET_MODE (SUBREG_REG (orig_op0
)),
5552 SUBREG_BYTE (orig_op0
),
5553 GET_MODE (orig_op0
))));
5556 if (GET_CODE (op1
) == SUBREG
)
5558 op1
= SUBREG_REG (op1
);
5559 code1
= GET_CODE (op1
);
5560 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5561 /* ??? Why is this given op1's mode and above for
5562 ??? op0 SUBREGs we use word_mode? */
5563 op1
= gen_rtx_REG (GET_MODE (op1
),
5565 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5566 GET_MODE (SUBREG_REG (orig_op1
)),
5567 SUBREG_BYTE (orig_op1
),
5568 GET_MODE (orig_op1
))));
5570 /* Plus in the index register may be created only as a result of
5571 register rematerialization for expression like &localvar*4. Reload it.
5572 It may be possible to combine the displacement on the outer level,
5573 but it is probably not worthwhile to do so. */
5576 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5577 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5578 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5580 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5584 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5585 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5587 find_reloads_address_1 (mode
, as
, orig_op0
, 1, PLUS
, SCRATCH
,
5588 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5590 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, code0
,
5591 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5595 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5596 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5598 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, code1
,
5599 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5601 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5602 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5606 else if (code0
== CONST_INT
|| code0
== CONST
5607 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5608 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, code0
,
5609 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5612 else if (code1
== CONST_INT
|| code1
== CONST
5613 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5614 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, code1
,
5615 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5618 else if (code0
== REG
&& code1
== REG
)
5620 if (REGNO_OK_FOR_INDEX_P (REGNO (op1
))
5621 && regno_ok_for_base_p (REGNO (op0
), mode
, as
, PLUS
, REG
))
5623 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0
))
5624 && regno_ok_for_base_p (REGNO (op1
), mode
, as
, PLUS
, REG
))
5626 else if (regno_ok_for_base_p (REGNO (op0
), mode
, as
, PLUS
, REG
))
5627 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5628 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5630 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1
)))
5631 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, REG
,
5632 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5634 else if (regno_ok_for_base_p (REGNO (op1
), mode
, as
, PLUS
, REG
))
5635 find_reloads_address_1 (mode
, as
, orig_op0
, 1, PLUS
, SCRATCH
,
5636 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5638 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0
)))
5639 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, REG
,
5640 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5644 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, REG
,
5645 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5647 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5648 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5653 else if (code0
== REG
)
5655 find_reloads_address_1 (mode
, as
, orig_op0
, 1, PLUS
, SCRATCH
,
5656 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5658 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, REG
,
5659 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5663 else if (code1
== REG
)
5665 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5666 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5668 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, REG
,
5669 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5679 rtx op0
= XEXP (x
, 0);
5680 rtx op1
= XEXP (x
, 1);
5681 enum rtx_code index_code
;
5685 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5688 /* Currently, we only support {PRE,POST}_MODIFY constructs
5689 where a base register is {inc,dec}remented by the contents
5690 of another register or by a constant value. Thus, these
5691 operands must match. */
5692 gcc_assert (op0
== XEXP (op1
, 0));
5694 /* Require index register (or constant). Let's just handle the
5695 register case in the meantime... If the target allows
5696 auto-modify by a constant then we could try replacing a pseudo
5697 register with its equivalent constant where applicable.
5699 We also handle the case where the register was eliminated
5700 resulting in a PLUS subexpression.
5702 If we later decide to reload the whole PRE_MODIFY or
5703 POST_MODIFY, inc_for_reload might clobber the reload register
5704 before reading the index. The index register might therefore
5705 need to live longer than a TYPE reload normally would, so be
5706 conservative and class it as RELOAD_OTHER. */
5707 if ((REG_P (XEXP (op1
, 1))
5708 && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5709 || GET_CODE (XEXP (op1
, 1)) == PLUS
)
5710 find_reloads_address_1 (mode
, as
, XEXP (op1
, 1), 1, code
, SCRATCH
,
5711 &XEXP (op1
, 1), opnum
, RELOAD_OTHER
,
5714 gcc_assert (REG_P (XEXP (op1
, 0)));
5716 regno
= REGNO (XEXP (op1
, 0));
5717 index_code
= GET_CODE (XEXP (op1
, 1));
5719 /* A register that is incremented cannot be constant! */
5720 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5721 || reg_equiv_constant (regno
) == 0);
5723 /* Handle a register that is equivalent to a memory location
5724 which cannot be addressed directly. */
5725 if (reg_equiv_memory_loc (regno
) != 0
5726 && (reg_equiv_address (regno
) != 0
5727 || num_not_at_initial_offset
))
5729 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5731 if (reg_equiv_address (regno
)
5732 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5736 /* First reload the memory location's address.
5737 We can't use ADDR_TYPE (type) here, because we need to
5738 write back the value after reading it, hence we actually
5739 need two registers. */
5740 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5741 &XEXP (tem
, 0), opnum
,
5745 if (!rtx_equal_p (tem
, orig
))
5746 push_reg_equiv_alt_mem (regno
, tem
);
5748 /* Then reload the memory location into a base
5750 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5752 base_reg_class (mode
, as
,
5754 GET_MODE (x
), GET_MODE (x
), 0,
5755 0, opnum
, RELOAD_OTHER
);
5757 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5762 if (reg_renumber
[regno
] >= 0)
5763 regno
= reg_renumber
[regno
];
5765 /* We require a base register here... */
5766 if (!regno_ok_for_base_p (regno
, GET_MODE (x
), as
, code
, index_code
))
5768 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5769 &XEXP (op1
, 0), &XEXP (x
, 0),
5770 base_reg_class (mode
, as
,
5772 GET_MODE (x
), GET_MODE (x
), 0, 0,
5773 opnum
, RELOAD_OTHER
);
5775 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5785 if (REG_P (XEXP (x
, 0)))
5787 int regno
= REGNO (XEXP (x
, 0));
5791 /* A register that is incremented cannot be constant! */
5792 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5793 || reg_equiv_constant (regno
) == 0);
5795 /* Handle a register that is equivalent to a memory location
5796 which cannot be addressed directly. */
5797 if (reg_equiv_memory_loc (regno
) != 0
5798 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
5800 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5801 if (reg_equiv_address (regno
)
5802 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5806 /* First reload the memory location's address.
5807 We can't use ADDR_TYPE (type) here, because we need to
5808 write back the value after reading it, hence we actually
5809 need two registers. */
5810 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5811 &XEXP (tem
, 0), opnum
, type
,
5813 reloaded_inner_of_autoinc
= true;
5814 if (!rtx_equal_p (tem
, orig
))
5815 push_reg_equiv_alt_mem (regno
, tem
);
5816 /* Put this inside a new increment-expression. */
5817 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5818 /* Proceed to reload that, as if it contained a register. */
5822 /* If we have a hard register that is ok in this incdec context,
5823 don't make a reload. If the register isn't nice enough for
5824 autoincdec, we can reload it. But, if an autoincrement of a
5825 register that we here verified as playing nice, still outside
5826 isn't "valid", it must be that no autoincrement is "valid".
5827 If that is true and something made an autoincrement anyway,
5828 this must be a special context where one is allowed.
5829 (For example, a "push" instruction.)
5830 We can't improve this address, so leave it alone. */
5832 /* Otherwise, reload the autoincrement into a suitable hard reg
5833 and record how much to increment by. */
5835 if (reg_renumber
[regno
] >= 0)
5836 regno
= reg_renumber
[regno
];
5837 if (regno
>= FIRST_PSEUDO_REGISTER
5838 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, as
, code
,
5843 /* If we can output the register afterwards, do so, this
5844 saves the extra update.
5845 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5846 CALL_INSN - and it does not set CC0.
5847 But don't do this if we cannot directly address the
5848 memory location, since this will make it harder to
5849 reuse address reloads, and increases register pressure.
5850 Also don't do this if we can probably update x directly. */
5851 rtx equiv
= (MEM_P (XEXP (x
, 0))
5853 : reg_equiv_mem (regno
));
5854 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (x
));
5855 if (insn
&& NONJUMP_INSN_P (insn
) && equiv
5856 && memory_operand (equiv
, GET_MODE (equiv
))
5858 && ! sets_cc0_p (PATTERN (insn
))
5860 && ! (icode
!= CODE_FOR_nothing
5861 && insn_operand_matches (icode
, 0, equiv
)
5862 && insn_operand_matches (icode
, 1, equiv
))
5863 /* Using RELOAD_OTHER means we emit this and the reload we
5864 made earlier in the wrong order. */
5865 && !reloaded_inner_of_autoinc
)
5867 /* We use the original pseudo for loc, so that
5868 emit_reload_insns() knows which pseudo this
5869 reload refers to and updates the pseudo rtx, not
5870 its equivalent memory location, as well as the
5871 corresponding entry in reg_last_reload_reg. */
5872 loc
= &XEXP (x_orig
, 0);
5875 = push_reload (x
, x
, loc
, loc
,
5877 GET_MODE (x
), GET_MODE (x
), 0, 0,
5878 opnum
, RELOAD_OTHER
);
5883 = push_reload (x
, x
, loc
, (rtx
*) 0,
5885 GET_MODE (x
), GET_MODE (x
), 0, 0,
5888 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5893 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5903 /* Look for parts to reload in the inner expression and reload them
5904 too, in addition to this operation. Reloading all inner parts in
5905 addition to this one shouldn't be necessary, but at this point,
5906 we don't know if we can possibly omit any part that *can* be
5907 reloaded. Targets that are better off reloading just either part
5908 (or perhaps even a different part of an outer expression), should
5909 define LEGITIMIZE_RELOAD_ADDRESS. */
5910 find_reloads_address_1 (GET_MODE (XEXP (x
, 0)), as
, XEXP (x
, 0),
5911 context
, code
, SCRATCH
, &XEXP (x
, 0), opnum
,
5912 type
, ind_levels
, insn
);
5913 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5915 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5919 /* This is probably the result of a substitution, by eliminate_regs, of
5920 an equivalent address for a pseudo that was not allocated to a hard
5921 register. Verify that the specified address is valid and reload it
5924 Since we know we are going to reload this item, don't decrement for
5925 the indirection level.
5927 Note that this is actually conservative: it would be slightly more
5928 efficient to use the value of SPILL_INDIRECT_LEVELS from
5931 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5932 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5933 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5935 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5940 int regno
= REGNO (x
);
5942 if (reg_equiv_constant (regno
) != 0)
5944 find_reloads_address_part (reg_equiv_constant (regno
), loc
,
5946 GET_MODE (x
), opnum
, type
, ind_levels
);
5950 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5951 that feeds this insn. */
5952 if (reg_equiv_mem (regno
) != 0)
5954 push_reload (reg_equiv_mem (regno
), NULL_RTX
, loc
, (rtx
*) 0,
5956 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5961 if (reg_equiv_memory_loc (regno
)
5962 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
5964 rtx tem
= make_memloc (x
, regno
);
5965 if (reg_equiv_address (regno
) != 0
5966 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5969 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5970 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5972 if (!rtx_equal_p (x
, tem
))
5973 push_reg_equiv_alt_mem (regno
, x
);
5977 if (reg_renumber
[regno
] >= 0)
5978 regno
= reg_renumber
[regno
];
5980 if (regno
>= FIRST_PSEUDO_REGISTER
5981 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, as
, outer_code
,
5984 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5986 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5990 /* If a register appearing in an address is the subject of a CLOBBER
5991 in this insn, reload it into some other register to be safe.
5992 The CLOBBER is supposed to make the register unavailable
5993 from before this insn to after it. */
5994 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
5996 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5998 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
6005 if (REG_P (SUBREG_REG (x
)))
6007 /* If this is a SUBREG of a hard register and the resulting register
6008 is of the wrong class, reload the whole SUBREG. This avoids
6009 needless copies if SUBREG_REG is multi-word. */
6010 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6012 int regno ATTRIBUTE_UNUSED
= subreg_regno (x
);
6014 if (!REG_OK_FOR_CONTEXT (context
, regno
, mode
, as
, outer_code
,
6017 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
6019 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
6023 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
6024 is larger than the class size, then reload the whole SUBREG. */
6027 enum reg_class rclass
= context_reg_class
;
6028 if (ira_reg_class_max_nregs
[rclass
][GET_MODE (SUBREG_REG (x
))]
6029 > reg_class_size
[(int) rclass
])
6031 /* If the inner register will be replaced by a memory
6032 reference, we can do this only if we can replace the
6033 whole subreg by a (narrower) memory reference. If
6034 this is not possible, fall through and reload just
6035 the inner register (including address reloads). */
6036 if (reg_equiv_memory_loc (REGNO (SUBREG_REG (x
))) != 0)
6038 rtx tem
= find_reloads_subreg_address (x
, opnum
,
6044 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6045 GET_MODE (tem
), VOIDmode
, 0, 0,
6052 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6053 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
6066 const char *fmt
= GET_RTX_FORMAT (code
);
6069 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6072 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
6074 find_reloads_address_1 (mode
, as
, XEXP (x
, i
), context
,
6075 code
, SCRATCH
, &XEXP (x
, i
),
6076 opnum
, type
, ind_levels
, insn
);
6080 #undef REG_OK_FOR_CONTEXT
6084 /* X, which is found at *LOC, is a part of an address that needs to be
6085 reloaded into a register of class RCLASS. If X is a constant, or if
6086 X is a PLUS that contains a constant, check that the constant is a
6087 legitimate operand and that we are supposed to be able to load
6088 it into the register.
6090 If not, force the constant into memory and reload the MEM instead.
6092 MODE is the mode to use, in case X is an integer constant.
6094 OPNUM and TYPE describe the purpose of any reloads made.
6096 IND_LEVELS says how many levels of indirect addressing this machine
6100 find_reloads_address_part (rtx x
, rtx
*loc
, enum reg_class rclass
,
6101 enum machine_mode mode
, int opnum
,
6102 enum reload_type type
, int ind_levels
)
6105 && (!targetm
.legitimate_constant_p (mode
, x
)
6106 || targetm
.preferred_reload_class (x
, rclass
) == NO_REGS
))
6108 x
= force_const_mem (mode
, x
);
6109 find_reloads_address (mode
, &x
, XEXP (x
, 0), &XEXP (x
, 0),
6110 opnum
, type
, ind_levels
, 0);
6113 else if (GET_CODE (x
) == PLUS
6114 && CONSTANT_P (XEXP (x
, 1))
6115 && (!targetm
.legitimate_constant_p (GET_MODE (x
), XEXP (x
, 1))
6116 || targetm
.preferred_reload_class (XEXP (x
, 1), rclass
)
6121 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
6122 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
6123 find_reloads_address (mode
, &XEXP (x
, 1), XEXP (tem
, 0), &XEXP (tem
, 0),
6124 opnum
, type
, ind_levels
, 0);
6127 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6128 mode
, VOIDmode
, 0, 0, opnum
, type
);
6131 /* X, a subreg of a pseudo, is a part of an address that needs to be
6132 reloaded, and the pseusdo is equivalent to a memory location.
6134 Attempt to replace the whole subreg by a (possibly narrower or wider)
6135 memory reference. If this is possible, return this new memory
6136 reference, and push all required address reloads. Otherwise,
6139 OPNUM and TYPE identify the purpose of the reload.
6141 IND_LEVELS says how many levels of indirect addressing are
6142 supported at this point in the address.
6144 INSN, if nonzero, is the insn in which we do the reload. It is used
6145 to determine where to put USEs for pseudos that we have to replace with
6149 find_reloads_subreg_address (rtx x
, int opnum
, enum reload_type type
,
6150 int ind_levels
, rtx_insn
*insn
,
6151 int *address_reloaded
)
6153 enum machine_mode outer_mode
= GET_MODE (x
);
6154 enum machine_mode inner_mode
= GET_MODE (SUBREG_REG (x
));
6155 int regno
= REGNO (SUBREG_REG (x
));
6160 gcc_assert (reg_equiv_memory_loc (regno
) != 0);
6162 /* We cannot replace the subreg with a modified memory reference if:
6164 - we have a paradoxical subreg that implicitly acts as a zero or
6165 sign extension operation due to LOAD_EXTEND_OP;
6167 - we have a subreg that is implicitly supposed to act on the full
6168 register due to WORD_REGISTER_OPERATIONS (see also eliminate_regs);
6170 - the address of the equivalent memory location is mode-dependent; or
6172 - we have a paradoxical subreg and the resulting memory is not
6173 sufficiently aligned to allow access in the wider mode.
6175 In addition, we choose not to perform the replacement for *any*
6176 paradoxical subreg, even if it were possible in principle. This
6177 is to avoid generating wider memory references than necessary.
6179 This corresponds to how previous versions of reload used to handle
6180 paradoxical subregs where no address reload was required. */
6182 if (paradoxical_subreg_p (x
))
6185 #ifdef WORD_REGISTER_OPERATIONS
6186 if (GET_MODE_SIZE (outer_mode
) < GET_MODE_SIZE (inner_mode
)
6187 && ((GET_MODE_SIZE (outer_mode
) - 1) / UNITS_PER_WORD
6188 == (GET_MODE_SIZE (inner_mode
) - 1) / UNITS_PER_WORD
))
6192 /* Since we don't attempt to handle paradoxical subregs, we can just
6193 call into simplify_subreg, which will handle all remaining checks
6195 orig
= make_memloc (SUBREG_REG (x
), regno
);
6196 offset
= SUBREG_BYTE (x
);
6197 tem
= simplify_subreg (outer_mode
, orig
, inner_mode
, offset
);
6198 if (!tem
|| !MEM_P (tem
))
6201 /* Now push all required address reloads, if any. */
6202 reloaded
= find_reloads_address (GET_MODE (tem
), &tem
,
6203 XEXP (tem
, 0), &XEXP (tem
, 0),
6204 opnum
, type
, ind_levels
, insn
);
6205 /* ??? Do we need to handle nonzero offsets somehow? */
6206 if (!offset
&& !rtx_equal_p (tem
, orig
))
6207 push_reg_equiv_alt_mem (regno
, tem
);
6209 /* For some processors an address may be valid in the original mode but
6210 not in a smaller mode. For example, ARM accepts a scaled index register
6211 in SImode but not in HImode. Note that this is only a problem if the
6212 address in reg_equiv_mem is already invalid in the new mode; other
6213 cases would be fixed by find_reloads_address as usual.
6215 ??? We attempt to handle such cases here by doing an additional reload
6216 of the full address after the usual processing by find_reloads_address.
6217 Note that this may not work in the general case, but it seems to cover
6218 the cases where this situation currently occurs. A more general fix
6219 might be to reload the *value* instead of the address, but this would
6220 not be expected by the callers of this routine as-is.
6222 If find_reloads_address already completed replaced the address, there
6223 is nothing further to do. */
6225 && reg_equiv_mem (regno
) != 0
6226 && !strict_memory_address_addr_space_p
6227 (GET_MODE (x
), XEXP (reg_equiv_mem (regno
), 0),
6228 MEM_ADDR_SPACE (reg_equiv_mem (regno
))))
6230 push_reload (XEXP (tem
, 0), NULL_RTX
, &XEXP (tem
, 0), (rtx
*) 0,
6231 base_reg_class (GET_MODE (tem
), MEM_ADDR_SPACE (tem
),
6233 GET_MODE (XEXP (tem
, 0)), VOIDmode
, 0, 0, opnum
, type
);
6237 /* If this is not a toplevel operand, find_reloads doesn't see this
6238 substitution. We have to emit a USE of the pseudo so that
6239 delete_output_reload can see it. */
6240 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
6241 /* We mark the USE with QImode so that we recognize it as one that
6242 can be safely deleted at the end of reload. */
6243 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, SUBREG_REG (x
)), insn
),
6246 if (address_reloaded
)
6247 *address_reloaded
= reloaded
;
6252 /* Substitute into the current INSN the registers into which we have reloaded
6253 the things that need reloading. The array `replacements'
6254 contains the locations of all pointers that must be changed
6255 and says what to replace them with.
6257 Return the rtx that X translates into; usually X, but modified. */
6260 subst_reloads (rtx_insn
*insn
)
6264 for (i
= 0; i
< n_replacements
; i
++)
6266 struct replacement
*r
= &replacements
[i
];
6267 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6271 /* This checking takes a very long time on some platforms
6272 causing the gcc.c-torture/compile/limits-fnargs.c test
6273 to time out during testing. See PR 31850.
6275 Internal consistency test. Check that we don't modify
6276 anything in the equivalence arrays. Whenever something from
6277 those arrays needs to be reloaded, it must be unshared before
6278 being substituted into; the equivalence must not be modified.
6279 Otherwise, if the equivalence is used after that, it will
6280 have been modified, and the thing substituted (probably a
6281 register) is likely overwritten and not a usable equivalence. */
6284 for (check_regno
= 0; check_regno
< max_regno
; check_regno
++)
6286 #define CHECK_MODF(ARRAY) \
6287 gcc_assert (!(*reg_equivs)[check_regno].ARRAY \
6288 || !loc_mentioned_in_p (r->where, \
6289 (*reg_equivs)[check_regno].ARRAY))
6291 CHECK_MODF (constant
);
6292 CHECK_MODF (memory_loc
);
6293 CHECK_MODF (address
);
6297 #endif /* DEBUG_RELOAD */
6299 /* If we're replacing a LABEL_REF with a register, there must
6300 already be an indication (to e.g. flow) which label this
6301 register refers to. */
6302 gcc_assert (GET_CODE (*r
->where
) != LABEL_REF
6304 || find_reg_note (insn
,
6306 XEXP (*r
->where
, 0))
6307 || label_is_jump_target_p (XEXP (*r
->where
, 0), insn
));
6309 /* Encapsulate RELOADREG so its machine mode matches what
6310 used to be there. Note that gen_lowpart_common will
6311 do the wrong thing if RELOADREG is multi-word. RELOADREG
6312 will always be a REG here. */
6313 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
6314 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6316 *r
->where
= reloadreg
;
6318 /* If reload got no reg and isn't optional, something's wrong. */
6320 gcc_assert (rld
[r
->what
].optional
);
6324 /* Make a copy of any replacements being done into X and move those
6325 copies to locations in Y, a copy of X. */
6328 copy_replacements (rtx x
, rtx y
)
6330 copy_replacements_1 (&x
, &y
, n_replacements
);
6334 copy_replacements_1 (rtx
*px
, rtx
*py
, int orig_replacements
)
6338 struct replacement
*r
;
6342 for (j
= 0; j
< orig_replacements
; j
++)
6343 if (replacements
[j
].where
== px
)
6345 r
= &replacements
[n_replacements
++];
6347 r
->what
= replacements
[j
].what
;
6348 r
->mode
= replacements
[j
].mode
;
6353 code
= GET_CODE (x
);
6354 fmt
= GET_RTX_FORMAT (code
);
6356 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6359 copy_replacements_1 (&XEXP (x
, i
), &XEXP (y
, i
), orig_replacements
);
6360 else if (fmt
[i
] == 'E')
6361 for (j
= XVECLEN (x
, i
); --j
>= 0; )
6362 copy_replacements_1 (&XVECEXP (x
, i
, j
), &XVECEXP (y
, i
, j
),
6367 /* Change any replacements being done to *X to be done to *Y. */
6370 move_replacements (rtx
*x
, rtx
*y
)
6374 for (i
= 0; i
< n_replacements
; i
++)
6375 if (replacements
[i
].where
== x
)
6376 replacements
[i
].where
= y
;
6379 /* If LOC was scheduled to be replaced by something, return the replacement.
6380 Otherwise, return *LOC. */
6383 find_replacement (rtx
*loc
)
6385 struct replacement
*r
;
6387 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
6389 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6391 if (reloadreg
&& r
->where
== loc
)
6393 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6394 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6398 else if (reloadreg
&& GET_CODE (*loc
) == SUBREG
6399 && r
->where
== &SUBREG_REG (*loc
))
6401 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6402 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6404 return simplify_gen_subreg (GET_MODE (*loc
), reloadreg
,
6405 GET_MODE (SUBREG_REG (*loc
)),
6406 SUBREG_BYTE (*loc
));
6410 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6411 what's inside and make a new rtl if so. */
6412 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
6413 || GET_CODE (*loc
) == MULT
)
6415 rtx x
= find_replacement (&XEXP (*loc
, 0));
6416 rtx y
= find_replacement (&XEXP (*loc
, 1));
6418 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
6419 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
6425 /* Return nonzero if register in range [REGNO, ENDREGNO)
6426 appears either explicitly or implicitly in X
6427 other than being stored into (except for earlyclobber operands).
6429 References contained within the substructure at LOC do not count.
6430 LOC may be zero, meaning don't ignore anything.
6432 This is similar to refers_to_regno_p in rtlanal.c except that we
6433 look at equivalences for pseudos that didn't get hard registers. */
6436 refers_to_regno_for_reload_p (unsigned int regno
, unsigned int endregno
,
6448 code
= GET_CODE (x
);
6455 /* If this is a pseudo, a hard register must not have been allocated.
6456 X must therefore either be a constant or be in memory. */
6457 if (r
>= FIRST_PSEUDO_REGISTER
)
6459 if (reg_equiv_memory_loc (r
))
6460 return refers_to_regno_for_reload_p (regno
, endregno
,
6461 reg_equiv_memory_loc (r
),
6464 gcc_assert (reg_equiv_constant (r
) || reg_equiv_invariant (r
));
6468 return (endregno
> r
6469 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
6470 ? hard_regno_nregs
[r
][GET_MODE (x
)]
6474 /* If this is a SUBREG of a hard reg, we can see exactly which
6475 registers are being modified. Otherwise, handle normally. */
6476 if (REG_P (SUBREG_REG (x
))
6477 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6479 unsigned int inner_regno
= subreg_regno (x
);
6480 unsigned int inner_endregno
6481 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6482 ? subreg_nregs (x
) : 1);
6484 return endregno
> inner_regno
&& regno
< inner_endregno
;
6490 if (&SET_DEST (x
) != loc
6491 /* Note setting a SUBREG counts as referring to the REG it is in for
6492 a pseudo but not for hard registers since we can
6493 treat each word individually. */
6494 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6495 && loc
!= &SUBREG_REG (SET_DEST (x
))
6496 && REG_P (SUBREG_REG (SET_DEST (x
)))
6497 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6498 && refers_to_regno_for_reload_p (regno
, endregno
,
6499 SUBREG_REG (SET_DEST (x
)),
6501 /* If the output is an earlyclobber operand, this is
6503 || ((!REG_P (SET_DEST (x
))
6504 || earlyclobber_operand_p (SET_DEST (x
)))
6505 && refers_to_regno_for_reload_p (regno
, endregno
,
6506 SET_DEST (x
), loc
))))
6509 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6518 /* X does not match, so try its subexpressions. */
6520 fmt
= GET_RTX_FORMAT (code
);
6521 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6523 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6531 if (refers_to_regno_for_reload_p (regno
, endregno
,
6535 else if (fmt
[i
] == 'E')
6538 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6539 if (loc
!= &XVECEXP (x
, i
, j
)
6540 && refers_to_regno_for_reload_p (regno
, endregno
,
6541 XVECEXP (x
, i
, j
), loc
))
6548 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6549 we check if any register number in X conflicts with the relevant register
6550 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6551 contains a MEM (we don't bother checking for memory addresses that can't
6552 conflict because we expect this to be a rare case.
6554 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6555 that we look at equivalences for pseudos that didn't get hard registers. */
6558 reg_overlap_mentioned_for_reload_p (rtx x
, rtx in
)
6560 int regno
, endregno
;
6562 /* Overly conservative. */
6563 if (GET_CODE (x
) == STRICT_LOW_PART
6564 || GET_RTX_CLASS (GET_CODE (x
)) == RTX_AUTOINC
)
6567 /* If either argument is a constant, then modifying X can not affect IN. */
6568 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6570 else if (GET_CODE (x
) == SUBREG
&& MEM_P (SUBREG_REG (x
)))
6571 return refers_to_mem_for_reload_p (in
);
6572 else if (GET_CODE (x
) == SUBREG
)
6574 regno
= REGNO (SUBREG_REG (x
));
6575 if (regno
< FIRST_PSEUDO_REGISTER
)
6576 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6577 GET_MODE (SUBREG_REG (x
)),
6580 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6581 ? subreg_nregs (x
) : 1);
6583 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6589 /* If this is a pseudo, it must not have been assigned a hard register.
6590 Therefore, it must either be in memory or be a constant. */
6592 if (regno
>= FIRST_PSEUDO_REGISTER
)
6594 if (reg_equiv_memory_loc (regno
))
6595 return refers_to_mem_for_reload_p (in
);
6596 gcc_assert (reg_equiv_constant (regno
));
6600 endregno
= END_HARD_REGNO (x
);
6602 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6605 return refers_to_mem_for_reload_p (in
);
6606 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6607 || GET_CODE (x
) == CC0
)
6608 return reg_mentioned_p (x
, in
);
6611 gcc_assert (GET_CODE (x
) == PLUS
);
6613 /* We actually want to know if X is mentioned somewhere inside IN.
6614 We must not say that (plus (sp) (const_int 124)) is in
6615 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6616 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6617 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6622 else if (GET_CODE (in
) == PLUS
)
6623 return (rtx_equal_p (x
, in
)
6624 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 0))
6625 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 1)));
6626 else return (reg_overlap_mentioned_for_reload_p (XEXP (x
, 0), in
)
6627 || reg_overlap_mentioned_for_reload_p (XEXP (x
, 1), in
));
6633 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6637 refers_to_mem_for_reload_p (rtx x
)
6646 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6647 && reg_equiv_memory_loc (REGNO (x
)));
6649 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6650 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6652 && (MEM_P (XEXP (x
, i
))
6653 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6659 /* Check the insns before INSN to see if there is a suitable register
6660 containing the same value as GOAL.
6661 If OTHER is -1, look for a register in class RCLASS.
6662 Otherwise, just see if register number OTHER shares GOAL's value.
6664 Return an rtx for the register found, or zero if none is found.
6666 If RELOAD_REG_P is (short *)1,
6667 we reject any hard reg that appears in reload_reg_rtx
6668 because such a hard reg is also needed coming into this insn.
6670 If RELOAD_REG_P is any other nonzero value,
6671 it is a vector indexed by hard reg number
6672 and we reject any hard reg whose element in the vector is nonnegative
6673 as well as any that appears in reload_reg_rtx.
6675 If GOAL is zero, then GOALREG is a register number; we look
6676 for an equivalent for that register.
6678 MODE is the machine mode of the value we want an equivalence for.
6679 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6681 This function is used by jump.c as well as in the reload pass.
6683 If GOAL is the sum of the stack pointer and a constant, we treat it
6684 as if it were a constant except that sp is required to be unchanging. */
6687 find_equiv_reg (rtx goal
, rtx_insn
*insn
, enum reg_class rclass
, int other
,
6688 short *reload_reg_p
, int goalreg
, enum machine_mode mode
)
6691 rtx goaltry
, valtry
, value
;
6698 int goal_mem_addr_varies
= 0;
6699 int need_stable_sp
= 0;
6706 else if (REG_P (goal
))
6707 regno
= REGNO (goal
);
6708 else if (MEM_P (goal
))
6710 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6711 if (MEM_VOLATILE_P (goal
))
6713 if (flag_float_store
&& SCALAR_FLOAT_MODE_P (GET_MODE (goal
)))
6715 /* An address with side effects must be reexecuted. */
6730 else if (CONSTANT_P (goal
))
6732 else if (GET_CODE (goal
) == PLUS
6733 && XEXP (goal
, 0) == stack_pointer_rtx
6734 && CONSTANT_P (XEXP (goal
, 1)))
6735 goal_const
= need_stable_sp
= 1;
6736 else if (GET_CODE (goal
) == PLUS
6737 && XEXP (goal
, 0) == frame_pointer_rtx
6738 && CONSTANT_P (XEXP (goal
, 1)))
6744 /* Scan insns back from INSN, looking for one that copies
6745 a value into or out of GOAL.
6746 Stop and give up if we reach a label. */
6751 if (p
&& DEBUG_INSN_P (p
))
6754 if (p
== 0 || LABEL_P (p
)
6755 || num
> PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS
))
6758 /* Don't reuse register contents from before a setjmp-type
6759 function call; on the second return (from the longjmp) it
6760 might have been clobbered by a later reuse. It doesn't
6761 seem worthwhile to actually go and see if it is actually
6762 reused even if that information would be readily available;
6763 just don't reuse it across the setjmp call. */
6764 if (CALL_P (p
) && find_reg_note (p
, REG_SETJMP
, NULL_RTX
))
6767 if (NONJUMP_INSN_P (p
)
6768 /* If we don't want spill regs ... */
6769 && (! (reload_reg_p
!= 0
6770 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6771 /* ... then ignore insns introduced by reload; they aren't
6772 useful and can cause results in reload_as_needed to be
6773 different from what they were when calculating the need for
6774 spills. If we notice an input-reload insn here, we will
6775 reject it below, but it might hide a usable equivalent.
6776 That makes bad code. It may even fail: perhaps no reg was
6777 spilled for this insn because it was assumed we would find
6779 || INSN_UID (p
) < reload_first_uid
))
6782 pat
= single_set (p
);
6784 /* First check for something that sets some reg equal to GOAL. */
6787 && true_regnum (SET_SRC (pat
)) == regno
6788 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6791 && true_regnum (SET_DEST (pat
)) == regno
6792 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6794 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6795 /* When looking for stack pointer + const,
6796 make sure we don't use a stack adjust. */
6797 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6798 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6800 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6801 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6803 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6804 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6805 /* If we are looking for a constant,
6806 and something equivalent to that constant was copied
6807 into a reg, we can use that reg. */
6808 || (goal_const
&& REG_NOTES (p
) != 0
6809 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6810 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6812 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6813 || (REG_P (SET_DEST (pat
))
6814 && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem
, 0))
6815 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6816 && CONST_INT_P (goal
)
6818 = operand_subword (XEXP (tem
, 0), 0, 0,
6820 && rtx_equal_p (goal
, goaltry
)
6822 = operand_subword (SET_DEST (pat
), 0, 0,
6824 && (valueno
= true_regnum (valtry
)) >= 0)))
6825 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6827 && REG_P (SET_DEST (pat
))
6828 && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem
, 0))
6829 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6830 && CONST_INT_P (goal
)
6831 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6833 && rtx_equal_p (goal
, goaltry
)
6835 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6836 && (valueno
= true_regnum (valtry
)) >= 0)))
6840 if (valueno
!= other
)
6843 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6845 else if (!in_hard_reg_set_p (reg_class_contents
[(int) rclass
],
6855 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6856 (or copying VALUE into GOAL, if GOAL is also a register).
6857 Now verify that VALUE is really valid. */
6859 /* VALUENO is the register number of VALUE; a hard register. */
6861 /* Don't try to re-use something that is killed in this insn. We want
6862 to be able to trust REG_UNUSED notes. */
6863 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6866 /* If we propose to get the value from the stack pointer or if GOAL is
6867 a MEM based on the stack pointer, we need a stable SP. */
6868 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6869 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6873 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6874 if (GET_MODE (value
) != mode
)
6877 /* Reject VALUE if it was loaded from GOAL
6878 and is also a register that appears in the address of GOAL. */
6880 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6881 && refers_to_regno_for_reload_p (valueno
, end_hard_regno (mode
, valueno
),
6885 /* Reject registers that overlap GOAL. */
6887 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6888 nregs
= hard_regno_nregs
[regno
][mode
];
6891 valuenregs
= hard_regno_nregs
[valueno
][mode
];
6893 if (!goal_mem
&& !goal_const
6894 && regno
+ nregs
> valueno
&& regno
< valueno
+ valuenregs
)
6897 /* Reject VALUE if it is one of the regs reserved for reloads.
6898 Reload1 knows how to reuse them anyway, and it would get
6899 confused if we allocated one without its knowledge.
6900 (Now that insns introduced by reload are ignored above,
6901 this case shouldn't happen, but I'm not positive.) */
6903 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6906 for (i
= 0; i
< valuenregs
; ++i
)
6907 if (reload_reg_p
[valueno
+ i
] >= 0)
6911 /* Reject VALUE if it is a register being used for an input reload
6912 even if it is not one of those reserved. */
6914 if (reload_reg_p
!= 0)
6917 for (i
= 0; i
< n_reloads
; i
++)
6918 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6920 int regno1
= REGNO (rld
[i
].reg_rtx
);
6921 int nregs1
= hard_regno_nregs
[regno1
]
6922 [GET_MODE (rld
[i
].reg_rtx
)];
6923 if (regno1
< valueno
+ valuenregs
6924 && regno1
+ nregs1
> valueno
)
6930 /* We must treat frame pointer as varying here,
6931 since it can vary--in a nonlocal goto as generated by expand_goto. */
6932 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6934 /* Now verify that the values of GOAL and VALUE remain unaltered
6935 until INSN is reached. */
6944 /* Don't trust the conversion past a function call
6945 if either of the two is in a call-clobbered register, or memory. */
6950 if (goal_mem
|| need_stable_sp
)
6953 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6954 for (i
= 0; i
< nregs
; ++i
)
6955 if (call_used_regs
[regno
+ i
]
6956 || HARD_REGNO_CALL_PART_CLOBBERED (regno
+ i
, mode
))
6959 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6960 for (i
= 0; i
< valuenregs
; ++i
)
6961 if (call_used_regs
[valueno
+ i
]
6962 || HARD_REGNO_CALL_PART_CLOBBERED (valueno
+ i
, mode
))
6970 /* Watch out for unspec_volatile, and volatile asms. */
6971 if (volatile_insn_p (pat
))
6974 /* If this insn P stores in either GOAL or VALUE, return 0.
6975 If GOAL is a memory ref and this insn writes memory, return 0.
6976 If GOAL is a memory ref and its address is not constant,
6977 and this insn P changes a register used in GOAL, return 0. */
6979 if (GET_CODE (pat
) == COND_EXEC
)
6980 pat
= COND_EXEC_CODE (pat
);
6981 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6983 rtx dest
= SET_DEST (pat
);
6984 while (GET_CODE (dest
) == SUBREG
6985 || GET_CODE (dest
) == ZERO_EXTRACT
6986 || GET_CODE (dest
) == STRICT_LOW_PART
)
6987 dest
= XEXP (dest
, 0);
6990 int xregno
= REGNO (dest
);
6992 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6993 xnregs
= hard_regno_nregs
[xregno
][GET_MODE (dest
)];
6996 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6998 if (xregno
< valueno
+ valuenregs
6999 && xregno
+ xnregs
> valueno
)
7001 if (goal_mem_addr_varies
7002 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
7004 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
7007 else if (goal_mem
&& MEM_P (dest
)
7008 && ! push_operand (dest
, GET_MODE (dest
)))
7010 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
7011 && reg_equiv_memory_loc (regno
) != 0)
7013 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
7016 else if (GET_CODE (pat
) == PARALLEL
)
7019 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
7021 rtx v1
= XVECEXP (pat
, 0, i
);
7022 if (GET_CODE (v1
) == COND_EXEC
)
7023 v1
= COND_EXEC_CODE (v1
);
7024 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
7026 rtx dest
= SET_DEST (v1
);
7027 while (GET_CODE (dest
) == SUBREG
7028 || GET_CODE (dest
) == ZERO_EXTRACT
7029 || GET_CODE (dest
) == STRICT_LOW_PART
)
7030 dest
= XEXP (dest
, 0);
7033 int xregno
= REGNO (dest
);
7035 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
7036 xnregs
= hard_regno_nregs
[xregno
][GET_MODE (dest
)];
7039 if (xregno
< regno
+ nregs
7040 && xregno
+ xnregs
> regno
)
7042 if (xregno
< valueno
+ valuenregs
7043 && xregno
+ xnregs
> valueno
)
7045 if (goal_mem_addr_varies
7046 && reg_overlap_mentioned_for_reload_p (dest
,
7049 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
7052 else if (goal_mem
&& MEM_P (dest
)
7053 && ! push_operand (dest
, GET_MODE (dest
)))
7055 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
7056 && reg_equiv_memory_loc (regno
) != 0)
7058 else if (need_stable_sp
7059 && push_operand (dest
, GET_MODE (dest
)))
7065 if (CALL_P (p
) && CALL_INSN_FUNCTION_USAGE (p
))
7069 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
7070 link
= XEXP (link
, 1))
7072 pat
= XEXP (link
, 0);
7073 if (GET_CODE (pat
) == CLOBBER
)
7075 rtx dest
= SET_DEST (pat
);
7079 int xregno
= REGNO (dest
);
7081 = hard_regno_nregs
[xregno
][GET_MODE (dest
)];
7083 if (xregno
< regno
+ nregs
7084 && xregno
+ xnregs
> regno
)
7086 else if (xregno
< valueno
+ valuenregs
7087 && xregno
+ xnregs
> valueno
)
7089 else if (goal_mem_addr_varies
7090 && reg_overlap_mentioned_for_reload_p (dest
,
7095 else if (goal_mem
&& MEM_P (dest
)
7096 && ! push_operand (dest
, GET_MODE (dest
)))
7098 else if (need_stable_sp
7099 && push_operand (dest
, GET_MODE (dest
)))
7106 /* If this insn auto-increments or auto-decrements
7107 either regno or valueno, return 0 now.
7108 If GOAL is a memory ref and its address is not constant,
7109 and this insn P increments a register used in GOAL, return 0. */
7113 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
7114 if (REG_NOTE_KIND (link
) == REG_INC
7115 && REG_P (XEXP (link
, 0)))
7117 int incno
= REGNO (XEXP (link
, 0));
7118 if (incno
< regno
+ nregs
&& incno
>= regno
)
7120 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
7122 if (goal_mem_addr_varies
7123 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
7133 /* Find a place where INCED appears in an increment or decrement operator
7134 within X, and return the amount INCED is incremented or decremented by.
7135 The value is always positive. */
7138 find_inc_amount (rtx x
, rtx inced
)
7140 enum rtx_code code
= GET_CODE (x
);
7146 rtx addr
= XEXP (x
, 0);
7147 if ((GET_CODE (addr
) == PRE_DEC
7148 || GET_CODE (addr
) == POST_DEC
7149 || GET_CODE (addr
) == PRE_INC
7150 || GET_CODE (addr
) == POST_INC
)
7151 && XEXP (addr
, 0) == inced
)
7152 return GET_MODE_SIZE (GET_MODE (x
));
7153 else if ((GET_CODE (addr
) == PRE_MODIFY
7154 || GET_CODE (addr
) == POST_MODIFY
)
7155 && GET_CODE (XEXP (addr
, 1)) == PLUS
7156 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
7157 && XEXP (addr
, 0) == inced
7158 && CONST_INT_P (XEXP (XEXP (addr
, 1), 1)))
7160 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
7161 return i
< 0 ? -i
: i
;
7165 fmt
= GET_RTX_FORMAT (code
);
7166 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7170 int tem
= find_inc_amount (XEXP (x
, i
), inced
);
7177 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7179 int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
7189 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7190 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7194 reg_inc_found_and_valid_p (unsigned int regno
, unsigned int endregno
,
7201 if (! INSN_P (insn
))
7204 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
7205 if (REG_NOTE_KIND (link
) == REG_INC
)
7207 unsigned int test
= (int) REGNO (XEXP (link
, 0));
7208 if (test
>= regno
&& test
< endregno
)
7215 #define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7219 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7220 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7221 REG_INC. REGNO must refer to a hard register. */
7224 regno_clobbered_p (unsigned int regno
, rtx_insn
*insn
, enum machine_mode mode
,
7227 unsigned int nregs
, endregno
;
7229 /* regno must be a hard register. */
7230 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
);
7232 nregs
= hard_regno_nregs
[regno
][mode
];
7233 endregno
= regno
+ nregs
;
7235 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
7236 || (sets
== 1 && GET_CODE (PATTERN (insn
)) == SET
))
7237 && REG_P (XEXP (PATTERN (insn
), 0)))
7239 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
7241 return test
>= regno
&& test
< endregno
;
7244 if (sets
== 2 && reg_inc_found_and_valid_p (regno
, endregno
, insn
))
7247 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7249 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
7253 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7254 if ((GET_CODE (elt
) == CLOBBER
7255 || (sets
== 1 && GET_CODE (elt
) == SET
))
7256 && REG_P (XEXP (elt
, 0)))
7258 unsigned int test
= REGNO (XEXP (elt
, 0));
7260 if (test
>= regno
&& test
< endregno
)
7264 && reg_inc_found_and_valid_p (regno
, endregno
, elt
))
7272 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7274 reload_adjust_reg_for_mode (rtx reloadreg
, enum machine_mode mode
)
7278 if (GET_MODE (reloadreg
) == mode
)
7281 regno
= REGNO (reloadreg
);
7283 if (REG_WORDS_BIG_ENDIAN
)
7284 regno
+= (int) hard_regno_nregs
[regno
][GET_MODE (reloadreg
)]
7285 - (int) hard_regno_nregs
[regno
][mode
];
7287 return gen_rtx_REG (mode
, regno
);
7290 static const char *const reload_when_needed_name
[] =
7293 "RELOAD_FOR_OUTPUT",
7295 "RELOAD_FOR_INPUT_ADDRESS",
7296 "RELOAD_FOR_INPADDR_ADDRESS",
7297 "RELOAD_FOR_OUTPUT_ADDRESS",
7298 "RELOAD_FOR_OUTADDR_ADDRESS",
7299 "RELOAD_FOR_OPERAND_ADDRESS",
7300 "RELOAD_FOR_OPADDR_ADDR",
7302 "RELOAD_FOR_OTHER_ADDRESS"
7305 /* These functions are used to print the variables set by 'find_reloads' */
7308 debug_reload_to_stream (FILE *f
)
7315 for (r
= 0; r
< n_reloads
; r
++)
7317 fprintf (f
, "Reload %d: ", r
);
7321 fprintf (f
, "reload_in (%s) = ",
7322 GET_MODE_NAME (rld
[r
].inmode
));
7323 print_inline_rtx (f
, rld
[r
].in
, 24);
7324 fprintf (f
, "\n\t");
7327 if (rld
[r
].out
!= 0)
7329 fprintf (f
, "reload_out (%s) = ",
7330 GET_MODE_NAME (rld
[r
].outmode
));
7331 print_inline_rtx (f
, rld
[r
].out
, 24);
7332 fprintf (f
, "\n\t");
7335 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].rclass
]);
7337 fprintf (f
, "%s (opnum = %d)",
7338 reload_when_needed_name
[(int) rld
[r
].when_needed
],
7341 if (rld
[r
].optional
)
7342 fprintf (f
, ", optional");
7344 if (rld
[r
].nongroup
)
7345 fprintf (f
, ", nongroup");
7347 if (rld
[r
].inc
!= 0)
7348 fprintf (f
, ", inc by %d", rld
[r
].inc
);
7350 if (rld
[r
].nocombine
)
7351 fprintf (f
, ", can't combine");
7353 if (rld
[r
].secondary_p
)
7354 fprintf (f
, ", secondary_reload_p");
7356 if (rld
[r
].in_reg
!= 0)
7358 fprintf (f
, "\n\treload_in_reg: ");
7359 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
7362 if (rld
[r
].out_reg
!= 0)
7364 fprintf (f
, "\n\treload_out_reg: ");
7365 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
7368 if (rld
[r
].reg_rtx
!= 0)
7370 fprintf (f
, "\n\treload_reg_rtx: ");
7371 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
7375 if (rld
[r
].secondary_in_reload
!= -1)
7377 fprintf (f
, "%ssecondary_in_reload = %d",
7378 prefix
, rld
[r
].secondary_in_reload
);
7382 if (rld
[r
].secondary_out_reload
!= -1)
7383 fprintf (f
, "%ssecondary_out_reload = %d\n",
7384 prefix
, rld
[r
].secondary_out_reload
);
7387 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
7389 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
7390 insn_data
[rld
[r
].secondary_in_icode
].name
);
7394 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
7395 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
7396 insn_data
[rld
[r
].secondary_out_icode
].name
);
7405 debug_reload_to_stream (stderr
);