1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92, 93, 94, 1995 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
92 #include "insn-config.h"
93 #include "insn-codes.h"
97 #include "hard-reg-set.h"
101 #ifndef REGISTER_MOVE_COST
102 #define REGISTER_MOVE_COST(x, y) 2
105 /* The variables set up by `find_reloads' are:
107 n_reloads number of distinct reloads needed; max reload # + 1
108 tables indexed by reload number
109 reload_in rtx for value to reload from
110 reload_out rtx for where to store reload-reg afterward if nec
111 (often the same as reload_in)
112 reload_reg_class enum reg_class, saying what regs to reload into
113 reload_inmode enum machine_mode; mode this operand should have
114 when reloaded, on input.
115 reload_outmode enum machine_mode; mode this operand should have
116 when reloaded, on output.
117 reload_optional char, nonzero for an optional reload.
118 Optional reloads are ignored unless the
119 value is already sitting in a register.
120 reload_inc int, positive amount to increment or decrement by if
121 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
122 Ignored otherwise (don't assume it is zero).
123 reload_in_reg rtx. A reg for which reload_in is the equivalent.
124 If reload_in is a symbol_ref which came from
125 reg_equiv_constant, then this is the pseudo
126 which has that symbol_ref as equivalent.
127 reload_reg_rtx rtx. This is the register to reload into.
128 If it is zero when `find_reloads' returns,
129 you must find a suitable register in the class
130 specified by reload_reg_class, and store here
131 an rtx for that register with mode from
132 reload_inmode or reload_outmode.
133 reload_nocombine char, nonzero if this reload shouldn't be
134 combined with another reload.
135 reload_opnum int, operand number being reloaded. This is
136 used to group related reloads and need not always
137 be equal to the actual operand number in the insn,
138 though it current will be; for in-out operands, it
139 is one of the two operand numbers.
140 reload_when_needed enum, classifies reload as needed either for
141 addressing an input reload, addressing an output,
142 for addressing a non-reloaded mem ref,
143 or for unspecified purposes (i.e., more than one
145 reload_secondary_p int, 1 if this is a secondary register for one
147 reload_secondary_in_reload
148 reload_secondary_out_reload
149 int, gives the reload number of a secondary
150 reload, when needed; otherwise -1
151 reload_secondary_in_icode
152 reload_secondary_out_icode
153 enum insn_code, if a secondary reload is required,
154 gives the INSN_CODE that uses the secondary
155 reload as a scratch register, or CODE_FOR_nothing
156 if the secondary reload register is to be an
157 intermediate register. */
160 rtx reload_in
[MAX_RELOADS
];
161 rtx reload_out
[MAX_RELOADS
];
162 enum reg_class reload_reg_class
[MAX_RELOADS
];
163 enum machine_mode reload_inmode
[MAX_RELOADS
];
164 enum machine_mode reload_outmode
[MAX_RELOADS
];
165 rtx reload_reg_rtx
[MAX_RELOADS
];
166 char reload_optional
[MAX_RELOADS
];
167 int reload_inc
[MAX_RELOADS
];
168 rtx reload_in_reg
[MAX_RELOADS
];
169 char reload_nocombine
[MAX_RELOADS
];
170 int reload_opnum
[MAX_RELOADS
];
171 enum reload_type reload_when_needed
[MAX_RELOADS
];
172 int reload_secondary_p
[MAX_RELOADS
];
173 int reload_secondary_in_reload
[MAX_RELOADS
];
174 int reload_secondary_out_reload
[MAX_RELOADS
];
175 enum insn_code reload_secondary_in_icode
[MAX_RELOADS
];
176 enum insn_code reload_secondary_out_icode
[MAX_RELOADS
];
178 /* All the "earlyclobber" operands of the current insn
179 are recorded here. */
181 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
183 int reload_n_operands
;
185 /* Replacing reloads.
187 If `replace_reloads' is nonzero, then as each reload is recorded
188 an entry is made for it in the table `replacements'.
189 Then later `subst_reloads' can look through that table and
190 perform all the replacements needed. */
192 /* Nonzero means record the places to replace. */
193 static int replace_reloads
;
195 /* Each replacement is recorded with a structure like this. */
198 rtx
*where
; /* Location to store in */
199 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
200 a SUBREG; 0 otherwise. */
201 int what
; /* which reload this is for */
202 enum machine_mode mode
; /* mode it must have */
205 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
207 /* Number of replacements currently recorded. */
208 static int n_replacements
;
210 /* Used to track what is modified by an operand. */
213 int reg_flag
; /* Nonzero if referencing a register. */
214 int safe
; /* Nonzero if this can't conflict with anything. */
215 rtx base
; /* Base adddress for MEM. */
216 HOST_WIDE_INT start
; /* Starting offset or register number. */
217 HOST_WIDE_INT end
; /* Endinf offset or register number. */
220 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
221 (see reg_equiv_address). */
222 static rtx memlocs
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
223 static int n_memlocs
;
225 #ifdef SECONDARY_MEMORY_NEEDED
227 /* Save MEMs needed to copy from one class of registers to another. One MEM
228 is used per mode, but normally only one or two modes are ever used.
230 We keep two versions, before and after register elimination. The one
231 after register elimination is record separately for each operand. This
232 is done in case the address is not valid to be sure that we separately
235 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
236 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
239 /* The instruction we are doing reloads for;
240 so we can test whether a register dies in it. */
241 static rtx this_insn
;
243 /* Nonzero if this instruction is a user-specified asm with operands. */
244 static int this_insn_is_asm
;
246 /* If hard_regs_live_known is nonzero,
247 we can tell which hard regs are currently live,
248 at least enough to succeed in choosing dummy reloads. */
249 static int hard_regs_live_known
;
251 /* Indexed by hard reg number,
252 element is nonegative if hard reg has been spilled.
253 This vector is passed to `find_reloads' as an argument
254 and is not changed here. */
255 static short *static_reload_reg_p
;
257 /* Set to 1 in subst_reg_equivs if it changes anything. */
258 static int subst_reg_equivs_changed
;
260 /* On return from push_reload, holds the reload-number for the OUT
261 operand, which can be different for that from the input operand. */
262 static int output_reloadnum
;
264 /* Compare two RTX's. */
265 #define MATCHES(x, y) \
266 (x == y || (x != 0 && (GET_CODE (x) == REG \
267 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
268 : rtx_equal_p (x, y) && ! side_effects_p (x))))
270 /* Indicates if two reloads purposes are for similar enough things that we
271 can merge their reloads. */
272 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
273 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
274 || ((when1) == (when2) && (op1) == (op2)) \
275 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
276 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
277 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
278 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
279 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
281 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
282 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
283 ((when1) != (when2) \
284 || ! ((op1) == (op2) \
285 || (when1) == RELOAD_FOR_INPUT \
286 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
287 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
289 static int push_secondary_reload
PROTO((int, rtx
, int, int, enum reg_class
,
290 enum machine_mode
, enum reload_type
,
292 static int push_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
293 enum machine_mode
, enum machine_mode
,
294 int, int, int, enum reload_type
));
295 static void push_replacement
PROTO((rtx
*, int, enum machine_mode
));
296 static void combine_reloads
PROTO((void));
297 static rtx find_dummy_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*,
298 enum machine_mode
, enum machine_mode
,
299 enum reg_class
, int));
300 static int earlyclobber_operand_p
PROTO((rtx
));
301 static int hard_reg_set_here_p
PROTO((int, int, rtx
));
302 static struct decomposition decompose
PROTO((rtx
));
303 static int immune_p
PROTO((rtx
, rtx
, struct decomposition
));
304 static int alternative_allows_memconst
PROTO((char *, int));
305 static rtx find_reloads_toplev
PROTO((rtx
, int, enum reload_type
, int, int));
306 static rtx make_memloc
PROTO((rtx
, int));
307 static int find_reloads_address
PROTO((enum machine_mode
, rtx
*, rtx
, rtx
*,
308 int, enum reload_type
, int));
309 static rtx subst_reg_equivs
PROTO((rtx
));
310 static rtx subst_indexed_address
PROTO((rtx
));
311 static int find_reloads_address_1
PROTO((rtx
, int, rtx
*, int,
312 enum reload_type
,int));
313 static void find_reloads_address_part
PROTO((rtx
, rtx
*, enum reg_class
,
314 enum machine_mode
, int,
315 enum reload_type
, int));
316 static int find_inc_amount
PROTO((rtx
, rtx
));
318 #ifdef HAVE_SECONDARY_RELOADS
320 /* Determine if any secondary reloads are needed for loading (if IN_P is
321 non-zero) or storing (if IN_P is zero) X to or from a reload register of
322 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
323 are needed, push them.
325 Return the reload number of the secondary reload we made, or -1 if
326 we didn't need one. *PICODE is set to the insn_code to use if we do
327 need a secondary reload. */
330 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
336 enum reg_class reload_class
;
337 enum machine_mode reload_mode
;
338 enum reload_type type
;
339 enum insn_code
*picode
;
341 enum reg_class
class = NO_REGS
;
342 enum machine_mode mode
= reload_mode
;
343 enum insn_code icode
= CODE_FOR_nothing
;
344 enum reg_class t_class
= NO_REGS
;
345 enum machine_mode t_mode
= VOIDmode
;
346 enum insn_code t_icode
= CODE_FOR_nothing
;
347 enum reload_type secondary_type
;
349 int s_reload
, t_reload
= -1;
351 if (type
== RELOAD_FOR_INPUT_ADDRESS
|| type
== RELOAD_FOR_OUTPUT_ADDRESS
)
352 secondary_type
= type
;
354 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
356 *picode
= CODE_FOR_nothing
;
358 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
359 is still a pseudo-register by now, it *must* have an equivalent MEM
360 but we don't want to assume that), use that equivalent when seeing if
361 a secondary reload is needed since whether or not a reload is needed
362 might be sensitive to the form of the MEM. */
364 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
365 && reg_equiv_mem
[REGNO (x
)] != 0)
366 x
= reg_equiv_mem
[REGNO (x
)];
368 #ifdef SECONDARY_INPUT_RELOAD_CLASS
370 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
373 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
375 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
378 /* If we don't need any secondary registers, done. */
379 if (class == NO_REGS
)
382 /* Get a possible insn to use. If the predicate doesn't accept X, don't
385 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
386 : reload_out_optab
[(int) reload_mode
]);
388 if (icode
!= CODE_FOR_nothing
389 && insn_operand_predicate
[(int) icode
][in_p
]
390 && (! (insn_operand_predicate
[(int) icode
][in_p
]) (x
, reload_mode
)))
391 icode
= CODE_FOR_nothing
;
393 /* If we will be using an insn, see if it can directly handle the reload
394 register we will be using. If it can, the secondary reload is for a
395 scratch register. If it can't, we will use the secondary reload for
396 an intermediate register and require a tertiary reload for the scratch
399 if (icode
!= CODE_FOR_nothing
)
401 /* If IN_P is non-zero, the reload register will be the output in
402 operand 0. If IN_P is zero, the reload register will be the input
403 in operand 1. Outputs should have an initial "=", which we must
406 char insn_letter
= insn_operand_constraint
[(int) icode
][!in_p
][in_p
];
407 enum reg_class insn_class
408 = (insn_letter
== 'r' ? GENERAL_REGS
409 : REG_CLASS_FROM_LETTER (insn_letter
));
411 if (insn_class
== NO_REGS
412 || (in_p
&& insn_operand_constraint
[(int) icode
][!in_p
][0] != '=')
413 /* The scratch register's constraint must start with "=&". */
414 || insn_operand_constraint
[(int) icode
][2][0] != '='
415 || insn_operand_constraint
[(int) icode
][2][1] != '&')
418 if (reg_class_subset_p (reload_class
, insn_class
))
419 mode
= insn_operand_mode
[(int) icode
][2];
422 char t_letter
= insn_operand_constraint
[(int) icode
][2][2];
424 t_mode
= insn_operand_mode
[(int) icode
][2];
425 t_class
= (t_letter
== 'r' ? GENERAL_REGS
426 : REG_CLASS_FROM_LETTER (t_letter
));
428 icode
= CODE_FOR_nothing
;
432 /* This case isn't valid, so fail. Reload is allowed to use the same
433 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
434 in the case of a secondary register, we actually need two different
435 registers for correct code. We fail here to prevent the possibility of
436 silently generating incorrect code later.
438 The convention is that secondary input reloads are valid only if the
439 secondary_class is different from class. If you have such a case, you
440 can not use secondary reloads, you must work around the problem some
443 Allow this when MODE is not reload_mode and assume that the generated
444 code handles this case (it does on the Alpha, which is the only place
445 this currently happens). */
447 if (in_p
&& class == reload_class
&& mode
== reload_mode
)
450 /* If we need a tertiary reload, see if we have one we can reuse or else
453 if (t_class
!= NO_REGS
)
455 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
456 if (reload_secondary_p
[t_reload
]
457 && (reg_class_subset_p (t_class
, reload_reg_class
[t_reload
])
458 || reg_class_subset_p (reload_reg_class
[t_reload
], t_class
))
459 && ((in_p
&& reload_inmode
[t_reload
] == t_mode
)
460 || (! in_p
&& reload_outmode
[t_reload
] == t_mode
))
461 && ((in_p
&& (reload_secondary_in_icode
[t_reload
]
462 == CODE_FOR_nothing
))
463 || (! in_p
&&(reload_secondary_out_icode
[t_reload
]
464 == CODE_FOR_nothing
)))
465 && (reg_class_size
[(int) t_class
] == 1
466 #ifdef SMALL_REGISTER_CLASSES
470 && MERGABLE_RELOADS (secondary_type
,
471 reload_when_needed
[t_reload
],
472 opnum
, reload_opnum
[t_reload
]))
475 reload_inmode
[t_reload
] = t_mode
;
477 reload_outmode
[t_reload
] = t_mode
;
479 if (reg_class_subset_p (t_class
, reload_reg_class
[t_reload
]))
480 reload_reg_class
[t_reload
] = t_class
;
482 reload_opnum
[t_reload
] = MIN (reload_opnum
[t_reload
], opnum
);
483 reload_optional
[t_reload
] &= optional
;
484 reload_secondary_p
[t_reload
] = 1;
485 if (MERGE_TO_OTHER (secondary_type
, reload_when_needed
[t_reload
],
486 opnum
, reload_opnum
[t_reload
]))
487 reload_when_needed
[t_reload
] = RELOAD_OTHER
;
490 if (t_reload
== n_reloads
)
492 /* We need to make a new tertiary reload for this register class. */
493 reload_in
[t_reload
] = reload_out
[t_reload
] = 0;
494 reload_reg_class
[t_reload
] = t_class
;
495 reload_inmode
[t_reload
] = in_p
? t_mode
: VOIDmode
;
496 reload_outmode
[t_reload
] = ! in_p
? t_mode
: VOIDmode
;
497 reload_reg_rtx
[t_reload
] = 0;
498 reload_optional
[t_reload
] = optional
;
499 reload_inc
[t_reload
] = 0;
500 /* Maybe we could combine these, but it seems too tricky. */
501 reload_nocombine
[t_reload
] = 1;
502 reload_in_reg
[t_reload
] = 0;
503 reload_opnum
[t_reload
] = opnum
;
504 reload_when_needed
[t_reload
] = secondary_type
;
505 reload_secondary_in_reload
[t_reload
] = -1;
506 reload_secondary_out_reload
[t_reload
] = -1;
507 reload_secondary_in_icode
[t_reload
] = CODE_FOR_nothing
;
508 reload_secondary_out_icode
[t_reload
] = CODE_FOR_nothing
;
509 reload_secondary_p
[t_reload
] = 1;
515 /* See if we can reuse an existing secondary reload. */
516 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
517 if (reload_secondary_p
[s_reload
]
518 && (reg_class_subset_p (class, reload_reg_class
[s_reload
])
519 || reg_class_subset_p (reload_reg_class
[s_reload
], class))
520 && ((in_p
&& reload_inmode
[s_reload
] == mode
)
521 || (! in_p
&& reload_outmode
[s_reload
] == mode
))
522 && ((in_p
&& reload_secondary_in_reload
[s_reload
] == t_reload
)
523 || (! in_p
&& reload_secondary_out_reload
[s_reload
] == t_reload
))
524 && ((in_p
&& reload_secondary_in_icode
[s_reload
] == t_icode
)
525 || (! in_p
&& reload_secondary_out_icode
[s_reload
] == t_icode
))
526 && (reg_class_size
[(int) class] == 1
527 #ifdef SMALL_REGISTER_CLASSES
531 && MERGABLE_RELOADS (secondary_type
, reload_when_needed
[s_reload
],
532 opnum
, reload_opnum
[s_reload
]))
535 reload_inmode
[s_reload
] = mode
;
537 reload_outmode
[s_reload
] = mode
;
539 if (reg_class_subset_p (class, reload_reg_class
[s_reload
]))
540 reload_reg_class
[s_reload
] = class;
542 reload_opnum
[s_reload
] = MIN (reload_opnum
[s_reload
], opnum
);
543 reload_optional
[s_reload
] &= optional
;
544 reload_secondary_p
[s_reload
] = 1;
545 if (MERGE_TO_OTHER (secondary_type
, reload_when_needed
[s_reload
],
546 opnum
, reload_opnum
[s_reload
]))
547 reload_when_needed
[s_reload
] = RELOAD_OTHER
;
550 if (s_reload
== n_reloads
)
552 /* We need to make a new secondary reload for this register class. */
553 reload_in
[s_reload
] = reload_out
[s_reload
] = 0;
554 reload_reg_class
[s_reload
] = class;
556 reload_inmode
[s_reload
] = in_p
? mode
: VOIDmode
;
557 reload_outmode
[s_reload
] = ! in_p
? mode
: VOIDmode
;
558 reload_reg_rtx
[s_reload
] = 0;
559 reload_optional
[s_reload
] = optional
;
560 reload_inc
[s_reload
] = 0;
561 /* Maybe we could combine these, but it seems too tricky. */
562 reload_nocombine
[s_reload
] = 1;
563 reload_in_reg
[s_reload
] = 0;
564 reload_opnum
[s_reload
] = opnum
;
565 reload_when_needed
[s_reload
] = secondary_type
;
566 reload_secondary_in_reload
[s_reload
] = in_p
? t_reload
: -1;
567 reload_secondary_out_reload
[s_reload
] = ! in_p
? t_reload
: -1;
568 reload_secondary_in_icode
[s_reload
] = in_p
? t_icode
: CODE_FOR_nothing
;
569 reload_secondary_out_icode
[s_reload
]
570 = ! in_p
? t_icode
: CODE_FOR_nothing
;
571 reload_secondary_p
[s_reload
] = 1;
575 #ifdef SECONDARY_MEMORY_NEEDED
576 /* If we need a memory location to copy between the two reload regs,
579 if (in_p
&& icode
== CODE_FOR_nothing
580 && SECONDARY_MEMORY_NEEDED (class, reload_class
, reload_mode
))
581 get_secondary_mem (x
, reload_mode
, opnum
, type
);
583 if (! in_p
&& icode
== CODE_FOR_nothing
584 && SECONDARY_MEMORY_NEEDED (reload_class
, class, reload_mode
))
585 get_secondary_mem (x
, reload_mode
, opnum
, type
);
592 #endif /* HAVE_SECONDARY_RELOADS */
594 #ifdef SECONDARY_MEMORY_NEEDED
596 /* Return a memory location that will be used to copy X in mode MODE.
597 If we haven't already made a location for this mode in this insn,
598 call find_reloads_address on the location being returned. */
601 get_secondary_mem (x
, mode
, opnum
, type
)
603 enum machine_mode mode
;
605 enum reload_type type
;
610 /* By default, if MODE is narrower than a word, widen it to a word.
611 This is required because most machines that require these memory
612 locations do not support short load and stores from all registers
613 (e.g., FP registers). */
615 #ifdef SECONDARY_MEMORY_NEEDED_MODE
616 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
618 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
619 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
622 /* If we already have made a MEM for this operand in MODE, return it. */
623 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
624 return secondary_memlocs_elim
[(int) mode
][opnum
];
626 /* If this is the first time we've tried to get a MEM for this mode,
627 allocate a new one. `something_changed' in reload will get set
628 by noticing that the frame size has changed. */
630 if (secondary_memlocs
[(int) mode
] == 0)
632 #ifdef SECONDARY_MEMORY_NEEDED_RTX
633 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
635 secondary_memlocs
[(int) mode
]
636 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
640 /* Get a version of the address doing any eliminations needed. If that
641 didn't give us a new MEM, make a new one if it isn't valid. */
643 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
644 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
646 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
647 loc
= copy_rtx (loc
);
649 /* The only time the call below will do anything is if the stack
650 offset is too large. In that case IND_LEVELS doesn't matter, so we
651 can just pass a zero. Adjust the type to be the address of the
652 corresponding object. If the address was valid, save the eliminated
653 address. If it wasn't valid, we need to make a reload each time, so
658 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
659 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
662 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
666 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
670 /* Clear any secondary memory locations we've made. */
673 clear_secondary_mem ()
675 bzero ((char *) secondary_memlocs
, sizeof secondary_memlocs
);
677 #endif /* SECONDARY_MEMORY_NEEDED */
679 /* Record one reload that needs to be performed.
680 IN is an rtx saying where the data are to be found before this instruction.
681 OUT says where they must be stored after the instruction.
682 (IN is zero for data not read, and OUT is zero for data not written.)
683 INLOC and OUTLOC point to the places in the instructions where
684 IN and OUT were found.
685 If IN and OUT are both non-zero, it means the same register must be used
686 to reload both IN and OUT.
688 CLASS is a register class required for the reloaded data.
689 INMODE is the machine mode that the instruction requires
690 for the reg that replaces IN and OUTMODE is likewise for OUT.
692 If IN is zero, then OUT's location and mode should be passed as
695 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
697 OPTIONAL nonzero means this reload does not need to be performed:
698 it can be discarded if that is more convenient.
700 OPNUM and TYPE say what the purpose of this reload is.
702 The return value is the reload-number for this reload.
704 If both IN and OUT are nonzero, in some rare cases we might
705 want to make two separate reloads. (Actually we never do this now.)
706 Therefore, the reload-number for OUT is stored in
707 output_reloadnum when we return; the return value applies to IN.
708 Usually (presently always), when IN and OUT are nonzero,
709 the two reload-numbers are equal, but the caller should be careful to
713 push_reload (in
, out
, inloc
, outloc
, class,
714 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
715 register rtx in
, out
;
717 enum reg_class
class;
718 enum machine_mode inmode
, outmode
;
722 enum reload_type type
;
726 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
727 int secondary_in_reload
= -1, secondary_out_reload
= -1;
728 enum insn_code secondary_in_icode
, secondary_out_icode
;
730 /* INMODE and/or OUTMODE could be VOIDmode if no mode
731 has been specified for the operand. In that case,
732 use the operand's mode as the mode to reload. */
733 if (inmode
== VOIDmode
&& in
!= 0)
734 inmode
= GET_MODE (in
);
735 if (outmode
== VOIDmode
&& out
!= 0)
736 outmode
= GET_MODE (out
);
738 /* If IN is a pseudo register everywhere-equivalent to a constant, and
739 it is not in a hard register, reload straight from the constant,
740 since we want to get rid of such pseudo registers.
741 Often this is done earlier, but not always in find_reloads_address. */
742 if (in
!= 0 && GET_CODE (in
) == REG
)
744 register int regno
= REGNO (in
);
746 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
747 && reg_equiv_constant
[regno
] != 0)
748 in
= reg_equiv_constant
[regno
];
751 /* Likewise for OUT. Of course, OUT will never be equivalent to
752 an actual constant, but it might be equivalent to a memory location
753 (in the case of a parameter). */
754 if (out
!= 0 && GET_CODE (out
) == REG
)
756 register int regno
= REGNO (out
);
758 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
759 && reg_equiv_constant
[regno
] != 0)
760 out
= reg_equiv_constant
[regno
];
763 /* If we have a read-write operand with an address side-effect,
764 change either IN or OUT so the side-effect happens only once. */
765 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
767 if (GET_CODE (XEXP (in
, 0)) == POST_INC
768 || GET_CODE (XEXP (in
, 0)) == POST_DEC
)
769 in
= gen_rtx (MEM
, GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
770 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
771 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
)
772 out
= gen_rtx (MEM
, GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
775 /* If we are reloading a (SUBREG constant ...), really reload just the
776 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
777 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
778 a pseudo and hence will become a MEM) with M1 wider than M2 and the
779 register is a pseudo, also reload the inside expression.
780 For machines that extend byte loads, do this for any SUBREG of a pseudo
781 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
782 M2 is an integral mode that gets extended when loaded.
783 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
784 either M1 is not valid for R or M2 is wider than a word but we only
785 need one word to store an M2-sized quantity in R.
786 (However, if OUT is nonzero, we need to reload the reg *and*
787 the subreg, so do nothing here, and let following statement handle it.)
789 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
790 we can't handle it here because CONST_INT does not indicate a mode.
792 Similarly, we must reload the inside expression if we have a
793 STRICT_LOW_PART (presumably, in == out in the cas).
795 Also reload the inner expression if it does not require a secondary
796 reload but the SUBREG does.
798 Finally, reload the inner expression if it is a register that is in
799 the class whose registers cannot be referenced in a different size
800 and M1 is not the same size as M2. */
802 if (in
!= 0 && GET_CODE (in
) == SUBREG
803 && (CONSTANT_P (SUBREG_REG (in
))
804 || GET_CODE (SUBREG_REG (in
)) == PLUS
806 || (((GET_CODE (SUBREG_REG (in
)) == REG
807 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
808 || GET_CODE (SUBREG_REG (in
)) == MEM
)
809 && ((GET_MODE_SIZE (inmode
)
810 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
811 #ifdef LOAD_EXTEND_OP
812 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
813 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
815 && (GET_MODE_SIZE (inmode
)
816 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
817 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
818 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
821 || (GET_CODE (SUBREG_REG (in
)) == REG
822 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
823 /* The case where out is nonzero
824 is handled differently in the following statement. */
825 && (out
== 0 || SUBREG_WORD (in
) == 0)
826 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
827 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
829 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
831 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
832 GET_MODE (SUBREG_REG (in
)))))
833 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in
))
836 #ifdef SECONDARY_INPUT_RELOAD_CLASS
837 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
838 && (SECONDARY_INPUT_RELOAD_CLASS (class,
839 GET_MODE (SUBREG_REG (in
)),
843 #ifdef CLASS_CANNOT_CHANGE_SIZE
844 || (GET_CODE (SUBREG_REG (in
)) == REG
845 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
846 && (TEST_HARD_REG_BIT
847 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
848 REGNO (SUBREG_REG (in
))))
849 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
850 != GET_MODE_SIZE (inmode
)))
854 in_subreg_loc
= inloc
;
855 inloc
= &SUBREG_REG (in
);
857 #ifndef LOAD_EXTEND_OP
858 if (GET_CODE (in
) == MEM
)
859 /* This is supposed to happen only for paradoxical subregs made by
860 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
861 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
864 inmode
= GET_MODE (in
);
867 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
868 either M1 is not valid for R or M2 is wider than a word but we only
869 need one word to store an M2-sized quantity in R.
871 However, we must reload the inner reg *as well as* the subreg in
874 if (in
!= 0 && GET_CODE (in
) == SUBREG
875 && GET_CODE (SUBREG_REG (in
)) == REG
876 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
877 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in
)), inmode
)
878 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
879 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
881 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
883 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
884 GET_MODE (SUBREG_REG (in
)))))))
886 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), NULL_PTR
,
887 GENERAL_REGS
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
891 /* Similarly for paradoxical and problematical SUBREGs on the output.
892 Note that there is no reason we need worry about the previous value
893 of SUBREG_REG (out); even if wider than out,
894 storing in a subreg is entitled to clobber it all
895 (except in the case of STRICT_LOW_PART,
896 and in that case the constraint should label it input-output.) */
897 if (out
!= 0 && GET_CODE (out
) == SUBREG
898 && (CONSTANT_P (SUBREG_REG (out
))
900 || (((GET_CODE (SUBREG_REG (out
)) == REG
901 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
902 || GET_CODE (SUBREG_REG (out
)) == MEM
)
903 && ((GET_MODE_SIZE (outmode
)
904 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))))
905 || (GET_CODE (SUBREG_REG (out
)) == REG
906 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
907 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
908 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
910 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
912 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
913 GET_MODE (SUBREG_REG (out
)))))
914 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out
))
915 + SUBREG_WORD (out
)),
917 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
918 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
919 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
920 GET_MODE (SUBREG_REG (out
)),
924 #ifdef CLASS_CANNOT_CHANGE_SIZE
925 || (GET_CODE (SUBREG_REG (out
)) == REG
926 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
927 && (TEST_HARD_REG_BIT
928 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
929 REGNO (SUBREG_REG (out
))))
930 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
931 != GET_MODE_SIZE (outmode
)))
935 out_subreg_loc
= outloc
;
936 outloc
= &SUBREG_REG (out
);
938 #ifndef LOAD_EXTEND_OP
939 if (GET_CODE (out
) == MEM
940 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
943 outmode
= GET_MODE (out
);
946 /* If IN appears in OUT, we can't share any input-only reload for IN. */
947 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
948 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
949 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
952 /* If IN is a SUBREG of a hard register, make a new REG. This
953 simplifies some of the cases below. */
955 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
956 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
957 in
= gen_rtx (REG
, GET_MODE (in
),
958 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
960 /* Similarly for OUT. */
961 if (out
!= 0 && GET_CODE (out
) == SUBREG
962 && GET_CODE (SUBREG_REG (out
)) == REG
963 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
964 out
= gen_rtx (REG
, GET_MODE (out
),
965 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
967 /* Narrow down the class of register wanted if that is
968 desirable on this machine for efficiency. */
970 class = PREFERRED_RELOAD_CLASS (in
, class);
972 /* Output reloads may need analogous treatment, different in detail. */
973 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
975 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
978 /* Make sure we use a class that can handle the actual pseudo
979 inside any subreg. For example, on the 386, QImode regs
980 can appear within SImode subregs. Although GENERAL_REGS
981 can handle SImode, QImode needs a smaller class. */
982 #ifdef LIMIT_RELOAD_CLASS
984 class = LIMIT_RELOAD_CLASS (inmode
, class);
985 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
986 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
989 class = LIMIT_RELOAD_CLASS (outmode
, class);
990 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
991 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
994 /* Verify that this class is at least possible for the mode that
996 if (this_insn_is_asm
)
998 enum machine_mode mode
;
999 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1003 if (mode
== VOIDmode
)
1005 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1010 outmode
= word_mode
;
1012 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1013 if (HARD_REGNO_MODE_OK (i
, mode
)
1014 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1016 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1019 for (j
= 1; j
< nregs
; j
++)
1020 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1025 if (i
== FIRST_PSEUDO_REGISTER
)
1027 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1032 if (class == NO_REGS
)
1035 /* We can use an existing reload if the class is right
1036 and at least one of IN and OUT is a match
1037 and the other is at worst neutral.
1038 (A zero compared against anything is neutral.)
1040 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
1041 for the same thing since that can cause us to need more reload registers
1042 than we otherwise would. */
1044 for (i
= 0; i
< n_reloads
; i
++)
1045 if ((reg_class_subset_p (class, reload_reg_class
[i
])
1046 || reg_class_subset_p (reload_reg_class
[i
], class))
1047 /* If the existing reload has a register, it must fit our class. */
1048 && (reload_reg_rtx
[i
] == 0
1049 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1050 true_regnum (reload_reg_rtx
[i
])))
1051 && ((in
!= 0 && MATCHES (reload_in
[i
], in
) && ! dont_share
1052 && (out
== 0 || reload_out
[i
] == 0 || MATCHES (reload_out
[i
], out
)))
1054 (out
!= 0 && MATCHES (reload_out
[i
], out
)
1055 && (in
== 0 || reload_in
[i
] == 0 || MATCHES (reload_in
[i
], in
))))
1056 && (reg_class_size
[(int) class] == 1
1057 #ifdef SMALL_REGISTER_CLASSES
1061 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
1062 opnum
, reload_opnum
[i
]))
1065 /* Reloading a plain reg for input can match a reload to postincrement
1066 that reg, since the postincrement's value is the right value.
1067 Likewise, it can match a preincrement reload, since we regard
1068 the preincrementation as happening before any ref in this insn
1069 to that register. */
1071 for (i
= 0; i
< n_reloads
; i
++)
1072 if ((reg_class_subset_p (class, reload_reg_class
[i
])
1073 || reg_class_subset_p (reload_reg_class
[i
], class))
1074 /* If the existing reload has a register, it must fit our class. */
1075 && (reload_reg_rtx
[i
] == 0
1076 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1077 true_regnum (reload_reg_rtx
[i
])))
1078 && out
== 0 && reload_out
[i
] == 0 && reload_in
[i
] != 0
1079 && ((GET_CODE (in
) == REG
1080 && (GET_CODE (reload_in
[i
]) == POST_INC
1081 || GET_CODE (reload_in
[i
]) == POST_DEC
1082 || GET_CODE (reload_in
[i
]) == PRE_INC
1083 || GET_CODE (reload_in
[i
]) == PRE_DEC
)
1084 && MATCHES (XEXP (reload_in
[i
], 0), in
))
1086 (GET_CODE (reload_in
[i
]) == REG
1087 && (GET_CODE (in
) == POST_INC
1088 || GET_CODE (in
) == POST_DEC
1089 || GET_CODE (in
) == PRE_INC
1090 || GET_CODE (in
) == PRE_DEC
)
1091 && MATCHES (XEXP (in
, 0), reload_in
[i
])))
1092 && (reg_class_size
[(int) class] == 1
1093 #ifdef SMALL_REGISTER_CLASSES
1097 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
1098 opnum
, reload_opnum
[i
]))
1100 /* Make sure reload_in ultimately has the increment,
1101 not the plain register. */
1102 if (GET_CODE (in
) == REG
)
1109 /* See if we need a secondary reload register to move between CLASS
1110 and IN or CLASS and OUT. Get the icode and push any required reloads
1111 needed for each of them if so. */
1113 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1116 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1117 &secondary_in_icode
);
1120 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1121 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1122 secondary_out_reload
1123 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1124 type
, &secondary_out_icode
);
1127 /* We found no existing reload suitable for re-use.
1128 So add an additional reload. */
1132 reload_out
[i
] = out
;
1133 reload_reg_class
[i
] = class;
1134 reload_inmode
[i
] = inmode
;
1135 reload_outmode
[i
] = outmode
;
1136 reload_reg_rtx
[i
] = 0;
1137 reload_optional
[i
] = optional
;
1139 reload_nocombine
[i
] = 0;
1140 reload_in_reg
[i
] = inloc
? *inloc
: 0;
1141 reload_opnum
[i
] = opnum
;
1142 reload_when_needed
[i
] = type
;
1143 reload_secondary_in_reload
[i
] = secondary_in_reload
;
1144 reload_secondary_out_reload
[i
] = secondary_out_reload
;
1145 reload_secondary_in_icode
[i
] = secondary_in_icode
;
1146 reload_secondary_out_icode
[i
] = secondary_out_icode
;
1147 reload_secondary_p
[i
] = 0;
1151 #ifdef SECONDARY_MEMORY_NEEDED
1152 /* If a memory location is needed for the copy, make one. */
1153 if (in
!= 0 && GET_CODE (in
) == REG
1154 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1155 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1157 get_secondary_mem (in
, inmode
, opnum
, type
);
1159 if (out
!= 0 && GET_CODE (out
) == REG
1160 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1161 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1163 get_secondary_mem (out
, outmode
, opnum
, type
);
1168 /* We are reusing an existing reload,
1169 but we may have additional information for it.
1170 For example, we may now have both IN and OUT
1171 while the old one may have just one of them. */
1173 if (inmode
!= VOIDmode
)
1174 reload_inmode
[i
] = inmode
;
1175 if (outmode
!= VOIDmode
)
1176 reload_outmode
[i
] = outmode
;
1180 reload_out
[i
] = out
;
1181 if (reg_class_subset_p (class, reload_reg_class
[i
]))
1182 reload_reg_class
[i
] = class;
1183 reload_optional
[i
] &= optional
;
1184 if (MERGE_TO_OTHER (type
, reload_when_needed
[i
],
1185 opnum
, reload_opnum
[i
]))
1186 reload_when_needed
[i
] = RELOAD_OTHER
;
1187 reload_opnum
[i
] = MIN (reload_opnum
[i
], opnum
);
1190 /* If the ostensible rtx being reload differs from the rtx found
1191 in the location to substitute, this reload is not safe to combine
1192 because we cannot reliably tell whether it appears in the insn. */
1194 if (in
!= 0 && in
!= *inloc
)
1195 reload_nocombine
[i
] = 1;
1198 /* This was replaced by changes in find_reloads_address_1 and the new
1199 function inc_for_reload, which go with a new meaning of reload_inc. */
1201 /* If this is an IN/OUT reload in an insn that sets the CC,
1202 it must be for an autoincrement. It doesn't work to store
1203 the incremented value after the insn because that would clobber the CC.
1204 So we must do the increment of the value reloaded from,
1205 increment it, store it back, then decrement again. */
1206 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1210 reload_inc
[i
] = find_inc_amount (PATTERN (this_insn
), in
);
1211 /* If we did not find a nonzero amount-to-increment-by,
1212 that contradicts the belief that IN is being incremented
1213 in an address in this insn. */
1214 if (reload_inc
[i
] == 0)
1219 /* If we will replace IN and OUT with the reload-reg,
1220 record where they are located so that substitution need
1221 not do a tree walk. */
1223 if (replace_reloads
)
1227 register struct replacement
*r
= &replacements
[n_replacements
++];
1229 r
->subreg_loc
= in_subreg_loc
;
1233 if (outloc
!= 0 && outloc
!= inloc
)
1235 register struct replacement
*r
= &replacements
[n_replacements
++];
1238 r
->subreg_loc
= out_subreg_loc
;
1243 /* If this reload is just being introduced and it has both
1244 an incoming quantity and an outgoing quantity that are
1245 supposed to be made to match, see if either one of the two
1246 can serve as the place to reload into.
1248 If one of them is acceptable, set reload_reg_rtx[i]
1251 if (in
!= 0 && out
!= 0 && in
!= out
&& reload_reg_rtx
[i
] == 0)
1253 reload_reg_rtx
[i
] = find_dummy_reload (in
, out
, inloc
, outloc
,
1255 reload_reg_class
[i
], i
);
1257 /* If the outgoing register already contains the same value
1258 as the incoming one, we can dispense with loading it.
1259 The easiest way to tell the caller that is to give a phony
1260 value for the incoming operand (same as outgoing one). */
1261 if (reload_reg_rtx
[i
] == out
1262 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1263 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1264 static_reload_reg_p
, i
, inmode
))
1268 /* If this is an input reload and the operand contains a register that
1269 dies in this insn and is used nowhere else, see if it is the right class
1270 to be used for this reload. Use it if so. (This occurs most commonly
1271 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1272 this if it is also an output reload that mentions the register unless
1273 the output is a SUBREG that clobbers an entire register.
1275 Note that the operand might be one of the spill regs, if it is a
1276 pseudo reg and we are in a block where spilling has not taken place.
1277 But if there is no spilling in this block, that is OK.
1278 An explicitly used hard reg cannot be a spill reg. */
1280 if (reload_reg_rtx
[i
] == 0 && in
!= 0)
1285 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1286 if (REG_NOTE_KIND (note
) == REG_DEAD
1287 && GET_CODE (XEXP (note
, 0)) == REG
1288 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1289 && reg_mentioned_p (XEXP (note
, 0), in
)
1290 && ! refers_to_regno_for_reload_p (regno
,
1292 + HARD_REGNO_NREGS (regno
,
1294 PATTERN (this_insn
), inloc
)
1295 /* If this is also an output reload, IN cannot be used as
1296 the reload register if it is set in this insn unless IN
1298 && (out
== 0 || in
== out
1299 || ! hard_reg_set_here_p (regno
,
1301 + HARD_REGNO_NREGS (regno
,
1303 PATTERN (this_insn
)))
1304 /* ??? Why is this code so different from the previous?
1305 Is there any simple coherent way to describe the two together?
1306 What's going on here. */
1308 || (GET_CODE (in
) == SUBREG
1309 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1311 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1312 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1313 /* Make sure the operand fits in the reg that dies. */
1314 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1315 && HARD_REGNO_MODE_OK (regno
, inmode
)
1316 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1317 && HARD_REGNO_MODE_OK (regno
, outmode
)
1318 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], regno
)
1319 && !fixed_regs
[regno
])
1321 reload_reg_rtx
[i
] = gen_rtx (REG
, inmode
, regno
);
1327 output_reloadnum
= i
;
1332 /* Record an additional place we must replace a value
1333 for which we have already recorded a reload.
1334 RELOADNUM is the value returned by push_reload
1335 when the reload was recorded.
1336 This is used in insn patterns that use match_dup. */
1339 push_replacement (loc
, reloadnum
, mode
)
1342 enum machine_mode mode
;
1344 if (replace_reloads
)
1346 register struct replacement
*r
= &replacements
[n_replacements
++];
1347 r
->what
= reloadnum
;
1354 /* Transfer all replacements that used to be in reload FROM to be in
1358 transfer_replacements (to
, from
)
1363 for (i
= 0; i
< n_replacements
; i
++)
1364 if (replacements
[i
].what
== from
)
1365 replacements
[i
].what
= to
;
1368 /* If there is only one output reload, and it is not for an earlyclobber
1369 operand, try to combine it with a (logically unrelated) input reload
1370 to reduce the number of reload registers needed.
1372 This is safe if the input reload does not appear in
1373 the value being output-reloaded, because this implies
1374 it is not needed any more once the original insn completes.
1376 If that doesn't work, see we can use any of the registers that
1377 die in this insn as a reload register. We can if it is of the right
1378 class and does not appear in the value being output-reloaded. */
1384 int output_reload
= -1;
1385 int secondary_out
= -1;
1388 /* Find the output reload; return unless there is exactly one
1389 and that one is mandatory. */
1391 for (i
= 0; i
< n_reloads
; i
++)
1392 if (reload_out
[i
] != 0)
1394 if (output_reload
>= 0)
1399 if (output_reload
< 0 || reload_optional
[output_reload
])
1402 /* An input-output reload isn't combinable. */
1404 if (reload_in
[output_reload
] != 0)
1407 /* If this reload is for an earlyclobber operand, we can't do anything. */
1408 if (earlyclobber_operand_p (reload_out
[output_reload
]))
1411 /* Check each input reload; can we combine it? */
1413 for (i
= 0; i
< n_reloads
; i
++)
1414 if (reload_in
[i
] && ! reload_optional
[i
] && ! reload_nocombine
[i
]
1415 /* Life span of this reload must not extend past main insn. */
1416 && reload_when_needed
[i
] != RELOAD_FOR_OUTPUT_ADDRESS
1417 && reload_when_needed
[i
] != RELOAD_OTHER
1418 && (CLASS_MAX_NREGS (reload_reg_class
[i
], reload_inmode
[i
])
1419 == CLASS_MAX_NREGS (reload_reg_class
[output_reload
],
1420 reload_outmode
[output_reload
]))
1421 && reload_inc
[i
] == 0
1422 && reload_reg_rtx
[i
] == 0
1423 #ifdef SECONDARY_MEMORY_NEEDED
1424 /* Don't combine two reloads with different secondary
1425 memory locations. */
1426 && (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]] == 0
1427 || secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] == 0
1428 || rtx_equal_p (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]],
1429 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]]))
1431 #ifdef SMALL_REGISTER_CLASSES
1432 && reload_reg_class
[i
] == reload_reg_class
[output_reload
]
1434 && (reg_class_subset_p (reload_reg_class
[i
],
1435 reload_reg_class
[output_reload
])
1436 || reg_class_subset_p (reload_reg_class
[output_reload
],
1437 reload_reg_class
[i
]))
1439 && (MATCHES (reload_in
[i
], reload_out
[output_reload
])
1440 /* Args reversed because the first arg seems to be
1441 the one that we imagine being modified
1442 while the second is the one that might be affected. */
1443 || (! reg_overlap_mentioned_for_reload_p (reload_out
[output_reload
],
1445 /* However, if the input is a register that appears inside
1446 the output, then we also can't share.
1447 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1448 If the same reload reg is used for both reg 69 and the
1449 result to be stored in memory, then that result
1450 will clobber the address of the memory ref. */
1451 && ! (GET_CODE (reload_in
[i
]) == REG
1452 && reg_overlap_mentioned_for_reload_p (reload_in
[i
],
1453 reload_out
[output_reload
]))))
1454 && (reg_class_size
[(int) reload_reg_class
[i
]]
1455 #ifdef SMALL_REGISTER_CLASSES
1459 /* We will allow making things slightly worse by combining an
1460 input and an output, but no worse than that. */
1461 && (reload_when_needed
[i
] == RELOAD_FOR_INPUT
1462 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT
))
1466 /* We have found a reload to combine with! */
1467 reload_out
[i
] = reload_out
[output_reload
];
1468 reload_outmode
[i
] = reload_outmode
[output_reload
];
1469 /* Mark the old output reload as inoperative. */
1470 reload_out
[output_reload
] = 0;
1471 /* The combined reload is needed for the entire insn. */
1472 reload_when_needed
[i
] = RELOAD_OTHER
;
1473 /* If the output reload had a secondary reload, copy it. */
1474 if (reload_secondary_out_reload
[output_reload
] != -1)
1476 reload_secondary_out_reload
[i
]
1477 = reload_secondary_out_reload
[output_reload
];
1478 reload_secondary_out_icode
[i
]
1479 = reload_secondary_out_icode
[output_reload
];
1482 #ifdef SECONDARY_MEMORY_NEEDED
1483 /* Copy any secondary MEM. */
1484 if (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] != 0)
1485 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]]
1486 = secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]];
1488 /* If required, minimize the register class. */
1489 if (reg_class_subset_p (reload_reg_class
[output_reload
],
1490 reload_reg_class
[i
]))
1491 reload_reg_class
[i
] = reload_reg_class
[output_reload
];
1493 /* Transfer all replacements from the old reload to the combined. */
1494 for (j
= 0; j
< n_replacements
; j
++)
1495 if (replacements
[j
].what
== output_reload
)
1496 replacements
[j
].what
= i
;
1501 /* If this insn has only one operand that is modified or written (assumed
1502 to be the first), it must be the one corresponding to this reload. It
1503 is safe to use anything that dies in this insn for that output provided
1504 that it does not occur in the output (we already know it isn't an
1505 earlyclobber. If this is an asm insn, give up. */
1507 if (INSN_CODE (this_insn
) == -1)
1510 for (i
= 1; i
< insn_n_operands
[INSN_CODE (this_insn
)]; i
++)
1511 if (insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '='
1512 || insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '+')
1515 /* See if some hard register that dies in this insn and is not used in
1516 the output is the right class. Only works if the register we pick
1517 up can fully hold our output reload. */
1518 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1519 if (REG_NOTE_KIND (note
) == REG_DEAD
1520 && GET_CODE (XEXP (note
, 0)) == REG
1521 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1522 reload_out
[output_reload
])
1523 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1524 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1525 && TEST_HARD_REG_BIT (reg_class_contents
[(int) reload_reg_class
[output_reload
]],
1526 REGNO (XEXP (note
, 0)))
1527 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1528 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1529 /* Ensure that a secondary or tertiary reload for this output
1530 won't want this register. */
1531 && ((secondary_out
= reload_secondary_out_reload
[output_reload
]) == -1
1532 || (! (TEST_HARD_REG_BIT
1533 (reg_class_contents
[(int) reload_reg_class
[secondary_out
]],
1534 REGNO (XEXP (note
, 0))))
1535 && ((secondary_out
= reload_secondary_out_reload
[secondary_out
]) == -1
1536 || ! (TEST_HARD_REG_BIT
1537 (reg_class_contents
[(int) reload_reg_class
[secondary_out
]],
1538 REGNO (XEXP (note
, 0)))))))
1539 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1541 reload_reg_rtx
[output_reload
] = gen_rtx (REG
,
1542 reload_outmode
[output_reload
],
1543 REGNO (XEXP (note
, 0)));
1548 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1549 See if one of IN and OUT is a register that may be used;
1550 this is desirable since a spill-register won't be needed.
1551 If so, return the register rtx that proves acceptable.
1553 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1554 CLASS is the register class required for the reload.
1556 If FOR_REAL is >= 0, it is the number of the reload,
1557 and in some cases when it can be discovered that OUT doesn't need
1558 to be computed, clear out reload_out[FOR_REAL].
1560 If FOR_REAL is -1, this should not be done, because this call
1561 is just to see if a register can be found, not to find and install it. */
1564 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1565 inmode
, outmode
, class, for_real
)
1566 rtx real_in
, real_out
;
1567 rtx
*inloc
, *outloc
;
1568 enum machine_mode inmode
, outmode
;
1569 enum reg_class
class;
1578 /* If operands exceed a word, we can't use either of them
1579 unless they have the same size. */
1580 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1581 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1582 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1585 /* Find the inside of any subregs. */
1586 while (GET_CODE (out
) == SUBREG
)
1588 out_offset
= SUBREG_WORD (out
);
1589 out
= SUBREG_REG (out
);
1591 while (GET_CODE (in
) == SUBREG
)
1593 in_offset
= SUBREG_WORD (in
);
1594 in
= SUBREG_REG (in
);
1597 /* Narrow down the reg class, the same way push_reload will;
1598 otherwise we might find a dummy now, but push_reload won't. */
1599 class = PREFERRED_RELOAD_CLASS (in
, class);
1601 /* See if OUT will do. */
1602 if (GET_CODE (out
) == REG
1603 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1605 register int regno
= REGNO (out
) + out_offset
;
1606 int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1609 /* When we consider whether the insn uses OUT,
1610 ignore references within IN. They don't prevent us
1611 from copying IN into OUT, because those refs would
1612 move into the insn that reloads IN.
1614 However, we only ignore IN in its role as this reload.
1615 If the insn uses IN elsewhere and it contains OUT,
1616 that counts. We can't be sure it's the "same" operand
1617 so it might not go through this reload. */
1619 *inloc
= const0_rtx
;
1621 if (regno
< FIRST_PSEUDO_REGISTER
1622 /* A fixed reg that can overlap other regs better not be used
1623 for reloading in any way. */
1624 #ifdef OVERLAPPING_REGNO_P
1625 && ! (fixed_regs
[regno
] && OVERLAPPING_REGNO_P (regno
))
1627 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1628 PATTERN (this_insn
), outloc
))
1631 for (i
= 0; i
< nwords
; i
++)
1632 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1638 if (GET_CODE (real_out
) == REG
)
1641 value
= gen_rtx (REG
, outmode
, regno
);
1648 /* Consider using IN if OUT was not acceptable
1649 or if OUT dies in this insn (like the quotient in a divmod insn).
1650 We can't use IN unless it is dies in this insn,
1651 which means we must know accurately which hard regs are live.
1652 Also, the result can't go in IN if IN is used within OUT. */
1653 if (hard_regs_live_known
1654 && GET_CODE (in
) == REG
1655 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1657 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1658 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1659 && !fixed_regs
[REGNO (in
)]
1660 && HARD_REGNO_MODE_OK (REGNO (in
),
1661 /* The only case where out and real_out might
1662 have different modes is where real_out
1663 is a subreg, and in that case, out
1665 (GET_MODE (out
) != VOIDmode
1666 ? GET_MODE (out
) : outmode
)))
1668 register int regno
= REGNO (in
) + in_offset
;
1669 int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1671 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1672 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1673 PATTERN (this_insn
)))
1676 for (i
= 0; i
< nwords
; i
++)
1677 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1683 /* If we were going to use OUT as the reload reg
1684 and changed our mind, it means OUT is a dummy that
1685 dies here. So don't bother copying value to it. */
1686 if (for_real
>= 0 && value
== real_out
)
1687 reload_out
[for_real
] = 0;
1688 if (GET_CODE (real_in
) == REG
)
1691 value
= gen_rtx (REG
, inmode
, regno
);
1699 /* This page contains subroutines used mainly for determining
1700 whether the IN or an OUT of a reload can serve as the
1703 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1706 earlyclobber_operand_p (x
)
1711 for (i
= 0; i
< n_earlyclobbers
; i
++)
1712 if (reload_earlyclobbers
[i
] == x
)
1718 /* Return 1 if expression X alters a hard reg in the range
1719 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1720 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1721 X should be the body of an instruction. */
1724 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1725 register int beg_regno
, end_regno
;
1728 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1730 register rtx op0
= SET_DEST (x
);
1731 while (GET_CODE (op0
) == SUBREG
)
1732 op0
= SUBREG_REG (op0
);
1733 if (GET_CODE (op0
) == REG
)
1735 register int r
= REGNO (op0
);
1736 /* See if this reg overlaps range under consideration. */
1738 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1742 else if (GET_CODE (x
) == PARALLEL
)
1744 register int i
= XVECLEN (x
, 0) - 1;
1746 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1753 /* Return 1 if ADDR is a valid memory address for mode MODE,
1754 and check that each pseudo reg has the proper kind of
1758 strict_memory_address_p (mode
, addr
)
1759 enum machine_mode mode
;
1762 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1769 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1770 if they are the same hard reg, and has special hacks for
1771 autoincrement and autodecrement.
1772 This is specifically intended for find_reloads to use
1773 in determining whether two operands match.
1774 X is the operand whose number is the lower of the two.
1776 The value is 2 if Y contains a pre-increment that matches
1777 a non-incrementing address in X. */
1779 /* ??? To be completely correct, we should arrange to pass
1780 for X the output operand and for Y the input operand.
1781 For now, we assume that the output operand has the lower number
1782 because that is natural in (SET output (... input ...)). */
1785 operands_match_p (x
, y
)
1789 register RTX_CODE code
= GET_CODE (x
);
1795 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
1796 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
1797 && GET_CODE (SUBREG_REG (y
)) == REG
)))
1803 i
= REGNO (SUBREG_REG (x
));
1804 if (i
>= FIRST_PSEUDO_REGISTER
)
1806 i
+= SUBREG_WORD (x
);
1811 if (GET_CODE (y
) == SUBREG
)
1813 j
= REGNO (SUBREG_REG (y
));
1814 if (j
>= FIRST_PSEUDO_REGISTER
)
1816 j
+= SUBREG_WORD (y
);
1821 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1822 multiple hard register group, so that for example (reg:DI 0) and
1823 (reg:SI 1) will be considered the same register. */
1824 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
1825 && i
< FIRST_PSEUDO_REGISTER
)
1826 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
1827 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
1828 && j
< FIRST_PSEUDO_REGISTER
)
1829 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
1833 /* If two operands must match, because they are really a single
1834 operand of an assembler insn, then two postincrements are invalid
1835 because the assembler insn would increment only once.
1836 On the other hand, an postincrement matches ordinary indexing
1837 if the postincrement is the output operand. */
1838 if (code
== POST_DEC
|| code
== POST_INC
)
1839 return operands_match_p (XEXP (x
, 0), y
);
1840 /* Two preincrements are invalid
1841 because the assembler insn would increment only once.
1842 On the other hand, an preincrement matches ordinary indexing
1843 if the preincrement is the input operand.
1844 In this case, return 2, since some callers need to do special
1845 things when this happens. */
1846 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
)
1847 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
1851 /* Now we have disposed of all the cases
1852 in which different rtx codes can match. */
1853 if (code
!= GET_CODE (y
))
1855 if (code
== LABEL_REF
)
1856 return XEXP (x
, 0) == XEXP (y
, 0);
1857 if (code
== SYMBOL_REF
)
1858 return XSTR (x
, 0) == XSTR (y
, 0);
1860 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1862 if (GET_MODE (x
) != GET_MODE (y
))
1865 /* Compare the elements. If any pair of corresponding elements
1866 fail to match, return 0 for the whole things. */
1869 fmt
= GET_RTX_FORMAT (code
);
1870 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1876 if (XWINT (x
, i
) != XWINT (y
, i
))
1881 if (XINT (x
, i
) != XINT (y
, i
))
1886 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
1889 /* If any subexpression returns 2,
1890 we should return 2 if we are successful. */
1898 /* It is believed that rtx's at this level will never
1899 contain anything but integers and other rtx's,
1900 except for within LABEL_REFs and SYMBOL_REFs. */
1905 return 1 + success_2
;
1908 /* Return the number of times character C occurs in string S. */
1911 n_occurrences (c
, s
)
1921 /* Describe the range of registers or memory referenced by X.
1922 If X is a register, set REG_FLAG and put the first register
1923 number into START and the last plus one into END.
1924 If X is a memory reference, put a base address into BASE
1925 and a range of integer offsets into START and END.
1926 If X is pushing on the stack, we can assume it causes no trouble,
1927 so we set the SAFE field. */
1929 static struct decomposition
1933 struct decomposition val
;
1938 if (GET_CODE (x
) == MEM
)
1940 rtx base
, offset
= 0;
1941 rtx addr
= XEXP (x
, 0);
1943 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
1944 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
1946 val
.base
= XEXP (addr
, 0);
1947 val
.start
= - GET_MODE_SIZE (GET_MODE (x
));
1948 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
1949 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
1953 if (GET_CODE (addr
) == CONST
)
1955 addr
= XEXP (addr
, 0);
1958 if (GET_CODE (addr
) == PLUS
)
1960 if (CONSTANT_P (XEXP (addr
, 0)))
1962 base
= XEXP (addr
, 1);
1963 offset
= XEXP (addr
, 0);
1965 else if (CONSTANT_P (XEXP (addr
, 1)))
1967 base
= XEXP (addr
, 0);
1968 offset
= XEXP (addr
, 1);
1975 offset
= const0_rtx
;
1977 if (GET_CODE (offset
) == CONST
)
1978 offset
= XEXP (offset
, 0);
1979 if (GET_CODE (offset
) == PLUS
)
1981 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
1983 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 1));
1984 offset
= XEXP (offset
, 0);
1986 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
1988 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 0));
1989 offset
= XEXP (offset
, 1);
1993 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
1994 offset
= const0_rtx
;
1997 else if (GET_CODE (offset
) != CONST_INT
)
1999 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
2000 offset
= const0_rtx
;
2003 if (all_const
&& GET_CODE (base
) == PLUS
)
2004 base
= gen_rtx (CONST
, GET_MODE (base
), base
);
2006 if (GET_CODE (offset
) != CONST_INT
)
2009 val
.start
= INTVAL (offset
);
2010 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2014 else if (GET_CODE (x
) == REG
)
2017 val
.start
= true_regnum (x
);
2020 /* A pseudo with no hard reg. */
2021 val
.start
= REGNO (x
);
2022 val
.end
= val
.start
+ 1;
2026 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2028 else if (GET_CODE (x
) == SUBREG
)
2030 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2031 /* This could be more precise, but it's good enough. */
2032 return decompose (SUBREG_REG (x
));
2034 val
.start
= true_regnum (x
);
2036 return decompose (SUBREG_REG (x
));
2039 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2041 else if (CONSTANT_P (x
)
2042 /* This hasn't been assigned yet, so it can't conflict yet. */
2043 || GET_CODE (x
) == SCRATCH
)
2050 /* Return 1 if altering Y will not modify the value of X.
2051 Y is also described by YDATA, which should be decompose (Y). */
2054 immune_p (x
, y
, ydata
)
2056 struct decomposition ydata
;
2058 struct decomposition xdata
;
2061 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
2065 if (GET_CODE (y
) != MEM
)
2067 /* If Y is memory and X is not, Y can't affect X. */
2068 if (GET_CODE (x
) != MEM
)
2071 xdata
= decompose (x
);
2073 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2075 /* If bases are distinct symbolic constants, there is no overlap. */
2076 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2078 /* Constants and stack slots never overlap. */
2079 if (CONSTANT_P (xdata
.base
)
2080 && (ydata
.base
== frame_pointer_rtx
2081 || ydata
.base
== hard_frame_pointer_rtx
2082 || ydata
.base
== stack_pointer_rtx
))
2084 if (CONSTANT_P (ydata
.base
)
2085 && (xdata
.base
== frame_pointer_rtx
2086 || xdata
.base
== hard_frame_pointer_rtx
2087 || xdata
.base
== stack_pointer_rtx
))
2089 /* If either base is variable, we don't know anything. */
2094 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2097 /* Similar, but calls decompose. */
2100 safe_from_earlyclobber (op
, clobber
)
2103 struct decomposition early_data
;
2105 early_data
= decompose (clobber
);
2106 return immune_p (op
, clobber
, early_data
);
2109 /* Main entry point of this file: search the body of INSN
2110 for values that need reloading and record them with push_reload.
2111 REPLACE nonzero means record also where the values occur
2112 so that subst_reloads can be used.
2114 IND_LEVELS says how many levels of indirection are supported by this
2115 machine; a value of zero means that a memory reference is not a valid
2118 LIVE_KNOWN says we have valid information about which hard
2119 regs are live at each point in the program; this is true when
2120 we are called from global_alloc but false when stupid register
2121 allocation has been done.
2123 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2124 which is nonnegative if the reg has been commandeered for reloading into.
2125 It is copied into STATIC_RELOAD_REG_P and referenced from there
2126 by various subroutines. */
2129 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2131 int replace
, ind_levels
;
2133 short *reload_reg_p
;
2135 #ifdef REGISTER_CONSTRAINTS
2137 register int insn_code_number
;
2140 /* These are the constraints for the insn. We don't change them. */
2141 char *constraints1
[MAX_RECOG_OPERANDS
];
2142 /* These start out as the constraints for the insn
2143 and they are chewed up as we consider alternatives. */
2144 char *constraints
[MAX_RECOG_OPERANDS
];
2145 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2147 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2148 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2149 /* Nonzero for a MEM operand whose entire address needs a reload. */
2150 int address_reloaded
[MAX_RECOG_OPERANDS
];
2151 /* Value of enum reload_type to use for operand. */
2152 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2153 /* Value of enum reload_type to use within address of operand. */
2154 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2155 /* Save the usage of each operand. */
2156 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2157 int no_input_reloads
= 0, no_output_reloads
= 0;
2159 int this_alternative
[MAX_RECOG_OPERANDS
];
2160 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2161 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2162 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2163 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2165 int goal_alternative
[MAX_RECOG_OPERANDS
];
2166 int this_alternative_number
;
2167 int goal_alternative_number
;
2168 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2169 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2170 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2171 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2172 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2173 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2174 int goal_alternative_swapped
;
2177 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2178 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2179 rtx body
= PATTERN (insn
);
2180 rtx set
= single_set (insn
);
2181 int goal_earlyclobber
, this_earlyclobber
;
2182 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2185 this_insn_is_asm
= 0; /* Tentative. */
2189 n_earlyclobbers
= 0;
2190 replace_reloads
= replace
;
2191 hard_regs_live_known
= live_known
;
2192 static_reload_reg_p
= reload_reg_p
;
2194 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2195 neither are insns that SET cc0. Insns that use CC0 are not allowed
2196 to have any input reloads. */
2197 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2198 no_output_reloads
= 1;
2201 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2202 no_input_reloads
= 1;
2203 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2204 no_output_reloads
= 1;
2207 #ifdef SECONDARY_MEMORY_NEEDED
2208 /* The eliminated forms of any secondary memory locations are per-insn, so
2209 clear them out here. */
2211 bzero ((char *) secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2214 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2215 Make OPERANDS point to a vector of operand values.
2216 Make OPERAND_LOCS point to a vector of pointers to
2217 where the operands were found.
2218 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2219 constraint-strings for this insn.
2220 Return if the insn needs no reload processing. */
2222 switch (GET_CODE (body
))
2232 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2233 is cheap to move between them. If it is not, there may not be an insn
2234 to do the copy, so we may need a reload. */
2235 if (GET_CODE (SET_DEST (body
)) == REG
2236 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2237 && GET_CODE (SET_SRC (body
)) == REG
2238 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2239 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2240 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2244 reload_n_operands
= noperands
= asm_noperands (body
);
2247 /* This insn is an `asm' with operands. */
2249 insn_code_number
= -1;
2250 this_insn_is_asm
= 1;
2252 /* expand_asm_operands makes sure there aren't too many operands. */
2253 if (noperands
> MAX_RECOG_OPERANDS
)
2256 /* Now get the operand values and constraints out of the insn. */
2258 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
2259 constraints
, operand_mode
);
2262 bcopy ((char *) constraints
, (char *) constraints1
,
2263 noperands
* sizeof (char *));
2264 n_alternatives
= n_occurrences (',', constraints
[0]) + 1;
2265 for (i
= 1; i
< noperands
; i
++)
2266 if (n_alternatives
!= n_occurrences (',', constraints
[i
]) + 1)
2268 error_for_asm (insn
, "operand constraints differ in number of alternatives");
2269 /* Avoid further trouble with this insn. */
2270 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
2279 /* Ordinary insn: recognize it, get the operands via insn_extract
2280 and get the constraints. */
2282 insn_code_number
= recog_memoized (insn
);
2283 if (insn_code_number
< 0)
2284 fatal_insn_not_found (insn
);
2286 reload_n_operands
= noperands
= insn_n_operands
[insn_code_number
];
2287 n_alternatives
= insn_n_alternatives
[insn_code_number
];
2288 /* Just return "no reloads" if insn has no operands with constraints. */
2289 if (n_alternatives
== 0)
2291 insn_extract (insn
);
2292 for (i
= 0; i
< noperands
; i
++)
2294 constraints
[i
] = constraints1
[i
]
2295 = insn_operand_constraint
[insn_code_number
][i
];
2296 operand_mode
[i
] = insn_operand_mode
[insn_code_number
][i
];
2305 /* If we will need to know, later, whether some pair of operands
2306 are the same, we must compare them now and save the result.
2307 Reloading the base and index registers will clobber them
2308 and afterward they will fail to match. */
2310 for (i
= 0; i
< noperands
; i
++)
2315 substed_operand
[i
] = recog_operand
[i
];
2318 modified
[i
] = RELOAD_READ
;
2320 /* Scan this operand's constraint to see if it is an output operand,
2321 an in-out operand, is commutative, or should match another. */
2326 modified
[i
] = RELOAD_WRITE
;
2328 modified
[i
] = RELOAD_READ_WRITE
;
2331 /* The last operand should not be marked commutative. */
2332 if (i
== noperands
- 1)
2334 if (this_insn_is_asm
)
2335 warning_for_asm (this_insn
,
2336 "`%%' constraint used with last operand");
2343 else if (c
>= '0' && c
<= '9')
2346 operands_match
[c
][i
]
2347 = operands_match_p (recog_operand
[c
], recog_operand
[i
]);
2349 /* An operand may not match itself. */
2352 if (this_insn_is_asm
)
2353 warning_for_asm (this_insn
,
2354 "operand %d has constraint %d", i
, c
);
2359 /* If C can be commuted with C+1, and C might need to match I,
2360 then C+1 might also need to match I. */
2361 if (commutative
>= 0)
2363 if (c
== commutative
|| c
== commutative
+ 1)
2365 int other
= c
+ (c
== commutative
? 1 : -1);
2366 operands_match
[other
][i
]
2367 = operands_match_p (recog_operand
[other
], recog_operand
[i
]);
2369 if (i
== commutative
|| i
== commutative
+ 1)
2371 int other
= i
+ (i
== commutative
? 1 : -1);
2372 operands_match
[c
][other
]
2373 = operands_match_p (recog_operand
[c
], recog_operand
[other
]);
2375 /* Note that C is supposed to be less than I.
2376 No need to consider altering both C and I because in
2377 that case we would alter one into the other. */
2383 /* Examine each operand that is a memory reference or memory address
2384 and reload parts of the addresses into index registers.
2385 Also here any references to pseudo regs that didn't get hard regs
2386 but are equivalent to constants get replaced in the insn itself
2387 with those constants. Nobody will ever see them again.
2389 Finally, set up the preferred classes of each operand. */
2391 for (i
= 0; i
< noperands
; i
++)
2393 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
2395 address_reloaded
[i
] = 0;
2396 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2397 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2400 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2401 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2404 if (*constraints
[i
] == 0)
2405 /* Ignore things like match_operator operands. */
2407 else if (constraints
[i
][0] == 'p')
2409 find_reloads_address (VOIDmode
, NULL_PTR
,
2410 recog_operand
[i
], recog_operand_loc
[i
],
2411 i
, operand_type
[i
], ind_levels
);
2412 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2414 else if (code
== MEM
)
2416 if (find_reloads_address (GET_MODE (recog_operand
[i
]),
2417 recog_operand_loc
[i
],
2418 XEXP (recog_operand
[i
], 0),
2419 &XEXP (recog_operand
[i
], 0),
2420 i
, address_type
[i
], ind_levels
))
2421 address_reloaded
[i
] = 1;
2422 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2424 else if (code
== SUBREG
)
2425 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2426 = find_reloads_toplev (recog_operand
[i
], i
, address_type
[i
],
2429 && &SET_DEST (set
) == recog_operand_loc
[i
]);
2430 else if (code
== PLUS
)
2431 /* We can get a PLUS as an "operand" as a result of
2432 register elimination. See eliminate_regs and gen_reload. */
2433 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2434 = find_reloads_toplev (recog_operand
[i
], i
, address_type
[i
],
2436 else if (code
== REG
)
2438 /* This is equivalent to calling find_reloads_toplev.
2439 The code is duplicated for speed.
2440 When we find a pseudo always equivalent to a constant,
2441 we replace it by the constant. We must be sure, however,
2442 that we don't try to replace it in the insn in which it
2444 register int regno
= REGNO (recog_operand
[i
]);
2445 if (reg_equiv_constant
[regno
] != 0
2446 && (set
== 0 || &SET_DEST (set
) != recog_operand_loc
[i
]))
2447 substed_operand
[i
] = recog_operand
[i
]
2448 = reg_equiv_constant
[regno
];
2449 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2450 that feeds this insn. */
2451 if (reg_equiv_mem
[regno
] != 0)
2452 substed_operand
[i
] = recog_operand
[i
]
2453 = reg_equiv_mem
[regno
];
2455 if (reg_equiv_address
[regno
] != 0)
2457 /* If reg_equiv_address is not a constant address, copy it,
2458 since it may be shared. */
2459 rtx address
= reg_equiv_address
[regno
];
2461 if (rtx_varies_p (address
))
2462 address
= copy_rtx (address
);
2464 /* If this is an output operand, we must output a CLOBBER
2465 after INSN so find_equiv_reg knows REGNO is being written.
2466 Mark this insn specially, do we can put our output reloads
2469 if (modified
[i
] != RELOAD_READ
)
2470 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER
, VOIDmode
,
2475 *recog_operand_loc
[i
] = recog_operand
[i
]
2476 = gen_rtx (MEM
, GET_MODE (recog_operand
[i
]), address
);
2477 RTX_UNCHANGING_P (recog_operand
[i
])
2478 = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
2479 find_reloads_address (GET_MODE (recog_operand
[i
]),
2480 recog_operand_loc
[i
],
2481 XEXP (recog_operand
[i
], 0),
2482 &XEXP (recog_operand
[i
], 0),
2483 i
, address_type
[i
], ind_levels
);
2484 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2487 /* If the operand is still a register (we didn't replace it with an
2488 equivalent), get the preferred class to reload it into. */
2489 code
= GET_CODE (recog_operand
[i
]);
2491 = ((code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
)
2492 ? reg_preferred_class (REGNO (recog_operand
[i
])) : NO_REGS
);
2494 = (code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
2495 && reg_alternate_class (REGNO (recog_operand
[i
])) == NO_REGS
);
2498 /* If this is simply a copy from operand 1 to operand 0, merge the
2499 preferred classes for the operands. */
2500 if (set
!= 0 && noperands
>= 2 && recog_operand
[0] == SET_DEST (set
)
2501 && recog_operand
[1] == SET_SRC (set
))
2503 preferred_class
[0] = preferred_class
[1]
2504 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2505 pref_or_nothing
[0] |= pref_or_nothing
[1];
2506 pref_or_nothing
[1] |= pref_or_nothing
[0];
2509 /* Now see what we need for pseudo-regs that didn't get hard regs
2510 or got the wrong kind of hard reg. For this, we must consider
2511 all the operands together against the register constraints. */
2513 best
= MAX_RECOG_OPERANDS
+ 300;
2516 goal_alternative_swapped
= 0;
2519 /* The constraints are made of several alternatives.
2520 Each operand's constraint looks like foo,bar,... with commas
2521 separating the alternatives. The first alternatives for all
2522 operands go together, the second alternatives go together, etc.
2524 First loop over alternatives. */
2526 for (this_alternative_number
= 0;
2527 this_alternative_number
< n_alternatives
;
2528 this_alternative_number
++)
2530 /* Loop over operands for one constraint alternative. */
2531 /* LOSERS counts those that don't fit this alternative
2532 and would require loading. */
2534 /* BAD is set to 1 if it some operand can't fit this alternative
2535 even after reloading. */
2537 /* REJECT is a count of how undesirable this alternative says it is
2538 if any reloading is required. If the alternative matches exactly
2539 then REJECT is ignored, but otherwise it gets this much
2540 counted against it in addition to the reloading needed. Each
2541 ? counts three times here since we want the disparaging caused by
2542 a bad register class to only count 1/3 as much. */
2545 this_earlyclobber
= 0;
2547 for (i
= 0; i
< noperands
; i
++)
2549 register char *p
= constraints
[i
];
2550 register int win
= 0;
2551 /* 0 => this operand can be reloaded somehow for this alternative */
2553 /* 0 => this operand can be reloaded if the alternative allows regs. */
2556 register rtx operand
= recog_operand
[i
];
2558 /* Nonzero means this is a MEM that must be reloaded into a reg
2559 regardless of what the constraint says. */
2560 int force_reload
= 0;
2562 /* Nonzero if a constant forced into memory would be OK for this
2565 int earlyclobber
= 0;
2567 /* If the operand is a SUBREG, extract
2568 the REG or MEM (or maybe even a constant) within.
2569 (Constants can occur as a result of reg_equiv_constant.) */
2571 while (GET_CODE (operand
) == SUBREG
)
2573 offset
+= SUBREG_WORD (operand
);
2574 operand
= SUBREG_REG (operand
);
2575 /* Force reload if this is a constant or PLUS or if there may may
2576 be a problem accessing OPERAND in the outer mode. */
2577 if (CONSTANT_P (operand
)
2578 || GET_CODE (operand
) == PLUS
2579 /* We must force a reload of paradoxical SUBREGs
2580 of a MEM because the alignment of the inner value
2581 may not be enough to do the outer reference. On
2582 big-endian machines, it may also reference outside
2585 On machines that extend byte operations and we have a
2586 SUBREG where both the inner and outer modes are no wider
2587 than a word and the inner mode is narrower, is integral,
2588 and gets extended when loaded from memory, combine.c has
2589 made assumptions about the behavior of the machine in such
2590 register access. If the data is, in fact, in memory we
2591 must always load using the size assumed to be in the
2592 register and let the insn do the different-sized
2594 || ((GET_CODE (operand
) == MEM
2595 || (GET_CODE (operand
)== REG
2596 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2597 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2598 < BIGGEST_ALIGNMENT
)
2599 && (GET_MODE_SIZE (operand_mode
[i
])
2600 > GET_MODE_SIZE (GET_MODE (operand
))))
2601 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2602 #ifdef LOAD_EXTEND_OP
2603 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2604 && (GET_MODE_SIZE (GET_MODE (operand
))
2606 && (GET_MODE_SIZE (operand_mode
[i
])
2607 > GET_MODE_SIZE (GET_MODE (operand
)))
2608 && INTEGRAL_MODE_P (GET_MODE (operand
))
2609 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2612 /* Subreg of a hard reg which can't handle the subreg's mode
2613 or which would handle that mode in the wrong number of
2614 registers for subregging to work. */
2615 || (GET_CODE (operand
) == REG
2616 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2617 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2618 && (GET_MODE_SIZE (GET_MODE (operand
))
2620 && ((GET_MODE_SIZE (GET_MODE (operand
))
2622 != HARD_REGNO_NREGS (REGNO (operand
),
2623 GET_MODE (operand
))))
2624 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2629 this_alternative
[i
] = (int) NO_REGS
;
2630 this_alternative_win
[i
] = 0;
2631 this_alternative_offmemok
[i
] = 0;
2632 this_alternative_earlyclobber
[i
] = 0;
2633 this_alternative_matches
[i
] = -1;
2635 /* An empty constraint or empty alternative
2636 allows anything which matched the pattern. */
2637 if (*p
== 0 || *p
== ',')
2640 /* Scan this alternative's specs for this operand;
2641 set WIN if the operand fits any letter in this alternative.
2642 Otherwise, clear BADOP if this operand could
2643 fit some letter after reloads,
2644 or set WINREG if this operand could fit after reloads
2645 provided the constraint allows some registers. */
2647 while (*p
&& (c
= *p
++) != ',')
2656 /* The last operand should not be marked commutative. */
2657 if (i
!= noperands
- 1)
2670 /* Ignore rest of this alternative as far as
2671 reloading is concerned. */
2672 while (*p
&& *p
!= ',') p
++;
2681 this_alternative_matches
[i
] = c
;
2682 /* We are supposed to match a previous operand.
2683 If we do, we win if that one did.
2684 If we do not, count both of the operands as losers.
2685 (This is too conservative, since most of the time
2686 only a single reload insn will be needed to make
2687 the two operands win. As a result, this alternative
2688 may be rejected when it is actually desirable.) */
2689 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2690 /* If we are matching as if two operands were swapped,
2691 also pretend that operands_match had been computed
2693 But if I is the second of those and C is the first,
2694 don't exchange them, because operands_match is valid
2695 only on one side of its diagonal. */
2697 [(c
== commutative
|| c
== commutative
+ 1)
2698 ? 2*commutative
+ 1 - c
: c
]
2699 [(i
== commutative
|| i
== commutative
+ 1)
2700 ? 2*commutative
+ 1 - i
: i
])
2701 : operands_match
[c
][i
])
2702 win
= this_alternative_win
[c
];
2705 /* Operands don't match. */
2707 /* Retroactively mark the operand we had to match
2708 as a loser, if it wasn't already. */
2709 if (this_alternative_win
[c
])
2711 this_alternative_win
[c
] = 0;
2712 if (this_alternative
[c
] == (int) NO_REGS
)
2714 /* But count the pair only once in the total badness of
2715 this alternative, if the pair can be a dummy reload. */
2717 = find_dummy_reload (recog_operand
[i
], recog_operand
[c
],
2718 recog_operand_loc
[i
], recog_operand_loc
[c
],
2719 operand_mode
[i
], operand_mode
[c
],
2720 this_alternative
[c
], -1);
2725 /* This can be fixed with reloads if the operand
2726 we are supposed to match can be fixed with reloads. */
2728 this_alternative
[i
] = this_alternative
[c
];
2730 /* If we have to reload this operand and some previous
2731 operand also had to match the same thing as this
2732 operand, we don't know how to do that. So reject this
2734 if (! win
|| force_reload
)
2735 for (j
= 0; j
< i
; j
++)
2736 if (this_alternative_matches
[j
]
2737 == this_alternative_matches
[i
])
2743 /* All necessary reloads for an address_operand
2744 were handled in find_reloads_address. */
2745 this_alternative
[i
] = (int) BASE_REG_CLASS
;
2752 if (GET_CODE (operand
) == MEM
2753 || (GET_CODE (operand
) == REG
2754 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2755 && reg_renumber
[REGNO (operand
)] < 0))
2757 if (CONSTANT_P (operand
))
2763 if (GET_CODE (operand
) == MEM
2764 && ! address_reloaded
[i
]
2765 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2766 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2771 if (GET_CODE (operand
) == MEM
2772 && ! address_reloaded
[i
]
2773 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2774 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
2778 /* Memory operand whose address is not offsettable. */
2782 if (GET_CODE (operand
) == MEM
2783 && ! (ind_levels
? offsettable_memref_p (operand
)
2784 : offsettable_nonstrict_memref_p (operand
))
2785 /* Certain mem addresses will become offsettable
2786 after they themselves are reloaded. This is important;
2787 we don't want our own handling of unoffsettables
2788 to override the handling of reg_equiv_address. */
2789 && !(GET_CODE (XEXP (operand
, 0)) == REG
2791 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
2795 /* Memory operand whose address is offsettable. */
2799 if ((GET_CODE (operand
) == MEM
2800 /* If IND_LEVELS, find_reloads_address won't reload a
2801 pseudo that didn't get a hard reg, so we have to
2802 reject that case. */
2803 && (ind_levels
? offsettable_memref_p (operand
)
2804 : offsettable_nonstrict_memref_p (operand
)))
2805 /* Certain mem addresses will become offsettable
2806 after they themselves are reloaded. This is important;
2807 we don't want our own handling of unoffsettables
2808 to override the handling of reg_equiv_address. */
2809 || (GET_CODE (operand
) == MEM
2810 && GET_CODE (XEXP (operand
, 0)) == REG
2812 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0))
2813 || (GET_CODE (operand
) == REG
2814 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2815 && reg_renumber
[REGNO (operand
)] < 0
2816 /* If reg_equiv_address is nonzero, we will be
2817 loading it into a register; hence it will be
2818 offsettable, but we cannot say that reg_equiv_mem
2819 is offsettable without checking. */
2820 && ((reg_equiv_mem
[REGNO (operand
)] != 0
2821 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
2822 || (reg_equiv_address
[REGNO (operand
)] != 0))))
2824 if (CONSTANT_P (operand
) || GET_CODE (operand
) == MEM
)
2831 /* Output operand that is stored before the need for the
2832 input operands (and their index registers) is over. */
2833 earlyclobber
= 1, this_earlyclobber
= 1;
2837 /* Match any floating double constant, but only if
2838 we can examine the bits of it reliably. */
2839 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
2840 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
2841 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
2843 if (GET_CODE (operand
) == CONST_DOUBLE
)
2848 if (GET_CODE (operand
) == CONST_DOUBLE
)
2854 if (GET_CODE (operand
) == CONST_DOUBLE
2855 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
2860 if (GET_CODE (operand
) == CONST_INT
2861 || (GET_CODE (operand
) == CONST_DOUBLE
2862 && GET_MODE (operand
) == VOIDmode
))
2865 if (CONSTANT_P (operand
)
2866 #ifdef LEGITIMATE_PIC_OPERAND_P
2867 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
2874 if (GET_CODE (operand
) == CONST_INT
2875 || (GET_CODE (operand
) == CONST_DOUBLE
2876 && GET_MODE (operand
) == VOIDmode
))
2888 if (GET_CODE (operand
) == CONST_INT
2889 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
2899 /* A PLUS is never a valid operand, but reload can make
2900 it from a register when eliminating registers. */
2901 && GET_CODE (operand
) != PLUS
2902 /* A SCRATCH is not a valid operand. */
2903 && GET_CODE (operand
) != SCRATCH
2904 #ifdef LEGITIMATE_PIC_OPERAND_P
2905 && (! CONSTANT_P (operand
)
2907 || LEGITIMATE_PIC_OPERAND_P (operand
))
2909 && (GENERAL_REGS
== ALL_REGS
2910 || GET_CODE (operand
) != REG
2911 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2912 && reg_renumber
[REGNO (operand
)] < 0)))
2914 /* Drop through into 'r' case */
2918 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
2921 #ifdef EXTRA_CONSTRAINT
2927 if (EXTRA_CONSTRAINT (operand
, c
))
2934 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
2937 if (GET_MODE (operand
) == BLKmode
)
2940 if (GET_CODE (operand
) == REG
2941 && reg_fits_class_p (operand
, this_alternative
[i
],
2942 offset
, GET_MODE (recog_operand
[i
])))
2949 /* If this operand could be handled with a reg,
2950 and some reg is allowed, then this operand can be handled. */
2951 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
2954 /* Record which operands fit this alternative. */
2955 this_alternative_earlyclobber
[i
] = earlyclobber
;
2956 if (win
&& ! force_reload
)
2957 this_alternative_win
[i
] = 1;
2960 int const_to_mem
= 0;
2962 this_alternative_offmemok
[i
] = offmemok
;
2966 /* Alternative loses if it has no regs for a reg operand. */
2967 if (GET_CODE (operand
) == REG
2968 && this_alternative
[i
] == (int) NO_REGS
2969 && this_alternative_matches
[i
] < 0)
2972 /* Alternative loses if it requires a type of reload not
2973 permitted for this insn. We can always reload SCRATCH
2974 and objects with a REG_UNUSED note. */
2975 if (GET_CODE (operand
) != SCRATCH
2976 && modified
[i
] != RELOAD_READ
&& no_output_reloads
2977 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
2979 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
)
2982 /* If this is a constant that is reloaded into the desired
2983 class by copying it to memory first, count that as another
2984 reload. This is consistent with other code and is
2985 required to avoid chosing another alternative when
2986 the constant is moved into memory by this function on
2987 an early reload pass. Note that the test here is
2988 precisely the same as in the code below that calls
2990 if (CONSTANT_P (operand
)
2991 /* force_const_mem does not accept HIGH. */
2992 && GET_CODE (operand
) != HIGH
2993 && (PREFERRED_RELOAD_CLASS (operand
,
2994 (enum reg_class
) this_alternative
[i
])
2996 && operand_mode
[i
] != VOIDmode
)
2999 if (this_alternative
[i
] != (int) NO_REGS
)
3003 /* If we can't reload this value at all, reject this
3004 alternative. Note that we could also lose due to
3005 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3008 if (! CONSTANT_P (operand
)
3009 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3010 && (PREFERRED_RELOAD_CLASS (operand
,
3011 (enum reg_class
) this_alternative
[i
])
3015 /* We prefer to reload pseudos over reloading other things,
3016 since such reloads may be able to be eliminated later.
3017 If we are reloading a SCRATCH, we won't be generating any
3018 insns, just using a register, so it is also preferred.
3019 So bump REJECT in other cases. Don't do this in the
3020 case where we are forcing a constant into memory and
3021 it will then win since we don't want to have a different
3022 alternative match then. */
3023 if (! (GET_CODE (operand
) == REG
3024 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3025 && GET_CODE (operand
) != SCRATCH
3026 && ! (const_to_mem
&& constmemok
))
3030 /* If this operand is a pseudo register that didn't get a hard
3031 reg and this alternative accepts some register, see if the
3032 class that we want is a subset of the preferred class for this
3033 register. If not, but it intersects that class, use the
3034 preferred class instead. If it does not intersect the preferred
3035 class, show that usage of this alternative should be discouraged;
3036 it will be discouraged more still if the register is `preferred
3037 or nothing'. We do this because it increases the chance of
3038 reusing our spill register in a later insn and avoiding a pair
3039 of memory stores and loads.
3041 Don't bother with this if this alternative will accept this
3044 Don't do this for a multiword operand, since it is only a
3045 small win and has the risk of requiring more spill registers,
3046 which could cause a large loss.
3048 Don't do this if the preferred class has only one register
3049 because we might otherwise exhaust the class. */
3052 if (! win
&& this_alternative
[i
] != (int) NO_REGS
3053 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3054 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3056 if (! reg_class_subset_p (this_alternative
[i
],
3057 preferred_class
[i
]))
3059 /* Since we don't have a way of forming the intersection,
3060 we just do something special if the preferred class
3061 is a subset of the class we have; that's the most
3062 common case anyway. */
3063 if (reg_class_subset_p (preferred_class
[i
],
3064 this_alternative
[i
]))
3065 this_alternative
[i
] = (int) preferred_class
[i
];
3067 reject
+= (1 + pref_or_nothing
[i
]);
3072 /* Now see if any output operands that are marked "earlyclobber"
3073 in this alternative conflict with any input operands
3074 or any memory addresses. */
3076 for (i
= 0; i
< noperands
; i
++)
3077 if (this_alternative_earlyclobber
[i
]
3078 && this_alternative_win
[i
])
3080 struct decomposition early_data
;
3082 early_data
= decompose (recog_operand
[i
]);
3084 if (modified
[i
] == RELOAD_READ
)
3086 if (this_insn_is_asm
)
3087 warning_for_asm (this_insn
,
3088 "`&' constraint used with input operand");
3094 if (this_alternative
[i
] == NO_REGS
)
3096 this_alternative_earlyclobber
[i
] = 0;
3097 if (this_insn_is_asm
)
3098 error_for_asm (this_insn
,
3099 "`&' constraint used with no register class");
3104 for (j
= 0; j
< noperands
; j
++)
3105 /* Is this an input operand or a memory ref? */
3106 if ((GET_CODE (recog_operand
[j
]) == MEM
3107 || modified
[j
] != RELOAD_WRITE
)
3109 /* Ignore things like match_operator operands. */
3110 && *constraints1
[j
] != 0
3111 /* Don't count an input operand that is constrained to match
3112 the early clobber operand. */
3113 && ! (this_alternative_matches
[j
] == i
3114 && rtx_equal_p (recog_operand
[i
], recog_operand
[j
]))
3115 /* Is it altered by storing the earlyclobber operand? */
3116 && !immune_p (recog_operand
[j
], recog_operand
[i
], early_data
))
3118 /* If the output is in a single-reg class,
3119 it's costly to reload it, so reload the input instead. */
3120 if (reg_class_size
[this_alternative
[i
]] == 1
3121 && (GET_CODE (recog_operand
[j
]) == REG
3122 || GET_CODE (recog_operand
[j
]) == SUBREG
))
3125 this_alternative_win
[j
] = 0;
3130 /* If an earlyclobber operand conflicts with something,
3131 it must be reloaded, so request this and count the cost. */
3135 this_alternative_win
[i
] = 0;
3136 for (j
= 0; j
< noperands
; j
++)
3137 if (this_alternative_matches
[j
] == i
3138 && this_alternative_win
[j
])
3140 this_alternative_win
[j
] = 0;
3146 /* If one alternative accepts all the operands, no reload required,
3147 choose that alternative; don't consider the remaining ones. */
3150 /* Unswap these so that they are never swapped at `finish'. */
3151 if (commutative
>= 0)
3153 recog_operand
[commutative
] = substed_operand
[commutative
];
3154 recog_operand
[commutative
+ 1]
3155 = substed_operand
[commutative
+ 1];
3157 for (i
= 0; i
< noperands
; i
++)
3159 goal_alternative_win
[i
] = 1;
3160 goal_alternative
[i
] = this_alternative
[i
];
3161 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3162 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3163 goal_alternative_earlyclobber
[i
]
3164 = this_alternative_earlyclobber
[i
];
3166 goal_alternative_number
= this_alternative_number
;
3167 goal_alternative_swapped
= swapped
;
3168 goal_earlyclobber
= this_earlyclobber
;
3172 /* REJECT, set by the ! and ? constraint characters and when a register
3173 would be reloaded into a non-preferred class, discourages the use of
3174 this alternative for a reload goal. REJECT is incremented by three
3175 for each ? and one for each non-preferred class. */
3176 losers
= losers
* 3 + reject
;
3178 /* If this alternative can be made to work by reloading,
3179 and it needs less reloading than the others checked so far,
3180 record it as the chosen goal for reloading. */
3181 if (! bad
&& best
> losers
)
3183 for (i
= 0; i
< noperands
; i
++)
3185 goal_alternative
[i
] = this_alternative
[i
];
3186 goal_alternative_win
[i
] = this_alternative_win
[i
];
3187 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3188 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3189 goal_alternative_earlyclobber
[i
]
3190 = this_alternative_earlyclobber
[i
];
3192 goal_alternative_swapped
= swapped
;
3194 goal_alternative_number
= this_alternative_number
;
3195 goal_earlyclobber
= this_earlyclobber
;
3199 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3200 then we need to try each alternative twice,
3201 the second time matching those two operands
3202 as if we had exchanged them.
3203 To do this, really exchange them in operands.
3205 If we have just tried the alternatives the second time,
3206 return operands to normal and drop through. */
3208 if (commutative
>= 0)
3213 register enum reg_class tclass
;
3216 recog_operand
[commutative
] = substed_operand
[commutative
+ 1];
3217 recog_operand
[commutative
+ 1] = substed_operand
[commutative
];
3219 tclass
= preferred_class
[commutative
];
3220 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3221 preferred_class
[commutative
+ 1] = tclass
;
3223 t
= pref_or_nothing
[commutative
];
3224 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3225 pref_or_nothing
[commutative
+ 1] = t
;
3227 bcopy ((char *) constraints1
, (char *) constraints
,
3228 noperands
* sizeof (char *));
3233 recog_operand
[commutative
] = substed_operand
[commutative
];
3234 recog_operand
[commutative
+ 1] = substed_operand
[commutative
+ 1];
3238 /* The operands don't meet the constraints.
3239 goal_alternative describes the alternative
3240 that we could reach by reloading the fewest operands.
3241 Reload so as to fit it. */
3243 if (best
== MAX_RECOG_OPERANDS
+ 300)
3245 /* No alternative works with reloads?? */
3246 if (insn_code_number
>= 0)
3248 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3249 /* Avoid further trouble with this insn. */
3250 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3255 /* Jump to `finish' from above if all operands are valid already.
3256 In that case, goal_alternative_win is all 1. */
3259 /* Right now, for any pair of operands I and J that are required to match,
3261 goal_alternative_matches[J] is I.
3262 Set up goal_alternative_matched as the inverse function:
3263 goal_alternative_matched[I] = J. */
3265 for (i
= 0; i
< noperands
; i
++)
3266 goal_alternative_matched
[i
] = -1;
3268 for (i
= 0; i
< noperands
; i
++)
3269 if (! goal_alternative_win
[i
]
3270 && goal_alternative_matches
[i
] >= 0)
3271 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3273 /* If the best alternative is with operands 1 and 2 swapped,
3274 consider them swapped before reporting the reloads. Update the
3275 operand numbers of any reloads already pushed. */
3277 if (goal_alternative_swapped
)
3281 tem
= substed_operand
[commutative
];
3282 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3283 substed_operand
[commutative
+ 1] = tem
;
3284 tem
= recog_operand
[commutative
];
3285 recog_operand
[commutative
] = recog_operand
[commutative
+ 1];
3286 recog_operand
[commutative
+ 1] = tem
;
3288 for (i
= 0; i
< n_reloads
; i
++)
3290 if (reload_opnum
[i
] == commutative
)
3291 reload_opnum
[i
] = commutative
+ 1;
3292 else if (reload_opnum
[i
] == commutative
+ 1)
3293 reload_opnum
[i
] = commutative
;
3297 /* Perform whatever substitutions on the operands we are supposed
3298 to make due to commutativity or replacement of registers
3299 with equivalent constants or memory slots. */
3301 for (i
= 0; i
< noperands
; i
++)
3303 *recog_operand_loc
[i
] = substed_operand
[i
];
3304 /* While we are looping on operands, initialize this. */
3305 operand_reloadnum
[i
] = -1;
3307 /* If this is an earlyclobber operand, we need to widen the scope.
3308 The reload must remain valid from the start of the insn being
3309 reloaded until after the operand is stored into its destination.
3310 We approximate this with RELOAD_OTHER even though we know that we
3311 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3313 One special case that is worth checking is when we have an
3314 output that is earlyclobber but isn't used past the insn (typically
3315 a SCRATCH). In this case, we only need have the reload live
3316 through the insn itself, but not for any of our input or output
3319 In any case, anything needed to address this operand can remain
3320 however they were previously categorized. */
3322 if (goal_alternative_earlyclobber
[i
])
3324 = (find_reg_note (insn
, REG_UNUSED
, recog_operand
[i
])
3325 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3328 /* Any constants that aren't allowed and can't be reloaded
3329 into registers are here changed into memory references. */
3330 for (i
= 0; i
< noperands
; i
++)
3331 if (! goal_alternative_win
[i
]
3332 && CONSTANT_P (recog_operand
[i
])
3333 /* force_const_mem does not accept HIGH. */
3334 && GET_CODE (recog_operand
[i
]) != HIGH
3335 && (PREFERRED_RELOAD_CLASS (recog_operand
[i
],
3336 (enum reg_class
) goal_alternative
[i
])
3338 && operand_mode
[i
] != VOIDmode
)
3340 *recog_operand_loc
[i
] = recog_operand
[i
]
3341 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3343 i
, address_type
[i
], ind_levels
, 0);
3344 if (alternative_allows_memconst (constraints1
[i
],
3345 goal_alternative_number
))
3346 goal_alternative_win
[i
] = 1;
3349 /* Record the values of the earlyclobber operands for the caller. */
3350 if (goal_earlyclobber
)
3351 for (i
= 0; i
< noperands
; i
++)
3352 if (goal_alternative_earlyclobber
[i
])
3353 reload_earlyclobbers
[n_earlyclobbers
++] = recog_operand
[i
];
3355 /* Now record reloads for all the operands that need them. */
3356 for (i
= 0; i
< noperands
; i
++)
3357 if (! goal_alternative_win
[i
])
3359 /* Operands that match previous ones have already been handled. */
3360 if (goal_alternative_matches
[i
] >= 0)
3362 /* Handle an operand with a nonoffsettable address
3363 appearing where an offsettable address will do
3364 by reloading the address into a base register.
3366 ??? We can also do this when the operand is a register and
3367 reg_equiv_mem is not offsettable, but this is a bit tricky,
3368 so we don't bother with it. It may not be worth doing. */
3369 else if (goal_alternative_matched
[i
] == -1
3370 && goal_alternative_offmemok
[i
]
3371 && GET_CODE (recog_operand
[i
]) == MEM
)
3373 operand_reloadnum
[i
]
3374 = push_reload (XEXP (recog_operand
[i
], 0), NULL_RTX
,
3375 &XEXP (recog_operand
[i
], 0), NULL_PTR
,
3376 BASE_REG_CLASS
, GET_MODE (XEXP (recog_operand
[i
], 0)),
3377 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3378 reload_inc
[operand_reloadnum
[i
]]
3379 = GET_MODE_SIZE (GET_MODE (recog_operand
[i
]));
3381 /* If this operand is an output, we will have made any
3382 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3383 now we are treating part of the operand as an input, so
3384 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3386 if (modified
[i
] == RELOAD_WRITE
)
3387 for (j
= 0; j
< n_reloads
; j
++)
3388 if (reload_opnum
[j
] == i
3389 && reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3390 reload_when_needed
[j
] = RELOAD_FOR_INPUT_ADDRESS
;
3392 else if (goal_alternative_matched
[i
] == -1)
3393 operand_reloadnum
[i
] =
3394 push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3395 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3396 (modified
[i
] != RELOAD_WRITE
?
3397 recog_operand_loc
[i
] : 0),
3398 modified
[i
] != RELOAD_READ
? recog_operand_loc
[i
] : 0,
3399 (enum reg_class
) goal_alternative
[i
],
3400 (modified
[i
] == RELOAD_WRITE
3401 ? VOIDmode
: operand_mode
[i
]),
3402 (modified
[i
] == RELOAD_READ
3403 ? VOIDmode
: operand_mode
[i
]),
3404 (insn_code_number
< 0 ? 0
3405 : insn_operand_strict_low
[insn_code_number
][i
]),
3406 0, i
, operand_type
[i
]);
3407 /* In a matching pair of operands, one must be input only
3408 and the other must be output only.
3409 Pass the input operand as IN and the other as OUT. */
3410 else if (modified
[i
] == RELOAD_READ
3411 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3413 operand_reloadnum
[i
]
3414 = push_reload (recog_operand
[i
],
3415 recog_operand
[goal_alternative_matched
[i
]],
3416 recog_operand_loc
[i
],
3417 recog_operand_loc
[goal_alternative_matched
[i
]],
3418 (enum reg_class
) goal_alternative
[i
],
3420 operand_mode
[goal_alternative_matched
[i
]],
3421 0, 0, i
, RELOAD_OTHER
);
3422 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3424 else if (modified
[i
] == RELOAD_WRITE
3425 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3427 operand_reloadnum
[goal_alternative_matched
[i
]]
3428 = push_reload (recog_operand
[goal_alternative_matched
[i
]],
3430 recog_operand_loc
[goal_alternative_matched
[i
]],
3431 recog_operand_loc
[i
],
3432 (enum reg_class
) goal_alternative
[i
],
3433 operand_mode
[goal_alternative_matched
[i
]],
3435 0, 0, i
, RELOAD_OTHER
);
3436 operand_reloadnum
[i
] = output_reloadnum
;
3438 else if (insn_code_number
>= 0)
3442 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3443 /* Avoid further trouble with this insn. */
3444 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3449 else if (goal_alternative_matched
[i
] < 0
3450 && goal_alternative_matches
[i
] < 0
3453 /* For each non-matching operand that's a MEM or a pseudo-register
3454 that didn't get a hard register, make an optional reload.
3455 This may get done even if the insn needs no reloads otherwise. */
3457 rtx operand
= recog_operand
[i
];
3459 while (GET_CODE (operand
) == SUBREG
)
3460 operand
= XEXP (operand
, 0);
3461 if ((GET_CODE (operand
) == MEM
3462 || (GET_CODE (operand
) == REG
3463 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3464 && (enum reg_class
) goal_alternative
[i
] != NO_REGS
3465 && ! no_input_reloads
3466 /* Optional output reloads don't do anything and we mustn't
3467 make in-out reloads on insns that are not permitted output
3469 && (modified
[i
] == RELOAD_READ
3470 || (modified
[i
] == RELOAD_READ_WRITE
&& ! no_output_reloads
)))
3471 operand_reloadnum
[i
]
3472 = push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3473 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3474 (modified
[i
] != RELOAD_WRITE
3475 ? recog_operand_loc
[i
] : 0),
3476 (modified
[i
] != RELOAD_READ
3477 ? recog_operand_loc
[i
] : 0),
3478 (enum reg_class
) goal_alternative
[i
],
3479 (modified
[i
] == RELOAD_WRITE
3480 ? VOIDmode
: operand_mode
[i
]),
3481 (modified
[i
] == RELOAD_READ
3482 ? VOIDmode
: operand_mode
[i
]),
3483 (insn_code_number
< 0 ? 0
3484 : insn_operand_strict_low
[insn_code_number
][i
]),
3485 1, i
, operand_type
[i
]);
3487 else if (goal_alternative_matches
[i
] >= 0
3488 && goal_alternative_win
[goal_alternative_matches
[i
]]
3489 && modified
[i
] == RELOAD_READ
3490 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3491 && ! no_input_reloads
&& ! no_output_reloads
3494 /* Similarly, make an optional reload for a pair of matching
3495 objects that are in MEM or a pseudo that didn't get a hard reg. */
3497 rtx operand
= recog_operand
[i
];
3499 while (GET_CODE (operand
) == SUBREG
)
3500 operand
= XEXP (operand
, 0);
3501 if ((GET_CODE (operand
) == MEM
3502 || (GET_CODE (operand
) == REG
3503 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3504 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3506 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3507 = push_reload (recog_operand
[goal_alternative_matches
[i
]],
3509 recog_operand_loc
[goal_alternative_matches
[i
]],
3510 recog_operand_loc
[i
],
3511 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3512 operand_mode
[goal_alternative_matches
[i
]],
3514 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3517 /* If this insn pattern contains any MATCH_DUP's, make sure that
3518 they will be substituted if the operands they match are substituted.
3519 Also do now any substitutions we already did on the operands.
3521 Don't do this if we aren't making replacements because we might be
3522 propagating things allocated by frame pointer elimination into places
3523 it doesn't expect. */
3525 if (insn_code_number
>= 0 && replace
)
3526 for (i
= insn_n_dups
[insn_code_number
] - 1; i
>= 0; i
--)
3528 int opno
= recog_dup_num
[i
];
3529 *recog_dup_loc
[i
] = *recog_operand_loc
[opno
];
3530 if (operand_reloadnum
[opno
] >= 0)
3531 push_replacement (recog_dup_loc
[i
], operand_reloadnum
[opno
],
3532 insn_operand_mode
[insn_code_number
][opno
]);
3536 /* This loses because reloading of prior insns can invalidate the equivalence
3537 (or at least find_equiv_reg isn't smart enough to find it any more),
3538 causing this insn to need more reload regs than it needed before.
3539 It may be too late to make the reload regs available.
3540 Now this optimization is done safely in choose_reload_regs. */
3542 /* For each reload of a reg into some other class of reg,
3543 search for an existing equivalent reg (same value now) in the right class.
3544 We can use it as long as we don't need to change its contents. */
3545 for (i
= 0; i
< n_reloads
; i
++)
3546 if (reload_reg_rtx
[i
] == 0
3547 && reload_in
[i
] != 0
3548 && GET_CODE (reload_in
[i
]) == REG
3549 && reload_out
[i
] == 0)
3552 = find_equiv_reg (reload_in
[i
], insn
, reload_reg_class
[i
], -1,
3553 static_reload_reg_p
, 0, reload_inmode
[i
]);
3554 /* Prevent generation of insn to load the value
3555 because the one we found already has the value. */
3556 if (reload_reg_rtx
[i
])
3557 reload_in
[i
] = reload_reg_rtx
[i
];
3561 /* Perhaps an output reload can be combined with another
3562 to reduce needs by one. */
3563 if (!goal_earlyclobber
)
3566 /* If we have a pair of reloads for parts of an address, they are reloading
3567 the same object, the operands themselves were not reloaded, and they
3568 are for two operands that are supposed to match, merge the reloads and
3569 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3571 for (i
= 0; i
< n_reloads
; i
++)
3575 for (j
= i
+ 1; j
< n_reloads
; j
++)
3576 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3577 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3578 && (reload_when_needed
[j
] == RELOAD_FOR_INPUT_ADDRESS
3579 || reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3580 && rtx_equal_p (reload_in
[i
], reload_in
[j
])
3581 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3582 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]])
3583 && (operand_reloadnum
[reload_opnum
[j
]] < 0
3584 || reload_optional
[operand_reloadnum
[reload_opnum
[j
]]])
3585 && (goal_alternative_matches
[reload_opnum
[i
]] == reload_opnum
[j
]
3586 || (goal_alternative_matches
[reload_opnum
[j
]]
3587 == reload_opnum
[i
])))
3589 for (k
= 0; k
< n_replacements
; k
++)
3590 if (replacements
[k
].what
== j
)
3591 replacements
[k
].what
= i
;
3593 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3598 /* Scan all the reloads and update their type.
3599 If a reload is for the address of an operand and we didn't reload
3600 that operand, change the type. Similarly, change the operand number
3601 of a reload when two operands match. If a reload is optional, treat it
3602 as though the operand isn't reloaded.
3604 ??? This latter case is somewhat odd because if we do the optional
3605 reload, it means the object is hanging around. Thus we need only
3606 do the address reload if the optional reload was NOT done.
3608 Change secondary reloads to be the address type of their operand, not
3611 If an operand's reload is now RELOAD_OTHER, change any
3612 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3613 RELOAD_FOR_OTHER_ADDRESS. */
3615 for (i
= 0; i
< n_reloads
; i
++)
3617 if (reload_secondary_p
[i
]
3618 && reload_when_needed
[i
] == operand_type
[reload_opnum
[i
]])
3619 reload_when_needed
[i
] = address_type
[reload_opnum
[i
]];
3621 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3622 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3623 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3624 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]]))
3626 /* If we have a secondary reload to go along with this reload,
3627 change its type to RELOAD_FOR_OPADDR_ADDR. */
3629 if (reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3630 && reload_secondary_in_reload
[i
] != -1)
3632 int secondary_in_reload
= reload_secondary_in_reload
[i
];
3634 reload_when_needed
[secondary_in_reload
] =
3635 RELOAD_FOR_OPADDR_ADDR
;
3637 /* If there's a tertiary reload we have to change it also. */
3638 if (secondary_in_reload
> 0
3639 && reload_secondary_in_reload
[secondary_in_reload
] != -1)
3640 reload_when_needed
[reload_secondary_in_reload
[secondary_in_reload
]]
3641 = RELOAD_FOR_OPADDR_ADDR
;
3644 if (reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
3645 && reload_secondary_out_reload
[i
] != -1)
3647 int secondary_out_reload
= reload_secondary_out_reload
[i
];
3649 reload_when_needed
[secondary_out_reload
] =
3650 RELOAD_FOR_OPADDR_ADDR
;
3652 /* If there's a tertiary reload we have to change it also. */
3653 if (secondary_out_reload
3654 && reload_secondary_out_reload
[secondary_out_reload
] != -1)
3655 reload_when_needed
[reload_secondary_out_reload
[secondary_out_reload
]]
3656 = RELOAD_FOR_OPADDR_ADDR
;
3658 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3661 if (reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3662 && operand_reloadnum
[reload_opnum
[i
]] >= 0
3663 && (reload_when_needed
[operand_reloadnum
[reload_opnum
[i
]]]
3665 reload_when_needed
[i
] = RELOAD_FOR_OTHER_ADDRESS
;
3667 if (goal_alternative_matches
[reload_opnum
[i
]] >= 0)
3668 reload_opnum
[i
] = goal_alternative_matches
[reload_opnum
[i
]];
3671 /* See if we have any reloads that are now allowed to be merged
3672 because we've changed when the reload is needed to
3673 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3674 check for the most common cases. */
3676 for (i
= 0; i
< n_reloads
; i
++)
3677 if (reload_in
[i
] != 0 && reload_out
[i
] == 0
3678 && (reload_when_needed
[i
] == RELOAD_FOR_OPERAND_ADDRESS
3679 || reload_when_needed
[i
] == RELOAD_FOR_OTHER_ADDRESS
))
3680 for (j
= 0; j
< n_reloads
; j
++)
3681 if (i
!= j
&& reload_in
[j
] != 0 && reload_out
[j
] == 0
3682 && reload_when_needed
[j
] == reload_when_needed
[i
]
3683 && MATCHES (reload_in
[i
], reload_in
[j
])
3684 && reload_reg_class
[i
] == reload_reg_class
[j
]
3685 && !reload_nocombine
[i
] && !reload_nocombine
[j
]
3686 && reload_reg_rtx
[i
] == reload_reg_rtx
[j
])
3688 reload_opnum
[i
] = MIN (reload_opnum
[i
], reload_opnum
[j
]);
3689 transfer_replacements (i
, j
);
3693 #else /* no REGISTER_CONSTRAINTS */
3695 int insn_code_number
;
3696 int goal_earlyclobber
= 0; /* Always 0, to make combine_reloads happen. */
3698 rtx body
= PATTERN (insn
);
3702 n_earlyclobbers
= 0;
3703 replace_reloads
= replace
;
3706 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3707 Store the operand values in RECOG_OPERAND and the locations
3708 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3709 Return if the insn needs no reload processing. */
3711 switch (GET_CODE (body
))
3722 noperands
= asm_noperands (body
);
3725 /* This insn is an `asm' with operands.
3726 First, find out how many operands, and allocate space. */
3728 insn_code_number
= -1;
3729 /* ??? This is a bug! ???
3730 Give up and delete this insn if it has too many operands. */
3731 if (noperands
> MAX_RECOG_OPERANDS
)
3734 /* Now get the operand values out of the insn. */
3736 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
3737 NULL_PTR
, NULL_PTR
);
3742 /* Ordinary insn: recognize it, allocate space for operands and
3743 constraints, and get them out via insn_extract. */
3745 insn_code_number
= recog_memoized (insn
);
3746 noperands
= insn_n_operands
[insn_code_number
];
3747 insn_extract (insn
);
3753 for (i
= 0; i
< noperands
; i
++)
3755 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
3756 int is_set_dest
= GET_CODE (body
) == SET
&& (i
== 0);
3758 if (insn_code_number
>= 0)
3759 if (insn_operand_address_p
[insn_code_number
][i
])
3760 find_reloads_address (VOIDmode
, NULL_PTR
,
3761 recog_operand
[i
], recog_operand_loc
[i
],
3762 i
, RELOAD_FOR_INPUT
, ind_levels
);
3764 /* In these cases, we can't tell if the operand is an input
3765 or an output, so be conservative. In practice it won't be
3769 find_reloads_address (GET_MODE (recog_operand
[i
]),
3770 recog_operand_loc
[i
],
3771 XEXP (recog_operand
[i
], 0),
3772 &XEXP (recog_operand
[i
], 0),
3773 i
, RELOAD_OTHER
, ind_levels
);
3775 recog_operand
[i
] = *recog_operand_loc
[i
]
3776 = find_reloads_toplev (recog_operand
[i
], i
, RELOAD_OTHER
,
3777 ind_levels
, is_set_dest
);
3780 register int regno
= REGNO (recog_operand
[i
]);
3781 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3782 recog_operand
[i
] = *recog_operand_loc
[i
]
3783 = reg_equiv_constant
[regno
];
3784 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3785 that feeds this insn. */
3786 if (reg_equiv_mem
[regno
] != 0)
3787 recog_operand
[i
] = *recog_operand_loc
[i
]
3788 = reg_equiv_mem
[regno
];
3793 /* Perhaps an output reload can be combined with another
3794 to reduce needs by one. */
3795 if (!goal_earlyclobber
)
3797 #endif /* no REGISTER_CONSTRAINTS */
3800 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3801 accepts a memory operand with constant address. */
3804 alternative_allows_memconst (constraint
, altnum
)
3809 /* Skip alternatives before the one requested. */
3812 while (*constraint
++ != ',');
3815 /* Scan the requested alternative for 'm' or 'o'.
3816 If one of them is present, this alternative accepts memory constants. */
3817 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
3818 if (c
== 'm' || c
== 'o')
3823 /* Scan X for memory references and scan the addresses for reloading.
3824 Also checks for references to "constant" regs that we want to eliminate
3825 and replaces them with the values they stand for.
3826 We may alter X destructively if it contains a reference to such.
3827 If X is just a constant reg, we return the equivalent value
3830 IND_LEVELS says how many levels of indirect addressing this machine
3833 OPNUM and TYPE identify the purpose of the reload.
3835 IS_SET_DEST is true if X is the destination of a SET, which is not
3836 appropriate to be replaced by a constant. */
3839 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
)
3842 enum reload_type type
;
3846 register RTX_CODE code
= GET_CODE (x
);
3848 register char *fmt
= GET_RTX_FORMAT (code
);
3853 /* This code is duplicated for speed in find_reloads. */
3854 register int regno
= REGNO (x
);
3855 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3856 x
= reg_equiv_constant
[regno
];
3858 /* This creates (subreg (mem...)) which would cause an unnecessary
3859 reload of the mem. */
3860 else if (reg_equiv_mem
[regno
] != 0)
3861 x
= reg_equiv_mem
[regno
];
3863 else if (reg_equiv_address
[regno
] != 0)
3865 /* If reg_equiv_address varies, it may be shared, so copy it. */
3866 rtx addr
= reg_equiv_address
[regno
];
3868 if (rtx_varies_p (addr
))
3869 addr
= copy_rtx (addr
);
3871 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
3872 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3873 find_reloads_address (GET_MODE (x
), NULL_PTR
,
3875 &XEXP (x
, 0), opnum
, type
, ind_levels
);
3882 find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
3883 opnum
, type
, ind_levels
);
3887 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
3889 /* Check for SUBREG containing a REG that's equivalent to a constant.
3890 If the constant has a known value, truncate it right now.
3891 Similarly if we are extracting a single-word of a multi-word
3892 constant. If the constant is symbolic, allow it to be substituted
3893 normally. push_reload will strip the subreg later. If the
3894 constant is VOIDmode, abort because we will lose the mode of
3895 the register (this should never happen because one of the cases
3896 above should handle it). */
3898 register int regno
= REGNO (SUBREG_REG (x
));
3901 if (subreg_lowpart_p (x
)
3902 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3903 && reg_equiv_constant
[regno
] != 0
3904 && (tem
= gen_lowpart_common (GET_MODE (x
),
3905 reg_equiv_constant
[regno
])) != 0)
3908 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
3909 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3910 && reg_equiv_constant
[regno
] != 0
3911 && (tem
= operand_subword (reg_equiv_constant
[regno
],
3913 GET_MODE (SUBREG_REG (x
)))) != 0)
3916 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3917 && reg_equiv_constant
[regno
] != 0
3918 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
3921 /* If the subreg contains a reg that will be converted to a mem,
3922 convert the subreg to a narrower memref now.
3923 Otherwise, we would get (subreg (mem ...) ...),
3924 which would force reload of the mem.
3926 We also need to do this if there is an equivalent MEM that is
3927 not offsettable. In that case, alter_subreg would produce an
3928 invalid address on big-endian machines.
3930 For machines that extend byte loads, we must not reload using
3931 a wider mode if we have a paradoxical SUBREG. find_reloads will
3932 force a reload in that case. So we should not do anything here. */
3934 else if (regno
>= FIRST_PSEUDO_REGISTER
3935 #ifdef LOAD_EXTEND_OP
3936 && (GET_MODE_SIZE (GET_MODE (x
))
3937 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
3939 && (reg_equiv_address
[regno
] != 0
3940 || (reg_equiv_mem
[regno
] != 0
3941 && (! strict_memory_address_p (GET_MODE (x
),
3942 XEXP (reg_equiv_mem
[regno
], 0))
3943 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))))
3945 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
3946 rtx addr
= (reg_equiv_address
[regno
] ? reg_equiv_address
[regno
]
3947 : XEXP (reg_equiv_mem
[regno
], 0));
3948 if (BYTES_BIG_ENDIAN
)
3951 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
3952 offset
+= MIN (size
, UNITS_PER_WORD
);
3953 size
= GET_MODE_SIZE (GET_MODE (x
));
3954 offset
-= MIN (size
, UNITS_PER_WORD
);
3956 addr
= plus_constant (addr
, offset
);
3957 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
3958 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3959 find_reloads_address (GET_MODE (x
), NULL_PTR
,
3961 &XEXP (x
, 0), opnum
, type
, ind_levels
);
3966 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3969 XEXP (x
, i
) = find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
3970 ind_levels
, is_set_dest
);
3975 /* Return a mem ref for the memory equivalent of reg REGNO.
3976 This mem ref is not shared with anything. */
3979 make_memloc (ad
, regno
)
3984 rtx tem
= reg_equiv_address
[regno
];
3986 #if 0 /* We cannot safely reuse a memloc made here;
3987 if the pseudo appears twice, and its mem needs a reload,
3988 it gets two separate reloads assigned, but it only
3989 gets substituted with the second of them;
3990 then it can get used before that reload reg gets loaded up. */
3991 for (i
= 0; i
< n_memlocs
; i
++)
3992 if (rtx_equal_p (tem
, XEXP (memlocs
[i
], 0)))
3996 /* If TEM might contain a pseudo, we must copy it to avoid
3997 modifying it when we do the substitution for the reload. */
3998 if (rtx_varies_p (tem
))
3999 tem
= copy_rtx (tem
);
4001 tem
= gen_rtx (MEM
, GET_MODE (ad
), tem
);
4002 RTX_UNCHANGING_P (tem
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
4003 memlocs
[n_memlocs
++] = tem
;
4007 /* Record all reloads needed for handling memory address AD
4008 which appears in *LOC in a memory reference to mode MODE
4009 which itself is found in location *MEMREFLOC.
4010 Note that we take shortcuts assuming that no multi-reg machine mode
4011 occurs as part of an address.
4013 OPNUM and TYPE specify the purpose of this reload.
4015 IND_LEVELS says how many levels of indirect addressing this machine
4018 Value is nonzero if this address is reloaded or replaced as a whole.
4019 This is interesting to the caller if the address is an autoincrement.
4021 Note that there is no verification that the address will be valid after
4022 this routine does its work. Instead, we rely on the fact that the address
4023 was valid when reload started. So we need only undo things that reload
4024 could have broken. These are wrong register types, pseudos not allocated
4025 to a hard register, and frame pointer elimination. */
4028 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
)
4029 enum machine_mode mode
;
4034 enum reload_type type
;
4040 /* If the address is a register, see if it is a legitimate address and
4041 reload if not. We first handle the cases where we need not reload
4042 or where we must reload in a non-standard way. */
4044 if (GET_CODE (ad
) == REG
)
4048 if (reg_equiv_constant
[regno
] != 0
4049 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
4051 *loc
= ad
= reg_equiv_constant
[regno
];
4055 else if (reg_equiv_address
[regno
] != 0)
4057 tem
= make_memloc (ad
, regno
);
4058 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
4059 &XEXP (tem
, 0), opnum
, type
, ind_levels
);
4060 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4061 GET_MODE (ad
), VOIDmode
, 0, 0,
4066 /* We can avoid a reload if the register's equivalent memory expression
4067 is valid as an indirect memory address.
4068 But not all addresses are valid in a mem used as an indirect address:
4069 only reg or reg+constant. */
4071 else if (reg_equiv_mem
[regno
] != 0 && ind_levels
> 0
4072 && strict_memory_address_p (mode
, reg_equiv_mem
[regno
])
4073 && (GET_CODE (XEXP (reg_equiv_mem
[regno
], 0)) == REG
4074 || (GET_CODE (XEXP (reg_equiv_mem
[regno
], 0)) == PLUS
4075 && GET_CODE (XEXP (XEXP (reg_equiv_mem
[regno
], 0), 0)) == REG
4076 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem
[regno
], 0), 1)))))
4079 /* The only remaining case where we can avoid a reload is if this is a
4080 hard register that is valid as a base register and which is not the
4081 subject of a CLOBBER in this insn. */
4083 else if (regno
< FIRST_PSEUDO_REGISTER
&& REGNO_OK_FOR_BASE_P (regno
)
4084 && ! regno_clobbered_p (regno
, this_insn
))
4087 /* If we do not have one of the cases above, we must do the reload. */
4088 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4089 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4093 if (strict_memory_address_p (mode
, ad
))
4095 /* The address appears valid, so reloads are not needed.
4096 But the address may contain an eliminable register.
4097 This can happen because a machine with indirect addressing
4098 may consider a pseudo register by itself a valid address even when
4099 it has failed to get a hard reg.
4100 So do a tree-walk to find and eliminate all such regs. */
4102 /* But first quickly dispose of a common case. */
4103 if (GET_CODE (ad
) == PLUS
4104 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4105 && GET_CODE (XEXP (ad
, 0)) == REG
4106 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4109 subst_reg_equivs_changed
= 0;
4110 *loc
= subst_reg_equivs (ad
);
4112 if (! subst_reg_equivs_changed
)
4115 /* Check result for validity after substitution. */
4116 if (strict_memory_address_p (mode
, ad
))
4120 /* The address is not valid. We have to figure out why. One possibility
4121 is that it is itself a MEM. This can happen when the frame pointer is
4122 being eliminated, a pseudo is not allocated to a hard register, and the
4123 offset between the frame and stack pointers is not its initial value.
4124 In that case the pseudo will have been replaced by a MEM referring to
4125 the stack pointer. */
4126 if (GET_CODE (ad
) == MEM
)
4128 /* First ensure that the address in this MEM is valid. Then, unless
4129 indirect addresses are valid, reload the MEM into a register. */
4131 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4132 opnum
, type
, ind_levels
== 0 ? 0 : ind_levels
- 1);
4134 /* If tem was changed, then we must create a new memory reference to
4135 hold it and store it back into memrefloc. */
4136 if (tem
!= ad
&& memrefloc
)
4138 *memrefloc
= copy_rtx (*memrefloc
);
4139 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4140 loc
= &XEXP (*memrefloc
, 0);
4143 /* Check similar cases as for indirect addresses as above except
4144 that we can allow pseudos and a MEM since they should have been
4145 taken care of above. */
4148 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4149 || GET_CODE (XEXP (tem
, 0)) == MEM
4150 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4151 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4152 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4153 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4155 /* Must use TEM here, not AD, since it is the one that will
4156 have any subexpressions reloaded, if needed. */
4157 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4158 BASE_REG_CLASS
, GET_MODE (tem
), VOIDmode
, 0,
4166 /* If we have address of a stack slot but it's not valid
4167 (displacement is too large), compute the sum in a register. */
4168 else if (GET_CODE (ad
) == PLUS
4169 && (XEXP (ad
, 0) == frame_pointer_rtx
4170 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4171 || XEXP (ad
, 0) == hard_frame_pointer_rtx
4173 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4174 || XEXP (ad
, 0) == arg_pointer_rtx
4176 || XEXP (ad
, 0) == stack_pointer_rtx
)
4177 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4179 /* Unshare the MEM rtx so we can safely alter it. */
4182 *memrefloc
= copy_rtx (*memrefloc
);
4183 loc
= &XEXP (*memrefloc
, 0);
4185 if (double_reg_address_ok
)
4187 /* Unshare the sum as well. */
4188 *loc
= ad
= copy_rtx (ad
);
4189 /* Reload the displacement into an index reg.
4190 We assume the frame pointer or arg pointer is a base reg. */
4191 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4192 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4197 /* If the sum of two regs is not necessarily valid,
4198 reload the sum into a base reg.
4199 That will at least work. */
4200 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
,
4201 opnum
, type
, ind_levels
);
4206 /* If we have an indexed stack slot, there are three possible reasons why
4207 it might be invalid: The index might need to be reloaded, the address
4208 might have been made by frame pointer elimination and hence have a
4209 constant out of range, or both reasons might apply.
4211 We can easily check for an index needing reload, but even if that is the
4212 case, we might also have an invalid constant. To avoid making the
4213 conservative assumption and requiring two reloads, we see if this address
4214 is valid when not interpreted strictly. If it is, the only problem is
4215 that the index needs a reload and find_reloads_address_1 will take care
4218 There is still a case when we might generate an extra reload,
4219 however. In certain cases eliminate_regs will return a MEM for a REG
4220 (see the code there for details). In those cases, memory_address_p
4221 applied to our address will return 0 so we will think that our offset
4222 must be too large. But it might indeed be valid and the only problem
4223 is that a MEM is present where a REG should be. This case should be
4224 very rare and there doesn't seem to be any way to avoid it.
4226 If we decide to do something here, it must be that
4227 `double_reg_address_ok' is true and that this address rtl was made by
4228 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4229 rework the sum so that the reload register will be added to the index.
4230 This is safe because we know the address isn't shared.
4232 We check for fp/ap/sp as both the first and second operand of the
4235 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4236 && GET_CODE (XEXP (ad
, 0)) == PLUS
4237 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4238 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4239 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4241 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4242 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4244 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4245 && ! memory_address_p (mode
, ad
))
4247 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4248 plus_constant (XEXP (XEXP (ad
, 0), 0),
4249 INTVAL (XEXP (ad
, 1))),
4250 XEXP (XEXP (ad
, 0), 1));
4251 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4252 GET_MODE (ad
), opnum
, type
, ind_levels
);
4253 find_reloads_address_1 (XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
, type
, 0);
4258 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4259 && GET_CODE (XEXP (ad
, 0)) == PLUS
4260 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4261 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4262 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4264 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4265 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4267 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4268 && ! memory_address_p (mode
, ad
))
4270 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4271 XEXP (XEXP (ad
, 0), 0),
4272 plus_constant (XEXP (XEXP (ad
, 0), 1),
4273 INTVAL (XEXP (ad
, 1))));
4274 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1), BASE_REG_CLASS
,
4275 GET_MODE (ad
), opnum
, type
, ind_levels
);
4276 find_reloads_address_1 (XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
, type
, 0);
4281 /* See if address becomes valid when an eliminable register
4282 in a sum is replaced. */
4285 if (GET_CODE (ad
) == PLUS
)
4286 tem
= subst_indexed_address (ad
);
4287 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4289 /* Ok, we win that way. Replace any additional eliminable
4292 subst_reg_equivs_changed
= 0;
4293 tem
= subst_reg_equivs (tem
);
4295 /* Make sure that didn't make the address invalid again. */
4297 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4304 /* If constants aren't valid addresses, reload the constant address
4306 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4308 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4309 Unshare it so we can safely alter it. */
4310 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4311 && CONSTANT_POOL_ADDRESS_P (ad
))
4313 *memrefloc
= copy_rtx (*memrefloc
);
4314 loc
= &XEXP (*memrefloc
, 0);
4317 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4322 return find_reloads_address_1 (ad
, 0, loc
, opnum
, type
, ind_levels
);
4325 /* Find all pseudo regs appearing in AD
4326 that are eliminable in favor of equivalent values
4327 and do not have hard regs; replace them by their equivalents. */
4330 subst_reg_equivs (ad
)
4333 register RTX_CODE code
= GET_CODE (ad
);
4351 register int regno
= REGNO (ad
);
4353 if (reg_equiv_constant
[regno
] != 0)
4355 subst_reg_equivs_changed
= 1;
4356 return reg_equiv_constant
[regno
];
4362 /* Quickly dispose of a common case. */
4363 if (XEXP (ad
, 0) == frame_pointer_rtx
4364 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4368 fmt
= GET_RTX_FORMAT (code
);
4369 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4371 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
));
4375 /* Compute the sum of X and Y, making canonicalizations assumed in an
4376 address, namely: sum constant integers, surround the sum of two
4377 constants with a CONST, put the constant as the second operand, and
4378 group the constant on the outermost sum.
4380 This routine assumes both inputs are already in canonical form. */
4387 enum machine_mode mode
= GET_MODE (x
);
4389 if (mode
== VOIDmode
)
4390 mode
= GET_MODE (y
);
4392 if (mode
== VOIDmode
)
4395 if (GET_CODE (x
) == CONST_INT
)
4396 return plus_constant (y
, INTVAL (x
));
4397 else if (GET_CODE (y
) == CONST_INT
)
4398 return plus_constant (x
, INTVAL (y
));
4399 else if (CONSTANT_P (x
))
4400 tem
= x
, x
= y
, y
= tem
;
4402 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4403 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4405 /* Note that if the operands of Y are specified in the opposite
4406 order in the recursive calls below, infinite recursion will occur. */
4407 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4408 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4410 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4411 constant will have been placed second. */
4412 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4414 if (GET_CODE (x
) == CONST
)
4416 if (GET_CODE (y
) == CONST
)
4419 return gen_rtx (CONST
, VOIDmode
, gen_rtx (PLUS
, mode
, x
, y
));
4422 return gen_rtx (PLUS
, mode
, x
, y
);
4425 /* If ADDR is a sum containing a pseudo register that should be
4426 replaced with a constant (from reg_equiv_constant),
4427 return the result of doing so, and also apply the associative
4428 law so that the result is more likely to be a valid address.
4429 (But it is not guaranteed to be one.)
4431 Note that at most one register is replaced, even if more are
4432 replaceable. Also, we try to put the result into a canonical form
4433 so it is more likely to be a valid address.
4435 In all other cases, return ADDR. */
4438 subst_indexed_address (addr
)
4441 rtx op0
= 0, op1
= 0, op2
= 0;
4445 if (GET_CODE (addr
) == PLUS
)
4447 /* Try to find a register to replace. */
4448 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4449 if (GET_CODE (op0
) == REG
4450 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4451 && reg_renumber
[regno
] < 0
4452 && reg_equiv_constant
[regno
] != 0)
4453 op0
= reg_equiv_constant
[regno
];
4454 else if (GET_CODE (op1
) == REG
4455 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4456 && reg_renumber
[regno
] < 0
4457 && reg_equiv_constant
[regno
] != 0)
4458 op1
= reg_equiv_constant
[regno
];
4459 else if (GET_CODE (op0
) == PLUS
4460 && (tem
= subst_indexed_address (op0
)) != op0
)
4462 else if (GET_CODE (op1
) == PLUS
4463 && (tem
= subst_indexed_address (op1
)) != op1
)
4468 /* Pick out up to three things to add. */
4469 if (GET_CODE (op1
) == PLUS
)
4470 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4471 else if (GET_CODE (op0
) == PLUS
)
4472 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4474 /* Compute the sum. */
4476 op1
= form_sum (op1
, op2
);
4478 op0
= form_sum (op0
, op1
);
4485 /* Record the pseudo registers we must reload into hard registers
4486 in a subexpression of a would-be memory address, X.
4487 (This function is not called if the address we find is strictly valid.)
4488 CONTEXT = 1 means we are considering regs as index regs,
4489 = 0 means we are considering them as base regs.
4491 OPNUM and TYPE specify the purpose of any reloads made.
4493 IND_LEVELS says how many levels of indirect addressing are
4494 supported at this point in the address.
4496 We return nonzero if X, as a whole, is reloaded or replaced. */
4498 /* Note that we take shortcuts assuming that no multi-reg machine mode
4499 occurs as part of an address.
4500 Also, this is not fully machine-customizable; it works for machines
4501 such as vaxes and 68000's and 32000's, but other possible machines
4502 could have addressing modes that this does not handle right. */
4505 find_reloads_address_1 (x
, context
, loc
, opnum
, type
, ind_levels
)
4510 enum reload_type type
;
4513 register RTX_CODE code
= GET_CODE (x
);
4519 register rtx orig_op0
= XEXP (x
, 0);
4520 register rtx orig_op1
= XEXP (x
, 1);
4521 register RTX_CODE code0
= GET_CODE (orig_op0
);
4522 register RTX_CODE code1
= GET_CODE (orig_op1
);
4523 register rtx op0
= orig_op0
;
4524 register rtx op1
= orig_op1
;
4526 if (GET_CODE (op0
) == SUBREG
)
4528 op0
= SUBREG_REG (op0
);
4529 code0
= GET_CODE (op0
);
4532 if (GET_CODE (op1
) == SUBREG
)
4534 op1
= SUBREG_REG (op1
);
4535 code1
= GET_CODE (op1
);
4538 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
4539 || code0
== ZERO_EXTEND
|| code1
== MEM
)
4541 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4543 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4547 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
4548 || code1
== ZERO_EXTEND
|| code0
== MEM
)
4550 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4552 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4556 else if (code0
== CONST_INT
|| code0
== CONST
4557 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
4558 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4561 else if (code1
== CONST_INT
|| code1
== CONST
4562 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
4563 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4566 else if (code0
== REG
&& code1
== REG
)
4568 if (REG_OK_FOR_INDEX_P (op0
)
4569 && REG_OK_FOR_BASE_P (op1
))
4571 else if (REG_OK_FOR_INDEX_P (op1
)
4572 && REG_OK_FOR_BASE_P (op0
))
4574 else if (REG_OK_FOR_BASE_P (op1
))
4575 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4577 else if (REG_OK_FOR_BASE_P (op0
))
4578 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4580 else if (REG_OK_FOR_INDEX_P (op1
))
4581 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4583 else if (REG_OK_FOR_INDEX_P (op0
))
4584 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4588 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4590 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4595 else if (code0
== REG
)
4597 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4599 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4603 else if (code1
== REG
)
4605 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4607 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4618 if (GET_CODE (XEXP (x
, 0)) == REG
)
4620 register int regno
= REGNO (XEXP (x
, 0));
4624 /* A register that is incremented cannot be constant! */
4625 if (regno
>= FIRST_PSEUDO_REGISTER
4626 && reg_equiv_constant
[regno
] != 0)
4629 /* Handle a register that is equivalent to a memory location
4630 which cannot be addressed directly. */
4631 if (reg_equiv_address
[regno
] != 0)
4633 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
4634 /* First reload the memory location's address. */
4635 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
4636 &XEXP (tem
, 0), opnum
, type
, ind_levels
);
4637 /* Put this inside a new increment-expression. */
4638 x
= gen_rtx (GET_CODE (x
), GET_MODE (x
), tem
);
4639 /* Proceed to reload that, as if it contained a register. */
4642 /* If we have a hard register that is ok as an index,
4643 don't make a reload. If an autoincrement of a nice register
4644 isn't "valid", it must be that no autoincrement is "valid".
4645 If that is true and something made an autoincrement anyway,
4646 this must be a special context where one is allowed.
4647 (For example, a "push" instruction.)
4648 We can't improve this address, so leave it alone. */
4650 /* Otherwise, reload the autoincrement into a suitable hard reg
4651 and record how much to increment by. */
4653 if (reg_renumber
[regno
] >= 0)
4654 regno
= reg_renumber
[regno
];
4655 if ((regno
>= FIRST_PSEUDO_REGISTER
4656 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4657 : REGNO_OK_FOR_BASE_P (regno
))))
4662 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4663 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4664 GET_MODE (x
), GET_MODE (x
), VOIDmode
, 0,
4666 reload_inc
[reloadnum
]
4667 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
4672 /* Update the REG_INC notes. */
4674 for (link
= REG_NOTES (this_insn
);
4675 link
; link
= XEXP (link
, 1))
4676 if (REG_NOTE_KIND (link
) == REG_INC
4677 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
4678 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4684 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
4686 /* This is probably the result of a substitution, by eliminate_regs,
4687 of an equivalent address for a pseudo that was not allocated to a
4688 hard register. Verify that the specified address is valid and
4689 reload it into a register. */
4690 rtx tem
= XEXP (x
, 0);
4694 /* Since we know we are going to reload this item, don't decrement
4695 for the indirection level.
4697 Note that this is actually conservative: it would be slightly
4698 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4700 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
4701 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
4702 opnum
, type
, ind_levels
);
4704 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4705 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4706 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4707 reload_inc
[reloadnum
]
4708 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
4710 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
4712 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4719 /* This is probably the result of a substitution, by eliminate_regs, of
4720 an equivalent address for a pseudo that was not allocated to a hard
4721 register. Verify that the specified address is valid and reload it
4724 Since we know we are going to reload this item, don't decrement for
4725 the indirection level.
4727 Note that this is actually conservative: it would be slightly more
4728 efficient to use the value of SPILL_INDIRECT_LEVELS from
4731 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
4732 opnum
, type
, ind_levels
);
4733 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
4734 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4735 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4740 register int regno
= REGNO (x
);
4742 if (reg_equiv_constant
[regno
] != 0)
4744 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
4745 (context
? INDEX_REG_CLASS
4747 GET_MODE (x
), opnum
, type
, ind_levels
);
4751 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4752 that feeds this insn. */
4753 if (reg_equiv_mem
[regno
] != 0)
4755 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
4756 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4757 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4762 if (reg_equiv_address
[regno
] != 0)
4764 x
= make_memloc (x
, regno
);
4765 find_reloads_address (GET_MODE (x
), 0, XEXP (x
, 0), &XEXP (x
, 0),
4766 opnum
, type
, ind_levels
);
4769 if (reg_renumber
[regno
] >= 0)
4770 regno
= reg_renumber
[regno
];
4772 if ((regno
>= FIRST_PSEUDO_REGISTER
4773 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4774 : REGNO_OK_FOR_BASE_P (regno
))))
4776 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4777 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4778 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4782 /* If a register appearing in an address is the subject of a CLOBBER
4783 in this insn, reload it into some other register to be safe.
4784 The CLOBBER is supposed to make the register unavailable
4785 from before this insn to after it. */
4786 if (regno_clobbered_p (regno
, this_insn
))
4788 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4789 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4790 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4797 /* If this is a SUBREG of a hard register and the resulting register is
4798 of the wrong class, reload the whole SUBREG. This avoids needless
4799 copies if SUBREG_REG is multi-word. */
4800 if (GET_CODE (SUBREG_REG (x
)) == REG
4801 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
4803 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
4805 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
4806 : REGNO_OK_FOR_BASE_P (regno
)))
4808 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4809 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4810 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4818 register char *fmt
= GET_RTX_FORMAT (code
);
4821 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4824 find_reloads_address_1 (XEXP (x
, i
), context
, &XEXP (x
, i
),
4825 opnum
, type
, ind_levels
);
4832 /* X, which is found at *LOC, is a part of an address that needs to be
4833 reloaded into a register of class CLASS. If X is a constant, or if
4834 X is a PLUS that contains a constant, check that the constant is a
4835 legitimate operand and that we are supposed to be able to load
4836 it into the register.
4838 If not, force the constant into memory and reload the MEM instead.
4840 MODE is the mode to use, in case X is an integer constant.
4842 OPNUM and TYPE describe the purpose of any reloads made.
4844 IND_LEVELS says how many levels of indirect addressing this machine
4848 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
4851 enum reg_class
class;
4852 enum machine_mode mode
;
4854 enum reload_type type
;
4858 && (! LEGITIMATE_CONSTANT_P (x
)
4859 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
4861 rtx tem
= x
= force_const_mem (mode
, x
);
4862 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
4863 opnum
, type
, ind_levels
);
4866 else if (GET_CODE (x
) == PLUS
4867 && CONSTANT_P (XEXP (x
, 1))
4868 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
4869 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
4871 rtx tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
4873 x
= gen_rtx (PLUS
, GET_MODE (x
), XEXP (x
, 0), tem
);
4874 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
4875 opnum
, type
, ind_levels
);
4878 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
4879 mode
, VOIDmode
, 0, 0, opnum
, type
);
4882 /* Substitute into the current INSN the registers into which we have reloaded
4883 the things that need reloading. The array `replacements'
4884 says contains the locations of all pointers that must be changed
4885 and says what to replace them with.
4887 Return the rtx that X translates into; usually X, but modified. */
4894 for (i
= 0; i
< n_replacements
; i
++)
4896 register struct replacement
*r
= &replacements
[i
];
4897 register rtx reloadreg
= reload_reg_rtx
[r
->what
];
4900 /* Encapsulate RELOADREG so its machine mode matches what
4901 used to be there. Note that gen_lowpart_common will
4902 do the wrong thing if RELOADREG is multi-word. RELOADREG
4903 will always be a REG here. */
4904 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
4905 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
4907 /* If we are putting this into a SUBREG and RELOADREG is a
4908 SUBREG, we would be making nested SUBREGs, so we have to fix
4909 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4911 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
4913 if (GET_MODE (*r
->subreg_loc
)
4914 == GET_MODE (SUBREG_REG (reloadreg
)))
4915 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
4918 *r
->where
= SUBREG_REG (reloadreg
);
4919 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
4923 *r
->where
= reloadreg
;
4925 /* If reload got no reg and isn't optional, something's wrong. */
4926 else if (! reload_optional
[r
->what
])
4931 /* Make a copy of any replacements being done into X and move those copies
4932 to locations in Y, a copy of X. We only look at the highest level of
4936 copy_replacements (x
, y
)
4941 enum rtx_code code
= GET_CODE (x
);
4942 char *fmt
= GET_RTX_FORMAT (code
);
4943 struct replacement
*r
;
4945 /* We can't support X being a SUBREG because we might then need to know its
4946 location if something inside it was replaced. */
4950 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4952 for (j
= 0; j
< n_replacements
; j
++)
4954 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
4956 r
= &replacements
[n_replacements
++];
4957 r
->where
= replacements
[j
].where
;
4958 r
->subreg_loc
= &XEXP (y
, i
);
4959 r
->what
= replacements
[j
].what
;
4960 r
->mode
= replacements
[j
].mode
;
4962 else if (replacements
[j
].where
== &XEXP (x
, i
))
4964 r
= &replacements
[n_replacements
++];
4965 r
->where
= &XEXP (y
, i
);
4967 r
->what
= replacements
[j
].what
;
4968 r
->mode
= replacements
[j
].mode
;
4973 /* If LOC was scheduled to be replaced by something, return the replacement.
4974 Otherwise, return *LOC. */
4977 find_replacement (loc
)
4980 struct replacement
*r
;
4982 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
4984 rtx reloadreg
= reload_reg_rtx
[r
->what
];
4986 if (reloadreg
&& r
->where
== loc
)
4988 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
4989 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
4993 else if (reloadreg
&& r
->subreg_loc
== loc
)
4995 /* RELOADREG must be either a REG or a SUBREG.
4997 ??? Is it actually still ever a SUBREG? If so, why? */
4999 if (GET_CODE (reloadreg
) == REG
)
5000 return gen_rtx (REG
, GET_MODE (*loc
),
5001 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
5002 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
5005 return gen_rtx (SUBREG
, GET_MODE (*loc
), SUBREG_REG (reloadreg
),
5006 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
5013 /* Return nonzero if register in range [REGNO, ENDREGNO)
5014 appears either explicitly or implicitly in X
5015 other than being stored into (except for earlyclobber operands).
5017 References contained within the substructure at LOC do not count.
5018 LOC may be zero, meaning don't ignore anything.
5020 This is similar to refers_to_regno_p in rtlanal.c except that we
5021 look at equivalences for pseudos that didn't get hard registers. */
5024 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
5025 int regno
, endregno
;
5030 register RTX_CODE code
;
5037 code
= GET_CODE (x
);
5044 /* If this is a pseudo, a hard register must not have been allocated.
5045 X must therefore either be a constant or be in memory. */
5046 if (i
>= FIRST_PSEUDO_REGISTER
)
5048 if (reg_equiv_memory_loc
[i
])
5049 return refers_to_regno_for_reload_p (regno
, endregno
,
5050 reg_equiv_memory_loc
[i
],
5053 if (reg_equiv_constant
[i
])
5059 return (endregno
> i
5060 && regno
< i
+ (i
< FIRST_PSEUDO_REGISTER
5061 ? HARD_REGNO_NREGS (i
, GET_MODE (x
))
5065 /* If this is a SUBREG of a hard reg, we can see exactly which
5066 registers are being modified. Otherwise, handle normally. */
5067 if (GET_CODE (SUBREG_REG (x
)) == REG
5068 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5070 int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5072 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
5073 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5075 return endregno
> inner_regno
&& regno
< inner_endregno
;
5081 if (&SET_DEST (x
) != loc
5082 /* Note setting a SUBREG counts as referring to the REG it is in for
5083 a pseudo but not for hard registers since we can
5084 treat each word individually. */
5085 && ((GET_CODE (SET_DEST (x
)) == SUBREG
5086 && loc
!= &SUBREG_REG (SET_DEST (x
))
5087 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
5088 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
5089 && refers_to_regno_for_reload_p (regno
, endregno
,
5090 SUBREG_REG (SET_DEST (x
)),
5092 /* If the ouput is an earlyclobber operand, this is
5094 || ((GET_CODE (SET_DEST (x
)) != REG
5095 || earlyclobber_operand_p (SET_DEST (x
)))
5096 && refers_to_regno_for_reload_p (regno
, endregno
,
5097 SET_DEST (x
), loc
))))
5100 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
5106 /* X does not match, so try its subexpressions. */
5108 fmt
= GET_RTX_FORMAT (code
);
5109 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5111 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
5119 if (refers_to_regno_for_reload_p (regno
, endregno
,
5123 else if (fmt
[i
] == 'E')
5126 for (j
= XVECLEN (x
, i
) - 1; j
>=0; j
--)
5127 if (loc
!= &XVECEXP (x
, i
, j
)
5128 && refers_to_regno_for_reload_p (regno
, endregno
,
5129 XVECEXP (x
, i
, j
), loc
))
5136 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5137 we check if any register number in X conflicts with the relevant register
5138 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5139 contains a MEM (we don't bother checking for memory addresses that can't
5140 conflict because we expect this to be a rare case.
5142 This function is similar to reg_overlap_mention_p in rtlanal.c except
5143 that we look at equivalences for pseudos that didn't get hard registers. */
5146 reg_overlap_mentioned_for_reload_p (x
, in
)
5149 int regno
, endregno
;
5151 if (GET_CODE (x
) == SUBREG
)
5153 regno
= REGNO (SUBREG_REG (x
));
5154 if (regno
< FIRST_PSEUDO_REGISTER
)
5155 regno
+= SUBREG_WORD (x
);
5157 else if (GET_CODE (x
) == REG
)
5161 /* If this is a pseudo, it must not have been assigned a hard register.
5162 Therefore, it must either be in memory or be a constant. */
5164 if (regno
>= FIRST_PSEUDO_REGISTER
)
5166 if (reg_equiv_memory_loc
[regno
])
5167 return refers_to_mem_for_reload_p (in
);
5168 else if (reg_equiv_constant
[regno
])
5173 else if (CONSTANT_P (x
))
5175 else if (GET_CODE (x
) == MEM
)
5176 return refers_to_mem_for_reload_p (in
);
5177 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
5178 || GET_CODE (x
) == CC0
)
5179 return reg_mentioned_p (x
, in
);
5183 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
5184 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5186 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
5189 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5193 refers_to_mem_for_reload_p (x
)
5199 if (GET_CODE (x
) == MEM
)
5202 if (GET_CODE (x
) == REG
)
5203 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
5204 && reg_equiv_memory_loc
[REGNO (x
)]);
5206 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
5207 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
5209 && (GET_CODE (XEXP (x
, i
)) == MEM
5210 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
5216 /* Check the insns before INSN to see if there is a suitable register
5217 containing the same value as GOAL.
5218 If OTHER is -1, look for a register in class CLASS.
5219 Otherwise, just see if register number OTHER shares GOAL's value.
5221 Return an rtx for the register found, or zero if none is found.
5223 If RELOAD_REG_P is (short *)1,
5224 we reject any hard reg that appears in reload_reg_rtx
5225 because such a hard reg is also needed coming into this insn.
5227 If RELOAD_REG_P is any other nonzero value,
5228 it is a vector indexed by hard reg number
5229 and we reject any hard reg whose element in the vector is nonnegative
5230 as well as any that appears in reload_reg_rtx.
5232 If GOAL is zero, then GOALREG is a register number; we look
5233 for an equivalent for that register.
5235 MODE is the machine mode of the value we want an equivalence for.
5236 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5238 This function is used by jump.c as well as in the reload pass.
5240 If GOAL is the sum of the stack pointer and a constant, we treat it
5241 as if it were a constant except that sp is required to be unchanging. */
5244 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
5247 enum reg_class
class;
5249 short *reload_reg_p
;
5251 enum machine_mode mode
;
5253 register rtx p
= insn
;
5254 rtx goaltry
, valtry
, value
, where
;
5256 register int regno
= -1;
5260 int goal_mem_addr_varies
= 0;
5261 int need_stable_sp
= 0;
5267 else if (GET_CODE (goal
) == REG
)
5268 regno
= REGNO (goal
);
5269 else if (GET_CODE (goal
) == MEM
)
5271 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
5272 if (MEM_VOLATILE_P (goal
))
5274 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
5276 /* An address with side effects must be reexecuted. */
5287 else if (CONSTANT_P (goal
))
5289 else if (GET_CODE (goal
) == PLUS
5290 && XEXP (goal
, 0) == stack_pointer_rtx
5291 && CONSTANT_P (XEXP (goal
, 1)))
5292 goal_const
= need_stable_sp
= 1;
5296 /* On some machines, certain regs must always be rejected
5297 because they don't behave the way ordinary registers do. */
5299 #ifdef OVERLAPPING_REGNO_P
5300 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5301 && OVERLAPPING_REGNO_P (regno
))
5305 /* Scan insns back from INSN, looking for one that copies
5306 a value into or out of GOAL.
5307 Stop and give up if we reach a label. */
5312 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
5314 if (GET_CODE (p
) == INSN
5315 /* If we don't want spill regs ... */
5316 && (! (reload_reg_p
!= 0
5317 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
5318 /* ... then ignore insns introduced by reload; they aren't useful
5319 and can cause results in reload_as_needed to be different
5320 from what they were when calculating the need for spills.
5321 If we notice an input-reload insn here, we will reject it below,
5322 but it might hide a usable equivalent. That makes bad code.
5323 It may even abort: perhaps no reg was spilled for this insn
5324 because it was assumed we would find that equivalent. */
5325 || INSN_UID (p
) < reload_first_uid
))
5328 pat
= single_set (p
);
5329 /* First check for something that sets some reg equal to GOAL. */
5332 && true_regnum (SET_SRC (pat
)) == regno
5333 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5336 && true_regnum (SET_DEST (pat
)) == regno
5337 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
5339 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
5340 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5342 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
5343 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
5345 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
5346 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
5347 /* If we are looking for a constant,
5348 and something equivalent to that constant was copied
5349 into a reg, we can use that reg. */
5350 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5352 && rtx_equal_p (XEXP (tem
, 0), goal
)
5353 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5354 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5356 && GET_CODE (SET_DEST (pat
)) == REG
5357 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5358 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5359 && GET_CODE (goal
) == CONST_INT
5360 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 0, 0,
5362 && rtx_equal_p (goal
, goaltry
)
5363 && (valtry
= operand_subword (SET_DEST (pat
), 0, 0,
5365 && (valueno
= true_regnum (valtry
)) >= 0)
5366 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5368 && GET_CODE (SET_DEST (pat
)) == REG
5369 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5370 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5371 && GET_CODE (goal
) == CONST_INT
5372 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
5374 && rtx_equal_p (goal
, goaltry
)
5376 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
5377 && (valueno
= true_regnum (valtry
)) >= 0)))
5380 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
5381 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
5391 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5392 (or copying VALUE into GOAL, if GOAL is also a register).
5393 Now verify that VALUE is really valid. */
5395 /* VALUENO is the register number of VALUE; a hard register. */
5397 /* Don't try to re-use something that is killed in this insn. We want
5398 to be able to trust REG_UNUSED notes. */
5399 if (find_reg_note (where
, REG_UNUSED
, value
))
5402 /* If we propose to get the value from the stack pointer or if GOAL is
5403 a MEM based on the stack pointer, we need a stable SP. */
5404 if (valueno
== STACK_POINTER_REGNUM
5405 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
5409 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5410 if (GET_MODE (value
) != mode
)
5413 /* Reject VALUE if it was loaded from GOAL
5414 and is also a register that appears in the address of GOAL. */
5416 if (goal_mem
&& value
== SET_DEST (PATTERN (where
))
5417 && refers_to_regno_for_reload_p (valueno
,
5419 + HARD_REGNO_NREGS (valueno
, mode
)),
5423 /* Reject registers that overlap GOAL. */
5425 if (!goal_mem
&& !goal_const
5426 && regno
+ HARD_REGNO_NREGS (regno
, mode
) > valueno
5427 && regno
< valueno
+ HARD_REGNO_NREGS (valueno
, mode
))
5430 /* Reject VALUE if it is one of the regs reserved for reloads.
5431 Reload1 knows how to reuse them anyway, and it would get
5432 confused if we allocated one without its knowledge.
5433 (Now that insns introduced by reload are ignored above,
5434 this case shouldn't happen, but I'm not positive.) */
5436 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1
5437 && reload_reg_p
[valueno
] >= 0)
5440 /* On some machines, certain regs must always be rejected
5441 because they don't behave the way ordinary registers do. */
5443 #ifdef OVERLAPPING_REGNO_P
5444 if (OVERLAPPING_REGNO_P (valueno
))
5448 nregs
= HARD_REGNO_NREGS (regno
, mode
);
5449 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
5451 /* Reject VALUE if it is a register being used for an input reload
5452 even if it is not one of those reserved. */
5454 if (reload_reg_p
!= 0)
5457 for (i
= 0; i
< n_reloads
; i
++)
5458 if (reload_reg_rtx
[i
] != 0 && reload_in
[i
])
5460 int regno1
= REGNO (reload_reg_rtx
[i
]);
5461 int nregs1
= HARD_REGNO_NREGS (regno1
,
5462 GET_MODE (reload_reg_rtx
[i
]));
5463 if (regno1
< valueno
+ valuenregs
5464 && regno1
+ nregs1
> valueno
)
5470 /* We must treat frame pointer as varying here,
5471 since it can vary--in a nonlocal goto as generated by expand_goto. */
5472 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
5474 /* Now verify that the values of GOAL and VALUE remain unaltered
5475 until INSN is reached. */
5484 /* Don't trust the conversion past a function call
5485 if either of the two is in a call-clobbered register, or memory. */
5486 if (GET_CODE (p
) == CALL_INSN
5487 && ((regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5488 && call_used_regs
[regno
])
5490 (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5491 && call_used_regs
[valueno
])
5497 #ifdef INSN_CLOBBERS_REGNO_P
5498 if ((valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5499 && INSN_CLOBBERS_REGNO_P (p
, valueno
))
5500 || (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5501 && INSN_CLOBBERS_REGNO_P (p
, regno
)))
5505 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
5507 /* If this insn P stores in either GOAL or VALUE, return 0.
5508 If GOAL is a memory ref and this insn writes memory, return 0.
5509 If GOAL is a memory ref and its address is not constant,
5510 and this insn P changes a register used in GOAL, return 0. */
5513 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
5515 register rtx dest
= SET_DEST (pat
);
5516 while (GET_CODE (dest
) == SUBREG
5517 || GET_CODE (dest
) == ZERO_EXTRACT
5518 || GET_CODE (dest
) == SIGN_EXTRACT
5519 || GET_CODE (dest
) == STRICT_LOW_PART
)
5520 dest
= XEXP (dest
, 0);
5521 if (GET_CODE (dest
) == REG
)
5523 register int xregno
= REGNO (dest
);
5525 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5526 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5529 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
5531 if (xregno
< valueno
+ valuenregs
5532 && xregno
+ xnregs
> valueno
)
5534 if (goal_mem_addr_varies
5535 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
5538 else if (goal_mem
&& GET_CODE (dest
) == MEM
5539 && ! push_operand (dest
, GET_MODE (dest
)))
5541 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
5544 else if (GET_CODE (pat
) == PARALLEL
)
5547 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
5549 register rtx v1
= XVECEXP (pat
, 0, i
);
5550 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
5552 register rtx dest
= SET_DEST (v1
);
5553 while (GET_CODE (dest
) == SUBREG
5554 || GET_CODE (dest
) == ZERO_EXTRACT
5555 || GET_CODE (dest
) == SIGN_EXTRACT
5556 || GET_CODE (dest
) == STRICT_LOW_PART
)
5557 dest
= XEXP (dest
, 0);
5558 if (GET_CODE (dest
) == REG
)
5560 register int xregno
= REGNO (dest
);
5562 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5563 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5566 if (xregno
< regno
+ nregs
5567 && xregno
+ xnregs
> regno
)
5569 if (xregno
< valueno
+ valuenregs
5570 && xregno
+ xnregs
> valueno
)
5572 if (goal_mem_addr_varies
5573 && reg_overlap_mentioned_for_reload_p (dest
,
5577 else if (goal_mem
&& GET_CODE (dest
) == MEM
5578 && ! push_operand (dest
, GET_MODE (dest
)))
5580 else if (need_stable_sp
5581 && push_operand (dest
, GET_MODE (dest
)))
5587 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
5591 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
5592 link
= XEXP (link
, 1))
5594 pat
= XEXP (link
, 0);
5595 if (GET_CODE (pat
) == CLOBBER
)
5597 register rtx dest
= SET_DEST (pat
);
5598 while (GET_CODE (dest
) == SUBREG
5599 || GET_CODE (dest
) == ZERO_EXTRACT
5600 || GET_CODE (dest
) == SIGN_EXTRACT
5601 || GET_CODE (dest
) == STRICT_LOW_PART
)
5602 dest
= XEXP (dest
, 0);
5603 if (GET_CODE (dest
) == REG
)
5605 register int xregno
= REGNO (dest
);
5607 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5608 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5611 if (xregno
< regno
+ nregs
5612 && xregno
+ xnregs
> regno
)
5614 if (xregno
< valueno
+ valuenregs
5615 && xregno
+ xnregs
> valueno
)
5617 if (goal_mem_addr_varies
5618 && reg_overlap_mentioned_for_reload_p (dest
,
5622 else if (goal_mem
&& GET_CODE (dest
) == MEM
5623 && ! push_operand (dest
, GET_MODE (dest
)))
5625 else if (need_stable_sp
5626 && push_operand (dest
, GET_MODE (dest
)))
5633 /* If this insn auto-increments or auto-decrements
5634 either regno or valueno, return 0 now.
5635 If GOAL is a memory ref and its address is not constant,
5636 and this insn P increments a register used in GOAL, return 0. */
5640 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
5641 if (REG_NOTE_KIND (link
) == REG_INC
5642 && GET_CODE (XEXP (link
, 0)) == REG
)
5644 register int incno
= REGNO (XEXP (link
, 0));
5645 if (incno
< regno
+ nregs
&& incno
>= regno
)
5647 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
5649 if (goal_mem_addr_varies
5650 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
5660 /* Find a place where INCED appears in an increment or decrement operator
5661 within X, and return the amount INCED is incremented or decremented by.
5662 The value is always positive. */
5665 find_inc_amount (x
, inced
)
5668 register enum rtx_code code
= GET_CODE (x
);
5674 register rtx addr
= XEXP (x
, 0);
5675 if ((GET_CODE (addr
) == PRE_DEC
5676 || GET_CODE (addr
) == POST_DEC
5677 || GET_CODE (addr
) == PRE_INC
5678 || GET_CODE (addr
) == POST_INC
)
5679 && XEXP (addr
, 0) == inced
)
5680 return GET_MODE_SIZE (GET_MODE (x
));
5683 fmt
= GET_RTX_FORMAT (code
);
5684 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5688 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
5695 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
5697 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
5707 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5710 regno_clobbered_p (regno
, insn
)
5714 if (GET_CODE (PATTERN (insn
)) == CLOBBER
5715 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
5716 return REGNO (XEXP (PATTERN (insn
), 0)) == regno
;
5718 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
5720 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
5724 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
5725 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
5726 && REGNO (XEXP (elt
, 0)) == regno
)
5734 static char *reload_when_needed_name
[] =
5737 "RELOAD_FOR_OUTPUT",
5739 "RELOAD_FOR_INPUT_ADDRESS",
5740 "RELOAD_FOR_OUTPUT_ADDRESS",
5741 "RELOAD_FOR_OPERAND_ADDRESS",
5742 "RELOAD_FOR_OPADDR_ADDR",
5744 "RELOAD_FOR_OTHER_ADDRESS"
5747 static char *reg_class_names
[] = REG_CLASS_NAMES
;
5749 /* This function is used to print the variables set by 'find_reloads' */
5756 fprintf (stderr
, "\nn_reloads = %d\n", n_reloads
);
5758 for (r
= 0; r
< n_reloads
; r
++)
5760 fprintf (stderr
, "\nRELOAD %d\n", r
);
5764 fprintf (stderr
, "\nreload_in (%s) = ", GET_MODE_NAME(reload_inmode
[r
]));
5765 debug_rtx (reload_in
[r
]);
5770 fprintf (stderr
, "\nreload_out (%s) = ", GET_MODE_NAME (reload_outmode
[r
]));
5771 debug_rtx (reload_out
[r
]);
5774 fprintf (stderr
, "%s, ", reg_class_names
[(int) reload_reg_class
[r
]]);
5776 fprintf (stderr
, "%s (opnum = %d)", reload_when_needed_name
[(int)reload_when_needed
[r
]],
5779 if (reload_optional
[r
])
5780 fprintf (stderr
, ", optional");
5783 fprintf (stderr
, ", inc by %d\n", reload_inc
[r
]);
5785 if (reload_nocombine
[r
])
5786 fprintf (stderr
, ", can combine", reload_nocombine
[r
]);
5788 if (reload_secondary_p
[r
])
5789 fprintf (stderr
, ", secondary_reload_p");
5791 if (reload_in_reg
[r
])
5793 fprintf (stderr
, "\nreload_in_reg:\t\t\t");
5794 debug_rtx (reload_in_reg
[r
]);
5797 if (reload_reg_rtx
[r
])
5799 fprintf (stderr
, "\nreload_reg_rtx:\t\t\t");
5800 debug_rtx (reload_reg_rtx
[r
]);
5803 if (reload_secondary_in_reload
[r
] != -1)
5805 fprintf (stderr
, "\nsecondary_in_reload = ");
5806 fprintf (stderr
, "%d ", reload_secondary_in_reload
[r
]);
5809 if (reload_secondary_out_reload
[r
] != -1)
5811 if (reload_secondary_in_reload
[r
] != -1)
5812 fprintf (stderr
, ", secondary_out_reload = ");
5814 fprintf (stderr
, "\nsecondary_out_reload = ");
5816 fprintf (stderr
, "%d", reload_secondary_out_reload
[r
]);
5820 if (reload_secondary_in_icode
[r
] != CODE_FOR_nothing
)
5822 fprintf (stderr
, "\nsecondary_in_icode = ");
5823 fprintf (stderr
, "%s", insn_name
[r
]);
5826 if (reload_secondary_out_icode
[r
] != CODE_FOR_nothing
)
5828 if (reload_secondary_in_icode
[r
] != CODE_FOR_nothing
)
5829 fprintf (stderr
, ", secondary_out_icode = ");
5831 fprintf (stderr
, "\nsecondary_out_icode = ");
5833 fprintf (stderr
, "%s ", insn_name
[r
]);
5835 fprintf (stderr
, "\n");
5838 fprintf (stderr
, "\n");