1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "insn-config.h"
92 #include "insn-codes.h"
96 #include "hard-reg-set.h"
100 #ifndef REGISTER_MOVE_COST
101 #define REGISTER_MOVE_COST(x, y) 2
104 /* The variables set up by `find_reloads' are:
106 n_reloads number of distinct reloads needed; max reload # + 1
107 tables indexed by reload number
108 reload_in rtx for value to reload from
109 reload_out rtx for where to store reload-reg afterward if nec
110 (often the same as reload_in)
111 reload_reg_class enum reg_class, saying what regs to reload into
112 reload_inmode enum machine_mode; mode this operand should have
113 when reloaded, on input.
114 reload_outmode enum machine_mode; mode this operand should have
115 when reloaded, on output.
116 reload_optional char, nonzero for an optional reload.
117 Optional reloads are ignored unless the
118 value is already sitting in a register.
119 reload_inc int, positive amount to increment or decrement by if
120 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
121 Ignored otherwise (don't assume it is zero).
122 reload_in_reg rtx. A reg for which reload_in is the equivalent.
123 If reload_in is a symbol_ref which came from
124 reg_equiv_constant, then this is the pseudo
125 which has that symbol_ref as equivalent.
126 reload_reg_rtx rtx. This is the register to reload into.
127 If it is zero when `find_reloads' returns,
128 you must find a suitable register in the class
129 specified by reload_reg_class, and store here
130 an rtx for that register with mode from
131 reload_inmode or reload_outmode.
132 reload_nocombine char, nonzero if this reload shouldn't be
133 combined with another reload.
134 reload_opnum int, operand number being reloaded. This is
135 used to group related reloads and need not always
136 be equal to the actual operand number in the insn,
137 though it current will be; for in-out operands, it
138 is one of the two operand numbers.
139 reload_when_needed enum, classifies reload as needed either for
140 addressing an input reload, addressing an output,
141 for addressing a non-reloaded mem ref,
142 or for unspecified purposes (i.e., more than one
144 reload_secondary_reload int, gives the reload number of a secondary
145 reload, when needed; otherwise -1
146 reload_secondary_p int, 1 if this is a secondary register for one
148 reload_secondary_icode enum insn_code, if a secondary reload is required,
149 gives the INSN_CODE that uses the secondary
150 reload as a scratch register, or CODE_FOR_nothing
151 if the secondary reload register is to be an
152 intermediate register. */
155 rtx reload_in
[MAX_RELOADS
];
156 rtx reload_out
[MAX_RELOADS
];
157 enum reg_class reload_reg_class
[MAX_RELOADS
];
158 enum machine_mode reload_inmode
[MAX_RELOADS
];
159 enum machine_mode reload_outmode
[MAX_RELOADS
];
160 rtx reload_reg_rtx
[MAX_RELOADS
];
161 char reload_optional
[MAX_RELOADS
];
162 int reload_inc
[MAX_RELOADS
];
163 rtx reload_in_reg
[MAX_RELOADS
];
164 char reload_nocombine
[MAX_RELOADS
];
165 int reload_opnum
[MAX_RELOADS
];
166 enum reload_type reload_when_needed
[MAX_RELOADS
];
167 int reload_secondary_reload
[MAX_RELOADS
];
168 int reload_secondary_p
[MAX_RELOADS
];
169 enum insn_code reload_secondary_icode
[MAX_RELOADS
];
171 /* All the "earlyclobber" operands of the current insn
172 are recorded here. */
174 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
176 int reload_n_operands
;
178 /* Replacing reloads.
180 If `replace_reloads' is nonzero, then as each reload is recorded
181 an entry is made for it in the table `replacements'.
182 Then later `subst_reloads' can look through that table and
183 perform all the replacements needed. */
185 /* Nonzero means record the places to replace. */
186 static int replace_reloads
;
188 /* Each replacement is recorded with a structure like this. */
191 rtx
*where
; /* Location to store in */
192 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
193 a SUBREG; 0 otherwise. */
194 int what
; /* which reload this is for */
195 enum machine_mode mode
; /* mode it must have */
198 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
200 /* Number of replacements currently recorded. */
201 static int n_replacements
;
203 /* Used to track what is modified by an operand. */
206 int reg_flag
; /* Nonzero if referencing a register. */
207 int safe
; /* Nonzero if this can't conflict with anything. */
208 rtx base
; /* Base adddress for MEM. */
209 HOST_WIDE_INT start
; /* Starting offset or register number. */
210 HOST_WIDE_INT end
; /* Endinf offset or register number. */
213 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
214 (see reg_equiv_address). */
215 static rtx memlocs
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
216 static int n_memlocs
;
218 #ifdef SECONDARY_MEMORY_NEEDED
220 /* Save MEMs needed to copy from one class of registers to another. One MEM
221 is used per mode, but normally only one or two modes are ever used.
223 We keep two versions, before and after register elimination. The one
224 after register elimination is record separately for each operand. This
225 is done in case the address is not valid to be sure that we separately
228 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
229 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
232 /* The instruction we are doing reloads for;
233 so we can test whether a register dies in it. */
234 static rtx this_insn
;
236 /* Nonzero if this instruction is a user-specified asm with operands. */
237 static int this_insn_is_asm
;
239 /* If hard_regs_live_known is nonzero,
240 we can tell which hard regs are currently live,
241 at least enough to succeed in choosing dummy reloads. */
242 static int hard_regs_live_known
;
244 /* Indexed by hard reg number,
245 element is nonegative if hard reg has been spilled.
246 This vector is passed to `find_reloads' as an argument
247 and is not changed here. */
248 static short *static_reload_reg_p
;
250 /* Set to 1 in subst_reg_equivs if it changes anything. */
251 static int subst_reg_equivs_changed
;
253 /* On return from push_reload, holds the reload-number for the OUT
254 operand, which can be different for that from the input operand. */
255 static int output_reloadnum
;
257 static enum reg_class find_secondary_reload
PROTO((rtx
, enum reg_class
,
258 enum machine_mode
, int,
263 enum machine_mode
*));
264 static int push_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
265 enum machine_mode
, enum machine_mode
,
266 int, int, int, enum reload_type
));
267 static void push_replacement
PROTO((rtx
*, int, enum machine_mode
));
268 static void combine_reloads
PROTO((void));
269 static rtx find_dummy_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*,
270 enum reg_class
, int));
271 static int hard_reg_set_here_p
PROTO((int, int, rtx
));
272 static struct decomposition decompose
PROTO((rtx
));
273 static int immune_p
PROTO((rtx
, rtx
, struct decomposition
));
274 static int alternative_allows_memconst
PROTO((char *, int));
275 static rtx find_reloads_toplev
PROTO((rtx
, int, enum reload_type
, int, int));
276 static rtx make_memloc
PROTO((rtx
, int));
277 static int find_reloads_address
PROTO((enum machine_mode
, rtx
*, rtx
, rtx
*,
278 int, enum reload_type
, int));
279 static rtx subst_reg_equivs
PROTO((rtx
));
280 static rtx subst_indexed_address
PROTO((rtx
));
281 static int find_reloads_address_1
PROTO((rtx
, int, rtx
*, int,
282 enum reload_type
,int));
283 static void find_reloads_address_part
PROTO((rtx
, rtx
*, enum reg_class
,
284 enum machine_mode
, int,
285 enum reload_type
, int));
286 static int find_inc_amount
PROTO((rtx
, rtx
));
288 #ifdef HAVE_SECONDARY_RELOADS
290 /* Determine if any secondary reloads are needed for loading (if IN_P is
291 non-zero) or storing (if IN_P is zero) X to or from a reload register of
292 register class RELOAD_CLASS in mode RELOAD_MODE.
294 Return the register class of a secondary reload register, or NO_REGS if
295 none. *PMODE is set to the mode that the register is required in.
296 If the reload register is needed as a scratch register instead of an
297 intermediate register, *PICODE is set to the insn_code of the insn to be
298 used to load or store the primary reload register; otherwise *PICODE
299 is set to CODE_FOR_nothing.
301 In some cases (such as storing MQ into an external memory location on
302 the RT), both an intermediate register and a scratch register. In that
303 case, *PICODE is set to CODE_FOR_nothing, the class for the intermediate
304 register is returned, and the *PTERTIARY_... variables are set to describe
305 the scratch register. */
307 static enum reg_class
308 find_secondary_reload (x
, reload_class
, reload_mode
, in_p
, picode
, pmode
,
309 ptertiary_class
, ptertiary_icode
, ptertiary_mode
)
311 enum reg_class reload_class
;
312 enum machine_mode reload_mode
;
314 enum insn_code
*picode
;
315 enum machine_mode
*pmode
;
316 enum reg_class
*ptertiary_class
;
317 enum insn_code
*ptertiary_icode
;
318 enum machine_mode
*ptertiary_mode
;
320 enum reg_class
class = NO_REGS
;
321 enum machine_mode mode
= reload_mode
;
322 enum insn_code icode
= CODE_FOR_nothing
;
323 enum reg_class t_class
= NO_REGS
;
324 enum machine_mode t_mode
= VOIDmode
;
325 enum insn_code t_icode
= CODE_FOR_nothing
;
327 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
328 is still a pseudo-register by now, it *must* have an equivalent MEM
329 but we don't want to assume that), use that equivalent when seeing if
330 a secondary reload is needed since whether or not a reload is needed
331 might be sensitive to the form of the MEM. */
333 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
334 && reg_equiv_mem
[REGNO (x
)] != 0)
335 x
= reg_equiv_mem
[REGNO (x
)];
337 #ifdef SECONDARY_INPUT_RELOAD_CLASS
339 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
342 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
344 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
347 /* If we don't need any secondary registers, go away; the rest of the
348 values won't be used. */
349 if (class == NO_REGS
)
352 /* Get a possible insn to use. If the predicate doesn't accept X, don't
355 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
356 : reload_out_optab
[(int) reload_mode
]);
358 if (icode
!= CODE_FOR_nothing
359 && insn_operand_predicate
[(int) icode
][in_p
]
360 && (! (insn_operand_predicate
[(int) icode
][in_p
]) (x
, reload_mode
)))
361 icode
= CODE_FOR_nothing
;
363 /* If we will be using an insn, see if it can directly handle the reload
364 register we will be using. If it can, the secondary reload is for a
365 scratch register. If it can't, we will use the secondary reload for
366 an intermediate register and require a tertiary reload for the scratch
369 if (icode
!= CODE_FOR_nothing
)
371 /* If IN_P is non-zero, the reload register will be the output in
372 operand 0. If IN_P is zero, the reload register will be the input
373 in operand 1. Outputs should have an initial "=", which we must
376 char insn_letter
= insn_operand_constraint
[(int) icode
][!in_p
][in_p
];
377 enum reg_class insn_class
378 = (insn_letter
== 'r' ? GENERAL_REGS
379 : REG_CLASS_FROM_LETTER (insn_letter
));
381 if (insn_class
== NO_REGS
382 || (in_p
&& insn_operand_constraint
[(int) icode
][!in_p
][0] != '=')
383 /* The scratch register's constraint must start with "=&". */
384 || insn_operand_constraint
[(int) icode
][2][0] != '='
385 || insn_operand_constraint
[(int) icode
][2][1] != '&')
388 if (reg_class_subset_p (reload_class
, insn_class
))
389 mode
= insn_operand_mode
[(int) icode
][2];
392 char t_letter
= insn_operand_constraint
[(int) icode
][2][2];
394 t_mode
= insn_operand_mode
[(int) icode
][2];
395 t_class
= (t_letter
== 'r' ? GENERAL_REGS
396 : REG_CLASS_FROM_LETTER (t_letter
));
398 icode
= CODE_FOR_nothing
;
404 *ptertiary_class
= t_class
;
405 *ptertiary_mode
= t_mode
;
406 *ptertiary_icode
= t_icode
;
410 #endif /* HAVE_SECONDARY_RELOADS */
412 #ifdef SECONDARY_MEMORY_NEEDED
414 /* Return a memory location that will be used to copy X in mode MODE.
415 If we haven't already made a location for this mode in this insn,
416 call find_reloads_address on the location being returned. */
419 get_secondary_mem (x
, mode
, opnum
, type
)
421 enum machine_mode mode
;
423 enum reload_type type
;
428 /* If MODE is narrower than a word, widen it. This is required because
429 most machines that require these memory locations do not support
430 short load and stores from all registers (e.g., FP registers). We could
431 possibly conditionalize this, but we lose nothing by doing the wider
434 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
435 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
437 /* If we already have made a MEM for this operand in MODE, return it. */
438 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
439 return secondary_memlocs_elim
[(int) mode
][opnum
];
441 /* If this is the first time we've tried to get a MEM for this mode,
442 allocate a new one. `something_changed' in reload will get set
443 by noticing that the frame size has changed. */
445 if (secondary_memlocs
[(int) mode
] == 0)
447 #ifdef SECONDARY_MEMORY_NEEDED_RTX
448 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
450 secondary_memlocs
[(int) mode
]
451 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
455 /* Get a version of the address doing any eliminations needed. If that
456 didn't give us a new MEM, make a new one if it isn't valid. */
458 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
459 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
461 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
462 loc
= copy_rtx (loc
);
464 /* The only time the call below will do anything is if the stack
465 offset is too large. In that case IND_LEVELS doesn't matter, so we
466 can just pass a zero. Adjust the type to be the address of the
467 corresponding object. If the address was valid, save the eliminated
468 address. If it wasn't valid, we need to make a reload each time, so
473 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
474 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
477 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
481 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
485 /* Clear any secondary memory locations we've made. */
488 clear_secondary_mem ()
490 bzero (secondary_memlocs
, sizeof secondary_memlocs
);
492 #endif /* SECONDARY_MEMORY_NEEDED */
494 /* Record one reload that needs to be performed.
495 IN is an rtx saying where the data are to be found before this instruction.
496 OUT says where they must be stored after the instruction.
497 (IN is zero for data not read, and OUT is zero for data not written.)
498 INLOC and OUTLOC point to the places in the instructions where
499 IN and OUT were found.
500 If IN and OUT are both non-zero, it means the same register must be used
501 to reload both IN and OUT.
503 CLASS is a register class required for the reloaded data.
504 INMODE is the machine mode that the instruction requires
505 for the reg that replaces IN and OUTMODE is likewise for OUT.
507 If IN is zero, then OUT's location and mode should be passed as
510 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
512 OPTIONAL nonzero means this reload does not need to be performed:
513 it can be discarded if that is more convenient.
515 OPNUM and TYPE say what the purpose of this reload is.
517 The return value is the reload-number for this reload.
519 If both IN and OUT are nonzero, in some rare cases we might
520 want to make two separate reloads. (Actually we never do this now.)
521 Therefore, the reload-number for OUT is stored in
522 output_reloadnum when we return; the return value applies to IN.
523 Usually (presently always), when IN and OUT are nonzero,
524 the two reload-numbers are equal, but the caller should be careful to
528 push_reload (in
, out
, inloc
, outloc
, class,
529 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
530 register rtx in
, out
;
532 enum reg_class
class;
533 enum machine_mode inmode
, outmode
;
537 enum reload_type type
;
541 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
542 int secondary_reload
= -1;
543 enum insn_code secondary_icode
= CODE_FOR_nothing
;
545 /* Compare two RTX's. */
546 #define MATCHES(x, y) \
547 (x == y || (x != 0 && (GET_CODE (x) == REG \
548 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
549 : rtx_equal_p (x, y) && ! side_effects_p (x))))
551 /* Indicates if two reloads purposes are for similar enough things that we
552 can merge their reloads. */
553 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
554 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
555 || ((when1) == (when2) && (op1) == (op2)) \
556 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
557 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
558 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
559 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
560 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
562 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
563 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
564 ((when1) != (when2) \
565 || ! ((op1) == (op2) \
566 || (when1) == RELOAD_FOR_INPUT \
567 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
568 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
570 /* INMODE and/or OUTMODE could be VOIDmode if no mode
571 has been specified for the operand. In that case,
572 use the operand's mode as the mode to reload. */
573 if (inmode
== VOIDmode
&& in
!= 0)
574 inmode
= GET_MODE (in
);
575 if (outmode
== VOIDmode
&& out
!= 0)
576 outmode
= GET_MODE (out
);
578 /* If IN is a pseudo register everywhere-equivalent to a constant, and
579 it is not in a hard register, reload straight from the constant,
580 since we want to get rid of such pseudo registers.
581 Often this is done earlier, but not always in find_reloads_address. */
582 if (in
!= 0 && GET_CODE (in
) == REG
)
584 register int regno
= REGNO (in
);
586 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
587 && reg_equiv_constant
[regno
] != 0)
588 in
= reg_equiv_constant
[regno
];
591 /* Likewise for OUT. Of course, OUT will never be equivalent to
592 an actual constant, but it might be equivalent to a memory location
593 (in the case of a parameter). */
594 if (out
!= 0 && GET_CODE (out
) == REG
)
596 register int regno
= REGNO (out
);
598 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
599 && reg_equiv_constant
[regno
] != 0)
600 out
= reg_equiv_constant
[regno
];
603 /* If we have a read-write operand with an address side-effect,
604 change either IN or OUT so the side-effect happens only once. */
605 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
607 if (GET_CODE (XEXP (in
, 0)) == POST_INC
608 || GET_CODE (XEXP (in
, 0)) == POST_DEC
)
609 in
= gen_rtx (MEM
, GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
610 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
611 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
)
612 out
= gen_rtx (MEM
, GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
615 /* If we are reloading a (SUBREG constant ...), really reload just the
616 inside expression in its own mode.
617 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
618 a pseudo and hence will become a MEM) with M1 wider than M2 and the
619 register is a pseudo, also reload the inside expression.
620 For machines that extend byte loads, do this for any SUBREG of a pseudo
621 where both M1 and M2 are a word or smaller unless they are the same
623 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
624 either M1 is not valid for R or M2 is wider than a word but we only
625 need one word to store an M2-sized quantity in R.
626 (However, if OUT is nonzero, we need to reload the reg *and*
627 the subreg, so do nothing here, and let following statement handle it.)
629 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
630 we can't handle it here because CONST_INT does not indicate a mode.
632 Similarly, we must reload the inside expression if we have a
633 STRICT_LOW_PART (presumably, in == out in the cas).
635 Also reload the inner expression if it does not require a secondary
636 reload but the SUBREG does. */
638 if (in
!= 0 && GET_CODE (in
) == SUBREG
639 && (CONSTANT_P (SUBREG_REG (in
))
641 || (((GET_CODE (SUBREG_REG (in
)) == REG
642 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
643 || GET_CODE (SUBREG_REG (in
)) == MEM
)
644 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
645 && GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
646 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) <= UNITS_PER_WORD
647 && (GET_MODE_SIZE (inmode
)
648 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
650 && (GET_MODE_SIZE (inmode
)
651 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
654 || (GET_CODE (SUBREG_REG (in
)) == REG
655 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
656 /* The case where out is nonzero
657 is handled differently in the following statement. */
658 && (out
== 0 || SUBREG_WORD (in
) == 0)
659 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
660 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
662 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
664 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
665 GET_MODE (SUBREG_REG (in
)))))
666 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in
))
669 #ifdef SECONDARY_INPUT_RELOAD_CLASS
670 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
671 && (SECONDARY_INPUT_RELOAD_CLASS (class,
672 GET_MODE (SUBREG_REG (in
)),
678 in_subreg_loc
= inloc
;
679 inloc
= &SUBREG_REG (in
);
681 #if ! defined(BYTE_LOADS_ZERO_EXTEND) && ! defined(BYTE_LOADS_SIGN_EXTEND)
682 if (GET_CODE (in
) == MEM
)
683 /* This is supposed to happen only for paradoxical subregs made by
684 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
685 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
688 inmode
= GET_MODE (in
);
691 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
692 either M1 is not valid for R or M2 is wider than a word but we only
693 need one word to store an M2-sized quantity in R.
695 However, we must reload the inner reg *as well as* the subreg in
698 if (in
!= 0 && GET_CODE (in
) == SUBREG
699 && GET_CODE (SUBREG_REG (in
)) == REG
700 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
701 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in
)), inmode
)
702 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
703 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
705 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
707 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
708 GET_MODE (SUBREG_REG (in
)))))))
710 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), NULL_PTR
,
711 GENERAL_REGS
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
715 /* Similarly for paradoxical and problematical SUBREGs on the output.
716 Note that there is no reason we need worry about the previous value
717 of SUBREG_REG (out); even if wider than out,
718 storing in a subreg is entitled to clobber it all
719 (except in the case of STRICT_LOW_PART,
720 and in that case the constraint should label it input-output.) */
721 if (out
!= 0 && GET_CODE (out
) == SUBREG
722 && (CONSTANT_P (SUBREG_REG (out
))
724 || (((GET_CODE (SUBREG_REG (out
)) == REG
725 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
726 || GET_CODE (SUBREG_REG (out
)) == MEM
)
727 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
728 && GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
729 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) <= UNITS_PER_WORD
730 && (GET_MODE_SIZE (outmode
)
731 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
733 && (GET_MODE_SIZE (outmode
)
734 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
737 || (GET_CODE (SUBREG_REG (out
)) == REG
738 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
739 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
740 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
742 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
744 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
745 GET_MODE (SUBREG_REG (out
)))))
746 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out
))
747 + SUBREG_WORD (out
)),
749 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
750 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
751 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
752 GET_MODE (SUBREG_REG (out
)),
758 out_subreg_loc
= outloc
;
759 outloc
= &SUBREG_REG (out
);
761 #if ! defined(BYTE_LOADS_ZERO_EXTEND) && ! defined(BYTE_LOADS_SIGN_EXTEND)
762 if (GET_CODE (out
) == MEM
763 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
766 outmode
= GET_MODE (out
);
769 /* If IN appears in OUT, we can't share any input-only reload for IN. */
770 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
771 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
772 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
775 /* If IN is a SUBREG of a hard register, make a new REG. This
776 simplifies some of the cases below. */
778 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
779 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
780 in
= gen_rtx (REG
, GET_MODE (in
),
781 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
783 /* Similarly for OUT. */
784 if (out
!= 0 && GET_CODE (out
) == SUBREG
785 && GET_CODE (SUBREG_REG (out
)) == REG
786 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
787 out
= gen_rtx (REG
, GET_MODE (out
),
788 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
790 /* Narrow down the class of register wanted if that is
791 desirable on this machine for efficiency. */
793 class = PREFERRED_RELOAD_CLASS (in
, class);
795 /* Output reloads may need analogous treatment, different in detail. */
796 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
798 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
801 /* Make sure we use a class that can handle the actual pseudo
802 inside any subreg. For example, on the 386, QImode regs
803 can appear within SImode subregs. Although GENERAL_REGS
804 can handle SImode, QImode needs a smaller class. */
805 #ifdef LIMIT_RELOAD_CLASS
807 class = LIMIT_RELOAD_CLASS (inmode
, class);
808 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
809 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
812 class = LIMIT_RELOAD_CLASS (outmode
, class);
813 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
814 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
817 /* Verify that this class is at least possible for the mode that
819 if (this_insn_is_asm
)
821 enum machine_mode mode
;
822 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
826 if (mode
== VOIDmode
)
828 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
835 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
836 if (HARD_REGNO_MODE_OK (i
, mode
)
837 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
839 int nregs
= HARD_REGNO_NREGS (i
, mode
);
842 for (j
= 1; j
< nregs
; j
++)
843 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
848 if (i
== FIRST_PSEUDO_REGISTER
)
850 error_for_asm (this_insn
, "impossible register constraint in `asm'");
855 if (class == NO_REGS
)
858 /* We can use an existing reload if the class is right
859 and at least one of IN and OUT is a match
860 and the other is at worst neutral.
861 (A zero compared against anything is neutral.)
863 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
864 for the same thing since that can cause us to need more reload registers
865 than we otherwise would. */
867 for (i
= 0; i
< n_reloads
; i
++)
868 if ((reg_class_subset_p (class, reload_reg_class
[i
])
869 || reg_class_subset_p (reload_reg_class
[i
], class))
870 /* If the existing reload has a register, it must fit our class. */
871 && (reload_reg_rtx
[i
] == 0
872 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
873 true_regnum (reload_reg_rtx
[i
])))
874 && ((in
!= 0 && MATCHES (reload_in
[i
], in
) && ! dont_share
875 && (out
== 0 || reload_out
[i
] == 0 || MATCHES (reload_out
[i
], out
)))
877 (out
!= 0 && MATCHES (reload_out
[i
], out
)
878 && (in
== 0 || reload_in
[i
] == 0 || MATCHES (reload_in
[i
], in
))))
879 && (reg_class_size
[(int) class] == 1
880 #ifdef SMALL_REGISTER_CLASSES
884 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
885 opnum
, reload_opnum
[i
]))
888 /* Reloading a plain reg for input can match a reload to postincrement
889 that reg, since the postincrement's value is the right value.
890 Likewise, it can match a preincrement reload, since we regard
891 the preincrementation as happening before any ref in this insn
894 for (i
= 0; i
< n_reloads
; i
++)
895 if ((reg_class_subset_p (class, reload_reg_class
[i
])
896 || reg_class_subset_p (reload_reg_class
[i
], class))
897 /* If the existing reload has a register, it must fit our class. */
898 && (reload_reg_rtx
[i
] == 0
899 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
900 true_regnum (reload_reg_rtx
[i
])))
901 && out
== 0 && reload_out
[i
] == 0 && reload_in
[i
] != 0
902 && ((GET_CODE (in
) == REG
903 && (GET_CODE (reload_in
[i
]) == POST_INC
904 || GET_CODE (reload_in
[i
]) == POST_DEC
905 || GET_CODE (reload_in
[i
]) == PRE_INC
906 || GET_CODE (reload_in
[i
]) == PRE_DEC
)
907 && MATCHES (XEXP (reload_in
[i
], 0), in
))
909 (GET_CODE (reload_in
[i
]) == REG
910 && (GET_CODE (in
) == POST_INC
911 || GET_CODE (in
) == POST_DEC
912 || GET_CODE (in
) == PRE_INC
913 || GET_CODE (in
) == PRE_DEC
)
914 && MATCHES (XEXP (in
, 0), reload_in
[i
])))
915 && (reg_class_size
[(int) class] == 1
916 #ifdef SMALL_REGISTER_CLASSES
920 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
921 opnum
, reload_opnum
[i
]))
923 /* Make sure reload_in ultimately has the increment,
924 not the plain register. */
925 if (GET_CODE (in
) == REG
)
932 #ifdef HAVE_SECONDARY_RELOADS
933 enum reg_class secondary_class
= NO_REGS
;
934 enum reg_class secondary_out_class
= NO_REGS
;
935 enum machine_mode secondary_mode
= inmode
;
936 enum machine_mode secondary_out_mode
= outmode
;
937 enum insn_code secondary_icode
;
938 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
939 enum reg_class tertiary_class
= NO_REGS
;
940 enum reg_class tertiary_out_class
= NO_REGS
;
941 enum machine_mode tertiary_mode
;
942 enum machine_mode tertiary_out_mode
;
943 enum insn_code tertiary_icode
;
944 enum insn_code tertiary_out_icode
= CODE_FOR_nothing
;
945 int tertiary_reload
= -1;
947 /* See if we need a secondary reload register to move between
948 CLASS and IN or CLASS and OUT. Get the modes and icodes to
949 use for each of them if so. */
951 #ifdef SECONDARY_INPUT_RELOAD_CLASS
954 = find_secondary_reload (in
, class, inmode
, 1, &secondary_icode
,
955 &secondary_mode
, &tertiary_class
,
956 &tertiary_icode
, &tertiary_mode
);
959 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
960 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
962 = find_secondary_reload (out
, class, outmode
, 0,
963 &secondary_out_icode
, &secondary_out_mode
,
964 &tertiary_out_class
, &tertiary_out_icode
,
968 /* We can only record one secondary and one tertiary reload. If both
969 IN and OUT need secondary reloads, we can only make an in-out
970 reload if neither need an insn and if the classes are compatible.
971 If they aren't, all we can do is abort since making two separate
972 reloads is invalid. */
974 if (secondary_class
!= NO_REGS
&& secondary_out_class
!= NO_REGS
975 && reg_class_subset_p (secondary_out_class
, secondary_class
))
976 secondary_class
= secondary_out_class
;
978 if (secondary_class
!= NO_REGS
&& secondary_out_class
!= NO_REGS
979 && (! reg_class_subset_p (secondary_class
, secondary_out_class
)
980 || secondary_icode
!= CODE_FOR_nothing
981 || secondary_out_icode
!= CODE_FOR_nothing
))
984 /* If we need a secondary reload for OUT but not IN, copy the
986 if (secondary_class
== NO_REGS
&& secondary_out_class
!= NO_REGS
)
988 secondary_class
= secondary_out_class
;
989 secondary_icode
= secondary_out_icode
;
990 tertiary_class
= tertiary_out_class
;
991 tertiary_icode
= tertiary_out_icode
;
992 tertiary_mode
= tertiary_out_mode
;
995 if (secondary_class
!= NO_REGS
)
997 /* Secondary reloads don't conflict as badly as the primary object
998 being reload. Specifically, we can always treat them as
999 being for an input or output address and hence allowed to be
1000 reused in the same manner such address components could be
1001 reused. This is used as the reload_type for our secondary
1004 enum reload_type secondary_type
1005 = (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
1006 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
1009 /* This case isn't valid, so fail. Reload is allowed to use the
1010 same register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT
1011 reloads, but in the case of a secondary register, we actually
1012 need two different registers for correct code. We fail here
1013 to prevent the possibility of silently generating incorrect code
1016 The convention is that secondary input reloads are valid only if
1017 the secondary_class is different from class. If you have such
1018 a case, you can not use secondary reloads, you must work around
1019 the problem some other way. */
1021 if (type
== RELOAD_FOR_INPUT
&& secondary_class
== class)
1024 /* If we need a tertiary reload, see if we have one we can reuse
1025 or else make one. */
1027 if (tertiary_class
!= NO_REGS
)
1029 for (tertiary_reload
= 0; tertiary_reload
< n_reloads
;
1031 if (reload_secondary_p
[tertiary_reload
]
1032 && (reg_class_subset_p (tertiary_class
,
1033 reload_reg_class
[tertiary_reload
])
1034 || reg_class_subset_p (reload_reg_class
[tertiary_reload
],
1036 && ((reload_inmode
[tertiary_reload
] == tertiary_mode
)
1037 || reload_inmode
[tertiary_reload
] == VOIDmode
)
1038 && ((reload_outmode
[tertiary_reload
] == tertiary_mode
)
1039 || reload_outmode
[tertiary_reload
] == VOIDmode
)
1040 && (reload_secondary_icode
[tertiary_reload
]
1041 == CODE_FOR_nothing
)
1042 && (reg_class_size
[(int) tertiary_class
] == 1
1043 #ifdef SMALL_REGISTER_CLASSES
1047 && MERGABLE_RELOADS (secondary_type
,
1048 reload_when_needed
[tertiary_reload
],
1049 opnum
, reload_opnum
[tertiary_reload
]))
1051 if (tertiary_mode
!= VOIDmode
)
1052 reload_inmode
[tertiary_reload
] = tertiary_mode
;
1053 if (tertiary_out_mode
!= VOIDmode
)
1054 reload_outmode
[tertiary_reload
] = tertiary_mode
;
1055 if (reg_class_subset_p (tertiary_class
,
1056 reload_reg_class
[tertiary_reload
]))
1057 reload_reg_class
[tertiary_reload
] = tertiary_class
;
1058 if (MERGE_TO_OTHER (secondary_type
,
1059 reload_when_needed
[tertiary_reload
],
1061 reload_opnum
[tertiary_reload
]))
1062 reload_when_needed
[tertiary_reload
] = RELOAD_OTHER
;
1063 reload_opnum
[tertiary_reload
]
1064 = MIN (reload_opnum
[tertiary_reload
], opnum
);
1065 reload_optional
[tertiary_reload
] &= optional
;
1066 reload_secondary_p
[tertiary_reload
] = 1;
1069 if (tertiary_reload
== n_reloads
)
1071 /* We need to make a new tertiary reload for this register
1073 reload_in
[tertiary_reload
] = reload_out
[tertiary_reload
] = 0;
1074 reload_reg_class
[tertiary_reload
] = tertiary_class
;
1075 reload_inmode
[tertiary_reload
] = tertiary_mode
;
1076 reload_outmode
[tertiary_reload
] = tertiary_mode
;
1077 reload_reg_rtx
[tertiary_reload
] = 0;
1078 reload_optional
[tertiary_reload
] = optional
;
1079 reload_inc
[tertiary_reload
] = 0;
1080 /* Maybe we could combine these, but it seems too tricky. */
1081 reload_nocombine
[tertiary_reload
] = 1;
1082 reload_in_reg
[tertiary_reload
] = 0;
1083 reload_opnum
[tertiary_reload
] = opnum
;
1084 reload_when_needed
[tertiary_reload
] = secondary_type
;
1085 reload_secondary_reload
[tertiary_reload
] = -1;
1086 reload_secondary_icode
[tertiary_reload
] = CODE_FOR_nothing
;
1087 reload_secondary_p
[tertiary_reload
] = 1;
1094 /* See if we can reuse an existing secondary reload. */
1095 for (secondary_reload
= 0; secondary_reload
< n_reloads
;
1097 if (reload_secondary_p
[secondary_reload
]
1098 && (reg_class_subset_p (secondary_class
,
1099 reload_reg_class
[secondary_reload
])
1100 || reg_class_subset_p (reload_reg_class
[secondary_reload
],
1102 && ((reload_inmode
[secondary_reload
] == secondary_mode
)
1103 || reload_inmode
[secondary_reload
] == VOIDmode
)
1104 && ((reload_outmode
[secondary_reload
] == secondary_out_mode
)
1105 || reload_outmode
[secondary_reload
] == VOIDmode
)
1106 && reload_secondary_reload
[secondary_reload
] == tertiary_reload
1107 && reload_secondary_icode
[secondary_reload
] == tertiary_icode
1108 && (reg_class_size
[(int) secondary_class
] == 1
1109 #ifdef SMALL_REGISTER_CLASSES
1113 && MERGABLE_RELOADS (secondary_type
,
1114 reload_when_needed
[secondary_reload
],
1115 opnum
, reload_opnum
[secondary_reload
]))
1117 if (secondary_mode
!= VOIDmode
)
1118 reload_inmode
[secondary_reload
] = secondary_mode
;
1119 if (secondary_out_mode
!= VOIDmode
)
1120 reload_outmode
[secondary_reload
] = secondary_out_mode
;
1121 if (reg_class_subset_p (secondary_class
,
1122 reload_reg_class
[secondary_reload
]))
1123 reload_reg_class
[secondary_reload
] = secondary_class
;
1124 if (MERGE_TO_OTHER (secondary_type
,
1125 reload_when_needed
[secondary_reload
],
1126 opnum
, reload_opnum
[secondary_reload
]))
1127 reload_when_needed
[secondary_reload
] = RELOAD_OTHER
;
1128 reload_opnum
[secondary_reload
]
1129 = MIN (reload_opnum
[secondary_reload
], opnum
);
1130 reload_optional
[secondary_reload
] &= optional
;
1131 reload_secondary_p
[secondary_reload
] = 1;
1134 if (secondary_reload
== n_reloads
)
1136 /* We need to make a new secondary reload for this register
1138 reload_in
[secondary_reload
] = reload_out
[secondary_reload
] = 0;
1139 reload_reg_class
[secondary_reload
] = secondary_class
;
1140 reload_inmode
[secondary_reload
] = secondary_mode
;
1141 reload_outmode
[secondary_reload
] = secondary_out_mode
;
1142 reload_reg_rtx
[secondary_reload
] = 0;
1143 reload_optional
[secondary_reload
] = optional
;
1144 reload_inc
[secondary_reload
] = 0;
1145 /* Maybe we could combine these, but it seems too tricky. */
1146 reload_nocombine
[secondary_reload
] = 1;
1147 reload_in_reg
[secondary_reload
] = 0;
1148 reload_opnum
[secondary_reload
] = opnum
;
1149 reload_when_needed
[secondary_reload
] = secondary_type
;
1150 reload_secondary_reload
[secondary_reload
] = tertiary_reload
;
1151 reload_secondary_icode
[secondary_reload
] = tertiary_icode
;
1152 reload_secondary_p
[secondary_reload
] = 1;
1157 #ifdef SECONDARY_MEMORY_NEEDED
1158 /* If we need a memory location to copy between the two
1159 reload regs, set it up now. */
1161 if (in
!= 0 && secondary_icode
== CODE_FOR_nothing
1162 && SECONDARY_MEMORY_NEEDED (secondary_class
, class, inmode
))
1163 get_secondary_mem (in
, inmode
, opnum
, type
);
1165 if (out
!= 0 && secondary_icode
== CODE_FOR_nothing
1166 && SECONDARY_MEMORY_NEEDED (class, secondary_class
, outmode
))
1167 get_secondary_mem (out
, outmode
, opnum
, type
);
1173 /* We found no existing reload suitable for re-use.
1174 So add an additional reload. */
1177 reload_out
[i
] = out
;
1178 reload_reg_class
[i
] = class;
1179 reload_inmode
[i
] = inmode
;
1180 reload_outmode
[i
] = outmode
;
1181 reload_reg_rtx
[i
] = 0;
1182 reload_optional
[i
] = optional
;
1184 reload_nocombine
[i
] = 0;
1185 reload_in_reg
[i
] = inloc
? *inloc
: 0;
1186 reload_opnum
[i
] = opnum
;
1187 reload_when_needed
[i
] = type
;
1188 reload_secondary_reload
[i
] = secondary_reload
;
1189 reload_secondary_icode
[i
] = secondary_icode
;
1190 reload_secondary_p
[i
] = 0;
1194 #ifdef SECONDARY_MEMORY_NEEDED
1195 /* If a memory location is needed for the copy, make one. */
1196 if (in
!= 0 && GET_CODE (in
) == REG
1197 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1198 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1200 get_secondary_mem (in
, inmode
, opnum
, type
);
1202 if (out
!= 0 && GET_CODE (out
) == REG
1203 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1204 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1206 get_secondary_mem (out
, outmode
, opnum
, type
);
1211 /* We are reusing an existing reload,
1212 but we may have additional information for it.
1213 For example, we may now have both IN and OUT
1214 while the old one may have just one of them. */
1216 if (inmode
!= VOIDmode
)
1217 reload_inmode
[i
] = inmode
;
1218 if (outmode
!= VOIDmode
)
1219 reload_outmode
[i
] = outmode
;
1223 reload_out
[i
] = out
;
1224 if (reg_class_subset_p (class, reload_reg_class
[i
]))
1225 reload_reg_class
[i
] = class;
1226 reload_optional
[i
] &= optional
;
1227 if (MERGE_TO_OTHER (type
, reload_when_needed
[i
],
1228 opnum
, reload_opnum
[i
]))
1229 reload_when_needed
[i
] = RELOAD_OTHER
;
1230 reload_opnum
[i
] = MIN (reload_opnum
[i
], opnum
);
1233 /* If the ostensible rtx being reload differs from the rtx found
1234 in the location to substitute, this reload is not safe to combine
1235 because we cannot reliably tell whether it appears in the insn. */
1237 if (in
!= 0 && in
!= *inloc
)
1238 reload_nocombine
[i
] = 1;
1241 /* This was replaced by changes in find_reloads_address_1 and the new
1242 function inc_for_reload, which go with a new meaning of reload_inc. */
1244 /* If this is an IN/OUT reload in an insn that sets the CC,
1245 it must be for an autoincrement. It doesn't work to store
1246 the incremented value after the insn because that would clobber the CC.
1247 So we must do the increment of the value reloaded from,
1248 increment it, store it back, then decrement again. */
1249 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1253 reload_inc
[i
] = find_inc_amount (PATTERN (this_insn
), in
);
1254 /* If we did not find a nonzero amount-to-increment-by,
1255 that contradicts the belief that IN is being incremented
1256 in an address in this insn. */
1257 if (reload_inc
[i
] == 0)
1262 /* If we will replace IN and OUT with the reload-reg,
1263 record where they are located so that substitution need
1264 not do a tree walk. */
1266 if (replace_reloads
)
1270 register struct replacement
*r
= &replacements
[n_replacements
++];
1272 r
->subreg_loc
= in_subreg_loc
;
1276 if (outloc
!= 0 && outloc
!= inloc
)
1278 register struct replacement
*r
= &replacements
[n_replacements
++];
1281 r
->subreg_loc
= out_subreg_loc
;
1286 /* If this reload is just being introduced and it has both
1287 an incoming quantity and an outgoing quantity that are
1288 supposed to be made to match, see if either one of the two
1289 can serve as the place to reload into.
1291 If one of them is acceptable, set reload_reg_rtx[i]
1294 if (in
!= 0 && out
!= 0 && in
!= out
&& reload_reg_rtx
[i
] == 0)
1296 reload_reg_rtx
[i
] = find_dummy_reload (in
, out
, inloc
, outloc
,
1297 reload_reg_class
[i
], i
);
1299 /* If the outgoing register already contains the same value
1300 as the incoming one, we can dispense with loading it.
1301 The easiest way to tell the caller that is to give a phony
1302 value for the incoming operand (same as outgoing one). */
1303 if (reload_reg_rtx
[i
] == out
1304 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1305 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1306 static_reload_reg_p
, i
, inmode
))
1310 /* If this is an input reload and the operand contains a register that
1311 dies in this insn and is used nowhere else, see if it is the right class
1312 to be used for this reload. Use it if so. (This occurs most commonly
1313 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1314 this if it is also an output reload that mentions the register unless
1315 the output is a SUBREG that clobbers an entire register.
1317 Note that the operand might be one of the spill regs, if it is a
1318 pseudo reg and we are in a block where spilling has not taken place.
1319 But if there is no spilling in this block, that is OK.
1320 An explicitly used hard reg cannot be a spill reg. */
1322 if (reload_reg_rtx
[i
] == 0 && in
!= 0)
1327 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1328 if (REG_NOTE_KIND (note
) == REG_DEAD
1329 && GET_CODE (XEXP (note
, 0)) == REG
1330 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1331 && reg_mentioned_p (XEXP (note
, 0), in
)
1332 && ! refers_to_regno_for_reload_p (regno
,
1334 + HARD_REGNO_NREGS (regno
,
1336 PATTERN (this_insn
), inloc
)
1337 /* If this is also an output reload, IN cannot be used as
1338 the reload register if it is set in this insn unless IN
1340 && (out
== 0 || in
== out
1341 || ! hard_reg_set_here_p (regno
,
1343 + HARD_REGNO_NREGS (regno
,
1345 PATTERN (this_insn
)))
1346 /* ??? Why is this code so different from the previous?
1347 Is there any simple coherent way to describe the two together?
1348 What's going on here. */
1350 || (GET_CODE (in
) == SUBREG
1351 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1353 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1354 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1355 /* Make sure the operand fits in the reg that dies. */
1356 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1357 && HARD_REGNO_MODE_OK (regno
, inmode
)
1358 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1359 && HARD_REGNO_MODE_OK (regno
, outmode
)
1360 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], regno
)
1361 && !fixed_regs
[regno
])
1363 reload_reg_rtx
[i
] = gen_rtx (REG
, inmode
, regno
);
1369 output_reloadnum
= i
;
1374 /* Record an additional place we must replace a value
1375 for which we have already recorded a reload.
1376 RELOADNUM is the value returned by push_reload
1377 when the reload was recorded.
1378 This is used in insn patterns that use match_dup. */
1381 push_replacement (loc
, reloadnum
, mode
)
1384 enum machine_mode mode
;
1386 if (replace_reloads
)
1388 register struct replacement
*r
= &replacements
[n_replacements
++];
1389 r
->what
= reloadnum
;
1396 /* Transfer all replacements that used to be in reload FROM to be in
1400 transfer_replacements (to
, from
)
1405 for (i
= 0; i
< n_replacements
; i
++)
1406 if (replacements
[i
].what
== from
)
1407 replacements
[i
].what
= to
;
1410 /* If there is only one output reload, and it is not for an earlyclobber
1411 operand, try to combine it with a (logically unrelated) input reload
1412 to reduce the number of reload registers needed.
1414 This is safe if the input reload does not appear in
1415 the value being output-reloaded, because this implies
1416 it is not needed any more once the original insn completes.
1418 If that doesn't work, see we can use any of the registers that
1419 die in this insn as a reload register. We can if it is of the right
1420 class and does not appear in the value being output-reloaded. */
1426 int output_reload
= -1;
1429 /* Find the output reload; return unless there is exactly one
1430 and that one is mandatory. */
1432 for (i
= 0; i
< n_reloads
; i
++)
1433 if (reload_out
[i
] != 0)
1435 if (output_reload
>= 0)
1440 if (output_reload
< 0 || reload_optional
[output_reload
])
1443 /* An input-output reload isn't combinable. */
1445 if (reload_in
[output_reload
] != 0)
1448 /* If this reload is for an earlyclobber operand, we can't do anything. */
1450 for (i
= 0; i
< n_earlyclobbers
; i
++)
1451 if (reload_out
[output_reload
] == reload_earlyclobbers
[i
])
1454 /* Check each input reload; can we combine it? */
1456 for (i
= 0; i
< n_reloads
; i
++)
1457 if (reload_in
[i
] && ! reload_optional
[i
] && ! reload_nocombine
[i
]
1458 /* Life span of this reload must not extend past main insn. */
1459 && reload_when_needed
[i
] != RELOAD_FOR_OUTPUT_ADDRESS
1460 && reload_when_needed
[i
] != RELOAD_OTHER
1461 && (CLASS_MAX_NREGS (reload_reg_class
[i
], reload_inmode
[i
])
1462 == CLASS_MAX_NREGS (reload_reg_class
[output_reload
],
1463 reload_outmode
[output_reload
]))
1464 && reload_inc
[i
] == 0
1465 && reload_reg_rtx
[i
] == 0
1466 /* Don't combine two reloads with different secondary reloads. */
1467 && (reload_secondary_reload
[i
] == reload_secondary_reload
[output_reload
]
1468 || reload_secondary_reload
[i
] == -1
1469 || reload_secondary_reload
[output_reload
] == -1)
1470 #ifdef SECONDARY_MEMORY_NEEDED
1471 /* Likewise for different secondary memory locations. */
1472 && (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]] == 0
1473 || secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] == 0
1474 || rtx_equal_p (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]],
1475 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]]))
1477 #ifdef SMALL_REGISTER_CLASSES
1478 && reload_reg_class
[i
] == reload_reg_class
[output_reload
]
1480 && (reg_class_subset_p (reload_reg_class
[i
],
1481 reload_reg_class
[output_reload
])
1482 || reg_class_subset_p (reload_reg_class
[output_reload
],
1483 reload_reg_class
[i
]))
1485 && (MATCHES (reload_in
[i
], reload_out
[output_reload
])
1486 /* Args reversed because the first arg seems to be
1487 the one that we imagine being modified
1488 while the second is the one that might be affected. */
1489 || (! reg_overlap_mentioned_for_reload_p (reload_out
[output_reload
],
1491 /* However, if the input is a register that appears inside
1492 the output, then we also can't share.
1493 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1494 If the same reload reg is used for both reg 69 and the
1495 result to be stored in memory, then that result
1496 will clobber the address of the memory ref. */
1497 && ! (GET_CODE (reload_in
[i
]) == REG
1498 && reg_overlap_mentioned_for_reload_p (reload_in
[i
],
1499 reload_out
[output_reload
]))))
1500 && (reg_class_size
[(int) reload_reg_class
[i
]]
1501 #ifdef SMALL_REGISTER_CLASSES
1505 /* We will allow making things slightly worse by combining an
1506 input and an output, but no worse than that. */
1507 && (reload_when_needed
[i
] == RELOAD_FOR_INPUT
1508 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT
))
1512 /* We have found a reload to combine with! */
1513 reload_out
[i
] = reload_out
[output_reload
];
1514 reload_outmode
[i
] = reload_outmode
[output_reload
];
1515 /* Mark the old output reload as inoperative. */
1516 reload_out
[output_reload
] = 0;
1517 /* The combined reload is needed for the entire insn. */
1518 reload_when_needed
[i
] = RELOAD_OTHER
;
1519 /* If the output reload had a secondary reload, copy it. */
1520 if (reload_secondary_reload
[output_reload
] != -1)
1521 reload_secondary_reload
[i
] = reload_secondary_reload
[output_reload
];
1522 #ifdef SECONDARY_MEMORY_NEEDED
1523 /* Copy any secondary MEM. */
1524 if (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] != 0)
1525 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]]
1526 = secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]];
1528 /* If required, minimize the register class. */
1529 if (reg_class_subset_p (reload_reg_class
[output_reload
],
1530 reload_reg_class
[i
]))
1531 reload_reg_class
[i
] = reload_reg_class
[output_reload
];
1533 /* Transfer all replacements from the old reload to the combined. */
1534 for (j
= 0; j
< n_replacements
; j
++)
1535 if (replacements
[j
].what
== output_reload
)
1536 replacements
[j
].what
= i
;
1541 /* If this insn has only one operand that is modified or written (assumed
1542 to be the first), it must be the one corresponding to this reload. It
1543 is safe to use anything that dies in this insn for that output provided
1544 that it does not occur in the output (we already know it isn't an
1545 earlyclobber. If this is an asm insn, give up. */
1547 if (INSN_CODE (this_insn
) == -1)
1550 for (i
= 1; i
< insn_n_operands
[INSN_CODE (this_insn
)]; i
++)
1551 if (insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '='
1552 || insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '+')
1555 /* See if some hard register that dies in this insn and is not used in
1556 the output is the right class. Only works if the register we pick
1557 up can fully hold our output reload. */
1558 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1559 if (REG_NOTE_KIND (note
) == REG_DEAD
1560 && GET_CODE (XEXP (note
, 0)) == REG
1561 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1562 reload_out
[output_reload
])
1563 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1564 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1565 && TEST_HARD_REG_BIT (reg_class_contents
[(int) reload_reg_class
[output_reload
]],
1566 REGNO (XEXP (note
, 0)))
1567 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1568 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1569 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1571 reload_reg_rtx
[output_reload
] = gen_rtx (REG
,
1572 reload_outmode
[output_reload
],
1573 REGNO (XEXP (note
, 0)));
1578 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1579 See if one of IN and OUT is a register that may be used;
1580 this is desirable since a spill-register won't be needed.
1581 If so, return the register rtx that proves acceptable.
1583 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1584 CLASS is the register class required for the reload.
1586 If FOR_REAL is >= 0, it is the number of the reload,
1587 and in some cases when it can be discovered that OUT doesn't need
1588 to be computed, clear out reload_out[FOR_REAL].
1590 If FOR_REAL is -1, this should not be done, because this call
1591 is just to see if a register can be found, not to find and install it. */
1594 find_dummy_reload (real_in
, real_out
, inloc
, outloc
, class, for_real
)
1595 rtx real_in
, real_out
;
1596 rtx
*inloc
, *outloc
;
1597 enum reg_class
class;
1606 /* If operands exceed a word, we can't use either of them
1607 unless they have the same size. */
1608 if (GET_MODE_SIZE (GET_MODE (real_out
)) != GET_MODE_SIZE (GET_MODE (real_in
))
1609 && (GET_MODE_SIZE (GET_MODE (real_out
)) > UNITS_PER_WORD
1610 || GET_MODE_SIZE (GET_MODE (real_in
)) > UNITS_PER_WORD
))
1613 /* Find the inside of any subregs. */
1614 while (GET_CODE (out
) == SUBREG
)
1616 out_offset
= SUBREG_WORD (out
);
1617 out
= SUBREG_REG (out
);
1619 while (GET_CODE (in
) == SUBREG
)
1621 in_offset
= SUBREG_WORD (in
);
1622 in
= SUBREG_REG (in
);
1625 /* Narrow down the reg class, the same way push_reload will;
1626 otherwise we might find a dummy now, but push_reload won't. */
1627 class = PREFERRED_RELOAD_CLASS (in
, class);
1629 /* See if OUT will do. */
1630 if (GET_CODE (out
) == REG
1631 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1633 register int regno
= REGNO (out
) + out_offset
;
1634 int nwords
= HARD_REGNO_NREGS (regno
, GET_MODE (real_out
));
1637 /* When we consider whether the insn uses OUT,
1638 ignore references within IN. They don't prevent us
1639 from copying IN into OUT, because those refs would
1640 move into the insn that reloads IN.
1642 However, we only ignore IN in its role as this reload.
1643 If the insn uses IN elsewhere and it contains OUT,
1644 that counts. We can't be sure it's the "same" operand
1645 so it might not go through this reload. */
1647 *inloc
= const0_rtx
;
1649 if (regno
< FIRST_PSEUDO_REGISTER
1650 /* A fixed reg that can overlap other regs better not be used
1651 for reloading in any way. */
1652 #ifdef OVERLAPPING_REGNO_P
1653 && ! (fixed_regs
[regno
] && OVERLAPPING_REGNO_P (regno
))
1655 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1656 PATTERN (this_insn
), outloc
))
1659 for (i
= 0; i
< nwords
; i
++)
1660 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1666 if (GET_CODE (real_out
) == REG
)
1669 value
= gen_rtx (REG
, GET_MODE (real_out
), regno
);
1676 /* Consider using IN if OUT was not acceptable
1677 or if OUT dies in this insn (like the quotient in a divmod insn).
1678 We can't use IN unless it is dies in this insn,
1679 which means we must know accurately which hard regs are live.
1680 Also, the result can't go in IN if IN is used within OUT. */
1681 if (hard_regs_live_known
1682 && GET_CODE (in
) == REG
1683 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1685 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1686 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1687 && !fixed_regs
[REGNO (in
)]
1688 && HARD_REGNO_MODE_OK (REGNO (in
), GET_MODE (out
)))
1690 register int regno
= REGNO (in
) + in_offset
;
1691 int nwords
= HARD_REGNO_NREGS (regno
, GET_MODE (real_in
));
1693 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1694 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1695 PATTERN (this_insn
)))
1698 for (i
= 0; i
< nwords
; i
++)
1699 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1705 /* If we were going to use OUT as the reload reg
1706 and changed our mind, it means OUT is a dummy that
1707 dies here. So don't bother copying value to it. */
1708 if (for_real
>= 0 && value
== real_out
)
1709 reload_out
[for_real
] = 0;
1710 if (GET_CODE (real_in
) == REG
)
1713 value
= gen_rtx (REG
, GET_MODE (real_in
), regno
);
1721 /* This page contains subroutines used mainly for determining
1722 whether the IN or an OUT of a reload can serve as the
1725 /* Return 1 if expression X alters a hard reg in the range
1726 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1727 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1728 X should be the body of an instruction. */
1731 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1732 register int beg_regno
, end_regno
;
1735 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1737 register rtx op0
= SET_DEST (x
);
1738 while (GET_CODE (op0
) == SUBREG
)
1739 op0
= SUBREG_REG (op0
);
1740 if (GET_CODE (op0
) == REG
)
1742 register int r
= REGNO (op0
);
1743 /* See if this reg overlaps range under consideration. */
1745 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1749 else if (GET_CODE (x
) == PARALLEL
)
1751 register int i
= XVECLEN (x
, 0) - 1;
1753 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1760 /* Return 1 if ADDR is a valid memory address for mode MODE,
1761 and check that each pseudo reg has the proper kind of
1765 strict_memory_address_p (mode
, addr
)
1766 enum machine_mode mode
;
1769 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1776 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1777 if they are the same hard reg, and has special hacks for
1778 autoincrement and autodecrement.
1779 This is specifically intended for find_reloads to use
1780 in determining whether two operands match.
1781 X is the operand whose number is the lower of the two.
1783 The value is 2 if Y contains a pre-increment that matches
1784 a non-incrementing address in X. */
1786 /* ??? To be completely correct, we should arrange to pass
1787 for X the output operand and for Y the input operand.
1788 For now, we assume that the output operand has the lower number
1789 because that is natural in (SET output (... input ...)). */
1792 operands_match_p (x
, y
)
1796 register RTX_CODE code
= GET_CODE (x
);
1802 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
1803 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
1804 && GET_CODE (SUBREG_REG (y
)) == REG
)))
1810 i
= REGNO (SUBREG_REG (x
));
1811 if (i
>= FIRST_PSEUDO_REGISTER
)
1813 i
+= SUBREG_WORD (x
);
1818 if (GET_CODE (y
) == SUBREG
)
1820 j
= REGNO (SUBREG_REG (y
));
1821 if (j
>= FIRST_PSEUDO_REGISTER
)
1823 j
+= SUBREG_WORD (y
);
1828 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1829 multiple hard register group, so that for example (reg:DI 0) and
1830 (reg:SI 1) will be considered the same register. */
1831 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
1832 && i
< FIRST_PSEUDO_REGISTER
)
1833 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
1834 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
1835 && j
< FIRST_PSEUDO_REGISTER
)
1836 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
1840 /* If two operands must match, because they are really a single
1841 operand of an assembler insn, then two postincrements are invalid
1842 because the assembler insn would increment only once.
1843 On the other hand, an postincrement matches ordinary indexing
1844 if the postincrement is the output operand. */
1845 if (code
== POST_DEC
|| code
== POST_INC
)
1846 return operands_match_p (XEXP (x
, 0), y
);
1847 /* Two preincrements are invalid
1848 because the assembler insn would increment only once.
1849 On the other hand, an preincrement matches ordinary indexing
1850 if the preincrement is the input operand.
1851 In this case, return 2, since some callers need to do special
1852 things when this happens. */
1853 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
)
1854 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
1858 /* Now we have disposed of all the cases
1859 in which different rtx codes can match. */
1860 if (code
!= GET_CODE (y
))
1862 if (code
== LABEL_REF
)
1863 return XEXP (x
, 0) == XEXP (y
, 0);
1864 if (code
== SYMBOL_REF
)
1865 return XSTR (x
, 0) == XSTR (y
, 0);
1867 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1869 if (GET_MODE (x
) != GET_MODE (y
))
1872 /* Compare the elements. If any pair of corresponding elements
1873 fail to match, return 0 for the whole things. */
1876 fmt
= GET_RTX_FORMAT (code
);
1877 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1883 if (XWINT (x
, i
) != XWINT (y
, i
))
1888 if (XINT (x
, i
) != XINT (y
, i
))
1893 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
1896 /* If any subexpression returns 2,
1897 we should return 2 if we are successful. */
1905 /* It is believed that rtx's at this level will never
1906 contain anything but integers and other rtx's,
1907 except for within LABEL_REFs and SYMBOL_REFs. */
1912 return 1 + success_2
;
1915 /* Return the number of times character C occurs in string S. */
1918 n_occurrences (c
, s
)
1928 /* Describe the range of registers or memory referenced by X.
1929 If X is a register, set REG_FLAG and put the first register
1930 number into START and the last plus one into END.
1931 If X is a memory reference, put a base address into BASE
1932 and a range of integer offsets into START and END.
1933 If X is pushing on the stack, we can assume it causes no trouble,
1934 so we set the SAFE field. */
1936 static struct decomposition
1940 struct decomposition val
;
1945 if (GET_CODE (x
) == MEM
)
1947 rtx base
, offset
= 0;
1948 rtx addr
= XEXP (x
, 0);
1950 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
1951 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
1953 val
.base
= XEXP (addr
, 0);
1954 val
.start
= - GET_MODE_SIZE (GET_MODE (x
));
1955 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
1956 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
1960 if (GET_CODE (addr
) == CONST
)
1962 addr
= XEXP (addr
, 0);
1965 if (GET_CODE (addr
) == PLUS
)
1967 if (CONSTANT_P (XEXP (addr
, 0)))
1969 base
= XEXP (addr
, 1);
1970 offset
= XEXP (addr
, 0);
1972 else if (CONSTANT_P (XEXP (addr
, 1)))
1974 base
= XEXP (addr
, 0);
1975 offset
= XEXP (addr
, 1);
1982 offset
= const0_rtx
;
1984 if (GET_CODE (offset
) == CONST
)
1985 offset
= XEXP (offset
, 0);
1986 if (GET_CODE (offset
) == PLUS
)
1988 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
1990 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 1));
1991 offset
= XEXP (offset
, 0);
1993 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
1995 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 0));
1996 offset
= XEXP (offset
, 1);
2000 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
2001 offset
= const0_rtx
;
2004 else if (GET_CODE (offset
) != CONST_INT
)
2006 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
2007 offset
= const0_rtx
;
2010 if (all_const
&& GET_CODE (base
) == PLUS
)
2011 base
= gen_rtx (CONST
, GET_MODE (base
), base
);
2013 if (GET_CODE (offset
) != CONST_INT
)
2016 val
.start
= INTVAL (offset
);
2017 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2021 else if (GET_CODE (x
) == REG
)
2024 val
.start
= true_regnum (x
);
2027 /* A pseudo with no hard reg. */
2028 val
.start
= REGNO (x
);
2029 val
.end
= val
.start
+ 1;
2033 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2035 else if (GET_CODE (x
) == SUBREG
)
2037 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2038 /* This could be more precise, but it's good enough. */
2039 return decompose (SUBREG_REG (x
));
2041 val
.start
= true_regnum (x
);
2043 return decompose (SUBREG_REG (x
));
2046 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2048 else if (CONSTANT_P (x
)
2049 /* This hasn't been assigned yet, so it can't conflict yet. */
2050 || GET_CODE (x
) == SCRATCH
)
2057 /* Return 1 if altering Y will not modify the value of X.
2058 Y is also described by YDATA, which should be decompose (Y). */
2061 immune_p (x
, y
, ydata
)
2063 struct decomposition ydata
;
2065 struct decomposition xdata
;
2068 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
2072 if (GET_CODE (y
) != MEM
)
2074 /* If Y is memory and X is not, Y can't affect X. */
2075 if (GET_CODE (x
) != MEM
)
2078 xdata
= decompose (x
);
2080 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2082 /* If bases are distinct symbolic constants, there is no overlap. */
2083 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2085 /* Constants and stack slots never overlap. */
2086 if (CONSTANT_P (xdata
.base
)
2087 && (ydata
.base
== frame_pointer_rtx
2088 || ydata
.base
== stack_pointer_rtx
))
2090 if (CONSTANT_P (ydata
.base
)
2091 && (xdata
.base
== frame_pointer_rtx
2092 || xdata
.base
== stack_pointer_rtx
))
2094 /* If either base is variable, we don't know anything. */
2099 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2102 /* Similar, but calls decompose. */
2105 safe_from_earlyclobber (op
, clobber
)
2108 struct decomposition early_data
;
2110 early_data
= decompose (clobber
);
2111 return immune_p (op
, clobber
, early_data
);
2114 /* Main entry point of this file: search the body of INSN
2115 for values that need reloading and record them with push_reload.
2116 REPLACE nonzero means record also where the values occur
2117 so that subst_reloads can be used.
2119 IND_LEVELS says how many levels of indirection are supported by this
2120 machine; a value of zero means that a memory reference is not a valid
2123 LIVE_KNOWN says we have valid information about which hard
2124 regs are live at each point in the program; this is true when
2125 we are called from global_alloc but false when stupid register
2126 allocation has been done.
2128 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2129 which is nonnegative if the reg has been commandeered for reloading into.
2130 It is copied into STATIC_RELOAD_REG_P and referenced from there
2131 by various subroutines. */
2134 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2136 int replace
, ind_levels
;
2138 short *reload_reg_p
;
2140 #ifdef REGISTER_CONSTRAINTS
2142 register int insn_code_number
;
2145 /* These are the constraints for the insn. We don't change them. */
2146 char *constraints1
[MAX_RECOG_OPERANDS
];
2147 /* These start out as the constraints for the insn
2148 and they are chewed up as we consider alternatives. */
2149 char *constraints
[MAX_RECOG_OPERANDS
];
2150 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2152 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2153 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2154 /* Nonzero for a MEM operand whose entire address needs a reload. */
2155 int address_reloaded
[MAX_RECOG_OPERANDS
];
2156 /* Value of enum reload_type to use for operand. */
2157 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2158 /* Value of enum reload_type to use within address of operand. */
2159 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2160 /* Save the usage of each operand. */
2161 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2162 int no_input_reloads
= 0, no_output_reloads
= 0;
2164 int this_alternative
[MAX_RECOG_OPERANDS
];
2165 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2166 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2167 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2168 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2170 int goal_alternative
[MAX_RECOG_OPERANDS
];
2171 int this_alternative_number
;
2172 int goal_alternative_number
;
2173 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2174 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2175 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2176 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2177 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2178 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2179 int goal_alternative_swapped
;
2182 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2183 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2184 rtx body
= PATTERN (insn
);
2185 rtx set
= single_set (insn
);
2186 int goal_earlyclobber
, this_earlyclobber
;
2187 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2190 this_insn_is_asm
= 0; /* Tentative. */
2194 n_earlyclobbers
= 0;
2195 replace_reloads
= replace
;
2196 hard_regs_live_known
= live_known
;
2197 static_reload_reg_p
= reload_reg_p
;
2199 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2200 neither are insns that SET cc0. Insns that use CC0 are not allowed
2201 to have any input reloads. */
2202 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2203 no_output_reloads
= 1;
2206 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2207 no_input_reloads
= 1;
2208 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2209 no_output_reloads
= 1;
2212 #ifdef SECONDARY_MEMORY_NEEDED
2213 /* The eliminated forms of any secondary memory locations are per-insn, so
2214 clear them out here. */
2216 bzero (secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2219 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2220 Make OPERANDS point to a vector of operand values.
2221 Make OPERAND_LOCS point to a vector of pointers to
2222 where the operands were found.
2223 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2224 constraint-strings for this insn.
2225 Return if the insn needs no reload processing. */
2227 switch (GET_CODE (body
))
2237 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2238 is cheap to move between them. If it is not, there may not be an insn
2239 to do the copy, so we may need a reload. */
2240 if (GET_CODE (SET_DEST (body
)) == REG
2241 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2242 && GET_CODE (SET_SRC (body
)) == REG
2243 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2244 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2245 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2249 reload_n_operands
= noperands
= asm_noperands (body
);
2252 /* This insn is an `asm' with operands. */
2254 insn_code_number
= -1;
2255 this_insn_is_asm
= 1;
2257 /* expand_asm_operands makes sure there aren't too many operands. */
2258 if (noperands
> MAX_RECOG_OPERANDS
)
2261 /* Now get the operand values and constraints out of the insn. */
2263 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
2264 constraints
, operand_mode
);
2267 bcopy (constraints
, constraints1
, noperands
* sizeof (char *));
2268 n_alternatives
= n_occurrences (',', constraints
[0]) + 1;
2269 for (i
= 1; i
< noperands
; i
++)
2270 if (n_alternatives
!= n_occurrences (',', constraints
[i
]) + 1)
2272 error_for_asm (insn
, "operand constraints differ in number of alternatives");
2273 /* Avoid further trouble with this insn. */
2274 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
2283 /* Ordinary insn: recognize it, get the operands via insn_extract
2284 and get the constraints. */
2286 insn_code_number
= recog_memoized (insn
);
2287 if (insn_code_number
< 0)
2288 fatal_insn_not_found (insn
);
2290 reload_n_operands
= noperands
= insn_n_operands
[insn_code_number
];
2291 n_alternatives
= insn_n_alternatives
[insn_code_number
];
2292 /* Just return "no reloads" if insn has no operands with constraints. */
2293 if (n_alternatives
== 0)
2295 insn_extract (insn
);
2296 for (i
= 0; i
< noperands
; i
++)
2298 constraints
[i
] = constraints1
[i
]
2299 = insn_operand_constraint
[insn_code_number
][i
];
2300 operand_mode
[i
] = insn_operand_mode
[insn_code_number
][i
];
2309 /* If we will need to know, later, whether some pair of operands
2310 are the same, we must compare them now and save the result.
2311 Reloading the base and index registers will clobber them
2312 and afterward they will fail to match. */
2314 for (i
= 0; i
< noperands
; i
++)
2319 substed_operand
[i
] = recog_operand
[i
];
2322 modified
[i
] = RELOAD_READ
;
2324 /* Scan this operand's constraint to see if it is an output operand,
2325 an in-out operand, is commutative, or should match another. */
2330 modified
[i
] = RELOAD_WRITE
;
2332 modified
[i
] = RELOAD_READ_WRITE
;
2335 /* The last operand should not be marked commutative. */
2336 if (i
== noperands
- 1)
2338 if (this_insn_is_asm
)
2339 warning_for_asm (this_insn
,
2340 "`%%' constraint used with last operand");
2347 else if (c
>= '0' && c
<= '9')
2350 operands_match
[c
][i
]
2351 = operands_match_p (recog_operand
[c
], recog_operand
[i
]);
2353 /* An operand may not match itself. */
2356 if (this_insn_is_asm
)
2357 warning_for_asm (this_insn
,
2358 "operand %d has constraint %d", i
, c
);
2363 /* If C can be commuted with C+1, and C might need to match I,
2364 then C+1 might also need to match I. */
2365 if (commutative
>= 0)
2367 if (c
== commutative
|| c
== commutative
+ 1)
2369 int other
= c
+ (c
== commutative
? 1 : -1);
2370 operands_match
[other
][i
]
2371 = operands_match_p (recog_operand
[other
], recog_operand
[i
]);
2373 if (i
== commutative
|| i
== commutative
+ 1)
2375 int other
= i
+ (i
== commutative
? 1 : -1);
2376 operands_match
[c
][other
]
2377 = operands_match_p (recog_operand
[c
], recog_operand
[other
]);
2379 /* Note that C is supposed to be less than I.
2380 No need to consider altering both C and I because in
2381 that case we would alter one into the other. */
2387 /* Examine each operand that is a memory reference or memory address
2388 and reload parts of the addresses into index registers.
2389 Also here any references to pseudo regs that didn't get hard regs
2390 but are equivalent to constants get replaced in the insn itself
2391 with those constants. Nobody will ever see them again.
2393 Finally, set up the preferred classes of each operand. */
2395 for (i
= 0; i
< noperands
; i
++)
2397 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
2399 address_reloaded
[i
] = 0;
2400 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2401 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2404 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2405 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2408 if (constraints
[i
][0] == 'p')
2410 find_reloads_address (VOIDmode
, NULL_PTR
,
2411 recog_operand
[i
], recog_operand_loc
[i
],
2412 i
, operand_type
[i
], ind_levels
);
2413 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2415 else if (code
== MEM
)
2417 if (find_reloads_address (GET_MODE (recog_operand
[i
]),
2418 recog_operand_loc
[i
],
2419 XEXP (recog_operand
[i
], 0),
2420 &XEXP (recog_operand
[i
], 0),
2421 i
, address_type
[i
], ind_levels
))
2422 address_reloaded
[i
] = 1;
2423 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2425 else if (code
== SUBREG
)
2426 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2427 = find_reloads_toplev (recog_operand
[i
], i
, address_type
[i
],
2430 && &SET_DEST (set
) == recog_operand_loc
[i
]);
2431 else if (code
== REG
)
2433 /* This is equivalent to calling find_reloads_toplev.
2434 The code is duplicated for speed.
2435 When we find a pseudo always equivalent to a constant,
2436 we replace it by the constant. We must be sure, however,
2437 that we don't try to replace it in the insn in which it
2439 register int regno
= REGNO (recog_operand
[i
]);
2440 if (reg_equiv_constant
[regno
] != 0
2441 && (set
== 0 || &SET_DEST (set
) != recog_operand_loc
[i
]))
2442 substed_operand
[i
] = recog_operand
[i
]
2443 = reg_equiv_constant
[regno
];
2444 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2445 that feeds this insn. */
2446 if (reg_equiv_mem
[regno
] != 0)
2447 substed_operand
[i
] = recog_operand
[i
]
2448 = reg_equiv_mem
[regno
];
2450 if (reg_equiv_address
[regno
] != 0)
2452 /* If reg_equiv_address is not a constant address, copy it,
2453 since it may be shared. */
2454 rtx address
= reg_equiv_address
[regno
];
2456 if (rtx_varies_p (address
))
2457 address
= copy_rtx (address
);
2459 /* If this is an output operand, we must output a CLOBBER
2460 after INSN so find_equiv_reg knows REGNO is being written.
2461 Mark this insn specially, do we can put our output reloads
2464 if (modified
[i
] != RELOAD_READ
)
2465 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER
, VOIDmode
,
2470 *recog_operand_loc
[i
] = recog_operand
[i
]
2471 = gen_rtx (MEM
, GET_MODE (recog_operand
[i
]), address
);
2472 RTX_UNCHANGING_P (recog_operand
[i
])
2473 = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
2474 find_reloads_address (GET_MODE (recog_operand
[i
]),
2475 recog_operand_loc
[i
],
2476 XEXP (recog_operand
[i
], 0),
2477 &XEXP (recog_operand
[i
], 0),
2478 i
, address_type
[i
], ind_levels
);
2479 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2482 /* If the operand is still a register (we didn't replace it with an
2483 equivalent), get the preferred class to reload it into. */
2484 code
= GET_CODE (recog_operand
[i
]);
2486 = ((code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
)
2487 ? reg_preferred_class (REGNO (recog_operand
[i
])) : NO_REGS
);
2489 = (code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
2490 && reg_alternate_class (REGNO (recog_operand
[i
])) == NO_REGS
);
2493 /* If this is simply a copy from operand 1 to operand 0, merge the
2494 preferred classes for the operands. */
2495 if (set
!= 0 && noperands
>= 2 && recog_operand
[0] == SET_DEST (set
)
2496 && recog_operand
[1] == SET_SRC (set
))
2498 preferred_class
[0] = preferred_class
[1]
2499 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2500 pref_or_nothing
[0] |= pref_or_nothing
[1];
2501 pref_or_nothing
[1] |= pref_or_nothing
[0];
2504 /* Now see what we need for pseudo-regs that didn't get hard regs
2505 or got the wrong kind of hard reg. For this, we must consider
2506 all the operands together against the register constraints. */
2508 best
= MAX_RECOG_OPERANDS
+ 300;
2511 goal_alternative_swapped
= 0;
2514 /* The constraints are made of several alternatives.
2515 Each operand's constraint looks like foo,bar,... with commas
2516 separating the alternatives. The first alternatives for all
2517 operands go together, the second alternatives go together, etc.
2519 First loop over alternatives. */
2521 for (this_alternative_number
= 0;
2522 this_alternative_number
< n_alternatives
;
2523 this_alternative_number
++)
2525 /* Loop over operands for one constraint alternative. */
2526 /* LOSERS counts those that don't fit this alternative
2527 and would require loading. */
2529 /* BAD is set to 1 if it some operand can't fit this alternative
2530 even after reloading. */
2532 /* REJECT is a count of how undesirable this alternative says it is
2533 if any reloading is required. If the alternative matches exactly
2534 then REJECT is ignored, but otherwise it gets this much
2535 counted against it in addition to the reloading needed. Each
2536 ? counts three times here since we want the disparaging caused by
2537 a bad register class to only count 1/3 as much. */
2540 this_earlyclobber
= 0;
2542 for (i
= 0; i
< noperands
; i
++)
2544 register char *p
= constraints
[i
];
2545 register int win
= 0;
2546 /* 0 => this operand can be reloaded somehow for this alternative */
2548 /* 0 => this operand can be reloaded if the alternative allows regs. */
2551 register rtx operand
= recog_operand
[i
];
2553 /* Nonzero means this is a MEM that must be reloaded into a reg
2554 regardless of what the constraint says. */
2555 int force_reload
= 0;
2557 int earlyclobber
= 0;
2559 /* If the operand is a SUBREG, extract
2560 the REG or MEM (or maybe even a constant) within.
2561 (Constants can occur as a result of reg_equiv_constant.) */
2563 while (GET_CODE (operand
) == SUBREG
)
2565 offset
+= SUBREG_WORD (operand
);
2566 operand
= SUBREG_REG (operand
);
2567 /* Force reload if this is a constant or if there may may
2568 be a problem accessing OPERAND in the outer mode. */
2569 if (CONSTANT_P (operand
)
2570 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
2571 /* If we have a SUBREG where both the inner and outer
2572 modes are different size but no wider than a word,
2573 combine.c has made assumptions about the behavior of
2574 the machine in such register access. If the data is,
2575 in fact, in memory we must always load using the size
2576 assumed to be in the register and let the insn do the
2577 different-sized accesses. */
2578 || ((GET_CODE (operand
) == MEM
2579 || (GET_CODE (operand
)== REG
2580 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2581 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2582 && GET_MODE_SIZE (GET_MODE (operand
)) <= UNITS_PER_WORD
2583 && (GET_MODE_SIZE (operand_mode
[i
])
2584 != GET_MODE_SIZE (GET_MODE (operand
))))
2586 /* Subreg of a hard reg which can't handle the subreg's mode
2587 or which would handle that mode in the wrong number of
2588 registers for subregging to work. */
2589 || (GET_CODE (operand
) == REG
2590 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2591 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2592 && (GET_MODE_SIZE (GET_MODE (operand
))
2594 && ((GET_MODE_SIZE (GET_MODE (operand
))
2596 != HARD_REGNO_NREGS (REGNO (operand
),
2597 GET_MODE (operand
))))
2598 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2603 this_alternative
[i
] = (int) NO_REGS
;
2604 this_alternative_win
[i
] = 0;
2605 this_alternative_offmemok
[i
] = 0;
2606 this_alternative_earlyclobber
[i
] = 0;
2607 this_alternative_matches
[i
] = -1;
2609 /* An empty constraint or empty alternative
2610 allows anything which matched the pattern. */
2611 if (*p
== 0 || *p
== ',')
2614 /* Scan this alternative's specs for this operand;
2615 set WIN if the operand fits any letter in this alternative.
2616 Otherwise, clear BADOP if this operand could
2617 fit some letter after reloads,
2618 or set WINREG if this operand could fit after reloads
2619 provided the constraint allows some registers. */
2621 while (*p
&& (c
= *p
++) != ',')
2630 /* The last operand should not be marked commutative. */
2631 if (i
!= noperands
- 1)
2644 /* Ignore rest of this alternative as far as
2645 reloading is concerned. */
2646 while (*p
&& *p
!= ',') p
++;
2655 this_alternative_matches
[i
] = c
;
2656 /* We are supposed to match a previous operand.
2657 If we do, we win if that one did.
2658 If we do not, count both of the operands as losers.
2659 (This is too conservative, since most of the time
2660 only a single reload insn will be needed to make
2661 the two operands win. As a result, this alternative
2662 may be rejected when it is actually desirable.) */
2663 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2664 /* If we are matching as if two operands were swapped,
2665 also pretend that operands_match had been computed
2667 But if I is the second of those and C is the first,
2668 don't exchange them, because operands_match is valid
2669 only on one side of its diagonal. */
2671 [(c
== commutative
|| c
== commutative
+ 1)
2672 ? 2*commutative
+ 1 - c
: c
]
2673 [(i
== commutative
|| i
== commutative
+ 1)
2674 ? 2*commutative
+ 1 - i
: i
])
2675 : operands_match
[c
][i
])
2676 win
= this_alternative_win
[c
];
2679 /* Operands don't match. */
2681 /* Retroactively mark the operand we had to match
2682 as a loser, if it wasn't already. */
2683 if (this_alternative_win
[c
])
2685 this_alternative_win
[c
] = 0;
2686 if (this_alternative
[c
] == (int) NO_REGS
)
2688 /* But count the pair only once in the total badness of
2689 this alternative, if the pair can be a dummy reload. */
2691 = find_dummy_reload (recog_operand
[i
], recog_operand
[c
],
2692 recog_operand_loc
[i
], recog_operand_loc
[c
],
2693 this_alternative
[c
], -1);
2698 /* This can be fixed with reloads if the operand
2699 we are supposed to match can be fixed with reloads. */
2701 this_alternative
[i
] = this_alternative
[c
];
2705 /* All necessary reloads for an address_operand
2706 were handled in find_reloads_address. */
2707 this_alternative
[i
] = (int) ALL_REGS
;
2714 if (GET_CODE (operand
) == MEM
2715 || (GET_CODE (operand
) == REG
2716 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2717 && reg_renumber
[REGNO (operand
)] < 0))
2719 if (CONSTANT_P (operand
))
2724 if (GET_CODE (operand
) == MEM
2725 && ! address_reloaded
[i
]
2726 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2727 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2732 if (GET_CODE (operand
) == MEM
2733 && ! address_reloaded
[i
]
2734 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2735 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
2739 /* Memory operand whose address is not offsettable. */
2743 if (GET_CODE (operand
) == MEM
2744 && ! (ind_levels
? offsettable_memref_p (operand
)
2745 : offsettable_nonstrict_memref_p (operand
))
2746 /* Certain mem addresses will become offsettable
2747 after they themselves are reloaded. This is important;
2748 we don't want our own handling of unoffsettables
2749 to override the handling of reg_equiv_address. */
2750 && !(GET_CODE (XEXP (operand
, 0)) == REG
2752 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
2756 /* Memory operand whose address is offsettable. */
2760 if ((GET_CODE (operand
) == MEM
2761 /* If IND_LEVELS, find_reloads_address won't reload a
2762 pseudo that didn't get a hard reg, so we have to
2763 reject that case. */
2764 && (ind_levels
? offsettable_memref_p (operand
)
2765 : offsettable_nonstrict_memref_p (operand
)))
2766 /* Certain mem addresses will become offsettable
2767 after they themselves are reloaded. This is important;
2768 we don't want our own handling of unoffsettables
2769 to override the handling of reg_equiv_address. */
2770 || (GET_CODE (operand
) == MEM
2771 && GET_CODE (XEXP (operand
, 0)) == REG
2773 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0))
2774 || (GET_CODE (operand
) == REG
2775 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2776 && reg_renumber
[REGNO (operand
)] < 0))
2778 if (CONSTANT_P (operand
) || GET_CODE (operand
) == MEM
)
2784 /* Output operand that is stored before the need for the
2785 input operands (and their index registers) is over. */
2786 earlyclobber
= 1, this_earlyclobber
= 1;
2790 /* Match any floating double constant, but only if
2791 we can examine the bits of it reliably. */
2792 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
2793 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
2794 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
2796 if (GET_CODE (operand
) == CONST_DOUBLE
)
2801 if (GET_CODE (operand
) == CONST_DOUBLE
)
2807 if (GET_CODE (operand
) == CONST_DOUBLE
2808 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
2813 if (GET_CODE (operand
) == CONST_INT
2814 || (GET_CODE (operand
) == CONST_DOUBLE
2815 && GET_MODE (operand
) == VOIDmode
))
2818 if (CONSTANT_P (operand
)
2819 #ifdef LEGITIMATE_PIC_OPERAND_P
2820 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
2827 if (GET_CODE (operand
) == CONST_INT
2828 || (GET_CODE (operand
) == CONST_DOUBLE
2829 && GET_MODE (operand
) == VOIDmode
))
2841 if (GET_CODE (operand
) == CONST_INT
2842 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
2852 /* A PLUS is never a valid operand, but reload can make
2853 it from a register when eliminating registers. */
2854 && GET_CODE (operand
) != PLUS
2855 /* A SCRATCH is not a valid operand. */
2856 && GET_CODE (operand
) != SCRATCH
2857 #ifdef LEGITIMATE_PIC_OPERAND_P
2858 && (! CONSTANT_P (operand
)
2860 || LEGITIMATE_PIC_OPERAND_P (operand
))
2862 && (GENERAL_REGS
== ALL_REGS
2863 || GET_CODE (operand
) != REG
2864 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2865 && reg_renumber
[REGNO (operand
)] < 0)))
2867 /* Drop through into 'r' case */
2871 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
2874 #ifdef EXTRA_CONSTRAINT
2880 if (EXTRA_CONSTRAINT (operand
, c
))
2887 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
2890 if (GET_MODE (operand
) == BLKmode
)
2893 if (GET_CODE (operand
) == REG
2894 && reg_fits_class_p (operand
, this_alternative
[i
],
2895 offset
, GET_MODE (recog_operand
[i
])))
2902 /* If this operand could be handled with a reg,
2903 and some reg is allowed, then this operand can be handled. */
2904 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
2907 /* Record which operands fit this alternative. */
2908 this_alternative_earlyclobber
[i
] = earlyclobber
;
2909 if (win
&& ! force_reload
)
2910 this_alternative_win
[i
] = 1;
2913 this_alternative_offmemok
[i
] = offmemok
;
2917 /* Alternative loses if it has no regs for a reg operand. */
2918 if (GET_CODE (operand
) == REG
2919 && this_alternative
[i
] == (int) NO_REGS
2920 && this_alternative_matches
[i
] < 0)
2923 /* Alternative loses if it requires a type of reload not
2924 permitted for this insn. We can always reload SCRATCH
2925 and objects with a REG_UNUSED note. */
2926 if (GET_CODE (operand
) != SCRATCH
2927 && modified
[i
] != RELOAD_READ
&& no_output_reloads
2928 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
2930 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
)
2933 /* We prefer to reload pseudos over reloading other things,
2934 since such reloads may be able to be eliminated later.
2935 If we are reloading a SCRATCH, we won't be generating any
2936 insns, just using a register, so it is also preferred.
2937 So bump REJECT in other cases. */
2938 if (GET_CODE (operand
) != REG
&& GET_CODE (operand
) != SCRATCH
)
2942 /* If this operand is a pseudo register that didn't get a hard
2943 reg and this alternative accepts some register, see if the
2944 class that we want is a subset of the preferred class for this
2945 register. If not, but it intersects that class, use the
2946 preferred class instead. If it does not intersect the preferred
2947 class, show that usage of this alternative should be discouraged;
2948 it will be discouraged more still if the register is `preferred
2949 or nothing'. We do this because it increases the chance of
2950 reusing our spill register in a later insn and avoiding a pair
2951 of memory stores and loads.
2953 Don't bother with this if this alternative will accept this
2956 Don't do this for a multiword operand, if
2957 we have to worry about small classes, because making reg groups
2958 harder to allocate is asking for trouble.
2960 Don't do this if the preferred class has only one register
2961 because we might otherwise exhaust the class. */
2964 if (! win
&& this_alternative
[i
] != (int) NO_REGS
2965 #ifdef SMALL_REGISTER_CLASSES
2966 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2968 && reg_class_size
[(int) preferred_class
[i
]] > 1)
2970 if (! reg_class_subset_p (this_alternative
[i
],
2971 preferred_class
[i
]))
2973 /* Since we don't have a way of forming the intersection,
2974 we just do something special if the preferred class
2975 is a subset of the class we have; that's the most
2976 common case anyway. */
2977 if (reg_class_subset_p (preferred_class
[i
],
2978 this_alternative
[i
]))
2979 this_alternative
[i
] = (int) preferred_class
[i
];
2981 reject
+= (1 + pref_or_nothing
[i
]);
2986 /* Now see if any output operands that are marked "earlyclobber"
2987 in this alternative conflict with any input operands
2988 or any memory addresses. */
2990 for (i
= 0; i
< noperands
; i
++)
2991 if (this_alternative_earlyclobber
[i
]
2992 && this_alternative_win
[i
])
2994 struct decomposition early_data
;
2996 early_data
= decompose (recog_operand
[i
]);
2998 if (modified
[i
] == RELOAD_READ
)
3000 if (this_insn_is_asm
)
3001 warning_for_asm (this_insn
,
3002 "`&' constraint used with input operand");
3008 if (this_alternative
[i
] == NO_REGS
)
3010 this_alternative_earlyclobber
[i
] = 0;
3011 if (this_insn_is_asm
)
3012 error_for_asm (this_insn
,
3013 "`&' constraint used with no register class");
3018 for (j
= 0; j
< noperands
; j
++)
3019 /* Is this an input operand or a memory ref? */
3020 if ((GET_CODE (recog_operand
[j
]) == MEM
3021 || modified
[j
] != RELOAD_WRITE
)
3023 /* Ignore things like match_operator operands. */
3024 && *constraints1
[j
] != 0
3025 /* Don't count an input operand that is constrained to match
3026 the early clobber operand. */
3027 && ! (this_alternative_matches
[j
] == i
3028 && rtx_equal_p (recog_operand
[i
], recog_operand
[j
]))
3029 /* Is it altered by storing the earlyclobber operand? */
3030 && !immune_p (recog_operand
[j
], recog_operand
[i
], early_data
))
3032 /* If the output is in a single-reg class,
3033 it's costly to reload it, so reload the input instead. */
3034 if (reg_class_size
[this_alternative
[i
]] == 1
3035 && (GET_CODE (recog_operand
[j
]) == REG
3036 || GET_CODE (recog_operand
[j
]) == SUBREG
))
3039 this_alternative_win
[j
] = 0;
3044 /* If an earlyclobber operand conflicts with something,
3045 it must be reloaded, so request this and count the cost. */
3049 this_alternative_win
[i
] = 0;
3050 for (j
= 0; j
< noperands
; j
++)
3051 if (this_alternative_matches
[j
] == i
3052 && this_alternative_win
[j
])
3054 this_alternative_win
[j
] = 0;
3060 /* If one alternative accepts all the operands, no reload required,
3061 choose that alternative; don't consider the remaining ones. */
3064 /* Unswap these so that they are never swapped at `finish'. */
3065 if (commutative
>= 0)
3067 recog_operand
[commutative
] = substed_operand
[commutative
];
3068 recog_operand
[commutative
+ 1]
3069 = substed_operand
[commutative
+ 1];
3071 for (i
= 0; i
< noperands
; i
++)
3073 goal_alternative_win
[i
] = 1;
3074 goal_alternative
[i
] = this_alternative
[i
];
3075 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3076 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3077 goal_alternative_earlyclobber
[i
]
3078 = this_alternative_earlyclobber
[i
];
3080 goal_alternative_number
= this_alternative_number
;
3081 goal_alternative_swapped
= swapped
;
3082 goal_earlyclobber
= this_earlyclobber
;
3086 /* REJECT, set by the ! and ? constraint characters and when a register
3087 would be reloaded into a non-preferred class, discourages the use of
3088 this alternative for a reload goal. REJECT is incremented by three
3089 for each ? and one for each non-preferred class. */
3090 losers
= losers
* 3 + reject
;
3092 /* If this alternative can be made to work by reloading,
3093 and it needs less reloading than the others checked so far,
3094 record it as the chosen goal for reloading. */
3095 if (! bad
&& best
> losers
)
3097 for (i
= 0; i
< noperands
; i
++)
3099 goal_alternative
[i
] = this_alternative
[i
];
3100 goal_alternative_win
[i
] = this_alternative_win
[i
];
3101 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3102 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3103 goal_alternative_earlyclobber
[i
]
3104 = this_alternative_earlyclobber
[i
];
3106 goal_alternative_swapped
= swapped
;
3108 goal_alternative_number
= this_alternative_number
;
3109 goal_earlyclobber
= this_earlyclobber
;
3113 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3114 then we need to try each alternative twice,
3115 the second time matching those two operands
3116 as if we had exchanged them.
3117 To do this, really exchange them in operands.
3119 If we have just tried the alternatives the second time,
3120 return operands to normal and drop through. */
3122 if (commutative
>= 0)
3127 register enum reg_class tclass
;
3130 recog_operand
[commutative
] = substed_operand
[commutative
+ 1];
3131 recog_operand
[commutative
+ 1] = substed_operand
[commutative
];
3133 tclass
= preferred_class
[commutative
];
3134 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3135 preferred_class
[commutative
+ 1] = tclass
;
3137 t
= pref_or_nothing
[commutative
];
3138 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3139 pref_or_nothing
[commutative
+ 1] = t
;
3141 bcopy (constraints1
, constraints
, noperands
* sizeof (char *));
3146 recog_operand
[commutative
] = substed_operand
[commutative
];
3147 recog_operand
[commutative
+ 1] = substed_operand
[commutative
+ 1];
3151 /* The operands don't meet the constraints.
3152 goal_alternative describes the alternative
3153 that we could reach by reloading the fewest operands.
3154 Reload so as to fit it. */
3156 if (best
== MAX_RECOG_OPERANDS
+ 300)
3158 /* No alternative works with reloads?? */
3159 if (insn_code_number
>= 0)
3161 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3162 /* Avoid further trouble with this insn. */
3163 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3168 /* Jump to `finish' from above if all operands are valid already.
3169 In that case, goal_alternative_win is all 1. */
3172 /* Right now, for any pair of operands I and J that are required to match,
3174 goal_alternative_matches[J] is I.
3175 Set up goal_alternative_matched as the inverse function:
3176 goal_alternative_matched[I] = J. */
3178 for (i
= 0; i
< noperands
; i
++)
3179 goal_alternative_matched
[i
] = -1;
3181 for (i
= 0; i
< noperands
; i
++)
3182 if (! goal_alternative_win
[i
]
3183 && goal_alternative_matches
[i
] >= 0)
3184 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3186 /* If the best alternative is with operands 1 and 2 swapped,
3187 consider them swapped before reporting the reloads. Update the
3188 operand numbers of any reloads already pushed. */
3190 if (goal_alternative_swapped
)
3194 tem
= substed_operand
[commutative
];
3195 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3196 substed_operand
[commutative
+ 1] = tem
;
3197 tem
= recog_operand
[commutative
];
3198 recog_operand
[commutative
] = recog_operand
[commutative
+ 1];
3199 recog_operand
[commutative
+ 1] = tem
;
3201 for (i
= 0; i
< n_reloads
; i
++)
3203 if (reload_opnum
[i
] == commutative
)
3204 reload_opnum
[i
] = commutative
+ 1;
3205 else if (reload_opnum
[i
] == commutative
+ 1)
3206 reload_opnum
[i
] = commutative
;
3210 /* Perform whatever substitutions on the operands we are supposed
3211 to make due to commutativity or replacement of registers
3212 with equivalent constants or memory slots. */
3214 for (i
= 0; i
< noperands
; i
++)
3216 *recog_operand_loc
[i
] = substed_operand
[i
];
3217 /* While we are looping on operands, initialize this. */
3218 operand_reloadnum
[i
] = -1;
3220 /* If this is an earlyclobber operand, we need to widen the scope.
3221 The reload must remain valid from the start of the insn being
3222 reloaded until after the operand is stored into its destination.
3223 We approximate this with RELOAD_OTHER even though we know that we
3224 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3226 One special case that is worth checking is when we have an
3227 output that is earlyclobber but isn't used past the insn (typically
3228 a SCRATCH). In this case, we only need have the reload live
3229 through the insn itself, but not for any of our input or output
3232 In any case, anything needed to address this operand can remain
3233 however they were previously categorized. */
3235 if (goal_alternative_earlyclobber
[i
])
3237 = (find_reg_note (insn
, REG_UNUSED
, recog_operand
[i
])
3238 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3241 /* Any constants that aren't allowed and can't be reloaded
3242 into registers are here changed into memory references. */
3243 for (i
= 0; i
< noperands
; i
++)
3244 if (! goal_alternative_win
[i
]
3245 && CONSTANT_P (recog_operand
[i
])
3246 && (PREFERRED_RELOAD_CLASS (recog_operand
[i
],
3247 (enum reg_class
) goal_alternative
[i
])
3249 && operand_mode
[i
] != VOIDmode
)
3251 *recog_operand_loc
[i
] = recog_operand
[i
]
3252 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3254 i
, address_type
[i
], ind_levels
, 0);
3255 if (alternative_allows_memconst (constraints1
[i
],
3256 goal_alternative_number
))
3257 goal_alternative_win
[i
] = 1;
3260 /* Now record reloads for all the operands that need them. */
3261 for (i
= 0; i
< noperands
; i
++)
3262 if (! goal_alternative_win
[i
])
3264 /* Operands that match previous ones have already been handled. */
3265 if (goal_alternative_matches
[i
] >= 0)
3267 /* Handle an operand with a nonoffsettable address
3268 appearing where an offsettable address will do
3269 by reloading the address into a base register. */
3270 else if (goal_alternative_matched
[i
] == -1
3271 && goal_alternative_offmemok
[i
]
3272 && GET_CODE (recog_operand
[i
]) == MEM
)
3274 operand_reloadnum
[i
]
3275 = push_reload (XEXP (recog_operand
[i
], 0), NULL_RTX
,
3276 &XEXP (recog_operand
[i
], 0), NULL_PTR
,
3277 BASE_REG_CLASS
, GET_MODE (XEXP (recog_operand
[i
], 0)),
3278 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3279 reload_inc
[operand_reloadnum
[i
]]
3280 = GET_MODE_SIZE (GET_MODE (recog_operand
[i
]));
3282 /* If this operand is an output, we will have made any
3283 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3284 now we are treating part of the operand as an input, so
3285 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3287 if (operand_type
[i
] == RELOAD_FOR_OUTPUT
)
3288 for (j
= 0; j
< n_reloads
; j
++)
3289 if (reload_opnum
[j
] == i
3290 && reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3291 reload_when_needed
[j
] = RELOAD_FOR_INPUT_ADDRESS
;
3293 else if (goal_alternative_matched
[i
] == -1)
3294 operand_reloadnum
[i
] =
3295 push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3296 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3297 (modified
[i
] != RELOAD_WRITE
?
3298 recog_operand_loc
[i
] : 0),
3299 modified
[i
] != RELOAD_READ
? recog_operand_loc
[i
] : 0,
3300 (enum reg_class
) goal_alternative
[i
],
3301 (modified
[i
] == RELOAD_WRITE
3302 ? VOIDmode
: operand_mode
[i
]),
3303 (modified
[i
] == RELOAD_READ
3304 ? VOIDmode
: operand_mode
[i
]),
3305 (insn_code_number
< 0 ? 0
3306 : insn_operand_strict_low
[insn_code_number
][i
]),
3307 0, i
, operand_type
[i
]);
3308 /* In a matching pair of operands, one must be input only
3309 and the other must be output only.
3310 Pass the input operand as IN and the other as OUT. */
3311 else if (modified
[i
] == RELOAD_READ
3312 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3314 operand_reloadnum
[i
]
3315 = push_reload (recog_operand
[i
],
3316 recog_operand
[goal_alternative_matched
[i
]],
3317 recog_operand_loc
[i
],
3318 recog_operand_loc
[goal_alternative_matched
[i
]],
3319 (enum reg_class
) goal_alternative
[i
],
3321 operand_mode
[goal_alternative_matched
[i
]],
3322 0, 0, i
, RELOAD_OTHER
);
3323 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3325 else if (modified
[i
] == RELOAD_WRITE
3326 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3328 operand_reloadnum
[goal_alternative_matched
[i
]]
3329 = push_reload (recog_operand
[goal_alternative_matched
[i
]],
3331 recog_operand_loc
[goal_alternative_matched
[i
]],
3332 recog_operand_loc
[i
],
3333 (enum reg_class
) goal_alternative
[i
],
3334 operand_mode
[goal_alternative_matched
[i
]],
3336 0, 0, i
, RELOAD_OTHER
);
3337 operand_reloadnum
[i
] = output_reloadnum
;
3339 else if (insn_code_number
>= 0)
3343 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3344 /* Avoid further trouble with this insn. */
3345 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3350 else if (goal_alternative_matched
[i
] < 0
3351 && goal_alternative_matches
[i
] < 0
3354 /* For each non-matching operand that's a MEM or a pseudo-register
3355 that didn't get a hard register, make an optional reload.
3356 This may get done even if the insn needs no reloads otherwise. */
3358 rtx operand
= recog_operand
[i
];
3360 while (GET_CODE (operand
) == SUBREG
)
3361 operand
= XEXP (operand
, 0);
3362 if ((GET_CODE (operand
) == MEM
3363 || (GET_CODE (operand
) == REG
3364 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3365 && (enum reg_class
) goal_alternative
[i
] != NO_REGS
3366 && ! no_input_reloads
3367 /* Optional output reloads don't do anything and we mustn't
3368 make in-out reloads on insns that are not permitted output
3370 && (modified
[i
] == RELOAD_READ
3371 || (modified
[i
] == RELOAD_READ_WRITE
&& ! no_output_reloads
)))
3372 operand_reloadnum
[i
]
3373 = push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3374 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3375 (modified
[i
] != RELOAD_WRITE
3376 ? recog_operand_loc
[i
] : 0),
3377 (modified
[i
] != RELOAD_READ
3378 ? recog_operand_loc
[i
] : 0),
3379 (enum reg_class
) goal_alternative
[i
],
3380 (modified
[i
] == RELOAD_WRITE
3381 ? VOIDmode
: operand_mode
[i
]),
3382 (modified
[i
] == RELOAD_READ
3383 ? VOIDmode
: operand_mode
[i
]),
3384 (insn_code_number
< 0 ? 0
3385 : insn_operand_strict_low
[insn_code_number
][i
]),
3386 1, i
, operand_type
[i
]);
3388 else if (goal_alternative_matches
[i
] >= 0
3389 && goal_alternative_win
[goal_alternative_matches
[i
]]
3390 && modified
[i
] == RELOAD_READ
3391 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3392 && ! no_input_reloads
&& ! no_output_reloads
3395 /* Similarly, make an optional reload for a pair of matching
3396 objects that are in MEM or a pseudo that didn't get a hard reg. */
3398 rtx operand
= recog_operand
[i
];
3400 while (GET_CODE (operand
) == SUBREG
)
3401 operand
= XEXP (operand
, 0);
3402 if ((GET_CODE (operand
) == MEM
3403 || (GET_CODE (operand
) == REG
3404 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3405 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3407 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3408 = push_reload (recog_operand
[goal_alternative_matches
[i
]],
3410 recog_operand_loc
[goal_alternative_matches
[i
]],
3411 recog_operand_loc
[i
],
3412 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3413 operand_mode
[goal_alternative_matches
[i
]],
3415 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3418 /* Record the values of the earlyclobber operands for the caller. */
3419 if (goal_earlyclobber
)
3420 for (i
= 0; i
< noperands
; i
++)
3421 if (goal_alternative_earlyclobber
[i
])
3422 reload_earlyclobbers
[n_earlyclobbers
++] = recog_operand
[i
];
3424 /* If this insn pattern contains any MATCH_DUP's, make sure that
3425 they will be substituted if the operands they match are substituted.
3426 Also do now any substitutions we already did on the operands.
3428 Don't do this if we aren't making replacements because we might be
3429 propagating things allocated by frame pointer elimination into places
3430 it doesn't expect. */
3432 if (insn_code_number
>= 0 && replace
)
3433 for (i
= insn_n_dups
[insn_code_number
] - 1; i
>= 0; i
--)
3435 int opno
= recog_dup_num
[i
];
3436 *recog_dup_loc
[i
] = *recog_operand_loc
[opno
];
3437 if (operand_reloadnum
[opno
] >= 0)
3438 push_replacement (recog_dup_loc
[i
], operand_reloadnum
[opno
],
3439 insn_operand_mode
[insn_code_number
][opno
]);
3443 /* This loses because reloading of prior insns can invalidate the equivalence
3444 (or at least find_equiv_reg isn't smart enough to find it any more),
3445 causing this insn to need more reload regs than it needed before.
3446 It may be too late to make the reload regs available.
3447 Now this optimization is done safely in choose_reload_regs. */
3449 /* For each reload of a reg into some other class of reg,
3450 search for an existing equivalent reg (same value now) in the right class.
3451 We can use it as long as we don't need to change its contents. */
3452 for (i
= 0; i
< n_reloads
; i
++)
3453 if (reload_reg_rtx
[i
] == 0
3454 && reload_in
[i
] != 0
3455 && GET_CODE (reload_in
[i
]) == REG
3456 && reload_out
[i
] == 0)
3459 = find_equiv_reg (reload_in
[i
], insn
, reload_reg_class
[i
], -1,
3460 static_reload_reg_p
, 0, reload_inmode
[i
]);
3461 /* Prevent generation of insn to load the value
3462 because the one we found already has the value. */
3463 if (reload_reg_rtx
[i
])
3464 reload_in
[i
] = reload_reg_rtx
[i
];
3468 /* Perhaps an output reload can be combined with another
3469 to reduce needs by one. */
3470 if (!goal_earlyclobber
)
3473 /* If we have a pair of reloads for parts of an address, they are reloading
3474 the same object, the operands themselves were not reloaded, and they
3475 are for two operands that are supposed to match, merge the reloads and
3476 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3478 for (i
= 0; i
< n_reloads
; i
++)
3482 for (j
= i
+ 1; j
< n_reloads
; j
++)
3483 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3484 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3485 && (reload_when_needed
[j
] == RELOAD_FOR_INPUT_ADDRESS
3486 || reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3487 && rtx_equal_p (reload_in
[i
], reload_in
[j
])
3488 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3489 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]])
3490 && (operand_reloadnum
[reload_opnum
[j
]] < 0
3491 || reload_optional
[operand_reloadnum
[reload_opnum
[j
]]])
3492 && (goal_alternative_matches
[reload_opnum
[i
]] == reload_opnum
[j
]
3493 || (goal_alternative_matches
[reload_opnum
[j
]]
3494 == reload_opnum
[i
])))
3496 for (k
= 0; k
< n_replacements
; k
++)
3497 if (replacements
[k
].what
== j
)
3498 replacements
[k
].what
= i
;
3500 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3505 /* Scan all the reloads and update their type.
3506 If a reload is for the address of an operand and we didn't reload
3507 that operand, change the type. Similarly, change the operand number
3508 of a reload when two operands match. If a reload is optional, treat it
3509 as though the operand isn't reloaded.
3511 ??? This latter case is somewhat odd because if we do the optional
3512 reload, it means the object is hanging around. Thus we need only
3513 do the address reload if the optional reload was NOT done.
3515 Change secondary reloads to be the address type of their operand, not
3518 If an operand's reload is now RELOAD_OTHER, change any
3519 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3520 RELOAD_FOR_OTHER_ADDRESS. */
3522 for (i
= 0; i
< n_reloads
; i
++)
3524 if (reload_secondary_p
[i
]
3525 && reload_when_needed
[i
] == operand_type
[reload_opnum
[i
]])
3526 reload_when_needed
[i
] = address_type
[reload_opnum
[i
]];
3528 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3529 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3530 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3531 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]]))
3532 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3534 if (reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3535 && operand_reloadnum
[reload_opnum
[i
]] >= 0
3536 && (reload_when_needed
[operand_reloadnum
[reload_opnum
[i
]]]
3538 reload_when_needed
[i
] = RELOAD_FOR_OTHER_ADDRESS
;
3540 if (goal_alternative_matches
[reload_opnum
[i
]] >= 0)
3541 reload_opnum
[i
] = goal_alternative_matches
[reload_opnum
[i
]];
3544 /* See if we have any reloads that are now allowed to be merged
3545 because we've changed when the reload is needed to
3546 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3547 check for the most common cases. */
3549 for (i
= 0; i
< n_reloads
; i
++)
3550 if (reload_in
[i
] != 0 && reload_out
[i
] == 0
3551 && (reload_when_needed
[i
] == RELOAD_FOR_OPERAND_ADDRESS
3552 || reload_when_needed
[i
] == RELOAD_FOR_OTHER_ADDRESS
))
3553 for (j
= 0; j
< n_reloads
; j
++)
3554 if (i
!= j
&& reload_in
[j
] != 0 && reload_out
[j
] == 0
3555 && reload_when_needed
[j
] == reload_when_needed
[i
]
3556 && MATCHES (reload_in
[i
], reload_in
[j
])
3557 && reload_reg_class
[i
] == reload_reg_class
[j
]
3558 && !reload_nocombine
[i
] && !reload_nocombine
[j
]
3559 && reload_reg_rtx
[i
] == reload_reg_rtx
[j
])
3561 reload_opnum
[i
] = MIN (reload_opnum
[i
], reload_opnum
[j
]);
3562 transfer_replacements (i
, j
);
3566 #else /* no REGISTER_CONSTRAINTS */
3568 int insn_code_number
;
3569 int goal_earlyclobber
= 0; /* Always 0, to make combine_reloads happen. */
3571 rtx body
= PATTERN (insn
);
3575 n_earlyclobbers
= 0;
3576 replace_reloads
= replace
;
3579 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3580 Store the operand values in RECOG_OPERAND and the locations
3581 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3582 Return if the insn needs no reload processing. */
3584 switch (GET_CODE (body
))
3595 noperands
= asm_noperands (body
);
3598 /* This insn is an `asm' with operands.
3599 First, find out how many operands, and allocate space. */
3601 insn_code_number
= -1;
3602 /* ??? This is a bug! ???
3603 Give up and delete this insn if it has too many operands. */
3604 if (noperands
> MAX_RECOG_OPERANDS
)
3607 /* Now get the operand values out of the insn. */
3609 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
3610 NULL_PTR
, NULL_PTR
);
3615 /* Ordinary insn: recognize it, allocate space for operands and
3616 constraints, and get them out via insn_extract. */
3618 insn_code_number
= recog_memoized (insn
);
3619 noperands
= insn_n_operands
[insn_code_number
];
3620 insn_extract (insn
);
3626 for (i
= 0; i
< noperands
; i
++)
3628 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
3629 int is_set_dest
= GET_CODE (body
) == SET
&& (i
== 0);
3631 if (insn_code_number
>= 0)
3632 if (insn_operand_address_p
[insn_code_number
][i
])
3633 find_reloads_address (VOIDmode
, NULL_PTR
,
3634 recog_operand
[i
], recog_operand_loc
[i
],
3635 i
, RELOAD_FOR_INPUT
, ind_levels
);
3637 /* In these cases, we can't tell if the operand is an input
3638 or an output, so be conservative. In practice it won't be
3642 find_reloads_address (GET_MODE (recog_operand
[i
]),
3643 recog_operand_loc
[i
],
3644 XEXP (recog_operand
[i
], 0),
3645 &XEXP (recog_operand
[i
], 0),
3646 i
, RELOAD_OTHER
, ind_levels
);
3648 recog_operand
[i
] = *recog_operand_loc
[i
]
3649 = find_reloads_toplev (recog_operand
[i
], i
, RELOAD_OTHER
,
3650 ind_levels
, is_set_dest
);
3653 register int regno
= REGNO (recog_operand
[i
]);
3654 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3655 recog_operand
[i
] = *recog_operand_loc
[i
]
3656 = reg_equiv_constant
[regno
];
3657 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3658 that feeds this insn. */
3659 if (reg_equiv_mem
[regno
] != 0)
3660 recog_operand
[i
] = *recog_operand_loc
[i
]
3661 = reg_equiv_mem
[regno
];
3666 /* Perhaps an output reload can be combined with another
3667 to reduce needs by one. */
3668 if (!goal_earlyclobber
)
3670 #endif /* no REGISTER_CONSTRAINTS */
3673 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3674 accepts a memory operand with constant address. */
3677 alternative_allows_memconst (constraint
, altnum
)
3682 /* Skip alternatives before the one requested. */
3685 while (*constraint
++ != ',');
3688 /* Scan the requested alternative for 'm' or 'o'.
3689 If one of them is present, this alternative accepts memory constants. */
3690 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
3691 if (c
== 'm' || c
== 'o')
3696 /* Scan X for memory references and scan the addresses for reloading.
3697 Also checks for references to "constant" regs that we want to eliminate
3698 and replaces them with the values they stand for.
3699 We may alter X destructively if it contains a reference to such.
3700 If X is just a constant reg, we return the equivalent value
3703 IND_LEVELS says how many levels of indirect addressing this machine
3706 OPNUM and TYPE identify the purpose of the reload.
3708 IS_SET_DEST is true if X is the destination of a SET, which is not
3709 appropriate to be replaced by a constant. */
3712 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
)
3715 enum reload_type type
;
3719 register RTX_CODE code
= GET_CODE (x
);
3721 register char *fmt
= GET_RTX_FORMAT (code
);
3726 /* This code is duplicated for speed in find_reloads. */
3727 register int regno
= REGNO (x
);
3728 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3729 x
= reg_equiv_constant
[regno
];
3731 /* This creates (subreg (mem...)) which would cause an unnecessary
3732 reload of the mem. */
3733 else if (reg_equiv_mem
[regno
] != 0)
3734 x
= reg_equiv_mem
[regno
];
3736 else if (reg_equiv_address
[regno
] != 0)
3738 /* If reg_equiv_address varies, it may be shared, so copy it. */
3739 rtx addr
= reg_equiv_address
[regno
];
3741 if (rtx_varies_p (addr
))
3742 addr
= copy_rtx (addr
);
3744 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
3745 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3746 find_reloads_address (GET_MODE (x
), NULL_PTR
,
3748 &XEXP (x
, 0), opnum
, type
, ind_levels
);
3755 find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
3756 opnum
, type
, ind_levels
);
3760 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
3762 /* Check for SUBREG containing a REG that's equivalent to a constant.
3763 If the constant has a known value, truncate it right now.
3764 Similarly if we are extracting a single-word of a multi-word
3765 constant. If the constant is symbolic, allow it to be substituted
3766 normally. push_reload will strip the subreg later. If the
3767 constant is VOIDmode, abort because we will lose the mode of
3768 the register (this should never happen because one of the cases
3769 above should handle it). */
3771 register int regno
= REGNO (SUBREG_REG (x
));
3774 if (subreg_lowpart_p (x
)
3775 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3776 && reg_equiv_constant
[regno
] != 0
3777 && (tem
= gen_lowpart_common (GET_MODE (x
),
3778 reg_equiv_constant
[regno
])) != 0)
3781 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
3782 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3783 && reg_equiv_constant
[regno
] != 0
3784 && (tem
= operand_subword (reg_equiv_constant
[regno
],
3786 GET_MODE (SUBREG_REG (x
)))) != 0)
3789 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3790 && reg_equiv_constant
[regno
] != 0
3791 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
3794 /* If the subreg contains a reg that will be converted to a mem,
3795 convert the subreg to a narrower memref now.
3796 Otherwise, we would get (subreg (mem ...) ...),
3797 which would force reload of the mem.
3799 We also need to do this if there is an equivalent MEM that is
3800 not offsettable. In that case, alter_subreg would produce an
3801 invalid address on big-endian machines.
3803 For machines that extend byte loads, we must not reload using
3804 a wider mode if we have a paradoxical SUBREG. find_reloads will
3805 force a reload in that case. So we should not do anything here. */
3807 else if (regno
>= FIRST_PSEUDO_REGISTER
3808 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
3809 && (GET_MODE_SIZE (GET_MODE (x
))
3810 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
3812 && (reg_equiv_address
[regno
] != 0
3813 || (reg_equiv_mem
[regno
] != 0
3814 && (! strict_memory_address_p (GET_MODE (x
),
3815 XEXP (reg_equiv_mem
[regno
], 0))
3816 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))))
3818 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
3819 rtx addr
= (reg_equiv_address
[regno
] ? reg_equiv_address
[regno
]
3820 : XEXP (reg_equiv_mem
[regno
], 0));
3821 #if BYTES_BIG_ENDIAN
3823 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
3824 offset
+= MIN (size
, UNITS_PER_WORD
);
3825 size
= GET_MODE_SIZE (GET_MODE (x
));
3826 offset
-= MIN (size
, UNITS_PER_WORD
);
3828 addr
= plus_constant (addr
, offset
);
3829 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
3830 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3831 find_reloads_address (GET_MODE (x
), NULL_PTR
,
3833 &XEXP (x
, 0), opnum
, type
, ind_levels
);
3838 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3841 XEXP (x
, i
) = find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
3842 ind_levels
, is_set_dest
);
3847 /* Return a mem ref for the memory equivalent of reg REGNO.
3848 This mem ref is not shared with anything. */
3851 make_memloc (ad
, regno
)
3856 rtx tem
= reg_equiv_address
[regno
];
3858 #if 0 /* We cannot safely reuse a memloc made here;
3859 if the pseudo appears twice, and its mem needs a reload,
3860 it gets two separate reloads assigned, but it only
3861 gets substituted with the second of them;
3862 then it can get used before that reload reg gets loaded up. */
3863 for (i
= 0; i
< n_memlocs
; i
++)
3864 if (rtx_equal_p (tem
, XEXP (memlocs
[i
], 0)))
3868 /* If TEM might contain a pseudo, we must copy it to avoid
3869 modifying it when we do the substitution for the reload. */
3870 if (rtx_varies_p (tem
))
3871 tem
= copy_rtx (tem
);
3873 tem
= gen_rtx (MEM
, GET_MODE (ad
), tem
);
3874 RTX_UNCHANGING_P (tem
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3875 memlocs
[n_memlocs
++] = tem
;
3879 /* Record all reloads needed for handling memory address AD
3880 which appears in *LOC in a memory reference to mode MODE
3881 which itself is found in location *MEMREFLOC.
3882 Note that we take shortcuts assuming that no multi-reg machine mode
3883 occurs as part of an address.
3885 OPNUM and TYPE specify the purpose of this reload.
3887 IND_LEVELS says how many levels of indirect addressing this machine
3890 Value is nonzero if this address is reloaded or replaced as a whole.
3891 This is interesting to the caller if the address is an autoincrement.
3893 Note that there is no verification that the address will be valid after
3894 this routine does its work. Instead, we rely on the fact that the address
3895 was valid when reload started. So we need only undo things that reload
3896 could have broken. These are wrong register types, pseudos not allocated
3897 to a hard register, and frame pointer elimination. */
3900 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
)
3901 enum machine_mode mode
;
3906 enum reload_type type
;
3912 /* If the address is a register, see if it is a legitimate address and
3913 reload if not. We first handle the cases where we need not reload
3914 or where we must reload in a non-standard way. */
3916 if (GET_CODE (ad
) == REG
)
3920 if (reg_equiv_constant
[regno
] != 0
3921 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
3923 *loc
= ad
= reg_equiv_constant
[regno
];
3927 else if (reg_equiv_address
[regno
] != 0)
3929 tem
= make_memloc (ad
, regno
);
3930 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
3931 &XEXP (tem
, 0), opnum
, type
, ind_levels
);
3932 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
3933 GET_MODE (ad
), VOIDmode
, 0, 0,
3938 /* We can avoid a reload if the register's equivalent memory expression
3939 is valid as an indirect memory address.
3940 But not all addresses are valid in a mem used as an indirect address:
3941 only reg or reg+constant. */
3943 else if (reg_equiv_mem
[regno
] != 0 && ind_levels
> 0
3944 && strict_memory_address_p (mode
, reg_equiv_mem
[regno
])
3945 && (GET_CODE (XEXP (reg_equiv_mem
[regno
], 0)) == REG
3946 || (GET_CODE (XEXP (reg_equiv_mem
[regno
], 0)) == PLUS
3947 && GET_CODE (XEXP (XEXP (reg_equiv_mem
[regno
], 0), 0)) == REG
3948 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem
[regno
], 0), 0)))))
3951 /* The only remaining case where we can avoid a reload is if this is a
3952 hard register that is valid as a base register and which is not the
3953 subject of a CLOBBER in this insn. */
3955 else if (regno
< FIRST_PSEUDO_REGISTER
&& REGNO_OK_FOR_BASE_P (regno
)
3956 && ! regno_clobbered_p (regno
, this_insn
))
3959 /* If we do not have one of the cases above, we must do the reload. */
3960 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
3961 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
3965 if (strict_memory_address_p (mode
, ad
))
3967 /* The address appears valid, so reloads are not needed.
3968 But the address may contain an eliminable register.
3969 This can happen because a machine with indirect addressing
3970 may consider a pseudo register by itself a valid address even when
3971 it has failed to get a hard reg.
3972 So do a tree-walk to find and eliminate all such regs. */
3974 /* But first quickly dispose of a common case. */
3975 if (GET_CODE (ad
) == PLUS
3976 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
3977 && GET_CODE (XEXP (ad
, 0)) == REG
3978 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
3981 subst_reg_equivs_changed
= 0;
3982 *loc
= subst_reg_equivs (ad
);
3984 if (! subst_reg_equivs_changed
)
3987 /* Check result for validity after substitution. */
3988 if (strict_memory_address_p (mode
, ad
))
3992 /* The address is not valid. We have to figure out why. One possibility
3993 is that it is itself a MEM. This can happen when the frame pointer is
3994 being eliminated, a pseudo is not allocated to a hard register, and the
3995 offset between the frame and stack pointers is not its initial value.
3996 In that case the pseudo will have been replaced by a MEM referring to
3997 the stack pointer. */
3998 if (GET_CODE (ad
) == MEM
)
4000 /* First ensure that the address in this MEM is valid. Then, unless
4001 indirect addresses are valid, reload the MEM into a register. */
4003 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4004 opnum
, type
, ind_levels
== 0 ? 0 : ind_levels
- 1);
4006 /* If tem was changed, then we must create a new memory reference to
4007 hold it and store it back into memrefloc. */
4008 if (tem
!= ad
&& memrefloc
)
4010 *memrefloc
= copy_rtx (*memrefloc
);
4011 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4012 loc
= &XEXP (*memrefloc
, 0);
4015 /* Check similar cases as for indirect addresses as above except
4016 that we can allow pseudos and a MEM since they should have been
4017 taken care of above. */
4020 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4021 || GET_CODE (XEXP (tem
, 0)) == MEM
4022 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4023 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4024 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4025 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4027 /* Must use TEM here, not AD, since it is the one that will
4028 have any subexpressions reloaded, if needed. */
4029 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4030 BASE_REG_CLASS
, GET_MODE (tem
), VOIDmode
, 0,
4038 /* If we have address of a stack slot but it's not valid
4039 (displacement is too large), compute the sum in a register. */
4040 else if (GET_CODE (ad
) == PLUS
4041 && (XEXP (ad
, 0) == frame_pointer_rtx
4042 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4043 || XEXP (ad
, 0) == arg_pointer_rtx
4045 || XEXP (ad
, 0) == stack_pointer_rtx
)
4046 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4048 /* Unshare the MEM rtx so we can safely alter it. */
4051 rtx oldref
= *memrefloc
;
4052 *memrefloc
= copy_rtx (*memrefloc
);
4053 loc
= &XEXP (*memrefloc
, 0);
4055 if (double_reg_address_ok
)
4057 /* Unshare the sum as well. */
4058 *loc
= ad
= copy_rtx (ad
);
4059 /* Reload the displacement into an index reg.
4060 We assume the frame pointer or arg pointer is a base reg. */
4061 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4062 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4067 /* If the sum of two regs is not necessarily valid,
4068 reload the sum into a base reg.
4069 That will at least work. */
4070 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
,
4071 opnum
, type
, ind_levels
);
4076 /* If we have an indexed stack slot, there are three possible reasons why
4077 it might be invalid: The index might need to be reloaded, the address
4078 might have been made by frame pointer elimination and hence have a
4079 constant out of range, or both reasons might apply.
4081 We can easily check for an index needing reload, but even if that is the
4082 case, we might also have an invalid constant. To avoid making the
4083 conservative assumption and requiring two reloads, we see if this address
4084 is valid when not interpreted strictly. If it is, the only problem is
4085 that the index needs a reload and find_reloads_address_1 will take care
4088 There is still a case when we might generate an extra reload,
4089 however. In certain cases eliminate_regs will return a MEM for a REG
4090 (see the code there for details). In those cases, memory_address_p
4091 applied to our address will return 0 so we will think that our offset
4092 must be too large. But it might indeed be valid and the only problem
4093 is that a MEM is present where a REG should be. This case should be
4094 very rare and there doesn't seem to be any way to avoid it.
4096 If we decide to do something here, it must be that
4097 `double_reg_address_ok' is true and that this address rtl was made by
4098 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4099 rework the sum so that the reload register will be added to the index.
4100 This is safe because we know the address isn't shared.
4102 We check for fp/ap/sp as both the first and second operand of the
4105 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4106 && GET_CODE (XEXP (ad
, 0)) == PLUS
4107 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4108 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4109 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4111 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4112 && ! memory_address_p (mode
, ad
))
4114 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4115 plus_constant (XEXP (XEXP (ad
, 0), 0),
4116 INTVAL (XEXP (ad
, 1))),
4117 XEXP (XEXP (ad
, 0), 1));
4118 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4119 GET_MODE (ad
), opnum
, type
, ind_levels
);
4120 find_reloads_address_1 (XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
, type
, 0);
4125 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4126 && GET_CODE (XEXP (ad
, 0)) == PLUS
4127 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4128 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4129 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4131 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4132 && ! memory_address_p (mode
, ad
))
4134 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4135 plus_constant (XEXP (XEXP (ad
, 0), 1),
4136 INTVAL (XEXP (ad
, 1))),
4137 XEXP (XEXP (ad
, 0), 0));
4138 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4139 GET_MODE (ad
), opnum
, type
, ind_levels
);
4140 find_reloads_address_1 (XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
, type
, 0);
4145 /* See if address becomes valid when an eliminable register
4146 in a sum is replaced. */
4149 if (GET_CODE (ad
) == PLUS
)
4150 tem
= subst_indexed_address (ad
);
4151 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4153 /* Ok, we win that way. Replace any additional eliminable
4156 subst_reg_equivs_changed
= 0;
4157 tem
= subst_reg_equivs (tem
);
4159 /* Make sure that didn't make the address invalid again. */
4161 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4168 /* If constants aren't valid addresses, reload the constant address
4170 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4172 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4173 Unshare it so we can safely alter it. */
4174 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4175 && CONSTANT_POOL_ADDRESS_P (ad
))
4177 rtx oldref
= *memrefloc
;
4178 *memrefloc
= copy_rtx (*memrefloc
);
4179 loc
= &XEXP (*memrefloc
, 0);
4182 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4187 return find_reloads_address_1 (ad
, 0, loc
, opnum
, type
, ind_levels
);
4190 /* Find all pseudo regs appearing in AD
4191 that are eliminable in favor of equivalent values
4192 and do not have hard regs; replace them by their equivalents. */
4195 subst_reg_equivs (ad
)
4198 register RTX_CODE code
= GET_CODE (ad
);
4216 register int regno
= REGNO (ad
);
4218 if (reg_equiv_constant
[regno
] != 0)
4220 subst_reg_equivs_changed
= 1;
4221 return reg_equiv_constant
[regno
];
4227 /* Quickly dispose of a common case. */
4228 if (XEXP (ad
, 0) == frame_pointer_rtx
4229 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4233 fmt
= GET_RTX_FORMAT (code
);
4234 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4236 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
));
4240 /* Compute the sum of X and Y, making canonicalizations assumed in an
4241 address, namely: sum constant integers, surround the sum of two
4242 constants with a CONST, put the constant as the second operand, and
4243 group the constant on the outermost sum.
4245 This routine assumes both inputs are already in canonical form. */
4252 enum machine_mode mode
= GET_MODE (x
);
4254 if (mode
== VOIDmode
)
4255 mode
= GET_MODE (y
);
4257 if (mode
== VOIDmode
)
4260 if (GET_CODE (x
) == CONST_INT
)
4261 return plus_constant (y
, INTVAL (x
));
4262 else if (GET_CODE (y
) == CONST_INT
)
4263 return plus_constant (x
, INTVAL (y
));
4264 else if (CONSTANT_P (x
))
4265 tem
= x
, x
= y
, y
= tem
;
4267 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4268 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4270 /* Note that if the operands of Y are specified in the opposite
4271 order in the recursive calls below, infinite recursion will occur. */
4272 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4273 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4275 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4276 constant will have been placed second. */
4277 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4279 if (GET_CODE (x
) == CONST
)
4281 if (GET_CODE (y
) == CONST
)
4284 return gen_rtx (CONST
, VOIDmode
, gen_rtx (PLUS
, mode
, x
, y
));
4287 return gen_rtx (PLUS
, mode
, x
, y
);
4290 /* If ADDR is a sum containing a pseudo register that should be
4291 replaced with a constant (from reg_equiv_constant),
4292 return the result of doing so, and also apply the associative
4293 law so that the result is more likely to be a valid address.
4294 (But it is not guaranteed to be one.)
4296 Note that at most one register is replaced, even if more are
4297 replaceable. Also, we try to put the result into a canonical form
4298 so it is more likely to be a valid address.
4300 In all other cases, return ADDR. */
4303 subst_indexed_address (addr
)
4306 rtx op0
= 0, op1
= 0, op2
= 0;
4310 if (GET_CODE (addr
) == PLUS
)
4312 /* Try to find a register to replace. */
4313 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4314 if (GET_CODE (op0
) == REG
4315 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4316 && reg_renumber
[regno
] < 0
4317 && reg_equiv_constant
[regno
] != 0)
4318 op0
= reg_equiv_constant
[regno
];
4319 else if (GET_CODE (op1
) == REG
4320 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4321 && reg_renumber
[regno
] < 0
4322 && reg_equiv_constant
[regno
] != 0)
4323 op1
= reg_equiv_constant
[regno
];
4324 else if (GET_CODE (op0
) == PLUS
4325 && (tem
= subst_indexed_address (op0
)) != op0
)
4327 else if (GET_CODE (op1
) == PLUS
4328 && (tem
= subst_indexed_address (op1
)) != op1
)
4333 /* Pick out up to three things to add. */
4334 if (GET_CODE (op1
) == PLUS
)
4335 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4336 else if (GET_CODE (op0
) == PLUS
)
4337 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4339 /* Compute the sum. */
4341 op1
= form_sum (op1
, op2
);
4343 op0
= form_sum (op0
, op1
);
4350 /* Record the pseudo registers we must reload into hard registers
4351 in a subexpression of a would-be memory address, X.
4352 (This function is not called if the address we find is strictly valid.)
4353 CONTEXT = 1 means we are considering regs as index regs,
4354 = 0 means we are considering them as base regs.
4356 OPNUM and TYPE specify the purpose of any reloads made.
4358 IND_LEVELS says how many levels of indirect addressing are
4359 supported at this point in the address.
4361 We return nonzero if X, as a whole, is reloaded or replaced. */
4363 /* Note that we take shortcuts assuming that no multi-reg machine mode
4364 occurs as part of an address.
4365 Also, this is not fully machine-customizable; it works for machines
4366 such as vaxes and 68000's and 32000's, but other possible machines
4367 could have addressing modes that this does not handle right. */
4370 find_reloads_address_1 (x
, context
, loc
, opnum
, type
, ind_levels
)
4375 enum reload_type type
;
4378 register RTX_CODE code
= GET_CODE (x
);
4382 register rtx orig_op0
= XEXP (x
, 0);
4383 register rtx orig_op1
= XEXP (x
, 1);
4384 register RTX_CODE code0
= GET_CODE (orig_op0
);
4385 register RTX_CODE code1
= GET_CODE (orig_op1
);
4386 register rtx op0
= orig_op0
;
4387 register rtx op1
= orig_op1
;
4389 if (GET_CODE (op0
) == SUBREG
)
4391 op0
= SUBREG_REG (op0
);
4392 code0
= GET_CODE (op0
);
4394 if (GET_CODE (op1
) == SUBREG
)
4396 op1
= SUBREG_REG (op1
);
4397 code1
= GET_CODE (op1
);
4400 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code1
== MEM
)
4402 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4404 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4407 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code0
== MEM
)
4409 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4411 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4414 else if (code0
== CONST_INT
|| code0
== CONST
4415 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
4416 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
, ind_levels
);
4417 else if (code1
== CONST_INT
|| code1
== CONST
4418 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
4419 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
, ind_levels
);
4420 else if (code0
== REG
&& code1
== REG
)
4422 if (REG_OK_FOR_INDEX_P (op0
)
4423 && REG_OK_FOR_BASE_P (op1
))
4425 else if (REG_OK_FOR_INDEX_P (op1
)
4426 && REG_OK_FOR_BASE_P (op0
))
4428 else if (REG_OK_FOR_BASE_P (op1
))
4429 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4431 else if (REG_OK_FOR_BASE_P (op0
))
4432 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4434 else if (REG_OK_FOR_INDEX_P (op1
))
4435 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4437 else if (REG_OK_FOR_INDEX_P (op0
))
4438 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4442 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4444 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4448 else if (code0
== REG
)
4450 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4452 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4455 else if (code1
== REG
)
4457 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4459 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4463 else if (code
== POST_INC
|| code
== POST_DEC
4464 || code
== PRE_INC
|| code
== PRE_DEC
)
4466 if (GET_CODE (XEXP (x
, 0)) == REG
)
4468 register int regno
= REGNO (XEXP (x
, 0));
4472 /* A register that is incremented cannot be constant! */
4473 if (regno
>= FIRST_PSEUDO_REGISTER
4474 && reg_equiv_constant
[regno
] != 0)
4477 /* Handle a register that is equivalent to a memory location
4478 which cannot be addressed directly. */
4479 if (reg_equiv_address
[regno
] != 0)
4481 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
4482 /* First reload the memory location's address. */
4483 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
4484 &XEXP (tem
, 0), opnum
, type
, ind_levels
);
4485 /* Put this inside a new increment-expression. */
4486 x
= gen_rtx (GET_CODE (x
), GET_MODE (x
), tem
);
4487 /* Proceed to reload that, as if it contained a register. */
4490 /* If we have a hard register that is ok as an index,
4491 don't make a reload. If an autoincrement of a nice register
4492 isn't "valid", it must be that no autoincrement is "valid".
4493 If that is true and something made an autoincrement anyway,
4494 this must be a special context where one is allowed.
4495 (For example, a "push" instruction.)
4496 We can't improve this address, so leave it alone. */
4498 /* Otherwise, reload the autoincrement into a suitable hard reg
4499 and record how much to increment by. */
4501 if (reg_renumber
[regno
] >= 0)
4502 regno
= reg_renumber
[regno
];
4503 if ((regno
>= FIRST_PSEUDO_REGISTER
4504 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4505 : REGNO_OK_FOR_BASE_P (regno
))))
4510 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4511 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4512 GET_MODE (x
), GET_MODE (x
), VOIDmode
, 0,
4514 reload_inc
[reloadnum
]
4515 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
4520 /* Update the REG_INC notes. */
4522 for (link
= REG_NOTES (this_insn
);
4523 link
; link
= XEXP (link
, 1))
4524 if (REG_NOTE_KIND (link
) == REG_INC
4525 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
4526 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4531 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
4533 /* This is probably the result of a substitution, by eliminate_regs,
4534 of an equivalent address for a pseudo that was not allocated to a
4535 hard register. Verify that the specified address is valid and
4536 reload it into a register. */
4537 rtx tem
= XEXP (x
, 0);
4541 /* Since we know we are going to reload this item, don't decrement
4542 for the indirection level.
4544 Note that this is actually conservative: it would be slightly
4545 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4547 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
4548 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
4549 opnum
, type
, ind_levels
);
4551 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4552 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4553 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4554 reload_inc
[reloadnum
]
4555 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
4557 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
4559 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4564 else if (code
== MEM
)
4566 /* This is probably the result of a substitution, by eliminate_regs,
4567 of an equivalent address for a pseudo that was not allocated to a
4568 hard register. Verify that the specified address is valid and reload
4571 Since we know we are going to reload this item, don't decrement
4572 for the indirection level.
4574 Note that this is actually conservative: it would be slightly more
4575 efficient to use the value of SPILL_INDIRECT_LEVELS from
4578 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
4579 opnum
, type
, ind_levels
);
4581 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
4582 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4583 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4586 else if (code
== REG
)
4588 register int regno
= REGNO (x
);
4590 if (reg_equiv_constant
[regno
] != 0)
4592 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
4593 (context
? INDEX_REG_CLASS
4595 GET_MODE (x
), opnum
, type
, ind_levels
);
4599 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4600 that feeds this insn. */
4601 if (reg_equiv_mem
[regno
] != 0)
4603 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
4604 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4605 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4609 if (reg_equiv_address
[regno
] != 0)
4611 x
= make_memloc (x
, regno
);
4612 find_reloads_address (GET_MODE (x
), 0, XEXP (x
, 0), &XEXP (x
, 0),
4613 opnum
, type
, ind_levels
);
4616 if (reg_renumber
[regno
] >= 0)
4617 regno
= reg_renumber
[regno
];
4618 if ((regno
>= FIRST_PSEUDO_REGISTER
4619 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4620 : REGNO_OK_FOR_BASE_P (regno
))))
4622 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4623 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4624 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4628 /* If a register appearing in an address is the subject of a CLOBBER
4629 in this insn, reload it into some other register to be safe.
4630 The CLOBBER is supposed to make the register unavailable
4631 from before this insn to after it. */
4632 if (regno_clobbered_p (regno
, this_insn
))
4634 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4635 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4636 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4642 register char *fmt
= GET_RTX_FORMAT (code
);
4644 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4647 find_reloads_address_1 (XEXP (x
, i
), context
, &XEXP (x
, i
),
4648 opnum
, type
, ind_levels
);
4655 /* X, which is found at *LOC, is a part of an address that needs to be
4656 reloaded into a register of class CLASS. If X is a constant, or if
4657 X is a PLUS that contains a constant, check that the constant is a
4658 legitimate operand and that we are supposed to be able to load
4659 it into the register.
4661 If not, force the constant into memory and reload the MEM instead.
4663 MODE is the mode to use, in case X is an integer constant.
4665 OPNUM and TYPE describe the purpose of any reloads made.
4667 IND_LEVELS says how many levels of indirect addressing this machine
4671 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
4674 enum reg_class
class;
4675 enum machine_mode mode
;
4677 enum reload_type type
;
4681 && (! LEGITIMATE_CONSTANT_P (x
)
4682 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
4684 rtx tem
= x
= force_const_mem (mode
, x
);
4685 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
4686 opnum
, type
, ind_levels
);
4689 else if (GET_CODE (x
) == PLUS
4690 && CONSTANT_P (XEXP (x
, 1))
4691 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
4692 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
4694 rtx tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
4696 x
= gen_rtx (PLUS
, GET_MODE (x
), XEXP (x
, 0), tem
);
4697 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
4698 opnum
, type
, ind_levels
);
4701 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
4702 mode
, VOIDmode
, 0, 0, opnum
, type
);
4705 /* Substitute into the current INSN the registers into which we have reloaded
4706 the things that need reloading. The array `replacements'
4707 says contains the locations of all pointers that must be changed
4708 and says what to replace them with.
4710 Return the rtx that X translates into; usually X, but modified. */
4717 for (i
= 0; i
< n_replacements
; i
++)
4719 register struct replacement
*r
= &replacements
[i
];
4720 register rtx reloadreg
= reload_reg_rtx
[r
->what
];
4723 /* Encapsulate RELOADREG so its machine mode matches what
4724 used to be there. Note that gen_lowpart_common will
4725 do the wrong thing if RELOADREG is multi-word. RELOADREG
4726 will always be a REG here. */
4727 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
4728 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
4730 /* If we are putting this into a SUBREG and RELOADREG is a
4731 SUBREG, we would be making nested SUBREGs, so we have to fix
4732 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4734 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
4736 if (GET_MODE (*r
->subreg_loc
)
4737 == GET_MODE (SUBREG_REG (reloadreg
)))
4738 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
4741 *r
->where
= SUBREG_REG (reloadreg
);
4742 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
4746 *r
->where
= reloadreg
;
4748 /* If reload got no reg and isn't optional, something's wrong. */
4749 else if (! reload_optional
[r
->what
])
4754 /* Make a copy of any replacements being done into X and move those copies
4755 to locations in Y, a copy of X. We only look at the highest level of
4759 copy_replacements (x
, y
)
4764 enum rtx_code code
= GET_CODE (x
);
4765 char *fmt
= GET_RTX_FORMAT (code
);
4766 struct replacement
*r
;
4768 /* We can't support X being a SUBREG because we might then need to know its
4769 location if something inside it was replaced. */
4773 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4775 for (j
= 0; j
< n_replacements
; j
++)
4777 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
4779 r
= &replacements
[n_replacements
++];
4780 r
->where
= replacements
[j
].where
;
4781 r
->subreg_loc
= &XEXP (y
, i
);
4782 r
->what
= replacements
[j
].what
;
4783 r
->mode
= replacements
[j
].mode
;
4785 else if (replacements
[j
].where
== &XEXP (x
, i
))
4787 r
= &replacements
[n_replacements
++];
4788 r
->where
= &XEXP (y
, i
);
4790 r
->what
= replacements
[j
].what
;
4791 r
->mode
= replacements
[j
].mode
;
4796 /* If LOC was scheduled to be replaced by something, return the replacement.
4797 Otherwise, return *LOC. */
4800 find_replacement (loc
)
4803 struct replacement
*r
;
4805 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
4807 rtx reloadreg
= reload_reg_rtx
[r
->what
];
4809 if (reloadreg
&& r
->where
== loc
)
4811 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
4812 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
4816 else if (reloadreg
&& r
->subreg_loc
== loc
)
4818 /* RELOADREG must be either a REG or a SUBREG.
4820 ??? Is it actually still ever a SUBREG? If so, why? */
4822 if (GET_CODE (reloadreg
) == REG
)
4823 return gen_rtx (REG
, GET_MODE (*loc
),
4824 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
4825 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
4828 return gen_rtx (SUBREG
, GET_MODE (*loc
), SUBREG_REG (reloadreg
),
4829 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
4836 /* Return nonzero if register in range [REGNO, ENDREGNO)
4837 appears either explicitly or implicitly in X
4838 other than being stored into.
4840 References contained within the substructure at LOC do not count.
4841 LOC may be zero, meaning don't ignore anything.
4843 This is similar to refers_to_regno_p in rtlanal.c except that we
4844 look at equivalences for pseudos that didn't get hard registers. */
4847 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
4848 int regno
, endregno
;
4853 register RTX_CODE code
;
4860 code
= GET_CODE (x
);
4867 /* If this is a pseudo, a hard register must not have been allocated.
4868 X must therefore either be a constant or be in memory. */
4869 if (i
>= FIRST_PSEUDO_REGISTER
)
4871 if (reg_equiv_memory_loc
[i
])
4872 return refers_to_regno_for_reload_p (regno
, endregno
,
4873 reg_equiv_memory_loc
[i
],
4876 if (reg_equiv_constant
[i
])
4882 return (endregno
> i
4883 && regno
< i
+ (i
< FIRST_PSEUDO_REGISTER
4884 ? HARD_REGNO_NREGS (i
, GET_MODE (x
))
4888 /* If this is a SUBREG of a hard reg, we can see exactly which
4889 registers are being modified. Otherwise, handle normally. */
4890 if (GET_CODE (SUBREG_REG (x
)) == REG
4891 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
4893 int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
4895 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
4896 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
4898 return endregno
> inner_regno
&& regno
< inner_endregno
;
4904 if (&SET_DEST (x
) != loc
4905 /* Note setting a SUBREG counts as referring to the REG it is in for
4906 a pseudo but not for hard registers since we can
4907 treat each word individually. */
4908 && ((GET_CODE (SET_DEST (x
)) == SUBREG
4909 && loc
!= &SUBREG_REG (SET_DEST (x
))
4910 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
4911 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
4912 && refers_to_regno_for_reload_p (regno
, endregno
,
4913 SUBREG_REG (SET_DEST (x
)),
4915 || (GET_CODE (SET_DEST (x
)) != REG
4916 && refers_to_regno_for_reload_p (regno
, endregno
,
4917 SET_DEST (x
), loc
))))
4920 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
4926 /* X does not match, so try its subexpressions. */
4928 fmt
= GET_RTX_FORMAT (code
);
4929 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4931 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
4939 if (refers_to_regno_for_reload_p (regno
, endregno
,
4943 else if (fmt
[i
] == 'E')
4946 for (j
= XVECLEN (x
, i
) - 1; j
>=0; j
--)
4947 if (loc
!= &XVECEXP (x
, i
, j
)
4948 && refers_to_regno_for_reload_p (regno
, endregno
,
4949 XVECEXP (x
, i
, j
), loc
))
4956 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
4957 we check if any register number in X conflicts with the relevant register
4958 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
4959 contains a MEM (we don't bother checking for memory addresses that can't
4960 conflict because we expect this to be a rare case.
4962 This function is similar to reg_overlap_mention_p in rtlanal.c except
4963 that we look at equivalences for pseudos that didn't get hard registers. */
4966 reg_overlap_mentioned_for_reload_p (x
, in
)
4969 int regno
, endregno
;
4971 if (GET_CODE (x
) == SUBREG
)
4973 regno
= REGNO (SUBREG_REG (x
));
4974 if (regno
< FIRST_PSEUDO_REGISTER
)
4975 regno
+= SUBREG_WORD (x
);
4977 else if (GET_CODE (x
) == REG
)
4981 /* If this is a pseudo, it must not have been assigned a hard register.
4982 Therefore, it must either be in memory or be a constant. */
4984 if (regno
>= FIRST_PSEUDO_REGISTER
)
4986 if (reg_equiv_memory_loc
[regno
])
4987 return refers_to_mem_for_reload_p (in
);
4988 else if (reg_equiv_constant
[regno
])
4993 else if (CONSTANT_P (x
))
4995 else if (GET_CODE (x
) == MEM
)
4996 return refers_to_mem_for_reload_p (in
);
4997 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
4998 || GET_CODE (x
) == CC0
)
4999 return reg_mentioned_p (x
, in
);
5003 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
5004 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5006 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
5009 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5013 refers_to_mem_for_reload_p (x
)
5019 if (GET_CODE (x
) == MEM
)
5022 if (GET_CODE (x
) == REG
)
5023 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
5024 && reg_equiv_memory_loc
[REGNO (x
)]);
5026 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
5027 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
5029 && (GET_CODE (XEXP (x
, i
)) == MEM
5030 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
5036 /* Check the insns before INSN to see if there is a suitable register
5037 containing the same value as GOAL.
5038 If OTHER is -1, look for a register in class CLASS.
5039 Otherwise, just see if register number OTHER shares GOAL's value.
5041 Return an rtx for the register found, or zero if none is found.
5043 If RELOAD_REG_P is (short *)1,
5044 we reject any hard reg that appears in reload_reg_rtx
5045 because such a hard reg is also needed coming into this insn.
5047 If RELOAD_REG_P is any other nonzero value,
5048 it is a vector indexed by hard reg number
5049 and we reject any hard reg whose element in the vector is nonnegative
5050 as well as any that appears in reload_reg_rtx.
5052 If GOAL is zero, then GOALREG is a register number; we look
5053 for an equivalent for that register.
5055 MODE is the machine mode of the value we want an equivalence for.
5056 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5058 This function is used by jump.c as well as in the reload pass.
5060 If GOAL is the sum of the stack pointer and a constant, we treat it
5061 as if it were a constant except that sp is required to be unchanging. */
5064 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
5067 enum reg_class
class;
5069 short *reload_reg_p
;
5071 enum machine_mode mode
;
5073 register rtx p
= insn
;
5074 rtx goaltry
, valtry
, value
, where
;
5076 register int regno
= -1;
5080 int goal_mem_addr_varies
= 0;
5081 int need_stable_sp
= 0;
5087 else if (GET_CODE (goal
) == REG
)
5088 regno
= REGNO (goal
);
5089 else if (GET_CODE (goal
) == MEM
)
5091 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
5092 if (MEM_VOLATILE_P (goal
))
5094 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
5096 /* An address with side effects must be reexecuted. */
5107 else if (CONSTANT_P (goal
))
5109 else if (GET_CODE (goal
) == PLUS
5110 && XEXP (goal
, 0) == stack_pointer_rtx
5111 && CONSTANT_P (XEXP (goal
, 1)))
5112 goal_const
= need_stable_sp
= 1;
5116 /* On some machines, certain regs must always be rejected
5117 because they don't behave the way ordinary registers do. */
5119 #ifdef OVERLAPPING_REGNO_P
5120 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5121 && OVERLAPPING_REGNO_P (regno
))
5125 /* Scan insns back from INSN, looking for one that copies
5126 a value into or out of GOAL.
5127 Stop and give up if we reach a label. */
5132 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
5134 if (GET_CODE (p
) == INSN
5135 /* If we don't want spill regs ... */
5136 && (! (reload_reg_p
!= 0
5137 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
5138 /* ... then ignore insns introduced by reload; they aren't useful
5139 and can cause results in reload_as_needed to be different
5140 from what they were when calculating the need for spills.
5141 If we notice an input-reload insn here, we will reject it below,
5142 but it might hide a usable equivalent. That makes bad code.
5143 It may even abort: perhaps no reg was spilled for this insn
5144 because it was assumed we would find that equivalent. */
5145 || INSN_UID (p
) < reload_first_uid
))
5148 pat
= single_set (p
);
5149 /* First check for something that sets some reg equal to GOAL. */
5152 && true_regnum (SET_SRC (pat
)) == regno
5153 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5156 && true_regnum (SET_DEST (pat
)) == regno
5157 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
5159 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
5160 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5162 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
5163 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
5165 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
5166 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
5167 /* If we are looking for a constant,
5168 and something equivalent to that constant was copied
5169 into a reg, we can use that reg. */
5170 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5172 && rtx_equal_p (XEXP (tem
, 0), goal
)
5173 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5174 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5176 && GET_CODE (SET_DEST (pat
)) == REG
5177 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5178 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5179 && GET_CODE (goal
) == CONST_INT
5180 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 0, 0,
5182 && rtx_equal_p (goal
, goaltry
)
5183 && (valtry
= operand_subword (SET_DEST (pat
), 0, 0,
5185 && (valueno
= true_regnum (valtry
)) >= 0)
5186 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5188 && GET_CODE (SET_DEST (pat
)) == REG
5189 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5190 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5191 && GET_CODE (goal
) == CONST_INT
5192 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
5194 && rtx_equal_p (goal
, goaltry
)
5196 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
5197 && (valueno
= true_regnum (valtry
)) >= 0)))
5200 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
5201 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
5211 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5212 (or copying VALUE into GOAL, if GOAL is also a register).
5213 Now verify that VALUE is really valid. */
5215 /* VALUENO is the register number of VALUE; a hard register. */
5217 /* Don't try to re-use something that is killed in this insn. We want
5218 to be able to trust REG_UNUSED notes. */
5219 if (find_reg_note (where
, REG_UNUSED
, value
))
5222 /* If we propose to get the value from the stack pointer or if GOAL is
5223 a MEM based on the stack pointer, we need a stable SP. */
5224 if (valueno
== STACK_POINTER_REGNUM
5225 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
5229 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5230 if (GET_MODE (value
) != mode
)
5233 /* Reject VALUE if it was loaded from GOAL
5234 and is also a register that appears in the address of GOAL. */
5236 if (goal_mem
&& value
== SET_DEST (PATTERN (where
))
5237 && refers_to_regno_for_reload_p (valueno
,
5239 + HARD_REGNO_NREGS (valueno
, mode
)),
5243 /* Reject registers that overlap GOAL. */
5245 if (!goal_mem
&& !goal_const
5246 && regno
+ HARD_REGNO_NREGS (regno
, mode
) > valueno
5247 && regno
< valueno
+ HARD_REGNO_NREGS (valueno
, mode
))
5250 /* Reject VALUE if it is one of the regs reserved for reloads.
5251 Reload1 knows how to reuse them anyway, and it would get
5252 confused if we allocated one without its knowledge.
5253 (Now that insns introduced by reload are ignored above,
5254 this case shouldn't happen, but I'm not positive.) */
5256 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1
5257 && reload_reg_p
[valueno
] >= 0)
5260 /* On some machines, certain regs must always be rejected
5261 because they don't behave the way ordinary registers do. */
5263 #ifdef OVERLAPPING_REGNO_P
5264 if (OVERLAPPING_REGNO_P (valueno
))
5268 nregs
= HARD_REGNO_NREGS (regno
, mode
);
5269 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
5271 /* Reject VALUE if it is a register being used for an input reload
5272 even if it is not one of those reserved. */
5274 if (reload_reg_p
!= 0)
5277 for (i
= 0; i
< n_reloads
; i
++)
5278 if (reload_reg_rtx
[i
] != 0 && reload_in
[i
])
5280 int regno1
= REGNO (reload_reg_rtx
[i
]);
5281 int nregs1
= HARD_REGNO_NREGS (regno1
,
5282 GET_MODE (reload_reg_rtx
[i
]));
5283 if (regno1
< valueno
+ valuenregs
5284 && regno1
+ nregs1
> valueno
)
5290 /* We must treat frame pointer as varying here,
5291 since it can vary--in a nonlocal goto as generated by expand_goto. */
5292 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
5294 /* Now verify that the values of GOAL and VALUE remain unaltered
5295 until INSN is reached. */
5304 /* Don't trust the conversion past a function call
5305 if either of the two is in a call-clobbered register, or memory. */
5306 if (GET_CODE (p
) == CALL_INSN
5307 && ((regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5308 && call_used_regs
[regno
])
5310 (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5311 && call_used_regs
[valueno
])
5317 #ifdef INSN_CLOBBERS_REGNO_P
5318 if ((valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5319 && INSN_CLOBBERS_REGNO_P (p
, valueno
))
5320 || (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5321 && INSN_CLOBBERS_REGNO_P (p
, regno
)))
5325 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
5327 /* If this insn P stores in either GOAL or VALUE, return 0.
5328 If GOAL is a memory ref and this insn writes memory, return 0.
5329 If GOAL is a memory ref and its address is not constant,
5330 and this insn P changes a register used in GOAL, return 0. */
5333 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
5335 register rtx dest
= SET_DEST (pat
);
5336 while (GET_CODE (dest
) == SUBREG
5337 || GET_CODE (dest
) == ZERO_EXTRACT
5338 || GET_CODE (dest
) == SIGN_EXTRACT
5339 || GET_CODE (dest
) == STRICT_LOW_PART
)
5340 dest
= XEXP (dest
, 0);
5341 if (GET_CODE (dest
) == REG
)
5343 register int xregno
= REGNO (dest
);
5345 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5346 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5349 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
5351 if (xregno
< valueno
+ valuenregs
5352 && xregno
+ xnregs
> valueno
)
5354 if (goal_mem_addr_varies
5355 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
5358 else if (goal_mem
&& GET_CODE (dest
) == MEM
5359 && ! push_operand (dest
, GET_MODE (dest
)))
5361 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
5364 else if (GET_CODE (pat
) == PARALLEL
)
5367 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
5369 register rtx v1
= XVECEXP (pat
, 0, i
);
5370 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
5372 register rtx dest
= SET_DEST (v1
);
5373 while (GET_CODE (dest
) == SUBREG
5374 || GET_CODE (dest
) == ZERO_EXTRACT
5375 || GET_CODE (dest
) == SIGN_EXTRACT
5376 || GET_CODE (dest
) == STRICT_LOW_PART
)
5377 dest
= XEXP (dest
, 0);
5378 if (GET_CODE (dest
) == REG
)
5380 register int xregno
= REGNO (dest
);
5382 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5383 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5386 if (xregno
< regno
+ nregs
5387 && xregno
+ xnregs
> regno
)
5389 if (xregno
< valueno
+ valuenregs
5390 && xregno
+ xnregs
> valueno
)
5392 if (goal_mem_addr_varies
5393 && reg_overlap_mentioned_for_reload_p (dest
,
5397 else if (goal_mem
&& GET_CODE (dest
) == MEM
5398 && ! push_operand (dest
, GET_MODE (dest
)))
5400 else if (need_stable_sp
5401 && push_operand (dest
, GET_MODE (dest
)))
5408 /* If this insn auto-increments or auto-decrements
5409 either regno or valueno, return 0 now.
5410 If GOAL is a memory ref and its address is not constant,
5411 and this insn P increments a register used in GOAL, return 0. */
5415 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
5416 if (REG_NOTE_KIND (link
) == REG_INC
5417 && GET_CODE (XEXP (link
, 0)) == REG
)
5419 register int incno
= REGNO (XEXP (link
, 0));
5420 if (incno
< regno
+ nregs
&& incno
>= regno
)
5422 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
5424 if (goal_mem_addr_varies
5425 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
5435 /* Find a place where INCED appears in an increment or decrement operator
5436 within X, and return the amount INCED is incremented or decremented by.
5437 The value is always positive. */
5440 find_inc_amount (x
, inced
)
5443 register enum rtx_code code
= GET_CODE (x
);
5449 register rtx addr
= XEXP (x
, 0);
5450 if ((GET_CODE (addr
) == PRE_DEC
5451 || GET_CODE (addr
) == POST_DEC
5452 || GET_CODE (addr
) == PRE_INC
5453 || GET_CODE (addr
) == POST_INC
)
5454 && XEXP (addr
, 0) == inced
)
5455 return GET_MODE_SIZE (GET_MODE (x
));
5458 fmt
= GET_RTX_FORMAT (code
);
5459 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5463 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
5470 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
5472 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
5482 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5485 regno_clobbered_p (regno
, insn
)
5489 if (GET_CODE (PATTERN (insn
)) == CLOBBER
5490 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
5491 return REGNO (XEXP (PATTERN (insn
), 0)) == regno
;
5493 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
5495 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
5499 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
5500 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
5501 && REGNO (XEXP (elt
, 0)) == regno
)