1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
93 #include "insn-config.h"
94 #include "insn-codes.h"
98 #include "hard-reg-set.h"
102 #include "function.h"
106 #ifndef REGISTER_MOVE_COST
107 #define REGISTER_MOVE_COST(x, y) 2
110 #ifndef REGNO_MODE_OK_FOR_BASE_P
111 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
114 #ifndef REG_MODE_OK_FOR_BASE_P
115 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
118 /* All reloads of the current insn are recorded here. See reload.h for
121 struct reload rld
[MAX_RELOADS
];
123 /* All the "earlyclobber" operands of the current insn
124 are recorded here. */
126 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
128 int reload_n_operands
;
130 /* Replacing reloads.
132 If `replace_reloads' is nonzero, then as each reload is recorded
133 an entry is made for it in the table `replacements'.
134 Then later `subst_reloads' can look through that table and
135 perform all the replacements needed. */
137 /* Nonzero means record the places to replace. */
138 static int replace_reloads
;
140 /* Each replacement is recorded with a structure like this. */
143 rtx
*where
; /* Location to store in */
144 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
145 a SUBREG; 0 otherwise. */
146 int what
; /* which reload this is for */
147 enum machine_mode mode
; /* mode it must have */
150 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
152 /* Number of replacements currently recorded. */
153 static int n_replacements
;
155 /* Used to track what is modified by an operand. */
158 int reg_flag
; /* Nonzero if referencing a register. */
159 int safe
; /* Nonzero if this can't conflict with anything. */
160 rtx base
; /* Base address for MEM. */
161 HOST_WIDE_INT start
; /* Starting offset or register number. */
162 HOST_WIDE_INT end
; /* Ending offset or register number. */
165 #ifdef SECONDARY_MEMORY_NEEDED
167 /* Save MEMs needed to copy from one class of registers to another. One MEM
168 is used per mode, but normally only one or two modes are ever used.
170 We keep two versions, before and after register elimination. The one
171 after register elimination is record separately for each operand. This
172 is done in case the address is not valid to be sure that we separately
175 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
176 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
179 /* The instruction we are doing reloads for;
180 so we can test whether a register dies in it. */
181 static rtx this_insn
;
183 /* Nonzero if this instruction is a user-specified asm with operands. */
184 static int this_insn_is_asm
;
186 /* If hard_regs_live_known is nonzero,
187 we can tell which hard regs are currently live,
188 at least enough to succeed in choosing dummy reloads. */
189 static int hard_regs_live_known
;
191 /* Indexed by hard reg number,
192 element is nonnegative if hard reg has been spilled.
193 This vector is passed to `find_reloads' as an argument
194 and is not changed here. */
195 static short *static_reload_reg_p
;
197 /* Set to 1 in subst_reg_equivs if it changes anything. */
198 static int subst_reg_equivs_changed
;
200 /* On return from push_reload, holds the reload-number for the OUT
201 operand, which can be different for that from the input operand. */
202 static int output_reloadnum
;
204 /* Compare two RTX's. */
205 #define MATCHES(x, y) \
206 (x == y || (x != 0 && (GET_CODE (x) == REG \
207 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
208 : rtx_equal_p (x, y) && ! side_effects_p (x))))
210 /* Indicates if two reloads purposes are for similar enough things that we
211 can merge their reloads. */
212 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
213 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
214 || ((when1) == (when2) && (op1) == (op2)) \
215 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
216 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
217 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
218 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
219 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
221 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
222 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
223 ((when1) != (when2) \
224 || ! ((op1) == (op2) \
225 || (when1) == RELOAD_FOR_INPUT \
226 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
227 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
229 /* If we are going to reload an address, compute the reload type to
231 #define ADDR_TYPE(type) \
232 ((type) == RELOAD_FOR_INPUT_ADDRESS \
233 ? RELOAD_FOR_INPADDR_ADDRESS \
234 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
235 ? RELOAD_FOR_OUTADDR_ADDRESS \
238 #ifdef HAVE_SECONDARY_RELOADS
239 static int push_secondary_reload
PARAMS ((int, rtx
, int, int, enum reg_class
,
240 enum machine_mode
, enum reload_type
,
243 static enum reg_class find_valid_class
PARAMS ((enum machine_mode
, int));
244 static int reload_inner_reg_of_subreg
PARAMS ((rtx
, enum machine_mode
));
245 static int push_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
246 enum machine_mode
, enum machine_mode
,
247 int, int, int, enum reload_type
));
248 static void push_replacement
PARAMS ((rtx
*, int, enum machine_mode
));
249 static void combine_reloads
PARAMS ((void));
250 static int find_reusable_reload
PARAMS ((rtx
*, rtx
, enum reg_class
,
251 enum reload_type
, int, int));
252 static rtx find_dummy_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*,
253 enum machine_mode
, enum machine_mode
,
254 enum reg_class
, int, int));
255 static int hard_reg_set_here_p
PARAMS ((unsigned int, unsigned int, rtx
));
256 static struct decomposition decompose
PARAMS ((rtx
));
257 static int immune_p
PARAMS ((rtx
, rtx
, struct decomposition
));
258 static int alternative_allows_memconst
PARAMS ((const char *, int));
259 static rtx find_reloads_toplev
PARAMS ((rtx
, int, enum reload_type
, int,
261 static rtx make_memloc
PARAMS ((rtx
, int));
262 static int find_reloads_address
PARAMS ((enum machine_mode
, rtx
*, rtx
, rtx
*,
263 int, enum reload_type
, int, rtx
));
264 static rtx subst_reg_equivs
PARAMS ((rtx
, rtx
));
265 static rtx subst_indexed_address
PARAMS ((rtx
));
266 static int find_reloads_address_1
PARAMS ((enum machine_mode
, rtx
, int, rtx
*,
267 int, enum reload_type
,int, rtx
));
268 static void find_reloads_address_part
PARAMS ((rtx
, rtx
*, enum reg_class
,
269 enum machine_mode
, int,
270 enum reload_type
, int));
271 static rtx find_reloads_subreg_address
PARAMS ((rtx
, int, int, enum reload_type
,
273 static int find_inc_amount
PARAMS ((rtx
, rtx
));
275 #ifdef HAVE_SECONDARY_RELOADS
277 /* Determine if any secondary reloads are needed for loading (if IN_P is
278 non-zero) or storing (if IN_P is zero) X to or from a reload register of
279 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
280 are needed, push them.
282 Return the reload number of the secondary reload we made, or -1 if
283 we didn't need one. *PICODE is set to the insn_code to use if we do
284 need a secondary reload. */
287 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
293 enum reg_class reload_class
;
294 enum machine_mode reload_mode
;
295 enum reload_type type
;
296 enum insn_code
*picode
;
298 enum reg_class
class = NO_REGS
;
299 enum machine_mode mode
= reload_mode
;
300 enum insn_code icode
= CODE_FOR_nothing
;
301 enum reg_class t_class
= NO_REGS
;
302 enum machine_mode t_mode
= VOIDmode
;
303 enum insn_code t_icode
= CODE_FOR_nothing
;
304 enum reload_type secondary_type
;
305 int s_reload
, t_reload
= -1;
307 if (type
== RELOAD_FOR_INPUT_ADDRESS
308 || type
== RELOAD_FOR_OUTPUT_ADDRESS
309 || type
== RELOAD_FOR_INPADDR_ADDRESS
310 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
311 secondary_type
= type
;
313 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
315 *picode
= CODE_FOR_nothing
;
317 /* If X is a paradoxical SUBREG, use the inner value to determine both the
318 mode and object being reloaded. */
319 if (GET_CODE (x
) == SUBREG
320 && (GET_MODE_SIZE (GET_MODE (x
))
321 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
324 reload_mode
= GET_MODE (x
);
327 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
328 is still a pseudo-register by now, it *must* have an equivalent MEM
329 but we don't want to assume that), use that equivalent when seeing if
330 a secondary reload is needed since whether or not a reload is needed
331 might be sensitive to the form of the MEM. */
333 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
334 && reg_equiv_mem
[REGNO (x
)] != 0)
335 x
= reg_equiv_mem
[REGNO (x
)];
337 #ifdef SECONDARY_INPUT_RELOAD_CLASS
339 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
342 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
344 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
347 /* If we don't need any secondary registers, done. */
348 if (class == NO_REGS
)
351 /* Get a possible insn to use. If the predicate doesn't accept X, don't
354 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
355 : reload_out_optab
[(int) reload_mode
]);
357 if (icode
!= CODE_FOR_nothing
358 && insn_data
[(int) icode
].operand
[in_p
].predicate
359 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
360 icode
= CODE_FOR_nothing
;
362 /* If we will be using an insn, see if it can directly handle the reload
363 register we will be using. If it can, the secondary reload is for a
364 scratch register. If it can't, we will use the secondary reload for
365 an intermediate register and require a tertiary reload for the scratch
368 if (icode
!= CODE_FOR_nothing
)
370 /* If IN_P is non-zero, the reload register will be the output in
371 operand 0. If IN_P is zero, the reload register will be the input
372 in operand 1. Outputs should have an initial "=", which we must
376 = insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
377 enum reg_class insn_class
378 = (insn_letter
== 'r' ? GENERAL_REGS
379 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter
));
381 if (insn_class
== NO_REGS
383 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
384 /* The scratch register's constraint must start with "=&". */
385 || insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
386 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
389 if (reg_class_subset_p (reload_class
, insn_class
))
390 mode
= insn_data
[(int) icode
].operand
[2].mode
;
393 char t_letter
= insn_data
[(int) icode
].operand
[2].constraint
[2];
395 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
396 t_class
= (t_letter
== 'r' ? GENERAL_REGS
397 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter
));
399 icode
= CODE_FOR_nothing
;
403 /* This case isn't valid, so fail. Reload is allowed to use the same
404 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
405 in the case of a secondary register, we actually need two different
406 registers for correct code. We fail here to prevent the possibility of
407 silently generating incorrect code later.
409 The convention is that secondary input reloads are valid only if the
410 secondary_class is different from class. If you have such a case, you
411 can not use secondary reloads, you must work around the problem some
414 Allow this when a reload_in/out pattern is being used. I.e. assume
415 that the generated code handles this case. */
417 if (in_p
&& class == reload_class
&& icode
== CODE_FOR_nothing
418 && t_icode
== CODE_FOR_nothing
)
421 /* If we need a tertiary reload, see if we have one we can reuse or else
424 if (t_class
!= NO_REGS
)
426 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
427 if (rld
[t_reload
].secondary_p
428 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
429 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
430 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
431 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
432 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
433 == CODE_FOR_nothing
))
434 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
435 == CODE_FOR_nothing
)))
436 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
437 && MERGABLE_RELOADS (secondary_type
,
438 rld
[t_reload
].when_needed
,
439 opnum
, rld
[t_reload
].opnum
))
442 rld
[t_reload
].inmode
= t_mode
;
444 rld
[t_reload
].outmode
= t_mode
;
446 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
447 rld
[t_reload
].class = t_class
;
449 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
450 rld
[t_reload
].optional
&= optional
;
451 rld
[t_reload
].secondary_p
= 1;
452 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
453 opnum
, rld
[t_reload
].opnum
))
454 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
457 if (t_reload
== n_reloads
)
459 /* We need to make a new tertiary reload for this register class. */
460 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
461 rld
[t_reload
].class = t_class
;
462 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
463 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
464 rld
[t_reload
].reg_rtx
= 0;
465 rld
[t_reload
].optional
= optional
;
466 rld
[t_reload
].inc
= 0;
467 /* Maybe we could combine these, but it seems too tricky. */
468 rld
[t_reload
].nocombine
= 1;
469 rld
[t_reload
].in_reg
= 0;
470 rld
[t_reload
].out_reg
= 0;
471 rld
[t_reload
].opnum
= opnum
;
472 rld
[t_reload
].when_needed
= secondary_type
;
473 rld
[t_reload
].secondary_in_reload
= -1;
474 rld
[t_reload
].secondary_out_reload
= -1;
475 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
476 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
477 rld
[t_reload
].secondary_p
= 1;
483 /* See if we can reuse an existing secondary reload. */
484 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
485 if (rld
[s_reload
].secondary_p
486 && (reg_class_subset_p (class, rld
[s_reload
].class)
487 || reg_class_subset_p (rld
[s_reload
].class, class))
488 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
489 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
490 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
491 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
492 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
493 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
494 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
495 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
496 opnum
, rld
[s_reload
].opnum
))
499 rld
[s_reload
].inmode
= mode
;
501 rld
[s_reload
].outmode
= mode
;
503 if (reg_class_subset_p (class, rld
[s_reload
].class))
504 rld
[s_reload
].class = class;
506 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
507 rld
[s_reload
].optional
&= optional
;
508 rld
[s_reload
].secondary_p
= 1;
509 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
510 opnum
, rld
[s_reload
].opnum
))
511 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
514 if (s_reload
== n_reloads
)
516 #ifdef SECONDARY_MEMORY_NEEDED
517 /* If we need a memory location to copy between the two reload regs,
518 set it up now. Note that we do the input case before making
519 the reload and the output case after. This is due to the
520 way reloads are output. */
522 if (in_p
&& icode
== CODE_FOR_nothing
523 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
525 get_secondary_mem (x
, reload_mode
, opnum
, type
);
527 /* We may have just added new reloads. Make sure we add
528 the new reload at the end. */
529 s_reload
= n_reloads
;
533 /* We need to make a new secondary reload for this register class. */
534 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
535 rld
[s_reload
].class = class;
537 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
538 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
539 rld
[s_reload
].reg_rtx
= 0;
540 rld
[s_reload
].optional
= optional
;
541 rld
[s_reload
].inc
= 0;
542 /* Maybe we could combine these, but it seems too tricky. */
543 rld
[s_reload
].nocombine
= 1;
544 rld
[s_reload
].in_reg
= 0;
545 rld
[s_reload
].out_reg
= 0;
546 rld
[s_reload
].opnum
= opnum
;
547 rld
[s_reload
].when_needed
= secondary_type
;
548 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
549 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
550 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
551 rld
[s_reload
].secondary_out_icode
552 = ! in_p
? t_icode
: CODE_FOR_nothing
;
553 rld
[s_reload
].secondary_p
= 1;
557 #ifdef SECONDARY_MEMORY_NEEDED
558 if (! in_p
&& icode
== CODE_FOR_nothing
559 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
560 get_secondary_mem (x
, mode
, opnum
, type
);
567 #endif /* HAVE_SECONDARY_RELOADS */
569 #ifdef SECONDARY_MEMORY_NEEDED
571 /* Return a memory location that will be used to copy X in mode MODE.
572 If we haven't already made a location for this mode in this insn,
573 call find_reloads_address on the location being returned. */
576 get_secondary_mem (x
, mode
, opnum
, type
)
577 rtx x ATTRIBUTE_UNUSED
;
578 enum machine_mode mode
;
580 enum reload_type type
;
585 /* By default, if MODE is narrower than a word, widen it to a word.
586 This is required because most machines that require these memory
587 locations do not support short load and stores from all registers
588 (e.g., FP registers). */
590 #ifdef SECONDARY_MEMORY_NEEDED_MODE
591 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
593 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
594 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
597 /* If we already have made a MEM for this operand in MODE, return it. */
598 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
599 return secondary_memlocs_elim
[(int) mode
][opnum
];
601 /* If this is the first time we've tried to get a MEM for this mode,
602 allocate a new one. `something_changed' in reload will get set
603 by noticing that the frame size has changed. */
605 if (secondary_memlocs
[(int) mode
] == 0)
607 #ifdef SECONDARY_MEMORY_NEEDED_RTX
608 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
610 secondary_memlocs
[(int) mode
]
611 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
615 /* Get a version of the address doing any eliminations needed. If that
616 didn't give us a new MEM, make a new one if it isn't valid. */
618 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
619 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
621 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
622 loc
= copy_rtx (loc
);
624 /* The only time the call below will do anything is if the stack
625 offset is too large. In that case IND_LEVELS doesn't matter, so we
626 can just pass a zero. Adjust the type to be the address of the
627 corresponding object. If the address was valid, save the eliminated
628 address. If it wasn't valid, we need to make a reload each time, so
633 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
634 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
637 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
641 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
645 /* Clear any secondary memory locations we've made. */
648 clear_secondary_mem ()
650 bzero ((char *) secondary_memlocs
, sizeof secondary_memlocs
);
652 #endif /* SECONDARY_MEMORY_NEEDED */
654 /* Find the largest class for which every register number plus N is valid in
655 M1 (if in range). Abort if no such class exists. */
657 static enum reg_class
658 find_valid_class (m1
, n
)
659 enum machine_mode m1 ATTRIBUTE_UNUSED
;
664 enum reg_class best_class
= NO_REGS
;
665 unsigned int best_size
= 0;
667 for (class = 1; class < N_REG_CLASSES
; class++)
670 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
671 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
672 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
673 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
676 if (! bad
&& reg_class_size
[class] > best_size
)
677 best_class
= class, best_size
= reg_class_size
[class];
686 /* Return the number of a previously made reload that can be combined with
687 a new one, or n_reloads if none of the existing reloads can be used.
688 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
689 push_reload, they determine the kind of the new reload that we try to
690 combine. P_IN points to the corresponding value of IN, which can be
691 modified by this function.
692 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
694 find_reusable_reload (p_in
, out
, class, type
, opnum
, dont_share
)
696 enum reg_class
class;
697 enum reload_type type
;
698 int opnum
, dont_share
;
702 /* We can't merge two reloads if the output of either one is
705 if (earlyclobber_operand_p (out
))
708 /* We can use an existing reload if the class is right
709 and at least one of IN and OUT is a match
710 and the other is at worst neutral.
711 (A zero compared against anything is neutral.)
713 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
714 for the same thing since that can cause us to need more reload registers
715 than we otherwise would. */
717 for (i
= 0; i
< n_reloads
; i
++)
718 if ((reg_class_subset_p (class, rld
[i
].class)
719 || reg_class_subset_p (rld
[i
].class, class))
720 /* If the existing reload has a register, it must fit our class. */
721 && (rld
[i
].reg_rtx
== 0
722 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
723 true_regnum (rld
[i
].reg_rtx
)))
724 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
725 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
726 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
727 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
728 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
729 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
730 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
733 /* Reloading a plain reg for input can match a reload to postincrement
734 that reg, since the postincrement's value is the right value.
735 Likewise, it can match a preincrement reload, since we regard
736 the preincrementation as happening before any ref in this insn
738 for (i
= 0; i
< n_reloads
; i
++)
739 if ((reg_class_subset_p (class, rld
[i
].class)
740 || reg_class_subset_p (rld
[i
].class, class))
741 /* If the existing reload has a register, it must fit our
743 && (rld
[i
].reg_rtx
== 0
744 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
745 true_regnum (rld
[i
].reg_rtx
)))
746 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
747 && ((GET_CODE (in
) == REG
748 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == 'a'
749 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
750 || (GET_CODE (rld
[i
].in
) == REG
751 && GET_RTX_CLASS (GET_CODE (in
)) == 'a'
752 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
753 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
754 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
755 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
756 opnum
, rld
[i
].opnum
))
758 /* Make sure reload_in ultimately has the increment,
759 not the plain register. */
760 if (GET_CODE (in
) == REG
)
767 /* Return nonzero if X is a SUBREG which will require reloading of its
768 SUBREG_REG expression. */
771 reload_inner_reg_of_subreg (x
, mode
)
773 enum machine_mode mode
;
777 /* Only SUBREGs are problematical. */
778 if (GET_CODE (x
) != SUBREG
)
781 inner
= SUBREG_REG (x
);
783 /* If INNER is a constant, then INNER must be reloaded. */
784 if (CONSTANT_P (inner
))
787 /* If INNER is not a hard register, then INNER will not need to
789 if (GET_CODE (inner
) != REG
790 || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
793 /* If INNER is not ok for MODE, then INNER will need reloading. */
794 if (! HARD_REGNO_MODE_OK (REGNO (inner
) + SUBREG_WORD (x
), mode
))
797 /* If the outer part is a word or smaller, INNER larger than a
798 word and the number of regs for INNER is not the same as the
799 number of words in INNER, then INNER will need reloading. */
800 return (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
801 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
802 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
803 != HARD_REGNO_NREGS (REGNO (inner
), GET_MODE (inner
))));
806 /* Record one reload that needs to be performed.
807 IN is an rtx saying where the data are to be found before this instruction.
808 OUT says where they must be stored after the instruction.
809 (IN is zero for data not read, and OUT is zero for data not written.)
810 INLOC and OUTLOC point to the places in the instructions where
811 IN and OUT were found.
812 If IN and OUT are both non-zero, it means the same register must be used
813 to reload both IN and OUT.
815 CLASS is a register class required for the reloaded data.
816 INMODE is the machine mode that the instruction requires
817 for the reg that replaces IN and OUTMODE is likewise for OUT.
819 If IN is zero, then OUT's location and mode should be passed as
822 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
824 OPTIONAL nonzero means this reload does not need to be performed:
825 it can be discarded if that is more convenient.
827 OPNUM and TYPE say what the purpose of this reload is.
829 The return value is the reload-number for this reload.
831 If both IN and OUT are nonzero, in some rare cases we might
832 want to make two separate reloads. (Actually we never do this now.)
833 Therefore, the reload-number for OUT is stored in
834 output_reloadnum when we return; the return value applies to IN.
835 Usually (presently always), when IN and OUT are nonzero,
836 the two reload-numbers are equal, but the caller should be careful to
840 push_reload (in
, out
, inloc
, outloc
, class,
841 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
844 enum reg_class
class;
845 enum machine_mode inmode
, outmode
;
849 enum reload_type type
;
853 int dont_remove_subreg
= 0;
854 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
855 int secondary_in_reload
= -1, secondary_out_reload
= -1;
856 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
857 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
859 /* INMODE and/or OUTMODE could be VOIDmode if no mode
860 has been specified for the operand. In that case,
861 use the operand's mode as the mode to reload. */
862 if (inmode
== VOIDmode
&& in
!= 0)
863 inmode
= GET_MODE (in
);
864 if (outmode
== VOIDmode
&& out
!= 0)
865 outmode
= GET_MODE (out
);
867 /* If IN is a pseudo register everywhere-equivalent to a constant, and
868 it is not in a hard register, reload straight from the constant,
869 since we want to get rid of such pseudo registers.
870 Often this is done earlier, but not always in find_reloads_address. */
871 if (in
!= 0 && GET_CODE (in
) == REG
)
873 register int regno
= REGNO (in
);
875 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
876 && reg_equiv_constant
[regno
] != 0)
877 in
= reg_equiv_constant
[regno
];
880 /* Likewise for OUT. Of course, OUT will never be equivalent to
881 an actual constant, but it might be equivalent to a memory location
882 (in the case of a parameter). */
883 if (out
!= 0 && GET_CODE (out
) == REG
)
885 register int regno
= REGNO (out
);
887 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
888 && reg_equiv_constant
[regno
] != 0)
889 out
= reg_equiv_constant
[regno
];
892 /* If we have a read-write operand with an address side-effect,
893 change either IN or OUT so the side-effect happens only once. */
894 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
896 if (GET_CODE (XEXP (in
, 0)) == POST_INC
897 || GET_CODE (XEXP (in
, 0)) == POST_DEC
898 || GET_CODE (XEXP (in
, 0)) == POST_MODIFY
)
900 rtx
new = gen_rtx_MEM (GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
902 MEM_COPY_ATTRIBUTES (new, in
);
905 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
906 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
907 || GET_CODE (XEXP (in
, 0)) == PRE_MODIFY
)
909 rtx
new = gen_rtx_MEM (GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
911 MEM_COPY_ATTRIBUTES (new, out
);
916 /* If we are reloading a (SUBREG constant ...), really reload just the
917 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
918 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
919 a pseudo and hence will become a MEM) with M1 wider than M2 and the
920 register is a pseudo, also reload the inside expression.
921 For machines that extend byte loads, do this for any SUBREG of a pseudo
922 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
923 M2 is an integral mode that gets extended when loaded.
924 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
925 either M1 is not valid for R or M2 is wider than a word but we only
926 need one word to store an M2-sized quantity in R.
927 (However, if OUT is nonzero, we need to reload the reg *and*
928 the subreg, so do nothing here, and let following statement handle it.)
930 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
931 we can't handle it here because CONST_INT does not indicate a mode.
933 Similarly, we must reload the inside expression if we have a
934 STRICT_LOW_PART (presumably, in == out in the cas).
936 Also reload the inner expression if it does not require a secondary
937 reload but the SUBREG does.
939 Finally, reload the inner expression if it is a register that is in
940 the class whose registers cannot be referenced in a different size
941 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
942 cannot reload just the inside since we might end up with the wrong
943 register class. But if it is inside a STRICT_LOW_PART, we have
944 no choice, so we hope we do get the right register class there. */
946 if (in
!= 0 && GET_CODE (in
) == SUBREG
947 && (SUBREG_WORD (in
) == 0 || strict_low
)
948 #ifdef CLASS_CANNOT_CHANGE_MODE
949 && class != CLASS_CANNOT_CHANGE_MODE
951 && (CONSTANT_P (SUBREG_REG (in
))
952 || GET_CODE (SUBREG_REG (in
)) == PLUS
954 || (((GET_CODE (SUBREG_REG (in
)) == REG
955 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
956 || GET_CODE (SUBREG_REG (in
)) == MEM
)
957 && ((GET_MODE_SIZE (inmode
)
958 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
959 #ifdef LOAD_EXTEND_OP
960 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
961 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
963 && (GET_MODE_SIZE (inmode
)
964 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
965 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
966 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
968 #ifdef WORD_REGISTER_OPERATIONS
969 || ((GET_MODE_SIZE (inmode
)
970 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
971 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
972 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
976 || (GET_CODE (SUBREG_REG (in
)) == REG
977 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
978 /* The case where out is nonzero
979 is handled differently in the following statement. */
980 && (out
== 0 || SUBREG_WORD (in
) == 0)
981 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
982 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
984 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
986 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
987 GET_MODE (SUBREG_REG (in
)))))
988 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in
))
991 #ifdef SECONDARY_INPUT_RELOAD_CLASS
992 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
993 && (SECONDARY_INPUT_RELOAD_CLASS (class,
994 GET_MODE (SUBREG_REG (in
)),
998 #ifdef CLASS_CANNOT_CHANGE_MODE
999 || (GET_CODE (SUBREG_REG (in
)) == REG
1000 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1001 && (TEST_HARD_REG_BIT
1002 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1003 REGNO (SUBREG_REG (in
))))
1004 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)),
1009 in_subreg_loc
= inloc
;
1010 inloc
= &SUBREG_REG (in
);
1012 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1013 if (GET_CODE (in
) == MEM
)
1014 /* This is supposed to happen only for paradoxical subregs made by
1015 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1016 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
1019 inmode
= GET_MODE (in
);
1022 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1023 either M1 is not valid for R or M2 is wider than a word but we only
1024 need one word to store an M2-sized quantity in R.
1026 However, we must reload the inner reg *as well as* the subreg in
1029 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1030 code above. This can happen if SUBREG_WORD != 0. */
1032 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
))
1034 /* This relies on the fact that emit_reload_insns outputs the
1035 instructions for input reloads of type RELOAD_OTHER in the same
1036 order as the reloads. Thus if the outer reload is also of type
1037 RELOAD_OTHER, we are guaranteed that this inner reload will be
1038 output before the outer reload. */
1039 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), NULL_PTR
,
1040 find_valid_class (inmode
, SUBREG_WORD (in
)),
1041 VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1042 dont_remove_subreg
= 1;
1045 /* Similarly for paradoxical and problematical SUBREGs on the output.
1046 Note that there is no reason we need worry about the previous value
1047 of SUBREG_REG (out); even if wider than out,
1048 storing in a subreg is entitled to clobber it all
1049 (except in the case of STRICT_LOW_PART,
1050 and in that case the constraint should label it input-output.) */
1051 if (out
!= 0 && GET_CODE (out
) == SUBREG
1052 && (SUBREG_WORD (out
) == 0 || strict_low
)
1053 #ifdef CLASS_CANNOT_CHANGE_MODE
1054 && class != CLASS_CANNOT_CHANGE_MODE
1056 && (CONSTANT_P (SUBREG_REG (out
))
1058 || (((GET_CODE (SUBREG_REG (out
)) == REG
1059 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1060 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1061 && ((GET_MODE_SIZE (outmode
)
1062 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1063 #ifdef WORD_REGISTER_OPERATIONS
1064 || ((GET_MODE_SIZE (outmode
)
1065 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1066 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1067 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1071 || (GET_CODE (SUBREG_REG (out
)) == REG
1072 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1073 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1074 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1076 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1078 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1079 GET_MODE (SUBREG_REG (out
)))))
1080 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out
))
1081 + SUBREG_WORD (out
)),
1083 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1084 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1085 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1086 GET_MODE (SUBREG_REG (out
)),
1090 #ifdef CLASS_CANNOT_CHANGE_MODE
1091 || (GET_CODE (SUBREG_REG (out
)) == REG
1092 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1093 && (TEST_HARD_REG_BIT
1094 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1095 REGNO (SUBREG_REG (out
))))
1096 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1101 out_subreg_loc
= outloc
;
1102 outloc
= &SUBREG_REG (out
);
1104 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1105 if (GET_CODE (out
) == MEM
1106 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1109 outmode
= GET_MODE (out
);
1112 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1113 either M1 is not valid for R or M2 is wider than a word but we only
1114 need one word to store an M2-sized quantity in R.
1116 However, we must reload the inner reg *as well as* the subreg in
1117 that case. In this case, the inner reg is an in-out reload. */
1119 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
))
1121 /* This relies on the fact that emit_reload_insns outputs the
1122 instructions for output reloads of type RELOAD_OTHER in reverse
1123 order of the reloads. Thus if the outer reload is also of type
1124 RELOAD_OTHER, we are guaranteed that this inner reload will be
1125 output after the outer reload. */
1126 dont_remove_subreg
= 1;
1127 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1129 find_valid_class (outmode
, SUBREG_WORD (out
)),
1130 VOIDmode
, VOIDmode
, 0, 0,
1131 opnum
, RELOAD_OTHER
);
1134 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1135 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1136 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1137 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1140 /* If IN is a SUBREG of a hard register, make a new REG. This
1141 simplifies some of the cases below. */
1143 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1144 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1145 && ! dont_remove_subreg
)
1146 in
= gen_rtx_REG (GET_MODE (in
),
1147 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
1149 /* Similarly for OUT. */
1150 if (out
!= 0 && GET_CODE (out
) == SUBREG
1151 && GET_CODE (SUBREG_REG (out
)) == REG
1152 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1153 && ! dont_remove_subreg
)
1154 out
= gen_rtx_REG (GET_MODE (out
),
1155 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
1157 /* Narrow down the class of register wanted if that is
1158 desirable on this machine for efficiency. */
1160 class = PREFERRED_RELOAD_CLASS (in
, class);
1162 /* Output reloads may need analogous treatment, different in detail. */
1163 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1165 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1168 /* Make sure we use a class that can handle the actual pseudo
1169 inside any subreg. For example, on the 386, QImode regs
1170 can appear within SImode subregs. Although GENERAL_REGS
1171 can handle SImode, QImode needs a smaller class. */
1172 #ifdef LIMIT_RELOAD_CLASS
1174 class = LIMIT_RELOAD_CLASS (inmode
, class);
1175 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1176 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1179 class = LIMIT_RELOAD_CLASS (outmode
, class);
1180 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1181 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1184 /* Verify that this class is at least possible for the mode that
1186 if (this_insn_is_asm
)
1188 enum machine_mode mode
;
1189 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1193 if (mode
== VOIDmode
)
1195 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1200 outmode
= word_mode
;
1202 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1203 if (HARD_REGNO_MODE_OK (i
, mode
)
1204 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1206 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1209 for (j
= 1; j
< nregs
; j
++)
1210 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1215 if (i
== FIRST_PSEUDO_REGISTER
)
1217 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1222 /* Optional output reloads are always OK even if we have no register class,
1223 since the function of these reloads is only to have spill_reg_store etc.
1224 set, so that the storing insn can be deleted later. */
1225 if (class == NO_REGS
1226 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1229 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1233 /* See if we need a secondary reload register to move between CLASS
1234 and IN or CLASS and OUT. Get the icode and push any required reloads
1235 needed for each of them if so. */
1237 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1240 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1241 &secondary_in_icode
);
1244 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1245 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1246 secondary_out_reload
1247 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1248 type
, &secondary_out_icode
);
1251 /* We found no existing reload suitable for re-use.
1252 So add an additional reload. */
1254 #ifdef SECONDARY_MEMORY_NEEDED
1255 /* If a memory location is needed for the copy, make one. */
1256 if (in
!= 0 && GET_CODE (in
) == REG
1257 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1258 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1260 get_secondary_mem (in
, inmode
, opnum
, type
);
1266 rld
[i
].class = class;
1267 rld
[i
].inmode
= inmode
;
1268 rld
[i
].outmode
= outmode
;
1270 rld
[i
].optional
= optional
;
1272 rld
[i
].nocombine
= 0;
1273 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1274 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1275 rld
[i
].opnum
= opnum
;
1276 rld
[i
].when_needed
= type
;
1277 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1278 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1279 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1280 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1281 rld
[i
].secondary_p
= 0;
1285 #ifdef SECONDARY_MEMORY_NEEDED
1286 if (out
!= 0 && GET_CODE (out
) == REG
1287 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1288 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1290 get_secondary_mem (out
, outmode
, opnum
, type
);
1295 /* We are reusing an existing reload,
1296 but we may have additional information for it.
1297 For example, we may now have both IN and OUT
1298 while the old one may have just one of them. */
1300 /* The modes can be different. If they are, we want to reload in
1301 the larger mode, so that the value is valid for both modes. */
1302 if (inmode
!= VOIDmode
1303 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1304 rld
[i
].inmode
= inmode
;
1305 if (outmode
!= VOIDmode
1306 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1307 rld
[i
].outmode
= outmode
;
1310 rtx in_reg
= inloc
? *inloc
: 0;
1311 /* If we merge reloads for two distinct rtl expressions that
1312 are identical in content, there might be duplicate address
1313 reloads. Remove the extra set now, so that if we later find
1314 that we can inherit this reload, we can get rid of the
1315 address reloads altogether.
1317 Do not do this if both reloads are optional since the result
1318 would be an optional reload which could potentially leave
1319 unresolved address replacements.
1321 It is not sufficient to call transfer_replacements since
1322 choose_reload_regs will remove the replacements for address
1323 reloads of inherited reloads which results in the same
1325 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1326 && ! (rld
[i
].optional
&& optional
))
1328 /* We must keep the address reload with the lower operand
1330 if (opnum
> rld
[i
].opnum
)
1332 remove_address_replacements (in
);
1334 in_reg
= rld
[i
].in_reg
;
1337 remove_address_replacements (rld
[i
].in
);
1340 rld
[i
].in_reg
= in_reg
;
1345 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1347 if (reg_class_subset_p (class, rld
[i
].class))
1348 rld
[i
].class = class;
1349 rld
[i
].optional
&= optional
;
1350 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1351 opnum
, rld
[i
].opnum
))
1352 rld
[i
].when_needed
= RELOAD_OTHER
;
1353 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1356 /* If the ostensible rtx being reload differs from the rtx found
1357 in the location to substitute, this reload is not safe to combine
1358 because we cannot reliably tell whether it appears in the insn. */
1360 if (in
!= 0 && in
!= *inloc
)
1361 rld
[i
].nocombine
= 1;
1364 /* This was replaced by changes in find_reloads_address_1 and the new
1365 function inc_for_reload, which go with a new meaning of reload_inc. */
1367 /* If this is an IN/OUT reload in an insn that sets the CC,
1368 it must be for an autoincrement. It doesn't work to store
1369 the incremented value after the insn because that would clobber the CC.
1370 So we must do the increment of the value reloaded from,
1371 increment it, store it back, then decrement again. */
1372 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1376 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1377 /* If we did not find a nonzero amount-to-increment-by,
1378 that contradicts the belief that IN is being incremented
1379 in an address in this insn. */
1380 if (rld
[i
].inc
== 0)
1385 /* If we will replace IN and OUT with the reload-reg,
1386 record where they are located so that substitution need
1387 not do a tree walk. */
1389 if (replace_reloads
)
1393 register struct replacement
*r
= &replacements
[n_replacements
++];
1395 r
->subreg_loc
= in_subreg_loc
;
1399 if (outloc
!= 0 && outloc
!= inloc
)
1401 register struct replacement
*r
= &replacements
[n_replacements
++];
1404 r
->subreg_loc
= out_subreg_loc
;
1409 /* If this reload is just being introduced and it has both
1410 an incoming quantity and an outgoing quantity that are
1411 supposed to be made to match, see if either one of the two
1412 can serve as the place to reload into.
1414 If one of them is acceptable, set rld[i].reg_rtx
1417 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1419 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1422 earlyclobber_operand_p (out
));
1424 /* If the outgoing register already contains the same value
1425 as the incoming one, we can dispense with loading it.
1426 The easiest way to tell the caller that is to give a phony
1427 value for the incoming operand (same as outgoing one). */
1428 if (rld
[i
].reg_rtx
== out
1429 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1430 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1431 static_reload_reg_p
, i
, inmode
))
1435 /* If this is an input reload and the operand contains a register that
1436 dies in this insn and is used nowhere else, see if it is the right class
1437 to be used for this reload. Use it if so. (This occurs most commonly
1438 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1439 this if it is also an output reload that mentions the register unless
1440 the output is a SUBREG that clobbers an entire register.
1442 Note that the operand might be one of the spill regs, if it is a
1443 pseudo reg and we are in a block where spilling has not taken place.
1444 But if there is no spilling in this block, that is OK.
1445 An explicitly used hard reg cannot be a spill reg. */
1447 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1452 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1453 if (REG_NOTE_KIND (note
) == REG_DEAD
1454 && GET_CODE (XEXP (note
, 0)) == REG
1455 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1456 && reg_mentioned_p (XEXP (note
, 0), in
)
1457 && ! refers_to_regno_for_reload_p (regno
,
1459 + HARD_REGNO_NREGS (regno
,
1461 PATTERN (this_insn
), inloc
)
1462 /* If this is also an output reload, IN cannot be used as
1463 the reload register if it is set in this insn unless IN
1465 && (out
== 0 || in
== out
1466 || ! hard_reg_set_here_p (regno
,
1468 + HARD_REGNO_NREGS (regno
,
1470 PATTERN (this_insn
)))
1471 /* ??? Why is this code so different from the previous?
1472 Is there any simple coherent way to describe the two together?
1473 What's going on here. */
1475 || (GET_CODE (in
) == SUBREG
1476 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1478 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1479 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1480 /* Make sure the operand fits in the reg that dies. */
1481 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1482 && HARD_REGNO_MODE_OK (regno
, inmode
)
1483 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1484 && HARD_REGNO_MODE_OK (regno
, outmode
))
1487 unsigned int nregs
= MAX (HARD_REGNO_NREGS (regno
, inmode
),
1488 HARD_REGNO_NREGS (regno
, outmode
));
1490 for (offs
= 0; offs
< nregs
; offs
++)
1491 if (fixed_regs
[regno
+ offs
]
1492 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1498 rld
[i
].reg_rtx
= gen_rtx_REG (inmode
, regno
);
1505 output_reloadnum
= i
;
1510 /* Record an additional place we must replace a value
1511 for which we have already recorded a reload.
1512 RELOADNUM is the value returned by push_reload
1513 when the reload was recorded.
1514 This is used in insn patterns that use match_dup. */
1517 push_replacement (loc
, reloadnum
, mode
)
1520 enum machine_mode mode
;
1522 if (replace_reloads
)
1524 register struct replacement
*r
= &replacements
[n_replacements
++];
1525 r
->what
= reloadnum
;
1532 /* Transfer all replacements that used to be in reload FROM to be in
1536 transfer_replacements (to
, from
)
1541 for (i
= 0; i
< n_replacements
; i
++)
1542 if (replacements
[i
].what
== from
)
1543 replacements
[i
].what
= to
;
1546 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1547 or a subpart of it. If we have any replacements registered for IN_RTX,
1548 cancel the reloads that were supposed to load them.
1549 Return non-zero if we canceled any reloads. */
1551 remove_address_replacements (in_rtx
)
1555 char reload_flags
[MAX_RELOADS
];
1556 int something_changed
= 0;
1558 bzero (reload_flags
, sizeof reload_flags
);
1559 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1561 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1562 reload_flags
[replacements
[i
].what
] |= 1;
1565 replacements
[j
++] = replacements
[i
];
1566 reload_flags
[replacements
[i
].what
] |= 2;
1569 /* Note that the following store must be done before the recursive calls. */
1572 for (i
= n_reloads
- 1; i
>= 0; i
--)
1574 if (reload_flags
[i
] == 1)
1576 deallocate_reload_reg (i
);
1577 remove_address_replacements (rld
[i
].in
);
1579 something_changed
= 1;
1582 return something_changed
;
1585 /* If there is only one output reload, and it is not for an earlyclobber
1586 operand, try to combine it with a (logically unrelated) input reload
1587 to reduce the number of reload registers needed.
1589 This is safe if the input reload does not appear in
1590 the value being output-reloaded, because this implies
1591 it is not needed any more once the original insn completes.
1593 If that doesn't work, see we can use any of the registers that
1594 die in this insn as a reload register. We can if it is of the right
1595 class and does not appear in the value being output-reloaded. */
1601 int output_reload
= -1;
1602 int secondary_out
= -1;
1605 /* Find the output reload; return unless there is exactly one
1606 and that one is mandatory. */
1608 for (i
= 0; i
< n_reloads
; i
++)
1609 if (rld
[i
].out
!= 0)
1611 if (output_reload
>= 0)
1616 if (output_reload
< 0 || rld
[output_reload
].optional
)
1619 /* An input-output reload isn't combinable. */
1621 if (rld
[output_reload
].in
!= 0)
1624 /* If this reload is for an earlyclobber operand, we can't do anything. */
1625 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1628 /* Check each input reload; can we combine it? */
1630 for (i
= 0; i
< n_reloads
; i
++)
1631 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1632 /* Life span of this reload must not extend past main insn. */
1633 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1634 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1635 && rld
[i
].when_needed
!= RELOAD_OTHER
1636 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1637 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1638 rld
[output_reload
].outmode
))
1640 && rld
[i
].reg_rtx
== 0
1641 #ifdef SECONDARY_MEMORY_NEEDED
1642 /* Don't combine two reloads with different secondary
1643 memory locations. */
1644 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1645 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1646 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1647 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1649 && (SMALL_REGISTER_CLASSES
1650 ? (rld
[i
].class == rld
[output_reload
].class)
1651 : (reg_class_subset_p (rld
[i
].class,
1652 rld
[output_reload
].class)
1653 || reg_class_subset_p (rld
[output_reload
].class,
1655 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1656 /* Args reversed because the first arg seems to be
1657 the one that we imagine being modified
1658 while the second is the one that might be affected. */
1659 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1661 /* However, if the input is a register that appears inside
1662 the output, then we also can't share.
1663 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1664 If the same reload reg is used for both reg 69 and the
1665 result to be stored in memory, then that result
1666 will clobber the address of the memory ref. */
1667 && ! (GET_CODE (rld
[i
].in
) == REG
1668 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1669 rld
[output_reload
].out
))))
1670 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
)
1671 && (reg_class_size
[(int) rld
[i
].class]
1672 || SMALL_REGISTER_CLASSES
)
1673 /* We will allow making things slightly worse by combining an
1674 input and an output, but no worse than that. */
1675 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1676 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1680 /* We have found a reload to combine with! */
1681 rld
[i
].out
= rld
[output_reload
].out
;
1682 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1683 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1684 /* Mark the old output reload as inoperative. */
1685 rld
[output_reload
].out
= 0;
1686 /* The combined reload is needed for the entire insn. */
1687 rld
[i
].when_needed
= RELOAD_OTHER
;
1688 /* If the output reload had a secondary reload, copy it. */
1689 if (rld
[output_reload
].secondary_out_reload
!= -1)
1691 rld
[i
].secondary_out_reload
1692 = rld
[output_reload
].secondary_out_reload
;
1693 rld
[i
].secondary_out_icode
1694 = rld
[output_reload
].secondary_out_icode
;
1697 #ifdef SECONDARY_MEMORY_NEEDED
1698 /* Copy any secondary MEM. */
1699 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1700 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1701 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1703 /* If required, minimize the register class. */
1704 if (reg_class_subset_p (rld
[output_reload
].class,
1706 rld
[i
].class = rld
[output_reload
].class;
1708 /* Transfer all replacements from the old reload to the combined. */
1709 for (j
= 0; j
< n_replacements
; j
++)
1710 if (replacements
[j
].what
== output_reload
)
1711 replacements
[j
].what
= i
;
1716 /* If this insn has only one operand that is modified or written (assumed
1717 to be the first), it must be the one corresponding to this reload. It
1718 is safe to use anything that dies in this insn for that output provided
1719 that it does not occur in the output (we already know it isn't an
1720 earlyclobber. If this is an asm insn, give up. */
1722 if (INSN_CODE (this_insn
) == -1)
1725 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1726 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1727 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1730 /* See if some hard register that dies in this insn and is not used in
1731 the output is the right class. Only works if the register we pick
1732 up can fully hold our output reload. */
1733 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1734 if (REG_NOTE_KIND (note
) == REG_DEAD
1735 && GET_CODE (XEXP (note
, 0)) == REG
1736 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1737 rld
[output_reload
].out
)
1738 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1739 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1740 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1741 REGNO (XEXP (note
, 0)))
1742 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1743 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1744 /* Ensure that a secondary or tertiary reload for this output
1745 won't want this register. */
1746 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1747 || (! (TEST_HARD_REG_BIT
1748 (reg_class_contents
[(int) rld
[secondary_out
].class],
1749 REGNO (XEXP (note
, 0))))
1750 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1751 || ! (TEST_HARD_REG_BIT
1752 (reg_class_contents
[(int) rld
[secondary_out
].class],
1753 REGNO (XEXP (note
, 0)))))))
1754 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1756 rld
[output_reload
].reg_rtx
1757 = gen_rtx_REG (rld
[output_reload
].outmode
,
1758 REGNO (XEXP (note
, 0)));
1763 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1764 See if one of IN and OUT is a register that may be used;
1765 this is desirable since a spill-register won't be needed.
1766 If so, return the register rtx that proves acceptable.
1768 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1769 CLASS is the register class required for the reload.
1771 If FOR_REAL is >= 0, it is the number of the reload,
1772 and in some cases when it can be discovered that OUT doesn't need
1773 to be computed, clear out rld[FOR_REAL].out.
1775 If FOR_REAL is -1, this should not be done, because this call
1776 is just to see if a register can be found, not to find and install it.
1778 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1779 puts an additional constraint on being able to use IN for OUT since
1780 IN must not appear elsewhere in the insn (it is assumed that IN itself
1781 is safe from the earlyclobber). */
1784 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1785 inmode
, outmode
, class, for_real
, earlyclobber
)
1786 rtx real_in
, real_out
;
1787 rtx
*inloc
, *outloc
;
1788 enum machine_mode inmode
, outmode
;
1789 enum reg_class
class;
1799 /* If operands exceed a word, we can't use either of them
1800 unless they have the same size. */
1801 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1802 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1803 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1806 /* Find the inside of any subregs. */
1807 while (GET_CODE (out
) == SUBREG
)
1809 out_offset
= SUBREG_WORD (out
);
1810 out
= SUBREG_REG (out
);
1812 while (GET_CODE (in
) == SUBREG
)
1814 in_offset
= SUBREG_WORD (in
);
1815 in
= SUBREG_REG (in
);
1818 /* Narrow down the reg class, the same way push_reload will;
1819 otherwise we might find a dummy now, but push_reload won't. */
1820 class = PREFERRED_RELOAD_CLASS (in
, class);
1822 /* See if OUT will do. */
1823 if (GET_CODE (out
) == REG
1824 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1826 unsigned int regno
= REGNO (out
) + out_offset
;
1827 unsigned int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1830 /* When we consider whether the insn uses OUT,
1831 ignore references within IN. They don't prevent us
1832 from copying IN into OUT, because those refs would
1833 move into the insn that reloads IN.
1835 However, we only ignore IN in its role as this reload.
1836 If the insn uses IN elsewhere and it contains OUT,
1837 that counts. We can't be sure it's the "same" operand
1838 so it might not go through this reload. */
1840 *inloc
= const0_rtx
;
1842 if (regno
< FIRST_PSEUDO_REGISTER
1843 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1844 PATTERN (this_insn
), outloc
))
1848 for (i
= 0; i
< nwords
; i
++)
1849 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1855 if (GET_CODE (real_out
) == REG
)
1858 value
= gen_rtx_REG (outmode
, regno
);
1865 /* Consider using IN if OUT was not acceptable
1866 or if OUT dies in this insn (like the quotient in a divmod insn).
1867 We can't use IN unless it is dies in this insn,
1868 which means we must know accurately which hard regs are live.
1869 Also, the result can't go in IN if IN is used within OUT,
1870 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1871 if (hard_regs_live_known
1872 && GET_CODE (in
) == REG
1873 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1875 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1876 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1877 && !fixed_regs
[REGNO (in
)]
1878 && HARD_REGNO_MODE_OK (REGNO (in
),
1879 /* The only case where out and real_out might
1880 have different modes is where real_out
1881 is a subreg, and in that case, out
1883 (GET_MODE (out
) != VOIDmode
1884 ? GET_MODE (out
) : outmode
)))
1886 unsigned int regno
= REGNO (in
) + in_offset
;
1887 unsigned int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1889 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1890 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1891 PATTERN (this_insn
))
1893 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1894 PATTERN (this_insn
), inloc
)))
1898 for (i
= 0; i
< nwords
; i
++)
1899 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1905 /* If we were going to use OUT as the reload reg
1906 and changed our mind, it means OUT is a dummy that
1907 dies here. So don't bother copying value to it. */
1908 if (for_real
>= 0 && value
== real_out
)
1909 rld
[for_real
].out
= 0;
1910 if (GET_CODE (real_in
) == REG
)
1913 value
= gen_rtx_REG (inmode
, regno
);
1921 /* This page contains subroutines used mainly for determining
1922 whether the IN or an OUT of a reload can serve as the
1925 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1928 earlyclobber_operand_p (x
)
1933 for (i
= 0; i
< n_earlyclobbers
; i
++)
1934 if (reload_earlyclobbers
[i
] == x
)
1940 /* Return 1 if expression X alters a hard reg in the range
1941 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1942 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1943 X should be the body of an instruction. */
1946 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1947 unsigned int beg_regno
, end_regno
;
1950 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1952 register rtx op0
= SET_DEST (x
);
1954 while (GET_CODE (op0
) == SUBREG
)
1955 op0
= SUBREG_REG (op0
);
1956 if (GET_CODE (op0
) == REG
)
1958 unsigned int r
= REGNO (op0
);
1960 /* See if this reg overlaps range under consideration. */
1962 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1966 else if (GET_CODE (x
) == PARALLEL
)
1968 register int i
= XVECLEN (x
, 0) - 1;
1971 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1978 /* Return 1 if ADDR is a valid memory address for mode MODE,
1979 and check that each pseudo reg has the proper kind of
1983 strict_memory_address_p (mode
, addr
)
1984 enum machine_mode mode ATTRIBUTE_UNUSED
;
1987 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1994 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1995 if they are the same hard reg, and has special hacks for
1996 autoincrement and autodecrement.
1997 This is specifically intended for find_reloads to use
1998 in determining whether two operands match.
1999 X is the operand whose number is the lower of the two.
2001 The value is 2 if Y contains a pre-increment that matches
2002 a non-incrementing address in X. */
2004 /* ??? To be completely correct, we should arrange to pass
2005 for X the output operand and for Y the input operand.
2006 For now, we assume that the output operand has the lower number
2007 because that is natural in (SET output (... input ...)). */
2010 operands_match_p (x
, y
)
2014 register RTX_CODE code
= GET_CODE (x
);
2015 register const char *fmt
;
2020 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
2021 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
2022 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2028 i
= REGNO (SUBREG_REG (x
));
2029 if (i
>= FIRST_PSEUDO_REGISTER
)
2031 i
+= SUBREG_WORD (x
);
2036 if (GET_CODE (y
) == SUBREG
)
2038 j
= REGNO (SUBREG_REG (y
));
2039 if (j
>= FIRST_PSEUDO_REGISTER
)
2041 j
+= SUBREG_WORD (y
);
2046 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2047 multiple hard register group, so that for example (reg:DI 0) and
2048 (reg:SI 1) will be considered the same register. */
2049 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2050 && i
< FIRST_PSEUDO_REGISTER
)
2051 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
2052 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2053 && j
< FIRST_PSEUDO_REGISTER
)
2054 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
2058 /* If two operands must match, because they are really a single
2059 operand of an assembler insn, then two postincrements are invalid
2060 because the assembler insn would increment only once.
2061 On the other hand, an postincrement matches ordinary indexing
2062 if the postincrement is the output operand. */
2063 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2064 return operands_match_p (XEXP (x
, 0), y
);
2065 /* Two preincrements are invalid
2066 because the assembler insn would increment only once.
2067 On the other hand, an preincrement matches ordinary indexing
2068 if the preincrement is the input operand.
2069 In this case, return 2, since some callers need to do special
2070 things when this happens. */
2071 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2072 || GET_CODE (y
) == PRE_MODIFY
)
2073 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2077 /* Now we have disposed of all the cases
2078 in which different rtx codes can match. */
2079 if (code
!= GET_CODE (y
))
2081 if (code
== LABEL_REF
)
2082 return XEXP (x
, 0) == XEXP (y
, 0);
2083 if (code
== SYMBOL_REF
)
2084 return XSTR (x
, 0) == XSTR (y
, 0);
2086 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2088 if (GET_MODE (x
) != GET_MODE (y
))
2091 /* Compare the elements. If any pair of corresponding elements
2092 fail to match, return 0 for the whole things. */
2095 fmt
= GET_RTX_FORMAT (code
);
2096 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2102 if (XWINT (x
, i
) != XWINT (y
, i
))
2107 if (XINT (x
, i
) != XINT (y
, i
))
2112 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2115 /* If any subexpression returns 2,
2116 we should return 2 if we are successful. */
2125 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2127 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2129 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2137 /* It is believed that rtx's at this level will never
2138 contain anything but integers and other rtx's,
2139 except for within LABEL_REFs and SYMBOL_REFs. */
2144 return 1 + success_2
;
2147 /* Describe the range of registers or memory referenced by X.
2148 If X is a register, set REG_FLAG and put the first register
2149 number into START and the last plus one into END.
2150 If X is a memory reference, put a base address into BASE
2151 and a range of integer offsets into START and END.
2152 If X is pushing on the stack, we can assume it causes no trouble,
2153 so we set the SAFE field. */
2155 static struct decomposition
2159 struct decomposition val
;
2165 if (GET_CODE (x
) == MEM
)
2167 rtx base
= NULL_RTX
, offset
= 0;
2168 rtx addr
= XEXP (x
, 0);
2170 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2171 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2173 val
.base
= XEXP (addr
, 0);
2174 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2175 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2176 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2180 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2182 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2183 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2184 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2186 val
.base
= XEXP (addr
, 0);
2187 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2188 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2189 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2194 if (GET_CODE (addr
) == CONST
)
2196 addr
= XEXP (addr
, 0);
2199 if (GET_CODE (addr
) == PLUS
)
2201 if (CONSTANT_P (XEXP (addr
, 0)))
2203 base
= XEXP (addr
, 1);
2204 offset
= XEXP (addr
, 0);
2206 else if (CONSTANT_P (XEXP (addr
, 1)))
2208 base
= XEXP (addr
, 0);
2209 offset
= XEXP (addr
, 1);
2216 offset
= const0_rtx
;
2218 if (GET_CODE (offset
) == CONST
)
2219 offset
= XEXP (offset
, 0);
2220 if (GET_CODE (offset
) == PLUS
)
2222 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2224 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2225 offset
= XEXP (offset
, 0);
2227 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2229 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2230 offset
= XEXP (offset
, 1);
2234 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2235 offset
= const0_rtx
;
2238 else if (GET_CODE (offset
) != CONST_INT
)
2240 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2241 offset
= const0_rtx
;
2244 if (all_const
&& GET_CODE (base
) == PLUS
)
2245 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2247 if (GET_CODE (offset
) != CONST_INT
)
2250 val
.start
= INTVAL (offset
);
2251 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2255 else if (GET_CODE (x
) == REG
)
2258 val
.start
= true_regnum (x
);
2261 /* A pseudo with no hard reg. */
2262 val
.start
= REGNO (x
);
2263 val
.end
= val
.start
+ 1;
2267 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2269 else if (GET_CODE (x
) == SUBREG
)
2271 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2272 /* This could be more precise, but it's good enough. */
2273 return decompose (SUBREG_REG (x
));
2275 val
.start
= true_regnum (x
);
2277 return decompose (SUBREG_REG (x
));
2280 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2282 else if (CONSTANT_P (x
)
2283 /* This hasn't been assigned yet, so it can't conflict yet. */
2284 || GET_CODE (x
) == SCRATCH
)
2291 /* Return 1 if altering Y will not modify the value of X.
2292 Y is also described by YDATA, which should be decompose (Y). */
2295 immune_p (x
, y
, ydata
)
2297 struct decomposition ydata
;
2299 struct decomposition xdata
;
2302 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
2306 if (GET_CODE (y
) != MEM
)
2308 /* If Y is memory and X is not, Y can't affect X. */
2309 if (GET_CODE (x
) != MEM
)
2312 xdata
= decompose (x
);
2314 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2316 /* If bases are distinct symbolic constants, there is no overlap. */
2317 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2319 /* Constants and stack slots never overlap. */
2320 if (CONSTANT_P (xdata
.base
)
2321 && (ydata
.base
== frame_pointer_rtx
2322 || ydata
.base
== hard_frame_pointer_rtx
2323 || ydata
.base
== stack_pointer_rtx
))
2325 if (CONSTANT_P (ydata
.base
)
2326 && (xdata
.base
== frame_pointer_rtx
2327 || xdata
.base
== hard_frame_pointer_rtx
2328 || xdata
.base
== stack_pointer_rtx
))
2330 /* If either base is variable, we don't know anything. */
2334 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2337 /* Similar, but calls decompose. */
2340 safe_from_earlyclobber (op
, clobber
)
2343 struct decomposition early_data
;
2345 early_data
= decompose (clobber
);
2346 return immune_p (op
, clobber
, early_data
);
2349 /* Main entry point of this file: search the body of INSN
2350 for values that need reloading and record them with push_reload.
2351 REPLACE nonzero means record also where the values occur
2352 so that subst_reloads can be used.
2354 IND_LEVELS says how many levels of indirection are supported by this
2355 machine; a value of zero means that a memory reference is not a valid
2358 LIVE_KNOWN says we have valid information about which hard
2359 regs are live at each point in the program; this is true when
2360 we are called from global_alloc but false when stupid register
2361 allocation has been done.
2363 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2364 which is nonnegative if the reg has been commandeered for reloading into.
2365 It is copied into STATIC_RELOAD_REG_P and referenced from there
2366 by various subroutines.
2368 Return TRUE if some operands need to be changed, because of swapping
2369 commutative operands, reg_equiv_address substitution, or whatever. */
2372 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2374 int replace
, ind_levels
;
2376 short *reload_reg_p
;
2378 register int insn_code_number
;
2381 /* These start out as the constraints for the insn
2382 and they are chewed up as we consider alternatives. */
2383 char *constraints
[MAX_RECOG_OPERANDS
];
2384 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2386 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2387 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2388 /* Nonzero for a MEM operand whose entire address needs a reload. */
2389 int address_reloaded
[MAX_RECOG_OPERANDS
];
2390 /* Value of enum reload_type to use for operand. */
2391 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2392 /* Value of enum reload_type to use within address of operand. */
2393 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2394 /* Save the usage of each operand. */
2395 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2396 int no_input_reloads
= 0, no_output_reloads
= 0;
2398 int this_alternative
[MAX_RECOG_OPERANDS
];
2399 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2400 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2401 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2402 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2404 int goal_alternative
[MAX_RECOG_OPERANDS
];
2405 int this_alternative_number
;
2406 int goal_alternative_number
= 0;
2407 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2408 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2409 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2410 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2411 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2412 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2413 int goal_alternative_swapped
;
2416 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2417 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2418 rtx body
= PATTERN (insn
);
2419 rtx set
= single_set (insn
);
2420 int goal_earlyclobber
= 0, this_earlyclobber
;
2421 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2427 n_earlyclobbers
= 0;
2428 replace_reloads
= replace
;
2429 hard_regs_live_known
= live_known
;
2430 static_reload_reg_p
= reload_reg_p
;
2432 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2433 neither are insns that SET cc0. Insns that use CC0 are not allowed
2434 to have any input reloads. */
2435 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2436 no_output_reloads
= 1;
2439 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2440 no_input_reloads
= 1;
2441 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2442 no_output_reloads
= 1;
2445 #ifdef SECONDARY_MEMORY_NEEDED
2446 /* The eliminated forms of any secondary memory locations are per-insn, so
2447 clear them out here. */
2449 bzero ((char *) secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2452 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2453 is cheap to move between them. If it is not, there may not be an insn
2454 to do the copy, so we may need a reload. */
2455 if (GET_CODE (body
) == SET
2456 && GET_CODE (SET_DEST (body
)) == REG
2457 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2458 && GET_CODE (SET_SRC (body
)) == REG
2459 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2460 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2461 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2464 extract_insn (insn
);
2466 noperands
= reload_n_operands
= recog_data
.n_operands
;
2467 n_alternatives
= recog_data
.n_alternatives
;
2469 /* Just return "no reloads" if insn has no operands with constraints. */
2470 if (noperands
== 0 || n_alternatives
== 0)
2473 insn_code_number
= INSN_CODE (insn
);
2474 this_insn_is_asm
= insn_code_number
< 0;
2476 memcpy (operand_mode
, recog_data
.operand_mode
,
2477 noperands
* sizeof (enum machine_mode
));
2478 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2482 /* If we will need to know, later, whether some pair of operands
2483 are the same, we must compare them now and save the result.
2484 Reloading the base and index registers will clobber them
2485 and afterward they will fail to match. */
2487 for (i
= 0; i
< noperands
; i
++)
2492 substed_operand
[i
] = recog_data
.operand
[i
];
2495 modified
[i
] = RELOAD_READ
;
2497 /* Scan this operand's constraint to see if it is an output operand,
2498 an in-out operand, is commutative, or should match another. */
2503 modified
[i
] = RELOAD_WRITE
;
2505 modified
[i
] = RELOAD_READ_WRITE
;
2508 /* The last operand should not be marked commutative. */
2509 if (i
== noperands
- 1)
2514 else if (c
>= '0' && c
<= '9')
2517 operands_match
[c
][i
]
2518 = operands_match_p (recog_data
.operand
[c
],
2519 recog_data
.operand
[i
]);
2521 /* An operand may not match itself. */
2525 /* If C can be commuted with C+1, and C might need to match I,
2526 then C+1 might also need to match I. */
2527 if (commutative
>= 0)
2529 if (c
== commutative
|| c
== commutative
+ 1)
2531 int other
= c
+ (c
== commutative
? 1 : -1);
2532 operands_match
[other
][i
]
2533 = operands_match_p (recog_data
.operand
[other
],
2534 recog_data
.operand
[i
]);
2536 if (i
== commutative
|| i
== commutative
+ 1)
2538 int other
= i
+ (i
== commutative
? 1 : -1);
2539 operands_match
[c
][other
]
2540 = operands_match_p (recog_data
.operand
[c
],
2541 recog_data
.operand
[other
]);
2543 /* Note that C is supposed to be less than I.
2544 No need to consider altering both C and I because in
2545 that case we would alter one into the other. */
2551 /* Examine each operand that is a memory reference or memory address
2552 and reload parts of the addresses into index registers.
2553 Also here any references to pseudo regs that didn't get hard regs
2554 but are equivalent to constants get replaced in the insn itself
2555 with those constants. Nobody will ever see them again.
2557 Finally, set up the preferred classes of each operand. */
2559 for (i
= 0; i
< noperands
; i
++)
2561 register RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2563 address_reloaded
[i
] = 0;
2564 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2565 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2568 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2569 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2572 if (*constraints
[i
] == 0)
2573 /* Ignore things like match_operator operands. */
2575 else if (constraints
[i
][0] == 'p')
2577 find_reloads_address (VOIDmode
, NULL_PTR
,
2578 recog_data
.operand
[i
],
2579 recog_data
.operand_loc
[i
],
2580 i
, operand_type
[i
], ind_levels
, insn
);
2582 /* If we now have a simple operand where we used to have a
2583 PLUS or MULT, re-recognize and try again. */
2584 if ((GET_RTX_CLASS (GET_CODE (*recog_data
.operand_loc
[i
])) == 'o'
2585 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2586 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2587 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2589 INSN_CODE (insn
) = -1;
2590 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2595 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2596 substed_operand
[i
] = recog_data
.operand
[i
];
2598 else if (code
== MEM
)
2601 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2602 recog_data
.operand_loc
[i
],
2603 XEXP (recog_data
.operand
[i
], 0),
2604 &XEXP (recog_data
.operand
[i
], 0),
2605 i
, address_type
[i
], ind_levels
, insn
);
2606 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2607 substed_operand
[i
] = recog_data
.operand
[i
];
2609 else if (code
== SUBREG
)
2611 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2613 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2616 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2618 &address_reloaded
[i
]);
2620 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2621 that didn't get a hard register, emit a USE with a REG_EQUAL
2622 note in front so that we might inherit a previous, possibly
2626 && GET_CODE (op
) == MEM
2627 && GET_CODE (reg
) == REG
2628 && (GET_MODE_SIZE (GET_MODE (reg
))
2629 >= GET_MODE_SIZE (GET_MODE (op
))))
2630 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
), insn
))
2631 = gen_rtx_EXPR_LIST (REG_EQUAL
,
2632 reg_equiv_memory_loc
[REGNO (reg
)], NULL_RTX
);
2634 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2636 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2637 /* We can get a PLUS as an "operand" as a result of register
2638 elimination. See eliminate_regs and gen_reload. We handle
2639 a unary operator by reloading the operand. */
2640 substed_operand
[i
] = recog_data
.operand
[i
]
2641 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2642 ind_levels
, 0, insn
,
2643 &address_reloaded
[i
]);
2644 else if (code
== REG
)
2646 /* This is equivalent to calling find_reloads_toplev.
2647 The code is duplicated for speed.
2648 When we find a pseudo always equivalent to a constant,
2649 we replace it by the constant. We must be sure, however,
2650 that we don't try to replace it in the insn in which it
2652 register int regno
= REGNO (recog_data
.operand
[i
]);
2653 if (reg_equiv_constant
[regno
] != 0
2654 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2656 /* Record the existing mode so that the check if constants are
2657 allowed will work when operand_mode isn't specified. */
2659 if (operand_mode
[i
] == VOIDmode
)
2660 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2662 substed_operand
[i
] = recog_data
.operand
[i
]
2663 = reg_equiv_constant
[regno
];
2665 if (reg_equiv_memory_loc
[regno
] != 0
2666 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2667 /* We need not give a valid is_set_dest argument since the case
2668 of a constant equivalence was checked above. */
2669 substed_operand
[i
] = recog_data
.operand
[i
]
2670 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2671 ind_levels
, 0, insn
,
2672 &address_reloaded
[i
]);
2674 /* If the operand is still a register (we didn't replace it with an
2675 equivalent), get the preferred class to reload it into. */
2676 code
= GET_CODE (recog_data
.operand
[i
]);
2678 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2679 >= FIRST_PSEUDO_REGISTER
)
2680 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2684 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2685 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2688 /* If this is simply a copy from operand 1 to operand 0, merge the
2689 preferred classes for the operands. */
2690 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2691 && recog_data
.operand
[1] == SET_SRC (set
))
2693 preferred_class
[0] = preferred_class
[1]
2694 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2695 pref_or_nothing
[0] |= pref_or_nothing
[1];
2696 pref_or_nothing
[1] |= pref_or_nothing
[0];
2699 /* Now see what we need for pseudo-regs that didn't get hard regs
2700 or got the wrong kind of hard reg. For this, we must consider
2701 all the operands together against the register constraints. */
2703 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2706 goal_alternative_swapped
= 0;
2709 /* The constraints are made of several alternatives.
2710 Each operand's constraint looks like foo,bar,... with commas
2711 separating the alternatives. The first alternatives for all
2712 operands go together, the second alternatives go together, etc.
2714 First loop over alternatives. */
2716 for (this_alternative_number
= 0;
2717 this_alternative_number
< n_alternatives
;
2718 this_alternative_number
++)
2720 /* Loop over operands for one constraint alternative. */
2721 /* LOSERS counts those that don't fit this alternative
2722 and would require loading. */
2724 /* BAD is set to 1 if it some operand can't fit this alternative
2725 even after reloading. */
2727 /* REJECT is a count of how undesirable this alternative says it is
2728 if any reloading is required. If the alternative matches exactly
2729 then REJECT is ignored, but otherwise it gets this much
2730 counted against it in addition to the reloading needed. Each
2731 ? counts three times here since we want the disparaging caused by
2732 a bad register class to only count 1/3 as much. */
2735 this_earlyclobber
= 0;
2737 for (i
= 0; i
< noperands
; i
++)
2739 register char *p
= constraints
[i
];
2740 register int win
= 0;
2741 /* 0 => this operand can be reloaded somehow for this alternative */
2743 /* 0 => this operand can be reloaded if the alternative allows regs. */
2746 register rtx operand
= recog_data
.operand
[i
];
2748 /* Nonzero means this is a MEM that must be reloaded into a reg
2749 regardless of what the constraint says. */
2750 int force_reload
= 0;
2752 /* Nonzero if a constant forced into memory would be OK for this
2755 int earlyclobber
= 0;
2757 /* If the predicate accepts a unary operator, it means that
2758 we need to reload the operand, but do not do this for
2759 match_operator and friends. */
2760 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1' && *p
!= 0)
2761 operand
= XEXP (operand
, 0);
2763 /* If the operand is a SUBREG, extract
2764 the REG or MEM (or maybe even a constant) within.
2765 (Constants can occur as a result of reg_equiv_constant.) */
2767 while (GET_CODE (operand
) == SUBREG
)
2769 offset
+= SUBREG_WORD (operand
);
2770 operand
= SUBREG_REG (operand
);
2771 /* Force reload if this is a constant or PLUS or if there may
2772 be a problem accessing OPERAND in the outer mode. */
2773 if (CONSTANT_P (operand
)
2774 || GET_CODE (operand
) == PLUS
2775 /* We must force a reload of paradoxical SUBREGs
2776 of a MEM because the alignment of the inner value
2777 may not be enough to do the outer reference. On
2778 big-endian machines, it may also reference outside
2781 On machines that extend byte operations and we have a
2782 SUBREG where both the inner and outer modes are no wider
2783 than a word and the inner mode is narrower, is integral,
2784 and gets extended when loaded from memory, combine.c has
2785 made assumptions about the behavior of the machine in such
2786 register access. If the data is, in fact, in memory we
2787 must always load using the size assumed to be in the
2788 register and let the insn do the different-sized
2791 This is doubly true if WORD_REGISTER_OPERATIONS. In
2792 this case eliminate_regs has left non-paradoxical
2793 subregs for push_reloads to see. Make sure it does
2794 by forcing the reload.
2796 ??? When is it right at this stage to have a subreg
2797 of a mem that is _not_ to be handled specialy? IMO
2798 those should have been reduced to just a mem. */
2799 || ((GET_CODE (operand
) == MEM
2800 || (GET_CODE (operand
)== REG
2801 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2802 #ifndef WORD_REGISTER_OPERATIONS
2803 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2804 < BIGGEST_ALIGNMENT
)
2805 && (GET_MODE_SIZE (operand_mode
[i
])
2806 > GET_MODE_SIZE (GET_MODE (operand
))))
2807 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2808 #ifdef LOAD_EXTEND_OP
2809 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2810 && (GET_MODE_SIZE (GET_MODE (operand
))
2812 && (GET_MODE_SIZE (operand_mode
[i
])
2813 > GET_MODE_SIZE (GET_MODE (operand
)))
2814 && INTEGRAL_MODE_P (GET_MODE (operand
))
2815 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2820 /* Subreg of a hard reg which can't handle the subreg's mode
2821 or which would handle that mode in the wrong number of
2822 registers for subregging to work. */
2823 || (GET_CODE (operand
) == REG
2824 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2825 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2826 && (GET_MODE_SIZE (GET_MODE (operand
))
2828 && ((GET_MODE_SIZE (GET_MODE (operand
))
2830 != HARD_REGNO_NREGS (REGNO (operand
),
2831 GET_MODE (operand
))))
2832 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2837 this_alternative
[i
] = (int) NO_REGS
;
2838 this_alternative_win
[i
] = 0;
2839 this_alternative_offmemok
[i
] = 0;
2840 this_alternative_earlyclobber
[i
] = 0;
2841 this_alternative_matches
[i
] = -1;
2843 /* An empty constraint or empty alternative
2844 allows anything which matched the pattern. */
2845 if (*p
== 0 || *p
== ',')
2848 /* Scan this alternative's specs for this operand;
2849 set WIN if the operand fits any letter in this alternative.
2850 Otherwise, clear BADOP if this operand could
2851 fit some letter after reloads,
2852 or set WINREG if this operand could fit after reloads
2853 provided the constraint allows some registers. */
2855 while (*p
&& (c
= *p
++) != ',')
2858 case '=': case '+': case '*':
2862 /* The last operand should not be marked commutative. */
2863 if (i
!= noperands
- 1)
2876 /* Ignore rest of this alternative as far as
2877 reloading is concerned. */
2878 while (*p
&& *p
!= ',')
2882 case '0': case '1': case '2': case '3': case '4':
2883 case '5': case '6': case '7': case '8': case '9':
2886 this_alternative_matches
[i
] = c
;
2887 /* We are supposed to match a previous operand.
2888 If we do, we win if that one did.
2889 If we do not, count both of the operands as losers.
2890 (This is too conservative, since most of the time
2891 only a single reload insn will be needed to make
2892 the two operands win. As a result, this alternative
2893 may be rejected when it is actually desirable.) */
2894 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2895 /* If we are matching as if two operands were swapped,
2896 also pretend that operands_match had been computed
2898 But if I is the second of those and C is the first,
2899 don't exchange them, because operands_match is valid
2900 only on one side of its diagonal. */
2902 [(c
== commutative
|| c
== commutative
+ 1)
2903 ? 2 * commutative
+ 1 - c
: c
]
2904 [(i
== commutative
|| i
== commutative
+ 1)
2905 ? 2 * commutative
+ 1 - i
: i
])
2906 : operands_match
[c
][i
])
2908 /* If we are matching a non-offsettable address where an
2909 offsettable address was expected, then we must reject
2910 this combination, because we can't reload it. */
2911 if (this_alternative_offmemok
[c
]
2912 && GET_CODE (recog_data
.operand
[c
]) == MEM
2913 && this_alternative
[c
] == (int) NO_REGS
2914 && ! this_alternative_win
[c
])
2917 win
= this_alternative_win
[c
];
2921 /* Operands don't match. */
2923 /* Retroactively mark the operand we had to match
2924 as a loser, if it wasn't already. */
2925 if (this_alternative_win
[c
])
2927 this_alternative_win
[c
] = 0;
2928 if (this_alternative
[c
] == (int) NO_REGS
)
2930 /* But count the pair only once in the total badness of
2931 this alternative, if the pair can be a dummy reload. */
2933 = find_dummy_reload (recog_data
.operand
[i
],
2934 recog_data
.operand
[c
],
2935 recog_data
.operand_loc
[i
],
2936 recog_data
.operand_loc
[c
],
2937 operand_mode
[i
], operand_mode
[c
],
2938 this_alternative
[c
], -1,
2939 this_alternative_earlyclobber
[c
]);
2944 /* This can be fixed with reloads if the operand
2945 we are supposed to match can be fixed with reloads. */
2947 this_alternative
[i
] = this_alternative
[c
];
2949 /* If we have to reload this operand and some previous
2950 operand also had to match the same thing as this
2951 operand, we don't know how to do that. So reject this
2953 if (! win
|| force_reload
)
2954 for (j
= 0; j
< i
; j
++)
2955 if (this_alternative_matches
[j
]
2956 == this_alternative_matches
[i
])
2962 /* All necessary reloads for an address_operand
2963 were handled in find_reloads_address. */
2964 this_alternative
[i
] = (int) BASE_REG_CLASS
;
2971 if (GET_CODE (operand
) == MEM
2972 || (GET_CODE (operand
) == REG
2973 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2974 && reg_renumber
[REGNO (operand
)] < 0))
2976 if (CONSTANT_P (operand
)
2977 /* force_const_mem does not accept HIGH. */
2978 && GET_CODE (operand
) != HIGH
)
2984 if (GET_CODE (operand
) == MEM
2985 && ! address_reloaded
[i
]
2986 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2987 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2992 if (GET_CODE (operand
) == MEM
2993 && ! address_reloaded
[i
]
2994 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2995 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
2999 /* Memory operand whose address is not offsettable. */
3003 if (GET_CODE (operand
) == MEM
3004 && ! (ind_levels
? offsettable_memref_p (operand
)
3005 : offsettable_nonstrict_memref_p (operand
))
3006 /* Certain mem addresses will become offsettable
3007 after they themselves are reloaded. This is important;
3008 we don't want our own handling of unoffsettables
3009 to override the handling of reg_equiv_address. */
3010 && !(GET_CODE (XEXP (operand
, 0)) == REG
3012 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3016 /* Memory operand whose address is offsettable. */
3020 if ((GET_CODE (operand
) == MEM
3021 /* If IND_LEVELS, find_reloads_address won't reload a
3022 pseudo that didn't get a hard reg, so we have to
3023 reject that case. */
3024 && ((ind_levels
? offsettable_memref_p (operand
)
3025 : offsettable_nonstrict_memref_p (operand
))
3026 /* A reloaded address is offsettable because it is now
3027 just a simple register indirect. */
3028 || address_reloaded
[i
]))
3029 || (GET_CODE (operand
) == REG
3030 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3031 && reg_renumber
[REGNO (operand
)] < 0
3032 /* If reg_equiv_address is nonzero, we will be
3033 loading it into a register; hence it will be
3034 offsettable, but we cannot say that reg_equiv_mem
3035 is offsettable without checking. */
3036 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3037 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3038 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3040 /* force_const_mem does not accept HIGH. */
3041 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3042 || GET_CODE (operand
) == MEM
)
3049 /* Output operand that is stored before the need for the
3050 input operands (and their index registers) is over. */
3051 earlyclobber
= 1, this_earlyclobber
= 1;
3055 #ifndef REAL_ARITHMETIC
3056 /* Match any floating double constant, but only if
3057 we can examine the bits of it reliably. */
3058 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
3059 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
3060 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
3063 if (GET_CODE (operand
) == CONST_DOUBLE
)
3068 if (GET_CODE (operand
) == CONST_DOUBLE
)
3074 if (GET_CODE (operand
) == CONST_DOUBLE
3075 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
3080 if (GET_CODE (operand
) == CONST_INT
3081 || (GET_CODE (operand
) == CONST_DOUBLE
3082 && GET_MODE (operand
) == VOIDmode
))
3085 if (CONSTANT_P (operand
)
3086 #ifdef LEGITIMATE_PIC_OPERAND_P
3087 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3094 if (GET_CODE (operand
) == CONST_INT
3095 || (GET_CODE (operand
) == CONST_DOUBLE
3096 && GET_MODE (operand
) == VOIDmode
))
3108 if (GET_CODE (operand
) == CONST_INT
3109 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
3119 /* A PLUS is never a valid operand, but reload can make
3120 it from a register when eliminating registers. */
3121 && GET_CODE (operand
) != PLUS
3122 /* A SCRATCH is not a valid operand. */
3123 && GET_CODE (operand
) != SCRATCH
3124 #ifdef LEGITIMATE_PIC_OPERAND_P
3125 && (! CONSTANT_P (operand
)
3127 || LEGITIMATE_PIC_OPERAND_P (operand
))
3129 && (GENERAL_REGS
== ALL_REGS
3130 || GET_CODE (operand
) != REG
3131 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3132 && reg_renumber
[REGNO (operand
)] < 0)))
3134 /* Drop through into 'r' case */
3138 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3142 if (REG_CLASS_FROM_LETTER (c
) == NO_REGS
)
3144 #ifdef EXTRA_CONSTRAINT
3145 if (EXTRA_CONSTRAINT (operand
, c
))
3152 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
3154 if (GET_MODE (operand
) == BLKmode
)
3157 if (GET_CODE (operand
) == REG
3158 && reg_fits_class_p (operand
, this_alternative
[i
],
3159 offset
, GET_MODE (recog_data
.operand
[i
])))
3166 /* If this operand could be handled with a reg,
3167 and some reg is allowed, then this operand can be handled. */
3168 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3171 /* Record which operands fit this alternative. */
3172 this_alternative_earlyclobber
[i
] = earlyclobber
;
3173 if (win
&& ! force_reload
)
3174 this_alternative_win
[i
] = 1;
3177 int const_to_mem
= 0;
3179 this_alternative_offmemok
[i
] = offmemok
;
3183 /* Alternative loses if it has no regs for a reg operand. */
3184 if (GET_CODE (operand
) == REG
3185 && this_alternative
[i
] == (int) NO_REGS
3186 && this_alternative_matches
[i
] < 0)
3189 /* If this is a constant that is reloaded into the desired
3190 class by copying it to memory first, count that as another
3191 reload. This is consistent with other code and is
3192 required to avoid choosing another alternative when
3193 the constant is moved into memory by this function on
3194 an early reload pass. Note that the test here is
3195 precisely the same as in the code below that calls
3197 if (CONSTANT_P (operand
)
3198 /* force_const_mem does not accept HIGH. */
3199 && GET_CODE (operand
) != HIGH
3200 && ((PREFERRED_RELOAD_CLASS (operand
,
3201 (enum reg_class
) this_alternative
[i
])
3203 || no_input_reloads
)
3204 && operand_mode
[i
] != VOIDmode
)
3207 if (this_alternative
[i
] != (int) NO_REGS
)
3211 /* If we can't reload this value at all, reject this
3212 alternative. Note that we could also lose due to
3213 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3216 if (! CONSTANT_P (operand
)
3217 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3218 && (PREFERRED_RELOAD_CLASS (operand
,
3219 (enum reg_class
) this_alternative
[i
])
3223 /* Alternative loses if it requires a type of reload not
3224 permitted for this insn. We can always reload SCRATCH
3225 and objects with a REG_UNUSED note. */
3226 else if (GET_CODE (operand
) != SCRATCH
3227 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3228 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3230 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3234 /* We prefer to reload pseudos over reloading other things,
3235 since such reloads may be able to be eliminated later.
3236 If we are reloading a SCRATCH, we won't be generating any
3237 insns, just using a register, so it is also preferred.
3238 So bump REJECT in other cases. Don't do this in the
3239 case where we are forcing a constant into memory and
3240 it will then win since we don't want to have a different
3241 alternative match then. */
3242 if (! (GET_CODE (operand
) == REG
3243 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3244 && GET_CODE (operand
) != SCRATCH
3245 && ! (const_to_mem
&& constmemok
))
3248 /* Input reloads can be inherited more often than output
3249 reloads can be removed, so penalize output reloads. */
3250 if (operand_type
[i
] != RELOAD_FOR_INPUT
3251 && GET_CODE (operand
) != SCRATCH
)
3255 /* If this operand is a pseudo register that didn't get a hard
3256 reg and this alternative accepts some register, see if the
3257 class that we want is a subset of the preferred class for this
3258 register. If not, but it intersects that class, use the
3259 preferred class instead. If it does not intersect the preferred
3260 class, show that usage of this alternative should be discouraged;
3261 it will be discouraged more still if the register is `preferred
3262 or nothing'. We do this because it increases the chance of
3263 reusing our spill register in a later insn and avoiding a pair
3264 of memory stores and loads.
3266 Don't bother with this if this alternative will accept this
3269 Don't do this for a multiword operand, since it is only a
3270 small win and has the risk of requiring more spill registers,
3271 which could cause a large loss.
3273 Don't do this if the preferred class has only one register
3274 because we might otherwise exhaust the class. */
3276 if (! win
&& this_alternative
[i
] != (int) NO_REGS
3277 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3278 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3280 if (! reg_class_subset_p (this_alternative
[i
],
3281 preferred_class
[i
]))
3283 /* Since we don't have a way of forming the intersection,
3284 we just do something special if the preferred class
3285 is a subset of the class we have; that's the most
3286 common case anyway. */
3287 if (reg_class_subset_p (preferred_class
[i
],
3288 this_alternative
[i
]))
3289 this_alternative
[i
] = (int) preferred_class
[i
];
3291 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3296 /* Now see if any output operands that are marked "earlyclobber"
3297 in this alternative conflict with any input operands
3298 or any memory addresses. */
3300 for (i
= 0; i
< noperands
; i
++)
3301 if (this_alternative_earlyclobber
[i
]
3302 && this_alternative_win
[i
])
3304 struct decomposition early_data
;
3306 early_data
= decompose (recog_data
.operand
[i
]);
3308 if (modified
[i
] == RELOAD_READ
)
3311 if (this_alternative
[i
] == NO_REGS
)
3313 this_alternative_earlyclobber
[i
] = 0;
3314 if (this_insn_is_asm
)
3315 error_for_asm (this_insn
,
3316 "`&' constraint used with no register class");
3321 for (j
= 0; j
< noperands
; j
++)
3322 /* Is this an input operand or a memory ref? */
3323 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3324 || modified
[j
] != RELOAD_WRITE
)
3326 /* Ignore things like match_operator operands. */
3327 && *recog_data
.constraints
[j
] != 0
3328 /* Don't count an input operand that is constrained to match
3329 the early clobber operand. */
3330 && ! (this_alternative_matches
[j
] == i
3331 && rtx_equal_p (recog_data
.operand
[i
],
3332 recog_data
.operand
[j
]))
3333 /* Is it altered by storing the earlyclobber operand? */
3334 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3337 /* If the output is in a single-reg class,
3338 it's costly to reload it, so reload the input instead. */
3339 if (reg_class_size
[this_alternative
[i
]] == 1
3340 && (GET_CODE (recog_data
.operand
[j
]) == REG
3341 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3344 this_alternative_win
[j
] = 0;
3349 /* If an earlyclobber operand conflicts with something,
3350 it must be reloaded, so request this and count the cost. */
3354 this_alternative_win
[i
] = 0;
3355 for (j
= 0; j
< noperands
; j
++)
3356 if (this_alternative_matches
[j
] == i
3357 && this_alternative_win
[j
])
3359 this_alternative_win
[j
] = 0;
3365 /* If one alternative accepts all the operands, no reload required,
3366 choose that alternative; don't consider the remaining ones. */
3369 /* Unswap these so that they are never swapped at `finish'. */
3370 if (commutative
>= 0)
3372 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3373 recog_data
.operand
[commutative
+ 1]
3374 = substed_operand
[commutative
+ 1];
3376 for (i
= 0; i
< noperands
; i
++)
3378 goal_alternative_win
[i
] = 1;
3379 goal_alternative
[i
] = this_alternative
[i
];
3380 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3381 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3382 goal_alternative_earlyclobber
[i
]
3383 = this_alternative_earlyclobber
[i
];
3385 goal_alternative_number
= this_alternative_number
;
3386 goal_alternative_swapped
= swapped
;
3387 goal_earlyclobber
= this_earlyclobber
;
3391 /* REJECT, set by the ! and ? constraint characters and when a register
3392 would be reloaded into a non-preferred class, discourages the use of
3393 this alternative for a reload goal. REJECT is incremented by six
3394 for each ? and two for each non-preferred class. */
3395 losers
= losers
* 6 + reject
;
3397 /* If this alternative can be made to work by reloading,
3398 and it needs less reloading than the others checked so far,
3399 record it as the chosen goal for reloading. */
3400 if (! bad
&& best
> losers
)
3402 for (i
= 0; i
< noperands
; i
++)
3404 goal_alternative
[i
] = this_alternative
[i
];
3405 goal_alternative_win
[i
] = this_alternative_win
[i
];
3406 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3407 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3408 goal_alternative_earlyclobber
[i
]
3409 = this_alternative_earlyclobber
[i
];
3411 goal_alternative_swapped
= swapped
;
3413 goal_alternative_number
= this_alternative_number
;
3414 goal_earlyclobber
= this_earlyclobber
;
3418 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3419 then we need to try each alternative twice,
3420 the second time matching those two operands
3421 as if we had exchanged them.
3422 To do this, really exchange them in operands.
3424 If we have just tried the alternatives the second time,
3425 return operands to normal and drop through. */
3427 if (commutative
>= 0)
3432 register enum reg_class tclass
;
3435 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3436 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3438 tclass
= preferred_class
[commutative
];
3439 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3440 preferred_class
[commutative
+ 1] = tclass
;
3442 t
= pref_or_nothing
[commutative
];
3443 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3444 pref_or_nothing
[commutative
+ 1] = t
;
3446 memcpy (constraints
, recog_data
.constraints
,
3447 noperands
* sizeof (char *));
3452 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3453 recog_data
.operand
[commutative
+ 1]
3454 = substed_operand
[commutative
+ 1];
3458 /* The operands don't meet the constraints.
3459 goal_alternative describes the alternative
3460 that we could reach by reloading the fewest operands.
3461 Reload so as to fit it. */
3463 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3465 /* No alternative works with reloads?? */
3466 if (insn_code_number
>= 0)
3467 fatal_insn ("Unable to generate reloads for:", insn
);
3468 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3469 /* Avoid further trouble with this insn. */
3470 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3475 /* Jump to `finish' from above if all operands are valid already.
3476 In that case, goal_alternative_win is all 1. */
3479 /* Right now, for any pair of operands I and J that are required to match,
3481 goal_alternative_matches[J] is I.
3482 Set up goal_alternative_matched as the inverse function:
3483 goal_alternative_matched[I] = J. */
3485 for (i
= 0; i
< noperands
; i
++)
3486 goal_alternative_matched
[i
] = -1;
3488 for (i
= 0; i
< noperands
; i
++)
3489 if (! goal_alternative_win
[i
]
3490 && goal_alternative_matches
[i
] >= 0)
3491 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3493 /* If the best alternative is with operands 1 and 2 swapped,
3494 consider them swapped before reporting the reloads. Update the
3495 operand numbers of any reloads already pushed. */
3497 if (goal_alternative_swapped
)
3501 tem
= substed_operand
[commutative
];
3502 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3503 substed_operand
[commutative
+ 1] = tem
;
3504 tem
= recog_data
.operand
[commutative
];
3505 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3506 recog_data
.operand
[commutative
+ 1] = tem
;
3507 tem
= *recog_data
.operand_loc
[commutative
];
3508 *recog_data
.operand_loc
[commutative
]
3509 = *recog_data
.operand_loc
[commutative
+ 1];
3510 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3512 for (i
= 0; i
< n_reloads
; i
++)
3514 if (rld
[i
].opnum
== commutative
)
3515 rld
[i
].opnum
= commutative
+ 1;
3516 else if (rld
[i
].opnum
== commutative
+ 1)
3517 rld
[i
].opnum
= commutative
;
3521 for (i
= 0; i
< noperands
; i
++)
3523 operand_reloadnum
[i
] = -1;
3525 /* If this is an earlyclobber operand, we need to widen the scope.
3526 The reload must remain valid from the start of the insn being
3527 reloaded until after the operand is stored into its destination.
3528 We approximate this with RELOAD_OTHER even though we know that we
3529 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3531 One special case that is worth checking is when we have an
3532 output that is earlyclobber but isn't used past the insn (typically
3533 a SCRATCH). In this case, we only need have the reload live
3534 through the insn itself, but not for any of our input or output
3536 But we must not accidentally narrow the scope of an existing
3537 RELOAD_OTHER reload - leave these alone.
3539 In any case, anything needed to address this operand can remain
3540 however they were previously categorized. */
3542 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3544 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3545 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3548 /* Any constants that aren't allowed and can't be reloaded
3549 into registers are here changed into memory references. */
3550 for (i
= 0; i
< noperands
; i
++)
3551 if (! goal_alternative_win
[i
]
3552 && CONSTANT_P (recog_data
.operand
[i
])
3553 /* force_const_mem does not accept HIGH. */
3554 && GET_CODE (recog_data
.operand
[i
]) != HIGH
3555 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3556 (enum reg_class
) goal_alternative
[i
])
3558 || no_input_reloads
)
3559 && operand_mode
[i
] != VOIDmode
)
3561 substed_operand
[i
] = recog_data
.operand
[i
]
3562 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3563 recog_data
.operand
[i
]),
3564 i
, address_type
[i
], ind_levels
, 0, insn
,
3566 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3567 goal_alternative_number
))
3568 goal_alternative_win
[i
] = 1;
3571 /* Record the values of the earlyclobber operands for the caller. */
3572 if (goal_earlyclobber
)
3573 for (i
= 0; i
< noperands
; i
++)
3574 if (goal_alternative_earlyclobber
[i
])
3575 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3577 /* Now record reloads for all the operands that need them. */
3578 for (i
= 0; i
< noperands
; i
++)
3579 if (! goal_alternative_win
[i
])
3581 /* Operands that match previous ones have already been handled. */
3582 if (goal_alternative_matches
[i
] >= 0)
3584 /* Handle an operand with a nonoffsettable address
3585 appearing where an offsettable address will do
3586 by reloading the address into a base register.
3588 ??? We can also do this when the operand is a register and
3589 reg_equiv_mem is not offsettable, but this is a bit tricky,
3590 so we don't bother with it. It may not be worth doing. */
3591 else if (goal_alternative_matched
[i
] == -1
3592 && goal_alternative_offmemok
[i
]
3593 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3595 operand_reloadnum
[i
]
3596 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3597 &XEXP (recog_data
.operand
[i
], 0), NULL_PTR
,
3599 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3600 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3601 rld
[operand_reloadnum
[i
]].inc
3602 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3604 /* If this operand is an output, we will have made any
3605 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3606 now we are treating part of the operand as an input, so
3607 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3609 if (modified
[i
] == RELOAD_WRITE
)
3611 for (j
= 0; j
< n_reloads
; j
++)
3613 if (rld
[j
].opnum
== i
)
3615 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3616 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3617 else if (rld
[j
].when_needed
3618 == RELOAD_FOR_OUTADDR_ADDRESS
)
3619 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3624 else if (goal_alternative_matched
[i
] == -1)
3626 operand_reloadnum
[i
]
3627 = push_reload ((modified
[i
] != RELOAD_WRITE
3628 ? recog_data
.operand
[i
] : 0),
3629 (modified
[i
] != RELOAD_READ
3630 ? recog_data
.operand
[i
] : 0),
3631 (modified
[i
] != RELOAD_WRITE
3632 ? recog_data
.operand_loc
[i
] : 0),
3633 (modified
[i
] != RELOAD_READ
3634 ? recog_data
.operand_loc
[i
] : 0),
3635 (enum reg_class
) goal_alternative
[i
],
3636 (modified
[i
] == RELOAD_WRITE
3637 ? VOIDmode
: operand_mode
[i
]),
3638 (modified
[i
] == RELOAD_READ
3639 ? VOIDmode
: operand_mode
[i
]),
3640 (insn_code_number
< 0 ? 0
3641 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3642 0, i
, operand_type
[i
]);
3644 /* In a matching pair of operands, one must be input only
3645 and the other must be output only.
3646 Pass the input operand as IN and the other as OUT. */
3647 else if (modified
[i
] == RELOAD_READ
3648 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3650 operand_reloadnum
[i
]
3651 = push_reload (recog_data
.operand
[i
],
3652 recog_data
.operand
[goal_alternative_matched
[i
]],
3653 recog_data
.operand_loc
[i
],
3654 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3655 (enum reg_class
) goal_alternative
[i
],
3657 operand_mode
[goal_alternative_matched
[i
]],
3658 0, 0, i
, RELOAD_OTHER
);
3659 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3661 else if (modified
[i
] == RELOAD_WRITE
3662 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3664 operand_reloadnum
[goal_alternative_matched
[i
]]
3665 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3666 recog_data
.operand
[i
],
3667 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3668 recog_data
.operand_loc
[i
],
3669 (enum reg_class
) goal_alternative
[i
],
3670 operand_mode
[goal_alternative_matched
[i
]],
3672 0, 0, i
, RELOAD_OTHER
);
3673 operand_reloadnum
[i
] = output_reloadnum
;
3675 else if (insn_code_number
>= 0)
3679 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3680 /* Avoid further trouble with this insn. */
3681 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3686 else if (goal_alternative_matched
[i
] < 0
3687 && goal_alternative_matches
[i
] < 0
3690 /* For each non-matching operand that's a MEM or a pseudo-register
3691 that didn't get a hard register, make an optional reload.
3692 This may get done even if the insn needs no reloads otherwise. */
3694 rtx operand
= recog_data
.operand
[i
];
3696 while (GET_CODE (operand
) == SUBREG
)
3697 operand
= XEXP (operand
, 0);
3698 if ((GET_CODE (operand
) == MEM
3699 || (GET_CODE (operand
) == REG
3700 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3701 /* If this is only for an output, the optional reload would not
3702 actually cause us to use a register now, just note that
3703 something is stored here. */
3704 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3705 || modified
[i
] == RELOAD_WRITE
)
3706 && ! no_input_reloads
3707 /* An optional output reload might allow to delete INSN later.
3708 We mustn't make in-out reloads on insns that are not permitted
3710 If this is an asm, we can't delete it; we must not even call
3711 push_reload for an optional output reload in this case,
3712 because we can't be sure that the constraint allows a register,
3713 and push_reload verifies the constraints for asms. */
3714 && (modified
[i
] == RELOAD_READ
3715 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3716 operand_reloadnum
[i
]
3717 = push_reload ((modified
[i
] != RELOAD_WRITE
3718 ? recog_data
.operand
[i
] : 0),
3719 (modified
[i
] != RELOAD_READ
3720 ? recog_data
.operand
[i
] : 0),
3721 (modified
[i
] != RELOAD_WRITE
3722 ? recog_data
.operand_loc
[i
] : 0),
3723 (modified
[i
] != RELOAD_READ
3724 ? recog_data
.operand_loc
[i
] : 0),
3725 (enum reg_class
) goal_alternative
[i
],
3726 (modified
[i
] == RELOAD_WRITE
3727 ? VOIDmode
: operand_mode
[i
]),
3728 (modified
[i
] == RELOAD_READ
3729 ? VOIDmode
: operand_mode
[i
]),
3730 (insn_code_number
< 0 ? 0
3731 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3732 1, i
, operand_type
[i
]);
3733 /* If a memory reference remains (either as a MEM or a pseudo that
3734 did not get a hard register), yet we can't make an optional
3735 reload, check if this is actually a pseudo register reference;
3736 we then need to emit a USE and/or a CLOBBER so that reload
3737 inheritance will do the right thing. */
3739 && (GET_CODE (operand
) == MEM
3740 || (GET_CODE (operand
) == REG
3741 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3742 && reg_renumber
[REGNO (operand
)] < 0)))
3744 operand
= *recog_data
.operand_loc
[i
];
3746 while (GET_CODE (operand
) == SUBREG
)
3747 operand
= XEXP (operand
, 0);
3748 if (GET_CODE (operand
) == REG
)
3750 if (modified
[i
] != RELOAD_WRITE
)
3751 emit_insn_before (gen_rtx_USE (VOIDmode
, operand
), insn
);
3752 if (modified
[i
] != RELOAD_READ
)
3753 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3757 else if (goal_alternative_matches
[i
] >= 0
3758 && goal_alternative_win
[goal_alternative_matches
[i
]]
3759 && modified
[i
] == RELOAD_READ
3760 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3761 && ! no_input_reloads
&& ! no_output_reloads
3764 /* Similarly, make an optional reload for a pair of matching
3765 objects that are in MEM or a pseudo that didn't get a hard reg. */
3767 rtx operand
= recog_data
.operand
[i
];
3769 while (GET_CODE (operand
) == SUBREG
)
3770 operand
= XEXP (operand
, 0);
3771 if ((GET_CODE (operand
) == MEM
3772 || (GET_CODE (operand
) == REG
3773 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3774 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3776 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3777 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
3778 recog_data
.operand
[i
],
3779 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
3780 recog_data
.operand_loc
[i
],
3781 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3782 operand_mode
[goal_alternative_matches
[i
]],
3784 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3787 /* Perform whatever substitutions on the operands we are supposed
3788 to make due to commutativity or replacement of registers
3789 with equivalent constants or memory slots. */
3791 for (i
= 0; i
< noperands
; i
++)
3793 /* We only do this on the last pass through reload, because it is
3794 possible for some data (like reg_equiv_address) to be changed during
3795 later passes. Moreover, we loose the opportunity to get a useful
3796 reload_{in,out}_reg when we do these replacements. */
3800 rtx substitution
= substed_operand
[i
];
3802 *recog_data
.operand_loc
[i
] = substitution
;
3804 /* If we're replacing an operand with a LABEL_REF, we need
3805 to make sure that there's a REG_LABEL note attached to
3806 this instruction. */
3807 if (GET_CODE (insn
) != JUMP_INSN
3808 && GET_CODE (substitution
) == LABEL_REF
3809 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
3810 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
,
3811 XEXP (substitution
, 0),
3815 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
3818 /* If this insn pattern contains any MATCH_DUP's, make sure that
3819 they will be substituted if the operands they match are substituted.
3820 Also do now any substitutions we already did on the operands.
3822 Don't do this if we aren't making replacements because we might be
3823 propagating things allocated by frame pointer elimination into places
3824 it doesn't expect. */
3826 if (insn_code_number
>= 0 && replace
)
3827 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
3829 int opno
= recog_data
.dup_num
[i
];
3830 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
3831 if (operand_reloadnum
[opno
] >= 0)
3832 push_replacement (recog_data
.dup_loc
[i
], operand_reloadnum
[opno
],
3833 insn_data
[insn_code_number
].operand
[opno
].mode
);
3837 /* This loses because reloading of prior insns can invalidate the equivalence
3838 (or at least find_equiv_reg isn't smart enough to find it any more),
3839 causing this insn to need more reload regs than it needed before.
3840 It may be too late to make the reload regs available.
3841 Now this optimization is done safely in choose_reload_regs. */
3843 /* For each reload of a reg into some other class of reg,
3844 search for an existing equivalent reg (same value now) in the right class.
3845 We can use it as long as we don't need to change its contents. */
3846 for (i
= 0; i
< n_reloads
; i
++)
3847 if (rld
[i
].reg_rtx
== 0
3849 && GET_CODE (rld
[i
].in
) == REG
3853 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
3854 static_reload_reg_p
, 0, rld
[i
].inmode
);
3855 /* Prevent generation of insn to load the value
3856 because the one we found already has the value. */
3858 rld
[i
].in
= rld
[i
].reg_rtx
;
3862 /* Perhaps an output reload can be combined with another
3863 to reduce needs by one. */
3864 if (!goal_earlyclobber
)
3867 /* If we have a pair of reloads for parts of an address, they are reloading
3868 the same object, the operands themselves were not reloaded, and they
3869 are for two operands that are supposed to match, merge the reloads and
3870 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3872 for (i
= 0; i
< n_reloads
; i
++)
3876 for (j
= i
+ 1; j
< n_reloads
; j
++)
3877 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3878 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3879 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3880 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3881 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3882 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3883 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3884 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3885 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
3886 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3887 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
3888 && (operand_reloadnum
[rld
[j
].opnum
] < 0
3889 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
3890 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
3891 || (goal_alternative_matches
[rld
[j
].opnum
]
3894 for (k
= 0; k
< n_replacements
; k
++)
3895 if (replacements
[k
].what
== j
)
3896 replacements
[k
].what
= i
;
3898 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3899 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3900 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3902 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3907 /* Scan all the reloads and update their type.
3908 If a reload is for the address of an operand and we didn't reload
3909 that operand, change the type. Similarly, change the operand number
3910 of a reload when two operands match. If a reload is optional, treat it
3911 as though the operand isn't reloaded.
3913 ??? This latter case is somewhat odd because if we do the optional
3914 reload, it means the object is hanging around. Thus we need only
3915 do the address reload if the optional reload was NOT done.
3917 Change secondary reloads to be the address type of their operand, not
3920 If an operand's reload is now RELOAD_OTHER, change any
3921 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3922 RELOAD_FOR_OTHER_ADDRESS. */
3924 for (i
= 0; i
< n_reloads
; i
++)
3926 if (rld
[i
].secondary_p
3927 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
3928 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
3930 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3931 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3932 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3933 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3934 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3935 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
3937 /* If we have a secondary reload to go along with this reload,
3938 change its type to RELOAD_FOR_OPADDR_ADDR. */
3940 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3941 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
3942 && rld
[i
].secondary_in_reload
!= -1)
3944 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
3946 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3948 /* If there's a tertiary reload we have to change it also. */
3949 if (secondary_in_reload
> 0
3950 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
3951 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
3952 = RELOAD_FOR_OPADDR_ADDR
;
3955 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3956 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3957 && rld
[i
].secondary_out_reload
!= -1)
3959 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
3961 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3963 /* If there's a tertiary reload we have to change it also. */
3964 if (secondary_out_reload
3965 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
3966 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
3967 = RELOAD_FOR_OPADDR_ADDR
;
3970 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3971 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3972 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3974 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3977 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3978 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
3979 && operand_reloadnum
[rld
[i
].opnum
] >= 0
3980 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
3982 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
3984 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
3985 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
3988 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
3989 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
3990 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
3992 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
3993 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
3994 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
3995 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
3996 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
3997 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
3998 This is complicated by the fact that a single operand can have more
3999 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4000 choose_reload_regs without affecting code quality, and cases that
4001 actually fail are extremely rare, so it turns out to be better to fix
4002 the problem here by not generating cases that choose_reload_regs will
4004 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4005 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4007 We can reduce the register pressure by exploiting that a
4008 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4009 does not conflict with any of them, if it is only used for the first of
4010 the RELOAD_FOR_X_ADDRESS reloads. */
4012 int first_op_addr_num
= -2;
4013 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4014 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4015 int need_change
= 0;
4016 /* We use last_op_addr_reload and the contents of the above arrays
4017 first as flags - -2 means no instance encountered, -1 means exactly
4018 one instance encountered.
4019 If more than one instance has been encountered, we store the reload
4020 number of the first reload of the kind in question; reload numbers
4021 are known to be non-negative. */
4022 for (i
= 0; i
< noperands
; i
++)
4023 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4024 for (i
= n_reloads
- 1; i
>= 0; i
--)
4026 switch (rld
[i
].when_needed
)
4028 case RELOAD_FOR_OPERAND_ADDRESS
:
4029 if (++first_op_addr_num
>= 0)
4031 first_op_addr_num
= i
;
4035 case RELOAD_FOR_INPUT_ADDRESS
:
4036 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4038 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4042 case RELOAD_FOR_OUTPUT_ADDRESS
:
4043 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4045 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4056 for (i
= 0; i
< n_reloads
; i
++)
4059 enum reload_type type
;
4061 switch (rld
[i
].when_needed
)
4063 case RELOAD_FOR_OPADDR_ADDR
:
4064 first_num
= first_op_addr_num
;
4065 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4067 case RELOAD_FOR_INPADDR_ADDRESS
:
4068 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4069 type
= RELOAD_FOR_INPUT_ADDRESS
;
4071 case RELOAD_FOR_OUTADDR_ADDRESS
:
4072 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4073 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4080 else if (i
> first_num
)
4081 rld
[i
].when_needed
= type
;
4084 /* Check if the only TYPE reload that uses reload I is
4085 reload FIRST_NUM. */
4086 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4088 if (rld
[j
].when_needed
== type
4089 && (rld
[i
].secondary_p
4090 ? rld
[j
].secondary_in_reload
== i
4091 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4093 rld
[i
].when_needed
= type
;
4102 /* See if we have any reloads that are now allowed to be merged
4103 because we've changed when the reload is needed to
4104 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4105 check for the most common cases. */
4107 for (i
= 0; i
< n_reloads
; i
++)
4108 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4109 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4110 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4111 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4112 for (j
= 0; j
< n_reloads
; j
++)
4113 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4114 && rld
[j
].when_needed
== rld
[i
].when_needed
4115 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4116 && rld
[i
].class == rld
[j
].class
4117 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4118 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4120 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4121 transfer_replacements (i
, j
);
4126 /* If we made any reloads for addresses, see if they violate a
4127 "no input reloads" requirement for this insn. But loads that we
4128 do after the insn (such as for output addresses) are fine. */
4129 if (no_input_reloads
)
4130 for (i
= 0; i
< n_reloads
; i
++)
4132 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
4133 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
)
4137 /* Compute reload_mode and reload_nregs. */
4138 for (i
= 0; i
< n_reloads
; i
++)
4141 = (rld
[i
].inmode
== VOIDmode
4142 || (GET_MODE_SIZE (rld
[i
].outmode
)
4143 > GET_MODE_SIZE (rld
[i
].inmode
)))
4144 ? rld
[i
].outmode
: rld
[i
].inmode
;
4146 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4152 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4153 accepts a memory operand with constant address. */
4156 alternative_allows_memconst (constraint
, altnum
)
4157 const char *constraint
;
4161 /* Skip alternatives before the one requested. */
4164 while (*constraint
++ != ',');
4167 /* Scan the requested alternative for 'm' or 'o'.
4168 If one of them is present, this alternative accepts memory constants. */
4169 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
4170 if (c
== 'm' || c
== 'o')
4175 /* Scan X for memory references and scan the addresses for reloading.
4176 Also checks for references to "constant" regs that we want to eliminate
4177 and replaces them with the values they stand for.
4178 We may alter X destructively if it contains a reference to such.
4179 If X is just a constant reg, we return the equivalent value
4182 IND_LEVELS says how many levels of indirect addressing this machine
4185 OPNUM and TYPE identify the purpose of the reload.
4187 IS_SET_DEST is true if X is the destination of a SET, which is not
4188 appropriate to be replaced by a constant.
4190 INSN, if nonzero, is the insn in which we do the reload. It is used
4191 to determine if we may generate output reloads, and where to put USEs
4192 for pseudos that we have to replace with stack slots.
4194 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4195 result of find_reloads_address. */
4198 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
, insn
,
4202 enum reload_type type
;
4206 int *address_reloaded
;
4208 register RTX_CODE code
= GET_CODE (x
);
4210 register const char *fmt
= GET_RTX_FORMAT (code
);
4216 /* This code is duplicated for speed in find_reloads. */
4217 register int regno
= REGNO (x
);
4218 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4219 x
= reg_equiv_constant
[regno
];
4221 /* This creates (subreg (mem...)) which would cause an unnecessary
4222 reload of the mem. */
4223 else if (reg_equiv_mem
[regno
] != 0)
4224 x
= reg_equiv_mem
[regno
];
4226 else if (reg_equiv_memory_loc
[regno
]
4227 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4229 rtx mem
= make_memloc (x
, regno
);
4230 if (reg_equiv_address
[regno
]
4231 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4233 /* If this is not a toplevel operand, find_reloads doesn't see
4234 this substitution. We have to emit a USE of the pseudo so
4235 that delete_output_reload can see it. */
4236 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4237 emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
);
4239 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4240 opnum
, type
, ind_levels
, insn
);
4241 if (address_reloaded
)
4242 *address_reloaded
= i
;
4251 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4252 opnum
, type
, ind_levels
, insn
);
4253 if (address_reloaded
)
4254 *address_reloaded
= i
;
4259 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4261 /* Check for SUBREG containing a REG that's equivalent to a constant.
4262 If the constant has a known value, truncate it right now.
4263 Similarly if we are extracting a single-word of a multi-word
4264 constant. If the constant is symbolic, allow it to be substituted
4265 normally. push_reload will strip the subreg later. If the
4266 constant is VOIDmode, abort because we will lose the mode of
4267 the register (this should never happen because one of the cases
4268 above should handle it). */
4270 register int regno
= REGNO (SUBREG_REG (x
));
4273 if (subreg_lowpart_p (x
)
4274 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4275 && reg_equiv_constant
[regno
] != 0
4276 && (tem
= gen_lowpart_common (GET_MODE (x
),
4277 reg_equiv_constant
[regno
])) != 0)
4280 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
4281 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4282 && reg_equiv_constant
[regno
] != 0
4283 && (tem
= operand_subword (reg_equiv_constant
[regno
],
4285 GET_MODE (SUBREG_REG (x
)))) != 0)
4287 /* TEM is now a word sized constant for the bits from X that
4288 we wanted. However, TEM may be the wrong representation.
4290 Use gen_lowpart_common to convert a CONST_INT into a
4291 CONST_DOUBLE and vice versa as needed according to by the mode
4293 tem
= gen_lowpart_common (GET_MODE (x
), tem
);
4299 /* If the SUBREG is wider than a word, the above test will fail.
4300 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4301 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4302 a 32 bit target. We still can - and have to - handle this
4303 for non-paradoxical subregs of CONST_INTs. */
4304 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4305 && reg_equiv_constant
[regno
] != 0
4306 && GET_CODE (reg_equiv_constant
[regno
]) == CONST_INT
4307 && (GET_MODE_SIZE (GET_MODE (x
))
4308 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
4310 int shift
= SUBREG_WORD (x
) * BITS_PER_WORD
;
4311 if (WORDS_BIG_ENDIAN
)
4312 shift
= (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4313 - GET_MODE_BITSIZE (GET_MODE (x
))
4315 /* Here we use the knowledge that CONST_INTs have a
4316 HOST_WIDE_INT field. */
4317 if (shift
>= HOST_BITS_PER_WIDE_INT
)
4318 shift
= HOST_BITS_PER_WIDE_INT
- 1;
4319 return GEN_INT (INTVAL (reg_equiv_constant
[regno
]) >> shift
);
4322 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4323 && reg_equiv_constant
[regno
] != 0
4324 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
4327 /* If the subreg contains a reg that will be converted to a mem,
4328 convert the subreg to a narrower memref now.
4329 Otherwise, we would get (subreg (mem ...) ...),
4330 which would force reload of the mem.
4332 We also need to do this if there is an equivalent MEM that is
4333 not offsettable. In that case, alter_subreg would produce an
4334 invalid address on big-endian machines.
4336 For machines that extend byte loads, we must not reload using
4337 a wider mode if we have a paradoxical SUBREG. find_reloads will
4338 force a reload in that case. So we should not do anything here. */
4340 else if (regno
>= FIRST_PSEUDO_REGISTER
4341 #ifdef LOAD_EXTEND_OP
4342 && (GET_MODE_SIZE (GET_MODE (x
))
4343 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4345 && (reg_equiv_address
[regno
] != 0
4346 || (reg_equiv_mem
[regno
] != 0
4347 && (! strict_memory_address_p (GET_MODE (x
),
4348 XEXP (reg_equiv_mem
[regno
], 0))
4349 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4350 || num_not_at_initial_offset
))))
4351 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4354 else if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == MEM
4355 && (GET_MODE_SIZE (GET_MODE (x
))
4356 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4357 && mode_dependent_address_p (XEXP (SUBREG_REG (x
), 0)))
4359 /* A paradoxical subreg will simply have the mode of the access
4360 changed, so we need to reload such a memory operand to stabilize
4361 the meaning of the memory access. */
4362 enum machine_mode subreg_mode
= GET_MODE (SUBREG_REG (x
));
4365 push_reload (NULL_RTX
, SUBREG_REG (x
), NULL_PTR
, &SUBREG_REG (x
),
4366 find_valid_class (subreg_mode
, SUBREG_WORD (x
)),
4367 VOIDmode
, subreg_mode
, 0, 0, opnum
, type
);
4369 push_reload (SUBREG_REG (x
), NULL_RTX
, &SUBREG_REG (x
), NULL_PTR
,
4370 find_valid_class (subreg_mode
, SUBREG_WORD (x
)),
4371 subreg_mode
, VOIDmode
, 0, 0, opnum
, type
);
4374 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4378 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4379 ind_levels
, is_set_dest
, insn
,
4381 /* If we have replaced a reg with it's equivalent memory loc -
4382 that can still be handled here e.g. if it's in a paradoxical
4383 subreg - we must make the change in a copy, rather than using
4384 a destructive change. This way, find_reloads can still elect
4385 not to do the change. */
4386 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4388 x
= shallow_copy_rtx (x
);
4391 XEXP (x
, i
) = new_part
;
4397 /* Return a mem ref for the memory equivalent of reg REGNO.
4398 This mem ref is not shared with anything. */
4401 make_memloc (ad
, regno
)
4405 /* We must rerun eliminate_regs, in case the elimination
4406 offsets have changed. */
4408 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4410 /* If TEM might contain a pseudo, we must copy it to avoid
4411 modifying it when we do the substitution for the reload. */
4412 if (rtx_varies_p (tem
))
4413 tem
= copy_rtx (tem
);
4415 tem
= gen_rtx_MEM (GET_MODE (ad
), tem
);
4416 MEM_COPY_ATTRIBUTES (tem
, reg_equiv_memory_loc
[regno
]);
4420 /* Record all reloads needed for handling memory address AD
4421 which appears in *LOC in a memory reference to mode MODE
4422 which itself is found in location *MEMREFLOC.
4423 Note that we take shortcuts assuming that no multi-reg machine mode
4424 occurs as part of an address.
4426 OPNUM and TYPE specify the purpose of this reload.
4428 IND_LEVELS says how many levels of indirect addressing this machine
4431 INSN, if nonzero, is the insn in which we do the reload. It is used
4432 to determine if we may generate output reloads, and where to put USEs
4433 for pseudos that we have to replace with stack slots.
4435 Value is nonzero if this address is reloaded or replaced as a whole.
4436 This is interesting to the caller if the address is an autoincrement.
4438 Note that there is no verification that the address will be valid after
4439 this routine does its work. Instead, we rely on the fact that the address
4440 was valid when reload started. So we need only undo things that reload
4441 could have broken. These are wrong register types, pseudos not allocated
4442 to a hard register, and frame pointer elimination. */
4445 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4446 enum machine_mode mode
;
4451 enum reload_type type
;
4456 int removed_and
= 0;
4459 /* If the address is a register, see if it is a legitimate address and
4460 reload if not. We first handle the cases where we need not reload
4461 or where we must reload in a non-standard way. */
4463 if (GET_CODE (ad
) == REG
)
4467 if (reg_equiv_constant
[regno
] != 0
4468 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
4470 *loc
= ad
= reg_equiv_constant
[regno
];
4474 tem
= reg_equiv_memory_loc
[regno
];
4477 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4479 tem
= make_memloc (ad
, regno
);
4480 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4482 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
4483 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
4486 /* We can avoid a reload if the register's equivalent memory
4487 expression is valid as an indirect memory address.
4488 But not all addresses are valid in a mem used as an indirect
4489 address: only reg or reg+constant. */
4492 && strict_memory_address_p (mode
, tem
)
4493 && (GET_CODE (XEXP (tem
, 0)) == REG
4494 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4495 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4496 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4498 /* TEM is not the same as what we'll be replacing the
4499 pseudo with after reload, put a USE in front of INSN
4500 in the final reload pass. */
4502 && num_not_at_initial_offset
4503 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4506 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4507 /* This doesn't really count as replacing the address
4508 as a whole, since it is still a memory access. */
4516 /* The only remaining case where we can avoid a reload is if this is a
4517 hard register that is valid as a base register and which is not the
4518 subject of a CLOBBER in this insn. */
4520 else if (regno
< FIRST_PSEUDO_REGISTER
4521 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4522 && ! regno_clobbered_p (regno
, this_insn
))
4525 /* If we do not have one of the cases above, we must do the reload. */
4526 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4527 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4531 if (strict_memory_address_p (mode
, ad
))
4533 /* The address appears valid, so reloads are not needed.
4534 But the address may contain an eliminable register.
4535 This can happen because a machine with indirect addressing
4536 may consider a pseudo register by itself a valid address even when
4537 it has failed to get a hard reg.
4538 So do a tree-walk to find and eliminate all such regs. */
4540 /* But first quickly dispose of a common case. */
4541 if (GET_CODE (ad
) == PLUS
4542 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4543 && GET_CODE (XEXP (ad
, 0)) == REG
4544 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4547 subst_reg_equivs_changed
= 0;
4548 *loc
= subst_reg_equivs (ad
, insn
);
4550 if (! subst_reg_equivs_changed
)
4553 /* Check result for validity after substitution. */
4554 if (strict_memory_address_p (mode
, ad
))
4558 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4563 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4568 *memrefloc
= copy_rtx (*memrefloc
);
4569 XEXP (*memrefloc
, 0) = ad
;
4570 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4576 /* The address is not valid. We have to figure out why. First see if
4577 we have an outer AND and remove it if so. Then analyze what's inside. */
4579 if (GET_CODE (ad
) == AND
)
4582 loc
= &XEXP (ad
, 0);
4586 /* One possibility for why the address is invalid is that it is itself
4587 a MEM. This can happen when the frame pointer is being eliminated, a
4588 pseudo is not allocated to a hard register, and the offset between the
4589 frame and stack pointers is not its initial value. In that case the
4590 pseudo will have been replaced by a MEM referring to the
4592 if (GET_CODE (ad
) == MEM
)
4594 /* First ensure that the address in this MEM is valid. Then, unless
4595 indirect addresses are valid, reload the MEM into a register. */
4597 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4598 opnum
, ADDR_TYPE (type
),
4599 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4601 /* If tem was changed, then we must create a new memory reference to
4602 hold it and store it back into memrefloc. */
4603 if (tem
!= ad
&& memrefloc
)
4605 *memrefloc
= copy_rtx (*memrefloc
);
4606 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4607 loc
= &XEXP (*memrefloc
, 0);
4609 loc
= &XEXP (*loc
, 0);
4612 /* Check similar cases as for indirect addresses as above except
4613 that we can allow pseudos and a MEM since they should have been
4614 taken care of above. */
4617 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4618 || GET_CODE (XEXP (tem
, 0)) == MEM
4619 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4620 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4621 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4622 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4624 /* Must use TEM here, not AD, since it is the one that will
4625 have any subexpressions reloaded, if needed. */
4626 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4627 BASE_REG_CLASS
, GET_MODE (tem
),
4630 return ! removed_and
;
4636 /* If we have address of a stack slot but it's not valid because the
4637 displacement is too large, compute the sum in a register.
4638 Handle all base registers here, not just fp/ap/sp, because on some
4639 targets (namely SH) we can also get too large displacements from
4640 big-endian corrections. */
4641 else if (GET_CODE (ad
) == PLUS
4642 && GET_CODE (XEXP (ad
, 0)) == REG
4643 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4644 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4645 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4647 /* Unshare the MEM rtx so we can safely alter it. */
4650 *memrefloc
= copy_rtx (*memrefloc
);
4651 loc
= &XEXP (*memrefloc
, 0);
4653 loc
= &XEXP (*loc
, 0);
4656 if (double_reg_address_ok
)
4658 /* Unshare the sum as well. */
4659 *loc
= ad
= copy_rtx (ad
);
4661 /* Reload the displacement into an index reg.
4662 We assume the frame pointer or arg pointer is a base reg. */
4663 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4664 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4670 /* If the sum of two regs is not necessarily valid,
4671 reload the sum into a base reg.
4672 That will at least work. */
4673 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
,
4674 Pmode
, opnum
, type
, ind_levels
);
4676 return ! removed_and
;
4679 /* If we have an indexed stack slot, there are three possible reasons why
4680 it might be invalid: The index might need to be reloaded, the address
4681 might have been made by frame pointer elimination and hence have a
4682 constant out of range, or both reasons might apply.
4684 We can easily check for an index needing reload, but even if that is the
4685 case, we might also have an invalid constant. To avoid making the
4686 conservative assumption and requiring two reloads, we see if this address
4687 is valid when not interpreted strictly. If it is, the only problem is
4688 that the index needs a reload and find_reloads_address_1 will take care
4691 If we decide to do something here, it must be that
4692 `double_reg_address_ok' is true and that this address rtl was made by
4693 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4694 rework the sum so that the reload register will be added to the index.
4695 This is safe because we know the address isn't shared.
4697 We check for fp/ap/sp as both the first and second operand of the
4700 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4701 && GET_CODE (XEXP (ad
, 0)) == PLUS
4702 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4703 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4704 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4706 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4707 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4709 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4710 && ! memory_address_p (mode
, ad
))
4712 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4713 plus_constant (XEXP (XEXP (ad
, 0), 0),
4714 INTVAL (XEXP (ad
, 1))),
4715 XEXP (XEXP (ad
, 0), 1));
4716 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4717 GET_MODE (ad
), opnum
, type
, ind_levels
);
4718 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4724 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4725 && GET_CODE (XEXP (ad
, 0)) == PLUS
4726 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4727 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4728 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4730 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4731 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4733 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4734 && ! memory_address_p (mode
, ad
))
4736 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4737 XEXP (XEXP (ad
, 0), 0),
4738 plus_constant (XEXP (XEXP (ad
, 0), 1),
4739 INTVAL (XEXP (ad
, 1))));
4740 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1), BASE_REG_CLASS
,
4741 GET_MODE (ad
), opnum
, type
, ind_levels
);
4742 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4748 /* See if address becomes valid when an eliminable register
4749 in a sum is replaced. */
4752 if (GET_CODE (ad
) == PLUS
)
4753 tem
= subst_indexed_address (ad
);
4754 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4756 /* Ok, we win that way. Replace any additional eliminable
4759 subst_reg_equivs_changed
= 0;
4760 tem
= subst_reg_equivs (tem
, insn
);
4762 /* Make sure that didn't make the address invalid again. */
4764 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4771 /* If constants aren't valid addresses, reload the constant address
4773 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4775 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4776 Unshare it so we can safely alter it. */
4777 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4778 && CONSTANT_POOL_ADDRESS_P (ad
))
4780 *memrefloc
= copy_rtx (*memrefloc
);
4781 loc
= &XEXP (*memrefloc
, 0);
4783 loc
= &XEXP (*loc
, 0);
4786 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4788 return ! removed_and
;
4791 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
4795 /* Find all pseudo regs appearing in AD
4796 that are eliminable in favor of equivalent values
4797 and do not have hard regs; replace them by their equivalents.
4798 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4799 front of it for pseudos that we have to replace with stack slots. */
4802 subst_reg_equivs (ad
, insn
)
4806 register RTX_CODE code
= GET_CODE (ad
);
4808 register const char *fmt
;
4824 register int regno
= REGNO (ad
);
4826 if (reg_equiv_constant
[regno
] != 0)
4828 subst_reg_equivs_changed
= 1;
4829 return reg_equiv_constant
[regno
];
4831 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
4833 rtx mem
= make_memloc (ad
, regno
);
4834 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4836 subst_reg_equivs_changed
= 1;
4837 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4845 /* Quickly dispose of a common case. */
4846 if (XEXP (ad
, 0) == frame_pointer_rtx
4847 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4855 fmt
= GET_RTX_FORMAT (code
);
4856 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4858 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
4862 /* Compute the sum of X and Y, making canonicalizations assumed in an
4863 address, namely: sum constant integers, surround the sum of two
4864 constants with a CONST, put the constant as the second operand, and
4865 group the constant on the outermost sum.
4867 This routine assumes both inputs are already in canonical form. */
4874 enum machine_mode mode
= GET_MODE (x
);
4876 if (mode
== VOIDmode
)
4877 mode
= GET_MODE (y
);
4879 if (mode
== VOIDmode
)
4882 if (GET_CODE (x
) == CONST_INT
)
4883 return plus_constant (y
, INTVAL (x
));
4884 else if (GET_CODE (y
) == CONST_INT
)
4885 return plus_constant (x
, INTVAL (y
));
4886 else if (CONSTANT_P (x
))
4887 tem
= x
, x
= y
, y
= tem
;
4889 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4890 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4892 /* Note that if the operands of Y are specified in the opposite
4893 order in the recursive calls below, infinite recursion will occur. */
4894 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4895 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4897 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4898 constant will have been placed second. */
4899 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4901 if (GET_CODE (x
) == CONST
)
4903 if (GET_CODE (y
) == CONST
)
4906 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
4909 return gen_rtx_PLUS (mode
, x
, y
);
4912 /* If ADDR is a sum containing a pseudo register that should be
4913 replaced with a constant (from reg_equiv_constant),
4914 return the result of doing so, and also apply the associative
4915 law so that the result is more likely to be a valid address.
4916 (But it is not guaranteed to be one.)
4918 Note that at most one register is replaced, even if more are
4919 replaceable. Also, we try to put the result into a canonical form
4920 so it is more likely to be a valid address.
4922 In all other cases, return ADDR. */
4925 subst_indexed_address (addr
)
4928 rtx op0
= 0, op1
= 0, op2
= 0;
4932 if (GET_CODE (addr
) == PLUS
)
4934 /* Try to find a register to replace. */
4935 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4936 if (GET_CODE (op0
) == REG
4937 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4938 && reg_renumber
[regno
] < 0
4939 && reg_equiv_constant
[regno
] != 0)
4940 op0
= reg_equiv_constant
[regno
];
4941 else if (GET_CODE (op1
) == REG
4942 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4943 && reg_renumber
[regno
] < 0
4944 && reg_equiv_constant
[regno
] != 0)
4945 op1
= reg_equiv_constant
[regno
];
4946 else if (GET_CODE (op0
) == PLUS
4947 && (tem
= subst_indexed_address (op0
)) != op0
)
4949 else if (GET_CODE (op1
) == PLUS
4950 && (tem
= subst_indexed_address (op1
)) != op1
)
4955 /* Pick out up to three things to add. */
4956 if (GET_CODE (op1
) == PLUS
)
4957 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4958 else if (GET_CODE (op0
) == PLUS
)
4959 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4961 /* Compute the sum. */
4963 op1
= form_sum (op1
, op2
);
4965 op0
= form_sum (op0
, op1
);
4972 /* Record the pseudo registers we must reload into hard registers in a
4973 subexpression of a would-be memory address, X referring to a value
4974 in mode MODE. (This function is not called if the address we find
4977 CONTEXT = 1 means we are considering regs as index regs,
4978 = 0 means we are considering them as base regs.
4980 OPNUM and TYPE specify the purpose of any reloads made.
4982 IND_LEVELS says how many levels of indirect addressing are
4983 supported at this point in the address.
4985 INSN, if nonzero, is the insn in which we do the reload. It is used
4986 to determine if we may generate output reloads.
4988 We return nonzero if X, as a whole, is reloaded or replaced. */
4990 /* Note that we take shortcuts assuming that no multi-reg machine mode
4991 occurs as part of an address.
4992 Also, this is not fully machine-customizable; it works for machines
4993 such as vaxes and 68000's and 32000's, but other possible machines
4994 could have addressing modes that this does not handle right. */
4997 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
4998 enum machine_mode mode
;
5003 enum reload_type type
;
5007 register RTX_CODE code
= GET_CODE (x
);
5013 register rtx orig_op0
= XEXP (x
, 0);
5014 register rtx orig_op1
= XEXP (x
, 1);
5015 register RTX_CODE code0
= GET_CODE (orig_op0
);
5016 register RTX_CODE code1
= GET_CODE (orig_op1
);
5017 register rtx op0
= orig_op0
;
5018 register rtx op1
= orig_op1
;
5020 if (GET_CODE (op0
) == SUBREG
)
5022 op0
= SUBREG_REG (op0
);
5023 code0
= GET_CODE (op0
);
5024 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5025 op0
= gen_rtx_REG (word_mode
,
5026 REGNO (op0
) + SUBREG_WORD (orig_op0
));
5029 if (GET_CODE (op1
) == SUBREG
)
5031 op1
= SUBREG_REG (op1
);
5032 code1
= GET_CODE (op1
);
5033 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5034 op1
= gen_rtx_REG (GET_MODE (op1
),
5035 REGNO (op1
) + SUBREG_WORD (orig_op1
));
5038 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5039 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5041 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5042 type
, ind_levels
, insn
);
5043 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5044 type
, ind_levels
, insn
);
5047 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5048 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5050 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5051 type
, ind_levels
, insn
);
5052 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5053 type
, ind_levels
, insn
);
5056 else if (code0
== CONST_INT
|| code0
== CONST
5057 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5058 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5059 type
, ind_levels
, insn
);
5061 else if (code1
== CONST_INT
|| code1
== CONST
5062 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5063 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5064 type
, ind_levels
, insn
);
5066 else if (code0
== REG
&& code1
== REG
)
5068 if (REG_OK_FOR_INDEX_P (op0
)
5069 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5071 else if (REG_OK_FOR_INDEX_P (op1
)
5072 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5074 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5075 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5076 type
, ind_levels
, insn
);
5077 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5078 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5079 type
, ind_levels
, insn
);
5080 else if (REG_OK_FOR_INDEX_P (op1
))
5081 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5082 type
, ind_levels
, insn
);
5083 else if (REG_OK_FOR_INDEX_P (op0
))
5084 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5085 type
, ind_levels
, insn
);
5088 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5089 type
, ind_levels
, insn
);
5090 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5091 type
, ind_levels
, insn
);
5095 else if (code0
== REG
)
5097 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5098 type
, ind_levels
, insn
);
5099 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5100 type
, ind_levels
, insn
);
5103 else if (code1
== REG
)
5105 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5106 type
, ind_levels
, insn
);
5107 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5108 type
, ind_levels
, insn
);
5117 rtx op0
= XEXP (x
, 0);
5118 rtx op1
= XEXP (x
, 1);
5120 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5123 /* Currently, we only support {PRE,POST}_MODIFY constructs
5124 where a base register is {inc,dec}remented by the contents
5125 of another register or by a constant value. Thus, these
5126 operands must match. */
5127 if (op0
!= XEXP (op1
, 0))
5130 /* Require index register (or constant). Let's just handle the
5131 register case in the meantime... If the target allows
5132 auto-modify by a constant then we could try replacing a pseudo
5133 register with its equivalent constant where applicable. */
5134 if (REG_P (XEXP (op1
, 1)))
5135 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5136 find_reloads_address_1 (mode
, XEXP (op1
, 1), 1, &XEXP (op1
, 1),
5137 opnum
, type
, ind_levels
, insn
);
5139 if (REG_P (XEXP (op1
, 0)))
5141 register int regno
= REGNO (XEXP (op1
, 0));
5143 /* A register that is incremented cannot be constant! */
5144 if (regno
>= FIRST_PSEUDO_REGISTER
5145 && reg_equiv_constant
[regno
] != 0)
5148 /* Handle a register that is equivalent to a memory location
5149 which cannot be addressed directly. */
5150 if (reg_equiv_memory_loc
[regno
] != 0
5151 && (reg_equiv_address
[regno
] != 0
5152 || num_not_at_initial_offset
))
5154 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5156 if (reg_equiv_address
[regno
]
5157 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5159 /* First reload the memory location's address.
5160 We can't use ADDR_TYPE (type) here, because we need to
5161 write back the value after reading it, hence we actually
5162 need two registers. */
5163 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
5164 &XEXP (tem
, 0), opnum
, type
,
5167 /* Then reload the memory location into a base
5169 push_reload (tem
, tem
, &XEXP (x
, 0), &XEXP (op1
, 0),
5170 BASE_REG_CLASS
, GET_MODE (x
), GET_MODE (x
),
5171 0, 0, opnum
, RELOAD_OTHER
);
5176 if (reg_renumber
[regno
] >= 0)
5177 regno
= reg_renumber
[regno
];
5179 /* We require a base register here... */
5180 if (!REGNO_MODE_OK_FOR_BASE_P (regno
, GET_MODE (x
)))
5182 push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5183 &XEXP (op1
, 0), &XEXP (x
, 0),
5185 GET_MODE (x
), GET_MODE (x
), 0, 0,
5186 opnum
, RELOAD_OTHER
);
5198 if (GET_CODE (XEXP (x
, 0)) == REG
)
5200 register int regno
= REGNO (XEXP (x
, 0));
5204 /* A register that is incremented cannot be constant! */
5205 if (regno
>= FIRST_PSEUDO_REGISTER
5206 && reg_equiv_constant
[regno
] != 0)
5209 /* Handle a register that is equivalent to a memory location
5210 which cannot be addressed directly. */
5211 if (reg_equiv_memory_loc
[regno
] != 0
5212 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5214 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5215 if (reg_equiv_address
[regno
]
5216 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5218 /* First reload the memory location's address.
5219 We can't use ADDR_TYPE (type) here, because we need to
5220 write back the value after reading it, hence we actually
5221 need two registers. */
5222 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5223 &XEXP (tem
, 0), opnum
, type
,
5225 /* Put this inside a new increment-expression. */
5226 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5227 /* Proceed to reload that, as if it contained a register. */
5231 /* If we have a hard register that is ok as an index,
5232 don't make a reload. If an autoincrement of a nice register
5233 isn't "valid", it must be that no autoincrement is "valid".
5234 If that is true and something made an autoincrement anyway,
5235 this must be a special context where one is allowed.
5236 (For example, a "push" instruction.)
5237 We can't improve this address, so leave it alone. */
5239 /* Otherwise, reload the autoincrement into a suitable hard reg
5240 and record how much to increment by. */
5242 if (reg_renumber
[regno
] >= 0)
5243 regno
= reg_renumber
[regno
];
5244 if ((regno
>= FIRST_PSEUDO_REGISTER
5245 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5246 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5253 /* If we can output the register afterwards, do so, this
5254 saves the extra update.
5255 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5256 CALL_INSN - and it does not set CC0.
5257 But don't do this if we cannot directly address the
5258 memory location, since this will make it harder to
5259 reuse address reloads, and increases register pressure.
5260 Also don't do this if we can probably update x directly. */
5261 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5263 : reg_equiv_mem
[regno
]);
5264 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5265 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5266 && memory_operand (equiv
, GET_MODE (equiv
))
5268 && ! sets_cc0_p (PATTERN (insn
))
5270 && ! (icode
!= CODE_FOR_nothing
5271 && ((*insn_data
[icode
].operand
[0].predicate
)
5273 && ((*insn_data
[icode
].operand
[1].predicate
)
5279 = push_reload (x
, x
, loc
, loc
,
5280 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5281 GET_MODE (x
), GET_MODE (x
), 0, 0,
5282 opnum
, RELOAD_OTHER
);
5284 /* If we created a new MEM based on reg_equiv_mem[REGNO], then
5285 LOC above is part of the new MEM, not the MEM in INSN.
5287 We must also replace the address of the MEM in INSN. */
5288 if (&XEXP (x_orig
, 0) != loc
)
5289 push_replacement (&XEXP (x_orig
, 0), reloadnum
, VOIDmode
);
5295 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5296 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5297 GET_MODE (x
), GET_MODE (x
), 0, 0,
5300 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5306 /* Update the REG_INC notes. */
5308 for (link
= REG_NOTES (this_insn
);
5309 link
; link
= XEXP (link
, 1))
5310 if (REG_NOTE_KIND (link
) == REG_INC
5311 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
5312 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5318 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5320 /* This is probably the result of a substitution, by eliminate_regs,
5321 of an equivalent address for a pseudo that was not allocated to a
5322 hard register. Verify that the specified address is valid and
5323 reload it into a register. */
5324 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5325 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5329 /* Since we know we are going to reload this item, don't decrement
5330 for the indirection level.
5332 Note that this is actually conservative: it would be slightly
5333 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5335 /* We can't use ADDR_TYPE (type) here, because we need to
5336 write back the value after reading it, hence we actually
5337 need two registers. */
5338 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5339 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5340 opnum
, type
, ind_levels
, insn
);
5342 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5343 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5344 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5346 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5348 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5350 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5357 /* This is probably the result of a substitution, by eliminate_regs, of
5358 an equivalent address for a pseudo that was not allocated to a hard
5359 register. Verify that the specified address is valid and reload it
5362 Since we know we are going to reload this item, don't decrement for
5363 the indirection level.
5365 Note that this is actually conservative: it would be slightly more
5366 efficient to use the value of SPILL_INDIRECT_LEVELS from
5369 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5370 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5371 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
5372 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5373 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5378 register int regno
= REGNO (x
);
5380 if (reg_equiv_constant
[regno
] != 0)
5382 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5383 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5384 GET_MODE (x
), opnum
, type
, ind_levels
);
5388 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5389 that feeds this insn. */
5390 if (reg_equiv_mem
[regno
] != 0)
5392 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
5393 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5394 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5399 if (reg_equiv_memory_loc
[regno
]
5400 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5402 rtx tem
= make_memloc (x
, regno
);
5403 if (reg_equiv_address
[regno
] != 0
5404 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5407 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5408 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5413 if (reg_renumber
[regno
] >= 0)
5414 regno
= reg_renumber
[regno
];
5416 if ((regno
>= FIRST_PSEUDO_REGISTER
5417 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5418 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5420 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5421 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5422 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5426 /* If a register appearing in an address is the subject of a CLOBBER
5427 in this insn, reload it into some other register to be safe.
5428 The CLOBBER is supposed to make the register unavailable
5429 from before this insn to after it. */
5430 if (regno_clobbered_p (regno
, this_insn
))
5432 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5433 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5434 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5441 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5443 /* If this is a SUBREG of a hard register and the resulting register
5444 is of the wrong class, reload the whole SUBREG. This avoids
5445 needless copies if SUBREG_REG is multi-word. */
5446 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5448 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5450 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5451 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5453 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5454 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5455 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5459 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5460 is larger than the class size, then reload the whole SUBREG. */
5463 enum reg_class
class = (context
? INDEX_REG_CLASS
5465 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5466 > reg_class_size
[class])
5468 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5470 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5471 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5483 register const char *fmt
= GET_RTX_FORMAT (code
);
5486 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5489 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5490 opnum
, type
, ind_levels
, insn
);
5497 /* X, which is found at *LOC, is a part of an address that needs to be
5498 reloaded into a register of class CLASS. If X is a constant, or if
5499 X is a PLUS that contains a constant, check that the constant is a
5500 legitimate operand and that we are supposed to be able to load
5501 it into the register.
5503 If not, force the constant into memory and reload the MEM instead.
5505 MODE is the mode to use, in case X is an integer constant.
5507 OPNUM and TYPE describe the purpose of any reloads made.
5509 IND_LEVELS says how many levels of indirect addressing this machine
5513 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5516 enum reg_class
class;
5517 enum machine_mode mode
;
5519 enum reload_type type
;
5523 && (! LEGITIMATE_CONSTANT_P (x
)
5524 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5528 /* If this is a CONST_INT, it could have been created by a
5529 plus_constant call in eliminate_regs, which means it may be
5530 on the reload_obstack. reload_obstack will be freed later, so
5531 we can't allow such RTL to be put in the constant pool. There
5532 is code in force_const_mem to check for this case, but it doesn't
5533 work because we have already popped off the reload_obstack, so
5534 rtl_obstack == saveable_obstack is true at this point. */
5535 if (GET_CODE (x
) == CONST_INT
)
5536 tem
= x
= force_const_mem (mode
, GEN_INT (INTVAL (x
)));
5538 tem
= x
= force_const_mem (mode
, x
);
5540 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5541 opnum
, type
, ind_levels
, 0);
5544 else if (GET_CODE (x
) == PLUS
5545 && CONSTANT_P (XEXP (x
, 1))
5546 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5547 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5551 /* See comment above. */
5552 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
5553 tem
= force_const_mem (GET_MODE (x
), GEN_INT (INTVAL (XEXP (x
, 1))));
5555 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5557 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5558 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5559 opnum
, type
, ind_levels
, 0);
5562 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5563 mode
, VOIDmode
, 0, 0, opnum
, type
);
5566 /* X, a subreg of a pseudo, is a part of an address that needs to be
5569 If the pseudo is equivalent to a memory location that cannot be directly
5570 addressed, make the necessary address reloads.
5572 If address reloads have been necessary, or if the address is changed
5573 by register elimination, return the rtx of the memory location;
5574 otherwise, return X.
5576 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5579 OPNUM and TYPE identify the purpose of the reload.
5581 IND_LEVELS says how many levels of indirect addressing are
5582 supported at this point in the address.
5584 INSN, if nonzero, is the insn in which we do the reload. It is used
5585 to determine where to put USEs for pseudos that we have to replace with
5589 find_reloads_subreg_address (x
, force_replace
, opnum
, type
,
5594 enum reload_type type
;
5598 int regno
= REGNO (SUBREG_REG (x
));
5600 if (reg_equiv_memory_loc
[regno
])
5602 /* If the address is not directly addressable, or if the address is not
5603 offsettable, then it must be replaced. */
5605 && (reg_equiv_address
[regno
]
5606 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5609 if (force_replace
|| num_not_at_initial_offset
)
5611 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5613 /* If the address changes because of register elimination, then
5614 it must be replaced. */
5616 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5618 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
5620 if (BYTES_BIG_ENDIAN
)
5624 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5625 offset
+= MIN (size
, UNITS_PER_WORD
);
5626 size
= GET_MODE_SIZE (GET_MODE (x
));
5627 offset
-= MIN (size
, UNITS_PER_WORD
);
5629 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5630 PUT_MODE (tem
, GET_MODE (x
));
5631 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5632 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5634 /* If this is not a toplevel operand, find_reloads doesn't see
5635 this substitution. We have to emit a USE of the pseudo so
5636 that delete_output_reload can see it. */
5637 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5638 emit_insn_before (gen_rtx_USE (VOIDmode
, SUBREG_REG (x
)), insn
);
5646 /* Substitute into the current INSN the registers into which we have reloaded
5647 the things that need reloading. The array `replacements'
5648 contains the locations of all pointers that must be changed
5649 and says what to replace them with.
5651 Return the rtx that X translates into; usually X, but modified. */
5658 for (i
= 0; i
< n_replacements
; i
++)
5660 register struct replacement
*r
= &replacements
[i
];
5661 register rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5664 /* Encapsulate RELOADREG so its machine mode matches what
5665 used to be there. Note that gen_lowpart_common will
5666 do the wrong thing if RELOADREG is multi-word. RELOADREG
5667 will always be a REG here. */
5668 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5669 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5671 /* If we are putting this into a SUBREG and RELOADREG is a
5672 SUBREG, we would be making nested SUBREGs, so we have to fix
5673 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5675 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5677 if (GET_MODE (*r
->subreg_loc
)
5678 == GET_MODE (SUBREG_REG (reloadreg
)))
5679 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5682 *r
->where
= SUBREG_REG (reloadreg
);
5683 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
5687 *r
->where
= reloadreg
;
5689 /* If reload got no reg and isn't optional, something's wrong. */
5690 else if (! rld
[r
->what
].optional
)
5695 /* Make a copy of any replacements being done into X and move those copies
5696 to locations in Y, a copy of X. We only look at the highest level of
5700 copy_replacements (x
, y
)
5705 enum rtx_code code
= GET_CODE (x
);
5706 const char *fmt
= GET_RTX_FORMAT (code
);
5707 struct replacement
*r
;
5709 /* We can't support X being a SUBREG because we might then need to know its
5710 location if something inside it was replaced. */
5714 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5716 for (j
= 0; j
< n_replacements
; j
++)
5718 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
5720 r
= &replacements
[n_replacements
++];
5721 r
->where
= replacements
[j
].where
;
5722 r
->subreg_loc
= &XEXP (y
, i
);
5723 r
->what
= replacements
[j
].what
;
5724 r
->mode
= replacements
[j
].mode
;
5726 else if (replacements
[j
].where
== &XEXP (x
, i
))
5728 r
= &replacements
[n_replacements
++];
5729 r
->where
= &XEXP (y
, i
);
5731 r
->what
= replacements
[j
].what
;
5732 r
->mode
= replacements
[j
].mode
;
5737 /* Change any replacements being done to *X to be done to *Y */
5740 move_replacements (x
, y
)
5746 for (i
= 0; i
< n_replacements
; i
++)
5747 if (replacements
[i
].subreg_loc
== x
)
5748 replacements
[i
].subreg_loc
= y
;
5749 else if (replacements
[i
].where
== x
)
5751 replacements
[i
].where
= y
;
5752 replacements
[i
].subreg_loc
= 0;
5756 /* If LOC was scheduled to be replaced by something, return the replacement.
5757 Otherwise, return *LOC. */
5760 find_replacement (loc
)
5763 struct replacement
*r
;
5765 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
5767 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5769 if (reloadreg
&& r
->where
== loc
)
5771 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
5772 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5776 else if (reloadreg
&& r
->subreg_loc
== loc
)
5778 /* RELOADREG must be either a REG or a SUBREG.
5780 ??? Is it actually still ever a SUBREG? If so, why? */
5782 if (GET_CODE (reloadreg
) == REG
)
5783 return gen_rtx_REG (GET_MODE (*loc
),
5784 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
5785 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
5788 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
5789 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
5793 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5794 what's inside and make a new rtl if so. */
5795 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
5796 || GET_CODE (*loc
) == MULT
)
5798 rtx x
= find_replacement (&XEXP (*loc
, 0));
5799 rtx y
= find_replacement (&XEXP (*loc
, 1));
5801 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
5802 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
5808 /* Return nonzero if register in range [REGNO, ENDREGNO)
5809 appears either explicitly or implicitly in X
5810 other than being stored into (except for earlyclobber operands).
5812 References contained within the substructure at LOC do not count.
5813 LOC may be zero, meaning don't ignore anything.
5815 This is similar to refers_to_regno_p in rtlanal.c except that we
5816 look at equivalences for pseudos that didn't get hard registers. */
5819 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
5820 unsigned int regno
, endregno
;
5833 code
= GET_CODE (x
);
5840 /* If this is a pseudo, a hard register must not have been allocated.
5841 X must therefore either be a constant or be in memory. */
5842 if (r
>= FIRST_PSEUDO_REGISTER
)
5844 if (reg_equiv_memory_loc
[r
])
5845 return refers_to_regno_for_reload_p (regno
, endregno
,
5846 reg_equiv_memory_loc
[r
],
5849 if (reg_equiv_constant
[r
])
5855 return (endregno
> r
5856 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
5857 ? HARD_REGNO_NREGS (r
, GET_MODE (x
))
5861 /* If this is a SUBREG of a hard reg, we can see exactly which
5862 registers are being modified. Otherwise, handle normally. */
5863 if (GET_CODE (SUBREG_REG (x
)) == REG
5864 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5866 unsigned int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5867 unsigned int inner_endregno
5868 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
5869 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5871 return endregno
> inner_regno
&& regno
< inner_endregno
;
5877 if (&SET_DEST (x
) != loc
5878 /* Note setting a SUBREG counts as referring to the REG it is in for
5879 a pseudo but not for hard registers since we can
5880 treat each word individually. */
5881 && ((GET_CODE (SET_DEST (x
)) == SUBREG
5882 && loc
!= &SUBREG_REG (SET_DEST (x
))
5883 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
5884 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
5885 && refers_to_regno_for_reload_p (regno
, endregno
,
5886 SUBREG_REG (SET_DEST (x
)),
5888 /* If the output is an earlyclobber operand, this is
5890 || ((GET_CODE (SET_DEST (x
)) != REG
5891 || earlyclobber_operand_p (SET_DEST (x
)))
5892 && refers_to_regno_for_reload_p (regno
, endregno
,
5893 SET_DEST (x
), loc
))))
5896 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
5905 /* X does not match, so try its subexpressions. */
5907 fmt
= GET_RTX_FORMAT (code
);
5908 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5910 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
5918 if (refers_to_regno_for_reload_p (regno
, endregno
,
5922 else if (fmt
[i
] == 'E')
5925 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
5926 if (loc
!= &XVECEXP (x
, i
, j
)
5927 && refers_to_regno_for_reload_p (regno
, endregno
,
5928 XVECEXP (x
, i
, j
), loc
))
5935 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5936 we check if any register number in X conflicts with the relevant register
5937 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5938 contains a MEM (we don't bother checking for memory addresses that can't
5939 conflict because we expect this to be a rare case.
5941 This function is similar to reg_overlap_mention_p in rtlanal.c except
5942 that we look at equivalences for pseudos that didn't get hard registers. */
5945 reg_overlap_mentioned_for_reload_p (x
, in
)
5948 int regno
, endregno
;
5950 /* Overly conservative. */
5951 if (GET_CODE (x
) == STRICT_LOW_PART
)
5954 /* If either argument is a constant, then modifying X can not affect IN. */
5955 if (CONSTANT_P (x
) || CONSTANT_P (in
))
5957 else if (GET_CODE (x
) == SUBREG
)
5959 regno
= REGNO (SUBREG_REG (x
));
5960 if (regno
< FIRST_PSEUDO_REGISTER
)
5961 regno
+= SUBREG_WORD (x
);
5963 else if (GET_CODE (x
) == REG
)
5967 /* If this is a pseudo, it must not have been assigned a hard register.
5968 Therefore, it must either be in memory or be a constant. */
5970 if (regno
>= FIRST_PSEUDO_REGISTER
)
5972 if (reg_equiv_memory_loc
[regno
])
5973 return refers_to_mem_for_reload_p (in
);
5974 else if (reg_equiv_constant
[regno
])
5979 else if (GET_CODE (x
) == MEM
)
5980 return refers_to_mem_for_reload_p (in
);
5981 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
5982 || GET_CODE (x
) == CC0
)
5983 return reg_mentioned_p (x
, in
);
5987 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
5988 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5990 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
5993 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5997 refers_to_mem_for_reload_p (x
)
6003 if (GET_CODE (x
) == MEM
)
6006 if (GET_CODE (x
) == REG
)
6007 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6008 && reg_equiv_memory_loc
[REGNO (x
)]);
6010 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6011 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6013 && (GET_CODE (XEXP (x
, i
)) == MEM
6014 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6020 /* Check the insns before INSN to see if there is a suitable register
6021 containing the same value as GOAL.
6022 If OTHER is -1, look for a register in class CLASS.
6023 Otherwise, just see if register number OTHER shares GOAL's value.
6025 Return an rtx for the register found, or zero if none is found.
6027 If RELOAD_REG_P is (short *)1,
6028 we reject any hard reg that appears in reload_reg_rtx
6029 because such a hard reg is also needed coming into this insn.
6031 If RELOAD_REG_P is any other nonzero value,
6032 it is a vector indexed by hard reg number
6033 and we reject any hard reg whose element in the vector is nonnegative
6034 as well as any that appears in reload_reg_rtx.
6036 If GOAL is zero, then GOALREG is a register number; we look
6037 for an equivalent for that register.
6039 MODE is the machine mode of the value we want an equivalence for.
6040 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6042 This function is used by jump.c as well as in the reload pass.
6044 If GOAL is the sum of the stack pointer and a constant, we treat it
6045 as if it were a constant except that sp is required to be unchanging. */
6048 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
6051 enum reg_class
class;
6053 short *reload_reg_p
;
6055 enum machine_mode mode
;
6057 register rtx p
= insn
;
6058 rtx goaltry
, valtry
, value
, where
;
6060 register int regno
= -1;
6064 int goal_mem_addr_varies
= 0;
6065 int need_stable_sp
= 0;
6071 else if (GET_CODE (goal
) == REG
)
6072 regno
= REGNO (goal
);
6073 else if (GET_CODE (goal
) == MEM
)
6075 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6076 if (MEM_VOLATILE_P (goal
))
6078 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
6080 /* An address with side effects must be reexecuted. */
6095 else if (CONSTANT_P (goal
))
6097 else if (GET_CODE (goal
) == PLUS
6098 && XEXP (goal
, 0) == stack_pointer_rtx
6099 && CONSTANT_P (XEXP (goal
, 1)))
6100 goal_const
= need_stable_sp
= 1;
6101 else if (GET_CODE (goal
) == PLUS
6102 && XEXP (goal
, 0) == frame_pointer_rtx
6103 && CONSTANT_P (XEXP (goal
, 1)))
6108 /* Scan insns back from INSN, looking for one that copies
6109 a value into or out of GOAL.
6110 Stop and give up if we reach a label. */
6115 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
6118 if (GET_CODE (p
) == INSN
6119 /* If we don't want spill regs ... */
6120 && (! (reload_reg_p
!= 0
6121 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6122 /* ... then ignore insns introduced by reload; they aren't
6123 useful and can cause results in reload_as_needed to be
6124 different from what they were when calculating the need for
6125 spills. If we notice an input-reload insn here, we will
6126 reject it below, but it might hide a usable equivalent.
6127 That makes bad code. It may even abort: perhaps no reg was
6128 spilled for this insn because it was assumed we would find
6130 || INSN_UID (p
) < reload_first_uid
))
6133 pat
= single_set (p
);
6135 /* First check for something that sets some reg equal to GOAL. */
6138 && true_regnum (SET_SRC (pat
)) == regno
6139 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6142 && true_regnum (SET_DEST (pat
)) == regno
6143 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6145 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6146 /* When looking for stack pointer + const,
6147 make sure we don't use a stack adjust. */
6148 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6149 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6151 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6152 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6154 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6155 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6156 /* If we are looking for a constant,
6157 and something equivalent to that constant was copied
6158 into a reg, we can use that reg. */
6159 || (goal_const
&& REG_NOTES (p
) != 0
6160 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6161 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6163 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6164 || (GET_CODE (SET_DEST (pat
)) == REG
6165 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6166 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6168 && GET_CODE (goal
) == CONST_INT
6170 = operand_subword (XEXP (tem
, 0), 0, 0,
6172 && rtx_equal_p (goal
, goaltry
)
6174 = operand_subword (SET_DEST (pat
), 0, 0,
6176 && (valueno
= true_regnum (valtry
)) >= 0)))
6177 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6179 && GET_CODE (SET_DEST (pat
)) == REG
6180 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6181 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6183 && GET_CODE (goal
) == CONST_INT
6184 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6186 && rtx_equal_p (goal
, goaltry
)
6188 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6189 && (valueno
= true_regnum (valtry
)) >= 0)))
6192 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
6193 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6203 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6204 (or copying VALUE into GOAL, if GOAL is also a register).
6205 Now verify that VALUE is really valid. */
6207 /* VALUENO is the register number of VALUE; a hard register. */
6209 /* Don't try to re-use something that is killed in this insn. We want
6210 to be able to trust REG_UNUSED notes. */
6211 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6214 /* If we propose to get the value from the stack pointer or if GOAL is
6215 a MEM based on the stack pointer, we need a stable SP. */
6216 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6217 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6221 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6222 if (GET_MODE (value
) != mode
)
6225 /* Reject VALUE if it was loaded from GOAL
6226 and is also a register that appears in the address of GOAL. */
6228 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6229 && refers_to_regno_for_reload_p (valueno
,
6231 + HARD_REGNO_NREGS (valueno
, mode
)),
6235 /* Reject registers that overlap GOAL. */
6237 if (!goal_mem
&& !goal_const
6238 && regno
+ (int) HARD_REGNO_NREGS (regno
, mode
) > valueno
6239 && regno
< valueno
+ (int) HARD_REGNO_NREGS (valueno
, mode
))
6242 nregs
= HARD_REGNO_NREGS (regno
, mode
);
6243 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
6245 /* Reject VALUE if it is one of the regs reserved for reloads.
6246 Reload1 knows how to reuse them anyway, and it would get
6247 confused if we allocated one without its knowledge.
6248 (Now that insns introduced by reload are ignored above,
6249 this case shouldn't happen, but I'm not positive.) */
6251 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6254 for (i
= 0; i
< valuenregs
; ++i
)
6255 if (reload_reg_p
[valueno
+ i
] >= 0)
6259 /* Reject VALUE if it is a register being used for an input reload
6260 even if it is not one of those reserved. */
6262 if (reload_reg_p
!= 0)
6265 for (i
= 0; i
< n_reloads
; i
++)
6266 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6268 int regno1
= REGNO (rld
[i
].reg_rtx
);
6269 int nregs1
= HARD_REGNO_NREGS (regno1
,
6270 GET_MODE (rld
[i
].reg_rtx
));
6271 if (regno1
< valueno
+ valuenregs
6272 && regno1
+ nregs1
> valueno
)
6278 /* We must treat frame pointer as varying here,
6279 since it can vary--in a nonlocal goto as generated by expand_goto. */
6280 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6282 /* Now verify that the values of GOAL and VALUE remain unaltered
6283 until INSN is reached. */
6292 /* Don't trust the conversion past a function call
6293 if either of the two is in a call-clobbered register, or memory. */
6294 if (GET_CODE (p
) == CALL_INSN
)
6298 if (goal_mem
|| need_stable_sp
)
6301 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6302 for (i
= 0; i
< nregs
; ++i
)
6303 if (call_used_regs
[regno
+ i
])
6306 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6307 for (i
= 0; i
< valuenregs
; ++i
)
6308 if (call_used_regs
[valueno
+ i
])
6312 #ifdef NON_SAVING_SETJMP
6313 if (NON_SAVING_SETJMP
&& GET_CODE (p
) == NOTE
6314 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
6322 /* Watch out for unspec_volatile, and volatile asms. */
6323 if (volatile_insn_p (pat
))
6326 /* If this insn P stores in either GOAL or VALUE, return 0.
6327 If GOAL is a memory ref and this insn writes memory, return 0.
6328 If GOAL is a memory ref and its address is not constant,
6329 and this insn P changes a register used in GOAL, return 0. */
6331 if (GET_CODE (pat
) == COND_EXEC
)
6332 pat
= COND_EXEC_CODE (pat
);
6333 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6335 register rtx dest
= SET_DEST (pat
);
6336 while (GET_CODE (dest
) == SUBREG
6337 || GET_CODE (dest
) == ZERO_EXTRACT
6338 || GET_CODE (dest
) == SIGN_EXTRACT
6339 || GET_CODE (dest
) == STRICT_LOW_PART
)
6340 dest
= XEXP (dest
, 0);
6341 if (GET_CODE (dest
) == REG
)
6343 register int xregno
= REGNO (dest
);
6345 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6346 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6349 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6351 if (xregno
< valueno
+ valuenregs
6352 && xregno
+ xnregs
> valueno
)
6354 if (goal_mem_addr_varies
6355 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6357 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6360 else if (goal_mem
&& GET_CODE (dest
) == MEM
6361 && ! push_operand (dest
, GET_MODE (dest
)))
6363 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6364 && reg_equiv_memory_loc
[regno
] != 0)
6366 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6369 else if (GET_CODE (pat
) == PARALLEL
)
6372 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6374 register rtx v1
= XVECEXP (pat
, 0, i
);
6375 if (GET_CODE (v1
) == COND_EXEC
)
6376 v1
= COND_EXEC_CODE (v1
);
6377 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6379 register rtx dest
= SET_DEST (v1
);
6380 while (GET_CODE (dest
) == SUBREG
6381 || GET_CODE (dest
) == ZERO_EXTRACT
6382 || GET_CODE (dest
) == SIGN_EXTRACT
6383 || GET_CODE (dest
) == STRICT_LOW_PART
)
6384 dest
= XEXP (dest
, 0);
6385 if (GET_CODE (dest
) == REG
)
6387 register int xregno
= REGNO (dest
);
6389 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6390 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6393 if (xregno
< regno
+ nregs
6394 && xregno
+ xnregs
> regno
)
6396 if (xregno
< valueno
+ valuenregs
6397 && xregno
+ xnregs
> valueno
)
6399 if (goal_mem_addr_varies
6400 && reg_overlap_mentioned_for_reload_p (dest
,
6403 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6406 else if (goal_mem
&& GET_CODE (dest
) == MEM
6407 && ! push_operand (dest
, GET_MODE (dest
)))
6409 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6410 && reg_equiv_memory_loc
[regno
] != 0)
6412 else if (need_stable_sp
6413 && push_operand (dest
, GET_MODE (dest
)))
6419 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6423 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6424 link
= XEXP (link
, 1))
6426 pat
= XEXP (link
, 0);
6427 if (GET_CODE (pat
) == CLOBBER
)
6429 register rtx dest
= SET_DEST (pat
);
6431 if (GET_CODE (dest
) == REG
)
6433 register int xregno
= REGNO (dest
);
6435 = HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6437 if (xregno
< regno
+ nregs
6438 && xregno
+ xnregs
> regno
)
6440 else if (xregno
< valueno
+ valuenregs
6441 && xregno
+ xnregs
> valueno
)
6443 else if (goal_mem_addr_varies
6444 && reg_overlap_mentioned_for_reload_p (dest
,
6449 else if (goal_mem
&& GET_CODE (dest
) == MEM
6450 && ! push_operand (dest
, GET_MODE (dest
)))
6452 else if (need_stable_sp
6453 && push_operand (dest
, GET_MODE (dest
)))
6460 /* If this insn auto-increments or auto-decrements
6461 either regno or valueno, return 0 now.
6462 If GOAL is a memory ref and its address is not constant,
6463 and this insn P increments a register used in GOAL, return 0. */
6467 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6468 if (REG_NOTE_KIND (link
) == REG_INC
6469 && GET_CODE (XEXP (link
, 0)) == REG
)
6471 register int incno
= REGNO (XEXP (link
, 0));
6472 if (incno
< regno
+ nregs
&& incno
>= regno
)
6474 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6476 if (goal_mem_addr_varies
6477 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6487 /* Find a place where INCED appears in an increment or decrement operator
6488 within X, and return the amount INCED is incremented or decremented by.
6489 The value is always positive. */
6492 find_inc_amount (x
, inced
)
6495 register enum rtx_code code
= GET_CODE (x
);
6496 register const char *fmt
;
6501 register rtx addr
= XEXP (x
, 0);
6502 if ((GET_CODE (addr
) == PRE_DEC
6503 || GET_CODE (addr
) == POST_DEC
6504 || GET_CODE (addr
) == PRE_INC
6505 || GET_CODE (addr
) == POST_INC
)
6506 && XEXP (addr
, 0) == inced
)
6507 return GET_MODE_SIZE (GET_MODE (x
));
6508 else if ((GET_CODE (addr
) == PRE_MODIFY
6509 || GET_CODE (addr
) == POST_MODIFY
)
6510 && GET_CODE (XEXP (addr
, 1)) == PLUS
6511 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
6512 && XEXP (addr
, 0) == inced
6513 && GET_CODE (XEXP (XEXP (addr
, 1), 1)) == CONST_INT
)
6515 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
6516 return i
< 0 ? -i
: i
;
6520 fmt
= GET_RTX_FORMAT (code
);
6521 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6525 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6532 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6534 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6544 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6547 regno_clobbered_p (regno
, insn
)
6551 if (GET_CODE (PATTERN (insn
)) == CLOBBER
6552 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6553 return REGNO (XEXP (PATTERN (insn
), 0)) == regno
;
6555 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6557 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6561 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6562 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
6563 && REGNO (XEXP (elt
, 0)) == regno
)
6571 static const char *reload_when_needed_name
[] =
6574 "RELOAD_FOR_OUTPUT",
6576 "RELOAD_FOR_INPUT_ADDRESS",
6577 "RELOAD_FOR_INPADDR_ADDRESS",
6578 "RELOAD_FOR_OUTPUT_ADDRESS",
6579 "RELOAD_FOR_OUTADDR_ADDRESS",
6580 "RELOAD_FOR_OPERAND_ADDRESS",
6581 "RELOAD_FOR_OPADDR_ADDR",
6583 "RELOAD_FOR_OTHER_ADDRESS"
6586 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
6588 /* These functions are used to print the variables set by 'find_reloads' */
6591 debug_reload_to_stream (f
)
6599 for (r
= 0; r
< n_reloads
; r
++)
6601 fprintf (f
, "Reload %d: ", r
);
6605 fprintf (f
, "reload_in (%s) = ",
6606 GET_MODE_NAME (rld
[r
].inmode
));
6607 print_inline_rtx (f
, rld
[r
].in
, 24);
6608 fprintf (f
, "\n\t");
6611 if (rld
[r
].out
!= 0)
6613 fprintf (f
, "reload_out (%s) = ",
6614 GET_MODE_NAME (rld
[r
].outmode
));
6615 print_inline_rtx (f
, rld
[r
].out
, 24);
6616 fprintf (f
, "\n\t");
6619 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
6621 fprintf (f
, "%s (opnum = %d)",
6622 reload_when_needed_name
[(int) rld
[r
].when_needed
],
6625 if (rld
[r
].optional
)
6626 fprintf (f
, ", optional");
6628 if (rld
[r
].nongroup
)
6629 fprintf (stderr
, ", nongroup");
6631 if (rld
[r
].inc
!= 0)
6632 fprintf (f
, ", inc by %d", rld
[r
].inc
);
6634 if (rld
[r
].nocombine
)
6635 fprintf (f
, ", can't combine");
6637 if (rld
[r
].secondary_p
)
6638 fprintf (f
, ", secondary_reload_p");
6640 if (rld
[r
].in_reg
!= 0)
6642 fprintf (f
, "\n\treload_in_reg: ");
6643 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
6646 if (rld
[r
].out_reg
!= 0)
6648 fprintf (f
, "\n\treload_out_reg: ");
6649 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
6652 if (rld
[r
].reg_rtx
!= 0)
6654 fprintf (f
, "\n\treload_reg_rtx: ");
6655 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
6659 if (rld
[r
].secondary_in_reload
!= -1)
6661 fprintf (f
, "%ssecondary_in_reload = %d",
6662 prefix
, rld
[r
].secondary_in_reload
);
6666 if (rld
[r
].secondary_out_reload
!= -1)
6667 fprintf (f
, "%ssecondary_out_reload = %d\n",
6668 prefix
, rld
[r
].secondary_out_reload
);
6671 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
6673 fprintf (stderr
, "%ssecondary_in_icode = %s", prefix
,
6674 insn_data
[rld
[r
].secondary_in_icode
].name
);
6678 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
6679 fprintf (stderr
, "%ssecondary_out_icode = %s", prefix
,
6680 insn_data
[rld
[r
].secondary_out_icode
].name
);
6689 debug_reload_to_stream (stderr
);