1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92, 93, 94, 1995 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
92 #include "insn-config.h"
93 #include "insn-codes.h"
97 #include "hard-reg-set.h"
101 #ifndef REGISTER_MOVE_COST
102 #define REGISTER_MOVE_COST(x, y) 2
105 /* The variables set up by `find_reloads' are:
107 n_reloads number of distinct reloads needed; max reload # + 1
108 tables indexed by reload number
109 reload_in rtx for value to reload from
110 reload_out rtx for where to store reload-reg afterward if nec
111 (often the same as reload_in)
112 reload_reg_class enum reg_class, saying what regs to reload into
113 reload_inmode enum machine_mode; mode this operand should have
114 when reloaded, on input.
115 reload_outmode enum machine_mode; mode this operand should have
116 when reloaded, on output.
117 reload_optional char, nonzero for an optional reload.
118 Optional reloads are ignored unless the
119 value is already sitting in a register.
120 reload_inc int, positive amount to increment or decrement by if
121 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
122 Ignored otherwise (don't assume it is zero).
123 reload_in_reg rtx. A reg for which reload_in is the equivalent.
124 If reload_in is a symbol_ref which came from
125 reg_equiv_constant, then this is the pseudo
126 which has that symbol_ref as equivalent.
127 reload_reg_rtx rtx. This is the register to reload into.
128 If it is zero when `find_reloads' returns,
129 you must find a suitable register in the class
130 specified by reload_reg_class, and store here
131 an rtx for that register with mode from
132 reload_inmode or reload_outmode.
133 reload_nocombine char, nonzero if this reload shouldn't be
134 combined with another reload.
135 reload_opnum int, operand number being reloaded. This is
136 used to group related reloads and need not always
137 be equal to the actual operand number in the insn,
138 though it current will be; for in-out operands, it
139 is one of the two operand numbers.
140 reload_when_needed enum, classifies reload as needed either for
141 addressing an input reload, addressing an output,
142 for addressing a non-reloaded mem ref,
143 or for unspecified purposes (i.e., more than one
145 reload_secondary_p int, 1 if this is a secondary register for one
147 reload_secondary_in_reload
148 reload_secondary_out_reload
149 int, gives the reload number of a secondary
150 reload, when needed; otherwise -1
151 reload_secondary_in_icode
152 reload_secondary_out_icode
153 enum insn_code, if a secondary reload is required,
154 gives the INSN_CODE that uses the secondary
155 reload as a scratch register, or CODE_FOR_nothing
156 if the secondary reload register is to be an
157 intermediate register. */
160 rtx reload_in
[MAX_RELOADS
];
161 rtx reload_out
[MAX_RELOADS
];
162 enum reg_class reload_reg_class
[MAX_RELOADS
];
163 enum machine_mode reload_inmode
[MAX_RELOADS
];
164 enum machine_mode reload_outmode
[MAX_RELOADS
];
165 rtx reload_reg_rtx
[MAX_RELOADS
];
166 char reload_optional
[MAX_RELOADS
];
167 int reload_inc
[MAX_RELOADS
];
168 rtx reload_in_reg
[MAX_RELOADS
];
169 char reload_nocombine
[MAX_RELOADS
];
170 int reload_opnum
[MAX_RELOADS
];
171 enum reload_type reload_when_needed
[MAX_RELOADS
];
172 int reload_secondary_p
[MAX_RELOADS
];
173 int reload_secondary_in_reload
[MAX_RELOADS
];
174 int reload_secondary_out_reload
[MAX_RELOADS
];
175 enum insn_code reload_secondary_in_icode
[MAX_RELOADS
];
176 enum insn_code reload_secondary_out_icode
[MAX_RELOADS
];
178 /* All the "earlyclobber" operands of the current insn
179 are recorded here. */
181 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
183 int reload_n_operands
;
185 /* Replacing reloads.
187 If `replace_reloads' is nonzero, then as each reload is recorded
188 an entry is made for it in the table `replacements'.
189 Then later `subst_reloads' can look through that table and
190 perform all the replacements needed. */
192 /* Nonzero means record the places to replace. */
193 static int replace_reloads
;
195 /* Each replacement is recorded with a structure like this. */
198 rtx
*where
; /* Location to store in */
199 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
200 a SUBREG; 0 otherwise. */
201 int what
; /* which reload this is for */
202 enum machine_mode mode
; /* mode it must have */
205 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
207 /* Number of replacements currently recorded. */
208 static int n_replacements
;
210 /* Used to track what is modified by an operand. */
213 int reg_flag
; /* Nonzero if referencing a register. */
214 int safe
; /* Nonzero if this can't conflict with anything. */
215 rtx base
; /* Base adddress for MEM. */
216 HOST_WIDE_INT start
; /* Starting offset or register number. */
217 HOST_WIDE_INT end
; /* Endinf offset or register number. */
220 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
221 (see reg_equiv_address). */
222 static rtx memlocs
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
223 static int n_memlocs
;
225 #ifdef SECONDARY_MEMORY_NEEDED
227 /* Save MEMs needed to copy from one class of registers to another. One MEM
228 is used per mode, but normally only one or two modes are ever used.
230 We keep two versions, before and after register elimination. The one
231 after register elimination is record separately for each operand. This
232 is done in case the address is not valid to be sure that we separately
235 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
236 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
239 /* The instruction we are doing reloads for;
240 so we can test whether a register dies in it. */
241 static rtx this_insn
;
243 /* Nonzero if this instruction is a user-specified asm with operands. */
244 static int this_insn_is_asm
;
246 /* If hard_regs_live_known is nonzero,
247 we can tell which hard regs are currently live,
248 at least enough to succeed in choosing dummy reloads. */
249 static int hard_regs_live_known
;
251 /* Indexed by hard reg number,
252 element is nonegative if hard reg has been spilled.
253 This vector is passed to `find_reloads' as an argument
254 and is not changed here. */
255 static short *static_reload_reg_p
;
257 /* Set to 1 in subst_reg_equivs if it changes anything. */
258 static int subst_reg_equivs_changed
;
260 /* On return from push_reload, holds the reload-number for the OUT
261 operand, which can be different for that from the input operand. */
262 static int output_reloadnum
;
264 /* Compare two RTX's. */
265 #define MATCHES(x, y) \
266 (x == y || (x != 0 && (GET_CODE (x) == REG \
267 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
268 : rtx_equal_p (x, y) && ! side_effects_p (x))))
270 /* Indicates if two reloads purposes are for similar enough things that we
271 can merge their reloads. */
272 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
273 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
274 || ((when1) == (when2) && (op1) == (op2)) \
275 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
276 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
277 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
278 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
279 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
281 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
282 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
283 ((when1) != (when2) \
284 || ! ((op1) == (op2) \
285 || (when1) == RELOAD_FOR_INPUT \
286 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
287 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
289 static int push_secondary_reload
PROTO((int, rtx
, int, int, enum reg_class
,
290 enum machine_mode
, enum reload_type
,
292 static int push_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
293 enum machine_mode
, enum machine_mode
,
294 int, int, int, enum reload_type
));
295 static void push_replacement
PROTO((rtx
*, int, enum machine_mode
));
296 static void combine_reloads
PROTO((void));
297 static rtx find_dummy_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*,
298 enum machine_mode
, enum machine_mode
,
299 enum reg_class
, int));
300 static int earlyclobber_operand_p
PROTO((rtx
));
301 static int hard_reg_set_here_p
PROTO((int, int, rtx
));
302 static struct decomposition decompose
PROTO((rtx
));
303 static int immune_p
PROTO((rtx
, rtx
, struct decomposition
));
304 static int alternative_allows_memconst
PROTO((char *, int));
305 static rtx find_reloads_toplev
PROTO((rtx
, int, enum reload_type
, int, int));
306 static rtx make_memloc
PROTO((rtx
, int));
307 static int find_reloads_address
PROTO((enum machine_mode
, rtx
*, rtx
, rtx
*,
308 int, enum reload_type
, int));
309 static rtx subst_reg_equivs
PROTO((rtx
));
310 static rtx subst_indexed_address
PROTO((rtx
));
311 static int find_reloads_address_1
PROTO((rtx
, int, rtx
*, int,
312 enum reload_type
,int));
313 static void find_reloads_address_part
PROTO((rtx
, rtx
*, enum reg_class
,
314 enum machine_mode
, int,
315 enum reload_type
, int));
316 static int find_inc_amount
PROTO((rtx
, rtx
));
318 #ifdef HAVE_SECONDARY_RELOADS
320 /* Determine if any secondary reloads are needed for loading (if IN_P is
321 non-zero) or storing (if IN_P is zero) X to or from a reload register of
322 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
323 are needed, push them.
325 Return the reload number of the secondary reload we made, or -1 if
326 we didn't need one. *PICODE is set to the insn_code to use if we do
327 need a secondary reload. */
330 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
336 enum reg_class reload_class
;
337 enum machine_mode reload_mode
;
338 enum reload_type type
;
339 enum insn_code
*picode
;
341 enum reg_class
class = NO_REGS
;
342 enum machine_mode mode
= reload_mode
;
343 enum insn_code icode
= CODE_FOR_nothing
;
344 enum reg_class t_class
= NO_REGS
;
345 enum machine_mode t_mode
= VOIDmode
;
346 enum insn_code t_icode
= CODE_FOR_nothing
;
347 enum reload_type secondary_type
;
349 int s_reload
, t_reload
= -1;
351 if (type
== RELOAD_FOR_INPUT_ADDRESS
|| type
== RELOAD_FOR_OUTPUT_ADDRESS
)
352 secondary_type
= type
;
354 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
356 *picode
= CODE_FOR_nothing
;
358 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
359 is still a pseudo-register by now, it *must* have an equivalent MEM
360 but we don't want to assume that), use that equivalent when seeing if
361 a secondary reload is needed since whether or not a reload is needed
362 might be sensitive to the form of the MEM. */
364 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
365 && reg_equiv_mem
[REGNO (x
)] != 0)
366 x
= reg_equiv_mem
[REGNO (x
)];
368 #ifdef SECONDARY_INPUT_RELOAD_CLASS
370 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
373 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
375 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
378 /* If we don't need any secondary registers, done. */
379 if (class == NO_REGS
)
382 /* Get a possible insn to use. If the predicate doesn't accept X, don't
385 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
386 : reload_out_optab
[(int) reload_mode
]);
388 if (icode
!= CODE_FOR_nothing
389 && insn_operand_predicate
[(int) icode
][in_p
]
390 && (! (insn_operand_predicate
[(int) icode
][in_p
]) (x
, reload_mode
)))
391 icode
= CODE_FOR_nothing
;
393 /* If we will be using an insn, see if it can directly handle the reload
394 register we will be using. If it can, the secondary reload is for a
395 scratch register. If it can't, we will use the secondary reload for
396 an intermediate register and require a tertiary reload for the scratch
399 if (icode
!= CODE_FOR_nothing
)
401 /* If IN_P is non-zero, the reload register will be the output in
402 operand 0. If IN_P is zero, the reload register will be the input
403 in operand 1. Outputs should have an initial "=", which we must
406 char insn_letter
= insn_operand_constraint
[(int) icode
][!in_p
][in_p
];
407 enum reg_class insn_class
408 = (insn_letter
== 'r' ? GENERAL_REGS
409 : REG_CLASS_FROM_LETTER (insn_letter
));
411 if (insn_class
== NO_REGS
412 || (in_p
&& insn_operand_constraint
[(int) icode
][!in_p
][0] != '=')
413 /* The scratch register's constraint must start with "=&". */
414 || insn_operand_constraint
[(int) icode
][2][0] != '='
415 || insn_operand_constraint
[(int) icode
][2][1] != '&')
418 if (reg_class_subset_p (reload_class
, insn_class
))
419 mode
= insn_operand_mode
[(int) icode
][2];
422 char t_letter
= insn_operand_constraint
[(int) icode
][2][2];
424 t_mode
= insn_operand_mode
[(int) icode
][2];
425 t_class
= (t_letter
== 'r' ? GENERAL_REGS
426 : REG_CLASS_FROM_LETTER (t_letter
));
428 icode
= CODE_FOR_nothing
;
432 /* This case isn't valid, so fail. Reload is allowed to use the same
433 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
434 in the case of a secondary register, we actually need two different
435 registers for correct code. We fail here to prevent the possibility of
436 silently generating incorrect code later.
438 The convention is that secondary input reloads are valid only if the
439 secondary_class is different from class. If you have such a case, you
440 can not use secondary reloads, you must work around the problem some
443 Allow this when MODE is not reload_mode and assume that the generated
444 code handles this case (it does on the Alpha, which is the only place
445 this currently happens). */
447 if (in_p
&& class == reload_class
&& mode
== reload_mode
)
450 /* If we need a tertiary reload, see if we have one we can reuse or else
453 if (t_class
!= NO_REGS
)
455 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
456 if (reload_secondary_p
[t_reload
]
457 && (reg_class_subset_p (t_class
, reload_reg_class
[t_reload
])
458 || reg_class_subset_p (reload_reg_class
[t_reload
], t_class
))
459 && ((in_p
&& reload_inmode
[t_reload
] == t_mode
)
460 || (! in_p
&& reload_outmode
[t_reload
] == t_mode
))
461 && ((in_p
&& (reload_secondary_in_icode
[t_reload
]
462 == CODE_FOR_nothing
))
463 || (! in_p
&&(reload_secondary_out_icode
[t_reload
]
464 == CODE_FOR_nothing
)))
465 && (reg_class_size
[(int) t_class
] == 1
466 #ifdef SMALL_REGISTER_CLASSES
470 && MERGABLE_RELOADS (secondary_type
,
471 reload_when_needed
[t_reload
],
472 opnum
, reload_opnum
[t_reload
]))
475 reload_inmode
[t_reload
] = t_mode
;
477 reload_outmode
[t_reload
] = t_mode
;
479 if (reg_class_subset_p (t_class
, reload_reg_class
[t_reload
]))
480 reload_reg_class
[t_reload
] = t_class
;
482 reload_opnum
[t_reload
] = MIN (reload_opnum
[t_reload
], opnum
);
483 reload_optional
[t_reload
] &= optional
;
484 reload_secondary_p
[t_reload
] = 1;
485 if (MERGE_TO_OTHER (secondary_type
, reload_when_needed
[t_reload
],
486 opnum
, reload_opnum
[t_reload
]))
487 reload_when_needed
[t_reload
] = RELOAD_OTHER
;
490 if (t_reload
== n_reloads
)
492 /* We need to make a new tertiary reload for this register class. */
493 reload_in
[t_reload
] = reload_out
[t_reload
] = 0;
494 reload_reg_class
[t_reload
] = t_class
;
495 reload_inmode
[t_reload
] = in_p
? t_mode
: VOIDmode
;
496 reload_outmode
[t_reload
] = ! in_p
? t_mode
: VOIDmode
;
497 reload_reg_rtx
[t_reload
] = 0;
498 reload_optional
[t_reload
] = optional
;
499 reload_inc
[t_reload
] = 0;
500 /* Maybe we could combine these, but it seems too tricky. */
501 reload_nocombine
[t_reload
] = 1;
502 reload_in_reg
[t_reload
] = 0;
503 reload_opnum
[t_reload
] = opnum
;
504 reload_when_needed
[t_reload
] = secondary_type
;
505 reload_secondary_in_reload
[t_reload
] = -1;
506 reload_secondary_out_reload
[t_reload
] = -1;
507 reload_secondary_in_icode
[t_reload
] = CODE_FOR_nothing
;
508 reload_secondary_out_icode
[t_reload
] = CODE_FOR_nothing
;
509 reload_secondary_p
[t_reload
] = 1;
515 /* See if we can reuse an existing secondary reload. */
516 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
517 if (reload_secondary_p
[s_reload
]
518 && (reg_class_subset_p (class, reload_reg_class
[s_reload
])
519 || reg_class_subset_p (reload_reg_class
[s_reload
], class))
520 && ((in_p
&& reload_inmode
[s_reload
] == mode
)
521 || (! in_p
&& reload_outmode
[s_reload
] == mode
))
522 && ((in_p
&& reload_secondary_in_reload
[s_reload
] == t_reload
)
523 || (! in_p
&& reload_secondary_out_reload
[s_reload
] == t_reload
))
524 && ((in_p
&& reload_secondary_in_icode
[s_reload
] == t_icode
)
525 || (! in_p
&& reload_secondary_out_icode
[s_reload
] == t_icode
))
526 && (reg_class_size
[(int) class] == 1
527 #ifdef SMALL_REGISTER_CLASSES
531 && MERGABLE_RELOADS (secondary_type
, reload_when_needed
[s_reload
],
532 opnum
, reload_opnum
[s_reload
]))
535 reload_inmode
[s_reload
] = mode
;
537 reload_outmode
[s_reload
] = mode
;
539 if (reg_class_subset_p (class, reload_reg_class
[s_reload
]))
540 reload_reg_class
[s_reload
] = class;
542 reload_opnum
[s_reload
] = MIN (reload_opnum
[s_reload
], opnum
);
543 reload_optional
[s_reload
] &= optional
;
544 reload_secondary_p
[s_reload
] = 1;
545 if (MERGE_TO_OTHER (secondary_type
, reload_when_needed
[s_reload
],
546 opnum
, reload_opnum
[s_reload
]))
547 reload_when_needed
[s_reload
] = RELOAD_OTHER
;
550 if (s_reload
== n_reloads
)
552 /* We need to make a new secondary reload for this register class. */
553 reload_in
[s_reload
] = reload_out
[s_reload
] = 0;
554 reload_reg_class
[s_reload
] = class;
556 reload_inmode
[s_reload
] = in_p
? mode
: VOIDmode
;
557 reload_outmode
[s_reload
] = ! in_p
? mode
: VOIDmode
;
558 reload_reg_rtx
[s_reload
] = 0;
559 reload_optional
[s_reload
] = optional
;
560 reload_inc
[s_reload
] = 0;
561 /* Maybe we could combine these, but it seems too tricky. */
562 reload_nocombine
[s_reload
] = 1;
563 reload_in_reg
[s_reload
] = 0;
564 reload_opnum
[s_reload
] = opnum
;
565 reload_when_needed
[s_reload
] = secondary_type
;
566 reload_secondary_in_reload
[s_reload
] = in_p
? t_reload
: -1;
567 reload_secondary_out_reload
[s_reload
] = ! in_p
? t_reload
: -1;
568 reload_secondary_in_icode
[s_reload
] = in_p
? t_icode
: CODE_FOR_nothing
;
569 reload_secondary_out_icode
[s_reload
]
570 = ! in_p
? t_icode
: CODE_FOR_nothing
;
571 reload_secondary_p
[s_reload
] = 1;
575 #ifdef SECONDARY_MEMORY_NEEDED
576 /* If we need a memory location to copy between the two reload regs,
579 if (in_p
&& icode
== CODE_FOR_nothing
580 && SECONDARY_MEMORY_NEEDED (class, reload_class
, reload_mode
))
581 get_secondary_mem (x
, reload_mode
, opnum
, type
);
583 if (! in_p
&& icode
== CODE_FOR_nothing
584 && SECONDARY_MEMORY_NEEDED (reload_class
, class, reload_mode
))
585 get_secondary_mem (x
, reload_mode
, opnum
, type
);
592 #endif /* HAVE_SECONDARY_RELOADS */
594 #ifdef SECONDARY_MEMORY_NEEDED
596 /* Return a memory location that will be used to copy X in mode MODE.
597 If we haven't already made a location for this mode in this insn,
598 call find_reloads_address on the location being returned. */
601 get_secondary_mem (x
, mode
, opnum
, type
)
603 enum machine_mode mode
;
605 enum reload_type type
;
610 /* By default, if MODE is narrower than a word, widen it to a word.
611 This is required because most machines that require these memory
612 locations do not support short load and stores from all registers
613 (e.g., FP registers). */
615 #ifdef SECONDARY_MEMORY_NEEDED_MODE
616 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
618 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
619 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
622 /* If we already have made a MEM for this operand in MODE, return it. */
623 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
624 return secondary_memlocs_elim
[(int) mode
][opnum
];
626 /* If this is the first time we've tried to get a MEM for this mode,
627 allocate a new one. `something_changed' in reload will get set
628 by noticing that the frame size has changed. */
630 if (secondary_memlocs
[(int) mode
] == 0)
632 #ifdef SECONDARY_MEMORY_NEEDED_RTX
633 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
635 secondary_memlocs
[(int) mode
]
636 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
640 /* Get a version of the address doing any eliminations needed. If that
641 didn't give us a new MEM, make a new one if it isn't valid. */
643 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
644 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
646 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
647 loc
= copy_rtx (loc
);
649 /* The only time the call below will do anything is if the stack
650 offset is too large. In that case IND_LEVELS doesn't matter, so we
651 can just pass a zero. Adjust the type to be the address of the
652 corresponding object. If the address was valid, save the eliminated
653 address. If it wasn't valid, we need to make a reload each time, so
658 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
659 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
662 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
666 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
670 /* Clear any secondary memory locations we've made. */
673 clear_secondary_mem ()
675 bzero ((char *) secondary_memlocs
, sizeof secondary_memlocs
);
677 #endif /* SECONDARY_MEMORY_NEEDED */
679 /* Record one reload that needs to be performed.
680 IN is an rtx saying where the data are to be found before this instruction.
681 OUT says where they must be stored after the instruction.
682 (IN is zero for data not read, and OUT is zero for data not written.)
683 INLOC and OUTLOC point to the places in the instructions where
684 IN and OUT were found.
685 If IN and OUT are both non-zero, it means the same register must be used
686 to reload both IN and OUT.
688 CLASS is a register class required for the reloaded data.
689 INMODE is the machine mode that the instruction requires
690 for the reg that replaces IN and OUTMODE is likewise for OUT.
692 If IN is zero, then OUT's location and mode should be passed as
695 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
697 OPTIONAL nonzero means this reload does not need to be performed:
698 it can be discarded if that is more convenient.
700 OPNUM and TYPE say what the purpose of this reload is.
702 The return value is the reload-number for this reload.
704 If both IN and OUT are nonzero, in some rare cases we might
705 want to make two separate reloads. (Actually we never do this now.)
706 Therefore, the reload-number for OUT is stored in
707 output_reloadnum when we return; the return value applies to IN.
708 Usually (presently always), when IN and OUT are nonzero,
709 the two reload-numbers are equal, but the caller should be careful to
713 push_reload (in
, out
, inloc
, outloc
, class,
714 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
715 register rtx in
, out
;
717 enum reg_class
class;
718 enum machine_mode inmode
, outmode
;
722 enum reload_type type
;
726 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
727 int secondary_in_reload
= -1, secondary_out_reload
= -1;
728 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
729 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
731 /* INMODE and/or OUTMODE could be VOIDmode if no mode
732 has been specified for the operand. In that case,
733 use the operand's mode as the mode to reload. */
734 if (inmode
== VOIDmode
&& in
!= 0)
735 inmode
= GET_MODE (in
);
736 if (outmode
== VOIDmode
&& out
!= 0)
737 outmode
= GET_MODE (out
);
739 /* If IN is a pseudo register everywhere-equivalent to a constant, and
740 it is not in a hard register, reload straight from the constant,
741 since we want to get rid of such pseudo registers.
742 Often this is done earlier, but not always in find_reloads_address. */
743 if (in
!= 0 && GET_CODE (in
) == REG
)
745 register int regno
= REGNO (in
);
747 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
748 && reg_equiv_constant
[regno
] != 0)
749 in
= reg_equiv_constant
[regno
];
752 /* Likewise for OUT. Of course, OUT will never be equivalent to
753 an actual constant, but it might be equivalent to a memory location
754 (in the case of a parameter). */
755 if (out
!= 0 && GET_CODE (out
) == REG
)
757 register int regno
= REGNO (out
);
759 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
760 && reg_equiv_constant
[regno
] != 0)
761 out
= reg_equiv_constant
[regno
];
764 /* If we have a read-write operand with an address side-effect,
765 change either IN or OUT so the side-effect happens only once. */
766 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
768 if (GET_CODE (XEXP (in
, 0)) == POST_INC
769 || GET_CODE (XEXP (in
, 0)) == POST_DEC
)
770 in
= gen_rtx (MEM
, GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
771 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
772 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
)
773 out
= gen_rtx (MEM
, GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
776 /* If we are reloading a (SUBREG constant ...), really reload just the
777 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
778 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
779 a pseudo and hence will become a MEM) with M1 wider than M2 and the
780 register is a pseudo, also reload the inside expression.
781 For machines that extend byte loads, do this for any SUBREG of a pseudo
782 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
783 M2 is an integral mode that gets extended when loaded.
784 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
785 either M1 is not valid for R or M2 is wider than a word but we only
786 need one word to store an M2-sized quantity in R.
787 (However, if OUT is nonzero, we need to reload the reg *and*
788 the subreg, so do nothing here, and let following statement handle it.)
790 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
791 we can't handle it here because CONST_INT does not indicate a mode.
793 Similarly, we must reload the inside expression if we have a
794 STRICT_LOW_PART (presumably, in == out in the cas).
796 Also reload the inner expression if it does not require a secondary
797 reload but the SUBREG does.
799 Finally, reload the inner expression if it is a register that is in
800 the class whose registers cannot be referenced in a different size
801 and M1 is not the same size as M2. */
803 if (in
!= 0 && GET_CODE (in
) == SUBREG
804 #ifdef CLASS_CANNOT_CHANGE_SIZE
805 && class != CLASS_CANNOT_CHANGE_SIZE
807 && (CONSTANT_P (SUBREG_REG (in
))
808 || GET_CODE (SUBREG_REG (in
)) == PLUS
810 || (((GET_CODE (SUBREG_REG (in
)) == REG
811 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
812 || GET_CODE (SUBREG_REG (in
)) == MEM
)
813 && ((GET_MODE_SIZE (inmode
)
814 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
815 #ifdef LOAD_EXTEND_OP
816 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
817 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
819 && (GET_MODE_SIZE (inmode
)
820 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
821 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
822 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
825 || (GET_CODE (SUBREG_REG (in
)) == REG
826 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
827 /* The case where out is nonzero
828 is handled differently in the following statement. */
829 && (out
== 0 || SUBREG_WORD (in
) == 0)
830 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
831 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
833 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
835 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
836 GET_MODE (SUBREG_REG (in
)))))
837 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in
))
840 #ifdef SECONDARY_INPUT_RELOAD_CLASS
841 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
842 && (SECONDARY_INPUT_RELOAD_CLASS (class,
843 GET_MODE (SUBREG_REG (in
)),
847 #ifdef CLASS_CANNOT_CHANGE_SIZE
848 || (GET_CODE (SUBREG_REG (in
)) == REG
849 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
850 && (TEST_HARD_REG_BIT
851 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
852 REGNO (SUBREG_REG (in
))))
853 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
854 != GET_MODE_SIZE (inmode
)))
858 in_subreg_loc
= inloc
;
859 inloc
= &SUBREG_REG (in
);
861 #ifndef LOAD_EXTEND_OP
862 if (GET_CODE (in
) == MEM
)
863 /* This is supposed to happen only for paradoxical subregs made by
864 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
865 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
868 inmode
= GET_MODE (in
);
871 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
872 either M1 is not valid for R or M2 is wider than a word but we only
873 need one word to store an M2-sized quantity in R.
875 However, we must reload the inner reg *as well as* the subreg in
878 if (in
!= 0 && GET_CODE (in
) == SUBREG
879 && GET_CODE (SUBREG_REG (in
)) == REG
880 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
881 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in
)), inmode
)
882 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
883 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
885 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
887 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
888 GET_MODE (SUBREG_REG (in
)))))))
890 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), NULL_PTR
,
891 GENERAL_REGS
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
895 /* Similarly for paradoxical and problematical SUBREGs on the output.
896 Note that there is no reason we need worry about the previous value
897 of SUBREG_REG (out); even if wider than out,
898 storing in a subreg is entitled to clobber it all
899 (except in the case of STRICT_LOW_PART,
900 and in that case the constraint should label it input-output.) */
901 if (out
!= 0 && GET_CODE (out
) == SUBREG
902 #ifdef CLASS_CANNOT_CHANGE_SIZE
903 && class != CLASS_CANNOT_CHANGE_SIZE
905 && (CONSTANT_P (SUBREG_REG (out
))
907 || (((GET_CODE (SUBREG_REG (out
)) == REG
908 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
909 || GET_CODE (SUBREG_REG (out
)) == MEM
)
910 && ((GET_MODE_SIZE (outmode
)
911 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))))
912 || (GET_CODE (SUBREG_REG (out
)) == REG
913 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
914 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
915 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
917 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
919 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
920 GET_MODE (SUBREG_REG (out
)))))
921 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out
))
922 + SUBREG_WORD (out
)),
924 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
925 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
926 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
927 GET_MODE (SUBREG_REG (out
)),
931 #ifdef CLASS_CANNOT_CHANGE_SIZE
932 || (GET_CODE (SUBREG_REG (out
)) == REG
933 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
934 && (TEST_HARD_REG_BIT
935 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
936 REGNO (SUBREG_REG (out
))))
937 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
938 != GET_MODE_SIZE (outmode
)))
942 out_subreg_loc
= outloc
;
943 outloc
= &SUBREG_REG (out
);
945 #ifndef LOAD_EXTEND_OP
946 if (GET_CODE (out
) == MEM
947 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
950 outmode
= GET_MODE (out
);
953 /* If IN appears in OUT, we can't share any input-only reload for IN. */
954 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
955 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
956 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
959 /* If IN is a SUBREG of a hard register, make a new REG. This
960 simplifies some of the cases below. */
962 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
963 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
964 in
= gen_rtx (REG
, GET_MODE (in
),
965 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
967 /* Similarly for OUT. */
968 if (out
!= 0 && GET_CODE (out
) == SUBREG
969 && GET_CODE (SUBREG_REG (out
)) == REG
970 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
971 out
= gen_rtx (REG
, GET_MODE (out
),
972 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
974 /* Narrow down the class of register wanted if that is
975 desirable on this machine for efficiency. */
977 class = PREFERRED_RELOAD_CLASS (in
, class);
979 /* Output reloads may need analogous treatment, different in detail. */
980 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
982 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
985 /* Make sure we use a class that can handle the actual pseudo
986 inside any subreg. For example, on the 386, QImode regs
987 can appear within SImode subregs. Although GENERAL_REGS
988 can handle SImode, QImode needs a smaller class. */
989 #ifdef LIMIT_RELOAD_CLASS
991 class = LIMIT_RELOAD_CLASS (inmode
, class);
992 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
993 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
996 class = LIMIT_RELOAD_CLASS (outmode
, class);
997 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
998 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1001 /* Verify that this class is at least possible for the mode that
1003 if (this_insn_is_asm
)
1005 enum machine_mode mode
;
1006 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1010 if (mode
== VOIDmode
)
1012 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1017 outmode
= word_mode
;
1019 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1020 if (HARD_REGNO_MODE_OK (i
, mode
)
1021 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1023 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1026 for (j
= 1; j
< nregs
; j
++)
1027 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1032 if (i
== FIRST_PSEUDO_REGISTER
)
1034 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1039 if (class == NO_REGS
)
1042 /* We can use an existing reload if the class is right
1043 and at least one of IN and OUT is a match
1044 and the other is at worst neutral.
1045 (A zero compared against anything is neutral.)
1047 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
1048 for the same thing since that can cause us to need more reload registers
1049 than we otherwise would. */
1051 for (i
= 0; i
< n_reloads
; i
++)
1052 if ((reg_class_subset_p (class, reload_reg_class
[i
])
1053 || reg_class_subset_p (reload_reg_class
[i
], class))
1054 /* If the existing reload has a register, it must fit our class. */
1055 && (reload_reg_rtx
[i
] == 0
1056 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1057 true_regnum (reload_reg_rtx
[i
])))
1058 && ((in
!= 0 && MATCHES (reload_in
[i
], in
) && ! dont_share
1059 && (out
== 0 || reload_out
[i
] == 0 || MATCHES (reload_out
[i
], out
)))
1061 (out
!= 0 && MATCHES (reload_out
[i
], out
)
1062 && (in
== 0 || reload_in
[i
] == 0 || MATCHES (reload_in
[i
], in
))))
1063 && (reg_class_size
[(int) class] == 1
1064 #ifdef SMALL_REGISTER_CLASSES
1068 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
1069 opnum
, reload_opnum
[i
]))
1072 /* Reloading a plain reg for input can match a reload to postincrement
1073 that reg, since the postincrement's value is the right value.
1074 Likewise, it can match a preincrement reload, since we regard
1075 the preincrementation as happening before any ref in this insn
1076 to that register. */
1078 for (i
= 0; i
< n_reloads
; i
++)
1079 if ((reg_class_subset_p (class, reload_reg_class
[i
])
1080 || reg_class_subset_p (reload_reg_class
[i
], class))
1081 /* If the existing reload has a register, it must fit our class. */
1082 && (reload_reg_rtx
[i
] == 0
1083 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1084 true_regnum (reload_reg_rtx
[i
])))
1085 && out
== 0 && reload_out
[i
] == 0 && reload_in
[i
] != 0
1086 && ((GET_CODE (in
) == REG
1087 && (GET_CODE (reload_in
[i
]) == POST_INC
1088 || GET_CODE (reload_in
[i
]) == POST_DEC
1089 || GET_CODE (reload_in
[i
]) == PRE_INC
1090 || GET_CODE (reload_in
[i
]) == PRE_DEC
)
1091 && MATCHES (XEXP (reload_in
[i
], 0), in
))
1093 (GET_CODE (reload_in
[i
]) == REG
1094 && (GET_CODE (in
) == POST_INC
1095 || GET_CODE (in
) == POST_DEC
1096 || GET_CODE (in
) == PRE_INC
1097 || GET_CODE (in
) == PRE_DEC
)
1098 && MATCHES (XEXP (in
, 0), reload_in
[i
])))
1099 && (reg_class_size
[(int) class] == 1
1100 #ifdef SMALL_REGISTER_CLASSES
1104 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
1105 opnum
, reload_opnum
[i
]))
1107 /* Make sure reload_in ultimately has the increment,
1108 not the plain register. */
1109 if (GET_CODE (in
) == REG
)
1116 /* See if we need a secondary reload register to move between CLASS
1117 and IN or CLASS and OUT. Get the icode and push any required reloads
1118 needed for each of them if so. */
1120 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1123 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1124 &secondary_in_icode
);
1127 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1128 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1129 secondary_out_reload
1130 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1131 type
, &secondary_out_icode
);
1134 /* We found no existing reload suitable for re-use.
1135 So add an additional reload. */
1139 reload_out
[i
] = out
;
1140 reload_reg_class
[i
] = class;
1141 reload_inmode
[i
] = inmode
;
1142 reload_outmode
[i
] = outmode
;
1143 reload_reg_rtx
[i
] = 0;
1144 reload_optional
[i
] = optional
;
1146 reload_nocombine
[i
] = 0;
1147 reload_in_reg
[i
] = inloc
? *inloc
: 0;
1148 reload_opnum
[i
] = opnum
;
1149 reload_when_needed
[i
] = type
;
1150 reload_secondary_in_reload
[i
] = secondary_in_reload
;
1151 reload_secondary_out_reload
[i
] = secondary_out_reload
;
1152 reload_secondary_in_icode
[i
] = secondary_in_icode
;
1153 reload_secondary_out_icode
[i
] = secondary_out_icode
;
1154 reload_secondary_p
[i
] = 0;
1158 #ifdef SECONDARY_MEMORY_NEEDED
1159 /* If a memory location is needed for the copy, make one. */
1160 if (in
!= 0 && GET_CODE (in
) == REG
1161 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1162 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1164 get_secondary_mem (in
, inmode
, opnum
, type
);
1166 if (out
!= 0 && GET_CODE (out
) == REG
1167 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1168 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1170 get_secondary_mem (out
, outmode
, opnum
, type
);
1175 /* We are reusing an existing reload,
1176 but we may have additional information for it.
1177 For example, we may now have both IN and OUT
1178 while the old one may have just one of them. */
1180 if (inmode
!= VOIDmode
)
1181 reload_inmode
[i
] = inmode
;
1182 if (outmode
!= VOIDmode
)
1183 reload_outmode
[i
] = outmode
;
1187 reload_out
[i
] = out
;
1188 if (reg_class_subset_p (class, reload_reg_class
[i
]))
1189 reload_reg_class
[i
] = class;
1190 reload_optional
[i
] &= optional
;
1191 if (MERGE_TO_OTHER (type
, reload_when_needed
[i
],
1192 opnum
, reload_opnum
[i
]))
1193 reload_when_needed
[i
] = RELOAD_OTHER
;
1194 reload_opnum
[i
] = MIN (reload_opnum
[i
], opnum
);
1197 /* If the ostensible rtx being reload differs from the rtx found
1198 in the location to substitute, this reload is not safe to combine
1199 because we cannot reliably tell whether it appears in the insn. */
1201 if (in
!= 0 && in
!= *inloc
)
1202 reload_nocombine
[i
] = 1;
1205 /* This was replaced by changes in find_reloads_address_1 and the new
1206 function inc_for_reload, which go with a new meaning of reload_inc. */
1208 /* If this is an IN/OUT reload in an insn that sets the CC,
1209 it must be for an autoincrement. It doesn't work to store
1210 the incremented value after the insn because that would clobber the CC.
1211 So we must do the increment of the value reloaded from,
1212 increment it, store it back, then decrement again. */
1213 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1217 reload_inc
[i
] = find_inc_amount (PATTERN (this_insn
), in
);
1218 /* If we did not find a nonzero amount-to-increment-by,
1219 that contradicts the belief that IN is being incremented
1220 in an address in this insn. */
1221 if (reload_inc
[i
] == 0)
1226 /* If we will replace IN and OUT with the reload-reg,
1227 record where they are located so that substitution need
1228 not do a tree walk. */
1230 if (replace_reloads
)
1234 register struct replacement
*r
= &replacements
[n_replacements
++];
1236 r
->subreg_loc
= in_subreg_loc
;
1240 if (outloc
!= 0 && outloc
!= inloc
)
1242 register struct replacement
*r
= &replacements
[n_replacements
++];
1245 r
->subreg_loc
= out_subreg_loc
;
1250 /* If this reload is just being introduced and it has both
1251 an incoming quantity and an outgoing quantity that are
1252 supposed to be made to match, see if either one of the two
1253 can serve as the place to reload into.
1255 If one of them is acceptable, set reload_reg_rtx[i]
1258 if (in
!= 0 && out
!= 0 && in
!= out
&& reload_reg_rtx
[i
] == 0)
1260 reload_reg_rtx
[i
] = find_dummy_reload (in
, out
, inloc
, outloc
,
1262 reload_reg_class
[i
], i
);
1264 /* If the outgoing register already contains the same value
1265 as the incoming one, we can dispense with loading it.
1266 The easiest way to tell the caller that is to give a phony
1267 value for the incoming operand (same as outgoing one). */
1268 if (reload_reg_rtx
[i
] == out
1269 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1270 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1271 static_reload_reg_p
, i
, inmode
))
1275 /* If this is an input reload and the operand contains a register that
1276 dies in this insn and is used nowhere else, see if it is the right class
1277 to be used for this reload. Use it if so. (This occurs most commonly
1278 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1279 this if it is also an output reload that mentions the register unless
1280 the output is a SUBREG that clobbers an entire register.
1282 Note that the operand might be one of the spill regs, if it is a
1283 pseudo reg and we are in a block where spilling has not taken place.
1284 But if there is no spilling in this block, that is OK.
1285 An explicitly used hard reg cannot be a spill reg. */
1287 if (reload_reg_rtx
[i
] == 0 && in
!= 0)
1292 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1293 if (REG_NOTE_KIND (note
) == REG_DEAD
1294 && GET_CODE (XEXP (note
, 0)) == REG
1295 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1296 && reg_mentioned_p (XEXP (note
, 0), in
)
1297 && ! refers_to_regno_for_reload_p (regno
,
1299 + HARD_REGNO_NREGS (regno
,
1301 PATTERN (this_insn
), inloc
)
1302 /* If this is also an output reload, IN cannot be used as
1303 the reload register if it is set in this insn unless IN
1305 && (out
== 0 || in
== out
1306 || ! hard_reg_set_here_p (regno
,
1308 + HARD_REGNO_NREGS (regno
,
1310 PATTERN (this_insn
)))
1311 /* ??? Why is this code so different from the previous?
1312 Is there any simple coherent way to describe the two together?
1313 What's going on here. */
1315 || (GET_CODE (in
) == SUBREG
1316 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1318 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1319 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1320 /* Make sure the operand fits in the reg that dies. */
1321 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1322 && HARD_REGNO_MODE_OK (regno
, inmode
)
1323 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1324 && HARD_REGNO_MODE_OK (regno
, outmode
)
1325 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], regno
)
1326 && !fixed_regs
[regno
])
1328 reload_reg_rtx
[i
] = gen_rtx (REG
, inmode
, regno
);
1334 output_reloadnum
= i
;
1339 /* Record an additional place we must replace a value
1340 for which we have already recorded a reload.
1341 RELOADNUM is the value returned by push_reload
1342 when the reload was recorded.
1343 This is used in insn patterns that use match_dup. */
1346 push_replacement (loc
, reloadnum
, mode
)
1349 enum machine_mode mode
;
1351 if (replace_reloads
)
1353 register struct replacement
*r
= &replacements
[n_replacements
++];
1354 r
->what
= reloadnum
;
1361 /* Transfer all replacements that used to be in reload FROM to be in
1365 transfer_replacements (to
, from
)
1370 for (i
= 0; i
< n_replacements
; i
++)
1371 if (replacements
[i
].what
== from
)
1372 replacements
[i
].what
= to
;
1375 /* If there is only one output reload, and it is not for an earlyclobber
1376 operand, try to combine it with a (logically unrelated) input reload
1377 to reduce the number of reload registers needed.
1379 This is safe if the input reload does not appear in
1380 the value being output-reloaded, because this implies
1381 it is not needed any more once the original insn completes.
1383 If that doesn't work, see we can use any of the registers that
1384 die in this insn as a reload register. We can if it is of the right
1385 class and does not appear in the value being output-reloaded. */
1391 int output_reload
= -1;
1392 int secondary_out
= -1;
1395 /* Find the output reload; return unless there is exactly one
1396 and that one is mandatory. */
1398 for (i
= 0; i
< n_reloads
; i
++)
1399 if (reload_out
[i
] != 0)
1401 if (output_reload
>= 0)
1406 if (output_reload
< 0 || reload_optional
[output_reload
])
1409 /* An input-output reload isn't combinable. */
1411 if (reload_in
[output_reload
] != 0)
1414 /* If this reload is for an earlyclobber operand, we can't do anything. */
1415 if (earlyclobber_operand_p (reload_out
[output_reload
]))
1418 /* Check each input reload; can we combine it? */
1420 for (i
= 0; i
< n_reloads
; i
++)
1421 if (reload_in
[i
] && ! reload_optional
[i
] && ! reload_nocombine
[i
]
1422 /* Life span of this reload must not extend past main insn. */
1423 && reload_when_needed
[i
] != RELOAD_FOR_OUTPUT_ADDRESS
1424 && reload_when_needed
[i
] != RELOAD_OTHER
1425 && (CLASS_MAX_NREGS (reload_reg_class
[i
], reload_inmode
[i
])
1426 == CLASS_MAX_NREGS (reload_reg_class
[output_reload
],
1427 reload_outmode
[output_reload
]))
1428 && reload_inc
[i
] == 0
1429 && reload_reg_rtx
[i
] == 0
1430 #ifdef SECONDARY_MEMORY_NEEDED
1431 /* Don't combine two reloads with different secondary
1432 memory locations. */
1433 && (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]] == 0
1434 || secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] == 0
1435 || rtx_equal_p (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]],
1436 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]]))
1438 #ifdef SMALL_REGISTER_CLASSES
1439 && reload_reg_class
[i
] == reload_reg_class
[output_reload
]
1441 && (reg_class_subset_p (reload_reg_class
[i
],
1442 reload_reg_class
[output_reload
])
1443 || reg_class_subset_p (reload_reg_class
[output_reload
],
1444 reload_reg_class
[i
]))
1446 && (MATCHES (reload_in
[i
], reload_out
[output_reload
])
1447 /* Args reversed because the first arg seems to be
1448 the one that we imagine being modified
1449 while the second is the one that might be affected. */
1450 || (! reg_overlap_mentioned_for_reload_p (reload_out
[output_reload
],
1452 /* However, if the input is a register that appears inside
1453 the output, then we also can't share.
1454 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1455 If the same reload reg is used for both reg 69 and the
1456 result to be stored in memory, then that result
1457 will clobber the address of the memory ref. */
1458 && ! (GET_CODE (reload_in
[i
]) == REG
1459 && reg_overlap_mentioned_for_reload_p (reload_in
[i
],
1460 reload_out
[output_reload
]))))
1461 && (reg_class_size
[(int) reload_reg_class
[i
]]
1462 #ifdef SMALL_REGISTER_CLASSES
1466 /* We will allow making things slightly worse by combining an
1467 input and an output, but no worse than that. */
1468 && (reload_when_needed
[i
] == RELOAD_FOR_INPUT
1469 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT
))
1473 /* We have found a reload to combine with! */
1474 reload_out
[i
] = reload_out
[output_reload
];
1475 reload_outmode
[i
] = reload_outmode
[output_reload
];
1476 /* Mark the old output reload as inoperative. */
1477 reload_out
[output_reload
] = 0;
1478 /* The combined reload is needed for the entire insn. */
1479 reload_when_needed
[i
] = RELOAD_OTHER
;
1480 /* If the output reload had a secondary reload, copy it. */
1481 if (reload_secondary_out_reload
[output_reload
] != -1)
1483 reload_secondary_out_reload
[i
]
1484 = reload_secondary_out_reload
[output_reload
];
1485 reload_secondary_out_icode
[i
]
1486 = reload_secondary_out_icode
[output_reload
];
1489 #ifdef SECONDARY_MEMORY_NEEDED
1490 /* Copy any secondary MEM. */
1491 if (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] != 0)
1492 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]]
1493 = secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]];
1495 /* If required, minimize the register class. */
1496 if (reg_class_subset_p (reload_reg_class
[output_reload
],
1497 reload_reg_class
[i
]))
1498 reload_reg_class
[i
] = reload_reg_class
[output_reload
];
1500 /* Transfer all replacements from the old reload to the combined. */
1501 for (j
= 0; j
< n_replacements
; j
++)
1502 if (replacements
[j
].what
== output_reload
)
1503 replacements
[j
].what
= i
;
1508 /* If this insn has only one operand that is modified or written (assumed
1509 to be the first), it must be the one corresponding to this reload. It
1510 is safe to use anything that dies in this insn for that output provided
1511 that it does not occur in the output (we already know it isn't an
1512 earlyclobber. If this is an asm insn, give up. */
1514 if (INSN_CODE (this_insn
) == -1)
1517 for (i
= 1; i
< insn_n_operands
[INSN_CODE (this_insn
)]; i
++)
1518 if (insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '='
1519 || insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '+')
1522 /* See if some hard register that dies in this insn and is not used in
1523 the output is the right class. Only works if the register we pick
1524 up can fully hold our output reload. */
1525 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1526 if (REG_NOTE_KIND (note
) == REG_DEAD
1527 && GET_CODE (XEXP (note
, 0)) == REG
1528 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1529 reload_out
[output_reload
])
1530 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1531 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1532 && TEST_HARD_REG_BIT (reg_class_contents
[(int) reload_reg_class
[output_reload
]],
1533 REGNO (XEXP (note
, 0)))
1534 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1535 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1536 /* Ensure that a secondary or tertiary reload for this output
1537 won't want this register. */
1538 && ((secondary_out
= reload_secondary_out_reload
[output_reload
]) == -1
1539 || (! (TEST_HARD_REG_BIT
1540 (reg_class_contents
[(int) reload_reg_class
[secondary_out
]],
1541 REGNO (XEXP (note
, 0))))
1542 && ((secondary_out
= reload_secondary_out_reload
[secondary_out
]) == -1
1543 || ! (TEST_HARD_REG_BIT
1544 (reg_class_contents
[(int) reload_reg_class
[secondary_out
]],
1545 REGNO (XEXP (note
, 0)))))))
1546 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1548 reload_reg_rtx
[output_reload
] = gen_rtx (REG
,
1549 reload_outmode
[output_reload
],
1550 REGNO (XEXP (note
, 0)));
1555 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1556 See if one of IN and OUT is a register that may be used;
1557 this is desirable since a spill-register won't be needed.
1558 If so, return the register rtx that proves acceptable.
1560 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1561 CLASS is the register class required for the reload.
1563 If FOR_REAL is >= 0, it is the number of the reload,
1564 and in some cases when it can be discovered that OUT doesn't need
1565 to be computed, clear out reload_out[FOR_REAL].
1567 If FOR_REAL is -1, this should not be done, because this call
1568 is just to see if a register can be found, not to find and install it. */
1571 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1572 inmode
, outmode
, class, for_real
)
1573 rtx real_in
, real_out
;
1574 rtx
*inloc
, *outloc
;
1575 enum machine_mode inmode
, outmode
;
1576 enum reg_class
class;
1585 /* If operands exceed a word, we can't use either of them
1586 unless they have the same size. */
1587 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1588 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1589 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1592 /* Find the inside of any subregs. */
1593 while (GET_CODE (out
) == SUBREG
)
1595 out_offset
= SUBREG_WORD (out
);
1596 out
= SUBREG_REG (out
);
1598 while (GET_CODE (in
) == SUBREG
)
1600 in_offset
= SUBREG_WORD (in
);
1601 in
= SUBREG_REG (in
);
1604 /* Narrow down the reg class, the same way push_reload will;
1605 otherwise we might find a dummy now, but push_reload won't. */
1606 class = PREFERRED_RELOAD_CLASS (in
, class);
1608 /* See if OUT will do. */
1609 if (GET_CODE (out
) == REG
1610 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1612 register int regno
= REGNO (out
) + out_offset
;
1613 int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1616 /* When we consider whether the insn uses OUT,
1617 ignore references within IN. They don't prevent us
1618 from copying IN into OUT, because those refs would
1619 move into the insn that reloads IN.
1621 However, we only ignore IN in its role as this reload.
1622 If the insn uses IN elsewhere and it contains OUT,
1623 that counts. We can't be sure it's the "same" operand
1624 so it might not go through this reload. */
1626 *inloc
= const0_rtx
;
1628 if (regno
< FIRST_PSEUDO_REGISTER
1629 /* A fixed reg that can overlap other regs better not be used
1630 for reloading in any way. */
1631 #ifdef OVERLAPPING_REGNO_P
1632 && ! (fixed_regs
[regno
] && OVERLAPPING_REGNO_P (regno
))
1634 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1635 PATTERN (this_insn
), outloc
))
1638 for (i
= 0; i
< nwords
; i
++)
1639 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1645 if (GET_CODE (real_out
) == REG
)
1648 value
= gen_rtx (REG
, outmode
, regno
);
1655 /* Consider using IN if OUT was not acceptable
1656 or if OUT dies in this insn (like the quotient in a divmod insn).
1657 We can't use IN unless it is dies in this insn,
1658 which means we must know accurately which hard regs are live.
1659 Also, the result can't go in IN if IN is used within OUT. */
1660 if (hard_regs_live_known
1661 && GET_CODE (in
) == REG
1662 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1664 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1665 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1666 && !fixed_regs
[REGNO (in
)]
1667 && HARD_REGNO_MODE_OK (REGNO (in
),
1668 /* The only case where out and real_out might
1669 have different modes is where real_out
1670 is a subreg, and in that case, out
1672 (GET_MODE (out
) != VOIDmode
1673 ? GET_MODE (out
) : outmode
)))
1675 register int regno
= REGNO (in
) + in_offset
;
1676 int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1678 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1679 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1680 PATTERN (this_insn
)))
1683 for (i
= 0; i
< nwords
; i
++)
1684 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1690 /* If we were going to use OUT as the reload reg
1691 and changed our mind, it means OUT is a dummy that
1692 dies here. So don't bother copying value to it. */
1693 if (for_real
>= 0 && value
== real_out
)
1694 reload_out
[for_real
] = 0;
1695 if (GET_CODE (real_in
) == REG
)
1698 value
= gen_rtx (REG
, inmode
, regno
);
1706 /* This page contains subroutines used mainly for determining
1707 whether the IN or an OUT of a reload can serve as the
1710 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1713 earlyclobber_operand_p (x
)
1718 for (i
= 0; i
< n_earlyclobbers
; i
++)
1719 if (reload_earlyclobbers
[i
] == x
)
1725 /* Return 1 if expression X alters a hard reg in the range
1726 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1727 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1728 X should be the body of an instruction. */
1731 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1732 register int beg_regno
, end_regno
;
1735 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1737 register rtx op0
= SET_DEST (x
);
1738 while (GET_CODE (op0
) == SUBREG
)
1739 op0
= SUBREG_REG (op0
);
1740 if (GET_CODE (op0
) == REG
)
1742 register int r
= REGNO (op0
);
1743 /* See if this reg overlaps range under consideration. */
1745 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1749 else if (GET_CODE (x
) == PARALLEL
)
1751 register int i
= XVECLEN (x
, 0) - 1;
1753 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1760 /* Return 1 if ADDR is a valid memory address for mode MODE,
1761 and check that each pseudo reg has the proper kind of
1765 strict_memory_address_p (mode
, addr
)
1766 enum machine_mode mode
;
1769 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1776 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1777 if they are the same hard reg, and has special hacks for
1778 autoincrement and autodecrement.
1779 This is specifically intended for find_reloads to use
1780 in determining whether two operands match.
1781 X is the operand whose number is the lower of the two.
1783 The value is 2 if Y contains a pre-increment that matches
1784 a non-incrementing address in X. */
1786 /* ??? To be completely correct, we should arrange to pass
1787 for X the output operand and for Y the input operand.
1788 For now, we assume that the output operand has the lower number
1789 because that is natural in (SET output (... input ...)). */
1792 operands_match_p (x
, y
)
1796 register RTX_CODE code
= GET_CODE (x
);
1802 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
1803 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
1804 && GET_CODE (SUBREG_REG (y
)) == REG
)))
1810 i
= REGNO (SUBREG_REG (x
));
1811 if (i
>= FIRST_PSEUDO_REGISTER
)
1813 i
+= SUBREG_WORD (x
);
1818 if (GET_CODE (y
) == SUBREG
)
1820 j
= REGNO (SUBREG_REG (y
));
1821 if (j
>= FIRST_PSEUDO_REGISTER
)
1823 j
+= SUBREG_WORD (y
);
1828 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1829 multiple hard register group, so that for example (reg:DI 0) and
1830 (reg:SI 1) will be considered the same register. */
1831 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
1832 && i
< FIRST_PSEUDO_REGISTER
)
1833 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
1834 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
1835 && j
< FIRST_PSEUDO_REGISTER
)
1836 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
1840 /* If two operands must match, because they are really a single
1841 operand of an assembler insn, then two postincrements are invalid
1842 because the assembler insn would increment only once.
1843 On the other hand, an postincrement matches ordinary indexing
1844 if the postincrement is the output operand. */
1845 if (code
== POST_DEC
|| code
== POST_INC
)
1846 return operands_match_p (XEXP (x
, 0), y
);
1847 /* Two preincrements are invalid
1848 because the assembler insn would increment only once.
1849 On the other hand, an preincrement matches ordinary indexing
1850 if the preincrement is the input operand.
1851 In this case, return 2, since some callers need to do special
1852 things when this happens. */
1853 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
)
1854 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
1858 /* Now we have disposed of all the cases
1859 in which different rtx codes can match. */
1860 if (code
!= GET_CODE (y
))
1862 if (code
== LABEL_REF
)
1863 return XEXP (x
, 0) == XEXP (y
, 0);
1864 if (code
== SYMBOL_REF
)
1865 return XSTR (x
, 0) == XSTR (y
, 0);
1867 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1869 if (GET_MODE (x
) != GET_MODE (y
))
1872 /* Compare the elements. If any pair of corresponding elements
1873 fail to match, return 0 for the whole things. */
1876 fmt
= GET_RTX_FORMAT (code
);
1877 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1883 if (XWINT (x
, i
) != XWINT (y
, i
))
1888 if (XINT (x
, i
) != XINT (y
, i
))
1893 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
1896 /* If any subexpression returns 2,
1897 we should return 2 if we are successful. */
1905 /* It is believed that rtx's at this level will never
1906 contain anything but integers and other rtx's,
1907 except for within LABEL_REFs and SYMBOL_REFs. */
1912 return 1 + success_2
;
1915 /* Return the number of times character C occurs in string S. */
1918 n_occurrences (c
, s
)
1928 /* Describe the range of registers or memory referenced by X.
1929 If X is a register, set REG_FLAG and put the first register
1930 number into START and the last plus one into END.
1931 If X is a memory reference, put a base address into BASE
1932 and a range of integer offsets into START and END.
1933 If X is pushing on the stack, we can assume it causes no trouble,
1934 so we set the SAFE field. */
1936 static struct decomposition
1940 struct decomposition val
;
1945 if (GET_CODE (x
) == MEM
)
1947 rtx base
, offset
= 0;
1948 rtx addr
= XEXP (x
, 0);
1950 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
1951 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
1953 val
.base
= XEXP (addr
, 0);
1954 val
.start
= - GET_MODE_SIZE (GET_MODE (x
));
1955 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
1956 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
1960 if (GET_CODE (addr
) == CONST
)
1962 addr
= XEXP (addr
, 0);
1965 if (GET_CODE (addr
) == PLUS
)
1967 if (CONSTANT_P (XEXP (addr
, 0)))
1969 base
= XEXP (addr
, 1);
1970 offset
= XEXP (addr
, 0);
1972 else if (CONSTANT_P (XEXP (addr
, 1)))
1974 base
= XEXP (addr
, 0);
1975 offset
= XEXP (addr
, 1);
1982 offset
= const0_rtx
;
1984 if (GET_CODE (offset
) == CONST
)
1985 offset
= XEXP (offset
, 0);
1986 if (GET_CODE (offset
) == PLUS
)
1988 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
1990 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 1));
1991 offset
= XEXP (offset
, 0);
1993 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
1995 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 0));
1996 offset
= XEXP (offset
, 1);
2000 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
2001 offset
= const0_rtx
;
2004 else if (GET_CODE (offset
) != CONST_INT
)
2006 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
2007 offset
= const0_rtx
;
2010 if (all_const
&& GET_CODE (base
) == PLUS
)
2011 base
= gen_rtx (CONST
, GET_MODE (base
), base
);
2013 if (GET_CODE (offset
) != CONST_INT
)
2016 val
.start
= INTVAL (offset
);
2017 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2021 else if (GET_CODE (x
) == REG
)
2024 val
.start
= true_regnum (x
);
2027 /* A pseudo with no hard reg. */
2028 val
.start
= REGNO (x
);
2029 val
.end
= val
.start
+ 1;
2033 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2035 else if (GET_CODE (x
) == SUBREG
)
2037 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2038 /* This could be more precise, but it's good enough. */
2039 return decompose (SUBREG_REG (x
));
2041 val
.start
= true_regnum (x
);
2043 return decompose (SUBREG_REG (x
));
2046 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2048 else if (CONSTANT_P (x
)
2049 /* This hasn't been assigned yet, so it can't conflict yet. */
2050 || GET_CODE (x
) == SCRATCH
)
2057 /* Return 1 if altering Y will not modify the value of X.
2058 Y is also described by YDATA, which should be decompose (Y). */
2061 immune_p (x
, y
, ydata
)
2063 struct decomposition ydata
;
2065 struct decomposition xdata
;
2068 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
2072 if (GET_CODE (y
) != MEM
)
2074 /* If Y is memory and X is not, Y can't affect X. */
2075 if (GET_CODE (x
) != MEM
)
2078 xdata
= decompose (x
);
2080 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2082 /* If bases are distinct symbolic constants, there is no overlap. */
2083 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2085 /* Constants and stack slots never overlap. */
2086 if (CONSTANT_P (xdata
.base
)
2087 && (ydata
.base
== frame_pointer_rtx
2088 || ydata
.base
== hard_frame_pointer_rtx
2089 || ydata
.base
== stack_pointer_rtx
))
2091 if (CONSTANT_P (ydata
.base
)
2092 && (xdata
.base
== frame_pointer_rtx
2093 || xdata
.base
== hard_frame_pointer_rtx
2094 || xdata
.base
== stack_pointer_rtx
))
2096 /* If either base is variable, we don't know anything. */
2101 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2104 /* Similar, but calls decompose. */
2107 safe_from_earlyclobber (op
, clobber
)
2110 struct decomposition early_data
;
2112 early_data
= decompose (clobber
);
2113 return immune_p (op
, clobber
, early_data
);
2116 /* Main entry point of this file: search the body of INSN
2117 for values that need reloading and record them with push_reload.
2118 REPLACE nonzero means record also where the values occur
2119 so that subst_reloads can be used.
2121 IND_LEVELS says how many levels of indirection are supported by this
2122 machine; a value of zero means that a memory reference is not a valid
2125 LIVE_KNOWN says we have valid information about which hard
2126 regs are live at each point in the program; this is true when
2127 we are called from global_alloc but false when stupid register
2128 allocation has been done.
2130 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2131 which is nonnegative if the reg has been commandeered for reloading into.
2132 It is copied into STATIC_RELOAD_REG_P and referenced from there
2133 by various subroutines. */
2136 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2138 int replace
, ind_levels
;
2140 short *reload_reg_p
;
2142 #ifdef REGISTER_CONSTRAINTS
2144 register int insn_code_number
;
2147 /* These are the constraints for the insn. We don't change them. */
2148 char *constraints1
[MAX_RECOG_OPERANDS
];
2149 /* These start out as the constraints for the insn
2150 and they are chewed up as we consider alternatives. */
2151 char *constraints
[MAX_RECOG_OPERANDS
];
2152 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2154 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2155 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2156 /* Nonzero for a MEM operand whose entire address needs a reload. */
2157 int address_reloaded
[MAX_RECOG_OPERANDS
];
2158 /* Value of enum reload_type to use for operand. */
2159 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2160 /* Value of enum reload_type to use within address of operand. */
2161 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2162 /* Save the usage of each operand. */
2163 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2164 int no_input_reloads
= 0, no_output_reloads
= 0;
2166 int this_alternative
[MAX_RECOG_OPERANDS
];
2167 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2168 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2169 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2170 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2172 int goal_alternative
[MAX_RECOG_OPERANDS
];
2173 int this_alternative_number
;
2174 int goal_alternative_number
;
2175 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2176 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2177 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2178 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2179 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2180 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2181 int goal_alternative_swapped
;
2184 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2185 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2186 rtx body
= PATTERN (insn
);
2187 rtx set
= single_set (insn
);
2188 int goal_earlyclobber
, this_earlyclobber
;
2189 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2192 this_insn_is_asm
= 0; /* Tentative. */
2196 n_earlyclobbers
= 0;
2197 replace_reloads
= replace
;
2198 hard_regs_live_known
= live_known
;
2199 static_reload_reg_p
= reload_reg_p
;
2201 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2202 neither are insns that SET cc0. Insns that use CC0 are not allowed
2203 to have any input reloads. */
2204 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2205 no_output_reloads
= 1;
2208 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2209 no_input_reloads
= 1;
2210 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2211 no_output_reloads
= 1;
2214 #ifdef SECONDARY_MEMORY_NEEDED
2215 /* The eliminated forms of any secondary memory locations are per-insn, so
2216 clear them out here. */
2218 bzero ((char *) secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2221 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2222 Make OPERANDS point to a vector of operand values.
2223 Make OPERAND_LOCS point to a vector of pointers to
2224 where the operands were found.
2225 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2226 constraint-strings for this insn.
2227 Return if the insn needs no reload processing. */
2229 switch (GET_CODE (body
))
2239 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2240 is cheap to move between them. If it is not, there may not be an insn
2241 to do the copy, so we may need a reload. */
2242 if (GET_CODE (SET_DEST (body
)) == REG
2243 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2244 && GET_CODE (SET_SRC (body
)) == REG
2245 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2246 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2247 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2251 reload_n_operands
= noperands
= asm_noperands (body
);
2254 /* This insn is an `asm' with operands. */
2256 insn_code_number
= -1;
2257 this_insn_is_asm
= 1;
2259 /* expand_asm_operands makes sure there aren't too many operands. */
2260 if (noperands
> MAX_RECOG_OPERANDS
)
2263 /* Now get the operand values and constraints out of the insn. */
2265 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
2266 constraints
, operand_mode
);
2269 bcopy ((char *) constraints
, (char *) constraints1
,
2270 noperands
* sizeof (char *));
2271 n_alternatives
= n_occurrences (',', constraints
[0]) + 1;
2272 for (i
= 1; i
< noperands
; i
++)
2273 if (n_alternatives
!= n_occurrences (',', constraints
[i
]) + 1)
2275 error_for_asm (insn
, "operand constraints differ in number of alternatives");
2276 /* Avoid further trouble with this insn. */
2277 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
2286 /* Ordinary insn: recognize it, get the operands via insn_extract
2287 and get the constraints. */
2289 insn_code_number
= recog_memoized (insn
);
2290 if (insn_code_number
< 0)
2291 fatal_insn_not_found (insn
);
2293 reload_n_operands
= noperands
= insn_n_operands
[insn_code_number
];
2294 n_alternatives
= insn_n_alternatives
[insn_code_number
];
2295 /* Just return "no reloads" if insn has no operands with constraints. */
2296 if (n_alternatives
== 0)
2298 insn_extract (insn
);
2299 for (i
= 0; i
< noperands
; i
++)
2301 constraints
[i
] = constraints1
[i
]
2302 = insn_operand_constraint
[insn_code_number
][i
];
2303 operand_mode
[i
] = insn_operand_mode
[insn_code_number
][i
];
2312 /* If we will need to know, later, whether some pair of operands
2313 are the same, we must compare them now and save the result.
2314 Reloading the base and index registers will clobber them
2315 and afterward they will fail to match. */
2317 for (i
= 0; i
< noperands
; i
++)
2322 substed_operand
[i
] = recog_operand
[i
];
2325 modified
[i
] = RELOAD_READ
;
2327 /* Scan this operand's constraint to see if it is an output operand,
2328 an in-out operand, is commutative, or should match another. */
2333 modified
[i
] = RELOAD_WRITE
;
2335 modified
[i
] = RELOAD_READ_WRITE
;
2338 /* The last operand should not be marked commutative. */
2339 if (i
== noperands
- 1)
2341 if (this_insn_is_asm
)
2342 warning_for_asm (this_insn
,
2343 "`%%' constraint used with last operand");
2350 else if (c
>= '0' && c
<= '9')
2353 operands_match
[c
][i
]
2354 = operands_match_p (recog_operand
[c
], recog_operand
[i
]);
2356 /* An operand may not match itself. */
2359 if (this_insn_is_asm
)
2360 warning_for_asm (this_insn
,
2361 "operand %d has constraint %d", i
, c
);
2366 /* If C can be commuted with C+1, and C might need to match I,
2367 then C+1 might also need to match I. */
2368 if (commutative
>= 0)
2370 if (c
== commutative
|| c
== commutative
+ 1)
2372 int other
= c
+ (c
== commutative
? 1 : -1);
2373 operands_match
[other
][i
]
2374 = operands_match_p (recog_operand
[other
], recog_operand
[i
]);
2376 if (i
== commutative
|| i
== commutative
+ 1)
2378 int other
= i
+ (i
== commutative
? 1 : -1);
2379 operands_match
[c
][other
]
2380 = operands_match_p (recog_operand
[c
], recog_operand
[other
]);
2382 /* Note that C is supposed to be less than I.
2383 No need to consider altering both C and I because in
2384 that case we would alter one into the other. */
2390 /* Examine each operand that is a memory reference or memory address
2391 and reload parts of the addresses into index registers.
2392 Also here any references to pseudo regs that didn't get hard regs
2393 but are equivalent to constants get replaced in the insn itself
2394 with those constants. Nobody will ever see them again.
2396 Finally, set up the preferred classes of each operand. */
2398 for (i
= 0; i
< noperands
; i
++)
2400 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
2402 address_reloaded
[i
] = 0;
2403 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2404 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2407 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2408 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2411 if (*constraints
[i
] == 0)
2412 /* Ignore things like match_operator operands. */
2414 else if (constraints
[i
][0] == 'p')
2416 find_reloads_address (VOIDmode
, NULL_PTR
,
2417 recog_operand
[i
], recog_operand_loc
[i
],
2418 i
, operand_type
[i
], ind_levels
);
2419 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2421 else if (code
== MEM
)
2423 if (find_reloads_address (GET_MODE (recog_operand
[i
]),
2424 recog_operand_loc
[i
],
2425 XEXP (recog_operand
[i
], 0),
2426 &XEXP (recog_operand
[i
], 0),
2427 i
, address_type
[i
], ind_levels
))
2428 address_reloaded
[i
] = 1;
2429 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2431 else if (code
== SUBREG
)
2432 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2433 = find_reloads_toplev (recog_operand
[i
], i
, address_type
[i
],
2436 && &SET_DEST (set
) == recog_operand_loc
[i
]);
2437 else if (code
== PLUS
)
2438 /* We can get a PLUS as an "operand" as a result of
2439 register elimination. See eliminate_regs and gen_reload. */
2440 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2441 = find_reloads_toplev (recog_operand
[i
], i
, address_type
[i
],
2443 else if (code
== REG
)
2445 /* This is equivalent to calling find_reloads_toplev.
2446 The code is duplicated for speed.
2447 When we find a pseudo always equivalent to a constant,
2448 we replace it by the constant. We must be sure, however,
2449 that we don't try to replace it in the insn in which it
2451 register int regno
= REGNO (recog_operand
[i
]);
2452 if (reg_equiv_constant
[regno
] != 0
2453 && (set
== 0 || &SET_DEST (set
) != recog_operand_loc
[i
]))
2454 substed_operand
[i
] = recog_operand
[i
]
2455 = reg_equiv_constant
[regno
];
2456 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2457 that feeds this insn. */
2458 if (reg_equiv_mem
[regno
] != 0)
2459 substed_operand
[i
] = recog_operand
[i
]
2460 = reg_equiv_mem
[regno
];
2462 if (reg_equiv_address
[regno
] != 0)
2464 /* If reg_equiv_address is not a constant address, copy it,
2465 since it may be shared. */
2466 rtx address
= reg_equiv_address
[regno
];
2468 if (rtx_varies_p (address
))
2469 address
= copy_rtx (address
);
2471 /* If this is an output operand, we must output a CLOBBER
2472 after INSN so find_equiv_reg knows REGNO is being written.
2473 Mark this insn specially, do we can put our output reloads
2476 if (modified
[i
] != RELOAD_READ
)
2477 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER
, VOIDmode
,
2482 *recog_operand_loc
[i
] = recog_operand
[i
]
2483 = gen_rtx (MEM
, GET_MODE (recog_operand
[i
]), address
);
2484 RTX_UNCHANGING_P (recog_operand
[i
])
2485 = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
2486 find_reloads_address (GET_MODE (recog_operand
[i
]),
2487 recog_operand_loc
[i
],
2488 XEXP (recog_operand
[i
], 0),
2489 &XEXP (recog_operand
[i
], 0),
2490 i
, address_type
[i
], ind_levels
);
2491 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2494 /* If the operand is still a register (we didn't replace it with an
2495 equivalent), get the preferred class to reload it into. */
2496 code
= GET_CODE (recog_operand
[i
]);
2498 = ((code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
)
2499 ? reg_preferred_class (REGNO (recog_operand
[i
])) : NO_REGS
);
2501 = (code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
2502 && reg_alternate_class (REGNO (recog_operand
[i
])) == NO_REGS
);
2505 /* If this is simply a copy from operand 1 to operand 0, merge the
2506 preferred classes for the operands. */
2507 if (set
!= 0 && noperands
>= 2 && recog_operand
[0] == SET_DEST (set
)
2508 && recog_operand
[1] == SET_SRC (set
))
2510 preferred_class
[0] = preferred_class
[1]
2511 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2512 pref_or_nothing
[0] |= pref_or_nothing
[1];
2513 pref_or_nothing
[1] |= pref_or_nothing
[0];
2516 /* Now see what we need for pseudo-regs that didn't get hard regs
2517 or got the wrong kind of hard reg. For this, we must consider
2518 all the operands together against the register constraints. */
2520 best
= MAX_RECOG_OPERANDS
+ 300;
2523 goal_alternative_swapped
= 0;
2526 /* The constraints are made of several alternatives.
2527 Each operand's constraint looks like foo,bar,... with commas
2528 separating the alternatives. The first alternatives for all
2529 operands go together, the second alternatives go together, etc.
2531 First loop over alternatives. */
2533 for (this_alternative_number
= 0;
2534 this_alternative_number
< n_alternatives
;
2535 this_alternative_number
++)
2537 /* Loop over operands for one constraint alternative. */
2538 /* LOSERS counts those that don't fit this alternative
2539 and would require loading. */
2541 /* BAD is set to 1 if it some operand can't fit this alternative
2542 even after reloading. */
2544 /* REJECT is a count of how undesirable this alternative says it is
2545 if any reloading is required. If the alternative matches exactly
2546 then REJECT is ignored, but otherwise it gets this much
2547 counted against it in addition to the reloading needed. Each
2548 ? counts three times here since we want the disparaging caused by
2549 a bad register class to only count 1/3 as much. */
2552 this_earlyclobber
= 0;
2554 for (i
= 0; i
< noperands
; i
++)
2556 register char *p
= constraints
[i
];
2557 register int win
= 0;
2558 /* 0 => this operand can be reloaded somehow for this alternative */
2560 /* 0 => this operand can be reloaded if the alternative allows regs. */
2563 register rtx operand
= recog_operand
[i
];
2565 /* Nonzero means this is a MEM that must be reloaded into a reg
2566 regardless of what the constraint says. */
2567 int force_reload
= 0;
2569 /* Nonzero if a constant forced into memory would be OK for this
2572 int earlyclobber
= 0;
2574 /* If the operand is a SUBREG, extract
2575 the REG or MEM (or maybe even a constant) within.
2576 (Constants can occur as a result of reg_equiv_constant.) */
2578 while (GET_CODE (operand
) == SUBREG
)
2580 offset
+= SUBREG_WORD (operand
);
2581 operand
= SUBREG_REG (operand
);
2582 /* Force reload if this is a constant or PLUS or if there may may
2583 be a problem accessing OPERAND in the outer mode. */
2584 if (CONSTANT_P (operand
)
2585 || GET_CODE (operand
) == PLUS
2586 /* We must force a reload of paradoxical SUBREGs
2587 of a MEM because the alignment of the inner value
2588 may not be enough to do the outer reference. On
2589 big-endian machines, it may also reference outside
2592 On machines that extend byte operations and we have a
2593 SUBREG where both the inner and outer modes are no wider
2594 than a word and the inner mode is narrower, is integral,
2595 and gets extended when loaded from memory, combine.c has
2596 made assumptions about the behavior of the machine in such
2597 register access. If the data is, in fact, in memory we
2598 must always load using the size assumed to be in the
2599 register and let the insn do the different-sized
2601 || ((GET_CODE (operand
) == MEM
2602 || (GET_CODE (operand
)== REG
2603 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2604 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2605 < BIGGEST_ALIGNMENT
)
2606 && (GET_MODE_SIZE (operand_mode
[i
])
2607 > GET_MODE_SIZE (GET_MODE (operand
))))
2608 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2609 #ifdef LOAD_EXTEND_OP
2610 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2611 && (GET_MODE_SIZE (GET_MODE (operand
))
2613 && (GET_MODE_SIZE (operand_mode
[i
])
2614 > GET_MODE_SIZE (GET_MODE (operand
)))
2615 && INTEGRAL_MODE_P (GET_MODE (operand
))
2616 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2619 /* Subreg of a hard reg which can't handle the subreg's mode
2620 or which would handle that mode in the wrong number of
2621 registers for subregging to work. */
2622 || (GET_CODE (operand
) == REG
2623 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2624 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2625 && (GET_MODE_SIZE (GET_MODE (operand
))
2627 && ((GET_MODE_SIZE (GET_MODE (operand
))
2629 != HARD_REGNO_NREGS (REGNO (operand
),
2630 GET_MODE (operand
))))
2631 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2636 this_alternative
[i
] = (int) NO_REGS
;
2637 this_alternative_win
[i
] = 0;
2638 this_alternative_offmemok
[i
] = 0;
2639 this_alternative_earlyclobber
[i
] = 0;
2640 this_alternative_matches
[i
] = -1;
2642 /* An empty constraint or empty alternative
2643 allows anything which matched the pattern. */
2644 if (*p
== 0 || *p
== ',')
2647 /* Scan this alternative's specs for this operand;
2648 set WIN if the operand fits any letter in this alternative.
2649 Otherwise, clear BADOP if this operand could
2650 fit some letter after reloads,
2651 or set WINREG if this operand could fit after reloads
2652 provided the constraint allows some registers. */
2654 while (*p
&& (c
= *p
++) != ',')
2663 /* The last operand should not be marked commutative. */
2664 if (i
!= noperands
- 1)
2677 /* Ignore rest of this alternative as far as
2678 reloading is concerned. */
2679 while (*p
&& *p
!= ',') p
++;
2688 this_alternative_matches
[i
] = c
;
2689 /* We are supposed to match a previous operand.
2690 If we do, we win if that one did.
2691 If we do not, count both of the operands as losers.
2692 (This is too conservative, since most of the time
2693 only a single reload insn will be needed to make
2694 the two operands win. As a result, this alternative
2695 may be rejected when it is actually desirable.) */
2696 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2697 /* If we are matching as if two operands were swapped,
2698 also pretend that operands_match had been computed
2700 But if I is the second of those and C is the first,
2701 don't exchange them, because operands_match is valid
2702 only on one side of its diagonal. */
2704 [(c
== commutative
|| c
== commutative
+ 1)
2705 ? 2*commutative
+ 1 - c
: c
]
2706 [(i
== commutative
|| i
== commutative
+ 1)
2707 ? 2*commutative
+ 1 - i
: i
])
2708 : operands_match
[c
][i
])
2709 win
= this_alternative_win
[c
];
2712 /* Operands don't match. */
2714 /* Retroactively mark the operand we had to match
2715 as a loser, if it wasn't already. */
2716 if (this_alternative_win
[c
])
2718 this_alternative_win
[c
] = 0;
2719 if (this_alternative
[c
] == (int) NO_REGS
)
2721 /* But count the pair only once in the total badness of
2722 this alternative, if the pair can be a dummy reload. */
2724 = find_dummy_reload (recog_operand
[i
], recog_operand
[c
],
2725 recog_operand_loc
[i
], recog_operand_loc
[c
],
2726 operand_mode
[i
], operand_mode
[c
],
2727 this_alternative
[c
], -1);
2732 /* This can be fixed with reloads if the operand
2733 we are supposed to match can be fixed with reloads. */
2735 this_alternative
[i
] = this_alternative
[c
];
2737 /* If we have to reload this operand and some previous
2738 operand also had to match the same thing as this
2739 operand, we don't know how to do that. So reject this
2741 if (! win
|| force_reload
)
2742 for (j
= 0; j
< i
; j
++)
2743 if (this_alternative_matches
[j
]
2744 == this_alternative_matches
[i
])
2750 /* All necessary reloads for an address_operand
2751 were handled in find_reloads_address. */
2752 this_alternative
[i
] = (int) BASE_REG_CLASS
;
2759 if (GET_CODE (operand
) == MEM
2760 || (GET_CODE (operand
) == REG
2761 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2762 && reg_renumber
[REGNO (operand
)] < 0))
2764 if (CONSTANT_P (operand
))
2770 if (GET_CODE (operand
) == MEM
2771 && ! address_reloaded
[i
]
2772 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2773 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2778 if (GET_CODE (operand
) == MEM
2779 && ! address_reloaded
[i
]
2780 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2781 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
2785 /* Memory operand whose address is not offsettable. */
2789 if (GET_CODE (operand
) == MEM
2790 && ! (ind_levels
? offsettable_memref_p (operand
)
2791 : offsettable_nonstrict_memref_p (operand
))
2792 /* Certain mem addresses will become offsettable
2793 after they themselves are reloaded. This is important;
2794 we don't want our own handling of unoffsettables
2795 to override the handling of reg_equiv_address. */
2796 && !(GET_CODE (XEXP (operand
, 0)) == REG
2798 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
2802 /* Memory operand whose address is offsettable. */
2806 if ((GET_CODE (operand
) == MEM
2807 /* If IND_LEVELS, find_reloads_address won't reload a
2808 pseudo that didn't get a hard reg, so we have to
2809 reject that case. */
2810 && (ind_levels
? offsettable_memref_p (operand
)
2811 : offsettable_nonstrict_memref_p (operand
)))
2812 /* A reloaded auto-increment address is offsettable,
2813 because it is now just a simple register indirect. */
2814 || (GET_CODE (operand
) == MEM
2815 && address_reloaded
[i
]
2816 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2817 || GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2818 || GET_CODE (XEXP (operand
, 0)) == POST_INC
2819 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2820 /* Certain mem addresses will become offsettable
2821 after they themselves are reloaded. This is important;
2822 we don't want our own handling of unoffsettables
2823 to override the handling of reg_equiv_address. */
2824 || (GET_CODE (operand
) == MEM
2825 && GET_CODE (XEXP (operand
, 0)) == REG
2827 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0))
2828 || (GET_CODE (operand
) == REG
2829 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2830 && reg_renumber
[REGNO (operand
)] < 0
2831 /* If reg_equiv_address is nonzero, we will be
2832 loading it into a register; hence it will be
2833 offsettable, but we cannot say that reg_equiv_mem
2834 is offsettable without checking. */
2835 && ((reg_equiv_mem
[REGNO (operand
)] != 0
2836 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
2837 || (reg_equiv_address
[REGNO (operand
)] != 0))))
2839 if (CONSTANT_P (operand
) || GET_CODE (operand
) == MEM
)
2846 /* Output operand that is stored before the need for the
2847 input operands (and their index registers) is over. */
2848 earlyclobber
= 1, this_earlyclobber
= 1;
2852 /* Match any floating double constant, but only if
2853 we can examine the bits of it reliably. */
2854 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
2855 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
2856 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
2858 if (GET_CODE (operand
) == CONST_DOUBLE
)
2863 if (GET_CODE (operand
) == CONST_DOUBLE
)
2869 if (GET_CODE (operand
) == CONST_DOUBLE
2870 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
2875 if (GET_CODE (operand
) == CONST_INT
2876 || (GET_CODE (operand
) == CONST_DOUBLE
2877 && GET_MODE (operand
) == VOIDmode
))
2880 if (CONSTANT_P (operand
)
2881 #ifdef LEGITIMATE_PIC_OPERAND_P
2882 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
2889 if (GET_CODE (operand
) == CONST_INT
2890 || (GET_CODE (operand
) == CONST_DOUBLE
2891 && GET_MODE (operand
) == VOIDmode
))
2903 if (GET_CODE (operand
) == CONST_INT
2904 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
2914 /* A PLUS is never a valid operand, but reload can make
2915 it from a register when eliminating registers. */
2916 && GET_CODE (operand
) != PLUS
2917 /* A SCRATCH is not a valid operand. */
2918 && GET_CODE (operand
) != SCRATCH
2919 #ifdef LEGITIMATE_PIC_OPERAND_P
2920 && (! CONSTANT_P (operand
)
2922 || LEGITIMATE_PIC_OPERAND_P (operand
))
2924 && (GENERAL_REGS
== ALL_REGS
2925 || GET_CODE (operand
) != REG
2926 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2927 && reg_renumber
[REGNO (operand
)] < 0)))
2929 /* Drop through into 'r' case */
2933 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
2936 #ifdef EXTRA_CONSTRAINT
2942 if (EXTRA_CONSTRAINT (operand
, c
))
2949 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
2952 if (GET_MODE (operand
) == BLKmode
)
2955 if (GET_CODE (operand
) == REG
2956 && reg_fits_class_p (operand
, this_alternative
[i
],
2957 offset
, GET_MODE (recog_operand
[i
])))
2964 /* If this operand could be handled with a reg,
2965 and some reg is allowed, then this operand can be handled. */
2966 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
2969 /* Record which operands fit this alternative. */
2970 this_alternative_earlyclobber
[i
] = earlyclobber
;
2971 if (win
&& ! force_reload
)
2972 this_alternative_win
[i
] = 1;
2975 int const_to_mem
= 0;
2977 this_alternative_offmemok
[i
] = offmemok
;
2981 /* Alternative loses if it has no regs for a reg operand. */
2982 if (GET_CODE (operand
) == REG
2983 && this_alternative
[i
] == (int) NO_REGS
2984 && this_alternative_matches
[i
] < 0)
2987 /* Alternative loses if it requires a type of reload not
2988 permitted for this insn. We can always reload SCRATCH
2989 and objects with a REG_UNUSED note. */
2990 if (GET_CODE (operand
) != SCRATCH
2991 && modified
[i
] != RELOAD_READ
&& no_output_reloads
2992 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
2994 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
)
2997 /* If this is a constant that is reloaded into the desired
2998 class by copying it to memory first, count that as another
2999 reload. This is consistent with other code and is
3000 required to avoid chosing another alternative when
3001 the constant is moved into memory by this function on
3002 an early reload pass. Note that the test here is
3003 precisely the same as in the code below that calls
3005 if (CONSTANT_P (operand
)
3006 /* force_const_mem does not accept HIGH. */
3007 && GET_CODE (operand
) != HIGH
3008 && (PREFERRED_RELOAD_CLASS (operand
,
3009 (enum reg_class
) this_alternative
[i
])
3011 && operand_mode
[i
] != VOIDmode
)
3014 if (this_alternative
[i
] != (int) NO_REGS
)
3018 /* If we can't reload this value at all, reject this
3019 alternative. Note that we could also lose due to
3020 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3023 if (! CONSTANT_P (operand
)
3024 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3025 && (PREFERRED_RELOAD_CLASS (operand
,
3026 (enum reg_class
) this_alternative
[i
])
3030 /* We prefer to reload pseudos over reloading other things,
3031 since such reloads may be able to be eliminated later.
3032 If we are reloading a SCRATCH, we won't be generating any
3033 insns, just using a register, so it is also preferred.
3034 So bump REJECT in other cases. Don't do this in the
3035 case where we are forcing a constant into memory and
3036 it will then win since we don't want to have a different
3037 alternative match then. */
3038 if (! (GET_CODE (operand
) == REG
3039 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3040 && GET_CODE (operand
) != SCRATCH
3041 && ! (const_to_mem
&& constmemok
))
3045 /* If this operand is a pseudo register that didn't get a hard
3046 reg and this alternative accepts some register, see if the
3047 class that we want is a subset of the preferred class for this
3048 register. If not, but it intersects that class, use the
3049 preferred class instead. If it does not intersect the preferred
3050 class, show that usage of this alternative should be discouraged;
3051 it will be discouraged more still if the register is `preferred
3052 or nothing'. We do this because it increases the chance of
3053 reusing our spill register in a later insn and avoiding a pair
3054 of memory stores and loads.
3056 Don't bother with this if this alternative will accept this
3059 Don't do this for a multiword operand, since it is only a
3060 small win and has the risk of requiring more spill registers,
3061 which could cause a large loss.
3063 Don't do this if the preferred class has only one register
3064 because we might otherwise exhaust the class. */
3067 if (! win
&& this_alternative
[i
] != (int) NO_REGS
3068 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3069 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3071 if (! reg_class_subset_p (this_alternative
[i
],
3072 preferred_class
[i
]))
3074 /* Since we don't have a way of forming the intersection,
3075 we just do something special if the preferred class
3076 is a subset of the class we have; that's the most
3077 common case anyway. */
3078 if (reg_class_subset_p (preferred_class
[i
],
3079 this_alternative
[i
]))
3080 this_alternative
[i
] = (int) preferred_class
[i
];
3082 reject
+= (1 + pref_or_nothing
[i
]);
3087 /* Now see if any output operands that are marked "earlyclobber"
3088 in this alternative conflict with any input operands
3089 or any memory addresses. */
3091 for (i
= 0; i
< noperands
; i
++)
3092 if (this_alternative_earlyclobber
[i
]
3093 && this_alternative_win
[i
])
3095 struct decomposition early_data
;
3097 early_data
= decompose (recog_operand
[i
]);
3099 if (modified
[i
] == RELOAD_READ
)
3101 if (this_insn_is_asm
)
3102 warning_for_asm (this_insn
,
3103 "`&' constraint used with input operand");
3109 if (this_alternative
[i
] == NO_REGS
)
3111 this_alternative_earlyclobber
[i
] = 0;
3112 if (this_insn_is_asm
)
3113 error_for_asm (this_insn
,
3114 "`&' constraint used with no register class");
3119 for (j
= 0; j
< noperands
; j
++)
3120 /* Is this an input operand or a memory ref? */
3121 if ((GET_CODE (recog_operand
[j
]) == MEM
3122 || modified
[j
] != RELOAD_WRITE
)
3124 /* Ignore things like match_operator operands. */
3125 && *constraints1
[j
] != 0
3126 /* Don't count an input operand that is constrained to match
3127 the early clobber operand. */
3128 && ! (this_alternative_matches
[j
] == i
3129 && rtx_equal_p (recog_operand
[i
], recog_operand
[j
]))
3130 /* Is it altered by storing the earlyclobber operand? */
3131 && !immune_p (recog_operand
[j
], recog_operand
[i
], early_data
))
3133 /* If the output is in a single-reg class,
3134 it's costly to reload it, so reload the input instead. */
3135 if (reg_class_size
[this_alternative
[i
]] == 1
3136 && (GET_CODE (recog_operand
[j
]) == REG
3137 || GET_CODE (recog_operand
[j
]) == SUBREG
))
3140 this_alternative_win
[j
] = 0;
3145 /* If an earlyclobber operand conflicts with something,
3146 it must be reloaded, so request this and count the cost. */
3150 this_alternative_win
[i
] = 0;
3151 for (j
= 0; j
< noperands
; j
++)
3152 if (this_alternative_matches
[j
] == i
3153 && this_alternative_win
[j
])
3155 this_alternative_win
[j
] = 0;
3161 /* If one alternative accepts all the operands, no reload required,
3162 choose that alternative; don't consider the remaining ones. */
3165 /* Unswap these so that they are never swapped at `finish'. */
3166 if (commutative
>= 0)
3168 recog_operand
[commutative
] = substed_operand
[commutative
];
3169 recog_operand
[commutative
+ 1]
3170 = substed_operand
[commutative
+ 1];
3172 for (i
= 0; i
< noperands
; i
++)
3174 goal_alternative_win
[i
] = 1;
3175 goal_alternative
[i
] = this_alternative
[i
];
3176 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3177 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3178 goal_alternative_earlyclobber
[i
]
3179 = this_alternative_earlyclobber
[i
];
3181 goal_alternative_number
= this_alternative_number
;
3182 goal_alternative_swapped
= swapped
;
3183 goal_earlyclobber
= this_earlyclobber
;
3187 /* REJECT, set by the ! and ? constraint characters and when a register
3188 would be reloaded into a non-preferred class, discourages the use of
3189 this alternative for a reload goal. REJECT is incremented by three
3190 for each ? and one for each non-preferred class. */
3191 losers
= losers
* 3 + reject
;
3193 /* If this alternative can be made to work by reloading,
3194 and it needs less reloading than the others checked so far,
3195 record it as the chosen goal for reloading. */
3196 if (! bad
&& best
> losers
)
3198 for (i
= 0; i
< noperands
; i
++)
3200 goal_alternative
[i
] = this_alternative
[i
];
3201 goal_alternative_win
[i
] = this_alternative_win
[i
];
3202 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3203 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3204 goal_alternative_earlyclobber
[i
]
3205 = this_alternative_earlyclobber
[i
];
3207 goal_alternative_swapped
= swapped
;
3209 goal_alternative_number
= this_alternative_number
;
3210 goal_earlyclobber
= this_earlyclobber
;
3214 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3215 then we need to try each alternative twice,
3216 the second time matching those two operands
3217 as if we had exchanged them.
3218 To do this, really exchange them in operands.
3220 If we have just tried the alternatives the second time,
3221 return operands to normal and drop through. */
3223 if (commutative
>= 0)
3228 register enum reg_class tclass
;
3231 recog_operand
[commutative
] = substed_operand
[commutative
+ 1];
3232 recog_operand
[commutative
+ 1] = substed_operand
[commutative
];
3234 tclass
= preferred_class
[commutative
];
3235 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3236 preferred_class
[commutative
+ 1] = tclass
;
3238 t
= pref_or_nothing
[commutative
];
3239 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3240 pref_or_nothing
[commutative
+ 1] = t
;
3242 bcopy ((char *) constraints1
, (char *) constraints
,
3243 noperands
* sizeof (char *));
3248 recog_operand
[commutative
] = substed_operand
[commutative
];
3249 recog_operand
[commutative
+ 1] = substed_operand
[commutative
+ 1];
3253 /* The operands don't meet the constraints.
3254 goal_alternative describes the alternative
3255 that we could reach by reloading the fewest operands.
3256 Reload so as to fit it. */
3258 if (best
== MAX_RECOG_OPERANDS
+ 300)
3260 /* No alternative works with reloads?? */
3261 if (insn_code_number
>= 0)
3263 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3264 /* Avoid further trouble with this insn. */
3265 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3270 /* Jump to `finish' from above if all operands are valid already.
3271 In that case, goal_alternative_win is all 1. */
3274 /* Right now, for any pair of operands I and J that are required to match,
3276 goal_alternative_matches[J] is I.
3277 Set up goal_alternative_matched as the inverse function:
3278 goal_alternative_matched[I] = J. */
3280 for (i
= 0; i
< noperands
; i
++)
3281 goal_alternative_matched
[i
] = -1;
3283 for (i
= 0; i
< noperands
; i
++)
3284 if (! goal_alternative_win
[i
]
3285 && goal_alternative_matches
[i
] >= 0)
3286 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3288 /* If the best alternative is with operands 1 and 2 swapped,
3289 consider them swapped before reporting the reloads. Update the
3290 operand numbers of any reloads already pushed. */
3292 if (goal_alternative_swapped
)
3296 tem
= substed_operand
[commutative
];
3297 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3298 substed_operand
[commutative
+ 1] = tem
;
3299 tem
= recog_operand
[commutative
];
3300 recog_operand
[commutative
] = recog_operand
[commutative
+ 1];
3301 recog_operand
[commutative
+ 1] = tem
;
3303 for (i
= 0; i
< n_reloads
; i
++)
3305 if (reload_opnum
[i
] == commutative
)
3306 reload_opnum
[i
] = commutative
+ 1;
3307 else if (reload_opnum
[i
] == commutative
+ 1)
3308 reload_opnum
[i
] = commutative
;
3312 /* Perform whatever substitutions on the operands we are supposed
3313 to make due to commutativity or replacement of registers
3314 with equivalent constants or memory slots. */
3316 for (i
= 0; i
< noperands
; i
++)
3318 *recog_operand_loc
[i
] = substed_operand
[i
];
3319 /* While we are looping on operands, initialize this. */
3320 operand_reloadnum
[i
] = -1;
3322 /* If this is an earlyclobber operand, we need to widen the scope.
3323 The reload must remain valid from the start of the insn being
3324 reloaded until after the operand is stored into its destination.
3325 We approximate this with RELOAD_OTHER even though we know that we
3326 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3328 One special case that is worth checking is when we have an
3329 output that is earlyclobber but isn't used past the insn (typically
3330 a SCRATCH). In this case, we only need have the reload live
3331 through the insn itself, but not for any of our input or output
3334 In any case, anything needed to address this operand can remain
3335 however they were previously categorized. */
3337 if (goal_alternative_earlyclobber
[i
])
3339 = (find_reg_note (insn
, REG_UNUSED
, recog_operand
[i
])
3340 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3343 /* Any constants that aren't allowed and can't be reloaded
3344 into registers are here changed into memory references. */
3345 for (i
= 0; i
< noperands
; i
++)
3346 if (! goal_alternative_win
[i
]
3347 && CONSTANT_P (recog_operand
[i
])
3348 /* force_const_mem does not accept HIGH. */
3349 && GET_CODE (recog_operand
[i
]) != HIGH
3350 && (PREFERRED_RELOAD_CLASS (recog_operand
[i
],
3351 (enum reg_class
) goal_alternative
[i
])
3353 && operand_mode
[i
] != VOIDmode
)
3355 *recog_operand_loc
[i
] = recog_operand
[i
]
3356 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3358 i
, address_type
[i
], ind_levels
, 0);
3359 if (alternative_allows_memconst (constraints1
[i
],
3360 goal_alternative_number
))
3361 goal_alternative_win
[i
] = 1;
3364 /* Record the values of the earlyclobber operands for the caller. */
3365 if (goal_earlyclobber
)
3366 for (i
= 0; i
< noperands
; i
++)
3367 if (goal_alternative_earlyclobber
[i
])
3368 reload_earlyclobbers
[n_earlyclobbers
++] = recog_operand
[i
];
3370 /* Now record reloads for all the operands that need them. */
3371 for (i
= 0; i
< noperands
; i
++)
3372 if (! goal_alternative_win
[i
])
3374 /* Operands that match previous ones have already been handled. */
3375 if (goal_alternative_matches
[i
] >= 0)
3377 /* Handle an operand with a nonoffsettable address
3378 appearing where an offsettable address will do
3379 by reloading the address into a base register.
3381 ??? We can also do this when the operand is a register and
3382 reg_equiv_mem is not offsettable, but this is a bit tricky,
3383 so we don't bother with it. It may not be worth doing. */
3384 else if (goal_alternative_matched
[i
] == -1
3385 && goal_alternative_offmemok
[i
]
3386 && GET_CODE (recog_operand
[i
]) == MEM
)
3388 operand_reloadnum
[i
]
3389 = push_reload (XEXP (recog_operand
[i
], 0), NULL_RTX
,
3390 &XEXP (recog_operand
[i
], 0), NULL_PTR
,
3391 BASE_REG_CLASS
, GET_MODE (XEXP (recog_operand
[i
], 0)),
3392 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3393 reload_inc
[operand_reloadnum
[i
]]
3394 = GET_MODE_SIZE (GET_MODE (recog_operand
[i
]));
3396 /* If this operand is an output, we will have made any
3397 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3398 now we are treating part of the operand as an input, so
3399 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3401 if (modified
[i
] == RELOAD_WRITE
)
3402 for (j
= 0; j
< n_reloads
; j
++)
3403 if (reload_opnum
[j
] == i
3404 && reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3405 reload_when_needed
[j
] = RELOAD_FOR_INPUT_ADDRESS
;
3407 else if (goal_alternative_matched
[i
] == -1)
3408 operand_reloadnum
[i
] =
3409 push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3410 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3411 (modified
[i
] != RELOAD_WRITE
?
3412 recog_operand_loc
[i
] : 0),
3413 modified
[i
] != RELOAD_READ
? recog_operand_loc
[i
] : 0,
3414 (enum reg_class
) goal_alternative
[i
],
3415 (modified
[i
] == RELOAD_WRITE
3416 ? VOIDmode
: operand_mode
[i
]),
3417 (modified
[i
] == RELOAD_READ
3418 ? VOIDmode
: operand_mode
[i
]),
3419 (insn_code_number
< 0 ? 0
3420 : insn_operand_strict_low
[insn_code_number
][i
]),
3421 0, i
, operand_type
[i
]);
3422 /* In a matching pair of operands, one must be input only
3423 and the other must be output only.
3424 Pass the input operand as IN and the other as OUT. */
3425 else if (modified
[i
] == RELOAD_READ
3426 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3428 operand_reloadnum
[i
]
3429 = push_reload (recog_operand
[i
],
3430 recog_operand
[goal_alternative_matched
[i
]],
3431 recog_operand_loc
[i
],
3432 recog_operand_loc
[goal_alternative_matched
[i
]],
3433 (enum reg_class
) goal_alternative
[i
],
3435 operand_mode
[goal_alternative_matched
[i
]],
3436 0, 0, i
, RELOAD_OTHER
);
3437 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3439 else if (modified
[i
] == RELOAD_WRITE
3440 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3442 operand_reloadnum
[goal_alternative_matched
[i
]]
3443 = push_reload (recog_operand
[goal_alternative_matched
[i
]],
3445 recog_operand_loc
[goal_alternative_matched
[i
]],
3446 recog_operand_loc
[i
],
3447 (enum reg_class
) goal_alternative
[i
],
3448 operand_mode
[goal_alternative_matched
[i
]],
3450 0, 0, i
, RELOAD_OTHER
);
3451 operand_reloadnum
[i
] = output_reloadnum
;
3453 else if (insn_code_number
>= 0)
3457 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3458 /* Avoid further trouble with this insn. */
3459 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3464 else if (goal_alternative_matched
[i
] < 0
3465 && goal_alternative_matches
[i
] < 0
3468 /* For each non-matching operand that's a MEM or a pseudo-register
3469 that didn't get a hard register, make an optional reload.
3470 This may get done even if the insn needs no reloads otherwise. */
3472 rtx operand
= recog_operand
[i
];
3474 while (GET_CODE (operand
) == SUBREG
)
3475 operand
= XEXP (operand
, 0);
3476 if ((GET_CODE (operand
) == MEM
3477 || (GET_CODE (operand
) == REG
3478 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3479 && (enum reg_class
) goal_alternative
[i
] != NO_REGS
3480 && ! no_input_reloads
3481 /* Optional output reloads don't do anything and we mustn't
3482 make in-out reloads on insns that are not permitted output
3484 && (modified
[i
] == RELOAD_READ
3485 || (modified
[i
] == RELOAD_READ_WRITE
&& ! no_output_reloads
)))
3486 operand_reloadnum
[i
]
3487 = push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3488 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3489 (modified
[i
] != RELOAD_WRITE
3490 ? recog_operand_loc
[i
] : 0),
3491 (modified
[i
] != RELOAD_READ
3492 ? recog_operand_loc
[i
] : 0),
3493 (enum reg_class
) goal_alternative
[i
],
3494 (modified
[i
] == RELOAD_WRITE
3495 ? VOIDmode
: operand_mode
[i
]),
3496 (modified
[i
] == RELOAD_READ
3497 ? VOIDmode
: operand_mode
[i
]),
3498 (insn_code_number
< 0 ? 0
3499 : insn_operand_strict_low
[insn_code_number
][i
]),
3500 1, i
, operand_type
[i
]);
3502 else if (goal_alternative_matches
[i
] >= 0
3503 && goal_alternative_win
[goal_alternative_matches
[i
]]
3504 && modified
[i
] == RELOAD_READ
3505 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3506 && ! no_input_reloads
&& ! no_output_reloads
3509 /* Similarly, make an optional reload for a pair of matching
3510 objects that are in MEM or a pseudo that didn't get a hard reg. */
3512 rtx operand
= recog_operand
[i
];
3514 while (GET_CODE (operand
) == SUBREG
)
3515 operand
= XEXP (operand
, 0);
3516 if ((GET_CODE (operand
) == MEM
3517 || (GET_CODE (operand
) == REG
3518 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3519 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3521 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3522 = push_reload (recog_operand
[goal_alternative_matches
[i
]],
3524 recog_operand_loc
[goal_alternative_matches
[i
]],
3525 recog_operand_loc
[i
],
3526 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3527 operand_mode
[goal_alternative_matches
[i
]],
3529 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3532 /* If this insn pattern contains any MATCH_DUP's, make sure that
3533 they will be substituted if the operands they match are substituted.
3534 Also do now any substitutions we already did on the operands.
3536 Don't do this if we aren't making replacements because we might be
3537 propagating things allocated by frame pointer elimination into places
3538 it doesn't expect. */
3540 if (insn_code_number
>= 0 && replace
)
3541 for (i
= insn_n_dups
[insn_code_number
] - 1; i
>= 0; i
--)
3543 int opno
= recog_dup_num
[i
];
3544 *recog_dup_loc
[i
] = *recog_operand_loc
[opno
];
3545 if (operand_reloadnum
[opno
] >= 0)
3546 push_replacement (recog_dup_loc
[i
], operand_reloadnum
[opno
],
3547 insn_operand_mode
[insn_code_number
][opno
]);
3551 /* This loses because reloading of prior insns can invalidate the equivalence
3552 (or at least find_equiv_reg isn't smart enough to find it any more),
3553 causing this insn to need more reload regs than it needed before.
3554 It may be too late to make the reload regs available.
3555 Now this optimization is done safely in choose_reload_regs. */
3557 /* For each reload of a reg into some other class of reg,
3558 search for an existing equivalent reg (same value now) in the right class.
3559 We can use it as long as we don't need to change its contents. */
3560 for (i
= 0; i
< n_reloads
; i
++)
3561 if (reload_reg_rtx
[i
] == 0
3562 && reload_in
[i
] != 0
3563 && GET_CODE (reload_in
[i
]) == REG
3564 && reload_out
[i
] == 0)
3567 = find_equiv_reg (reload_in
[i
], insn
, reload_reg_class
[i
], -1,
3568 static_reload_reg_p
, 0, reload_inmode
[i
]);
3569 /* Prevent generation of insn to load the value
3570 because the one we found already has the value. */
3571 if (reload_reg_rtx
[i
])
3572 reload_in
[i
] = reload_reg_rtx
[i
];
3576 /* Perhaps an output reload can be combined with another
3577 to reduce needs by one. */
3578 if (!goal_earlyclobber
)
3581 /* If we have a pair of reloads for parts of an address, they are reloading
3582 the same object, the operands themselves were not reloaded, and they
3583 are for two operands that are supposed to match, merge the reloads and
3584 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3586 for (i
= 0; i
< n_reloads
; i
++)
3590 for (j
= i
+ 1; j
< n_reloads
; j
++)
3591 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3592 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3593 && (reload_when_needed
[j
] == RELOAD_FOR_INPUT_ADDRESS
3594 || reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3595 && rtx_equal_p (reload_in
[i
], reload_in
[j
])
3596 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3597 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]])
3598 && (operand_reloadnum
[reload_opnum
[j
]] < 0
3599 || reload_optional
[operand_reloadnum
[reload_opnum
[j
]]])
3600 && (goal_alternative_matches
[reload_opnum
[i
]] == reload_opnum
[j
]
3601 || (goal_alternative_matches
[reload_opnum
[j
]]
3602 == reload_opnum
[i
])))
3604 for (k
= 0; k
< n_replacements
; k
++)
3605 if (replacements
[k
].what
== j
)
3606 replacements
[k
].what
= i
;
3608 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3613 /* Scan all the reloads and update their type.
3614 If a reload is for the address of an operand and we didn't reload
3615 that operand, change the type. Similarly, change the operand number
3616 of a reload when two operands match. If a reload is optional, treat it
3617 as though the operand isn't reloaded.
3619 ??? This latter case is somewhat odd because if we do the optional
3620 reload, it means the object is hanging around. Thus we need only
3621 do the address reload if the optional reload was NOT done.
3623 Change secondary reloads to be the address type of their operand, not
3626 If an operand's reload is now RELOAD_OTHER, change any
3627 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3628 RELOAD_FOR_OTHER_ADDRESS. */
3630 for (i
= 0; i
< n_reloads
; i
++)
3632 if (reload_secondary_p
[i
]
3633 && reload_when_needed
[i
] == operand_type
[reload_opnum
[i
]])
3634 reload_when_needed
[i
] = address_type
[reload_opnum
[i
]];
3636 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3637 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3638 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3639 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]]))
3641 /* If we have a secondary reload to go along with this reload,
3642 change its type to RELOAD_FOR_OPADDR_ADDR. */
3644 if (reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3645 && reload_secondary_in_reload
[i
] != -1)
3647 int secondary_in_reload
= reload_secondary_in_reload
[i
];
3649 reload_when_needed
[secondary_in_reload
] =
3650 RELOAD_FOR_OPADDR_ADDR
;
3652 /* If there's a tertiary reload we have to change it also. */
3653 if (secondary_in_reload
> 0
3654 && reload_secondary_in_reload
[secondary_in_reload
] != -1)
3655 reload_when_needed
[reload_secondary_in_reload
[secondary_in_reload
]]
3656 = RELOAD_FOR_OPADDR_ADDR
;
3659 if (reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
3660 && reload_secondary_out_reload
[i
] != -1)
3662 int secondary_out_reload
= reload_secondary_out_reload
[i
];
3664 reload_when_needed
[secondary_out_reload
] =
3665 RELOAD_FOR_OPADDR_ADDR
;
3667 /* If there's a tertiary reload we have to change it also. */
3668 if (secondary_out_reload
3669 && reload_secondary_out_reload
[secondary_out_reload
] != -1)
3670 reload_when_needed
[reload_secondary_out_reload
[secondary_out_reload
]]
3671 = RELOAD_FOR_OPADDR_ADDR
;
3673 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3676 if (reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3677 && operand_reloadnum
[reload_opnum
[i
]] >= 0
3678 && (reload_when_needed
[operand_reloadnum
[reload_opnum
[i
]]]
3680 reload_when_needed
[i
] = RELOAD_FOR_OTHER_ADDRESS
;
3682 if (goal_alternative_matches
[reload_opnum
[i
]] >= 0)
3683 reload_opnum
[i
] = goal_alternative_matches
[reload_opnum
[i
]];
3686 /* See if we have any reloads that are now allowed to be merged
3687 because we've changed when the reload is needed to
3688 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3689 check for the most common cases. */
3691 for (i
= 0; i
< n_reloads
; i
++)
3692 if (reload_in
[i
] != 0 && reload_out
[i
] == 0
3693 && (reload_when_needed
[i
] == RELOAD_FOR_OPERAND_ADDRESS
3694 || reload_when_needed
[i
] == RELOAD_FOR_OTHER_ADDRESS
))
3695 for (j
= 0; j
< n_reloads
; j
++)
3696 if (i
!= j
&& reload_in
[j
] != 0 && reload_out
[j
] == 0
3697 && reload_when_needed
[j
] == reload_when_needed
[i
]
3698 && MATCHES (reload_in
[i
], reload_in
[j
])
3699 && reload_reg_class
[i
] == reload_reg_class
[j
]
3700 && !reload_nocombine
[i
] && !reload_nocombine
[j
]
3701 && reload_reg_rtx
[i
] == reload_reg_rtx
[j
])
3703 reload_opnum
[i
] = MIN (reload_opnum
[i
], reload_opnum
[j
]);
3704 transfer_replacements (i
, j
);
3708 #else /* no REGISTER_CONSTRAINTS */
3710 int insn_code_number
;
3711 int goal_earlyclobber
= 0; /* Always 0, to make combine_reloads happen. */
3713 rtx body
= PATTERN (insn
);
3717 n_earlyclobbers
= 0;
3718 replace_reloads
= replace
;
3721 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3722 Store the operand values in RECOG_OPERAND and the locations
3723 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3724 Return if the insn needs no reload processing. */
3726 switch (GET_CODE (body
))
3737 noperands
= asm_noperands (body
);
3740 /* This insn is an `asm' with operands.
3741 First, find out how many operands, and allocate space. */
3743 insn_code_number
= -1;
3744 /* ??? This is a bug! ???
3745 Give up and delete this insn if it has too many operands. */
3746 if (noperands
> MAX_RECOG_OPERANDS
)
3749 /* Now get the operand values out of the insn. */
3751 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
3752 NULL_PTR
, NULL_PTR
);
3757 /* Ordinary insn: recognize it, allocate space for operands and
3758 constraints, and get them out via insn_extract. */
3760 insn_code_number
= recog_memoized (insn
);
3761 noperands
= insn_n_operands
[insn_code_number
];
3762 insn_extract (insn
);
3768 for (i
= 0; i
< noperands
; i
++)
3770 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
3771 int is_set_dest
= GET_CODE (body
) == SET
&& (i
== 0);
3773 if (insn_code_number
>= 0)
3774 if (insn_operand_address_p
[insn_code_number
][i
])
3775 find_reloads_address (VOIDmode
, NULL_PTR
,
3776 recog_operand
[i
], recog_operand_loc
[i
],
3777 i
, RELOAD_FOR_INPUT
, ind_levels
);
3779 /* In these cases, we can't tell if the operand is an input
3780 or an output, so be conservative. In practice it won't be
3784 find_reloads_address (GET_MODE (recog_operand
[i
]),
3785 recog_operand_loc
[i
],
3786 XEXP (recog_operand
[i
], 0),
3787 &XEXP (recog_operand
[i
], 0),
3788 i
, RELOAD_OTHER
, ind_levels
);
3790 recog_operand
[i
] = *recog_operand_loc
[i
]
3791 = find_reloads_toplev (recog_operand
[i
], i
, RELOAD_OTHER
,
3792 ind_levels
, is_set_dest
);
3795 register int regno
= REGNO (recog_operand
[i
]);
3796 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3797 recog_operand
[i
] = *recog_operand_loc
[i
]
3798 = reg_equiv_constant
[regno
];
3799 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3800 that feeds this insn. */
3801 if (reg_equiv_mem
[regno
] != 0)
3802 recog_operand
[i
] = *recog_operand_loc
[i
]
3803 = reg_equiv_mem
[regno
];
3808 /* Perhaps an output reload can be combined with another
3809 to reduce needs by one. */
3810 if (!goal_earlyclobber
)
3812 #endif /* no REGISTER_CONSTRAINTS */
3815 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3816 accepts a memory operand with constant address. */
3819 alternative_allows_memconst (constraint
, altnum
)
3824 /* Skip alternatives before the one requested. */
3827 while (*constraint
++ != ',');
3830 /* Scan the requested alternative for 'm' or 'o'.
3831 If one of them is present, this alternative accepts memory constants. */
3832 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
3833 if (c
== 'm' || c
== 'o')
3838 /* Scan X for memory references and scan the addresses for reloading.
3839 Also checks for references to "constant" regs that we want to eliminate
3840 and replaces them with the values they stand for.
3841 We may alter X destructively if it contains a reference to such.
3842 If X is just a constant reg, we return the equivalent value
3845 IND_LEVELS says how many levels of indirect addressing this machine
3848 OPNUM and TYPE identify the purpose of the reload.
3850 IS_SET_DEST is true if X is the destination of a SET, which is not
3851 appropriate to be replaced by a constant. */
3854 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
)
3857 enum reload_type type
;
3861 register RTX_CODE code
= GET_CODE (x
);
3863 register char *fmt
= GET_RTX_FORMAT (code
);
3868 /* This code is duplicated for speed in find_reloads. */
3869 register int regno
= REGNO (x
);
3870 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3871 x
= reg_equiv_constant
[regno
];
3873 /* This creates (subreg (mem...)) which would cause an unnecessary
3874 reload of the mem. */
3875 else if (reg_equiv_mem
[regno
] != 0)
3876 x
= reg_equiv_mem
[regno
];
3878 else if (reg_equiv_address
[regno
] != 0)
3880 /* If reg_equiv_address varies, it may be shared, so copy it. */
3881 rtx addr
= reg_equiv_address
[regno
];
3883 if (rtx_varies_p (addr
))
3884 addr
= copy_rtx (addr
);
3886 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
3887 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3888 find_reloads_address (GET_MODE (x
), NULL_PTR
,
3890 &XEXP (x
, 0), opnum
, type
, ind_levels
);
3897 find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
3898 opnum
, type
, ind_levels
);
3902 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
3904 /* Check for SUBREG containing a REG that's equivalent to a constant.
3905 If the constant has a known value, truncate it right now.
3906 Similarly if we are extracting a single-word of a multi-word
3907 constant. If the constant is symbolic, allow it to be substituted
3908 normally. push_reload will strip the subreg later. If the
3909 constant is VOIDmode, abort because we will lose the mode of
3910 the register (this should never happen because one of the cases
3911 above should handle it). */
3913 register int regno
= REGNO (SUBREG_REG (x
));
3916 if (subreg_lowpart_p (x
)
3917 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3918 && reg_equiv_constant
[regno
] != 0
3919 && (tem
= gen_lowpart_common (GET_MODE (x
),
3920 reg_equiv_constant
[regno
])) != 0)
3923 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
3924 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3925 && reg_equiv_constant
[regno
] != 0
3926 && (tem
= operand_subword (reg_equiv_constant
[regno
],
3928 GET_MODE (SUBREG_REG (x
)))) != 0)
3931 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3932 && reg_equiv_constant
[regno
] != 0
3933 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
3936 /* If the subreg contains a reg that will be converted to a mem,
3937 convert the subreg to a narrower memref now.
3938 Otherwise, we would get (subreg (mem ...) ...),
3939 which would force reload of the mem.
3941 We also need to do this if there is an equivalent MEM that is
3942 not offsettable. In that case, alter_subreg would produce an
3943 invalid address on big-endian machines.
3945 For machines that extend byte loads, we must not reload using
3946 a wider mode if we have a paradoxical SUBREG. find_reloads will
3947 force a reload in that case. So we should not do anything here. */
3949 else if (regno
>= FIRST_PSEUDO_REGISTER
3950 #ifdef LOAD_EXTEND_OP
3951 && (GET_MODE_SIZE (GET_MODE (x
))
3952 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
3954 && (reg_equiv_address
[regno
] != 0
3955 || (reg_equiv_mem
[regno
] != 0
3956 && (! strict_memory_address_p (GET_MODE (x
),
3957 XEXP (reg_equiv_mem
[regno
], 0))
3958 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))))
3960 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
3961 rtx addr
= (reg_equiv_address
[regno
] ? reg_equiv_address
[regno
]
3962 : XEXP (reg_equiv_mem
[regno
], 0));
3963 if (BYTES_BIG_ENDIAN
)
3966 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
3967 offset
+= MIN (size
, UNITS_PER_WORD
);
3968 size
= GET_MODE_SIZE (GET_MODE (x
));
3969 offset
-= MIN (size
, UNITS_PER_WORD
);
3971 addr
= plus_constant (addr
, offset
);
3972 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
3973 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3974 find_reloads_address (GET_MODE (x
), NULL_PTR
,
3976 &XEXP (x
, 0), opnum
, type
, ind_levels
);
3981 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3984 XEXP (x
, i
) = find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
3985 ind_levels
, is_set_dest
);
3990 /* Return a mem ref for the memory equivalent of reg REGNO.
3991 This mem ref is not shared with anything. */
3994 make_memloc (ad
, regno
)
3999 rtx tem
= reg_equiv_address
[regno
];
4001 #if 0 /* We cannot safely reuse a memloc made here;
4002 if the pseudo appears twice, and its mem needs a reload,
4003 it gets two separate reloads assigned, but it only
4004 gets substituted with the second of them;
4005 then it can get used before that reload reg gets loaded up. */
4006 for (i
= 0; i
< n_memlocs
; i
++)
4007 if (rtx_equal_p (tem
, XEXP (memlocs
[i
], 0)))
4011 /* If TEM might contain a pseudo, we must copy it to avoid
4012 modifying it when we do the substitution for the reload. */
4013 if (rtx_varies_p (tem
))
4014 tem
= copy_rtx (tem
);
4016 tem
= gen_rtx (MEM
, GET_MODE (ad
), tem
);
4017 RTX_UNCHANGING_P (tem
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
4018 memlocs
[n_memlocs
++] = tem
;
4022 /* Record all reloads needed for handling memory address AD
4023 which appears in *LOC in a memory reference to mode MODE
4024 which itself is found in location *MEMREFLOC.
4025 Note that we take shortcuts assuming that no multi-reg machine mode
4026 occurs as part of an address.
4028 OPNUM and TYPE specify the purpose of this reload.
4030 IND_LEVELS says how many levels of indirect addressing this machine
4033 Value is nonzero if this address is reloaded or replaced as a whole.
4034 This is interesting to the caller if the address is an autoincrement.
4036 Note that there is no verification that the address will be valid after
4037 this routine does its work. Instead, we rely on the fact that the address
4038 was valid when reload started. So we need only undo things that reload
4039 could have broken. These are wrong register types, pseudos not allocated
4040 to a hard register, and frame pointer elimination. */
4043 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
)
4044 enum machine_mode mode
;
4049 enum reload_type type
;
4055 /* If the address is a register, see if it is a legitimate address and
4056 reload if not. We first handle the cases where we need not reload
4057 or where we must reload in a non-standard way. */
4059 if (GET_CODE (ad
) == REG
)
4063 if (reg_equiv_constant
[regno
] != 0
4064 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
4066 *loc
= ad
= reg_equiv_constant
[regno
];
4070 else if (reg_equiv_address
[regno
] != 0)
4072 tem
= make_memloc (ad
, regno
);
4073 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
4074 &XEXP (tem
, 0), opnum
, type
, ind_levels
);
4075 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4076 GET_MODE (ad
), VOIDmode
, 0, 0,
4081 /* We can avoid a reload if the register's equivalent memory expression
4082 is valid as an indirect memory address.
4083 But not all addresses are valid in a mem used as an indirect address:
4084 only reg or reg+constant. */
4086 else if (reg_equiv_mem
[regno
] != 0 && ind_levels
> 0
4087 && strict_memory_address_p (mode
, reg_equiv_mem
[regno
])
4088 && (GET_CODE (XEXP (reg_equiv_mem
[regno
], 0)) == REG
4089 || (GET_CODE (XEXP (reg_equiv_mem
[regno
], 0)) == PLUS
4090 && GET_CODE (XEXP (XEXP (reg_equiv_mem
[regno
], 0), 0)) == REG
4091 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem
[regno
], 0), 1)))))
4094 /* The only remaining case where we can avoid a reload is if this is a
4095 hard register that is valid as a base register and which is not the
4096 subject of a CLOBBER in this insn. */
4098 else if (regno
< FIRST_PSEUDO_REGISTER
&& REGNO_OK_FOR_BASE_P (regno
)
4099 && ! regno_clobbered_p (regno
, this_insn
))
4102 /* If we do not have one of the cases above, we must do the reload. */
4103 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4104 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4108 if (strict_memory_address_p (mode
, ad
))
4110 /* The address appears valid, so reloads are not needed.
4111 But the address may contain an eliminable register.
4112 This can happen because a machine with indirect addressing
4113 may consider a pseudo register by itself a valid address even when
4114 it has failed to get a hard reg.
4115 So do a tree-walk to find and eliminate all such regs. */
4117 /* But first quickly dispose of a common case. */
4118 if (GET_CODE (ad
) == PLUS
4119 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4120 && GET_CODE (XEXP (ad
, 0)) == REG
4121 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4124 subst_reg_equivs_changed
= 0;
4125 *loc
= subst_reg_equivs (ad
);
4127 if (! subst_reg_equivs_changed
)
4130 /* Check result for validity after substitution. */
4131 if (strict_memory_address_p (mode
, ad
))
4135 /* The address is not valid. We have to figure out why. One possibility
4136 is that it is itself a MEM. This can happen when the frame pointer is
4137 being eliminated, a pseudo is not allocated to a hard register, and the
4138 offset between the frame and stack pointers is not its initial value.
4139 In that case the pseudo will have been replaced by a MEM referring to
4140 the stack pointer. */
4141 if (GET_CODE (ad
) == MEM
)
4143 /* First ensure that the address in this MEM is valid. Then, unless
4144 indirect addresses are valid, reload the MEM into a register. */
4146 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4147 opnum
, type
, ind_levels
== 0 ? 0 : ind_levels
- 1);
4149 /* If tem was changed, then we must create a new memory reference to
4150 hold it and store it back into memrefloc. */
4151 if (tem
!= ad
&& memrefloc
)
4153 *memrefloc
= copy_rtx (*memrefloc
);
4154 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4155 loc
= &XEXP (*memrefloc
, 0);
4158 /* Check similar cases as for indirect addresses as above except
4159 that we can allow pseudos and a MEM since they should have been
4160 taken care of above. */
4163 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4164 || GET_CODE (XEXP (tem
, 0)) == MEM
4165 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4166 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4167 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4168 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4170 /* Must use TEM here, not AD, since it is the one that will
4171 have any subexpressions reloaded, if needed. */
4172 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4173 BASE_REG_CLASS
, GET_MODE (tem
), VOIDmode
, 0,
4181 /* If we have address of a stack slot but it's not valid
4182 (displacement is too large), compute the sum in a register. */
4183 else if (GET_CODE (ad
) == PLUS
4184 && (XEXP (ad
, 0) == frame_pointer_rtx
4185 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4186 || XEXP (ad
, 0) == hard_frame_pointer_rtx
4188 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4189 || XEXP (ad
, 0) == arg_pointer_rtx
4191 || XEXP (ad
, 0) == stack_pointer_rtx
)
4192 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4194 /* Unshare the MEM rtx so we can safely alter it. */
4197 *memrefloc
= copy_rtx (*memrefloc
);
4198 loc
= &XEXP (*memrefloc
, 0);
4200 if (double_reg_address_ok
)
4202 /* Unshare the sum as well. */
4203 *loc
= ad
= copy_rtx (ad
);
4204 /* Reload the displacement into an index reg.
4205 We assume the frame pointer or arg pointer is a base reg. */
4206 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4207 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4212 /* If the sum of two regs is not necessarily valid,
4213 reload the sum into a base reg.
4214 That will at least work. */
4215 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
,
4216 opnum
, type
, ind_levels
);
4221 /* If we have an indexed stack slot, there are three possible reasons why
4222 it might be invalid: The index might need to be reloaded, the address
4223 might have been made by frame pointer elimination and hence have a
4224 constant out of range, or both reasons might apply.
4226 We can easily check for an index needing reload, but even if that is the
4227 case, we might also have an invalid constant. To avoid making the
4228 conservative assumption and requiring two reloads, we see if this address
4229 is valid when not interpreted strictly. If it is, the only problem is
4230 that the index needs a reload and find_reloads_address_1 will take care
4233 There is still a case when we might generate an extra reload,
4234 however. In certain cases eliminate_regs will return a MEM for a REG
4235 (see the code there for details). In those cases, memory_address_p
4236 applied to our address will return 0 so we will think that our offset
4237 must be too large. But it might indeed be valid and the only problem
4238 is that a MEM is present where a REG should be. This case should be
4239 very rare and there doesn't seem to be any way to avoid it.
4241 If we decide to do something here, it must be that
4242 `double_reg_address_ok' is true and that this address rtl was made by
4243 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4244 rework the sum so that the reload register will be added to the index.
4245 This is safe because we know the address isn't shared.
4247 We check for fp/ap/sp as both the first and second operand of the
4250 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4251 && GET_CODE (XEXP (ad
, 0)) == PLUS
4252 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4253 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4254 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4256 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4257 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4259 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4260 && ! memory_address_p (mode
, ad
))
4262 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4263 plus_constant (XEXP (XEXP (ad
, 0), 0),
4264 INTVAL (XEXP (ad
, 1))),
4265 XEXP (XEXP (ad
, 0), 1));
4266 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4267 GET_MODE (ad
), opnum
, type
, ind_levels
);
4268 find_reloads_address_1 (XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
, type
, 0);
4273 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4274 && GET_CODE (XEXP (ad
, 0)) == PLUS
4275 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4276 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4277 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4279 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4280 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4282 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4283 && ! memory_address_p (mode
, ad
))
4285 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4286 XEXP (XEXP (ad
, 0), 0),
4287 plus_constant (XEXP (XEXP (ad
, 0), 1),
4288 INTVAL (XEXP (ad
, 1))));
4289 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1), BASE_REG_CLASS
,
4290 GET_MODE (ad
), opnum
, type
, ind_levels
);
4291 find_reloads_address_1 (XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
, type
, 0);
4296 /* See if address becomes valid when an eliminable register
4297 in a sum is replaced. */
4300 if (GET_CODE (ad
) == PLUS
)
4301 tem
= subst_indexed_address (ad
);
4302 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4304 /* Ok, we win that way. Replace any additional eliminable
4307 subst_reg_equivs_changed
= 0;
4308 tem
= subst_reg_equivs (tem
);
4310 /* Make sure that didn't make the address invalid again. */
4312 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4319 /* If constants aren't valid addresses, reload the constant address
4321 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4323 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4324 Unshare it so we can safely alter it. */
4325 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4326 && CONSTANT_POOL_ADDRESS_P (ad
))
4328 *memrefloc
= copy_rtx (*memrefloc
);
4329 loc
= &XEXP (*memrefloc
, 0);
4332 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4337 return find_reloads_address_1 (ad
, 0, loc
, opnum
, type
, ind_levels
);
4340 /* Find all pseudo regs appearing in AD
4341 that are eliminable in favor of equivalent values
4342 and do not have hard regs; replace them by their equivalents. */
4345 subst_reg_equivs (ad
)
4348 register RTX_CODE code
= GET_CODE (ad
);
4366 register int regno
= REGNO (ad
);
4368 if (reg_equiv_constant
[regno
] != 0)
4370 subst_reg_equivs_changed
= 1;
4371 return reg_equiv_constant
[regno
];
4377 /* Quickly dispose of a common case. */
4378 if (XEXP (ad
, 0) == frame_pointer_rtx
4379 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4383 fmt
= GET_RTX_FORMAT (code
);
4384 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4386 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
));
4390 /* Compute the sum of X and Y, making canonicalizations assumed in an
4391 address, namely: sum constant integers, surround the sum of two
4392 constants with a CONST, put the constant as the second operand, and
4393 group the constant on the outermost sum.
4395 This routine assumes both inputs are already in canonical form. */
4402 enum machine_mode mode
= GET_MODE (x
);
4404 if (mode
== VOIDmode
)
4405 mode
= GET_MODE (y
);
4407 if (mode
== VOIDmode
)
4410 if (GET_CODE (x
) == CONST_INT
)
4411 return plus_constant (y
, INTVAL (x
));
4412 else if (GET_CODE (y
) == CONST_INT
)
4413 return plus_constant (x
, INTVAL (y
));
4414 else if (CONSTANT_P (x
))
4415 tem
= x
, x
= y
, y
= tem
;
4417 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4418 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4420 /* Note that if the operands of Y are specified in the opposite
4421 order in the recursive calls below, infinite recursion will occur. */
4422 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4423 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4425 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4426 constant will have been placed second. */
4427 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4429 if (GET_CODE (x
) == CONST
)
4431 if (GET_CODE (y
) == CONST
)
4434 return gen_rtx (CONST
, VOIDmode
, gen_rtx (PLUS
, mode
, x
, y
));
4437 return gen_rtx (PLUS
, mode
, x
, y
);
4440 /* If ADDR is a sum containing a pseudo register that should be
4441 replaced with a constant (from reg_equiv_constant),
4442 return the result of doing so, and also apply the associative
4443 law so that the result is more likely to be a valid address.
4444 (But it is not guaranteed to be one.)
4446 Note that at most one register is replaced, even if more are
4447 replaceable. Also, we try to put the result into a canonical form
4448 so it is more likely to be a valid address.
4450 In all other cases, return ADDR. */
4453 subst_indexed_address (addr
)
4456 rtx op0
= 0, op1
= 0, op2
= 0;
4460 if (GET_CODE (addr
) == PLUS
)
4462 /* Try to find a register to replace. */
4463 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4464 if (GET_CODE (op0
) == REG
4465 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4466 && reg_renumber
[regno
] < 0
4467 && reg_equiv_constant
[regno
] != 0)
4468 op0
= reg_equiv_constant
[regno
];
4469 else if (GET_CODE (op1
) == REG
4470 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4471 && reg_renumber
[regno
] < 0
4472 && reg_equiv_constant
[regno
] != 0)
4473 op1
= reg_equiv_constant
[regno
];
4474 else if (GET_CODE (op0
) == PLUS
4475 && (tem
= subst_indexed_address (op0
)) != op0
)
4477 else if (GET_CODE (op1
) == PLUS
4478 && (tem
= subst_indexed_address (op1
)) != op1
)
4483 /* Pick out up to three things to add. */
4484 if (GET_CODE (op1
) == PLUS
)
4485 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4486 else if (GET_CODE (op0
) == PLUS
)
4487 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4489 /* Compute the sum. */
4491 op1
= form_sum (op1
, op2
);
4493 op0
= form_sum (op0
, op1
);
4500 /* Record the pseudo registers we must reload into hard registers
4501 in a subexpression of a would-be memory address, X.
4502 (This function is not called if the address we find is strictly valid.)
4503 CONTEXT = 1 means we are considering regs as index regs,
4504 = 0 means we are considering them as base regs.
4506 OPNUM and TYPE specify the purpose of any reloads made.
4508 IND_LEVELS says how many levels of indirect addressing are
4509 supported at this point in the address.
4511 We return nonzero if X, as a whole, is reloaded or replaced. */
4513 /* Note that we take shortcuts assuming that no multi-reg machine mode
4514 occurs as part of an address.
4515 Also, this is not fully machine-customizable; it works for machines
4516 such as vaxes and 68000's and 32000's, but other possible machines
4517 could have addressing modes that this does not handle right. */
4520 find_reloads_address_1 (x
, context
, loc
, opnum
, type
, ind_levels
)
4525 enum reload_type type
;
4528 register RTX_CODE code
= GET_CODE (x
);
4534 register rtx orig_op0
= XEXP (x
, 0);
4535 register rtx orig_op1
= XEXP (x
, 1);
4536 register RTX_CODE code0
= GET_CODE (orig_op0
);
4537 register RTX_CODE code1
= GET_CODE (orig_op1
);
4538 register rtx op0
= orig_op0
;
4539 register rtx op1
= orig_op1
;
4541 if (GET_CODE (op0
) == SUBREG
)
4543 op0
= SUBREG_REG (op0
);
4544 code0
= GET_CODE (op0
);
4547 if (GET_CODE (op1
) == SUBREG
)
4549 op1
= SUBREG_REG (op1
);
4550 code1
= GET_CODE (op1
);
4553 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
4554 || code0
== ZERO_EXTEND
|| code1
== MEM
)
4556 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4558 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4562 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
4563 || code1
== ZERO_EXTEND
|| code0
== MEM
)
4565 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4567 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4571 else if (code0
== CONST_INT
|| code0
== CONST
4572 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
4573 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4576 else if (code1
== CONST_INT
|| code1
== CONST
4577 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
4578 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4581 else if (code0
== REG
&& code1
== REG
)
4583 if (REG_OK_FOR_INDEX_P (op0
)
4584 && REG_OK_FOR_BASE_P (op1
))
4586 else if (REG_OK_FOR_INDEX_P (op1
)
4587 && REG_OK_FOR_BASE_P (op0
))
4589 else if (REG_OK_FOR_BASE_P (op1
))
4590 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4592 else if (REG_OK_FOR_BASE_P (op0
))
4593 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4595 else if (REG_OK_FOR_INDEX_P (op1
))
4596 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4598 else if (REG_OK_FOR_INDEX_P (op0
))
4599 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4603 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4605 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4610 else if (code0
== REG
)
4612 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4614 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4618 else if (code1
== REG
)
4620 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4622 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4633 if (GET_CODE (XEXP (x
, 0)) == REG
)
4635 register int regno
= REGNO (XEXP (x
, 0));
4639 /* A register that is incremented cannot be constant! */
4640 if (regno
>= FIRST_PSEUDO_REGISTER
4641 && reg_equiv_constant
[regno
] != 0)
4644 /* Handle a register that is equivalent to a memory location
4645 which cannot be addressed directly. */
4646 if (reg_equiv_address
[regno
] != 0)
4648 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
4649 /* First reload the memory location's address. */
4650 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
4651 &XEXP (tem
, 0), opnum
, type
, ind_levels
);
4652 /* Put this inside a new increment-expression. */
4653 x
= gen_rtx (GET_CODE (x
), GET_MODE (x
), tem
);
4654 /* Proceed to reload that, as if it contained a register. */
4657 /* If we have a hard register that is ok as an index,
4658 don't make a reload. If an autoincrement of a nice register
4659 isn't "valid", it must be that no autoincrement is "valid".
4660 If that is true and something made an autoincrement anyway,
4661 this must be a special context where one is allowed.
4662 (For example, a "push" instruction.)
4663 We can't improve this address, so leave it alone. */
4665 /* Otherwise, reload the autoincrement into a suitable hard reg
4666 and record how much to increment by. */
4668 if (reg_renumber
[regno
] >= 0)
4669 regno
= reg_renumber
[regno
];
4670 if ((regno
>= FIRST_PSEUDO_REGISTER
4671 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4672 : REGNO_OK_FOR_BASE_P (regno
))))
4677 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4678 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4679 GET_MODE (x
), GET_MODE (x
), VOIDmode
, 0,
4681 reload_inc
[reloadnum
]
4682 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
4687 /* Update the REG_INC notes. */
4689 for (link
= REG_NOTES (this_insn
);
4690 link
; link
= XEXP (link
, 1))
4691 if (REG_NOTE_KIND (link
) == REG_INC
4692 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
4693 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4699 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
4701 /* This is probably the result of a substitution, by eliminate_regs,
4702 of an equivalent address for a pseudo that was not allocated to a
4703 hard register. Verify that the specified address is valid and
4704 reload it into a register. */
4705 rtx tem
= XEXP (x
, 0);
4709 /* Since we know we are going to reload this item, don't decrement
4710 for the indirection level.
4712 Note that this is actually conservative: it would be slightly
4713 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4715 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
4716 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
4717 opnum
, type
, ind_levels
);
4719 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4720 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4721 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4722 reload_inc
[reloadnum
]
4723 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
4725 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
4727 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4734 /* This is probably the result of a substitution, by eliminate_regs, of
4735 an equivalent address for a pseudo that was not allocated to a hard
4736 register. Verify that the specified address is valid and reload it
4739 Since we know we are going to reload this item, don't decrement for
4740 the indirection level.
4742 Note that this is actually conservative: it would be slightly more
4743 efficient to use the value of SPILL_INDIRECT_LEVELS from
4746 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
4747 opnum
, type
, ind_levels
);
4748 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
4749 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4750 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4755 register int regno
= REGNO (x
);
4757 if (reg_equiv_constant
[regno
] != 0)
4759 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
4760 (context
? INDEX_REG_CLASS
4762 GET_MODE (x
), opnum
, type
, ind_levels
);
4766 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4767 that feeds this insn. */
4768 if (reg_equiv_mem
[regno
] != 0)
4770 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
4771 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4772 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4777 if (reg_equiv_address
[regno
] != 0)
4779 x
= make_memloc (x
, regno
);
4780 find_reloads_address (GET_MODE (x
), 0, XEXP (x
, 0), &XEXP (x
, 0),
4781 opnum
, type
, ind_levels
);
4784 if (reg_renumber
[regno
] >= 0)
4785 regno
= reg_renumber
[regno
];
4787 if ((regno
>= FIRST_PSEUDO_REGISTER
4788 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4789 : REGNO_OK_FOR_BASE_P (regno
))))
4791 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4792 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4793 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4797 /* If a register appearing in an address is the subject of a CLOBBER
4798 in this insn, reload it into some other register to be safe.
4799 The CLOBBER is supposed to make the register unavailable
4800 from before this insn to after it. */
4801 if (regno_clobbered_p (regno
, this_insn
))
4803 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4804 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4805 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4812 /* If this is a SUBREG of a hard register and the resulting register is
4813 of the wrong class, reload the whole SUBREG. This avoids needless
4814 copies if SUBREG_REG is multi-word. */
4815 if (GET_CODE (SUBREG_REG (x
)) == REG
4816 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
4818 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
4820 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
4821 : REGNO_OK_FOR_BASE_P (regno
)))
4823 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4824 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4825 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4833 register char *fmt
= GET_RTX_FORMAT (code
);
4836 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4839 find_reloads_address_1 (XEXP (x
, i
), context
, &XEXP (x
, i
),
4840 opnum
, type
, ind_levels
);
4847 /* X, which is found at *LOC, is a part of an address that needs to be
4848 reloaded into a register of class CLASS. If X is a constant, or if
4849 X is a PLUS that contains a constant, check that the constant is a
4850 legitimate operand and that we are supposed to be able to load
4851 it into the register.
4853 If not, force the constant into memory and reload the MEM instead.
4855 MODE is the mode to use, in case X is an integer constant.
4857 OPNUM and TYPE describe the purpose of any reloads made.
4859 IND_LEVELS says how many levels of indirect addressing this machine
4863 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
4866 enum reg_class
class;
4867 enum machine_mode mode
;
4869 enum reload_type type
;
4873 && (! LEGITIMATE_CONSTANT_P (x
)
4874 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
4876 rtx tem
= x
= force_const_mem (mode
, x
);
4877 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
4878 opnum
, type
, ind_levels
);
4881 else if (GET_CODE (x
) == PLUS
4882 && CONSTANT_P (XEXP (x
, 1))
4883 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
4884 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
4886 rtx tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
4888 x
= gen_rtx (PLUS
, GET_MODE (x
), XEXP (x
, 0), tem
);
4889 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
4890 opnum
, type
, ind_levels
);
4893 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
4894 mode
, VOIDmode
, 0, 0, opnum
, type
);
4897 /* Substitute into the current INSN the registers into which we have reloaded
4898 the things that need reloading. The array `replacements'
4899 says contains the locations of all pointers that must be changed
4900 and says what to replace them with.
4902 Return the rtx that X translates into; usually X, but modified. */
4909 for (i
= 0; i
< n_replacements
; i
++)
4911 register struct replacement
*r
= &replacements
[i
];
4912 register rtx reloadreg
= reload_reg_rtx
[r
->what
];
4915 /* Encapsulate RELOADREG so its machine mode matches what
4916 used to be there. Note that gen_lowpart_common will
4917 do the wrong thing if RELOADREG is multi-word. RELOADREG
4918 will always be a REG here. */
4919 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
4920 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
4922 /* If we are putting this into a SUBREG and RELOADREG is a
4923 SUBREG, we would be making nested SUBREGs, so we have to fix
4924 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4926 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
4928 if (GET_MODE (*r
->subreg_loc
)
4929 == GET_MODE (SUBREG_REG (reloadreg
)))
4930 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
4933 *r
->where
= SUBREG_REG (reloadreg
);
4934 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
4938 *r
->where
= reloadreg
;
4940 /* If reload got no reg and isn't optional, something's wrong. */
4941 else if (! reload_optional
[r
->what
])
4946 /* Make a copy of any replacements being done into X and move those copies
4947 to locations in Y, a copy of X. We only look at the highest level of
4951 copy_replacements (x
, y
)
4956 enum rtx_code code
= GET_CODE (x
);
4957 char *fmt
= GET_RTX_FORMAT (code
);
4958 struct replacement
*r
;
4960 /* We can't support X being a SUBREG because we might then need to know its
4961 location if something inside it was replaced. */
4965 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4967 for (j
= 0; j
< n_replacements
; j
++)
4969 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
4971 r
= &replacements
[n_replacements
++];
4972 r
->where
= replacements
[j
].where
;
4973 r
->subreg_loc
= &XEXP (y
, i
);
4974 r
->what
= replacements
[j
].what
;
4975 r
->mode
= replacements
[j
].mode
;
4977 else if (replacements
[j
].where
== &XEXP (x
, i
))
4979 r
= &replacements
[n_replacements
++];
4980 r
->where
= &XEXP (y
, i
);
4982 r
->what
= replacements
[j
].what
;
4983 r
->mode
= replacements
[j
].mode
;
4988 /* If LOC was scheduled to be replaced by something, return the replacement.
4989 Otherwise, return *LOC. */
4992 find_replacement (loc
)
4995 struct replacement
*r
;
4997 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
4999 rtx reloadreg
= reload_reg_rtx
[r
->what
];
5001 if (reloadreg
&& r
->where
== loc
)
5003 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
5004 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
5008 else if (reloadreg
&& r
->subreg_loc
== loc
)
5010 /* RELOADREG must be either a REG or a SUBREG.
5012 ??? Is it actually still ever a SUBREG? If so, why? */
5014 if (GET_CODE (reloadreg
) == REG
)
5015 return gen_rtx (REG
, GET_MODE (*loc
),
5016 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
5017 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
5020 return gen_rtx (SUBREG
, GET_MODE (*loc
), SUBREG_REG (reloadreg
),
5021 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
5028 /* Return nonzero if register in range [REGNO, ENDREGNO)
5029 appears either explicitly or implicitly in X
5030 other than being stored into (except for earlyclobber operands).
5032 References contained within the substructure at LOC do not count.
5033 LOC may be zero, meaning don't ignore anything.
5035 This is similar to refers_to_regno_p in rtlanal.c except that we
5036 look at equivalences for pseudos that didn't get hard registers. */
5039 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
5040 int regno
, endregno
;
5045 register RTX_CODE code
;
5052 code
= GET_CODE (x
);
5059 /* If this is a pseudo, a hard register must not have been allocated.
5060 X must therefore either be a constant or be in memory. */
5061 if (i
>= FIRST_PSEUDO_REGISTER
)
5063 if (reg_equiv_memory_loc
[i
])
5064 return refers_to_regno_for_reload_p (regno
, endregno
,
5065 reg_equiv_memory_loc
[i
],
5068 if (reg_equiv_constant
[i
])
5074 return (endregno
> i
5075 && regno
< i
+ (i
< FIRST_PSEUDO_REGISTER
5076 ? HARD_REGNO_NREGS (i
, GET_MODE (x
))
5080 /* If this is a SUBREG of a hard reg, we can see exactly which
5081 registers are being modified. Otherwise, handle normally. */
5082 if (GET_CODE (SUBREG_REG (x
)) == REG
5083 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5085 int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5087 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
5088 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5090 return endregno
> inner_regno
&& regno
< inner_endregno
;
5096 if (&SET_DEST (x
) != loc
5097 /* Note setting a SUBREG counts as referring to the REG it is in for
5098 a pseudo but not for hard registers since we can
5099 treat each word individually. */
5100 && ((GET_CODE (SET_DEST (x
)) == SUBREG
5101 && loc
!= &SUBREG_REG (SET_DEST (x
))
5102 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
5103 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
5104 && refers_to_regno_for_reload_p (regno
, endregno
,
5105 SUBREG_REG (SET_DEST (x
)),
5107 /* If the ouput is an earlyclobber operand, this is
5109 || ((GET_CODE (SET_DEST (x
)) != REG
5110 || earlyclobber_operand_p (SET_DEST (x
)))
5111 && refers_to_regno_for_reload_p (regno
, endregno
,
5112 SET_DEST (x
), loc
))))
5115 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
5121 /* X does not match, so try its subexpressions. */
5123 fmt
= GET_RTX_FORMAT (code
);
5124 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5126 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
5134 if (refers_to_regno_for_reload_p (regno
, endregno
,
5138 else if (fmt
[i
] == 'E')
5141 for (j
= XVECLEN (x
, i
) - 1; j
>=0; j
--)
5142 if (loc
!= &XVECEXP (x
, i
, j
)
5143 && refers_to_regno_for_reload_p (regno
, endregno
,
5144 XVECEXP (x
, i
, j
), loc
))
5151 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5152 we check if any register number in X conflicts with the relevant register
5153 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5154 contains a MEM (we don't bother checking for memory addresses that can't
5155 conflict because we expect this to be a rare case.
5157 This function is similar to reg_overlap_mention_p in rtlanal.c except
5158 that we look at equivalences for pseudos that didn't get hard registers. */
5161 reg_overlap_mentioned_for_reload_p (x
, in
)
5164 int regno
, endregno
;
5166 if (GET_CODE (x
) == SUBREG
)
5168 regno
= REGNO (SUBREG_REG (x
));
5169 if (regno
< FIRST_PSEUDO_REGISTER
)
5170 regno
+= SUBREG_WORD (x
);
5172 else if (GET_CODE (x
) == REG
)
5176 /* If this is a pseudo, it must not have been assigned a hard register.
5177 Therefore, it must either be in memory or be a constant. */
5179 if (regno
>= FIRST_PSEUDO_REGISTER
)
5181 if (reg_equiv_memory_loc
[regno
])
5182 return refers_to_mem_for_reload_p (in
);
5183 else if (reg_equiv_constant
[regno
])
5188 else if (CONSTANT_P (x
))
5190 else if (GET_CODE (x
) == MEM
)
5191 return refers_to_mem_for_reload_p (in
);
5192 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
5193 || GET_CODE (x
) == CC0
)
5194 return reg_mentioned_p (x
, in
);
5198 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
5199 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5201 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
5204 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5208 refers_to_mem_for_reload_p (x
)
5214 if (GET_CODE (x
) == MEM
)
5217 if (GET_CODE (x
) == REG
)
5218 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
5219 && reg_equiv_memory_loc
[REGNO (x
)]);
5221 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
5222 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
5224 && (GET_CODE (XEXP (x
, i
)) == MEM
5225 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
5231 /* Check the insns before INSN to see if there is a suitable register
5232 containing the same value as GOAL.
5233 If OTHER is -1, look for a register in class CLASS.
5234 Otherwise, just see if register number OTHER shares GOAL's value.
5236 Return an rtx for the register found, or zero if none is found.
5238 If RELOAD_REG_P is (short *)1,
5239 we reject any hard reg that appears in reload_reg_rtx
5240 because such a hard reg is also needed coming into this insn.
5242 If RELOAD_REG_P is any other nonzero value,
5243 it is a vector indexed by hard reg number
5244 and we reject any hard reg whose element in the vector is nonnegative
5245 as well as any that appears in reload_reg_rtx.
5247 If GOAL is zero, then GOALREG is a register number; we look
5248 for an equivalent for that register.
5250 MODE is the machine mode of the value we want an equivalence for.
5251 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5253 This function is used by jump.c as well as in the reload pass.
5255 If GOAL is the sum of the stack pointer and a constant, we treat it
5256 as if it were a constant except that sp is required to be unchanging. */
5259 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
5262 enum reg_class
class;
5264 short *reload_reg_p
;
5266 enum machine_mode mode
;
5268 register rtx p
= insn
;
5269 rtx goaltry
, valtry
, value
, where
;
5271 register int regno
= -1;
5275 int goal_mem_addr_varies
= 0;
5276 int need_stable_sp
= 0;
5282 else if (GET_CODE (goal
) == REG
)
5283 regno
= REGNO (goal
);
5284 else if (GET_CODE (goal
) == MEM
)
5286 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
5287 if (MEM_VOLATILE_P (goal
))
5289 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
5291 /* An address with side effects must be reexecuted. */
5302 else if (CONSTANT_P (goal
))
5304 else if (GET_CODE (goal
) == PLUS
5305 && XEXP (goal
, 0) == stack_pointer_rtx
5306 && CONSTANT_P (XEXP (goal
, 1)))
5307 goal_const
= need_stable_sp
= 1;
5311 /* On some machines, certain regs must always be rejected
5312 because they don't behave the way ordinary registers do. */
5314 #ifdef OVERLAPPING_REGNO_P
5315 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5316 && OVERLAPPING_REGNO_P (regno
))
5320 /* Scan insns back from INSN, looking for one that copies
5321 a value into or out of GOAL.
5322 Stop and give up if we reach a label. */
5327 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
5329 if (GET_CODE (p
) == INSN
5330 /* If we don't want spill regs ... */
5331 && (! (reload_reg_p
!= 0
5332 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
5333 /* ... then ignore insns introduced by reload; they aren't useful
5334 and can cause results in reload_as_needed to be different
5335 from what they were when calculating the need for spills.
5336 If we notice an input-reload insn here, we will reject it below,
5337 but it might hide a usable equivalent. That makes bad code.
5338 It may even abort: perhaps no reg was spilled for this insn
5339 because it was assumed we would find that equivalent. */
5340 || INSN_UID (p
) < reload_first_uid
))
5343 pat
= single_set (p
);
5344 /* First check for something that sets some reg equal to GOAL. */
5347 && true_regnum (SET_SRC (pat
)) == regno
5348 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5351 && true_regnum (SET_DEST (pat
)) == regno
5352 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
5354 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
5355 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5357 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
5358 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
5360 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
5361 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
5362 /* If we are looking for a constant,
5363 and something equivalent to that constant was copied
5364 into a reg, we can use that reg. */
5365 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5367 && rtx_equal_p (XEXP (tem
, 0), goal
)
5368 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5369 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5371 && GET_CODE (SET_DEST (pat
)) == REG
5372 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5373 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5374 && GET_CODE (goal
) == CONST_INT
5375 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 0, 0,
5377 && rtx_equal_p (goal
, goaltry
)
5378 && (valtry
= operand_subword (SET_DEST (pat
), 0, 0,
5380 && (valueno
= true_regnum (valtry
)) >= 0)
5381 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5383 && GET_CODE (SET_DEST (pat
)) == REG
5384 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5385 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5386 && GET_CODE (goal
) == CONST_INT
5387 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
5389 && rtx_equal_p (goal
, goaltry
)
5391 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
5392 && (valueno
= true_regnum (valtry
)) >= 0)))
5395 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
5396 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
5406 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5407 (or copying VALUE into GOAL, if GOAL is also a register).
5408 Now verify that VALUE is really valid. */
5410 /* VALUENO is the register number of VALUE; a hard register. */
5412 /* Don't try to re-use something that is killed in this insn. We want
5413 to be able to trust REG_UNUSED notes. */
5414 if (find_reg_note (where
, REG_UNUSED
, value
))
5417 /* If we propose to get the value from the stack pointer or if GOAL is
5418 a MEM based on the stack pointer, we need a stable SP. */
5419 if (valueno
== STACK_POINTER_REGNUM
5420 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
5424 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5425 if (GET_MODE (value
) != mode
)
5428 /* Reject VALUE if it was loaded from GOAL
5429 and is also a register that appears in the address of GOAL. */
5431 if (goal_mem
&& value
== SET_DEST (PATTERN (where
))
5432 && refers_to_regno_for_reload_p (valueno
,
5434 + HARD_REGNO_NREGS (valueno
, mode
)),
5438 /* Reject registers that overlap GOAL. */
5440 if (!goal_mem
&& !goal_const
5441 && regno
+ HARD_REGNO_NREGS (regno
, mode
) > valueno
5442 && regno
< valueno
+ HARD_REGNO_NREGS (valueno
, mode
))
5445 /* Reject VALUE if it is one of the regs reserved for reloads.
5446 Reload1 knows how to reuse them anyway, and it would get
5447 confused if we allocated one without its knowledge.
5448 (Now that insns introduced by reload are ignored above,
5449 this case shouldn't happen, but I'm not positive.) */
5451 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1
5452 && reload_reg_p
[valueno
] >= 0)
5455 /* On some machines, certain regs must always be rejected
5456 because they don't behave the way ordinary registers do. */
5458 #ifdef OVERLAPPING_REGNO_P
5459 if (OVERLAPPING_REGNO_P (valueno
))
5463 nregs
= HARD_REGNO_NREGS (regno
, mode
);
5464 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
5466 /* Reject VALUE if it is a register being used for an input reload
5467 even if it is not one of those reserved. */
5469 if (reload_reg_p
!= 0)
5472 for (i
= 0; i
< n_reloads
; i
++)
5473 if (reload_reg_rtx
[i
] != 0 && reload_in
[i
])
5475 int regno1
= REGNO (reload_reg_rtx
[i
]);
5476 int nregs1
= HARD_REGNO_NREGS (regno1
,
5477 GET_MODE (reload_reg_rtx
[i
]));
5478 if (regno1
< valueno
+ valuenregs
5479 && regno1
+ nregs1
> valueno
)
5485 /* We must treat frame pointer as varying here,
5486 since it can vary--in a nonlocal goto as generated by expand_goto. */
5487 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
5489 /* Now verify that the values of GOAL and VALUE remain unaltered
5490 until INSN is reached. */
5499 /* Don't trust the conversion past a function call
5500 if either of the two is in a call-clobbered register, or memory. */
5501 if (GET_CODE (p
) == CALL_INSN
5502 && ((regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5503 && call_used_regs
[regno
])
5505 (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5506 && call_used_regs
[valueno
])
5512 #ifdef INSN_CLOBBERS_REGNO_P
5513 if ((valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5514 && INSN_CLOBBERS_REGNO_P (p
, valueno
))
5515 || (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5516 && INSN_CLOBBERS_REGNO_P (p
, regno
)))
5520 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
5522 /* If this insn P stores in either GOAL or VALUE, return 0.
5523 If GOAL is a memory ref and this insn writes memory, return 0.
5524 If GOAL is a memory ref and its address is not constant,
5525 and this insn P changes a register used in GOAL, return 0. */
5528 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
5530 register rtx dest
= SET_DEST (pat
);
5531 while (GET_CODE (dest
) == SUBREG
5532 || GET_CODE (dest
) == ZERO_EXTRACT
5533 || GET_CODE (dest
) == SIGN_EXTRACT
5534 || GET_CODE (dest
) == STRICT_LOW_PART
)
5535 dest
= XEXP (dest
, 0);
5536 if (GET_CODE (dest
) == REG
)
5538 register int xregno
= REGNO (dest
);
5540 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5541 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5544 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
5546 if (xregno
< valueno
+ valuenregs
5547 && xregno
+ xnregs
> valueno
)
5549 if (goal_mem_addr_varies
5550 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
5553 else if (goal_mem
&& GET_CODE (dest
) == MEM
5554 && ! push_operand (dest
, GET_MODE (dest
)))
5556 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
5559 else if (GET_CODE (pat
) == PARALLEL
)
5562 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
5564 register rtx v1
= XVECEXP (pat
, 0, i
);
5565 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
5567 register rtx dest
= SET_DEST (v1
);
5568 while (GET_CODE (dest
) == SUBREG
5569 || GET_CODE (dest
) == ZERO_EXTRACT
5570 || GET_CODE (dest
) == SIGN_EXTRACT
5571 || GET_CODE (dest
) == STRICT_LOW_PART
)
5572 dest
= XEXP (dest
, 0);
5573 if (GET_CODE (dest
) == REG
)
5575 register int xregno
= REGNO (dest
);
5577 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5578 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5581 if (xregno
< regno
+ nregs
5582 && xregno
+ xnregs
> regno
)
5584 if (xregno
< valueno
+ valuenregs
5585 && xregno
+ xnregs
> valueno
)
5587 if (goal_mem_addr_varies
5588 && reg_overlap_mentioned_for_reload_p (dest
,
5592 else if (goal_mem
&& GET_CODE (dest
) == MEM
5593 && ! push_operand (dest
, GET_MODE (dest
)))
5595 else if (need_stable_sp
5596 && push_operand (dest
, GET_MODE (dest
)))
5602 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
5606 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
5607 link
= XEXP (link
, 1))
5609 pat
= XEXP (link
, 0);
5610 if (GET_CODE (pat
) == CLOBBER
)
5612 register rtx dest
= SET_DEST (pat
);
5613 while (GET_CODE (dest
) == SUBREG
5614 || GET_CODE (dest
) == ZERO_EXTRACT
5615 || GET_CODE (dest
) == SIGN_EXTRACT
5616 || GET_CODE (dest
) == STRICT_LOW_PART
)
5617 dest
= XEXP (dest
, 0);
5618 if (GET_CODE (dest
) == REG
)
5620 register int xregno
= REGNO (dest
);
5622 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5623 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5626 if (xregno
< regno
+ nregs
5627 && xregno
+ xnregs
> regno
)
5629 if (xregno
< valueno
+ valuenregs
5630 && xregno
+ xnregs
> valueno
)
5632 if (goal_mem_addr_varies
5633 && reg_overlap_mentioned_for_reload_p (dest
,
5637 else if (goal_mem
&& GET_CODE (dest
) == MEM
5638 && ! push_operand (dest
, GET_MODE (dest
)))
5640 else if (need_stable_sp
5641 && push_operand (dest
, GET_MODE (dest
)))
5648 /* If this insn auto-increments or auto-decrements
5649 either regno or valueno, return 0 now.
5650 If GOAL is a memory ref and its address is not constant,
5651 and this insn P increments a register used in GOAL, return 0. */
5655 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
5656 if (REG_NOTE_KIND (link
) == REG_INC
5657 && GET_CODE (XEXP (link
, 0)) == REG
)
5659 register int incno
= REGNO (XEXP (link
, 0));
5660 if (incno
< regno
+ nregs
&& incno
>= regno
)
5662 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
5664 if (goal_mem_addr_varies
5665 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
5675 /* Find a place where INCED appears in an increment or decrement operator
5676 within X, and return the amount INCED is incremented or decremented by.
5677 The value is always positive. */
5680 find_inc_amount (x
, inced
)
5683 register enum rtx_code code
= GET_CODE (x
);
5689 register rtx addr
= XEXP (x
, 0);
5690 if ((GET_CODE (addr
) == PRE_DEC
5691 || GET_CODE (addr
) == POST_DEC
5692 || GET_CODE (addr
) == PRE_INC
5693 || GET_CODE (addr
) == POST_INC
)
5694 && XEXP (addr
, 0) == inced
)
5695 return GET_MODE_SIZE (GET_MODE (x
));
5698 fmt
= GET_RTX_FORMAT (code
);
5699 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5703 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
5710 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
5712 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
5722 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5725 regno_clobbered_p (regno
, insn
)
5729 if (GET_CODE (PATTERN (insn
)) == CLOBBER
5730 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
5731 return REGNO (XEXP (PATTERN (insn
), 0)) == regno
;
5733 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
5735 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
5739 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
5740 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
5741 && REGNO (XEXP (elt
, 0)) == regno
)
5749 static char *reload_when_needed_name
[] =
5752 "RELOAD_FOR_OUTPUT",
5754 "RELOAD_FOR_INPUT_ADDRESS",
5755 "RELOAD_FOR_OUTPUT_ADDRESS",
5756 "RELOAD_FOR_OPERAND_ADDRESS",
5757 "RELOAD_FOR_OPADDR_ADDR",
5759 "RELOAD_FOR_OTHER_ADDRESS"
5762 static char *reg_class_names
[] = REG_CLASS_NAMES
;
5764 /* This function is used to print the variables set by 'find_reloads' */
5771 fprintf (stderr
, "\nn_reloads = %d\n", n_reloads
);
5773 for (r
= 0; r
< n_reloads
; r
++)
5775 fprintf (stderr
, "\nRELOAD %d\n", r
);
5779 fprintf (stderr
, "\nreload_in (%s) = ",
5780 GET_MODE_NAME (reload_inmode
[r
]));
5781 debug_rtx (reload_in
[r
]);
5786 fprintf (stderr
, "\nreload_out (%s) = ",
5787 GET_MODE_NAME (reload_outmode
[r
]));
5788 debug_rtx (reload_out
[r
]);
5791 fprintf (stderr
, "%s, ", reg_class_names
[(int) reload_reg_class
[r
]]);
5793 fprintf (stderr
, "%s (opnum = %d)",
5794 reload_when_needed_name
[(int)reload_when_needed
[r
]],
5797 if (reload_optional
[r
])
5798 fprintf (stderr
, ", optional");
5801 fprintf (stderr
, ", inc by %d\n", reload_inc
[r
]);
5803 if (reload_nocombine
[r
])
5804 fprintf (stderr
, ", can combine", reload_nocombine
[r
]);
5806 if (reload_secondary_p
[r
])
5807 fprintf (stderr
, ", secondary_reload_p");
5809 if (reload_in_reg
[r
])
5811 fprintf (stderr
, "\nreload_in_reg:\t\t\t");
5812 debug_rtx (reload_in_reg
[r
]);
5815 if (reload_reg_rtx
[r
])
5817 fprintf (stderr
, "\nreload_reg_rtx:\t\t\t");
5818 debug_rtx (reload_reg_rtx
[r
]);
5821 if (reload_secondary_in_reload
[r
] != -1)
5823 fprintf (stderr
, "\nsecondary_in_reload = ");
5824 fprintf (stderr
, "%d ", reload_secondary_in_reload
[r
]);
5827 if (reload_secondary_out_reload
[r
] != -1)
5829 if (reload_secondary_in_reload
[r
] != -1)
5830 fprintf (stderr
, ", secondary_out_reload = ");
5832 fprintf (stderr
, "\nsecondary_out_reload = ");
5834 fprintf (stderr
, "%d", reload_secondary_out_reload
[r
]);
5838 if (reload_secondary_in_icode
[r
] != CODE_FOR_nothing
)
5840 fprintf (stderr
, "\nsecondary_in_icode = ");
5841 fprintf (stderr
, "%s", insn_name
[r
]);
5844 if (reload_secondary_out_icode
[r
] != CODE_FOR_nothing
)
5846 if (reload_secondary_in_icode
[r
] != CODE_FOR_nothing
)
5847 fprintf (stderr
, ", secondary_out_icode = ");
5849 fprintf (stderr
, "\nsecondary_out_icode = ");
5851 fprintf (stderr
, "%s ", insn_name
[r
]);
5853 fprintf (stderr
, "\n");
5856 fprintf (stderr
, "\n");