1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 88, 89, 92, 93, 1994 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "insn-config.h"
92 #include "insn-codes.h"
96 #include "hard-reg-set.h"
100 #ifndef REGISTER_MOVE_COST
101 #define REGISTER_MOVE_COST(x, y) 2
104 /* The variables set up by `find_reloads' are:
106 n_reloads number of distinct reloads needed; max reload # + 1
107 tables indexed by reload number
108 reload_in rtx for value to reload from
109 reload_out rtx for where to store reload-reg afterward if nec
110 (often the same as reload_in)
111 reload_reg_class enum reg_class, saying what regs to reload into
112 reload_inmode enum machine_mode; mode this operand should have
113 when reloaded, on input.
114 reload_outmode enum machine_mode; mode this operand should have
115 when reloaded, on output.
116 reload_optional char, nonzero for an optional reload.
117 Optional reloads are ignored unless the
118 value is already sitting in a register.
119 reload_inc int, positive amount to increment or decrement by if
120 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
121 Ignored otherwise (don't assume it is zero).
122 reload_in_reg rtx. A reg for which reload_in is the equivalent.
123 If reload_in is a symbol_ref which came from
124 reg_equiv_constant, then this is the pseudo
125 which has that symbol_ref as equivalent.
126 reload_reg_rtx rtx. This is the register to reload into.
127 If it is zero when `find_reloads' returns,
128 you must find a suitable register in the class
129 specified by reload_reg_class, and store here
130 an rtx for that register with mode from
131 reload_inmode or reload_outmode.
132 reload_nocombine char, nonzero if this reload shouldn't be
133 combined with another reload.
134 reload_opnum int, operand number being reloaded. This is
135 used to group related reloads and need not always
136 be equal to the actual operand number in the insn,
137 though it current will be; for in-out operands, it
138 is one of the two operand numbers.
139 reload_when_needed enum, classifies reload as needed either for
140 addressing an input reload, addressing an output,
141 for addressing a non-reloaded mem ref,
142 or for unspecified purposes (i.e., more than one
144 reload_secondary_p int, 1 if this is a secondary register for one
146 reload_secondary_in_reload
147 reload_secondary_out_reload
148 int, gives the reload number of a secondary
149 reload, when needed; otherwise -1
150 reload_secondary_in_icode
151 reload_secondary_out_icode
152 enum insn_code, if a secondary reload is required,
153 gives the INSN_CODE that uses the secondary
154 reload as a scratch register, or CODE_FOR_nothing
155 if the secondary reload register is to be an
156 intermediate register. */
159 rtx reload_in
[MAX_RELOADS
];
160 rtx reload_out
[MAX_RELOADS
];
161 enum reg_class reload_reg_class
[MAX_RELOADS
];
162 enum machine_mode reload_inmode
[MAX_RELOADS
];
163 enum machine_mode reload_outmode
[MAX_RELOADS
];
164 rtx reload_reg_rtx
[MAX_RELOADS
];
165 char reload_optional
[MAX_RELOADS
];
166 int reload_inc
[MAX_RELOADS
];
167 rtx reload_in_reg
[MAX_RELOADS
];
168 char reload_nocombine
[MAX_RELOADS
];
169 int reload_opnum
[MAX_RELOADS
];
170 enum reload_type reload_when_needed
[MAX_RELOADS
];
171 int reload_secondary_p
[MAX_RELOADS
];
172 int reload_secondary_in_reload
[MAX_RELOADS
];
173 int reload_secondary_out_reload
[MAX_RELOADS
];
174 enum insn_code reload_secondary_in_icode
[MAX_RELOADS
];
175 enum insn_code reload_secondary_out_icode
[MAX_RELOADS
];
177 /* All the "earlyclobber" operands of the current insn
178 are recorded here. */
180 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
182 int reload_n_operands
;
184 /* Replacing reloads.
186 If `replace_reloads' is nonzero, then as each reload is recorded
187 an entry is made for it in the table `replacements'.
188 Then later `subst_reloads' can look through that table and
189 perform all the replacements needed. */
191 /* Nonzero means record the places to replace. */
192 static int replace_reloads
;
194 /* Each replacement is recorded with a structure like this. */
197 rtx
*where
; /* Location to store in */
198 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
199 a SUBREG; 0 otherwise. */
200 int what
; /* which reload this is for */
201 enum machine_mode mode
; /* mode it must have */
204 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
206 /* Number of replacements currently recorded. */
207 static int n_replacements
;
209 /* Used to track what is modified by an operand. */
212 int reg_flag
; /* Nonzero if referencing a register. */
213 int safe
; /* Nonzero if this can't conflict with anything. */
214 rtx base
; /* Base adddress for MEM. */
215 HOST_WIDE_INT start
; /* Starting offset or register number. */
216 HOST_WIDE_INT end
; /* Endinf offset or register number. */
219 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
220 (see reg_equiv_address). */
221 static rtx memlocs
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
222 static int n_memlocs
;
224 #ifdef SECONDARY_MEMORY_NEEDED
226 /* Save MEMs needed to copy from one class of registers to another. One MEM
227 is used per mode, but normally only one or two modes are ever used.
229 We keep two versions, before and after register elimination. The one
230 after register elimination is record separately for each operand. This
231 is done in case the address is not valid to be sure that we separately
234 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
235 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
238 /* The instruction we are doing reloads for;
239 so we can test whether a register dies in it. */
240 static rtx this_insn
;
242 /* Nonzero if this instruction is a user-specified asm with operands. */
243 static int this_insn_is_asm
;
245 /* If hard_regs_live_known is nonzero,
246 we can tell which hard regs are currently live,
247 at least enough to succeed in choosing dummy reloads. */
248 static int hard_regs_live_known
;
250 /* Indexed by hard reg number,
251 element is nonegative if hard reg has been spilled.
252 This vector is passed to `find_reloads' as an argument
253 and is not changed here. */
254 static short *static_reload_reg_p
;
256 /* Set to 1 in subst_reg_equivs if it changes anything. */
257 static int subst_reg_equivs_changed
;
259 /* On return from push_reload, holds the reload-number for the OUT
260 operand, which can be different for that from the input operand. */
261 static int output_reloadnum
;
263 /* Compare two RTX's. */
264 #define MATCHES(x, y) \
265 (x == y || (x != 0 && (GET_CODE (x) == REG \
266 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
267 : rtx_equal_p (x, y) && ! side_effects_p (x))))
269 /* Indicates if two reloads purposes are for similar enough things that we
270 can merge their reloads. */
271 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
272 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
273 || ((when1) == (when2) && (op1) == (op2)) \
274 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
275 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
276 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
277 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
278 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
280 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
281 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
282 ((when1) != (when2) \
283 || ! ((op1) == (op2) \
284 || (when1) == RELOAD_FOR_INPUT \
285 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
286 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
288 static int push_secondary_reload
PROTO((int, rtx
, int, int, enum reg_class
,
289 enum machine_mode
, enum reload_type
,
291 static int push_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
292 enum machine_mode
, enum machine_mode
,
293 int, int, int, enum reload_type
));
294 static void push_replacement
PROTO((rtx
*, int, enum machine_mode
));
295 static void combine_reloads
PROTO((void));
296 static rtx find_dummy_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*,
297 enum machine_mode
, enum machine_mode
,
298 enum reg_class
, int));
299 static int earlyclobber_operand_p
PROTO((rtx
));
300 static int hard_reg_set_here_p
PROTO((int, int, rtx
));
301 static struct decomposition decompose
PROTO((rtx
));
302 static int immune_p
PROTO((rtx
, rtx
, struct decomposition
));
303 static int alternative_allows_memconst
PROTO((char *, int));
304 static rtx find_reloads_toplev
PROTO((rtx
, int, enum reload_type
, int, int));
305 static rtx make_memloc
PROTO((rtx
, int));
306 static int find_reloads_address
PROTO((enum machine_mode
, rtx
*, rtx
, rtx
*,
307 int, enum reload_type
, int));
308 static rtx subst_reg_equivs
PROTO((rtx
));
309 static rtx subst_indexed_address
PROTO((rtx
));
310 static int find_reloads_address_1
PROTO((rtx
, int, rtx
*, int,
311 enum reload_type
,int));
312 static void find_reloads_address_part
PROTO((rtx
, rtx
*, enum reg_class
,
313 enum machine_mode
, int,
314 enum reload_type
, int));
315 static int find_inc_amount
PROTO((rtx
, rtx
));
317 #ifdef HAVE_SECONDARY_RELOADS
319 /* Determine if any secondary reloads are needed for loading (if IN_P is
320 non-zero) or storing (if IN_P is zero) X to or from a reload register of
321 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
322 are needed, push them.
324 Return the reload number of the secondary reload we made, or -1 if
325 we didn't need one. *PICODE is set to the insn_code to use if we do
326 need a secondary reload. */
329 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
335 enum reg_class reload_class
;
336 enum machine_mode reload_mode
;
337 enum reload_type type
;
338 enum insn_code
*picode
;
340 enum reg_class
class = NO_REGS
;
341 enum machine_mode mode
= reload_mode
;
342 enum insn_code icode
= CODE_FOR_nothing
;
343 enum reg_class t_class
= NO_REGS
;
344 enum machine_mode t_mode
= VOIDmode
;
345 enum insn_code t_icode
= CODE_FOR_nothing
;
346 enum reload_type secondary_type
;
348 int s_reload
, t_reload
= -1;
350 if (type
== RELOAD_FOR_INPUT_ADDRESS
|| type
== RELOAD_FOR_OUTPUT_ADDRESS
)
351 secondary_type
= type
;
353 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
355 *picode
= CODE_FOR_nothing
;
357 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
358 is still a pseudo-register by now, it *must* have an equivalent MEM
359 but we don't want to assume that), use that equivalent when seeing if
360 a secondary reload is needed since whether or not a reload is needed
361 might be sensitive to the form of the MEM. */
363 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
364 && reg_equiv_mem
[REGNO (x
)] != 0)
365 x
= reg_equiv_mem
[REGNO (x
)];
367 #ifdef SECONDARY_INPUT_RELOAD_CLASS
369 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
372 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
374 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
377 /* If we don't need any secondary registers, done. */
378 if (class == NO_REGS
)
381 /* Get a possible insn to use. If the predicate doesn't accept X, don't
384 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
385 : reload_out_optab
[(int) reload_mode
]);
387 if (icode
!= CODE_FOR_nothing
388 && insn_operand_predicate
[(int) icode
][in_p
]
389 && (! (insn_operand_predicate
[(int) icode
][in_p
]) (x
, reload_mode
)))
390 icode
= CODE_FOR_nothing
;
392 /* If we will be using an insn, see if it can directly handle the reload
393 register we will be using. If it can, the secondary reload is for a
394 scratch register. If it can't, we will use the secondary reload for
395 an intermediate register and require a tertiary reload for the scratch
398 if (icode
!= CODE_FOR_nothing
)
400 /* If IN_P is non-zero, the reload register will be the output in
401 operand 0. If IN_P is zero, the reload register will be the input
402 in operand 1. Outputs should have an initial "=", which we must
405 char insn_letter
= insn_operand_constraint
[(int) icode
][!in_p
][in_p
];
406 enum reg_class insn_class
407 = (insn_letter
== 'r' ? GENERAL_REGS
408 : REG_CLASS_FROM_LETTER (insn_letter
));
410 if (insn_class
== NO_REGS
411 || (in_p
&& insn_operand_constraint
[(int) icode
][!in_p
][0] != '=')
412 /* The scratch register's constraint must start with "=&". */
413 || insn_operand_constraint
[(int) icode
][2][0] != '='
414 || insn_operand_constraint
[(int) icode
][2][1] != '&')
417 if (reg_class_subset_p (reload_class
, insn_class
))
418 mode
= insn_operand_mode
[(int) icode
][2];
421 char t_letter
= insn_operand_constraint
[(int) icode
][2][2];
423 t_mode
= insn_operand_mode
[(int) icode
][2];
424 t_class
= (t_letter
== 'r' ? GENERAL_REGS
425 : REG_CLASS_FROM_LETTER (t_letter
));
427 icode
= CODE_FOR_nothing
;
431 /* This case isn't valid, so fail. Reload is allowed to use the same
432 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
433 in the case of a secondary register, we actually need two different
434 registers for correct code. We fail here to prevent the possibility of
435 silently generating incorrect code later.
437 The convention is that secondary input reloads are valid only if the
438 secondary_class is different from class. If you have such a case, you
439 can not use secondary reloads, you must work around the problem some
442 Allow this when MODE is not reload_mode and assume that the generated
443 code handles this case (it does on the Alpha, which is the only place
444 this currently happens). */
446 if (in_p
&& class == reload_class
&& mode
== reload_mode
)
449 /* If we need a tertiary reload, see if we have one we can reuse or else
452 if (t_class
!= NO_REGS
)
454 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
455 if (reload_secondary_p
[t_reload
]
456 && (reg_class_subset_p (t_class
, reload_reg_class
[t_reload
])
457 || reg_class_subset_p (reload_reg_class
[t_reload
], t_class
))
458 && ((in_p
&& reload_inmode
[t_reload
] == t_mode
)
459 || (! in_p
&& reload_outmode
[t_reload
] == t_mode
))
460 && ((in_p
&& (reload_secondary_in_icode
[t_reload
]
461 == CODE_FOR_nothing
))
462 || (! in_p
&&(reload_secondary_out_icode
[t_reload
]
463 == CODE_FOR_nothing
)))
464 && (reg_class_size
[(int) t_class
] == 1
465 #ifdef SMALL_REGISTER_CLASSES
469 && MERGABLE_RELOADS (secondary_type
,
470 reload_when_needed
[t_reload
],
471 opnum
, reload_opnum
[t_reload
]))
474 reload_inmode
[t_reload
] = t_mode
;
476 reload_outmode
[t_reload
] = t_mode
;
478 if (reg_class_subset_p (t_class
, reload_reg_class
[t_reload
]))
479 reload_reg_class
[t_reload
] = t_class
;
481 reload_opnum
[t_reload
] = MIN (reload_opnum
[t_reload
], opnum
);
482 reload_optional
[t_reload
] &= optional
;
483 reload_secondary_p
[t_reload
] = 1;
484 if (MERGE_TO_OTHER (secondary_type
, reload_when_needed
[t_reload
],
485 opnum
, reload_opnum
[t_reload
]))
486 reload_when_needed
[t_reload
] = RELOAD_OTHER
;
489 if (t_reload
== n_reloads
)
491 /* We need to make a new tertiary reload for this register class. */
492 reload_in
[t_reload
] = reload_out
[t_reload
] = 0;
493 reload_reg_class
[t_reload
] = t_class
;
494 reload_inmode
[t_reload
] = in_p
? t_mode
: VOIDmode
;
495 reload_outmode
[t_reload
] = ! in_p
? t_mode
: VOIDmode
;
496 reload_reg_rtx
[t_reload
] = 0;
497 reload_optional
[t_reload
] = optional
;
498 reload_inc
[t_reload
] = 0;
499 /* Maybe we could combine these, but it seems too tricky. */
500 reload_nocombine
[t_reload
] = 1;
501 reload_in_reg
[t_reload
] = 0;
502 reload_opnum
[t_reload
] = opnum
;
503 reload_when_needed
[t_reload
] = secondary_type
;
504 reload_secondary_in_reload
[t_reload
] = -1;
505 reload_secondary_out_reload
[t_reload
] = -1;
506 reload_secondary_in_icode
[t_reload
] = CODE_FOR_nothing
;
507 reload_secondary_out_icode
[t_reload
] = CODE_FOR_nothing
;
508 reload_secondary_p
[t_reload
] = 1;
514 /* See if we can reuse an existing secondary reload. */
515 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
516 if (reload_secondary_p
[s_reload
]
517 && (reg_class_subset_p (class, reload_reg_class
[s_reload
])
518 || reg_class_subset_p (reload_reg_class
[s_reload
], class))
519 && ((in_p
&& reload_inmode
[s_reload
] == mode
)
520 || (! in_p
&& reload_outmode
[s_reload
] == mode
))
521 && ((in_p
&& reload_secondary_in_reload
[s_reload
] == t_reload
)
522 || (! in_p
&& reload_secondary_out_reload
[s_reload
] == t_reload
))
523 && ((in_p
&& reload_secondary_in_icode
[s_reload
] == t_icode
)
524 || (! in_p
&& reload_secondary_out_icode
[s_reload
] == t_icode
))
525 && (reg_class_size
[(int) class] == 1
526 #ifdef SMALL_REGISTER_CLASSES
530 && MERGABLE_RELOADS (secondary_type
, reload_when_needed
[s_reload
],
531 opnum
, reload_opnum
[s_reload
]))
534 reload_inmode
[s_reload
] = mode
;
536 reload_outmode
[s_reload
] = mode
;
538 if (reg_class_subset_p (class, reload_reg_class
[s_reload
]))
539 reload_reg_class
[s_reload
] = class;
541 reload_opnum
[s_reload
] = MIN (reload_opnum
[s_reload
], opnum
);
542 reload_optional
[s_reload
] &= optional
;
543 reload_secondary_p
[s_reload
] = 1;
544 if (MERGE_TO_OTHER (secondary_type
, reload_when_needed
[s_reload
],
545 opnum
, reload_opnum
[s_reload
]))
546 reload_when_needed
[s_reload
] = RELOAD_OTHER
;
549 if (s_reload
== n_reloads
)
551 /* We need to make a new secondary reload for this register class. */
552 reload_in
[s_reload
] = reload_out
[s_reload
] = 0;
553 reload_reg_class
[s_reload
] = class;
555 reload_inmode
[s_reload
] = in_p
? mode
: VOIDmode
;
556 reload_outmode
[s_reload
] = ! in_p
? mode
: VOIDmode
;
557 reload_reg_rtx
[s_reload
] = 0;
558 reload_optional
[s_reload
] = optional
;
559 reload_inc
[s_reload
] = 0;
560 /* Maybe we could combine these, but it seems too tricky. */
561 reload_nocombine
[s_reload
] = 1;
562 reload_in_reg
[s_reload
] = 0;
563 reload_opnum
[s_reload
] = opnum
;
564 reload_when_needed
[s_reload
] = secondary_type
;
565 reload_secondary_in_reload
[s_reload
] = in_p
? t_reload
: -1;
566 reload_secondary_out_reload
[s_reload
] = ! in_p
? t_reload
: -1;
567 reload_secondary_in_icode
[s_reload
] = in_p
? t_icode
: CODE_FOR_nothing
;
568 reload_secondary_out_icode
[s_reload
]
569 = ! in_p
? t_icode
: CODE_FOR_nothing
;
570 reload_secondary_p
[s_reload
] = 1;
574 #ifdef SECONDARY_MEMORY_NEEDED
575 /* If we need a memory location to copy between the two reload regs,
578 if (in_p
&& icode
== CODE_FOR_nothing
579 && SECONDARY_MEMORY_NEEDED (class, reload_class
, reload_mode
))
580 get_secondary_mem (x
, reload_mode
, opnum
, type
);
582 if (! in_p
&& icode
== CODE_FOR_nothing
583 && SECONDARY_MEMORY_NEEDED (reload_class
, class, reload_mode
))
584 get_secondary_mem (x
, reload_mode
, opnum
, type
);
591 #endif /* HAVE_SECONDARY_RELOADS */
593 #ifdef SECONDARY_MEMORY_NEEDED
595 /* Return a memory location that will be used to copy X in mode MODE.
596 If we haven't already made a location for this mode in this insn,
597 call find_reloads_address on the location being returned. */
600 get_secondary_mem (x
, mode
, opnum
, type
)
602 enum machine_mode mode
;
604 enum reload_type type
;
609 /* By default, if MODE is narrower than a word, widen it to a word.
610 This is required because most machines that require these memory
611 locations do not support short load and stores from all registers
612 (e.g., FP registers). */
614 #ifdef SECONDARY_MEMORY_NEEDED_MODE
615 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
617 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
618 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
621 /* If we already have made a MEM for this operand in MODE, return it. */
622 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
623 return secondary_memlocs_elim
[(int) mode
][opnum
];
625 /* If this is the first time we've tried to get a MEM for this mode,
626 allocate a new one. `something_changed' in reload will get set
627 by noticing that the frame size has changed. */
629 if (secondary_memlocs
[(int) mode
] == 0)
631 #ifdef SECONDARY_MEMORY_NEEDED_RTX
632 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
634 secondary_memlocs
[(int) mode
]
635 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
639 /* Get a version of the address doing any eliminations needed. If that
640 didn't give us a new MEM, make a new one if it isn't valid. */
642 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
643 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
645 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
646 loc
= copy_rtx (loc
);
648 /* The only time the call below will do anything is if the stack
649 offset is too large. In that case IND_LEVELS doesn't matter, so we
650 can just pass a zero. Adjust the type to be the address of the
651 corresponding object. If the address was valid, save the eliminated
652 address. If it wasn't valid, we need to make a reload each time, so
657 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
658 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
661 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
665 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
669 /* Clear any secondary memory locations we've made. */
672 clear_secondary_mem ()
674 bzero ((char *) secondary_memlocs
, sizeof secondary_memlocs
);
676 #endif /* SECONDARY_MEMORY_NEEDED */
678 /* Record one reload that needs to be performed.
679 IN is an rtx saying where the data are to be found before this instruction.
680 OUT says where they must be stored after the instruction.
681 (IN is zero for data not read, and OUT is zero for data not written.)
682 INLOC and OUTLOC point to the places in the instructions where
683 IN and OUT were found.
684 If IN and OUT are both non-zero, it means the same register must be used
685 to reload both IN and OUT.
687 CLASS is a register class required for the reloaded data.
688 INMODE is the machine mode that the instruction requires
689 for the reg that replaces IN and OUTMODE is likewise for OUT.
691 If IN is zero, then OUT's location and mode should be passed as
694 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
696 OPTIONAL nonzero means this reload does not need to be performed:
697 it can be discarded if that is more convenient.
699 OPNUM and TYPE say what the purpose of this reload is.
701 The return value is the reload-number for this reload.
703 If both IN and OUT are nonzero, in some rare cases we might
704 want to make two separate reloads. (Actually we never do this now.)
705 Therefore, the reload-number for OUT is stored in
706 output_reloadnum when we return; the return value applies to IN.
707 Usually (presently always), when IN and OUT are nonzero,
708 the two reload-numbers are equal, but the caller should be careful to
712 push_reload (in
, out
, inloc
, outloc
, class,
713 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
714 register rtx in
, out
;
716 enum reg_class
class;
717 enum machine_mode inmode
, outmode
;
721 enum reload_type type
;
725 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
726 int secondary_in_reload
= -1, secondary_out_reload
= -1;
727 enum insn_code secondary_in_icode
, secondary_out_icode
;
729 /* INMODE and/or OUTMODE could be VOIDmode if no mode
730 has been specified for the operand. In that case,
731 use the operand's mode as the mode to reload. */
732 if (inmode
== VOIDmode
&& in
!= 0)
733 inmode
= GET_MODE (in
);
734 if (outmode
== VOIDmode
&& out
!= 0)
735 outmode
= GET_MODE (out
);
737 /* If IN is a pseudo register everywhere-equivalent to a constant, and
738 it is not in a hard register, reload straight from the constant,
739 since we want to get rid of such pseudo registers.
740 Often this is done earlier, but not always in find_reloads_address. */
741 if (in
!= 0 && GET_CODE (in
) == REG
)
743 register int regno
= REGNO (in
);
745 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
746 && reg_equiv_constant
[regno
] != 0)
747 in
= reg_equiv_constant
[regno
];
750 /* Likewise for OUT. Of course, OUT will never be equivalent to
751 an actual constant, but it might be equivalent to a memory location
752 (in the case of a parameter). */
753 if (out
!= 0 && GET_CODE (out
) == REG
)
755 register int regno
= REGNO (out
);
757 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
758 && reg_equiv_constant
[regno
] != 0)
759 out
= reg_equiv_constant
[regno
];
762 /* If we have a read-write operand with an address side-effect,
763 change either IN or OUT so the side-effect happens only once. */
764 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
766 if (GET_CODE (XEXP (in
, 0)) == POST_INC
767 || GET_CODE (XEXP (in
, 0)) == POST_DEC
)
768 in
= gen_rtx (MEM
, GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
769 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
770 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
)
771 out
= gen_rtx (MEM
, GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
774 /* If we are reloading a (SUBREG constant ...), really reload just the
775 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
776 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
777 a pseudo and hence will become a MEM) with M1 wider than M2 and the
778 register is a pseudo, also reload the inside expression.
779 For machines that extend byte loads, do this for any SUBREG of a pseudo
780 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
781 M2 is an integral mode that gets extended when loaded.
782 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
783 either M1 is not valid for R or M2 is wider than a word but we only
784 need one word to store an M2-sized quantity in R.
785 (However, if OUT is nonzero, we need to reload the reg *and*
786 the subreg, so do nothing here, and let following statement handle it.)
788 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
789 we can't handle it here because CONST_INT does not indicate a mode.
791 Similarly, we must reload the inside expression if we have a
792 STRICT_LOW_PART (presumably, in == out in the cas).
794 Also reload the inner expression if it does not require a secondary
795 reload but the SUBREG does.
797 Finally, reload the inner expression if it is a register that is in
798 the class whose registers cannot be referenced in a different size
799 and M1 is not the same size as M2. */
801 if (in
!= 0 && GET_CODE (in
) == SUBREG
802 && (CONSTANT_P (SUBREG_REG (in
))
803 || GET_CODE (SUBREG_REG (in
)) == PLUS
805 || (((GET_CODE (SUBREG_REG (in
)) == REG
806 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
807 || GET_CODE (SUBREG_REG (in
)) == MEM
)
808 && ((GET_MODE_SIZE (inmode
)
809 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
810 #ifdef LOAD_EXTEND_OP
811 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
812 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
814 && (GET_MODE_SIZE (inmode
)
815 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
816 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
817 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
820 || (GET_CODE (SUBREG_REG (in
)) == REG
821 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
822 /* The case where out is nonzero
823 is handled differently in the following statement. */
824 && (out
== 0 || SUBREG_WORD (in
) == 0)
825 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
826 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
828 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
830 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
831 GET_MODE (SUBREG_REG (in
)))))
832 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in
))
835 #ifdef SECONDARY_INPUT_RELOAD_CLASS
836 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
837 && (SECONDARY_INPUT_RELOAD_CLASS (class,
838 GET_MODE (SUBREG_REG (in
)),
842 #ifdef CLASS_CANNOT_CHANGE_SIZE
843 || (GET_CODE (SUBREG_REG (in
)) == REG
844 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
845 && (TEST_HARD_REG_BIT
846 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
847 REGNO (SUBREG_REG (in
))))
848 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
849 != GET_MODE_SIZE (inmode
)))
853 in_subreg_loc
= inloc
;
854 inloc
= &SUBREG_REG (in
);
856 #ifndef LOAD_EXTEND_OP
857 if (GET_CODE (in
) == MEM
)
858 /* This is supposed to happen only for paradoxical subregs made by
859 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
860 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
863 inmode
= GET_MODE (in
);
866 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
867 either M1 is not valid for R or M2 is wider than a word but we only
868 need one word to store an M2-sized quantity in R.
870 However, we must reload the inner reg *as well as* the subreg in
873 if (in
!= 0 && GET_CODE (in
) == SUBREG
874 && GET_CODE (SUBREG_REG (in
)) == REG
875 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
876 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in
)), inmode
)
877 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
878 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
880 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
882 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
883 GET_MODE (SUBREG_REG (in
)))))))
885 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), NULL_PTR
,
886 GENERAL_REGS
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
890 /* Similarly for paradoxical and problematical SUBREGs on the output.
891 Note that there is no reason we need worry about the previous value
892 of SUBREG_REG (out); even if wider than out,
893 storing in a subreg is entitled to clobber it all
894 (except in the case of STRICT_LOW_PART,
895 and in that case the constraint should label it input-output.) */
896 if (out
!= 0 && GET_CODE (out
) == SUBREG
897 && (CONSTANT_P (SUBREG_REG (out
))
899 || (((GET_CODE (SUBREG_REG (out
)) == REG
900 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
901 || GET_CODE (SUBREG_REG (out
)) == MEM
)
902 && ((GET_MODE_SIZE (outmode
)
903 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))))
904 || (GET_CODE (SUBREG_REG (out
)) == REG
905 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
906 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
907 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
909 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
911 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
912 GET_MODE (SUBREG_REG (out
)))))
913 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out
))
914 + SUBREG_WORD (out
)),
916 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
917 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
918 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
919 GET_MODE (SUBREG_REG (out
)),
923 #ifdef CLASS_CANNOT_CHANGE_SIZE
924 || (GET_CODE (SUBREG_REG (out
)) == REG
925 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
926 && (TEST_HARD_REG_BIT
927 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_SIZE
],
928 REGNO (SUBREG_REG (out
))))
929 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
930 != GET_MODE_SIZE (outmode
)))
934 out_subreg_loc
= outloc
;
935 outloc
= &SUBREG_REG (out
);
937 #ifndef LOAD_EXTEND_OP
938 if (GET_CODE (out
) == MEM
939 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
942 outmode
= GET_MODE (out
);
945 /* If IN appears in OUT, we can't share any input-only reload for IN. */
946 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
947 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
948 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
951 /* If IN is a SUBREG of a hard register, make a new REG. This
952 simplifies some of the cases below. */
954 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
955 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
956 in
= gen_rtx (REG
, GET_MODE (in
),
957 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
959 /* Similarly for OUT. */
960 if (out
!= 0 && GET_CODE (out
) == SUBREG
961 && GET_CODE (SUBREG_REG (out
)) == REG
962 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
963 out
= gen_rtx (REG
, GET_MODE (out
),
964 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
966 /* Narrow down the class of register wanted if that is
967 desirable on this machine for efficiency. */
969 class = PREFERRED_RELOAD_CLASS (in
, class);
971 /* Output reloads may need analogous treatment, different in detail. */
972 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
974 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
977 /* Make sure we use a class that can handle the actual pseudo
978 inside any subreg. For example, on the 386, QImode regs
979 can appear within SImode subregs. Although GENERAL_REGS
980 can handle SImode, QImode needs a smaller class. */
981 #ifdef LIMIT_RELOAD_CLASS
983 class = LIMIT_RELOAD_CLASS (inmode
, class);
984 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
985 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
988 class = LIMIT_RELOAD_CLASS (outmode
, class);
989 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
990 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
993 /* Verify that this class is at least possible for the mode that
995 if (this_insn_is_asm
)
997 enum machine_mode mode
;
998 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1002 if (mode
== VOIDmode
)
1004 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1009 outmode
= word_mode
;
1011 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1012 if (HARD_REGNO_MODE_OK (i
, mode
)
1013 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1015 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1018 for (j
= 1; j
< nregs
; j
++)
1019 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1024 if (i
== FIRST_PSEUDO_REGISTER
)
1026 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1031 if (class == NO_REGS
)
1034 /* We can use an existing reload if the class is right
1035 and at least one of IN and OUT is a match
1036 and the other is at worst neutral.
1037 (A zero compared against anything is neutral.)
1039 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
1040 for the same thing since that can cause us to need more reload registers
1041 than we otherwise would. */
1043 for (i
= 0; i
< n_reloads
; i
++)
1044 if ((reg_class_subset_p (class, reload_reg_class
[i
])
1045 || reg_class_subset_p (reload_reg_class
[i
], class))
1046 /* If the existing reload has a register, it must fit our class. */
1047 && (reload_reg_rtx
[i
] == 0
1048 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1049 true_regnum (reload_reg_rtx
[i
])))
1050 && ((in
!= 0 && MATCHES (reload_in
[i
], in
) && ! dont_share
1051 && (out
== 0 || reload_out
[i
] == 0 || MATCHES (reload_out
[i
], out
)))
1053 (out
!= 0 && MATCHES (reload_out
[i
], out
)
1054 && (in
== 0 || reload_in
[i
] == 0 || MATCHES (reload_in
[i
], in
))))
1055 && (reg_class_size
[(int) class] == 1
1056 #ifdef SMALL_REGISTER_CLASSES
1060 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
1061 opnum
, reload_opnum
[i
]))
1064 /* Reloading a plain reg for input can match a reload to postincrement
1065 that reg, since the postincrement's value is the right value.
1066 Likewise, it can match a preincrement reload, since we regard
1067 the preincrementation as happening before any ref in this insn
1068 to that register. */
1070 for (i
= 0; i
< n_reloads
; i
++)
1071 if ((reg_class_subset_p (class, reload_reg_class
[i
])
1072 || reg_class_subset_p (reload_reg_class
[i
], class))
1073 /* If the existing reload has a register, it must fit our class. */
1074 && (reload_reg_rtx
[i
] == 0
1075 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1076 true_regnum (reload_reg_rtx
[i
])))
1077 && out
== 0 && reload_out
[i
] == 0 && reload_in
[i
] != 0
1078 && ((GET_CODE (in
) == REG
1079 && (GET_CODE (reload_in
[i
]) == POST_INC
1080 || GET_CODE (reload_in
[i
]) == POST_DEC
1081 || GET_CODE (reload_in
[i
]) == PRE_INC
1082 || GET_CODE (reload_in
[i
]) == PRE_DEC
)
1083 && MATCHES (XEXP (reload_in
[i
], 0), in
))
1085 (GET_CODE (reload_in
[i
]) == REG
1086 && (GET_CODE (in
) == POST_INC
1087 || GET_CODE (in
) == POST_DEC
1088 || GET_CODE (in
) == PRE_INC
1089 || GET_CODE (in
) == PRE_DEC
)
1090 && MATCHES (XEXP (in
, 0), reload_in
[i
])))
1091 && (reg_class_size
[(int) class] == 1
1092 #ifdef SMALL_REGISTER_CLASSES
1096 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
1097 opnum
, reload_opnum
[i
]))
1099 /* Make sure reload_in ultimately has the increment,
1100 not the plain register. */
1101 if (GET_CODE (in
) == REG
)
1108 /* See if we need a secondary reload register to move between CLASS
1109 and IN or CLASS and OUT. Get the icode and push any required reloads
1110 needed for each of them if so. */
1112 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1115 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1116 &secondary_in_icode
);
1119 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1120 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1121 secondary_out_reload
1122 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1123 type
, &secondary_out_icode
);
1126 /* We found no existing reload suitable for re-use.
1127 So add an additional reload. */
1131 reload_out
[i
] = out
;
1132 reload_reg_class
[i
] = class;
1133 reload_inmode
[i
] = inmode
;
1134 reload_outmode
[i
] = outmode
;
1135 reload_reg_rtx
[i
] = 0;
1136 reload_optional
[i
] = optional
;
1138 reload_nocombine
[i
] = 0;
1139 reload_in_reg
[i
] = inloc
? *inloc
: 0;
1140 reload_opnum
[i
] = opnum
;
1141 reload_when_needed
[i
] = type
;
1142 reload_secondary_in_reload
[i
] = secondary_in_reload
;
1143 reload_secondary_out_reload
[i
] = secondary_out_reload
;
1144 reload_secondary_in_icode
[i
] = secondary_in_icode
;
1145 reload_secondary_out_icode
[i
] = secondary_out_icode
;
1146 reload_secondary_p
[i
] = 0;
1150 #ifdef SECONDARY_MEMORY_NEEDED
1151 /* If a memory location is needed for the copy, make one. */
1152 if (in
!= 0 && GET_CODE (in
) == REG
1153 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1154 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1156 get_secondary_mem (in
, inmode
, opnum
, type
);
1158 if (out
!= 0 && GET_CODE (out
) == REG
1159 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1160 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1162 get_secondary_mem (out
, outmode
, opnum
, type
);
1167 /* We are reusing an existing reload,
1168 but we may have additional information for it.
1169 For example, we may now have both IN and OUT
1170 while the old one may have just one of them. */
1172 if (inmode
!= VOIDmode
)
1173 reload_inmode
[i
] = inmode
;
1174 if (outmode
!= VOIDmode
)
1175 reload_outmode
[i
] = outmode
;
1179 reload_out
[i
] = out
;
1180 if (reg_class_subset_p (class, reload_reg_class
[i
]))
1181 reload_reg_class
[i
] = class;
1182 reload_optional
[i
] &= optional
;
1183 if (MERGE_TO_OTHER (type
, reload_when_needed
[i
],
1184 opnum
, reload_opnum
[i
]))
1185 reload_when_needed
[i
] = RELOAD_OTHER
;
1186 reload_opnum
[i
] = MIN (reload_opnum
[i
], opnum
);
1189 /* If the ostensible rtx being reload differs from the rtx found
1190 in the location to substitute, this reload is not safe to combine
1191 because we cannot reliably tell whether it appears in the insn. */
1193 if (in
!= 0 && in
!= *inloc
)
1194 reload_nocombine
[i
] = 1;
1197 /* This was replaced by changes in find_reloads_address_1 and the new
1198 function inc_for_reload, which go with a new meaning of reload_inc. */
1200 /* If this is an IN/OUT reload in an insn that sets the CC,
1201 it must be for an autoincrement. It doesn't work to store
1202 the incremented value after the insn because that would clobber the CC.
1203 So we must do the increment of the value reloaded from,
1204 increment it, store it back, then decrement again. */
1205 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1209 reload_inc
[i
] = find_inc_amount (PATTERN (this_insn
), in
);
1210 /* If we did not find a nonzero amount-to-increment-by,
1211 that contradicts the belief that IN is being incremented
1212 in an address in this insn. */
1213 if (reload_inc
[i
] == 0)
1218 /* If we will replace IN and OUT with the reload-reg,
1219 record where they are located so that substitution need
1220 not do a tree walk. */
1222 if (replace_reloads
)
1226 register struct replacement
*r
= &replacements
[n_replacements
++];
1228 r
->subreg_loc
= in_subreg_loc
;
1232 if (outloc
!= 0 && outloc
!= inloc
)
1234 register struct replacement
*r
= &replacements
[n_replacements
++];
1237 r
->subreg_loc
= out_subreg_loc
;
1242 /* If this reload is just being introduced and it has both
1243 an incoming quantity and an outgoing quantity that are
1244 supposed to be made to match, see if either one of the two
1245 can serve as the place to reload into.
1247 If one of them is acceptable, set reload_reg_rtx[i]
1250 if (in
!= 0 && out
!= 0 && in
!= out
&& reload_reg_rtx
[i
] == 0)
1252 reload_reg_rtx
[i
] = find_dummy_reload (in
, out
, inloc
, outloc
,
1254 reload_reg_class
[i
], i
);
1256 /* If the outgoing register already contains the same value
1257 as the incoming one, we can dispense with loading it.
1258 The easiest way to tell the caller that is to give a phony
1259 value for the incoming operand (same as outgoing one). */
1260 if (reload_reg_rtx
[i
] == out
1261 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1262 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1263 static_reload_reg_p
, i
, inmode
))
1267 /* If this is an input reload and the operand contains a register that
1268 dies in this insn and is used nowhere else, see if it is the right class
1269 to be used for this reload. Use it if so. (This occurs most commonly
1270 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1271 this if it is also an output reload that mentions the register unless
1272 the output is a SUBREG that clobbers an entire register.
1274 Note that the operand might be one of the spill regs, if it is a
1275 pseudo reg and we are in a block where spilling has not taken place.
1276 But if there is no spilling in this block, that is OK.
1277 An explicitly used hard reg cannot be a spill reg. */
1279 if (reload_reg_rtx
[i
] == 0 && in
!= 0)
1284 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1285 if (REG_NOTE_KIND (note
) == REG_DEAD
1286 && GET_CODE (XEXP (note
, 0)) == REG
1287 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1288 && reg_mentioned_p (XEXP (note
, 0), in
)
1289 && ! refers_to_regno_for_reload_p (regno
,
1291 + HARD_REGNO_NREGS (regno
,
1293 PATTERN (this_insn
), inloc
)
1294 /* If this is also an output reload, IN cannot be used as
1295 the reload register if it is set in this insn unless IN
1297 && (out
== 0 || in
== out
1298 || ! hard_reg_set_here_p (regno
,
1300 + HARD_REGNO_NREGS (regno
,
1302 PATTERN (this_insn
)))
1303 /* ??? Why is this code so different from the previous?
1304 Is there any simple coherent way to describe the two together?
1305 What's going on here. */
1307 || (GET_CODE (in
) == SUBREG
1308 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1310 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1311 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1312 /* Make sure the operand fits in the reg that dies. */
1313 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1314 && HARD_REGNO_MODE_OK (regno
, inmode
)
1315 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1316 && HARD_REGNO_MODE_OK (regno
, outmode
)
1317 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], regno
)
1318 && !fixed_regs
[regno
])
1320 reload_reg_rtx
[i
] = gen_rtx (REG
, inmode
, regno
);
1326 output_reloadnum
= i
;
1331 /* Record an additional place we must replace a value
1332 for which we have already recorded a reload.
1333 RELOADNUM is the value returned by push_reload
1334 when the reload was recorded.
1335 This is used in insn patterns that use match_dup. */
1338 push_replacement (loc
, reloadnum
, mode
)
1341 enum machine_mode mode
;
1343 if (replace_reloads
)
1345 register struct replacement
*r
= &replacements
[n_replacements
++];
1346 r
->what
= reloadnum
;
1353 /* Transfer all replacements that used to be in reload FROM to be in
1357 transfer_replacements (to
, from
)
1362 for (i
= 0; i
< n_replacements
; i
++)
1363 if (replacements
[i
].what
== from
)
1364 replacements
[i
].what
= to
;
1367 /* If there is only one output reload, and it is not for an earlyclobber
1368 operand, try to combine it with a (logically unrelated) input reload
1369 to reduce the number of reload registers needed.
1371 This is safe if the input reload does not appear in
1372 the value being output-reloaded, because this implies
1373 it is not needed any more once the original insn completes.
1375 If that doesn't work, see we can use any of the registers that
1376 die in this insn as a reload register. We can if it is of the right
1377 class and does not appear in the value being output-reloaded. */
1383 int output_reload
= -1;
1386 /* Find the output reload; return unless there is exactly one
1387 and that one is mandatory. */
1389 for (i
= 0; i
< n_reloads
; i
++)
1390 if (reload_out
[i
] != 0)
1392 if (output_reload
>= 0)
1397 if (output_reload
< 0 || reload_optional
[output_reload
])
1400 /* An input-output reload isn't combinable. */
1402 if (reload_in
[output_reload
] != 0)
1405 /* If this reload is for an earlyclobber operand, we can't do anything. */
1406 if (earlyclobber_operand_p (reload_out
[output_reload
]))
1409 /* Check each input reload; can we combine it? */
1411 for (i
= 0; i
< n_reloads
; i
++)
1412 if (reload_in
[i
] && ! reload_optional
[i
] && ! reload_nocombine
[i
]
1413 /* Life span of this reload must not extend past main insn. */
1414 && reload_when_needed
[i
] != RELOAD_FOR_OUTPUT_ADDRESS
1415 && reload_when_needed
[i
] != RELOAD_OTHER
1416 && (CLASS_MAX_NREGS (reload_reg_class
[i
], reload_inmode
[i
])
1417 == CLASS_MAX_NREGS (reload_reg_class
[output_reload
],
1418 reload_outmode
[output_reload
]))
1419 && reload_inc
[i
] == 0
1420 && reload_reg_rtx
[i
] == 0
1421 #ifdef SECONDARY_MEMORY_NEEDED
1422 /* Don't combine two reloads with different secondary
1423 memory locations. */
1424 && (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]] == 0
1425 || secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] == 0
1426 || rtx_equal_p (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]],
1427 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]]))
1429 #ifdef SMALL_REGISTER_CLASSES
1430 && reload_reg_class
[i
] == reload_reg_class
[output_reload
]
1432 && (reg_class_subset_p (reload_reg_class
[i
],
1433 reload_reg_class
[output_reload
])
1434 || reg_class_subset_p (reload_reg_class
[output_reload
],
1435 reload_reg_class
[i
]))
1437 && (MATCHES (reload_in
[i
], reload_out
[output_reload
])
1438 /* Args reversed because the first arg seems to be
1439 the one that we imagine being modified
1440 while the second is the one that might be affected. */
1441 || (! reg_overlap_mentioned_for_reload_p (reload_out
[output_reload
],
1443 /* However, if the input is a register that appears inside
1444 the output, then we also can't share.
1445 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1446 If the same reload reg is used for both reg 69 and the
1447 result to be stored in memory, then that result
1448 will clobber the address of the memory ref. */
1449 && ! (GET_CODE (reload_in
[i
]) == REG
1450 && reg_overlap_mentioned_for_reload_p (reload_in
[i
],
1451 reload_out
[output_reload
]))))
1452 && (reg_class_size
[(int) reload_reg_class
[i
]]
1453 #ifdef SMALL_REGISTER_CLASSES
1457 /* We will allow making things slightly worse by combining an
1458 input and an output, but no worse than that. */
1459 && (reload_when_needed
[i
] == RELOAD_FOR_INPUT
1460 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT
))
1464 /* We have found a reload to combine with! */
1465 reload_out
[i
] = reload_out
[output_reload
];
1466 reload_outmode
[i
] = reload_outmode
[output_reload
];
1467 /* Mark the old output reload as inoperative. */
1468 reload_out
[output_reload
] = 0;
1469 /* The combined reload is needed for the entire insn. */
1470 reload_when_needed
[i
] = RELOAD_OTHER
;
1471 /* If the output reload had a secondary reload, copy it. */
1472 if (reload_secondary_out_reload
[output_reload
] != -1)
1474 reload_secondary_out_reload
[i
]
1475 = reload_secondary_out_reload
[output_reload
];
1476 reload_secondary_out_icode
[i
]
1477 = reload_secondary_out_icode
[output_reload
];
1480 #ifdef SECONDARY_MEMORY_NEEDED
1481 /* Copy any secondary MEM. */
1482 if (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] != 0)
1483 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]]
1484 = secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]];
1486 /* If required, minimize the register class. */
1487 if (reg_class_subset_p (reload_reg_class
[output_reload
],
1488 reload_reg_class
[i
]))
1489 reload_reg_class
[i
] = reload_reg_class
[output_reload
];
1491 /* Transfer all replacements from the old reload to the combined. */
1492 for (j
= 0; j
< n_replacements
; j
++)
1493 if (replacements
[j
].what
== output_reload
)
1494 replacements
[j
].what
= i
;
1499 /* If this insn has only one operand that is modified or written (assumed
1500 to be the first), it must be the one corresponding to this reload. It
1501 is safe to use anything that dies in this insn for that output provided
1502 that it does not occur in the output (we already know it isn't an
1503 earlyclobber. If this is an asm insn, give up. */
1505 if (INSN_CODE (this_insn
) == -1)
1508 for (i
= 1; i
< insn_n_operands
[INSN_CODE (this_insn
)]; i
++)
1509 if (insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '='
1510 || insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '+')
1513 /* See if some hard register that dies in this insn and is not used in
1514 the output is the right class. Only works if the register we pick
1515 up can fully hold our output reload. */
1516 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1517 if (REG_NOTE_KIND (note
) == REG_DEAD
1518 && GET_CODE (XEXP (note
, 0)) == REG
1519 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1520 reload_out
[output_reload
])
1521 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1522 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1523 && TEST_HARD_REG_BIT (reg_class_contents
[(int) reload_reg_class
[output_reload
]],
1524 REGNO (XEXP (note
, 0)))
1525 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1526 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1527 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1529 reload_reg_rtx
[output_reload
] = gen_rtx (REG
,
1530 reload_outmode
[output_reload
],
1531 REGNO (XEXP (note
, 0)));
1536 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1537 See if one of IN and OUT is a register that may be used;
1538 this is desirable since a spill-register won't be needed.
1539 If so, return the register rtx that proves acceptable.
1541 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1542 CLASS is the register class required for the reload.
1544 If FOR_REAL is >= 0, it is the number of the reload,
1545 and in some cases when it can be discovered that OUT doesn't need
1546 to be computed, clear out reload_out[FOR_REAL].
1548 If FOR_REAL is -1, this should not be done, because this call
1549 is just to see if a register can be found, not to find and install it. */
1552 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1553 inmode
, outmode
, class, for_real
)
1554 rtx real_in
, real_out
;
1555 rtx
*inloc
, *outloc
;
1556 enum machine_mode inmode
, outmode
;
1557 enum reg_class
class;
1566 /* If operands exceed a word, we can't use either of them
1567 unless they have the same size. */
1568 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1569 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1570 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1573 /* Find the inside of any subregs. */
1574 while (GET_CODE (out
) == SUBREG
)
1576 out_offset
= SUBREG_WORD (out
);
1577 out
= SUBREG_REG (out
);
1579 while (GET_CODE (in
) == SUBREG
)
1581 in_offset
= SUBREG_WORD (in
);
1582 in
= SUBREG_REG (in
);
1585 /* Narrow down the reg class, the same way push_reload will;
1586 otherwise we might find a dummy now, but push_reload won't. */
1587 class = PREFERRED_RELOAD_CLASS (in
, class);
1589 /* See if OUT will do. */
1590 if (GET_CODE (out
) == REG
1591 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1593 register int regno
= REGNO (out
) + out_offset
;
1594 int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1597 /* When we consider whether the insn uses OUT,
1598 ignore references within IN. They don't prevent us
1599 from copying IN into OUT, because those refs would
1600 move into the insn that reloads IN.
1602 However, we only ignore IN in its role as this reload.
1603 If the insn uses IN elsewhere and it contains OUT,
1604 that counts. We can't be sure it's the "same" operand
1605 so it might not go through this reload. */
1607 *inloc
= const0_rtx
;
1609 if (regno
< FIRST_PSEUDO_REGISTER
1610 /* A fixed reg that can overlap other regs better not be used
1611 for reloading in any way. */
1612 #ifdef OVERLAPPING_REGNO_P
1613 && ! (fixed_regs
[regno
] && OVERLAPPING_REGNO_P (regno
))
1615 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1616 PATTERN (this_insn
), outloc
))
1619 for (i
= 0; i
< nwords
; i
++)
1620 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1626 if (GET_CODE (real_out
) == REG
)
1629 value
= gen_rtx (REG
, outmode
, regno
);
1636 /* Consider using IN if OUT was not acceptable
1637 or if OUT dies in this insn (like the quotient in a divmod insn).
1638 We can't use IN unless it is dies in this insn,
1639 which means we must know accurately which hard regs are live.
1640 Also, the result can't go in IN if IN is used within OUT. */
1641 if (hard_regs_live_known
1642 && GET_CODE (in
) == REG
1643 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1645 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1646 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1647 && !fixed_regs
[REGNO (in
)]
1648 && HARD_REGNO_MODE_OK (REGNO (in
),
1649 /* The only case where out and real_out might
1650 have different modes is where real_out
1651 is a subreg, and in that case, out
1653 (GET_MODE (out
) != VOIDmode
1654 ? GET_MODE (out
) : outmode
)))
1656 register int regno
= REGNO (in
) + in_offset
;
1657 int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1659 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1660 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1661 PATTERN (this_insn
)))
1664 for (i
= 0; i
< nwords
; i
++)
1665 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1671 /* If we were going to use OUT as the reload reg
1672 and changed our mind, it means OUT is a dummy that
1673 dies here. So don't bother copying value to it. */
1674 if (for_real
>= 0 && value
== real_out
)
1675 reload_out
[for_real
] = 0;
1676 if (GET_CODE (real_in
) == REG
)
1679 value
= gen_rtx (REG
, inmode
, regno
);
1687 /* This page contains subroutines used mainly for determining
1688 whether the IN or an OUT of a reload can serve as the
1691 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1694 earlyclobber_operand_p (x
)
1699 for (i
= 0; i
< n_earlyclobbers
; i
++)
1700 if (reload_earlyclobbers
[i
] == x
)
1706 /* Return 1 if expression X alters a hard reg in the range
1707 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1708 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1709 X should be the body of an instruction. */
1712 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1713 register int beg_regno
, end_regno
;
1716 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1718 register rtx op0
= SET_DEST (x
);
1719 while (GET_CODE (op0
) == SUBREG
)
1720 op0
= SUBREG_REG (op0
);
1721 if (GET_CODE (op0
) == REG
)
1723 register int r
= REGNO (op0
);
1724 /* See if this reg overlaps range under consideration. */
1726 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1730 else if (GET_CODE (x
) == PARALLEL
)
1732 register int i
= XVECLEN (x
, 0) - 1;
1734 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1741 /* Return 1 if ADDR is a valid memory address for mode MODE,
1742 and check that each pseudo reg has the proper kind of
1746 strict_memory_address_p (mode
, addr
)
1747 enum machine_mode mode
;
1750 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1757 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1758 if they are the same hard reg, and has special hacks for
1759 autoincrement and autodecrement.
1760 This is specifically intended for find_reloads to use
1761 in determining whether two operands match.
1762 X is the operand whose number is the lower of the two.
1764 The value is 2 if Y contains a pre-increment that matches
1765 a non-incrementing address in X. */
1767 /* ??? To be completely correct, we should arrange to pass
1768 for X the output operand and for Y the input operand.
1769 For now, we assume that the output operand has the lower number
1770 because that is natural in (SET output (... input ...)). */
1773 operands_match_p (x
, y
)
1777 register RTX_CODE code
= GET_CODE (x
);
1783 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
1784 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
1785 && GET_CODE (SUBREG_REG (y
)) == REG
)))
1791 i
= REGNO (SUBREG_REG (x
));
1792 if (i
>= FIRST_PSEUDO_REGISTER
)
1794 i
+= SUBREG_WORD (x
);
1799 if (GET_CODE (y
) == SUBREG
)
1801 j
= REGNO (SUBREG_REG (y
));
1802 if (j
>= FIRST_PSEUDO_REGISTER
)
1804 j
+= SUBREG_WORD (y
);
1809 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1810 multiple hard register group, so that for example (reg:DI 0) and
1811 (reg:SI 1) will be considered the same register. */
1812 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
1813 && i
< FIRST_PSEUDO_REGISTER
)
1814 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
1815 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
1816 && j
< FIRST_PSEUDO_REGISTER
)
1817 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
1821 /* If two operands must match, because they are really a single
1822 operand of an assembler insn, then two postincrements are invalid
1823 because the assembler insn would increment only once.
1824 On the other hand, an postincrement matches ordinary indexing
1825 if the postincrement is the output operand. */
1826 if (code
== POST_DEC
|| code
== POST_INC
)
1827 return operands_match_p (XEXP (x
, 0), y
);
1828 /* Two preincrements are invalid
1829 because the assembler insn would increment only once.
1830 On the other hand, an preincrement matches ordinary indexing
1831 if the preincrement is the input operand.
1832 In this case, return 2, since some callers need to do special
1833 things when this happens. */
1834 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
)
1835 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
1839 /* Now we have disposed of all the cases
1840 in which different rtx codes can match. */
1841 if (code
!= GET_CODE (y
))
1843 if (code
== LABEL_REF
)
1844 return XEXP (x
, 0) == XEXP (y
, 0);
1845 if (code
== SYMBOL_REF
)
1846 return XSTR (x
, 0) == XSTR (y
, 0);
1848 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1850 if (GET_MODE (x
) != GET_MODE (y
))
1853 /* Compare the elements. If any pair of corresponding elements
1854 fail to match, return 0 for the whole things. */
1857 fmt
= GET_RTX_FORMAT (code
);
1858 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1864 if (XWINT (x
, i
) != XWINT (y
, i
))
1869 if (XINT (x
, i
) != XINT (y
, i
))
1874 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
1877 /* If any subexpression returns 2,
1878 we should return 2 if we are successful. */
1886 /* It is believed that rtx's at this level will never
1887 contain anything but integers and other rtx's,
1888 except for within LABEL_REFs and SYMBOL_REFs. */
1893 return 1 + success_2
;
1896 /* Return the number of times character C occurs in string S. */
1899 n_occurrences (c
, s
)
1909 /* Describe the range of registers or memory referenced by X.
1910 If X is a register, set REG_FLAG and put the first register
1911 number into START and the last plus one into END.
1912 If X is a memory reference, put a base address into BASE
1913 and a range of integer offsets into START and END.
1914 If X is pushing on the stack, we can assume it causes no trouble,
1915 so we set the SAFE field. */
1917 static struct decomposition
1921 struct decomposition val
;
1926 if (GET_CODE (x
) == MEM
)
1928 rtx base
, offset
= 0;
1929 rtx addr
= XEXP (x
, 0);
1931 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
1932 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
1934 val
.base
= XEXP (addr
, 0);
1935 val
.start
= - GET_MODE_SIZE (GET_MODE (x
));
1936 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
1937 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
1941 if (GET_CODE (addr
) == CONST
)
1943 addr
= XEXP (addr
, 0);
1946 if (GET_CODE (addr
) == PLUS
)
1948 if (CONSTANT_P (XEXP (addr
, 0)))
1950 base
= XEXP (addr
, 1);
1951 offset
= XEXP (addr
, 0);
1953 else if (CONSTANT_P (XEXP (addr
, 1)))
1955 base
= XEXP (addr
, 0);
1956 offset
= XEXP (addr
, 1);
1963 offset
= const0_rtx
;
1965 if (GET_CODE (offset
) == CONST
)
1966 offset
= XEXP (offset
, 0);
1967 if (GET_CODE (offset
) == PLUS
)
1969 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
1971 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 1));
1972 offset
= XEXP (offset
, 0);
1974 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
1976 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 0));
1977 offset
= XEXP (offset
, 1);
1981 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
1982 offset
= const0_rtx
;
1985 else if (GET_CODE (offset
) != CONST_INT
)
1987 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
1988 offset
= const0_rtx
;
1991 if (all_const
&& GET_CODE (base
) == PLUS
)
1992 base
= gen_rtx (CONST
, GET_MODE (base
), base
);
1994 if (GET_CODE (offset
) != CONST_INT
)
1997 val
.start
= INTVAL (offset
);
1998 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2002 else if (GET_CODE (x
) == REG
)
2005 val
.start
= true_regnum (x
);
2008 /* A pseudo with no hard reg. */
2009 val
.start
= REGNO (x
);
2010 val
.end
= val
.start
+ 1;
2014 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2016 else if (GET_CODE (x
) == SUBREG
)
2018 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2019 /* This could be more precise, but it's good enough. */
2020 return decompose (SUBREG_REG (x
));
2022 val
.start
= true_regnum (x
);
2024 return decompose (SUBREG_REG (x
));
2027 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2029 else if (CONSTANT_P (x
)
2030 /* This hasn't been assigned yet, so it can't conflict yet. */
2031 || GET_CODE (x
) == SCRATCH
)
2038 /* Return 1 if altering Y will not modify the value of X.
2039 Y is also described by YDATA, which should be decompose (Y). */
2042 immune_p (x
, y
, ydata
)
2044 struct decomposition ydata
;
2046 struct decomposition xdata
;
2049 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
2053 if (GET_CODE (y
) != MEM
)
2055 /* If Y is memory and X is not, Y can't affect X. */
2056 if (GET_CODE (x
) != MEM
)
2059 xdata
= decompose (x
);
2061 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2063 /* If bases are distinct symbolic constants, there is no overlap. */
2064 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2066 /* Constants and stack slots never overlap. */
2067 if (CONSTANT_P (xdata
.base
)
2068 && (ydata
.base
== frame_pointer_rtx
2069 || ydata
.base
== hard_frame_pointer_rtx
2070 || ydata
.base
== stack_pointer_rtx
))
2072 if (CONSTANT_P (ydata
.base
)
2073 && (xdata
.base
== frame_pointer_rtx
2074 || xdata
.base
== hard_frame_pointer_rtx
2075 || xdata
.base
== stack_pointer_rtx
))
2077 /* If either base is variable, we don't know anything. */
2082 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2085 /* Similar, but calls decompose. */
2088 safe_from_earlyclobber (op
, clobber
)
2091 struct decomposition early_data
;
2093 early_data
= decompose (clobber
);
2094 return immune_p (op
, clobber
, early_data
);
2097 /* Main entry point of this file: search the body of INSN
2098 for values that need reloading and record them with push_reload.
2099 REPLACE nonzero means record also where the values occur
2100 so that subst_reloads can be used.
2102 IND_LEVELS says how many levels of indirection are supported by this
2103 machine; a value of zero means that a memory reference is not a valid
2106 LIVE_KNOWN says we have valid information about which hard
2107 regs are live at each point in the program; this is true when
2108 we are called from global_alloc but false when stupid register
2109 allocation has been done.
2111 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2112 which is nonnegative if the reg has been commandeered for reloading into.
2113 It is copied into STATIC_RELOAD_REG_P and referenced from there
2114 by various subroutines. */
2117 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2119 int replace
, ind_levels
;
2121 short *reload_reg_p
;
2123 #ifdef REGISTER_CONSTRAINTS
2125 register int insn_code_number
;
2128 /* These are the constraints for the insn. We don't change them. */
2129 char *constraints1
[MAX_RECOG_OPERANDS
];
2130 /* These start out as the constraints for the insn
2131 and they are chewed up as we consider alternatives. */
2132 char *constraints
[MAX_RECOG_OPERANDS
];
2133 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2135 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2136 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2137 /* Nonzero for a MEM operand whose entire address needs a reload. */
2138 int address_reloaded
[MAX_RECOG_OPERANDS
];
2139 /* Value of enum reload_type to use for operand. */
2140 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2141 /* Value of enum reload_type to use within address of operand. */
2142 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2143 /* Save the usage of each operand. */
2144 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2145 int no_input_reloads
= 0, no_output_reloads
= 0;
2147 int this_alternative
[MAX_RECOG_OPERANDS
];
2148 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2149 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2150 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2151 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2153 int goal_alternative
[MAX_RECOG_OPERANDS
];
2154 int this_alternative_number
;
2155 int goal_alternative_number
;
2156 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2157 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2158 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2159 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2160 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2161 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2162 int goal_alternative_swapped
;
2165 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2166 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2167 rtx body
= PATTERN (insn
);
2168 rtx set
= single_set (insn
);
2169 int goal_earlyclobber
, this_earlyclobber
;
2170 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2173 this_insn_is_asm
= 0; /* Tentative. */
2177 n_earlyclobbers
= 0;
2178 replace_reloads
= replace
;
2179 hard_regs_live_known
= live_known
;
2180 static_reload_reg_p
= reload_reg_p
;
2182 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2183 neither are insns that SET cc0. Insns that use CC0 are not allowed
2184 to have any input reloads. */
2185 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2186 no_output_reloads
= 1;
2189 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2190 no_input_reloads
= 1;
2191 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2192 no_output_reloads
= 1;
2195 #ifdef SECONDARY_MEMORY_NEEDED
2196 /* The eliminated forms of any secondary memory locations are per-insn, so
2197 clear them out here. */
2199 bzero ((char *) secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2202 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2203 Make OPERANDS point to a vector of operand values.
2204 Make OPERAND_LOCS point to a vector of pointers to
2205 where the operands were found.
2206 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2207 constraint-strings for this insn.
2208 Return if the insn needs no reload processing. */
2210 switch (GET_CODE (body
))
2220 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2221 is cheap to move between them. If it is not, there may not be an insn
2222 to do the copy, so we may need a reload. */
2223 if (GET_CODE (SET_DEST (body
)) == REG
2224 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2225 && GET_CODE (SET_SRC (body
)) == REG
2226 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2227 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2228 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2232 reload_n_operands
= noperands
= asm_noperands (body
);
2235 /* This insn is an `asm' with operands. */
2237 insn_code_number
= -1;
2238 this_insn_is_asm
= 1;
2240 /* expand_asm_operands makes sure there aren't too many operands. */
2241 if (noperands
> MAX_RECOG_OPERANDS
)
2244 /* Now get the operand values and constraints out of the insn. */
2246 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
2247 constraints
, operand_mode
);
2250 bcopy ((char *) constraints
, (char *) constraints1
,
2251 noperands
* sizeof (char *));
2252 n_alternatives
= n_occurrences (',', constraints
[0]) + 1;
2253 for (i
= 1; i
< noperands
; i
++)
2254 if (n_alternatives
!= n_occurrences (',', constraints
[i
]) + 1)
2256 error_for_asm (insn
, "operand constraints differ in number of alternatives");
2257 /* Avoid further trouble with this insn. */
2258 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
2267 /* Ordinary insn: recognize it, get the operands via insn_extract
2268 and get the constraints. */
2270 insn_code_number
= recog_memoized (insn
);
2271 if (insn_code_number
< 0)
2272 fatal_insn_not_found (insn
);
2274 reload_n_operands
= noperands
= insn_n_operands
[insn_code_number
];
2275 n_alternatives
= insn_n_alternatives
[insn_code_number
];
2276 /* Just return "no reloads" if insn has no operands with constraints. */
2277 if (n_alternatives
== 0)
2279 insn_extract (insn
);
2280 for (i
= 0; i
< noperands
; i
++)
2282 constraints
[i
] = constraints1
[i
]
2283 = insn_operand_constraint
[insn_code_number
][i
];
2284 operand_mode
[i
] = insn_operand_mode
[insn_code_number
][i
];
2293 /* If we will need to know, later, whether some pair of operands
2294 are the same, we must compare them now and save the result.
2295 Reloading the base and index registers will clobber them
2296 and afterward they will fail to match. */
2298 for (i
= 0; i
< noperands
; i
++)
2303 substed_operand
[i
] = recog_operand
[i
];
2306 modified
[i
] = RELOAD_READ
;
2308 /* Scan this operand's constraint to see if it is an output operand,
2309 an in-out operand, is commutative, or should match another. */
2314 modified
[i
] = RELOAD_WRITE
;
2316 modified
[i
] = RELOAD_READ_WRITE
;
2319 /* The last operand should not be marked commutative. */
2320 if (i
== noperands
- 1)
2322 if (this_insn_is_asm
)
2323 warning_for_asm (this_insn
,
2324 "`%%' constraint used with last operand");
2331 else if (c
>= '0' && c
<= '9')
2334 operands_match
[c
][i
]
2335 = operands_match_p (recog_operand
[c
], recog_operand
[i
]);
2337 /* An operand may not match itself. */
2340 if (this_insn_is_asm
)
2341 warning_for_asm (this_insn
,
2342 "operand %d has constraint %d", i
, c
);
2347 /* If C can be commuted with C+1, and C might need to match I,
2348 then C+1 might also need to match I. */
2349 if (commutative
>= 0)
2351 if (c
== commutative
|| c
== commutative
+ 1)
2353 int other
= c
+ (c
== commutative
? 1 : -1);
2354 operands_match
[other
][i
]
2355 = operands_match_p (recog_operand
[other
], recog_operand
[i
]);
2357 if (i
== commutative
|| i
== commutative
+ 1)
2359 int other
= i
+ (i
== commutative
? 1 : -1);
2360 operands_match
[c
][other
]
2361 = operands_match_p (recog_operand
[c
], recog_operand
[other
]);
2363 /* Note that C is supposed to be less than I.
2364 No need to consider altering both C and I because in
2365 that case we would alter one into the other. */
2371 /* Examine each operand that is a memory reference or memory address
2372 and reload parts of the addresses into index registers.
2373 Also here any references to pseudo regs that didn't get hard regs
2374 but are equivalent to constants get replaced in the insn itself
2375 with those constants. Nobody will ever see them again.
2377 Finally, set up the preferred classes of each operand. */
2379 for (i
= 0; i
< noperands
; i
++)
2381 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
2383 address_reloaded
[i
] = 0;
2384 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2385 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2388 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2389 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2392 if (*constraints
[i
] == 0)
2393 /* Ignore things like match_operator operands. */
2395 else if (constraints
[i
][0] == 'p')
2397 find_reloads_address (VOIDmode
, NULL_PTR
,
2398 recog_operand
[i
], recog_operand_loc
[i
],
2399 i
, operand_type
[i
], ind_levels
);
2400 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2402 else if (code
== MEM
)
2404 if (find_reloads_address (GET_MODE (recog_operand
[i
]),
2405 recog_operand_loc
[i
],
2406 XEXP (recog_operand
[i
], 0),
2407 &XEXP (recog_operand
[i
], 0),
2408 i
, address_type
[i
], ind_levels
))
2409 address_reloaded
[i
] = 1;
2410 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2412 else if (code
== SUBREG
)
2413 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2414 = find_reloads_toplev (recog_operand
[i
], i
, address_type
[i
],
2417 && &SET_DEST (set
) == recog_operand_loc
[i
]);
2418 else if (code
== PLUS
)
2419 /* We can get a PLUS as an "operand" as a result of
2420 register elimination. See eliminate_regs and gen_input_reload. */
2421 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2422 = find_reloads_toplev (recog_operand
[i
], i
, address_type
[i
],
2424 else if (code
== REG
)
2426 /* This is equivalent to calling find_reloads_toplev.
2427 The code is duplicated for speed.
2428 When we find a pseudo always equivalent to a constant,
2429 we replace it by the constant. We must be sure, however,
2430 that we don't try to replace it in the insn in which it
2432 register int regno
= REGNO (recog_operand
[i
]);
2433 if (reg_equiv_constant
[regno
] != 0
2434 && (set
== 0 || &SET_DEST (set
) != recog_operand_loc
[i
]))
2435 substed_operand
[i
] = recog_operand
[i
]
2436 = reg_equiv_constant
[regno
];
2437 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2438 that feeds this insn. */
2439 if (reg_equiv_mem
[regno
] != 0)
2440 substed_operand
[i
] = recog_operand
[i
]
2441 = reg_equiv_mem
[regno
];
2443 if (reg_equiv_address
[regno
] != 0)
2445 /* If reg_equiv_address is not a constant address, copy it,
2446 since it may be shared. */
2447 rtx address
= reg_equiv_address
[regno
];
2449 if (rtx_varies_p (address
))
2450 address
= copy_rtx (address
);
2452 /* If this is an output operand, we must output a CLOBBER
2453 after INSN so find_equiv_reg knows REGNO is being written.
2454 Mark this insn specially, do we can put our output reloads
2457 if (modified
[i
] != RELOAD_READ
)
2458 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER
, VOIDmode
,
2463 *recog_operand_loc
[i
] = recog_operand
[i
]
2464 = gen_rtx (MEM
, GET_MODE (recog_operand
[i
]), address
);
2465 RTX_UNCHANGING_P (recog_operand
[i
])
2466 = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
2467 find_reloads_address (GET_MODE (recog_operand
[i
]),
2468 recog_operand_loc
[i
],
2469 XEXP (recog_operand
[i
], 0),
2470 &XEXP (recog_operand
[i
], 0),
2471 i
, address_type
[i
], ind_levels
);
2472 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2475 /* If the operand is still a register (we didn't replace it with an
2476 equivalent), get the preferred class to reload it into. */
2477 code
= GET_CODE (recog_operand
[i
]);
2479 = ((code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
)
2480 ? reg_preferred_class (REGNO (recog_operand
[i
])) : NO_REGS
);
2482 = (code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
2483 && reg_alternate_class (REGNO (recog_operand
[i
])) == NO_REGS
);
2486 /* If this is simply a copy from operand 1 to operand 0, merge the
2487 preferred classes for the operands. */
2488 if (set
!= 0 && noperands
>= 2 && recog_operand
[0] == SET_DEST (set
)
2489 && recog_operand
[1] == SET_SRC (set
))
2491 preferred_class
[0] = preferred_class
[1]
2492 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2493 pref_or_nothing
[0] |= pref_or_nothing
[1];
2494 pref_or_nothing
[1] |= pref_or_nothing
[0];
2497 /* Now see what we need for pseudo-regs that didn't get hard regs
2498 or got the wrong kind of hard reg. For this, we must consider
2499 all the operands together against the register constraints. */
2501 best
= MAX_RECOG_OPERANDS
+ 300;
2504 goal_alternative_swapped
= 0;
2507 /* The constraints are made of several alternatives.
2508 Each operand's constraint looks like foo,bar,... with commas
2509 separating the alternatives. The first alternatives for all
2510 operands go together, the second alternatives go together, etc.
2512 First loop over alternatives. */
2514 for (this_alternative_number
= 0;
2515 this_alternative_number
< n_alternatives
;
2516 this_alternative_number
++)
2518 /* Loop over operands for one constraint alternative. */
2519 /* LOSERS counts those that don't fit this alternative
2520 and would require loading. */
2522 /* BAD is set to 1 if it some operand can't fit this alternative
2523 even after reloading. */
2525 /* REJECT is a count of how undesirable this alternative says it is
2526 if any reloading is required. If the alternative matches exactly
2527 then REJECT is ignored, but otherwise it gets this much
2528 counted against it in addition to the reloading needed. Each
2529 ? counts three times here since we want the disparaging caused by
2530 a bad register class to only count 1/3 as much. */
2533 this_earlyclobber
= 0;
2535 for (i
= 0; i
< noperands
; i
++)
2537 register char *p
= constraints
[i
];
2538 register int win
= 0;
2539 /* 0 => this operand can be reloaded somehow for this alternative */
2541 /* 0 => this operand can be reloaded if the alternative allows regs. */
2544 register rtx operand
= recog_operand
[i
];
2546 /* Nonzero means this is a MEM that must be reloaded into a reg
2547 regardless of what the constraint says. */
2548 int force_reload
= 0;
2550 /* Nonzero if a constant forced into memory would be OK for this
2553 int earlyclobber
= 0;
2555 /* If the operand is a SUBREG, extract
2556 the REG or MEM (or maybe even a constant) within.
2557 (Constants can occur as a result of reg_equiv_constant.) */
2559 while (GET_CODE (operand
) == SUBREG
)
2561 offset
+= SUBREG_WORD (operand
);
2562 operand
= SUBREG_REG (operand
);
2563 /* Force reload if this is a constant or PLUS or if there may may
2564 be a problem accessing OPERAND in the outer mode. */
2565 if (CONSTANT_P (operand
)
2566 || GET_CODE (operand
) == PLUS
2567 /* We must force a reload of paradoxical SUBREGs
2568 of a MEM because the alignment of the inner value
2569 may not be enough to do the outer reference. On
2570 big-endian machines, it may also reference outside
2573 On machines that extend byte operations and we have a
2574 SUBREG where both the inner and outer modes are no wider
2575 than a word and the inner mode is narrower, is integral,
2576 and gets extended when loaded from memory, combine.c has
2577 made assumptions about the behavior of the machine in such
2578 register access. If the data is, in fact, in memory we
2579 must always load using the size assumed to be in the
2580 register and let the insn do the different-sized
2582 || ((GET_CODE (operand
) == MEM
2583 || (GET_CODE (operand
)== REG
2584 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2585 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2586 < BIGGEST_ALIGNMENT
)
2587 && (GET_MODE_SIZE (operand_mode
[i
])
2588 > GET_MODE_SIZE (GET_MODE (operand
))))
2589 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2590 #ifdef LOAD_EXTEND_OP
2591 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2592 && (GET_MODE_SIZE (GET_MODE (operand
))
2594 && (GET_MODE_SIZE (operand_mode
[i
])
2595 > GET_MODE_SIZE (GET_MODE (operand
)))
2596 && INTEGRAL_MODE_P (GET_MODE (operand
))
2597 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2600 /* Subreg of a hard reg which can't handle the subreg's mode
2601 or which would handle that mode in the wrong number of
2602 registers for subregging to work. */
2603 || (GET_CODE (operand
) == REG
2604 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2605 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2606 && (GET_MODE_SIZE (GET_MODE (operand
))
2608 && ((GET_MODE_SIZE (GET_MODE (operand
))
2610 != HARD_REGNO_NREGS (REGNO (operand
),
2611 GET_MODE (operand
))))
2612 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2617 this_alternative
[i
] = (int) NO_REGS
;
2618 this_alternative_win
[i
] = 0;
2619 this_alternative_offmemok
[i
] = 0;
2620 this_alternative_earlyclobber
[i
] = 0;
2621 this_alternative_matches
[i
] = -1;
2623 /* An empty constraint or empty alternative
2624 allows anything which matched the pattern. */
2625 if (*p
== 0 || *p
== ',')
2628 /* Scan this alternative's specs for this operand;
2629 set WIN if the operand fits any letter in this alternative.
2630 Otherwise, clear BADOP if this operand could
2631 fit some letter after reloads,
2632 or set WINREG if this operand could fit after reloads
2633 provided the constraint allows some registers. */
2635 while (*p
&& (c
= *p
++) != ',')
2644 /* The last operand should not be marked commutative. */
2645 if (i
!= noperands
- 1)
2658 /* Ignore rest of this alternative as far as
2659 reloading is concerned. */
2660 while (*p
&& *p
!= ',') p
++;
2669 this_alternative_matches
[i
] = c
;
2670 /* We are supposed to match a previous operand.
2671 If we do, we win if that one did.
2672 If we do not, count both of the operands as losers.
2673 (This is too conservative, since most of the time
2674 only a single reload insn will be needed to make
2675 the two operands win. As a result, this alternative
2676 may be rejected when it is actually desirable.) */
2677 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2678 /* If we are matching as if two operands were swapped,
2679 also pretend that operands_match had been computed
2681 But if I is the second of those and C is the first,
2682 don't exchange them, because operands_match is valid
2683 only on one side of its diagonal. */
2685 [(c
== commutative
|| c
== commutative
+ 1)
2686 ? 2*commutative
+ 1 - c
: c
]
2687 [(i
== commutative
|| i
== commutative
+ 1)
2688 ? 2*commutative
+ 1 - i
: i
])
2689 : operands_match
[c
][i
])
2690 win
= this_alternative_win
[c
];
2693 /* Operands don't match. */
2695 /* Retroactively mark the operand we had to match
2696 as a loser, if it wasn't already. */
2697 if (this_alternative_win
[c
])
2699 this_alternative_win
[c
] = 0;
2700 if (this_alternative
[c
] == (int) NO_REGS
)
2702 /* But count the pair only once in the total badness of
2703 this alternative, if the pair can be a dummy reload. */
2705 = find_dummy_reload (recog_operand
[i
], recog_operand
[c
],
2706 recog_operand_loc
[i
], recog_operand_loc
[c
],
2707 operand_mode
[i
], operand_mode
[c
],
2708 this_alternative
[c
], -1);
2713 /* This can be fixed with reloads if the operand
2714 we are supposed to match can be fixed with reloads. */
2716 this_alternative
[i
] = this_alternative
[c
];
2718 /* If we have to reload this operand and some previous
2719 operand also had to match the same thing as this
2720 operand, we don't know how to do that. So reject this
2722 if (! win
|| force_reload
)
2723 for (j
= 0; j
< i
; j
++)
2724 if (this_alternative_matches
[j
]
2725 == this_alternative_matches
[i
])
2731 /* All necessary reloads for an address_operand
2732 were handled in find_reloads_address. */
2733 this_alternative
[i
] = (int) ALL_REGS
;
2740 if (GET_CODE (operand
) == MEM
2741 || (GET_CODE (operand
) == REG
2742 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2743 && reg_renumber
[REGNO (operand
)] < 0))
2745 if (CONSTANT_P (operand
))
2751 if (GET_CODE (operand
) == MEM
2752 && ! address_reloaded
[i
]
2753 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2754 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2759 if (GET_CODE (operand
) == MEM
2760 && ! address_reloaded
[i
]
2761 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2762 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
2766 /* Memory operand whose address is not offsettable. */
2770 if (GET_CODE (operand
) == MEM
2771 && ! (ind_levels
? offsettable_memref_p (operand
)
2772 : offsettable_nonstrict_memref_p (operand
))
2773 /* Certain mem addresses will become offsettable
2774 after they themselves are reloaded. This is important;
2775 we don't want our own handling of unoffsettables
2776 to override the handling of reg_equiv_address. */
2777 && !(GET_CODE (XEXP (operand
, 0)) == REG
2779 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
2783 /* Memory operand whose address is offsettable. */
2787 if ((GET_CODE (operand
) == MEM
2788 /* If IND_LEVELS, find_reloads_address won't reload a
2789 pseudo that didn't get a hard reg, so we have to
2790 reject that case. */
2791 && (ind_levels
? offsettable_memref_p (operand
)
2792 : offsettable_nonstrict_memref_p (operand
)))
2793 /* Certain mem addresses will become offsettable
2794 after they themselves are reloaded. This is important;
2795 we don't want our own handling of unoffsettables
2796 to override the handling of reg_equiv_address. */
2797 || (GET_CODE (operand
) == MEM
2798 && GET_CODE (XEXP (operand
, 0)) == REG
2800 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0))
2801 || (GET_CODE (operand
) == REG
2802 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2803 && reg_renumber
[REGNO (operand
)] < 0
2804 /* If reg_equiv_address is nonzero, we will be
2805 loading it into a register; hence it will be
2806 offsettable, but we cannot say that reg_equiv_mem
2807 is offsettable without checking. */
2808 && ((reg_equiv_mem
[REGNO (operand
)] != 0
2809 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
2810 || (reg_equiv_address
[REGNO (operand
)] != 0))))
2812 if (CONSTANT_P (operand
) || GET_CODE (operand
) == MEM
)
2819 /* Output operand that is stored before the need for the
2820 input operands (and their index registers) is over. */
2821 earlyclobber
= 1, this_earlyclobber
= 1;
2825 /* Match any floating double constant, but only if
2826 we can examine the bits of it reliably. */
2827 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
2828 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
2829 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
2831 if (GET_CODE (operand
) == CONST_DOUBLE
)
2836 if (GET_CODE (operand
) == CONST_DOUBLE
)
2842 if (GET_CODE (operand
) == CONST_DOUBLE
2843 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
2848 if (GET_CODE (operand
) == CONST_INT
2849 || (GET_CODE (operand
) == CONST_DOUBLE
2850 && GET_MODE (operand
) == VOIDmode
))
2853 if (CONSTANT_P (operand
)
2854 #ifdef LEGITIMATE_PIC_OPERAND_P
2855 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
2862 if (GET_CODE (operand
) == CONST_INT
2863 || (GET_CODE (operand
) == CONST_DOUBLE
2864 && GET_MODE (operand
) == VOIDmode
))
2876 if (GET_CODE (operand
) == CONST_INT
2877 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
2887 /* A PLUS is never a valid operand, but reload can make
2888 it from a register when eliminating registers. */
2889 && GET_CODE (operand
) != PLUS
2890 /* A SCRATCH is not a valid operand. */
2891 && GET_CODE (operand
) != SCRATCH
2892 #ifdef LEGITIMATE_PIC_OPERAND_P
2893 && (! CONSTANT_P (operand
)
2895 || LEGITIMATE_PIC_OPERAND_P (operand
))
2897 && (GENERAL_REGS
== ALL_REGS
2898 || GET_CODE (operand
) != REG
2899 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2900 && reg_renumber
[REGNO (operand
)] < 0)))
2902 /* Drop through into 'r' case */
2906 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
2909 #ifdef EXTRA_CONSTRAINT
2915 if (EXTRA_CONSTRAINT (operand
, c
))
2922 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
2925 if (GET_MODE (operand
) == BLKmode
)
2928 if (GET_CODE (operand
) == REG
2929 && reg_fits_class_p (operand
, this_alternative
[i
],
2930 offset
, GET_MODE (recog_operand
[i
])))
2937 /* If this operand could be handled with a reg,
2938 and some reg is allowed, then this operand can be handled. */
2939 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
2942 /* Record which operands fit this alternative. */
2943 this_alternative_earlyclobber
[i
] = earlyclobber
;
2944 if (win
&& ! force_reload
)
2945 this_alternative_win
[i
] = 1;
2948 int const_to_mem
= 0;
2950 this_alternative_offmemok
[i
] = offmemok
;
2954 /* Alternative loses if it has no regs for a reg operand. */
2955 if (GET_CODE (operand
) == REG
2956 && this_alternative
[i
] == (int) NO_REGS
2957 && this_alternative_matches
[i
] < 0)
2960 /* Alternative loses if it requires a type of reload not
2961 permitted for this insn. We can always reload SCRATCH
2962 and objects with a REG_UNUSED note. */
2963 if (GET_CODE (operand
) != SCRATCH
2964 && modified
[i
] != RELOAD_READ
&& no_output_reloads
2965 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
2967 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
)
2970 /* If this is a constant that is reloaded into the desired
2971 class by copying it to memory first, count that as another
2972 reload. This is consistent with other code and is
2973 required to avoid chosing another alternative when
2974 the constant is moved into memory by this function on
2975 an early reload pass. Note that the test here is
2976 precisely the same as in the code below that calls
2978 if (CONSTANT_P (operand
)
2979 /* force_const_mem does not accept HIGH. */
2980 && GET_CODE (operand
) != HIGH
2981 && (PREFERRED_RELOAD_CLASS (operand
,
2982 (enum reg_class
) this_alternative
[i
])
2984 && operand_mode
[i
] != VOIDmode
)
2987 if (this_alternative
[i
] != (int) NO_REGS
)
2991 /* If we can't reload this value at all, reject this
2992 alternative. Note that we could also lose due to
2993 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
2996 if (! CONSTANT_P (operand
)
2997 && (enum reg_class
) this_alternative
[i
] != NO_REGS
2998 && (PREFERRED_RELOAD_CLASS (operand
,
2999 (enum reg_class
) this_alternative
[i
])
3003 /* We prefer to reload pseudos over reloading other things,
3004 since such reloads may be able to be eliminated later.
3005 If we are reloading a SCRATCH, we won't be generating any
3006 insns, just using a register, so it is also preferred.
3007 So bump REJECT in other cases. Don't do this in the
3008 case where we are forcing a constant into memory and
3009 it will then win since we don't want to have a different
3010 alternative match then. */
3011 if (! (GET_CODE (operand
) == REG
3012 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3013 && GET_CODE (operand
) != SCRATCH
3014 && ! (const_to_mem
&& constmemok
))
3018 /* If this operand is a pseudo register that didn't get a hard
3019 reg and this alternative accepts some register, see if the
3020 class that we want is a subset of the preferred class for this
3021 register. If not, but it intersects that class, use the
3022 preferred class instead. If it does not intersect the preferred
3023 class, show that usage of this alternative should be discouraged;
3024 it will be discouraged more still if the register is `preferred
3025 or nothing'. We do this because it increases the chance of
3026 reusing our spill register in a later insn and avoiding a pair
3027 of memory stores and loads.
3029 Don't bother with this if this alternative will accept this
3032 Don't do this for a multiword operand, since it is only a
3033 small win and has the risk of requiring more spill registers,
3034 which could cause a large loss.
3036 Don't do this if the preferred class has only one register
3037 because we might otherwise exhaust the class. */
3040 if (! win
&& this_alternative
[i
] != (int) NO_REGS
3041 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3042 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3044 if (! reg_class_subset_p (this_alternative
[i
],
3045 preferred_class
[i
]))
3047 /* Since we don't have a way of forming the intersection,
3048 we just do something special if the preferred class
3049 is a subset of the class we have; that's the most
3050 common case anyway. */
3051 if (reg_class_subset_p (preferred_class
[i
],
3052 this_alternative
[i
]))
3053 this_alternative
[i
] = (int) preferred_class
[i
];
3055 reject
+= (1 + pref_or_nothing
[i
]);
3060 /* Now see if any output operands that are marked "earlyclobber"
3061 in this alternative conflict with any input operands
3062 or any memory addresses. */
3064 for (i
= 0; i
< noperands
; i
++)
3065 if (this_alternative_earlyclobber
[i
]
3066 && this_alternative_win
[i
])
3068 struct decomposition early_data
;
3070 early_data
= decompose (recog_operand
[i
]);
3072 if (modified
[i
] == RELOAD_READ
)
3074 if (this_insn_is_asm
)
3075 warning_for_asm (this_insn
,
3076 "`&' constraint used with input operand");
3082 if (this_alternative
[i
] == NO_REGS
)
3084 this_alternative_earlyclobber
[i
] = 0;
3085 if (this_insn_is_asm
)
3086 error_for_asm (this_insn
,
3087 "`&' constraint used with no register class");
3092 for (j
= 0; j
< noperands
; j
++)
3093 /* Is this an input operand or a memory ref? */
3094 if ((GET_CODE (recog_operand
[j
]) == MEM
3095 || modified
[j
] != RELOAD_WRITE
)
3097 /* Ignore things like match_operator operands. */
3098 && *constraints1
[j
] != 0
3099 /* Don't count an input operand that is constrained to match
3100 the early clobber operand. */
3101 && ! (this_alternative_matches
[j
] == i
3102 && rtx_equal_p (recog_operand
[i
], recog_operand
[j
]))
3103 /* Is it altered by storing the earlyclobber operand? */
3104 && !immune_p (recog_operand
[j
], recog_operand
[i
], early_data
))
3106 /* If the output is in a single-reg class,
3107 it's costly to reload it, so reload the input instead. */
3108 if (reg_class_size
[this_alternative
[i
]] == 1
3109 && (GET_CODE (recog_operand
[j
]) == REG
3110 || GET_CODE (recog_operand
[j
]) == SUBREG
))
3113 this_alternative_win
[j
] = 0;
3118 /* If an earlyclobber operand conflicts with something,
3119 it must be reloaded, so request this and count the cost. */
3123 this_alternative_win
[i
] = 0;
3124 for (j
= 0; j
< noperands
; j
++)
3125 if (this_alternative_matches
[j
] == i
3126 && this_alternative_win
[j
])
3128 this_alternative_win
[j
] = 0;
3134 /* If one alternative accepts all the operands, no reload required,
3135 choose that alternative; don't consider the remaining ones. */
3138 /* Unswap these so that they are never swapped at `finish'. */
3139 if (commutative
>= 0)
3141 recog_operand
[commutative
] = substed_operand
[commutative
];
3142 recog_operand
[commutative
+ 1]
3143 = substed_operand
[commutative
+ 1];
3145 for (i
= 0; i
< noperands
; i
++)
3147 goal_alternative_win
[i
] = 1;
3148 goal_alternative
[i
] = this_alternative
[i
];
3149 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3150 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3151 goal_alternative_earlyclobber
[i
]
3152 = this_alternative_earlyclobber
[i
];
3154 goal_alternative_number
= this_alternative_number
;
3155 goal_alternative_swapped
= swapped
;
3156 goal_earlyclobber
= this_earlyclobber
;
3160 /* REJECT, set by the ! and ? constraint characters and when a register
3161 would be reloaded into a non-preferred class, discourages the use of
3162 this alternative for a reload goal. REJECT is incremented by three
3163 for each ? and one for each non-preferred class. */
3164 losers
= losers
* 3 + reject
;
3166 /* If this alternative can be made to work by reloading,
3167 and it needs less reloading than the others checked so far,
3168 record it as the chosen goal for reloading. */
3169 if (! bad
&& best
> losers
)
3171 for (i
= 0; i
< noperands
; i
++)
3173 goal_alternative
[i
] = this_alternative
[i
];
3174 goal_alternative_win
[i
] = this_alternative_win
[i
];
3175 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3176 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3177 goal_alternative_earlyclobber
[i
]
3178 = this_alternative_earlyclobber
[i
];
3180 goal_alternative_swapped
= swapped
;
3182 goal_alternative_number
= this_alternative_number
;
3183 goal_earlyclobber
= this_earlyclobber
;
3187 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3188 then we need to try each alternative twice,
3189 the second time matching those two operands
3190 as if we had exchanged them.
3191 To do this, really exchange them in operands.
3193 If we have just tried the alternatives the second time,
3194 return operands to normal and drop through. */
3196 if (commutative
>= 0)
3201 register enum reg_class tclass
;
3204 recog_operand
[commutative
] = substed_operand
[commutative
+ 1];
3205 recog_operand
[commutative
+ 1] = substed_operand
[commutative
];
3207 tclass
= preferred_class
[commutative
];
3208 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3209 preferred_class
[commutative
+ 1] = tclass
;
3211 t
= pref_or_nothing
[commutative
];
3212 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3213 pref_or_nothing
[commutative
+ 1] = t
;
3215 bcopy ((char *) constraints1
, (char *) constraints
,
3216 noperands
* sizeof (char *));
3221 recog_operand
[commutative
] = substed_operand
[commutative
];
3222 recog_operand
[commutative
+ 1] = substed_operand
[commutative
+ 1];
3226 /* The operands don't meet the constraints.
3227 goal_alternative describes the alternative
3228 that we could reach by reloading the fewest operands.
3229 Reload so as to fit it. */
3231 if (best
== MAX_RECOG_OPERANDS
+ 300)
3233 /* No alternative works with reloads?? */
3234 if (insn_code_number
>= 0)
3236 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3237 /* Avoid further trouble with this insn. */
3238 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3243 /* Jump to `finish' from above if all operands are valid already.
3244 In that case, goal_alternative_win is all 1. */
3247 /* Right now, for any pair of operands I and J that are required to match,
3249 goal_alternative_matches[J] is I.
3250 Set up goal_alternative_matched as the inverse function:
3251 goal_alternative_matched[I] = J. */
3253 for (i
= 0; i
< noperands
; i
++)
3254 goal_alternative_matched
[i
] = -1;
3256 for (i
= 0; i
< noperands
; i
++)
3257 if (! goal_alternative_win
[i
]
3258 && goal_alternative_matches
[i
] >= 0)
3259 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3261 /* If the best alternative is with operands 1 and 2 swapped,
3262 consider them swapped before reporting the reloads. Update the
3263 operand numbers of any reloads already pushed. */
3265 if (goal_alternative_swapped
)
3269 tem
= substed_operand
[commutative
];
3270 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3271 substed_operand
[commutative
+ 1] = tem
;
3272 tem
= recog_operand
[commutative
];
3273 recog_operand
[commutative
] = recog_operand
[commutative
+ 1];
3274 recog_operand
[commutative
+ 1] = tem
;
3276 for (i
= 0; i
< n_reloads
; i
++)
3278 if (reload_opnum
[i
] == commutative
)
3279 reload_opnum
[i
] = commutative
+ 1;
3280 else if (reload_opnum
[i
] == commutative
+ 1)
3281 reload_opnum
[i
] = commutative
;
3285 /* Perform whatever substitutions on the operands we are supposed
3286 to make due to commutativity or replacement of registers
3287 with equivalent constants or memory slots. */
3289 for (i
= 0; i
< noperands
; i
++)
3291 *recog_operand_loc
[i
] = substed_operand
[i
];
3292 /* While we are looping on operands, initialize this. */
3293 operand_reloadnum
[i
] = -1;
3295 /* If this is an earlyclobber operand, we need to widen the scope.
3296 The reload must remain valid from the start of the insn being
3297 reloaded until after the operand is stored into its destination.
3298 We approximate this with RELOAD_OTHER even though we know that we
3299 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3301 One special case that is worth checking is when we have an
3302 output that is earlyclobber but isn't used past the insn (typically
3303 a SCRATCH). In this case, we only need have the reload live
3304 through the insn itself, but not for any of our input or output
3307 In any case, anything needed to address this operand can remain
3308 however they were previously categorized. */
3310 if (goal_alternative_earlyclobber
[i
])
3312 = (find_reg_note (insn
, REG_UNUSED
, recog_operand
[i
])
3313 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3316 /* Any constants that aren't allowed and can't be reloaded
3317 into registers are here changed into memory references. */
3318 for (i
= 0; i
< noperands
; i
++)
3319 if (! goal_alternative_win
[i
]
3320 && CONSTANT_P (recog_operand
[i
])
3321 /* force_const_mem does not accept HIGH. */
3322 && GET_CODE (recog_operand
[i
]) != HIGH
3323 && (PREFERRED_RELOAD_CLASS (recog_operand
[i
],
3324 (enum reg_class
) goal_alternative
[i
])
3326 && operand_mode
[i
] != VOIDmode
)
3328 *recog_operand_loc
[i
] = recog_operand
[i
]
3329 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3331 i
, address_type
[i
], ind_levels
, 0);
3332 if (alternative_allows_memconst (constraints1
[i
],
3333 goal_alternative_number
))
3334 goal_alternative_win
[i
] = 1;
3337 /* Record the values of the earlyclobber operands for the caller. */
3338 if (goal_earlyclobber
)
3339 for (i
= 0; i
< noperands
; i
++)
3340 if (goal_alternative_earlyclobber
[i
])
3341 reload_earlyclobbers
[n_earlyclobbers
++] = recog_operand
[i
];
3343 /* Now record reloads for all the operands that need them. */
3344 for (i
= 0; i
< noperands
; i
++)
3345 if (! goal_alternative_win
[i
])
3347 /* Operands that match previous ones have already been handled. */
3348 if (goal_alternative_matches
[i
] >= 0)
3350 /* Handle an operand with a nonoffsettable address
3351 appearing where an offsettable address will do
3352 by reloading the address into a base register.
3354 ??? We can also do this when the operand is a register and
3355 reg_equiv_mem is not offsettable, but this is a bit tricky,
3356 so we don't bother with it. It may not be worth doing. */
3357 else if (goal_alternative_matched
[i
] == -1
3358 && goal_alternative_offmemok
[i
]
3359 && GET_CODE (recog_operand
[i
]) == MEM
)
3361 operand_reloadnum
[i
]
3362 = push_reload (XEXP (recog_operand
[i
], 0), NULL_RTX
,
3363 &XEXP (recog_operand
[i
], 0), NULL_PTR
,
3364 BASE_REG_CLASS
, GET_MODE (XEXP (recog_operand
[i
], 0)),
3365 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3366 reload_inc
[operand_reloadnum
[i
]]
3367 = GET_MODE_SIZE (GET_MODE (recog_operand
[i
]));
3369 /* If this operand is an output, we will have made any
3370 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3371 now we are treating part of the operand as an input, so
3372 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3374 if (modified
[i
] == RELOAD_WRITE
)
3375 for (j
= 0; j
< n_reloads
; j
++)
3376 if (reload_opnum
[j
] == i
3377 && reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3378 reload_when_needed
[j
] = RELOAD_FOR_INPUT_ADDRESS
;
3380 else if (goal_alternative_matched
[i
] == -1)
3381 operand_reloadnum
[i
] =
3382 push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3383 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3384 (modified
[i
] != RELOAD_WRITE
?
3385 recog_operand_loc
[i
] : 0),
3386 modified
[i
] != RELOAD_READ
? recog_operand_loc
[i
] : 0,
3387 (enum reg_class
) goal_alternative
[i
],
3388 (modified
[i
] == RELOAD_WRITE
3389 ? VOIDmode
: operand_mode
[i
]),
3390 (modified
[i
] == RELOAD_READ
3391 ? VOIDmode
: operand_mode
[i
]),
3392 (insn_code_number
< 0 ? 0
3393 : insn_operand_strict_low
[insn_code_number
][i
]),
3394 0, i
, operand_type
[i
]);
3395 /* In a matching pair of operands, one must be input only
3396 and the other must be output only.
3397 Pass the input operand as IN and the other as OUT. */
3398 else if (modified
[i
] == RELOAD_READ
3399 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3401 operand_reloadnum
[i
]
3402 = push_reload (recog_operand
[i
],
3403 recog_operand
[goal_alternative_matched
[i
]],
3404 recog_operand_loc
[i
],
3405 recog_operand_loc
[goal_alternative_matched
[i
]],
3406 (enum reg_class
) goal_alternative
[i
],
3408 operand_mode
[goal_alternative_matched
[i
]],
3409 0, 0, i
, RELOAD_OTHER
);
3410 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3412 else if (modified
[i
] == RELOAD_WRITE
3413 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3415 operand_reloadnum
[goal_alternative_matched
[i
]]
3416 = push_reload (recog_operand
[goal_alternative_matched
[i
]],
3418 recog_operand_loc
[goal_alternative_matched
[i
]],
3419 recog_operand_loc
[i
],
3420 (enum reg_class
) goal_alternative
[i
],
3421 operand_mode
[goal_alternative_matched
[i
]],
3423 0, 0, i
, RELOAD_OTHER
);
3424 operand_reloadnum
[i
] = output_reloadnum
;
3426 else if (insn_code_number
>= 0)
3430 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3431 /* Avoid further trouble with this insn. */
3432 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3437 else if (goal_alternative_matched
[i
] < 0
3438 && goal_alternative_matches
[i
] < 0
3441 /* For each non-matching operand that's a MEM or a pseudo-register
3442 that didn't get a hard register, make an optional reload.
3443 This may get done even if the insn needs no reloads otherwise. */
3445 rtx operand
= recog_operand
[i
];
3447 while (GET_CODE (operand
) == SUBREG
)
3448 operand
= XEXP (operand
, 0);
3449 if ((GET_CODE (operand
) == MEM
3450 || (GET_CODE (operand
) == REG
3451 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3452 && (enum reg_class
) goal_alternative
[i
] != NO_REGS
3453 && ! no_input_reloads
3454 /* Optional output reloads don't do anything and we mustn't
3455 make in-out reloads on insns that are not permitted output
3457 && (modified
[i
] == RELOAD_READ
3458 || (modified
[i
] == RELOAD_READ_WRITE
&& ! no_output_reloads
)))
3459 operand_reloadnum
[i
]
3460 = push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3461 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3462 (modified
[i
] != RELOAD_WRITE
3463 ? recog_operand_loc
[i
] : 0),
3464 (modified
[i
] != RELOAD_READ
3465 ? recog_operand_loc
[i
] : 0),
3466 (enum reg_class
) goal_alternative
[i
],
3467 (modified
[i
] == RELOAD_WRITE
3468 ? VOIDmode
: operand_mode
[i
]),
3469 (modified
[i
] == RELOAD_READ
3470 ? VOIDmode
: operand_mode
[i
]),
3471 (insn_code_number
< 0 ? 0
3472 : insn_operand_strict_low
[insn_code_number
][i
]),
3473 1, i
, operand_type
[i
]);
3475 else if (goal_alternative_matches
[i
] >= 0
3476 && goal_alternative_win
[goal_alternative_matches
[i
]]
3477 && modified
[i
] == RELOAD_READ
3478 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3479 && ! no_input_reloads
&& ! no_output_reloads
3482 /* Similarly, make an optional reload for a pair of matching
3483 objects that are in MEM or a pseudo that didn't get a hard reg. */
3485 rtx operand
= recog_operand
[i
];
3487 while (GET_CODE (operand
) == SUBREG
)
3488 operand
= XEXP (operand
, 0);
3489 if ((GET_CODE (operand
) == MEM
3490 || (GET_CODE (operand
) == REG
3491 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3492 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3494 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3495 = push_reload (recog_operand
[goal_alternative_matches
[i
]],
3497 recog_operand_loc
[goal_alternative_matches
[i
]],
3498 recog_operand_loc
[i
],
3499 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3500 operand_mode
[goal_alternative_matches
[i
]],
3502 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3505 /* If this insn pattern contains any MATCH_DUP's, make sure that
3506 they will be substituted if the operands they match are substituted.
3507 Also do now any substitutions we already did on the operands.
3509 Don't do this if we aren't making replacements because we might be
3510 propagating things allocated by frame pointer elimination into places
3511 it doesn't expect. */
3513 if (insn_code_number
>= 0 && replace
)
3514 for (i
= insn_n_dups
[insn_code_number
] - 1; i
>= 0; i
--)
3516 int opno
= recog_dup_num
[i
];
3517 *recog_dup_loc
[i
] = *recog_operand_loc
[opno
];
3518 if (operand_reloadnum
[opno
] >= 0)
3519 push_replacement (recog_dup_loc
[i
], operand_reloadnum
[opno
],
3520 insn_operand_mode
[insn_code_number
][opno
]);
3524 /* This loses because reloading of prior insns can invalidate the equivalence
3525 (or at least find_equiv_reg isn't smart enough to find it any more),
3526 causing this insn to need more reload regs than it needed before.
3527 It may be too late to make the reload regs available.
3528 Now this optimization is done safely in choose_reload_regs. */
3530 /* For each reload of a reg into some other class of reg,
3531 search for an existing equivalent reg (same value now) in the right class.
3532 We can use it as long as we don't need to change its contents. */
3533 for (i
= 0; i
< n_reloads
; i
++)
3534 if (reload_reg_rtx
[i
] == 0
3535 && reload_in
[i
] != 0
3536 && GET_CODE (reload_in
[i
]) == REG
3537 && reload_out
[i
] == 0)
3540 = find_equiv_reg (reload_in
[i
], insn
, reload_reg_class
[i
], -1,
3541 static_reload_reg_p
, 0, reload_inmode
[i
]);
3542 /* Prevent generation of insn to load the value
3543 because the one we found already has the value. */
3544 if (reload_reg_rtx
[i
])
3545 reload_in
[i
] = reload_reg_rtx
[i
];
3549 /* Perhaps an output reload can be combined with another
3550 to reduce needs by one. */
3551 if (!goal_earlyclobber
)
3554 /* If we have a pair of reloads for parts of an address, they are reloading
3555 the same object, the operands themselves were not reloaded, and they
3556 are for two operands that are supposed to match, merge the reloads and
3557 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3559 for (i
= 0; i
< n_reloads
; i
++)
3563 for (j
= i
+ 1; j
< n_reloads
; j
++)
3564 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3565 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3566 && (reload_when_needed
[j
] == RELOAD_FOR_INPUT_ADDRESS
3567 || reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3568 && rtx_equal_p (reload_in
[i
], reload_in
[j
])
3569 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3570 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]])
3571 && (operand_reloadnum
[reload_opnum
[j
]] < 0
3572 || reload_optional
[operand_reloadnum
[reload_opnum
[j
]]])
3573 && (goal_alternative_matches
[reload_opnum
[i
]] == reload_opnum
[j
]
3574 || (goal_alternative_matches
[reload_opnum
[j
]]
3575 == reload_opnum
[i
])))
3577 for (k
= 0; k
< n_replacements
; k
++)
3578 if (replacements
[k
].what
== j
)
3579 replacements
[k
].what
= i
;
3581 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3586 /* Scan all the reloads and update their type.
3587 If a reload is for the address of an operand and we didn't reload
3588 that operand, change the type. Similarly, change the operand number
3589 of a reload when two operands match. If a reload is optional, treat it
3590 as though the operand isn't reloaded.
3592 ??? This latter case is somewhat odd because if we do the optional
3593 reload, it means the object is hanging around. Thus we need only
3594 do the address reload if the optional reload was NOT done.
3596 Change secondary reloads to be the address type of their operand, not
3599 If an operand's reload is now RELOAD_OTHER, change any
3600 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3601 RELOAD_FOR_OTHER_ADDRESS. */
3603 for (i
= 0; i
< n_reloads
; i
++)
3605 if (reload_secondary_p
[i
]
3606 && reload_when_needed
[i
] == operand_type
[reload_opnum
[i
]])
3607 reload_when_needed
[i
] = address_type
[reload_opnum
[i
]];
3609 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3610 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3611 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3612 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]]))
3614 /* If we have a secondary reload to go along with this reload,
3615 change its type to RELOAD_FOR_OPADDR_ADDR. */
3617 if (reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3618 && reload_secondary_in_reload
[i
] != -1)
3620 int secondary_in_reload
= reload_secondary_in_reload
[i
];
3622 reload_when_needed
[secondary_in_reload
] =
3623 RELOAD_FOR_OPADDR_ADDR
;
3625 /* If there's a tertiary reload we have to change it also. */
3626 if (secondary_in_reload
> 0
3627 && reload_secondary_in_reload
[secondary_in_reload
] != -1)
3628 reload_when_needed
[reload_secondary_in_reload
[secondary_in_reload
]]
3629 = RELOAD_FOR_OPADDR_ADDR
;
3632 if (reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
3633 && reload_secondary_out_reload
[i
] != -1)
3635 int secondary_out_reload
= reload_secondary_out_reload
[i
];
3637 reload_when_needed
[secondary_out_reload
] =
3638 RELOAD_FOR_OPADDR_ADDR
;
3640 /* If there's a tertiary reload we have to change it also. */
3641 if (secondary_out_reload
3642 && reload_secondary_out_reload
[secondary_out_reload
] != -1)
3643 reload_when_needed
[reload_secondary_out_reload
[secondary_out_reload
]]
3644 = RELOAD_FOR_OPADDR_ADDR
;
3646 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3649 if (reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3650 && operand_reloadnum
[reload_opnum
[i
]] >= 0
3651 && (reload_when_needed
[operand_reloadnum
[reload_opnum
[i
]]]
3653 reload_when_needed
[i
] = RELOAD_FOR_OTHER_ADDRESS
;
3655 if (goal_alternative_matches
[reload_opnum
[i
]] >= 0)
3656 reload_opnum
[i
] = goal_alternative_matches
[reload_opnum
[i
]];
3659 /* See if we have any reloads that are now allowed to be merged
3660 because we've changed when the reload is needed to
3661 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3662 check for the most common cases. */
3664 for (i
= 0; i
< n_reloads
; i
++)
3665 if (reload_in
[i
] != 0 && reload_out
[i
] == 0
3666 && (reload_when_needed
[i
] == RELOAD_FOR_OPERAND_ADDRESS
3667 || reload_when_needed
[i
] == RELOAD_FOR_OTHER_ADDRESS
))
3668 for (j
= 0; j
< n_reloads
; j
++)
3669 if (i
!= j
&& reload_in
[j
] != 0 && reload_out
[j
] == 0
3670 && reload_when_needed
[j
] == reload_when_needed
[i
]
3671 && MATCHES (reload_in
[i
], reload_in
[j
])
3672 && reload_reg_class
[i
] == reload_reg_class
[j
]
3673 && !reload_nocombine
[i
] && !reload_nocombine
[j
]
3674 && reload_reg_rtx
[i
] == reload_reg_rtx
[j
])
3676 reload_opnum
[i
] = MIN (reload_opnum
[i
], reload_opnum
[j
]);
3677 transfer_replacements (i
, j
);
3681 #else /* no REGISTER_CONSTRAINTS */
3683 int insn_code_number
;
3684 int goal_earlyclobber
= 0; /* Always 0, to make combine_reloads happen. */
3686 rtx body
= PATTERN (insn
);
3690 n_earlyclobbers
= 0;
3691 replace_reloads
= replace
;
3694 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3695 Store the operand values in RECOG_OPERAND and the locations
3696 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3697 Return if the insn needs no reload processing. */
3699 switch (GET_CODE (body
))
3710 noperands
= asm_noperands (body
);
3713 /* This insn is an `asm' with operands.
3714 First, find out how many operands, and allocate space. */
3716 insn_code_number
= -1;
3717 /* ??? This is a bug! ???
3718 Give up and delete this insn if it has too many operands. */
3719 if (noperands
> MAX_RECOG_OPERANDS
)
3722 /* Now get the operand values out of the insn. */
3724 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
3725 NULL_PTR
, NULL_PTR
);
3730 /* Ordinary insn: recognize it, allocate space for operands and
3731 constraints, and get them out via insn_extract. */
3733 insn_code_number
= recog_memoized (insn
);
3734 noperands
= insn_n_operands
[insn_code_number
];
3735 insn_extract (insn
);
3741 for (i
= 0; i
< noperands
; i
++)
3743 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
3744 int is_set_dest
= GET_CODE (body
) == SET
&& (i
== 0);
3746 if (insn_code_number
>= 0)
3747 if (insn_operand_address_p
[insn_code_number
][i
])
3748 find_reloads_address (VOIDmode
, NULL_PTR
,
3749 recog_operand
[i
], recog_operand_loc
[i
],
3750 i
, RELOAD_FOR_INPUT
, ind_levels
);
3752 /* In these cases, we can't tell if the operand is an input
3753 or an output, so be conservative. In practice it won't be
3757 find_reloads_address (GET_MODE (recog_operand
[i
]),
3758 recog_operand_loc
[i
],
3759 XEXP (recog_operand
[i
], 0),
3760 &XEXP (recog_operand
[i
], 0),
3761 i
, RELOAD_OTHER
, ind_levels
);
3763 recog_operand
[i
] = *recog_operand_loc
[i
]
3764 = find_reloads_toplev (recog_operand
[i
], i
, RELOAD_OTHER
,
3765 ind_levels
, is_set_dest
);
3768 register int regno
= REGNO (recog_operand
[i
]);
3769 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3770 recog_operand
[i
] = *recog_operand_loc
[i
]
3771 = reg_equiv_constant
[regno
];
3772 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3773 that feeds this insn. */
3774 if (reg_equiv_mem
[regno
] != 0)
3775 recog_operand
[i
] = *recog_operand_loc
[i
]
3776 = reg_equiv_mem
[regno
];
3781 /* Perhaps an output reload can be combined with another
3782 to reduce needs by one. */
3783 if (!goal_earlyclobber
)
3785 #endif /* no REGISTER_CONSTRAINTS */
3788 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3789 accepts a memory operand with constant address. */
3792 alternative_allows_memconst (constraint
, altnum
)
3797 /* Skip alternatives before the one requested. */
3800 while (*constraint
++ != ',');
3803 /* Scan the requested alternative for 'm' or 'o'.
3804 If one of them is present, this alternative accepts memory constants. */
3805 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
3806 if (c
== 'm' || c
== 'o')
3811 /* Scan X for memory references and scan the addresses for reloading.
3812 Also checks for references to "constant" regs that we want to eliminate
3813 and replaces them with the values they stand for.
3814 We may alter X destructively if it contains a reference to such.
3815 If X is just a constant reg, we return the equivalent value
3818 IND_LEVELS says how many levels of indirect addressing this machine
3821 OPNUM and TYPE identify the purpose of the reload.
3823 IS_SET_DEST is true if X is the destination of a SET, which is not
3824 appropriate to be replaced by a constant. */
3827 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
)
3830 enum reload_type type
;
3834 register RTX_CODE code
= GET_CODE (x
);
3836 register char *fmt
= GET_RTX_FORMAT (code
);
3841 /* This code is duplicated for speed in find_reloads. */
3842 register int regno
= REGNO (x
);
3843 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3844 x
= reg_equiv_constant
[regno
];
3846 /* This creates (subreg (mem...)) which would cause an unnecessary
3847 reload of the mem. */
3848 else if (reg_equiv_mem
[regno
] != 0)
3849 x
= reg_equiv_mem
[regno
];
3851 else if (reg_equiv_address
[regno
] != 0)
3853 /* If reg_equiv_address varies, it may be shared, so copy it. */
3854 rtx addr
= reg_equiv_address
[regno
];
3856 if (rtx_varies_p (addr
))
3857 addr
= copy_rtx (addr
);
3859 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
3860 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3861 find_reloads_address (GET_MODE (x
), NULL_PTR
,
3863 &XEXP (x
, 0), opnum
, type
, ind_levels
);
3870 find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
3871 opnum
, type
, ind_levels
);
3875 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
3877 /* Check for SUBREG containing a REG that's equivalent to a constant.
3878 If the constant has a known value, truncate it right now.
3879 Similarly if we are extracting a single-word of a multi-word
3880 constant. If the constant is symbolic, allow it to be substituted
3881 normally. push_reload will strip the subreg later. If the
3882 constant is VOIDmode, abort because we will lose the mode of
3883 the register (this should never happen because one of the cases
3884 above should handle it). */
3886 register int regno
= REGNO (SUBREG_REG (x
));
3889 if (subreg_lowpart_p (x
)
3890 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3891 && reg_equiv_constant
[regno
] != 0
3892 && (tem
= gen_lowpart_common (GET_MODE (x
),
3893 reg_equiv_constant
[regno
])) != 0)
3896 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
3897 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3898 && reg_equiv_constant
[regno
] != 0
3899 && (tem
= operand_subword (reg_equiv_constant
[regno
],
3901 GET_MODE (SUBREG_REG (x
)))) != 0)
3904 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3905 && reg_equiv_constant
[regno
] != 0
3906 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
3909 /* If the subreg contains a reg that will be converted to a mem,
3910 convert the subreg to a narrower memref now.
3911 Otherwise, we would get (subreg (mem ...) ...),
3912 which would force reload of the mem.
3914 We also need to do this if there is an equivalent MEM that is
3915 not offsettable. In that case, alter_subreg would produce an
3916 invalid address on big-endian machines.
3918 For machines that extend byte loads, we must not reload using
3919 a wider mode if we have a paradoxical SUBREG. find_reloads will
3920 force a reload in that case. So we should not do anything here. */
3922 else if (regno
>= FIRST_PSEUDO_REGISTER
3923 #ifdef LOAD_EXTEND_OP
3924 && (GET_MODE_SIZE (GET_MODE (x
))
3925 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
3927 && (reg_equiv_address
[regno
] != 0
3928 || (reg_equiv_mem
[regno
] != 0
3929 && (! strict_memory_address_p (GET_MODE (x
),
3930 XEXP (reg_equiv_mem
[regno
], 0))
3931 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))))
3933 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
3934 rtx addr
= (reg_equiv_address
[regno
] ? reg_equiv_address
[regno
]
3935 : XEXP (reg_equiv_mem
[regno
], 0));
3936 #if BYTES_BIG_ENDIAN
3938 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
3939 offset
+= MIN (size
, UNITS_PER_WORD
);
3940 size
= GET_MODE_SIZE (GET_MODE (x
));
3941 offset
-= MIN (size
, UNITS_PER_WORD
);
3943 addr
= plus_constant (addr
, offset
);
3944 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
3945 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3946 find_reloads_address (GET_MODE (x
), NULL_PTR
,
3948 &XEXP (x
, 0), opnum
, type
, ind_levels
);
3953 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3956 XEXP (x
, i
) = find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
3957 ind_levels
, is_set_dest
);
3962 /* Return a mem ref for the memory equivalent of reg REGNO.
3963 This mem ref is not shared with anything. */
3966 make_memloc (ad
, regno
)
3971 rtx tem
= reg_equiv_address
[regno
];
3973 #if 0 /* We cannot safely reuse a memloc made here;
3974 if the pseudo appears twice, and its mem needs a reload,
3975 it gets two separate reloads assigned, but it only
3976 gets substituted with the second of them;
3977 then it can get used before that reload reg gets loaded up. */
3978 for (i
= 0; i
< n_memlocs
; i
++)
3979 if (rtx_equal_p (tem
, XEXP (memlocs
[i
], 0)))
3983 /* If TEM might contain a pseudo, we must copy it to avoid
3984 modifying it when we do the substitution for the reload. */
3985 if (rtx_varies_p (tem
))
3986 tem
= copy_rtx (tem
);
3988 tem
= gen_rtx (MEM
, GET_MODE (ad
), tem
);
3989 RTX_UNCHANGING_P (tem
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3990 memlocs
[n_memlocs
++] = tem
;
3994 /* Record all reloads needed for handling memory address AD
3995 which appears in *LOC in a memory reference to mode MODE
3996 which itself is found in location *MEMREFLOC.
3997 Note that we take shortcuts assuming that no multi-reg machine mode
3998 occurs as part of an address.
4000 OPNUM and TYPE specify the purpose of this reload.
4002 IND_LEVELS says how many levels of indirect addressing this machine
4005 Value is nonzero if this address is reloaded or replaced as a whole.
4006 This is interesting to the caller if the address is an autoincrement.
4008 Note that there is no verification that the address will be valid after
4009 this routine does its work. Instead, we rely on the fact that the address
4010 was valid when reload started. So we need only undo things that reload
4011 could have broken. These are wrong register types, pseudos not allocated
4012 to a hard register, and frame pointer elimination. */
4015 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
)
4016 enum machine_mode mode
;
4021 enum reload_type type
;
4027 /* If the address is a register, see if it is a legitimate address and
4028 reload if not. We first handle the cases where we need not reload
4029 or where we must reload in a non-standard way. */
4031 if (GET_CODE (ad
) == REG
)
4035 if (reg_equiv_constant
[regno
] != 0
4036 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
4038 *loc
= ad
= reg_equiv_constant
[regno
];
4042 else if (reg_equiv_address
[regno
] != 0)
4044 tem
= make_memloc (ad
, regno
);
4045 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
4046 &XEXP (tem
, 0), opnum
, type
, ind_levels
);
4047 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4048 GET_MODE (ad
), VOIDmode
, 0, 0,
4053 /* We can avoid a reload if the register's equivalent memory expression
4054 is valid as an indirect memory address.
4055 But not all addresses are valid in a mem used as an indirect address:
4056 only reg or reg+constant. */
4058 else if (reg_equiv_mem
[regno
] != 0 && ind_levels
> 0
4059 && strict_memory_address_p (mode
, reg_equiv_mem
[regno
])
4060 && (GET_CODE (XEXP (reg_equiv_mem
[regno
], 0)) == REG
4061 || (GET_CODE (XEXP (reg_equiv_mem
[regno
], 0)) == PLUS
4062 && GET_CODE (XEXP (XEXP (reg_equiv_mem
[regno
], 0), 0)) == REG
4063 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem
[regno
], 0), 0)))))
4066 /* The only remaining case where we can avoid a reload is if this is a
4067 hard register that is valid as a base register and which is not the
4068 subject of a CLOBBER in this insn. */
4070 else if (regno
< FIRST_PSEUDO_REGISTER
&& REGNO_OK_FOR_BASE_P (regno
)
4071 && ! regno_clobbered_p (regno
, this_insn
))
4074 /* If we do not have one of the cases above, we must do the reload. */
4075 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4076 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4080 if (strict_memory_address_p (mode
, ad
))
4082 /* The address appears valid, so reloads are not needed.
4083 But the address may contain an eliminable register.
4084 This can happen because a machine with indirect addressing
4085 may consider a pseudo register by itself a valid address even when
4086 it has failed to get a hard reg.
4087 So do a tree-walk to find and eliminate all such regs. */
4089 /* But first quickly dispose of a common case. */
4090 if (GET_CODE (ad
) == PLUS
4091 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4092 && GET_CODE (XEXP (ad
, 0)) == REG
4093 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4096 subst_reg_equivs_changed
= 0;
4097 *loc
= subst_reg_equivs (ad
);
4099 if (! subst_reg_equivs_changed
)
4102 /* Check result for validity after substitution. */
4103 if (strict_memory_address_p (mode
, ad
))
4107 /* The address is not valid. We have to figure out why. One possibility
4108 is that it is itself a MEM. This can happen when the frame pointer is
4109 being eliminated, a pseudo is not allocated to a hard register, and the
4110 offset between the frame and stack pointers is not its initial value.
4111 In that case the pseudo will have been replaced by a MEM referring to
4112 the stack pointer. */
4113 if (GET_CODE (ad
) == MEM
)
4115 /* First ensure that the address in this MEM is valid. Then, unless
4116 indirect addresses are valid, reload the MEM into a register. */
4118 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4119 opnum
, type
, ind_levels
== 0 ? 0 : ind_levels
- 1);
4121 /* If tem was changed, then we must create a new memory reference to
4122 hold it and store it back into memrefloc. */
4123 if (tem
!= ad
&& memrefloc
)
4125 *memrefloc
= copy_rtx (*memrefloc
);
4126 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4127 loc
= &XEXP (*memrefloc
, 0);
4130 /* Check similar cases as for indirect addresses as above except
4131 that we can allow pseudos and a MEM since they should have been
4132 taken care of above. */
4135 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4136 || GET_CODE (XEXP (tem
, 0)) == MEM
4137 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4138 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4139 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4140 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4142 /* Must use TEM here, not AD, since it is the one that will
4143 have any subexpressions reloaded, if needed. */
4144 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4145 BASE_REG_CLASS
, GET_MODE (tem
), VOIDmode
, 0,
4153 /* If we have address of a stack slot but it's not valid
4154 (displacement is too large), compute the sum in a register. */
4155 else if (GET_CODE (ad
) == PLUS
4156 && (XEXP (ad
, 0) == frame_pointer_rtx
4157 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4158 || XEXP (ad
, 0) == hard_frame_pointer_rtx
4160 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4161 || XEXP (ad
, 0) == arg_pointer_rtx
4163 || XEXP (ad
, 0) == stack_pointer_rtx
)
4164 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4166 /* Unshare the MEM rtx so we can safely alter it. */
4169 *memrefloc
= copy_rtx (*memrefloc
);
4170 loc
= &XEXP (*memrefloc
, 0);
4172 if (double_reg_address_ok
)
4174 /* Unshare the sum as well. */
4175 *loc
= ad
= copy_rtx (ad
);
4176 /* Reload the displacement into an index reg.
4177 We assume the frame pointer or arg pointer is a base reg. */
4178 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4179 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4184 /* If the sum of two regs is not necessarily valid,
4185 reload the sum into a base reg.
4186 That will at least work. */
4187 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
,
4188 opnum
, type
, ind_levels
);
4193 /* If we have an indexed stack slot, there are three possible reasons why
4194 it might be invalid: The index might need to be reloaded, the address
4195 might have been made by frame pointer elimination and hence have a
4196 constant out of range, or both reasons might apply.
4198 We can easily check for an index needing reload, but even if that is the
4199 case, we might also have an invalid constant. To avoid making the
4200 conservative assumption and requiring two reloads, we see if this address
4201 is valid when not interpreted strictly. If it is, the only problem is
4202 that the index needs a reload and find_reloads_address_1 will take care
4205 There is still a case when we might generate an extra reload,
4206 however. In certain cases eliminate_regs will return a MEM for a REG
4207 (see the code there for details). In those cases, memory_address_p
4208 applied to our address will return 0 so we will think that our offset
4209 must be too large. But it might indeed be valid and the only problem
4210 is that a MEM is present where a REG should be. This case should be
4211 very rare and there doesn't seem to be any way to avoid it.
4213 If we decide to do something here, it must be that
4214 `double_reg_address_ok' is true and that this address rtl was made by
4215 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4216 rework the sum so that the reload register will be added to the index.
4217 This is safe because we know the address isn't shared.
4219 We check for fp/ap/sp as both the first and second operand of the
4222 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4223 && GET_CODE (XEXP (ad
, 0)) == PLUS
4224 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4225 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4226 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4228 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4229 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4231 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4232 && ! memory_address_p (mode
, ad
))
4234 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4235 plus_constant (XEXP (XEXP (ad
, 0), 0),
4236 INTVAL (XEXP (ad
, 1))),
4237 XEXP (XEXP (ad
, 0), 1));
4238 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4239 GET_MODE (ad
), opnum
, type
, ind_levels
);
4240 find_reloads_address_1 (XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
, type
, 0);
4245 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4246 && GET_CODE (XEXP (ad
, 0)) == PLUS
4247 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4248 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4249 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4251 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4252 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4254 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4255 && ! memory_address_p (mode
, ad
))
4257 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4258 XEXP (XEXP (ad
, 0), 0),
4259 plus_constant (XEXP (XEXP (ad
, 0), 1),
4260 INTVAL (XEXP (ad
, 1))));
4261 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1), BASE_REG_CLASS
,
4262 GET_MODE (ad
), opnum
, type
, ind_levels
);
4263 find_reloads_address_1 (XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
, type
, 0);
4268 /* See if address becomes valid when an eliminable register
4269 in a sum is replaced. */
4272 if (GET_CODE (ad
) == PLUS
)
4273 tem
= subst_indexed_address (ad
);
4274 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4276 /* Ok, we win that way. Replace any additional eliminable
4279 subst_reg_equivs_changed
= 0;
4280 tem
= subst_reg_equivs (tem
);
4282 /* Make sure that didn't make the address invalid again. */
4284 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4291 /* If constants aren't valid addresses, reload the constant address
4293 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4295 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4296 Unshare it so we can safely alter it. */
4297 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4298 && CONSTANT_POOL_ADDRESS_P (ad
))
4300 *memrefloc
= copy_rtx (*memrefloc
);
4301 loc
= &XEXP (*memrefloc
, 0);
4304 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4309 return find_reloads_address_1 (ad
, 0, loc
, opnum
, type
, ind_levels
);
4312 /* Find all pseudo regs appearing in AD
4313 that are eliminable in favor of equivalent values
4314 and do not have hard regs; replace them by their equivalents. */
4317 subst_reg_equivs (ad
)
4320 register RTX_CODE code
= GET_CODE (ad
);
4338 register int regno
= REGNO (ad
);
4340 if (reg_equiv_constant
[regno
] != 0)
4342 subst_reg_equivs_changed
= 1;
4343 return reg_equiv_constant
[regno
];
4349 /* Quickly dispose of a common case. */
4350 if (XEXP (ad
, 0) == frame_pointer_rtx
4351 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4355 fmt
= GET_RTX_FORMAT (code
);
4356 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4358 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
));
4362 /* Compute the sum of X and Y, making canonicalizations assumed in an
4363 address, namely: sum constant integers, surround the sum of two
4364 constants with a CONST, put the constant as the second operand, and
4365 group the constant on the outermost sum.
4367 This routine assumes both inputs are already in canonical form. */
4374 enum machine_mode mode
= GET_MODE (x
);
4376 if (mode
== VOIDmode
)
4377 mode
= GET_MODE (y
);
4379 if (mode
== VOIDmode
)
4382 if (GET_CODE (x
) == CONST_INT
)
4383 return plus_constant (y
, INTVAL (x
));
4384 else if (GET_CODE (y
) == CONST_INT
)
4385 return plus_constant (x
, INTVAL (y
));
4386 else if (CONSTANT_P (x
))
4387 tem
= x
, x
= y
, y
= tem
;
4389 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4390 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4392 /* Note that if the operands of Y are specified in the opposite
4393 order in the recursive calls below, infinite recursion will occur. */
4394 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4395 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4397 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4398 constant will have been placed second. */
4399 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4401 if (GET_CODE (x
) == CONST
)
4403 if (GET_CODE (y
) == CONST
)
4406 return gen_rtx (CONST
, VOIDmode
, gen_rtx (PLUS
, mode
, x
, y
));
4409 return gen_rtx (PLUS
, mode
, x
, y
);
4412 /* If ADDR is a sum containing a pseudo register that should be
4413 replaced with a constant (from reg_equiv_constant),
4414 return the result of doing so, and also apply the associative
4415 law so that the result is more likely to be a valid address.
4416 (But it is not guaranteed to be one.)
4418 Note that at most one register is replaced, even if more are
4419 replaceable. Also, we try to put the result into a canonical form
4420 so it is more likely to be a valid address.
4422 In all other cases, return ADDR. */
4425 subst_indexed_address (addr
)
4428 rtx op0
= 0, op1
= 0, op2
= 0;
4432 if (GET_CODE (addr
) == PLUS
)
4434 /* Try to find a register to replace. */
4435 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4436 if (GET_CODE (op0
) == REG
4437 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4438 && reg_renumber
[regno
] < 0
4439 && reg_equiv_constant
[regno
] != 0)
4440 op0
= reg_equiv_constant
[regno
];
4441 else if (GET_CODE (op1
) == REG
4442 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4443 && reg_renumber
[regno
] < 0
4444 && reg_equiv_constant
[regno
] != 0)
4445 op1
= reg_equiv_constant
[regno
];
4446 else if (GET_CODE (op0
) == PLUS
4447 && (tem
= subst_indexed_address (op0
)) != op0
)
4449 else if (GET_CODE (op1
) == PLUS
4450 && (tem
= subst_indexed_address (op1
)) != op1
)
4455 /* Pick out up to three things to add. */
4456 if (GET_CODE (op1
) == PLUS
)
4457 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4458 else if (GET_CODE (op0
) == PLUS
)
4459 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4461 /* Compute the sum. */
4463 op1
= form_sum (op1
, op2
);
4465 op0
= form_sum (op0
, op1
);
4472 /* Record the pseudo registers we must reload into hard registers
4473 in a subexpression of a would-be memory address, X.
4474 (This function is not called if the address we find is strictly valid.)
4475 CONTEXT = 1 means we are considering regs as index regs,
4476 = 0 means we are considering them as base regs.
4478 OPNUM and TYPE specify the purpose of any reloads made.
4480 IND_LEVELS says how many levels of indirect addressing are
4481 supported at this point in the address.
4483 We return nonzero if X, as a whole, is reloaded or replaced. */
4485 /* Note that we take shortcuts assuming that no multi-reg machine mode
4486 occurs as part of an address.
4487 Also, this is not fully machine-customizable; it works for machines
4488 such as vaxes and 68000's and 32000's, but other possible machines
4489 could have addressing modes that this does not handle right. */
4492 find_reloads_address_1 (x
, context
, loc
, opnum
, type
, ind_levels
)
4497 enum reload_type type
;
4500 register RTX_CODE code
= GET_CODE (x
);
4506 register rtx orig_op0
= XEXP (x
, 0);
4507 register rtx orig_op1
= XEXP (x
, 1);
4508 register RTX_CODE code0
= GET_CODE (orig_op0
);
4509 register RTX_CODE code1
= GET_CODE (orig_op1
);
4510 register rtx op0
= orig_op0
;
4511 register rtx op1
= orig_op1
;
4513 if (GET_CODE (op0
) == SUBREG
)
4515 op0
= SUBREG_REG (op0
);
4516 code0
= GET_CODE (op0
);
4519 if (GET_CODE (op1
) == SUBREG
)
4521 op1
= SUBREG_REG (op1
);
4522 code1
= GET_CODE (op1
);
4525 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code1
== MEM
)
4527 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4529 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4533 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code0
== MEM
)
4535 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4537 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4541 else if (code0
== CONST_INT
|| code0
== CONST
4542 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
4543 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4546 else if (code1
== CONST_INT
|| code1
== CONST
4547 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
4548 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4551 else if (code0
== REG
&& code1
== REG
)
4553 if (REG_OK_FOR_INDEX_P (op0
)
4554 && REG_OK_FOR_BASE_P (op1
))
4556 else if (REG_OK_FOR_INDEX_P (op1
)
4557 && REG_OK_FOR_BASE_P (op0
))
4559 else if (REG_OK_FOR_BASE_P (op1
))
4560 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4562 else if (REG_OK_FOR_BASE_P (op0
))
4563 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4565 else if (REG_OK_FOR_INDEX_P (op1
))
4566 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4568 else if (REG_OK_FOR_INDEX_P (op0
))
4569 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4573 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4575 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4580 else if (code0
== REG
)
4582 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4584 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4588 else if (code1
== REG
)
4590 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4592 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4603 if (GET_CODE (XEXP (x
, 0)) == REG
)
4605 register int regno
= REGNO (XEXP (x
, 0));
4609 /* A register that is incremented cannot be constant! */
4610 if (regno
>= FIRST_PSEUDO_REGISTER
4611 && reg_equiv_constant
[regno
] != 0)
4614 /* Handle a register that is equivalent to a memory location
4615 which cannot be addressed directly. */
4616 if (reg_equiv_address
[regno
] != 0)
4618 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
4619 /* First reload the memory location's address. */
4620 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
4621 &XEXP (tem
, 0), opnum
, type
, ind_levels
);
4622 /* Put this inside a new increment-expression. */
4623 x
= gen_rtx (GET_CODE (x
), GET_MODE (x
), tem
);
4624 /* Proceed to reload that, as if it contained a register. */
4627 /* If we have a hard register that is ok as an index,
4628 don't make a reload. If an autoincrement of a nice register
4629 isn't "valid", it must be that no autoincrement is "valid".
4630 If that is true and something made an autoincrement anyway,
4631 this must be a special context where one is allowed.
4632 (For example, a "push" instruction.)
4633 We can't improve this address, so leave it alone. */
4635 /* Otherwise, reload the autoincrement into a suitable hard reg
4636 and record how much to increment by. */
4638 if (reg_renumber
[regno
] >= 0)
4639 regno
= reg_renumber
[regno
];
4640 if ((regno
>= FIRST_PSEUDO_REGISTER
4641 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4642 : REGNO_OK_FOR_BASE_P (regno
))))
4647 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4648 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4649 GET_MODE (x
), GET_MODE (x
), VOIDmode
, 0,
4651 reload_inc
[reloadnum
]
4652 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
4657 /* Update the REG_INC notes. */
4659 for (link
= REG_NOTES (this_insn
);
4660 link
; link
= XEXP (link
, 1))
4661 if (REG_NOTE_KIND (link
) == REG_INC
4662 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
4663 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4669 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
4671 /* This is probably the result of a substitution, by eliminate_regs,
4672 of an equivalent address for a pseudo that was not allocated to a
4673 hard register. Verify that the specified address is valid and
4674 reload it into a register. */
4675 rtx tem
= XEXP (x
, 0);
4679 /* Since we know we are going to reload this item, don't decrement
4680 for the indirection level.
4682 Note that this is actually conservative: it would be slightly
4683 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4685 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
4686 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
4687 opnum
, type
, ind_levels
);
4689 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4690 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4691 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4692 reload_inc
[reloadnum
]
4693 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
4695 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
4697 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4704 /* This is probably the result of a substitution, by eliminate_regs, of
4705 an equivalent address for a pseudo that was not allocated to a hard
4706 register. Verify that the specified address is valid and reload it
4709 Since we know we are going to reload this item, don't decrement for
4710 the indirection level.
4712 Note that this is actually conservative: it would be slightly more
4713 efficient to use the value of SPILL_INDIRECT_LEVELS from
4716 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
4717 opnum
, type
, ind_levels
);
4718 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
4719 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4720 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4725 register int regno
= REGNO (x
);
4727 if (reg_equiv_constant
[regno
] != 0)
4729 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
4730 (context
? INDEX_REG_CLASS
4732 GET_MODE (x
), opnum
, type
, ind_levels
);
4736 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4737 that feeds this insn. */
4738 if (reg_equiv_mem
[regno
] != 0)
4740 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
4741 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4742 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4747 if (reg_equiv_address
[regno
] != 0)
4749 x
= make_memloc (x
, regno
);
4750 find_reloads_address (GET_MODE (x
), 0, XEXP (x
, 0), &XEXP (x
, 0),
4751 opnum
, type
, ind_levels
);
4754 if (reg_renumber
[regno
] >= 0)
4755 regno
= reg_renumber
[regno
];
4757 if ((regno
>= FIRST_PSEUDO_REGISTER
4758 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4759 : REGNO_OK_FOR_BASE_P (regno
))))
4761 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4762 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4763 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4767 /* If a register appearing in an address is the subject of a CLOBBER
4768 in this insn, reload it into some other register to be safe.
4769 The CLOBBER is supposed to make the register unavailable
4770 from before this insn to after it. */
4771 if (regno_clobbered_p (regno
, this_insn
))
4773 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4774 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4775 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4782 /* If this is a SUBREG of a hard register and the resulting register is
4783 of the wrong class, reload the whole SUBREG. This avoids needless
4784 copies if SUBREG_REG is multi-word. */
4785 if (GET_CODE (SUBREG_REG (x
)) == REG
4786 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
4788 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
4790 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
4791 : REGNO_OK_FOR_BASE_P (regno
)))
4793 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4794 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4795 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4803 register char *fmt
= GET_RTX_FORMAT (code
);
4806 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4809 find_reloads_address_1 (XEXP (x
, i
), context
, &XEXP (x
, i
),
4810 opnum
, type
, ind_levels
);
4817 /* X, which is found at *LOC, is a part of an address that needs to be
4818 reloaded into a register of class CLASS. If X is a constant, or if
4819 X is a PLUS that contains a constant, check that the constant is a
4820 legitimate operand and that we are supposed to be able to load
4821 it into the register.
4823 If not, force the constant into memory and reload the MEM instead.
4825 MODE is the mode to use, in case X is an integer constant.
4827 OPNUM and TYPE describe the purpose of any reloads made.
4829 IND_LEVELS says how many levels of indirect addressing this machine
4833 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
4836 enum reg_class
class;
4837 enum machine_mode mode
;
4839 enum reload_type type
;
4843 && (! LEGITIMATE_CONSTANT_P (x
)
4844 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
4846 rtx tem
= x
= force_const_mem (mode
, x
);
4847 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
4848 opnum
, type
, ind_levels
);
4851 else if (GET_CODE (x
) == PLUS
4852 && CONSTANT_P (XEXP (x
, 1))
4853 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
4854 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
4856 rtx tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
4858 x
= gen_rtx (PLUS
, GET_MODE (x
), XEXP (x
, 0), tem
);
4859 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
4860 opnum
, type
, ind_levels
);
4863 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
4864 mode
, VOIDmode
, 0, 0, opnum
, type
);
4867 /* Substitute into the current INSN the registers into which we have reloaded
4868 the things that need reloading. The array `replacements'
4869 says contains the locations of all pointers that must be changed
4870 and says what to replace them with.
4872 Return the rtx that X translates into; usually X, but modified. */
4879 for (i
= 0; i
< n_replacements
; i
++)
4881 register struct replacement
*r
= &replacements
[i
];
4882 register rtx reloadreg
= reload_reg_rtx
[r
->what
];
4885 /* Encapsulate RELOADREG so its machine mode matches what
4886 used to be there. Note that gen_lowpart_common will
4887 do the wrong thing if RELOADREG is multi-word. RELOADREG
4888 will always be a REG here. */
4889 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
4890 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
4892 /* If we are putting this into a SUBREG and RELOADREG is a
4893 SUBREG, we would be making nested SUBREGs, so we have to fix
4894 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4896 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
4898 if (GET_MODE (*r
->subreg_loc
)
4899 == GET_MODE (SUBREG_REG (reloadreg
)))
4900 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
4903 *r
->where
= SUBREG_REG (reloadreg
);
4904 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
4908 *r
->where
= reloadreg
;
4910 /* If reload got no reg and isn't optional, something's wrong. */
4911 else if (! reload_optional
[r
->what
])
4916 /* Make a copy of any replacements being done into X and move those copies
4917 to locations in Y, a copy of X. We only look at the highest level of
4921 copy_replacements (x
, y
)
4926 enum rtx_code code
= GET_CODE (x
);
4927 char *fmt
= GET_RTX_FORMAT (code
);
4928 struct replacement
*r
;
4930 /* We can't support X being a SUBREG because we might then need to know its
4931 location if something inside it was replaced. */
4935 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4937 for (j
= 0; j
< n_replacements
; j
++)
4939 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
4941 r
= &replacements
[n_replacements
++];
4942 r
->where
= replacements
[j
].where
;
4943 r
->subreg_loc
= &XEXP (y
, i
);
4944 r
->what
= replacements
[j
].what
;
4945 r
->mode
= replacements
[j
].mode
;
4947 else if (replacements
[j
].where
== &XEXP (x
, i
))
4949 r
= &replacements
[n_replacements
++];
4950 r
->where
= &XEXP (y
, i
);
4952 r
->what
= replacements
[j
].what
;
4953 r
->mode
= replacements
[j
].mode
;
4958 /* If LOC was scheduled to be replaced by something, return the replacement.
4959 Otherwise, return *LOC. */
4962 find_replacement (loc
)
4965 struct replacement
*r
;
4967 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
4969 rtx reloadreg
= reload_reg_rtx
[r
->what
];
4971 if (reloadreg
&& r
->where
== loc
)
4973 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
4974 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
4978 else if (reloadreg
&& r
->subreg_loc
== loc
)
4980 /* RELOADREG must be either a REG or a SUBREG.
4982 ??? Is it actually still ever a SUBREG? If so, why? */
4984 if (GET_CODE (reloadreg
) == REG
)
4985 return gen_rtx (REG
, GET_MODE (*loc
),
4986 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
4987 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
4990 return gen_rtx (SUBREG
, GET_MODE (*loc
), SUBREG_REG (reloadreg
),
4991 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
4998 /* Return nonzero if register in range [REGNO, ENDREGNO)
4999 appears either explicitly or implicitly in X
5000 other than being stored into (except for earlyclobber operands).
5002 References contained within the substructure at LOC do not count.
5003 LOC may be zero, meaning don't ignore anything.
5005 This is similar to refers_to_regno_p in rtlanal.c except that we
5006 look at equivalences for pseudos that didn't get hard registers. */
5009 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
5010 int regno
, endregno
;
5015 register RTX_CODE code
;
5022 code
= GET_CODE (x
);
5029 /* If this is a pseudo, a hard register must not have been allocated.
5030 X must therefore either be a constant or be in memory. */
5031 if (i
>= FIRST_PSEUDO_REGISTER
)
5033 if (reg_equiv_memory_loc
[i
])
5034 return refers_to_regno_for_reload_p (regno
, endregno
,
5035 reg_equiv_memory_loc
[i
],
5038 if (reg_equiv_constant
[i
])
5044 return (endregno
> i
5045 && regno
< i
+ (i
< FIRST_PSEUDO_REGISTER
5046 ? HARD_REGNO_NREGS (i
, GET_MODE (x
))
5050 /* If this is a SUBREG of a hard reg, we can see exactly which
5051 registers are being modified. Otherwise, handle normally. */
5052 if (GET_CODE (SUBREG_REG (x
)) == REG
5053 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5055 int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5057 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
5058 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5060 return endregno
> inner_regno
&& regno
< inner_endregno
;
5066 if (&SET_DEST (x
) != loc
5067 /* Note setting a SUBREG counts as referring to the REG it is in for
5068 a pseudo but not for hard registers since we can
5069 treat each word individually. */
5070 && ((GET_CODE (SET_DEST (x
)) == SUBREG
5071 && loc
!= &SUBREG_REG (SET_DEST (x
))
5072 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
5073 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
5074 && refers_to_regno_for_reload_p (regno
, endregno
,
5075 SUBREG_REG (SET_DEST (x
)),
5077 /* If the ouput is an earlyclobber operand, this is
5079 || ((GET_CODE (SET_DEST (x
)) != REG
5080 || earlyclobber_operand_p (SET_DEST (x
)))
5081 && refers_to_regno_for_reload_p (regno
, endregno
,
5082 SET_DEST (x
), loc
))))
5085 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
5091 /* X does not match, so try its subexpressions. */
5093 fmt
= GET_RTX_FORMAT (code
);
5094 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5096 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
5104 if (refers_to_regno_for_reload_p (regno
, endregno
,
5108 else if (fmt
[i
] == 'E')
5111 for (j
= XVECLEN (x
, i
) - 1; j
>=0; j
--)
5112 if (loc
!= &XVECEXP (x
, i
, j
)
5113 && refers_to_regno_for_reload_p (regno
, endregno
,
5114 XVECEXP (x
, i
, j
), loc
))
5121 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5122 we check if any register number in X conflicts with the relevant register
5123 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5124 contains a MEM (we don't bother checking for memory addresses that can't
5125 conflict because we expect this to be a rare case.
5127 This function is similar to reg_overlap_mention_p in rtlanal.c except
5128 that we look at equivalences for pseudos that didn't get hard registers. */
5131 reg_overlap_mentioned_for_reload_p (x
, in
)
5134 int regno
, endregno
;
5136 if (GET_CODE (x
) == SUBREG
)
5138 regno
= REGNO (SUBREG_REG (x
));
5139 if (regno
< FIRST_PSEUDO_REGISTER
)
5140 regno
+= SUBREG_WORD (x
);
5142 else if (GET_CODE (x
) == REG
)
5146 /* If this is a pseudo, it must not have been assigned a hard register.
5147 Therefore, it must either be in memory or be a constant. */
5149 if (regno
>= FIRST_PSEUDO_REGISTER
)
5151 if (reg_equiv_memory_loc
[regno
])
5152 return refers_to_mem_for_reload_p (in
);
5153 else if (reg_equiv_constant
[regno
])
5158 else if (CONSTANT_P (x
))
5160 else if (GET_CODE (x
) == MEM
)
5161 return refers_to_mem_for_reload_p (in
);
5162 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
5163 || GET_CODE (x
) == CC0
)
5164 return reg_mentioned_p (x
, in
);
5168 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
5169 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5171 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
5174 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5178 refers_to_mem_for_reload_p (x
)
5184 if (GET_CODE (x
) == MEM
)
5187 if (GET_CODE (x
) == REG
)
5188 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
5189 && reg_equiv_memory_loc
[REGNO (x
)]);
5191 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
5192 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
5194 && (GET_CODE (XEXP (x
, i
)) == MEM
5195 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
5201 /* Check the insns before INSN to see if there is a suitable register
5202 containing the same value as GOAL.
5203 If OTHER is -1, look for a register in class CLASS.
5204 Otherwise, just see if register number OTHER shares GOAL's value.
5206 Return an rtx for the register found, or zero if none is found.
5208 If RELOAD_REG_P is (short *)1,
5209 we reject any hard reg that appears in reload_reg_rtx
5210 because such a hard reg is also needed coming into this insn.
5212 If RELOAD_REG_P is any other nonzero value,
5213 it is a vector indexed by hard reg number
5214 and we reject any hard reg whose element in the vector is nonnegative
5215 as well as any that appears in reload_reg_rtx.
5217 If GOAL is zero, then GOALREG is a register number; we look
5218 for an equivalent for that register.
5220 MODE is the machine mode of the value we want an equivalence for.
5221 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5223 This function is used by jump.c as well as in the reload pass.
5225 If GOAL is the sum of the stack pointer and a constant, we treat it
5226 as if it were a constant except that sp is required to be unchanging. */
5229 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
5232 enum reg_class
class;
5234 short *reload_reg_p
;
5236 enum machine_mode mode
;
5238 register rtx p
= insn
;
5239 rtx goaltry
, valtry
, value
, where
;
5241 register int regno
= -1;
5245 int goal_mem_addr_varies
= 0;
5246 int need_stable_sp
= 0;
5252 else if (GET_CODE (goal
) == REG
)
5253 regno
= REGNO (goal
);
5254 else if (GET_CODE (goal
) == MEM
)
5256 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
5257 if (MEM_VOLATILE_P (goal
))
5259 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
5261 /* An address with side effects must be reexecuted. */
5272 else if (CONSTANT_P (goal
))
5274 else if (GET_CODE (goal
) == PLUS
5275 && XEXP (goal
, 0) == stack_pointer_rtx
5276 && CONSTANT_P (XEXP (goal
, 1)))
5277 goal_const
= need_stable_sp
= 1;
5281 /* On some machines, certain regs must always be rejected
5282 because they don't behave the way ordinary registers do. */
5284 #ifdef OVERLAPPING_REGNO_P
5285 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5286 && OVERLAPPING_REGNO_P (regno
))
5290 /* Scan insns back from INSN, looking for one that copies
5291 a value into or out of GOAL.
5292 Stop and give up if we reach a label. */
5297 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
5299 if (GET_CODE (p
) == INSN
5300 /* If we don't want spill regs ... */
5301 && (! (reload_reg_p
!= 0
5302 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
5303 /* ... then ignore insns introduced by reload; they aren't useful
5304 and can cause results in reload_as_needed to be different
5305 from what they were when calculating the need for spills.
5306 If we notice an input-reload insn here, we will reject it below,
5307 but it might hide a usable equivalent. That makes bad code.
5308 It may even abort: perhaps no reg was spilled for this insn
5309 because it was assumed we would find that equivalent. */
5310 || INSN_UID (p
) < reload_first_uid
))
5313 pat
= single_set (p
);
5314 /* First check for something that sets some reg equal to GOAL. */
5317 && true_regnum (SET_SRC (pat
)) == regno
5318 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5321 && true_regnum (SET_DEST (pat
)) == regno
5322 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
5324 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
5325 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5327 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
5328 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
5330 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
5331 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
5332 /* If we are looking for a constant,
5333 and something equivalent to that constant was copied
5334 into a reg, we can use that reg. */
5335 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5337 && rtx_equal_p (XEXP (tem
, 0), goal
)
5338 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5339 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5341 && GET_CODE (SET_DEST (pat
)) == REG
5342 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5343 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5344 && GET_CODE (goal
) == CONST_INT
5345 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 0, 0,
5347 && rtx_equal_p (goal
, goaltry
)
5348 && (valtry
= operand_subword (SET_DEST (pat
), 0, 0,
5350 && (valueno
= true_regnum (valtry
)) >= 0)
5351 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5353 && GET_CODE (SET_DEST (pat
)) == REG
5354 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5355 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5356 && GET_CODE (goal
) == CONST_INT
5357 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
5359 && rtx_equal_p (goal
, goaltry
)
5361 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
5362 && (valueno
= true_regnum (valtry
)) >= 0)))
5365 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
5366 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
5376 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5377 (or copying VALUE into GOAL, if GOAL is also a register).
5378 Now verify that VALUE is really valid. */
5380 /* VALUENO is the register number of VALUE; a hard register. */
5382 /* Don't try to re-use something that is killed in this insn. We want
5383 to be able to trust REG_UNUSED notes. */
5384 if (find_reg_note (where
, REG_UNUSED
, value
))
5387 /* If we propose to get the value from the stack pointer or if GOAL is
5388 a MEM based on the stack pointer, we need a stable SP. */
5389 if (valueno
== STACK_POINTER_REGNUM
5390 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
5394 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5395 if (GET_MODE (value
) != mode
)
5398 /* Reject VALUE if it was loaded from GOAL
5399 and is also a register that appears in the address of GOAL. */
5401 if (goal_mem
&& value
== SET_DEST (PATTERN (where
))
5402 && refers_to_regno_for_reload_p (valueno
,
5404 + HARD_REGNO_NREGS (valueno
, mode
)),
5408 /* Reject registers that overlap GOAL. */
5410 if (!goal_mem
&& !goal_const
5411 && regno
+ HARD_REGNO_NREGS (regno
, mode
) > valueno
5412 && regno
< valueno
+ HARD_REGNO_NREGS (valueno
, mode
))
5415 /* Reject VALUE if it is one of the regs reserved for reloads.
5416 Reload1 knows how to reuse them anyway, and it would get
5417 confused if we allocated one without its knowledge.
5418 (Now that insns introduced by reload are ignored above,
5419 this case shouldn't happen, but I'm not positive.) */
5421 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1
5422 && reload_reg_p
[valueno
] >= 0)
5425 /* On some machines, certain regs must always be rejected
5426 because they don't behave the way ordinary registers do. */
5428 #ifdef OVERLAPPING_REGNO_P
5429 if (OVERLAPPING_REGNO_P (valueno
))
5433 nregs
= HARD_REGNO_NREGS (regno
, mode
);
5434 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
5436 /* Reject VALUE if it is a register being used for an input reload
5437 even if it is not one of those reserved. */
5439 if (reload_reg_p
!= 0)
5442 for (i
= 0; i
< n_reloads
; i
++)
5443 if (reload_reg_rtx
[i
] != 0 && reload_in
[i
])
5445 int regno1
= REGNO (reload_reg_rtx
[i
]);
5446 int nregs1
= HARD_REGNO_NREGS (regno1
,
5447 GET_MODE (reload_reg_rtx
[i
]));
5448 if (regno1
< valueno
+ valuenregs
5449 && regno1
+ nregs1
> valueno
)
5455 /* We must treat frame pointer as varying here,
5456 since it can vary--in a nonlocal goto as generated by expand_goto. */
5457 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
5459 /* Now verify that the values of GOAL and VALUE remain unaltered
5460 until INSN is reached. */
5469 /* Don't trust the conversion past a function call
5470 if either of the two is in a call-clobbered register, or memory. */
5471 if (GET_CODE (p
) == CALL_INSN
5472 && ((regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5473 && call_used_regs
[regno
])
5475 (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5476 && call_used_regs
[valueno
])
5482 #ifdef INSN_CLOBBERS_REGNO_P
5483 if ((valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5484 && INSN_CLOBBERS_REGNO_P (p
, valueno
))
5485 || (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5486 && INSN_CLOBBERS_REGNO_P (p
, regno
)))
5490 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
5492 /* If this insn P stores in either GOAL or VALUE, return 0.
5493 If GOAL is a memory ref and this insn writes memory, return 0.
5494 If GOAL is a memory ref and its address is not constant,
5495 and this insn P changes a register used in GOAL, return 0. */
5498 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
5500 register rtx dest
= SET_DEST (pat
);
5501 while (GET_CODE (dest
) == SUBREG
5502 || GET_CODE (dest
) == ZERO_EXTRACT
5503 || GET_CODE (dest
) == SIGN_EXTRACT
5504 || GET_CODE (dest
) == STRICT_LOW_PART
)
5505 dest
= XEXP (dest
, 0);
5506 if (GET_CODE (dest
) == REG
)
5508 register int xregno
= REGNO (dest
);
5510 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5511 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5514 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
5516 if (xregno
< valueno
+ valuenregs
5517 && xregno
+ xnregs
> valueno
)
5519 if (goal_mem_addr_varies
5520 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
5523 else if (goal_mem
&& GET_CODE (dest
) == MEM
5524 && ! push_operand (dest
, GET_MODE (dest
)))
5526 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
5529 else if (GET_CODE (pat
) == PARALLEL
)
5532 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
5534 register rtx v1
= XVECEXP (pat
, 0, i
);
5535 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
5537 register rtx dest
= SET_DEST (v1
);
5538 while (GET_CODE (dest
) == SUBREG
5539 || GET_CODE (dest
) == ZERO_EXTRACT
5540 || GET_CODE (dest
) == SIGN_EXTRACT
5541 || GET_CODE (dest
) == STRICT_LOW_PART
)
5542 dest
= XEXP (dest
, 0);
5543 if (GET_CODE (dest
) == REG
)
5545 register int xregno
= REGNO (dest
);
5547 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5548 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5551 if (xregno
< regno
+ nregs
5552 && xregno
+ xnregs
> regno
)
5554 if (xregno
< valueno
+ valuenregs
5555 && xregno
+ xnregs
> valueno
)
5557 if (goal_mem_addr_varies
5558 && reg_overlap_mentioned_for_reload_p (dest
,
5562 else if (goal_mem
&& GET_CODE (dest
) == MEM
5563 && ! push_operand (dest
, GET_MODE (dest
)))
5565 else if (need_stable_sp
5566 && push_operand (dest
, GET_MODE (dest
)))
5573 /* If this insn auto-increments or auto-decrements
5574 either regno or valueno, return 0 now.
5575 If GOAL is a memory ref and its address is not constant,
5576 and this insn P increments a register used in GOAL, return 0. */
5580 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
5581 if (REG_NOTE_KIND (link
) == REG_INC
5582 && GET_CODE (XEXP (link
, 0)) == REG
)
5584 register int incno
= REGNO (XEXP (link
, 0));
5585 if (incno
< regno
+ nregs
&& incno
>= regno
)
5587 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
5589 if (goal_mem_addr_varies
5590 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
5600 /* Find a place where INCED appears in an increment or decrement operator
5601 within X, and return the amount INCED is incremented or decremented by.
5602 The value is always positive. */
5605 find_inc_amount (x
, inced
)
5608 register enum rtx_code code
= GET_CODE (x
);
5614 register rtx addr
= XEXP (x
, 0);
5615 if ((GET_CODE (addr
) == PRE_DEC
5616 || GET_CODE (addr
) == POST_DEC
5617 || GET_CODE (addr
) == PRE_INC
5618 || GET_CODE (addr
) == POST_INC
)
5619 && XEXP (addr
, 0) == inced
)
5620 return GET_MODE_SIZE (GET_MODE (x
));
5623 fmt
= GET_RTX_FORMAT (code
);
5624 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5628 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
5635 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
5637 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
5647 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5650 regno_clobbered_p (regno
, insn
)
5654 if (GET_CODE (PATTERN (insn
)) == CLOBBER
5655 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
5656 return REGNO (XEXP (PATTERN (insn
), 0)) == regno
;
5658 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
5660 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
5664 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
5665 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
5666 && REGNO (XEXP (elt
, 0)) == regno
)