1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
93 #include "insn-config.h"
97 #include "hard-reg-set.h"
101 #include "function.h"
105 #ifndef REGISTER_MOVE_COST
106 #define REGISTER_MOVE_COST(m, x, y) 2
109 #ifndef REGNO_MODE_OK_FOR_BASE_P
110 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
113 #ifndef REG_MODE_OK_FOR_BASE_P
114 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
117 /* All reloads of the current insn are recorded here. See reload.h for
120 struct reload rld
[MAX_RELOADS
];
122 /* All the "earlyclobber" operands of the current insn
123 are recorded here. */
125 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
127 int reload_n_operands
;
129 /* Replacing reloads.
131 If `replace_reloads' is nonzero, then as each reload is recorded
132 an entry is made for it in the table `replacements'.
133 Then later `subst_reloads' can look through that table and
134 perform all the replacements needed. */
136 /* Nonzero means record the places to replace. */
137 static int replace_reloads
;
139 /* Each replacement is recorded with a structure like this. */
142 rtx
*where
; /* Location to store in */
143 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
144 a SUBREG; 0 otherwise. */
145 int what
; /* which reload this is for */
146 enum machine_mode mode
; /* mode it must have */
149 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
151 /* Number of replacements currently recorded. */
152 static int n_replacements
;
154 /* Used to track what is modified by an operand. */
157 int reg_flag
; /* Nonzero if referencing a register. */
158 int safe
; /* Nonzero if this can't conflict with anything. */
159 rtx base
; /* Base address for MEM. */
160 HOST_WIDE_INT start
; /* Starting offset or register number. */
161 HOST_WIDE_INT end
; /* Ending offset or register number. */
164 #ifdef SECONDARY_MEMORY_NEEDED
166 /* Save MEMs needed to copy from one class of registers to another. One MEM
167 is used per mode, but normally only one or two modes are ever used.
169 We keep two versions, before and after register elimination. The one
170 after register elimination is record separately for each operand. This
171 is done in case the address is not valid to be sure that we separately
174 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
175 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
178 /* The instruction we are doing reloads for;
179 so we can test whether a register dies in it. */
180 static rtx this_insn
;
182 /* Nonzero if this instruction is a user-specified asm with operands. */
183 static int this_insn_is_asm
;
185 /* If hard_regs_live_known is nonzero,
186 we can tell which hard regs are currently live,
187 at least enough to succeed in choosing dummy reloads. */
188 static int hard_regs_live_known
;
190 /* Indexed by hard reg number,
191 element is nonnegative if hard reg has been spilled.
192 This vector is passed to `find_reloads' as an argument
193 and is not changed here. */
194 static short *static_reload_reg_p
;
196 /* Set to 1 in subst_reg_equivs if it changes anything. */
197 static int subst_reg_equivs_changed
;
199 /* On return from push_reload, holds the reload-number for the OUT
200 operand, which can be different for that from the input operand. */
201 static int output_reloadnum
;
203 /* Compare two RTX's. */
204 #define MATCHES(x, y) \
205 (x == y || (x != 0 && (GET_CODE (x) == REG \
206 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
207 : rtx_equal_p (x, y) && ! side_effects_p (x))))
209 /* Indicates if two reloads purposes are for similar enough things that we
210 can merge their reloads. */
211 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
212 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
213 || ((when1) == (when2) && (op1) == (op2)) \
214 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
215 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
216 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
217 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
218 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
220 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
221 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
222 ((when1) != (when2) \
223 || ! ((op1) == (op2) \
224 || (when1) == RELOAD_FOR_INPUT \
225 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
226 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
228 /* If we are going to reload an address, compute the reload type to
230 #define ADDR_TYPE(type) \
231 ((type) == RELOAD_FOR_INPUT_ADDRESS \
232 ? RELOAD_FOR_INPADDR_ADDRESS \
233 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
234 ? RELOAD_FOR_OUTADDR_ADDRESS \
237 #ifdef HAVE_SECONDARY_RELOADS
238 static int push_secondary_reload
PARAMS ((int, rtx
, int, int, enum reg_class
,
239 enum machine_mode
, enum reload_type
,
242 static enum reg_class find_valid_class
PARAMS ((enum machine_mode
, int));
243 static int reload_inner_reg_of_subreg
PARAMS ((rtx
, enum machine_mode
));
244 static int push_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
245 enum machine_mode
, enum machine_mode
,
246 int, int, int, enum reload_type
));
247 static void push_replacement
PARAMS ((rtx
*, int, enum machine_mode
));
248 static void combine_reloads
PARAMS ((void));
249 static int find_reusable_reload
PARAMS ((rtx
*, rtx
, enum reg_class
,
250 enum reload_type
, int, int));
251 static rtx find_dummy_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*,
252 enum machine_mode
, enum machine_mode
,
253 enum reg_class
, int, int));
254 static int hard_reg_set_here_p
PARAMS ((unsigned int, unsigned int, rtx
));
255 static struct decomposition decompose
PARAMS ((rtx
));
256 static int immune_p
PARAMS ((rtx
, rtx
, struct decomposition
));
257 static int alternative_allows_memconst
PARAMS ((const char *, int));
258 static rtx find_reloads_toplev
PARAMS ((rtx
, int, enum reload_type
, int,
260 static rtx make_memloc
PARAMS ((rtx
, int));
261 static int find_reloads_address
PARAMS ((enum machine_mode
, rtx
*, rtx
, rtx
*,
262 int, enum reload_type
, int, rtx
));
263 static rtx subst_reg_equivs
PARAMS ((rtx
, rtx
));
264 static rtx subst_indexed_address
PARAMS ((rtx
));
265 static void update_auto_inc_notes
PARAMS ((rtx
, int, int));
266 static int find_reloads_address_1
PARAMS ((enum machine_mode
, rtx
, int, rtx
*,
267 int, enum reload_type
,int, rtx
));
268 static void find_reloads_address_part
PARAMS ((rtx
, rtx
*, enum reg_class
,
269 enum machine_mode
, int,
270 enum reload_type
, int));
271 static rtx find_reloads_subreg_address
PARAMS ((rtx
, int, int, enum reload_type
,
273 static int find_inc_amount
PARAMS ((rtx
, rtx
));
275 #ifdef HAVE_SECONDARY_RELOADS
277 /* Determine if any secondary reloads are needed for loading (if IN_P is
278 non-zero) or storing (if IN_P is zero) X to or from a reload register of
279 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
280 are needed, push them.
282 Return the reload number of the secondary reload we made, or -1 if
283 we didn't need one. *PICODE is set to the insn_code to use if we do
284 need a secondary reload. */
287 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
293 enum reg_class reload_class
;
294 enum machine_mode reload_mode
;
295 enum reload_type type
;
296 enum insn_code
*picode
;
298 enum reg_class
class = NO_REGS
;
299 enum machine_mode mode
= reload_mode
;
300 enum insn_code icode
= CODE_FOR_nothing
;
301 enum reg_class t_class
= NO_REGS
;
302 enum machine_mode t_mode
= VOIDmode
;
303 enum insn_code t_icode
= CODE_FOR_nothing
;
304 enum reload_type secondary_type
;
305 int s_reload
, t_reload
= -1;
307 if (type
== RELOAD_FOR_INPUT_ADDRESS
308 || type
== RELOAD_FOR_OUTPUT_ADDRESS
309 || type
== RELOAD_FOR_INPADDR_ADDRESS
310 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
311 secondary_type
= type
;
313 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
315 *picode
= CODE_FOR_nothing
;
317 /* If X is a paradoxical SUBREG, use the inner value to determine both the
318 mode and object being reloaded. */
319 if (GET_CODE (x
) == SUBREG
320 && (GET_MODE_SIZE (GET_MODE (x
))
321 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
324 reload_mode
= GET_MODE (x
);
327 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
328 is still a pseudo-register by now, it *must* have an equivalent MEM
329 but we don't want to assume that), use that equivalent when seeing if
330 a secondary reload is needed since whether or not a reload is needed
331 might be sensitive to the form of the MEM. */
333 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
334 && reg_equiv_mem
[REGNO (x
)] != 0)
335 x
= reg_equiv_mem
[REGNO (x
)];
337 #ifdef SECONDARY_INPUT_RELOAD_CLASS
339 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
342 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
344 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
347 /* If we don't need any secondary registers, done. */
348 if (class == NO_REGS
)
351 /* Get a possible insn to use. If the predicate doesn't accept X, don't
354 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
355 : reload_out_optab
[(int) reload_mode
]);
357 if (icode
!= CODE_FOR_nothing
358 && insn_data
[(int) icode
].operand
[in_p
].predicate
359 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
360 icode
= CODE_FOR_nothing
;
362 /* If we will be using an insn, see if it can directly handle the reload
363 register we will be using. If it can, the secondary reload is for a
364 scratch register. If it can't, we will use the secondary reload for
365 an intermediate register and require a tertiary reload for the scratch
368 if (icode
!= CODE_FOR_nothing
)
370 /* If IN_P is non-zero, the reload register will be the output in
371 operand 0. If IN_P is zero, the reload register will be the input
372 in operand 1. Outputs should have an initial "=", which we must
376 = insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
377 enum reg_class insn_class
378 = (insn_letter
== 'r' ? GENERAL_REGS
379 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter
));
381 if (insn_class
== NO_REGS
383 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
384 /* The scratch register's constraint must start with "=&". */
385 || insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
386 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
389 if (reg_class_subset_p (reload_class
, insn_class
))
390 mode
= insn_data
[(int) icode
].operand
[2].mode
;
393 char t_letter
= insn_data
[(int) icode
].operand
[2].constraint
[2];
395 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
396 t_class
= (t_letter
== 'r' ? GENERAL_REGS
397 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter
));
399 icode
= CODE_FOR_nothing
;
403 /* This case isn't valid, so fail. Reload is allowed to use the same
404 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
405 in the case of a secondary register, we actually need two different
406 registers for correct code. We fail here to prevent the possibility of
407 silently generating incorrect code later.
409 The convention is that secondary input reloads are valid only if the
410 secondary_class is different from class. If you have such a case, you
411 can not use secondary reloads, you must work around the problem some
414 Allow this when a reload_in/out pattern is being used. I.e. assume
415 that the generated code handles this case. */
417 if (in_p
&& class == reload_class
&& icode
== CODE_FOR_nothing
418 && t_icode
== CODE_FOR_nothing
)
421 /* If we need a tertiary reload, see if we have one we can reuse or else
424 if (t_class
!= NO_REGS
)
426 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
427 if (rld
[t_reload
].secondary_p
428 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
429 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
430 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
431 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
432 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
433 == CODE_FOR_nothing
))
434 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
435 == CODE_FOR_nothing
)))
436 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
437 && MERGABLE_RELOADS (secondary_type
,
438 rld
[t_reload
].when_needed
,
439 opnum
, rld
[t_reload
].opnum
))
442 rld
[t_reload
].inmode
= t_mode
;
444 rld
[t_reload
].outmode
= t_mode
;
446 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
447 rld
[t_reload
].class = t_class
;
449 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
450 rld
[t_reload
].optional
&= optional
;
451 rld
[t_reload
].secondary_p
= 1;
452 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
453 opnum
, rld
[t_reload
].opnum
))
454 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
457 if (t_reload
== n_reloads
)
459 /* We need to make a new tertiary reload for this register class. */
460 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
461 rld
[t_reload
].class = t_class
;
462 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
463 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
464 rld
[t_reload
].reg_rtx
= 0;
465 rld
[t_reload
].optional
= optional
;
466 rld
[t_reload
].inc
= 0;
467 /* Maybe we could combine these, but it seems too tricky. */
468 rld
[t_reload
].nocombine
= 1;
469 rld
[t_reload
].in_reg
= 0;
470 rld
[t_reload
].out_reg
= 0;
471 rld
[t_reload
].opnum
= opnum
;
472 rld
[t_reload
].when_needed
= secondary_type
;
473 rld
[t_reload
].secondary_in_reload
= -1;
474 rld
[t_reload
].secondary_out_reload
= -1;
475 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
476 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
477 rld
[t_reload
].secondary_p
= 1;
483 /* See if we can reuse an existing secondary reload. */
484 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
485 if (rld
[s_reload
].secondary_p
486 && (reg_class_subset_p (class, rld
[s_reload
].class)
487 || reg_class_subset_p (rld
[s_reload
].class, class))
488 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
489 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
490 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
491 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
492 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
493 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
494 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
495 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
496 opnum
, rld
[s_reload
].opnum
))
499 rld
[s_reload
].inmode
= mode
;
501 rld
[s_reload
].outmode
= mode
;
503 if (reg_class_subset_p (class, rld
[s_reload
].class))
504 rld
[s_reload
].class = class;
506 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
507 rld
[s_reload
].optional
&= optional
;
508 rld
[s_reload
].secondary_p
= 1;
509 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
510 opnum
, rld
[s_reload
].opnum
))
511 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
514 if (s_reload
== n_reloads
)
516 #ifdef SECONDARY_MEMORY_NEEDED
517 /* If we need a memory location to copy between the two reload regs,
518 set it up now. Note that we do the input case before making
519 the reload and the output case after. This is due to the
520 way reloads are output. */
522 if (in_p
&& icode
== CODE_FOR_nothing
523 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
525 get_secondary_mem (x
, reload_mode
, opnum
, type
);
527 /* We may have just added new reloads. Make sure we add
528 the new reload at the end. */
529 s_reload
= n_reloads
;
533 /* We need to make a new secondary reload for this register class. */
534 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
535 rld
[s_reload
].class = class;
537 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
538 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
539 rld
[s_reload
].reg_rtx
= 0;
540 rld
[s_reload
].optional
= optional
;
541 rld
[s_reload
].inc
= 0;
542 /* Maybe we could combine these, but it seems too tricky. */
543 rld
[s_reload
].nocombine
= 1;
544 rld
[s_reload
].in_reg
= 0;
545 rld
[s_reload
].out_reg
= 0;
546 rld
[s_reload
].opnum
= opnum
;
547 rld
[s_reload
].when_needed
= secondary_type
;
548 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
549 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
550 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
551 rld
[s_reload
].secondary_out_icode
552 = ! in_p
? t_icode
: CODE_FOR_nothing
;
553 rld
[s_reload
].secondary_p
= 1;
557 #ifdef SECONDARY_MEMORY_NEEDED
558 if (! in_p
&& icode
== CODE_FOR_nothing
559 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
560 get_secondary_mem (x
, mode
, opnum
, type
);
567 #endif /* HAVE_SECONDARY_RELOADS */
569 #ifdef SECONDARY_MEMORY_NEEDED
571 /* Return a memory location that will be used to copy X in mode MODE.
572 If we haven't already made a location for this mode in this insn,
573 call find_reloads_address on the location being returned. */
576 get_secondary_mem (x
, mode
, opnum
, type
)
577 rtx x ATTRIBUTE_UNUSED
;
578 enum machine_mode mode
;
580 enum reload_type type
;
585 /* By default, if MODE is narrower than a word, widen it to a word.
586 This is required because most machines that require these memory
587 locations do not support short load and stores from all registers
588 (e.g., FP registers). */
590 #ifdef SECONDARY_MEMORY_NEEDED_MODE
591 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
593 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
594 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
597 /* If we already have made a MEM for this operand in MODE, return it. */
598 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
599 return secondary_memlocs_elim
[(int) mode
][opnum
];
601 /* If this is the first time we've tried to get a MEM for this mode,
602 allocate a new one. `something_changed' in reload will get set
603 by noticing that the frame size has changed. */
605 if (secondary_memlocs
[(int) mode
] == 0)
607 #ifdef SECONDARY_MEMORY_NEEDED_RTX
608 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
610 secondary_memlocs
[(int) mode
]
611 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
615 /* Get a version of the address doing any eliminations needed. If that
616 didn't give us a new MEM, make a new one if it isn't valid. */
618 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
619 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
621 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
622 loc
= copy_rtx (loc
);
624 /* The only time the call below will do anything is if the stack
625 offset is too large. In that case IND_LEVELS doesn't matter, so we
626 can just pass a zero. Adjust the type to be the address of the
627 corresponding object. If the address was valid, save the eliminated
628 address. If it wasn't valid, we need to make a reload each time, so
633 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
634 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
637 find_reloads_address (mode
, (rtx
*)0, XEXP (loc
, 0), &XEXP (loc
, 0),
641 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
645 /* Clear any secondary memory locations we've made. */
648 clear_secondary_mem ()
650 memset ((char *) secondary_memlocs
, 0, sizeof secondary_memlocs
);
652 #endif /* SECONDARY_MEMORY_NEEDED */
654 /* Find the largest class for which every register number plus N is valid in
655 M1 (if in range). Abort if no such class exists. */
657 static enum reg_class
658 find_valid_class (m1
, n
)
659 enum machine_mode m1 ATTRIBUTE_UNUSED
;
664 enum reg_class best_class
= NO_REGS
;
665 unsigned int best_size
= 0;
667 for (class = 1; class < N_REG_CLASSES
; class++)
670 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
671 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
672 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
673 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
676 if (! bad
&& reg_class_size
[class] > best_size
)
677 best_class
= class, best_size
= reg_class_size
[class];
686 /* Return the number of a previously made reload that can be combined with
687 a new one, or n_reloads if none of the existing reloads can be used.
688 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
689 push_reload, they determine the kind of the new reload that we try to
690 combine. P_IN points to the corresponding value of IN, which can be
691 modified by this function.
692 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
695 find_reusable_reload (p_in
, out
, class, type
, opnum
, dont_share
)
697 enum reg_class
class;
698 enum reload_type type
;
699 int opnum
, dont_share
;
703 /* We can't merge two reloads if the output of either one is
706 if (earlyclobber_operand_p (out
))
709 /* We can use an existing reload if the class is right
710 and at least one of IN and OUT is a match
711 and the other is at worst neutral.
712 (A zero compared against anything is neutral.)
714 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
715 for the same thing since that can cause us to need more reload registers
716 than we otherwise would. */
718 for (i
= 0; i
< n_reloads
; i
++)
719 if ((reg_class_subset_p (class, rld
[i
].class)
720 || reg_class_subset_p (rld
[i
].class, class))
721 /* If the existing reload has a register, it must fit our class. */
722 && (rld
[i
].reg_rtx
== 0
723 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
724 true_regnum (rld
[i
].reg_rtx
)))
725 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
726 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
727 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
728 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
729 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
730 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
731 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
734 /* Reloading a plain reg for input can match a reload to postincrement
735 that reg, since the postincrement's value is the right value.
736 Likewise, it can match a preincrement reload, since we regard
737 the preincrementation as happening before any ref in this insn
739 for (i
= 0; i
< n_reloads
; i
++)
740 if ((reg_class_subset_p (class, rld
[i
].class)
741 || reg_class_subset_p (rld
[i
].class, class))
742 /* If the existing reload has a register, it must fit our
744 && (rld
[i
].reg_rtx
== 0
745 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
746 true_regnum (rld
[i
].reg_rtx
)))
747 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
748 && ((GET_CODE (in
) == REG
749 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == 'a'
750 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
751 || (GET_CODE (rld
[i
].in
) == REG
752 && GET_RTX_CLASS (GET_CODE (in
)) == 'a'
753 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
754 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
755 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
756 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
757 opnum
, rld
[i
].opnum
))
759 /* Make sure reload_in ultimately has the increment,
760 not the plain register. */
761 if (GET_CODE (in
) == REG
)
768 /* Return nonzero if X is a SUBREG which will require reloading of its
769 SUBREG_REG expression. */
772 reload_inner_reg_of_subreg (x
, mode
)
774 enum machine_mode mode
;
778 /* Only SUBREGs are problematical. */
779 if (GET_CODE (x
) != SUBREG
)
782 inner
= SUBREG_REG (x
);
784 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
785 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
788 /* If INNER is not a hard register, then INNER will not need to
790 if (GET_CODE (inner
) != REG
791 || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
794 /* If INNER is not ok for MODE, then INNER will need reloading. */
795 if (! HARD_REGNO_MODE_OK (subreg_regno (x
), mode
))
798 /* If the outer part is a word or smaller, INNER larger than a
799 word and the number of regs for INNER is not the same as the
800 number of words in INNER, then INNER will need reloading. */
801 return (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
802 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
803 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
804 != HARD_REGNO_NREGS (REGNO (inner
), GET_MODE (inner
))));
807 /* Record one reload that needs to be performed.
808 IN is an rtx saying where the data are to be found before this instruction.
809 OUT says where they must be stored after the instruction.
810 (IN is zero for data not read, and OUT is zero for data not written.)
811 INLOC and OUTLOC point to the places in the instructions where
812 IN and OUT were found.
813 If IN and OUT are both non-zero, it means the same register must be used
814 to reload both IN and OUT.
816 CLASS is a register class required for the reloaded data.
817 INMODE is the machine mode that the instruction requires
818 for the reg that replaces IN and OUTMODE is likewise for OUT.
820 If IN is zero, then OUT's location and mode should be passed as
823 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
825 OPTIONAL nonzero means this reload does not need to be performed:
826 it can be discarded if that is more convenient.
828 OPNUM and TYPE say what the purpose of this reload is.
830 The return value is the reload-number for this reload.
832 If both IN and OUT are nonzero, in some rare cases we might
833 want to make two separate reloads. (Actually we never do this now.)
834 Therefore, the reload-number for OUT is stored in
835 output_reloadnum when we return; the return value applies to IN.
836 Usually (presently always), when IN and OUT are nonzero,
837 the two reload-numbers are equal, but the caller should be careful to
841 push_reload (in
, out
, inloc
, outloc
, class,
842 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
845 enum reg_class
class;
846 enum machine_mode inmode
, outmode
;
850 enum reload_type type
;
854 int dont_remove_subreg
= 0;
855 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
856 int secondary_in_reload
= -1, secondary_out_reload
= -1;
857 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
858 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
860 /* INMODE and/or OUTMODE could be VOIDmode if no mode
861 has been specified for the operand. In that case,
862 use the operand's mode as the mode to reload. */
863 if (inmode
== VOIDmode
&& in
!= 0)
864 inmode
= GET_MODE (in
);
865 if (outmode
== VOIDmode
&& out
!= 0)
866 outmode
= GET_MODE (out
);
868 /* If IN is a pseudo register everywhere-equivalent to a constant, and
869 it is not in a hard register, reload straight from the constant,
870 since we want to get rid of such pseudo registers.
871 Often this is done earlier, but not always in find_reloads_address. */
872 if (in
!= 0 && GET_CODE (in
) == REG
)
874 register int regno
= REGNO (in
);
876 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
877 && reg_equiv_constant
[regno
] != 0)
878 in
= reg_equiv_constant
[regno
];
881 /* Likewise for OUT. Of course, OUT will never be equivalent to
882 an actual constant, but it might be equivalent to a memory location
883 (in the case of a parameter). */
884 if (out
!= 0 && GET_CODE (out
) == REG
)
886 register int regno
= REGNO (out
);
888 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
889 && reg_equiv_constant
[regno
] != 0)
890 out
= reg_equiv_constant
[regno
];
893 /* If we have a read-write operand with an address side-effect,
894 change either IN or OUT so the side-effect happens only once. */
895 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
896 switch (GET_CODE (XEXP (in
, 0)))
898 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
899 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
902 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
903 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
910 /* If we are reloading a (SUBREG constant ...), really reload just the
911 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
912 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
913 a pseudo and hence will become a MEM) with M1 wider than M2 and the
914 register is a pseudo, also reload the inside expression.
915 For machines that extend byte loads, do this for any SUBREG of a pseudo
916 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
917 M2 is an integral mode that gets extended when loaded.
918 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
919 either M1 is not valid for R or M2 is wider than a word but we only
920 need one word to store an M2-sized quantity in R.
921 (However, if OUT is nonzero, we need to reload the reg *and*
922 the subreg, so do nothing here, and let following statement handle it.)
924 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
925 we can't handle it here because CONST_INT does not indicate a mode.
927 Similarly, we must reload the inside expression if we have a
928 STRICT_LOW_PART (presumably, in == out in the cas).
930 Also reload the inner expression if it does not require a secondary
931 reload but the SUBREG does.
933 Finally, reload the inner expression if it is a register that is in
934 the class whose registers cannot be referenced in a different size
935 and M1 is not the same size as M2. If SUBREG_BYTE is nonzero, we
936 cannot reload just the inside since we might end up with the wrong
937 register class. But if it is inside a STRICT_LOW_PART, we have
938 no choice, so we hope we do get the right register class there. */
940 if (in
!= 0 && GET_CODE (in
) == SUBREG
941 && (SUBREG_BYTE (in
) == 0 || strict_low
)
942 #ifdef CLASS_CANNOT_CHANGE_MODE
943 && (class != CLASS_CANNOT_CHANGE_MODE
944 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)), inmode
))
946 && (CONSTANT_P (SUBREG_REG (in
))
947 || GET_CODE (SUBREG_REG (in
)) == PLUS
949 || (((GET_CODE (SUBREG_REG (in
)) == REG
950 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
951 || GET_CODE (SUBREG_REG (in
)) == MEM
)
952 && ((GET_MODE_SIZE (inmode
)
953 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
954 #ifdef LOAD_EXTEND_OP
955 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
956 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
958 && (GET_MODE_SIZE (inmode
)
959 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
960 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
961 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
963 #ifdef WORD_REGISTER_OPERATIONS
964 || ((GET_MODE_SIZE (inmode
)
965 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
966 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
967 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
971 || (GET_CODE (SUBREG_REG (in
)) == REG
972 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
973 /* The case where out is nonzero
974 is handled differently in the following statement. */
975 && (out
== 0 || SUBREG_BYTE (in
) == 0)
976 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
977 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
979 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
981 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
982 GET_MODE (SUBREG_REG (in
)))))
983 || ! HARD_REGNO_MODE_OK (subreg_regno (in
), inmode
)))
984 #ifdef SECONDARY_INPUT_RELOAD_CLASS
985 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
986 && (SECONDARY_INPUT_RELOAD_CLASS (class,
987 GET_MODE (SUBREG_REG (in
)),
991 #ifdef CLASS_CANNOT_CHANGE_MODE
992 || (GET_CODE (SUBREG_REG (in
)) == REG
993 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
994 && (TEST_HARD_REG_BIT
995 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
996 REGNO (SUBREG_REG (in
))))
997 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)),
1002 in_subreg_loc
= inloc
;
1003 inloc
= &SUBREG_REG (in
);
1005 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1006 if (GET_CODE (in
) == MEM
)
1007 /* This is supposed to happen only for paradoxical subregs made by
1008 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1009 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
1012 inmode
= GET_MODE (in
);
1015 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1016 either M1 is not valid for R or M2 is wider than a word but we only
1017 need one word to store an M2-sized quantity in R.
1019 However, we must reload the inner reg *as well as* the subreg in
1022 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1023 code above. This can happen if SUBREG_BYTE != 0. */
1025 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
))
1027 enum reg_class in_class
= class;
1029 if (GET_CODE (SUBREG_REG (in
)) == REG
)
1031 = find_valid_class (inmode
,
1032 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1033 GET_MODE (SUBREG_REG (in
)),
1037 /* This relies on the fact that emit_reload_insns outputs the
1038 instructions for input reloads of type RELOAD_OTHER in the same
1039 order as the reloads. Thus if the outer reload is also of type
1040 RELOAD_OTHER, we are guaranteed that this inner reload will be
1041 output before the outer reload. */
1042 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*)0,
1043 in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1044 dont_remove_subreg
= 1;
1047 /* Similarly for paradoxical and problematical SUBREGs on the output.
1048 Note that there is no reason we need worry about the previous value
1049 of SUBREG_REG (out); even if wider than out,
1050 storing in a subreg is entitled to clobber it all
1051 (except in the case of STRICT_LOW_PART,
1052 and in that case the constraint should label it input-output.) */
1053 if (out
!= 0 && GET_CODE (out
) == SUBREG
1054 && (SUBREG_BYTE (out
) == 0 || strict_low
)
1055 #ifdef CLASS_CANNOT_CHANGE_MODE
1056 && (class != CLASS_CANNOT_CHANGE_MODE
1057 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1060 && (CONSTANT_P (SUBREG_REG (out
))
1062 || (((GET_CODE (SUBREG_REG (out
)) == REG
1063 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1064 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1065 && ((GET_MODE_SIZE (outmode
)
1066 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1067 #ifdef WORD_REGISTER_OPERATIONS
1068 || ((GET_MODE_SIZE (outmode
)
1069 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1070 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1071 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1075 || (GET_CODE (SUBREG_REG (out
)) == REG
1076 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1077 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1078 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1080 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1082 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1083 GET_MODE (SUBREG_REG (out
)))))
1084 || ! HARD_REGNO_MODE_OK (subreg_regno (out
), outmode
)))
1085 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1086 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1087 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1088 GET_MODE (SUBREG_REG (out
)),
1092 #ifdef CLASS_CANNOT_CHANGE_MODE
1093 || (GET_CODE (SUBREG_REG (out
)) == REG
1094 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1095 && (TEST_HARD_REG_BIT
1096 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1097 REGNO (SUBREG_REG (out
))))
1098 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1103 out_subreg_loc
= outloc
;
1104 outloc
= &SUBREG_REG (out
);
1106 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1107 if (GET_CODE (out
) == MEM
1108 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1111 outmode
= GET_MODE (out
);
1114 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1115 either M1 is not valid for R or M2 is wider than a word but we only
1116 need one word to store an M2-sized quantity in R.
1118 However, we must reload the inner reg *as well as* the subreg in
1119 that case. In this case, the inner reg is an in-out reload. */
1121 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
))
1123 /* This relies on the fact that emit_reload_insns outputs the
1124 instructions for output reloads of type RELOAD_OTHER in reverse
1125 order of the reloads. Thus if the outer reload is also of type
1126 RELOAD_OTHER, we are guaranteed that this inner reload will be
1127 output after the outer reload. */
1128 dont_remove_subreg
= 1;
1129 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1131 find_valid_class (outmode
,
1132 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1133 GET_MODE (SUBREG_REG (out
)),
1136 VOIDmode
, VOIDmode
, 0, 0,
1137 opnum
, RELOAD_OTHER
);
1140 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1141 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1142 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1143 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1146 /* If IN is a SUBREG of a hard register, make a new REG. This
1147 simplifies some of the cases below. */
1149 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1150 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1151 && ! dont_remove_subreg
)
1152 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1154 /* Similarly for OUT. */
1155 if (out
!= 0 && GET_CODE (out
) == SUBREG
1156 && GET_CODE (SUBREG_REG (out
)) == REG
1157 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1158 && ! dont_remove_subreg
)
1159 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1161 /* Narrow down the class of register wanted if that is
1162 desirable on this machine for efficiency. */
1164 class = PREFERRED_RELOAD_CLASS (in
, class);
1166 /* Output reloads may need analogous treatment, different in detail. */
1167 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1169 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1172 /* Make sure we use a class that can handle the actual pseudo
1173 inside any subreg. For example, on the 386, QImode regs
1174 can appear within SImode subregs. Although GENERAL_REGS
1175 can handle SImode, QImode needs a smaller class. */
1176 #ifdef LIMIT_RELOAD_CLASS
1178 class = LIMIT_RELOAD_CLASS (inmode
, class);
1179 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1180 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1183 class = LIMIT_RELOAD_CLASS (outmode
, class);
1184 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1185 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1188 /* Verify that this class is at least possible for the mode that
1190 if (this_insn_is_asm
)
1192 enum machine_mode mode
;
1193 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1197 if (mode
== VOIDmode
)
1199 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1204 outmode
= word_mode
;
1206 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1207 if (HARD_REGNO_MODE_OK (i
, mode
)
1208 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1210 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1213 for (j
= 1; j
< nregs
; j
++)
1214 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1219 if (i
== FIRST_PSEUDO_REGISTER
)
1221 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1226 /* Optional output reloads are always OK even if we have no register class,
1227 since the function of these reloads is only to have spill_reg_store etc.
1228 set, so that the storing insn can be deleted later. */
1229 if (class == NO_REGS
1230 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1233 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1237 /* See if we need a secondary reload register to move between CLASS
1238 and IN or CLASS and OUT. Get the icode and push any required reloads
1239 needed for each of them if so. */
1241 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1244 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1245 &secondary_in_icode
);
1248 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1249 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1250 secondary_out_reload
1251 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1252 type
, &secondary_out_icode
);
1255 /* We found no existing reload suitable for re-use.
1256 So add an additional reload. */
1258 #ifdef SECONDARY_MEMORY_NEEDED
1259 /* If a memory location is needed for the copy, make one. */
1260 if (in
!= 0 && GET_CODE (in
) == REG
1261 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1262 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1264 get_secondary_mem (in
, inmode
, opnum
, type
);
1270 rld
[i
].class = class;
1271 rld
[i
].inmode
= inmode
;
1272 rld
[i
].outmode
= outmode
;
1274 rld
[i
].optional
= optional
;
1276 rld
[i
].nocombine
= 0;
1277 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1278 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1279 rld
[i
].opnum
= opnum
;
1280 rld
[i
].when_needed
= type
;
1281 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1282 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1283 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1284 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1285 rld
[i
].secondary_p
= 0;
1289 #ifdef SECONDARY_MEMORY_NEEDED
1290 if (out
!= 0 && GET_CODE (out
) == REG
1291 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1292 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1294 get_secondary_mem (out
, outmode
, opnum
, type
);
1299 /* We are reusing an existing reload,
1300 but we may have additional information for it.
1301 For example, we may now have both IN and OUT
1302 while the old one may have just one of them. */
1304 /* The modes can be different. If they are, we want to reload in
1305 the larger mode, so that the value is valid for both modes. */
1306 if (inmode
!= VOIDmode
1307 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1308 rld
[i
].inmode
= inmode
;
1309 if (outmode
!= VOIDmode
1310 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1311 rld
[i
].outmode
= outmode
;
1314 rtx in_reg
= inloc
? *inloc
: 0;
1315 /* If we merge reloads for two distinct rtl expressions that
1316 are identical in content, there might be duplicate address
1317 reloads. Remove the extra set now, so that if we later find
1318 that we can inherit this reload, we can get rid of the
1319 address reloads altogether.
1321 Do not do this if both reloads are optional since the result
1322 would be an optional reload which could potentially leave
1323 unresolved address replacements.
1325 It is not sufficient to call transfer_replacements since
1326 choose_reload_regs will remove the replacements for address
1327 reloads of inherited reloads which results in the same
1329 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1330 && ! (rld
[i
].optional
&& optional
))
1332 /* We must keep the address reload with the lower operand
1334 if (opnum
> rld
[i
].opnum
)
1336 remove_address_replacements (in
);
1338 in_reg
= rld
[i
].in_reg
;
1341 remove_address_replacements (rld
[i
].in
);
1344 rld
[i
].in_reg
= in_reg
;
1349 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1351 if (reg_class_subset_p (class, rld
[i
].class))
1352 rld
[i
].class = class;
1353 rld
[i
].optional
&= optional
;
1354 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1355 opnum
, rld
[i
].opnum
))
1356 rld
[i
].when_needed
= RELOAD_OTHER
;
1357 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1360 /* If the ostensible rtx being reload differs from the rtx found
1361 in the location to substitute, this reload is not safe to combine
1362 because we cannot reliably tell whether it appears in the insn. */
1364 if (in
!= 0 && in
!= *inloc
)
1365 rld
[i
].nocombine
= 1;
1368 /* This was replaced by changes in find_reloads_address_1 and the new
1369 function inc_for_reload, which go with a new meaning of reload_inc. */
1371 /* If this is an IN/OUT reload in an insn that sets the CC,
1372 it must be for an autoincrement. It doesn't work to store
1373 the incremented value after the insn because that would clobber the CC.
1374 So we must do the increment of the value reloaded from,
1375 increment it, store it back, then decrement again. */
1376 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1380 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1381 /* If we did not find a nonzero amount-to-increment-by,
1382 that contradicts the belief that IN is being incremented
1383 in an address in this insn. */
1384 if (rld
[i
].inc
== 0)
1389 /* If we will replace IN and OUT with the reload-reg,
1390 record where they are located so that substitution need
1391 not do a tree walk. */
1393 if (replace_reloads
)
1397 register struct replacement
*r
= &replacements
[n_replacements
++];
1399 r
->subreg_loc
= in_subreg_loc
;
1403 if (outloc
!= 0 && outloc
!= inloc
)
1405 register struct replacement
*r
= &replacements
[n_replacements
++];
1408 r
->subreg_loc
= out_subreg_loc
;
1413 /* If this reload is just being introduced and it has both
1414 an incoming quantity and an outgoing quantity that are
1415 supposed to be made to match, see if either one of the two
1416 can serve as the place to reload into.
1418 If one of them is acceptable, set rld[i].reg_rtx
1421 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1423 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1426 earlyclobber_operand_p (out
));
1428 /* If the outgoing register already contains the same value
1429 as the incoming one, we can dispense with loading it.
1430 The easiest way to tell the caller that is to give a phony
1431 value for the incoming operand (same as outgoing one). */
1432 if (rld
[i
].reg_rtx
== out
1433 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1434 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1435 static_reload_reg_p
, i
, inmode
))
1439 /* If this is an input reload and the operand contains a register that
1440 dies in this insn and is used nowhere else, see if it is the right class
1441 to be used for this reload. Use it if so. (This occurs most commonly
1442 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1443 this if it is also an output reload that mentions the register unless
1444 the output is a SUBREG that clobbers an entire register.
1446 Note that the operand might be one of the spill regs, if it is a
1447 pseudo reg and we are in a block where spilling has not taken place.
1448 But if there is no spilling in this block, that is OK.
1449 An explicitly used hard reg cannot be a spill reg. */
1451 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1455 enum machine_mode rel_mode
= inmode
;
1457 if (out
&& GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (inmode
))
1460 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1461 if (REG_NOTE_KIND (note
) == REG_DEAD
1462 && GET_CODE (XEXP (note
, 0)) == REG
1463 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1464 && reg_mentioned_p (XEXP (note
, 0), in
)
1465 && ! refers_to_regno_for_reload_p (regno
,
1467 + HARD_REGNO_NREGS (regno
,
1469 PATTERN (this_insn
), inloc
)
1470 /* If this is also an output reload, IN cannot be used as
1471 the reload register if it is set in this insn unless IN
1473 && (out
== 0 || in
== out
1474 || ! hard_reg_set_here_p (regno
,
1476 + HARD_REGNO_NREGS (regno
,
1478 PATTERN (this_insn
)))
1479 /* ??? Why is this code so different from the previous?
1480 Is there any simple coherent way to describe the two together?
1481 What's going on here. */
1483 || (GET_CODE (in
) == SUBREG
1484 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1486 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1487 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1488 /* Make sure the operand fits in the reg that dies. */
1489 && (GET_MODE_SIZE (rel_mode
)
1490 <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1491 && HARD_REGNO_MODE_OK (regno
, inmode
)
1492 && HARD_REGNO_MODE_OK (regno
, outmode
))
1495 unsigned int nregs
= MAX (HARD_REGNO_NREGS (regno
, inmode
),
1496 HARD_REGNO_NREGS (regno
, outmode
));
1498 for (offs
= 0; offs
< nregs
; offs
++)
1499 if (fixed_regs
[regno
+ offs
]
1500 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1506 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1513 output_reloadnum
= i
;
1518 /* Record an additional place we must replace a value
1519 for which we have already recorded a reload.
1520 RELOADNUM is the value returned by push_reload
1521 when the reload was recorded.
1522 This is used in insn patterns that use match_dup. */
1525 push_replacement (loc
, reloadnum
, mode
)
1528 enum machine_mode mode
;
1530 if (replace_reloads
)
1532 register struct replacement
*r
= &replacements
[n_replacements
++];
1533 r
->what
= reloadnum
;
1540 /* Transfer all replacements that used to be in reload FROM to be in
1544 transfer_replacements (to
, from
)
1549 for (i
= 0; i
< n_replacements
; i
++)
1550 if (replacements
[i
].what
== from
)
1551 replacements
[i
].what
= to
;
1554 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1555 or a subpart of it. If we have any replacements registered for IN_RTX,
1556 cancel the reloads that were supposed to load them.
1557 Return non-zero if we canceled any reloads. */
1559 remove_address_replacements (in_rtx
)
1563 char reload_flags
[MAX_RELOADS
];
1564 int something_changed
= 0;
1566 memset (reload_flags
, 0, sizeof reload_flags
);
1567 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1569 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1570 reload_flags
[replacements
[i
].what
] |= 1;
1573 replacements
[j
++] = replacements
[i
];
1574 reload_flags
[replacements
[i
].what
] |= 2;
1577 /* Note that the following store must be done before the recursive calls. */
1580 for (i
= n_reloads
- 1; i
>= 0; i
--)
1582 if (reload_flags
[i
] == 1)
1584 deallocate_reload_reg (i
);
1585 remove_address_replacements (rld
[i
].in
);
1587 something_changed
= 1;
1590 return something_changed
;
1593 /* If there is only one output reload, and it is not for an earlyclobber
1594 operand, try to combine it with a (logically unrelated) input reload
1595 to reduce the number of reload registers needed.
1597 This is safe if the input reload does not appear in
1598 the value being output-reloaded, because this implies
1599 it is not needed any more once the original insn completes.
1601 If that doesn't work, see we can use any of the registers that
1602 die in this insn as a reload register. We can if it is of the right
1603 class and does not appear in the value being output-reloaded. */
1609 int output_reload
= -1;
1610 int secondary_out
= -1;
1613 /* Find the output reload; return unless there is exactly one
1614 and that one is mandatory. */
1616 for (i
= 0; i
< n_reloads
; i
++)
1617 if (rld
[i
].out
!= 0)
1619 if (output_reload
>= 0)
1624 if (output_reload
< 0 || rld
[output_reload
].optional
)
1627 /* An input-output reload isn't combinable. */
1629 if (rld
[output_reload
].in
!= 0)
1632 /* If this reload is for an earlyclobber operand, we can't do anything. */
1633 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1636 /* Check each input reload; can we combine it? */
1638 for (i
= 0; i
< n_reloads
; i
++)
1639 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1640 /* Life span of this reload must not extend past main insn. */
1641 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1642 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1643 && rld
[i
].when_needed
!= RELOAD_OTHER
1644 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1645 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1646 rld
[output_reload
].outmode
))
1648 && rld
[i
].reg_rtx
== 0
1649 #ifdef SECONDARY_MEMORY_NEEDED
1650 /* Don't combine two reloads with different secondary
1651 memory locations. */
1652 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1653 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1654 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1655 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1657 && (SMALL_REGISTER_CLASSES
1658 ? (rld
[i
].class == rld
[output_reload
].class)
1659 : (reg_class_subset_p (rld
[i
].class,
1660 rld
[output_reload
].class)
1661 || reg_class_subset_p (rld
[output_reload
].class,
1663 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1664 /* Args reversed because the first arg seems to be
1665 the one that we imagine being modified
1666 while the second is the one that might be affected. */
1667 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1669 /* However, if the input is a register that appears inside
1670 the output, then we also can't share.
1671 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1672 If the same reload reg is used for both reg 69 and the
1673 result to be stored in memory, then that result
1674 will clobber the address of the memory ref. */
1675 && ! (GET_CODE (rld
[i
].in
) == REG
1676 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1677 rld
[output_reload
].out
))))
1678 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
)
1679 && (reg_class_size
[(int) rld
[i
].class]
1680 || SMALL_REGISTER_CLASSES
)
1681 /* We will allow making things slightly worse by combining an
1682 input and an output, but no worse than that. */
1683 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1684 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1688 /* We have found a reload to combine with! */
1689 rld
[i
].out
= rld
[output_reload
].out
;
1690 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1691 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1692 /* Mark the old output reload as inoperative. */
1693 rld
[output_reload
].out
= 0;
1694 /* The combined reload is needed for the entire insn. */
1695 rld
[i
].when_needed
= RELOAD_OTHER
;
1696 /* If the output reload had a secondary reload, copy it. */
1697 if (rld
[output_reload
].secondary_out_reload
!= -1)
1699 rld
[i
].secondary_out_reload
1700 = rld
[output_reload
].secondary_out_reload
;
1701 rld
[i
].secondary_out_icode
1702 = rld
[output_reload
].secondary_out_icode
;
1705 #ifdef SECONDARY_MEMORY_NEEDED
1706 /* Copy any secondary MEM. */
1707 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1708 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1709 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1711 /* If required, minimize the register class. */
1712 if (reg_class_subset_p (rld
[output_reload
].class,
1714 rld
[i
].class = rld
[output_reload
].class;
1716 /* Transfer all replacements from the old reload to the combined. */
1717 for (j
= 0; j
< n_replacements
; j
++)
1718 if (replacements
[j
].what
== output_reload
)
1719 replacements
[j
].what
= i
;
1724 /* If this insn has only one operand that is modified or written (assumed
1725 to be the first), it must be the one corresponding to this reload. It
1726 is safe to use anything that dies in this insn for that output provided
1727 that it does not occur in the output (we already know it isn't an
1728 earlyclobber. If this is an asm insn, give up. */
1730 if (INSN_CODE (this_insn
) == -1)
1733 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1734 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1735 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1738 /* See if some hard register that dies in this insn and is not used in
1739 the output is the right class. Only works if the register we pick
1740 up can fully hold our output reload. */
1741 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1742 if (REG_NOTE_KIND (note
) == REG_DEAD
1743 && GET_CODE (XEXP (note
, 0)) == REG
1744 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1745 rld
[output_reload
].out
)
1746 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1747 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1748 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1749 REGNO (XEXP (note
, 0)))
1750 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1751 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1752 /* Ensure that a secondary or tertiary reload for this output
1753 won't want this register. */
1754 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1755 || (! (TEST_HARD_REG_BIT
1756 (reg_class_contents
[(int) rld
[secondary_out
].class],
1757 REGNO (XEXP (note
, 0))))
1758 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1759 || ! (TEST_HARD_REG_BIT
1760 (reg_class_contents
[(int) rld
[secondary_out
].class],
1761 REGNO (XEXP (note
, 0)))))))
1762 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1764 rld
[output_reload
].reg_rtx
1765 = gen_rtx_REG (rld
[output_reload
].outmode
,
1766 REGNO (XEXP (note
, 0)));
1771 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1772 See if one of IN and OUT is a register that may be used;
1773 this is desirable since a spill-register won't be needed.
1774 If so, return the register rtx that proves acceptable.
1776 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1777 CLASS is the register class required for the reload.
1779 If FOR_REAL is >= 0, it is the number of the reload,
1780 and in some cases when it can be discovered that OUT doesn't need
1781 to be computed, clear out rld[FOR_REAL].out.
1783 If FOR_REAL is -1, this should not be done, because this call
1784 is just to see if a register can be found, not to find and install it.
1786 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1787 puts an additional constraint on being able to use IN for OUT since
1788 IN must not appear elsewhere in the insn (it is assumed that IN itself
1789 is safe from the earlyclobber). */
1792 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1793 inmode
, outmode
, class, for_real
, earlyclobber
)
1794 rtx real_in
, real_out
;
1795 rtx
*inloc
, *outloc
;
1796 enum machine_mode inmode
, outmode
;
1797 enum reg_class
class;
1807 /* If operands exceed a word, we can't use either of them
1808 unless they have the same size. */
1809 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1810 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1811 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1814 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1815 respectively refers to a hard register. */
1817 /* Find the inside of any subregs. */
1818 while (GET_CODE (out
) == SUBREG
)
1820 if (GET_CODE (SUBREG_REG (out
)) == REG
1821 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
1822 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1823 GET_MODE (SUBREG_REG (out
)),
1826 out
= SUBREG_REG (out
);
1828 while (GET_CODE (in
) == SUBREG
)
1830 if (GET_CODE (SUBREG_REG (in
)) == REG
1831 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
1832 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1833 GET_MODE (SUBREG_REG (in
)),
1836 in
= SUBREG_REG (in
);
1839 /* Narrow down the reg class, the same way push_reload will;
1840 otherwise we might find a dummy now, but push_reload won't. */
1841 class = PREFERRED_RELOAD_CLASS (in
, class);
1843 /* See if OUT will do. */
1844 if (GET_CODE (out
) == REG
1845 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1847 unsigned int regno
= REGNO (out
) + out_offset
;
1848 unsigned int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1851 /* When we consider whether the insn uses OUT,
1852 ignore references within IN. They don't prevent us
1853 from copying IN into OUT, because those refs would
1854 move into the insn that reloads IN.
1856 However, we only ignore IN in its role as this reload.
1857 If the insn uses IN elsewhere and it contains OUT,
1858 that counts. We can't be sure it's the "same" operand
1859 so it might not go through this reload. */
1861 *inloc
= const0_rtx
;
1863 if (regno
< FIRST_PSEUDO_REGISTER
1864 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1865 PATTERN (this_insn
), outloc
))
1869 for (i
= 0; i
< nwords
; i
++)
1870 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1876 if (GET_CODE (real_out
) == REG
)
1879 value
= gen_rtx_REG (outmode
, regno
);
1886 /* Consider using IN if OUT was not acceptable
1887 or if OUT dies in this insn (like the quotient in a divmod insn).
1888 We can't use IN unless it is dies in this insn,
1889 which means we must know accurately which hard regs are live.
1890 Also, the result can't go in IN if IN is used within OUT,
1891 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1892 if (hard_regs_live_known
1893 && GET_CODE (in
) == REG
1894 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1896 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1897 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1898 && !fixed_regs
[REGNO (in
)]
1899 && HARD_REGNO_MODE_OK (REGNO (in
),
1900 /* The only case where out and real_out might
1901 have different modes is where real_out
1902 is a subreg, and in that case, out
1904 (GET_MODE (out
) != VOIDmode
1905 ? GET_MODE (out
) : outmode
)))
1907 unsigned int regno
= REGNO (in
) + in_offset
;
1908 unsigned int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1910 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*)0)
1911 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1912 PATTERN (this_insn
))
1914 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1915 PATTERN (this_insn
), inloc
)))
1919 for (i
= 0; i
< nwords
; i
++)
1920 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1926 /* If we were going to use OUT as the reload reg
1927 and changed our mind, it means OUT is a dummy that
1928 dies here. So don't bother copying value to it. */
1929 if (for_real
>= 0 && value
== real_out
)
1930 rld
[for_real
].out
= 0;
1931 if (GET_CODE (real_in
) == REG
)
1934 value
= gen_rtx_REG (inmode
, regno
);
1942 /* This page contains subroutines used mainly for determining
1943 whether the IN or an OUT of a reload can serve as the
1946 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1949 earlyclobber_operand_p (x
)
1954 for (i
= 0; i
< n_earlyclobbers
; i
++)
1955 if (reload_earlyclobbers
[i
] == x
)
1961 /* Return 1 if expression X alters a hard reg in the range
1962 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1963 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1964 X should be the body of an instruction. */
1967 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1968 unsigned int beg_regno
, end_regno
;
1971 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1973 register rtx op0
= SET_DEST (x
);
1975 while (GET_CODE (op0
) == SUBREG
)
1976 op0
= SUBREG_REG (op0
);
1977 if (GET_CODE (op0
) == REG
)
1979 unsigned int r
= REGNO (op0
);
1981 /* See if this reg overlaps range under consideration. */
1983 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1987 else if (GET_CODE (x
) == PARALLEL
)
1989 register int i
= XVECLEN (x
, 0) - 1;
1992 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1999 /* Return 1 if ADDR is a valid memory address for mode MODE,
2000 and check that each pseudo reg has the proper kind of
2004 strict_memory_address_p (mode
, addr
)
2005 enum machine_mode mode ATTRIBUTE_UNUSED
;
2008 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2015 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2016 if they are the same hard reg, and has special hacks for
2017 autoincrement and autodecrement.
2018 This is specifically intended for find_reloads to use
2019 in determining whether two operands match.
2020 X is the operand whose number is the lower of the two.
2022 The value is 2 if Y contains a pre-increment that matches
2023 a non-incrementing address in X. */
2025 /* ??? To be completely correct, we should arrange to pass
2026 for X the output operand and for Y the input operand.
2027 For now, we assume that the output operand has the lower number
2028 because that is natural in (SET output (... input ...)). */
2031 operands_match_p (x
, y
)
2035 register RTX_CODE code
= GET_CODE (x
);
2036 register const char *fmt
;
2041 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
2042 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
2043 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2049 i
= REGNO (SUBREG_REG (x
));
2050 if (i
>= FIRST_PSEUDO_REGISTER
)
2052 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2053 GET_MODE (SUBREG_REG (x
)),
2060 if (GET_CODE (y
) == SUBREG
)
2062 j
= REGNO (SUBREG_REG (y
));
2063 if (j
>= FIRST_PSEUDO_REGISTER
)
2065 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2066 GET_MODE (SUBREG_REG (y
)),
2073 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2074 multiple hard register group, so that for example (reg:DI 0) and
2075 (reg:SI 1) will be considered the same register. */
2076 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2077 && i
< FIRST_PSEUDO_REGISTER
)
2078 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
2079 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2080 && j
< FIRST_PSEUDO_REGISTER
)
2081 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
2085 /* If two operands must match, because they are really a single
2086 operand of an assembler insn, then two postincrements are invalid
2087 because the assembler insn would increment only once.
2088 On the other hand, an postincrement matches ordinary indexing
2089 if the postincrement is the output operand. */
2090 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2091 return operands_match_p (XEXP (x
, 0), y
);
2092 /* Two preincrements are invalid
2093 because the assembler insn would increment only once.
2094 On the other hand, an preincrement matches ordinary indexing
2095 if the preincrement is the input operand.
2096 In this case, return 2, since some callers need to do special
2097 things when this happens. */
2098 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2099 || GET_CODE (y
) == PRE_MODIFY
)
2100 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2104 /* Now we have disposed of all the cases
2105 in which different rtx codes can match. */
2106 if (code
!= GET_CODE (y
))
2108 if (code
== LABEL_REF
)
2109 return XEXP (x
, 0) == XEXP (y
, 0);
2110 if (code
== SYMBOL_REF
)
2111 return XSTR (x
, 0) == XSTR (y
, 0);
2113 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2115 if (GET_MODE (x
) != GET_MODE (y
))
2118 /* Compare the elements. If any pair of corresponding elements
2119 fail to match, return 0 for the whole things. */
2122 fmt
= GET_RTX_FORMAT (code
);
2123 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2129 if (XWINT (x
, i
) != XWINT (y
, i
))
2134 if (XINT (x
, i
) != XINT (y
, i
))
2139 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2142 /* If any subexpression returns 2,
2143 we should return 2 if we are successful. */
2152 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2154 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2156 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2164 /* It is believed that rtx's at this level will never
2165 contain anything but integers and other rtx's,
2166 except for within LABEL_REFs and SYMBOL_REFs. */
2171 return 1 + success_2
;
2174 /* Describe the range of registers or memory referenced by X.
2175 If X is a register, set REG_FLAG and put the first register
2176 number into START and the last plus one into END.
2177 If X is a memory reference, put a base address into BASE
2178 and a range of integer offsets into START and END.
2179 If X is pushing on the stack, we can assume it causes no trouble,
2180 so we set the SAFE field. */
2182 static struct decomposition
2186 struct decomposition val
;
2192 if (GET_CODE (x
) == MEM
)
2194 rtx base
= NULL_RTX
, offset
= 0;
2195 rtx addr
= XEXP (x
, 0);
2197 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2198 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2200 val
.base
= XEXP (addr
, 0);
2201 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2202 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2203 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2207 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2209 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2210 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2211 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2213 val
.base
= XEXP (addr
, 0);
2214 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2215 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2216 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2221 if (GET_CODE (addr
) == CONST
)
2223 addr
= XEXP (addr
, 0);
2226 if (GET_CODE (addr
) == PLUS
)
2228 if (CONSTANT_P (XEXP (addr
, 0)))
2230 base
= XEXP (addr
, 1);
2231 offset
= XEXP (addr
, 0);
2233 else if (CONSTANT_P (XEXP (addr
, 1)))
2235 base
= XEXP (addr
, 0);
2236 offset
= XEXP (addr
, 1);
2243 offset
= const0_rtx
;
2245 if (GET_CODE (offset
) == CONST
)
2246 offset
= XEXP (offset
, 0);
2247 if (GET_CODE (offset
) == PLUS
)
2249 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2251 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2252 offset
= XEXP (offset
, 0);
2254 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2256 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2257 offset
= XEXP (offset
, 1);
2261 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2262 offset
= const0_rtx
;
2265 else if (GET_CODE (offset
) != CONST_INT
)
2267 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2268 offset
= const0_rtx
;
2271 if (all_const
&& GET_CODE (base
) == PLUS
)
2272 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2274 if (GET_CODE (offset
) != CONST_INT
)
2277 val
.start
= INTVAL (offset
);
2278 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2282 else if (GET_CODE (x
) == REG
)
2285 val
.start
= true_regnum (x
);
2288 /* A pseudo with no hard reg. */
2289 val
.start
= REGNO (x
);
2290 val
.end
= val
.start
+ 1;
2294 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2296 else if (GET_CODE (x
) == SUBREG
)
2298 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2299 /* This could be more precise, but it's good enough. */
2300 return decompose (SUBREG_REG (x
));
2302 val
.start
= true_regnum (x
);
2304 return decompose (SUBREG_REG (x
));
2307 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2309 else if (CONSTANT_P (x
)
2310 /* This hasn't been assigned yet, so it can't conflict yet. */
2311 || GET_CODE (x
) == SCRATCH
)
2318 /* Return 1 if altering Y will not modify the value of X.
2319 Y is also described by YDATA, which should be decompose (Y). */
2322 immune_p (x
, y
, ydata
)
2324 struct decomposition ydata
;
2326 struct decomposition xdata
;
2329 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, (rtx
*)0);
2333 if (GET_CODE (y
) != MEM
)
2335 /* If Y is memory and X is not, Y can't affect X. */
2336 if (GET_CODE (x
) != MEM
)
2339 xdata
= decompose (x
);
2341 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2343 /* If bases are distinct symbolic constants, there is no overlap. */
2344 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2346 /* Constants and stack slots never overlap. */
2347 if (CONSTANT_P (xdata
.base
)
2348 && (ydata
.base
== frame_pointer_rtx
2349 || ydata
.base
== hard_frame_pointer_rtx
2350 || ydata
.base
== stack_pointer_rtx
))
2352 if (CONSTANT_P (ydata
.base
)
2353 && (xdata
.base
== frame_pointer_rtx
2354 || xdata
.base
== hard_frame_pointer_rtx
2355 || xdata
.base
== stack_pointer_rtx
))
2357 /* If either base is variable, we don't know anything. */
2361 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2364 /* Similar, but calls decompose. */
2367 safe_from_earlyclobber (op
, clobber
)
2370 struct decomposition early_data
;
2372 early_data
= decompose (clobber
);
2373 return immune_p (op
, clobber
, early_data
);
2376 /* Main entry point of this file: search the body of INSN
2377 for values that need reloading and record them with push_reload.
2378 REPLACE nonzero means record also where the values occur
2379 so that subst_reloads can be used.
2381 IND_LEVELS says how many levels of indirection are supported by this
2382 machine; a value of zero means that a memory reference is not a valid
2385 LIVE_KNOWN says we have valid information about which hard
2386 regs are live at each point in the program; this is true when
2387 we are called from global_alloc but false when stupid register
2388 allocation has been done.
2390 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2391 which is nonnegative if the reg has been commandeered for reloading into.
2392 It is copied into STATIC_RELOAD_REG_P and referenced from there
2393 by various subroutines.
2395 Return TRUE if some operands need to be changed, because of swapping
2396 commutative operands, reg_equiv_address substitution, or whatever. */
2399 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2401 int replace
, ind_levels
;
2403 short *reload_reg_p
;
2405 register int insn_code_number
;
2408 /* These start out as the constraints for the insn
2409 and they are chewed up as we consider alternatives. */
2410 char *constraints
[MAX_RECOG_OPERANDS
];
2411 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2413 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2414 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2415 /* Nonzero for a MEM operand whose entire address needs a reload. */
2416 int address_reloaded
[MAX_RECOG_OPERANDS
];
2417 /* Value of enum reload_type to use for operand. */
2418 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2419 /* Value of enum reload_type to use within address of operand. */
2420 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2421 /* Save the usage of each operand. */
2422 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2423 int no_input_reloads
= 0, no_output_reloads
= 0;
2425 int this_alternative
[MAX_RECOG_OPERANDS
];
2426 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2427 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2428 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2429 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2430 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2432 int goal_alternative
[MAX_RECOG_OPERANDS
];
2433 int this_alternative_number
;
2434 int goal_alternative_number
= 0;
2435 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2436 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2437 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2438 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2439 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2440 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2441 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2442 int goal_alternative_swapped
;
2445 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2446 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2447 rtx body
= PATTERN (insn
);
2448 rtx set
= single_set (insn
);
2449 int goal_earlyclobber
= 0, this_earlyclobber
;
2450 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2456 n_earlyclobbers
= 0;
2457 replace_reloads
= replace
;
2458 hard_regs_live_known
= live_known
;
2459 static_reload_reg_p
= reload_reg_p
;
2461 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2462 neither are insns that SET cc0. Insns that use CC0 are not allowed
2463 to have any input reloads. */
2464 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2465 no_output_reloads
= 1;
2468 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2469 no_input_reloads
= 1;
2470 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2471 no_output_reloads
= 1;
2474 #ifdef SECONDARY_MEMORY_NEEDED
2475 /* The eliminated forms of any secondary memory locations are per-insn, so
2476 clear them out here. */
2478 memset ((char *) secondary_memlocs_elim
, 0, sizeof secondary_memlocs_elim
);
2481 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2482 is cheap to move between them. If it is not, there may not be an insn
2483 to do the copy, so we may need a reload. */
2484 if (GET_CODE (body
) == SET
2485 && GET_CODE (SET_DEST (body
)) == REG
2486 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2487 && GET_CODE (SET_SRC (body
)) == REG
2488 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2489 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body
)),
2490 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2491 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2494 extract_insn (insn
);
2496 noperands
= reload_n_operands
= recog_data
.n_operands
;
2497 n_alternatives
= recog_data
.n_alternatives
;
2499 /* Just return "no reloads" if insn has no operands with constraints. */
2500 if (noperands
== 0 || n_alternatives
== 0)
2503 insn_code_number
= INSN_CODE (insn
);
2504 this_insn_is_asm
= insn_code_number
< 0;
2506 memcpy (operand_mode
, recog_data
.operand_mode
,
2507 noperands
* sizeof (enum machine_mode
));
2508 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2512 /* If we will need to know, later, whether some pair of operands
2513 are the same, we must compare them now and save the result.
2514 Reloading the base and index registers will clobber them
2515 and afterward they will fail to match. */
2517 for (i
= 0; i
< noperands
; i
++)
2522 substed_operand
[i
] = recog_data
.operand
[i
];
2525 modified
[i
] = RELOAD_READ
;
2527 /* Scan this operand's constraint to see if it is an output operand,
2528 an in-out operand, is commutative, or should match another. */
2533 modified
[i
] = RELOAD_WRITE
;
2535 modified
[i
] = RELOAD_READ_WRITE
;
2538 /* The last operand should not be marked commutative. */
2539 if (i
== noperands
- 1)
2544 else if (c
>= '0' && c
<= '9')
2547 operands_match
[c
][i
]
2548 = operands_match_p (recog_data
.operand
[c
],
2549 recog_data
.operand
[i
]);
2551 /* An operand may not match itself. */
2555 /* If C can be commuted with C+1, and C might need to match I,
2556 then C+1 might also need to match I. */
2557 if (commutative
>= 0)
2559 if (c
== commutative
|| c
== commutative
+ 1)
2561 int other
= c
+ (c
== commutative
? 1 : -1);
2562 operands_match
[other
][i
]
2563 = operands_match_p (recog_data
.operand
[other
],
2564 recog_data
.operand
[i
]);
2566 if (i
== commutative
|| i
== commutative
+ 1)
2568 int other
= i
+ (i
== commutative
? 1 : -1);
2569 operands_match
[c
][other
]
2570 = operands_match_p (recog_data
.operand
[c
],
2571 recog_data
.operand
[other
]);
2573 /* Note that C is supposed to be less than I.
2574 No need to consider altering both C and I because in
2575 that case we would alter one into the other. */
2581 /* Examine each operand that is a memory reference or memory address
2582 and reload parts of the addresses into index registers.
2583 Also here any references to pseudo regs that didn't get hard regs
2584 but are equivalent to constants get replaced in the insn itself
2585 with those constants. Nobody will ever see them again.
2587 Finally, set up the preferred classes of each operand. */
2589 for (i
= 0; i
< noperands
; i
++)
2591 register RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2593 address_reloaded
[i
] = 0;
2594 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2595 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2598 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2599 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2602 if (*constraints
[i
] == 0)
2603 /* Ignore things like match_operator operands. */
2605 else if (constraints
[i
][0] == 'p')
2607 find_reloads_address (VOIDmode
, (rtx
*)0,
2608 recog_data
.operand
[i
],
2609 recog_data
.operand_loc
[i
],
2610 i
, operand_type
[i
], ind_levels
, insn
);
2612 /* If we now have a simple operand where we used to have a
2613 PLUS or MULT, re-recognize and try again. */
2614 if ((GET_RTX_CLASS (GET_CODE (*recog_data
.operand_loc
[i
])) == 'o'
2615 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2616 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2617 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2619 INSN_CODE (insn
) = -1;
2620 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2625 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2626 substed_operand
[i
] = recog_data
.operand
[i
];
2628 else if (code
== MEM
)
2631 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2632 recog_data
.operand_loc
[i
],
2633 XEXP (recog_data
.operand
[i
], 0),
2634 &XEXP (recog_data
.operand
[i
], 0),
2635 i
, address_type
[i
], ind_levels
, insn
);
2636 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2637 substed_operand
[i
] = recog_data
.operand
[i
];
2639 else if (code
== SUBREG
)
2641 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2643 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2646 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2648 &address_reloaded
[i
]);
2650 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2651 that didn't get a hard register, emit a USE with a REG_EQUAL
2652 note in front so that we might inherit a previous, possibly
2656 && GET_CODE (op
) == MEM
2657 && GET_CODE (reg
) == REG
2658 && (GET_MODE_SIZE (GET_MODE (reg
))
2659 >= GET_MODE_SIZE (GET_MODE (op
))))
2660 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
), insn
))
2661 = gen_rtx_EXPR_LIST (REG_EQUAL
,
2662 reg_equiv_memory_loc
[REGNO (reg
)], NULL_RTX
);
2664 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2666 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2667 /* We can get a PLUS as an "operand" as a result of register
2668 elimination. See eliminate_regs and gen_reload. We handle
2669 a unary operator by reloading the operand. */
2670 substed_operand
[i
] = recog_data
.operand
[i
]
2671 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2672 ind_levels
, 0, insn
,
2673 &address_reloaded
[i
]);
2674 else if (code
== REG
)
2676 /* This is equivalent to calling find_reloads_toplev.
2677 The code is duplicated for speed.
2678 When we find a pseudo always equivalent to a constant,
2679 we replace it by the constant. We must be sure, however,
2680 that we don't try to replace it in the insn in which it
2682 register int regno
= REGNO (recog_data
.operand
[i
]);
2683 if (reg_equiv_constant
[regno
] != 0
2684 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2686 /* Record the existing mode so that the check if constants are
2687 allowed will work when operand_mode isn't specified. */
2689 if (operand_mode
[i
] == VOIDmode
)
2690 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2692 substed_operand
[i
] = recog_data
.operand
[i
]
2693 = reg_equiv_constant
[regno
];
2695 if (reg_equiv_memory_loc
[regno
] != 0
2696 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2697 /* We need not give a valid is_set_dest argument since the case
2698 of a constant equivalence was checked above. */
2699 substed_operand
[i
] = recog_data
.operand
[i
]
2700 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2701 ind_levels
, 0, insn
,
2702 &address_reloaded
[i
]);
2704 /* If the operand is still a register (we didn't replace it with an
2705 equivalent), get the preferred class to reload it into. */
2706 code
= GET_CODE (recog_data
.operand
[i
]);
2708 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2709 >= FIRST_PSEUDO_REGISTER
)
2710 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2714 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2715 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2718 /* If this is simply a copy from operand 1 to operand 0, merge the
2719 preferred classes for the operands. */
2720 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2721 && recog_data
.operand
[1] == SET_SRC (set
))
2723 preferred_class
[0] = preferred_class
[1]
2724 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2725 pref_or_nothing
[0] |= pref_or_nothing
[1];
2726 pref_or_nothing
[1] |= pref_or_nothing
[0];
2729 /* Now see what we need for pseudo-regs that didn't get hard regs
2730 or got the wrong kind of hard reg. For this, we must consider
2731 all the operands together against the register constraints. */
2733 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2736 goal_alternative_swapped
= 0;
2739 /* The constraints are made of several alternatives.
2740 Each operand's constraint looks like foo,bar,... with commas
2741 separating the alternatives. The first alternatives for all
2742 operands go together, the second alternatives go together, etc.
2744 First loop over alternatives. */
2746 for (this_alternative_number
= 0;
2747 this_alternative_number
< n_alternatives
;
2748 this_alternative_number
++)
2750 /* Loop over operands for one constraint alternative. */
2751 /* LOSERS counts those that don't fit this alternative
2752 and would require loading. */
2754 /* BAD is set to 1 if it some operand can't fit this alternative
2755 even after reloading. */
2757 /* REJECT is a count of how undesirable this alternative says it is
2758 if any reloading is required. If the alternative matches exactly
2759 then REJECT is ignored, but otherwise it gets this much
2760 counted against it in addition to the reloading needed. Each
2761 ? counts three times here since we want the disparaging caused by
2762 a bad register class to only count 1/3 as much. */
2765 this_earlyclobber
= 0;
2767 for (i
= 0; i
< noperands
; i
++)
2769 register char *p
= constraints
[i
];
2770 register int win
= 0;
2772 /* 0 => this operand can be reloaded somehow for this alternative */
2774 /* 0 => this operand can be reloaded if the alternative allows regs. */
2777 register rtx operand
= recog_data
.operand
[i
];
2779 /* Nonzero means this is a MEM that must be reloaded into a reg
2780 regardless of what the constraint says. */
2781 int force_reload
= 0;
2783 /* Nonzero if a constant forced into memory would be OK for this
2786 int earlyclobber
= 0;
2788 /* If the predicate accepts a unary operator, it means that
2789 we need to reload the operand, but do not do this for
2790 match_operator and friends. */
2791 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1' && *p
!= 0)
2792 operand
= XEXP (operand
, 0);
2794 /* If the operand is a SUBREG, extract
2795 the REG or MEM (or maybe even a constant) within.
2796 (Constants can occur as a result of reg_equiv_constant.) */
2798 while (GET_CODE (operand
) == SUBREG
)
2800 /* Offset only matters when operand is a REG and
2801 it is a hard reg. This is because it is passed
2802 to reg_fits_class_p if it is a REG and all pseudos
2803 return 0 from that function. */
2804 if (GET_CODE (SUBREG_REG (operand
)) == REG
2805 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
2807 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
2808 GET_MODE (SUBREG_REG (operand
)),
2809 SUBREG_BYTE (operand
),
2810 GET_MODE (operand
));
2812 operand
= SUBREG_REG (operand
);
2813 /* Force reload if this is a constant or PLUS or if there may
2814 be a problem accessing OPERAND in the outer mode. */
2815 if (CONSTANT_P (operand
)
2816 || GET_CODE (operand
) == PLUS
2817 /* We must force a reload of paradoxical SUBREGs
2818 of a MEM because the alignment of the inner value
2819 may not be enough to do the outer reference. On
2820 big-endian machines, it may also reference outside
2823 On machines that extend byte operations and we have a
2824 SUBREG where both the inner and outer modes are no wider
2825 than a word and the inner mode is narrower, is integral,
2826 and gets extended when loaded from memory, combine.c has
2827 made assumptions about the behavior of the machine in such
2828 register access. If the data is, in fact, in memory we
2829 must always load using the size assumed to be in the
2830 register and let the insn do the different-sized
2833 This is doubly true if WORD_REGISTER_OPERATIONS. In
2834 this case eliminate_regs has left non-paradoxical
2835 subregs for push_reloads to see. Make sure it does
2836 by forcing the reload.
2838 ??? When is it right at this stage to have a subreg
2839 of a mem that is _not_ to be handled specialy? IMO
2840 those should have been reduced to just a mem. */
2841 || ((GET_CODE (operand
) == MEM
2842 || (GET_CODE (operand
)== REG
2843 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2844 #ifndef WORD_REGISTER_OPERATIONS
2845 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2846 < BIGGEST_ALIGNMENT
)
2847 && (GET_MODE_SIZE (operand_mode
[i
])
2848 > GET_MODE_SIZE (GET_MODE (operand
))))
2849 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2850 #ifdef LOAD_EXTEND_OP
2851 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2852 && (GET_MODE_SIZE (GET_MODE (operand
))
2854 && (GET_MODE_SIZE (operand_mode
[i
])
2855 > GET_MODE_SIZE (GET_MODE (operand
)))
2856 && INTEGRAL_MODE_P (GET_MODE (operand
))
2857 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2862 /* This following hunk of code should no longer be
2863 needed at all with SUBREG_BYTE. If you need this
2864 code back, please explain to me why so I can
2865 fix the real problem. -DaveM */
2867 /* Subreg of a hard reg which can't handle the subreg's mode
2868 or which would handle that mode in the wrong number of
2869 registers for subregging to work. */
2870 || (GET_CODE (operand
) == REG
2871 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2872 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2873 && (GET_MODE_SIZE (GET_MODE (operand
))
2875 && ((GET_MODE_SIZE (GET_MODE (operand
))
2877 != HARD_REGNO_NREGS (REGNO (operand
),
2878 GET_MODE (operand
))))
2879 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2886 this_alternative
[i
] = (int) NO_REGS
;
2887 this_alternative_win
[i
] = 0;
2888 this_alternative_match_win
[i
] = 0;
2889 this_alternative_offmemok
[i
] = 0;
2890 this_alternative_earlyclobber
[i
] = 0;
2891 this_alternative_matches
[i
] = -1;
2893 /* An empty constraint or empty alternative
2894 allows anything which matched the pattern. */
2895 if (*p
== 0 || *p
== ',')
2898 /* Scan this alternative's specs for this operand;
2899 set WIN if the operand fits any letter in this alternative.
2900 Otherwise, clear BADOP if this operand could
2901 fit some letter after reloads,
2902 or set WINREG if this operand could fit after reloads
2903 provided the constraint allows some registers. */
2905 while (*p
&& (c
= *p
++) != ',')
2908 case '=': case '+': case '*':
2912 /* The last operand should not be marked commutative. */
2913 if (i
!= noperands
- 1)
2926 /* Ignore rest of this alternative as far as
2927 reloading is concerned. */
2928 while (*p
&& *p
!= ',')
2932 case '0': case '1': case '2': case '3': case '4':
2933 case '5': case '6': case '7': case '8': case '9':
2936 this_alternative_matches
[i
] = c
;
2937 /* We are supposed to match a previous operand.
2938 If we do, we win if that one did.
2939 If we do not, count both of the operands as losers.
2940 (This is too conservative, since most of the time
2941 only a single reload insn will be needed to make
2942 the two operands win. As a result, this alternative
2943 may be rejected when it is actually desirable.) */
2944 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2945 /* If we are matching as if two operands were swapped,
2946 also pretend that operands_match had been computed
2948 But if I is the second of those and C is the first,
2949 don't exchange them, because operands_match is valid
2950 only on one side of its diagonal. */
2952 [(c
== commutative
|| c
== commutative
+ 1)
2953 ? 2 * commutative
+ 1 - c
: c
]
2954 [(i
== commutative
|| i
== commutative
+ 1)
2955 ? 2 * commutative
+ 1 - i
: i
])
2956 : operands_match
[c
][i
])
2958 /* If we are matching a non-offsettable address where an
2959 offsettable address was expected, then we must reject
2960 this combination, because we can't reload it. */
2961 if (this_alternative_offmemok
[c
]
2962 && GET_CODE (recog_data
.operand
[c
]) == MEM
2963 && this_alternative
[c
] == (int) NO_REGS
2964 && ! this_alternative_win
[c
])
2967 did_match
= this_alternative_win
[c
];
2971 /* Operands don't match. */
2973 /* Retroactively mark the operand we had to match
2974 as a loser, if it wasn't already. */
2975 if (this_alternative_win
[c
])
2977 this_alternative_win
[c
] = 0;
2978 if (this_alternative
[c
] == (int) NO_REGS
)
2980 /* But count the pair only once in the total badness of
2981 this alternative, if the pair can be a dummy reload. */
2983 = find_dummy_reload (recog_data
.operand
[i
],
2984 recog_data
.operand
[c
],
2985 recog_data
.operand_loc
[i
],
2986 recog_data
.operand_loc
[c
],
2987 operand_mode
[i
], operand_mode
[c
],
2988 this_alternative
[c
], -1,
2989 this_alternative_earlyclobber
[c
]);
2994 /* This can be fixed with reloads if the operand
2995 we are supposed to match can be fixed with reloads. */
2997 this_alternative
[i
] = this_alternative
[c
];
2999 /* If we have to reload this operand and some previous
3000 operand also had to match the same thing as this
3001 operand, we don't know how to do that. So reject this
3003 if (! did_match
|| force_reload
)
3004 for (j
= 0; j
< i
; j
++)
3005 if (this_alternative_matches
[j
]
3006 == this_alternative_matches
[i
])
3011 /* All necessary reloads for an address_operand
3012 were handled in find_reloads_address. */
3013 this_alternative
[i
] = (int) BASE_REG_CLASS
;
3020 if (GET_CODE (operand
) == MEM
3021 || (GET_CODE (operand
) == REG
3022 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3023 && reg_renumber
[REGNO (operand
)] < 0))
3025 if (CONSTANT_P (operand
)
3026 /* force_const_mem does not accept HIGH. */
3027 && GET_CODE (operand
) != HIGH
)
3033 if (GET_CODE (operand
) == MEM
3034 && ! address_reloaded
[i
]
3035 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3036 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3041 if (GET_CODE (operand
) == MEM
3042 && ! address_reloaded
[i
]
3043 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3044 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3048 /* Memory operand whose address is not offsettable. */
3052 if (GET_CODE (operand
) == MEM
3053 && ! (ind_levels
? offsettable_memref_p (operand
)
3054 : offsettable_nonstrict_memref_p (operand
))
3055 /* Certain mem addresses will become offsettable
3056 after they themselves are reloaded. This is important;
3057 we don't want our own handling of unoffsettables
3058 to override the handling of reg_equiv_address. */
3059 && !(GET_CODE (XEXP (operand
, 0)) == REG
3061 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3065 /* Memory operand whose address is offsettable. */
3069 if ((GET_CODE (operand
) == MEM
3070 /* If IND_LEVELS, find_reloads_address won't reload a
3071 pseudo that didn't get a hard reg, so we have to
3072 reject that case. */
3073 && ((ind_levels
? offsettable_memref_p (operand
)
3074 : offsettable_nonstrict_memref_p (operand
))
3075 /* A reloaded address is offsettable because it is now
3076 just a simple register indirect. */
3077 || address_reloaded
[i
]))
3078 || (GET_CODE (operand
) == REG
3079 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3080 && reg_renumber
[REGNO (operand
)] < 0
3081 /* If reg_equiv_address is nonzero, we will be
3082 loading it into a register; hence it will be
3083 offsettable, but we cannot say that reg_equiv_mem
3084 is offsettable without checking. */
3085 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3086 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3087 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3089 /* force_const_mem does not accept HIGH. */
3090 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3091 || GET_CODE (operand
) == MEM
)
3098 /* Output operand that is stored before the need for the
3099 input operands (and their index registers) is over. */
3100 earlyclobber
= 1, this_earlyclobber
= 1;
3104 #ifndef REAL_ARITHMETIC
3105 /* Match any floating double constant, but only if
3106 we can examine the bits of it reliably. */
3107 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
3108 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
3109 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
3112 if (GET_CODE (operand
) == CONST_DOUBLE
)
3117 if (GET_CODE (operand
) == CONST_DOUBLE
)
3123 if (GET_CODE (operand
) == CONST_DOUBLE
3124 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
3129 if (GET_CODE (operand
) == CONST_INT
3130 || (GET_CODE (operand
) == CONST_DOUBLE
3131 && GET_MODE (operand
) == VOIDmode
))
3134 if (CONSTANT_P (operand
)
3135 #ifdef LEGITIMATE_PIC_OPERAND_P
3136 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3143 if (GET_CODE (operand
) == CONST_INT
3144 || (GET_CODE (operand
) == CONST_DOUBLE
3145 && GET_MODE (operand
) == VOIDmode
))
3157 if (GET_CODE (operand
) == CONST_INT
3158 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
3168 /* A PLUS is never a valid operand, but reload can make
3169 it from a register when eliminating registers. */
3170 && GET_CODE (operand
) != PLUS
3171 /* A SCRATCH is not a valid operand. */
3172 && GET_CODE (operand
) != SCRATCH
3173 #ifdef LEGITIMATE_PIC_OPERAND_P
3174 && (! CONSTANT_P (operand
)
3176 || LEGITIMATE_PIC_OPERAND_P (operand
))
3178 && (GENERAL_REGS
== ALL_REGS
3179 || GET_CODE (operand
) != REG
3180 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3181 && reg_renumber
[REGNO (operand
)] < 0)))
3183 /* Drop through into 'r' case */
3187 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3191 if (REG_CLASS_FROM_LETTER (c
) == NO_REGS
)
3193 #ifdef EXTRA_CONSTRAINT
3194 if (EXTRA_CONSTRAINT (operand
, c
))
3201 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
3203 if (GET_MODE (operand
) == BLKmode
)
3206 if (GET_CODE (operand
) == REG
3207 && reg_fits_class_p (operand
, this_alternative
[i
],
3208 offset
, GET_MODE (recog_data
.operand
[i
])))
3215 /* If this operand could be handled with a reg,
3216 and some reg is allowed, then this operand can be handled. */
3217 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3220 /* Record which operands fit this alternative. */
3221 this_alternative_earlyclobber
[i
] = earlyclobber
;
3222 if (win
&& ! force_reload
)
3223 this_alternative_win
[i
] = 1;
3224 else if (did_match
&& ! force_reload
)
3225 this_alternative_match_win
[i
] = 1;
3228 int const_to_mem
= 0;
3230 this_alternative_offmemok
[i
] = offmemok
;
3234 /* Alternative loses if it has no regs for a reg operand. */
3235 if (GET_CODE (operand
) == REG
3236 && this_alternative
[i
] == (int) NO_REGS
3237 && this_alternative_matches
[i
] < 0)
3240 /* If this is a constant that is reloaded into the desired
3241 class by copying it to memory first, count that as another
3242 reload. This is consistent with other code and is
3243 required to avoid choosing another alternative when
3244 the constant is moved into memory by this function on
3245 an early reload pass. Note that the test here is
3246 precisely the same as in the code below that calls
3248 if (CONSTANT_P (operand
)
3249 /* force_const_mem does not accept HIGH. */
3250 && GET_CODE (operand
) != HIGH
3251 && ((PREFERRED_RELOAD_CLASS (operand
,
3252 (enum reg_class
) this_alternative
[i
])
3254 || no_input_reloads
)
3255 && operand_mode
[i
] != VOIDmode
)
3258 if (this_alternative
[i
] != (int) NO_REGS
)
3262 /* If we can't reload this value at all, reject this
3263 alternative. Note that we could also lose due to
3264 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3267 if (! CONSTANT_P (operand
)
3268 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3269 && (PREFERRED_RELOAD_CLASS (operand
,
3270 (enum reg_class
) this_alternative
[i
])
3274 /* Alternative loses if it requires a type of reload not
3275 permitted for this insn. We can always reload SCRATCH
3276 and objects with a REG_UNUSED note. */
3277 else if (GET_CODE (operand
) != SCRATCH
3278 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3279 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3281 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3285 /* We prefer to reload pseudos over reloading other things,
3286 since such reloads may be able to be eliminated later.
3287 If we are reloading a SCRATCH, we won't be generating any
3288 insns, just using a register, so it is also preferred.
3289 So bump REJECT in other cases. Don't do this in the
3290 case where we are forcing a constant into memory and
3291 it will then win since we don't want to have a different
3292 alternative match then. */
3293 if (! (GET_CODE (operand
) == REG
3294 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3295 && GET_CODE (operand
) != SCRATCH
3296 && ! (const_to_mem
&& constmemok
))
3299 /* Input reloads can be inherited more often than output
3300 reloads can be removed, so penalize output reloads. */
3301 if (operand_type
[i
] != RELOAD_FOR_INPUT
3302 && GET_CODE (operand
) != SCRATCH
)
3306 /* If this operand is a pseudo register that didn't get a hard
3307 reg and this alternative accepts some register, see if the
3308 class that we want is a subset of the preferred class for this
3309 register. If not, but it intersects that class, use the
3310 preferred class instead. If it does not intersect the preferred
3311 class, show that usage of this alternative should be discouraged;
3312 it will be discouraged more still if the register is `preferred
3313 or nothing'. We do this because it increases the chance of
3314 reusing our spill register in a later insn and avoiding a pair
3315 of memory stores and loads.
3317 Don't bother with this if this alternative will accept this
3320 Don't do this for a multiword operand, since it is only a
3321 small win and has the risk of requiring more spill registers,
3322 which could cause a large loss.
3324 Don't do this if the preferred class has only one register
3325 because we might otherwise exhaust the class. */
3327 if (! win
&& ! did_match
3328 && this_alternative
[i
] != (int) NO_REGS
3329 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3330 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3332 if (! reg_class_subset_p (this_alternative
[i
],
3333 preferred_class
[i
]))
3335 /* Since we don't have a way of forming the intersection,
3336 we just do something special if the preferred class
3337 is a subset of the class we have; that's the most
3338 common case anyway. */
3339 if (reg_class_subset_p (preferred_class
[i
],
3340 this_alternative
[i
]))
3341 this_alternative
[i
] = (int) preferred_class
[i
];
3343 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3348 /* Now see if any output operands that are marked "earlyclobber"
3349 in this alternative conflict with any input operands
3350 or any memory addresses. */
3352 for (i
= 0; i
< noperands
; i
++)
3353 if (this_alternative_earlyclobber
[i
]
3354 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3356 struct decomposition early_data
;
3358 early_data
= decompose (recog_data
.operand
[i
]);
3360 if (modified
[i
] == RELOAD_READ
)
3363 if (this_alternative
[i
] == NO_REGS
)
3365 this_alternative_earlyclobber
[i
] = 0;
3366 if (this_insn_is_asm
)
3367 error_for_asm (this_insn
,
3368 "`&' constraint used with no register class");
3373 for (j
= 0; j
< noperands
; j
++)
3374 /* Is this an input operand or a memory ref? */
3375 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3376 || modified
[j
] != RELOAD_WRITE
)
3378 /* Ignore things like match_operator operands. */
3379 && *recog_data
.constraints
[j
] != 0
3380 /* Don't count an input operand that is constrained to match
3381 the early clobber operand. */
3382 && ! (this_alternative_matches
[j
] == i
3383 && rtx_equal_p (recog_data
.operand
[i
],
3384 recog_data
.operand
[j
]))
3385 /* Is it altered by storing the earlyclobber operand? */
3386 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3389 /* If the output is in a single-reg class,
3390 it's costly to reload it, so reload the input instead. */
3391 if (reg_class_size
[this_alternative
[i
]] == 1
3392 && (GET_CODE (recog_data
.operand
[j
]) == REG
3393 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3396 this_alternative_win
[j
] = 0;
3397 this_alternative_match_win
[j
] = 0;
3402 /* If an earlyclobber operand conflicts with something,
3403 it must be reloaded, so request this and count the cost. */
3407 this_alternative_win
[i
] = 0;
3408 this_alternative_match_win
[j
] = 0;
3409 for (j
= 0; j
< noperands
; j
++)
3410 if (this_alternative_matches
[j
] == i
3411 && this_alternative_match_win
[j
])
3413 this_alternative_win
[j
] = 0;
3414 this_alternative_match_win
[j
] = 0;
3420 /* If one alternative accepts all the operands, no reload required,
3421 choose that alternative; don't consider the remaining ones. */
3424 /* Unswap these so that they are never swapped at `finish'. */
3425 if (commutative
>= 0)
3427 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3428 recog_data
.operand
[commutative
+ 1]
3429 = substed_operand
[commutative
+ 1];
3431 for (i
= 0; i
< noperands
; i
++)
3433 goal_alternative_win
[i
] = this_alternative_win
[i
];
3434 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3435 goal_alternative
[i
] = this_alternative
[i
];
3436 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3437 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3438 goal_alternative_earlyclobber
[i
]
3439 = this_alternative_earlyclobber
[i
];
3441 goal_alternative_number
= this_alternative_number
;
3442 goal_alternative_swapped
= swapped
;
3443 goal_earlyclobber
= this_earlyclobber
;
3447 /* REJECT, set by the ! and ? constraint characters and when a register
3448 would be reloaded into a non-preferred class, discourages the use of
3449 this alternative for a reload goal. REJECT is incremented by six
3450 for each ? and two for each non-preferred class. */
3451 losers
= losers
* 6 + reject
;
3453 /* If this alternative can be made to work by reloading,
3454 and it needs less reloading than the others checked so far,
3455 record it as the chosen goal for reloading. */
3456 if (! bad
&& best
> losers
)
3458 for (i
= 0; i
< noperands
; i
++)
3460 goal_alternative
[i
] = this_alternative
[i
];
3461 goal_alternative_win
[i
] = this_alternative_win
[i
];
3462 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3463 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3464 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3465 goal_alternative_earlyclobber
[i
]
3466 = this_alternative_earlyclobber
[i
];
3468 goal_alternative_swapped
= swapped
;
3470 goal_alternative_number
= this_alternative_number
;
3471 goal_earlyclobber
= this_earlyclobber
;
3475 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3476 then we need to try each alternative twice,
3477 the second time matching those two operands
3478 as if we had exchanged them.
3479 To do this, really exchange them in operands.
3481 If we have just tried the alternatives the second time,
3482 return operands to normal and drop through. */
3484 if (commutative
>= 0)
3489 register enum reg_class tclass
;
3492 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3493 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3495 tclass
= preferred_class
[commutative
];
3496 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3497 preferred_class
[commutative
+ 1] = tclass
;
3499 t
= pref_or_nothing
[commutative
];
3500 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3501 pref_or_nothing
[commutative
+ 1] = t
;
3503 memcpy (constraints
, recog_data
.constraints
,
3504 noperands
* sizeof (char *));
3509 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3510 recog_data
.operand
[commutative
+ 1]
3511 = substed_operand
[commutative
+ 1];
3515 /* The operands don't meet the constraints.
3516 goal_alternative describes the alternative
3517 that we could reach by reloading the fewest operands.
3518 Reload so as to fit it. */
3520 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3522 /* No alternative works with reloads?? */
3523 if (insn_code_number
>= 0)
3524 fatal_insn ("Unable to generate reloads for:", insn
);
3525 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3526 /* Avoid further trouble with this insn. */
3527 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3532 /* Jump to `finish' from above if all operands are valid already.
3533 In that case, goal_alternative_win is all 1. */
3536 /* Right now, for any pair of operands I and J that are required to match,
3538 goal_alternative_matches[J] is I.
3539 Set up goal_alternative_matched as the inverse function:
3540 goal_alternative_matched[I] = J. */
3542 for (i
= 0; i
< noperands
; i
++)
3543 goal_alternative_matched
[i
] = -1;
3545 for (i
= 0; i
< noperands
; i
++)
3546 if (! goal_alternative_win
[i
]
3547 && goal_alternative_matches
[i
] >= 0)
3548 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3550 for (i
= 0; i
< noperands
; i
++)
3551 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3553 /* If the best alternative is with operands 1 and 2 swapped,
3554 consider them swapped before reporting the reloads. Update the
3555 operand numbers of any reloads already pushed. */
3557 if (goal_alternative_swapped
)
3561 tem
= substed_operand
[commutative
];
3562 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3563 substed_operand
[commutative
+ 1] = tem
;
3564 tem
= recog_data
.operand
[commutative
];
3565 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3566 recog_data
.operand
[commutative
+ 1] = tem
;
3567 tem
= *recog_data
.operand_loc
[commutative
];
3568 *recog_data
.operand_loc
[commutative
]
3569 = *recog_data
.operand_loc
[commutative
+ 1];
3570 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3572 for (i
= 0; i
< n_reloads
; i
++)
3574 if (rld
[i
].opnum
== commutative
)
3575 rld
[i
].opnum
= commutative
+ 1;
3576 else if (rld
[i
].opnum
== commutative
+ 1)
3577 rld
[i
].opnum
= commutative
;
3581 for (i
= 0; i
< noperands
; i
++)
3583 operand_reloadnum
[i
] = -1;
3585 /* If this is an earlyclobber operand, we need to widen the scope.
3586 The reload must remain valid from the start of the insn being
3587 reloaded until after the operand is stored into its destination.
3588 We approximate this with RELOAD_OTHER even though we know that we
3589 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3591 One special case that is worth checking is when we have an
3592 output that is earlyclobber but isn't used past the insn (typically
3593 a SCRATCH). In this case, we only need have the reload live
3594 through the insn itself, but not for any of our input or output
3596 But we must not accidentally narrow the scope of an existing
3597 RELOAD_OTHER reload - leave these alone.
3599 In any case, anything needed to address this operand can remain
3600 however they were previously categorized. */
3602 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3604 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3605 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3608 /* Any constants that aren't allowed and can't be reloaded
3609 into registers are here changed into memory references. */
3610 for (i
= 0; i
< noperands
; i
++)
3611 if (! goal_alternative_win
[i
]
3612 && CONSTANT_P (recog_data
.operand
[i
])
3613 /* force_const_mem does not accept HIGH. */
3614 && GET_CODE (recog_data
.operand
[i
]) != HIGH
3615 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3616 (enum reg_class
) goal_alternative
[i
])
3618 || no_input_reloads
)
3619 && operand_mode
[i
] != VOIDmode
)
3621 substed_operand
[i
] = recog_data
.operand
[i
]
3622 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3623 recog_data
.operand
[i
]),
3624 i
, address_type
[i
], ind_levels
, 0, insn
,
3626 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3627 goal_alternative_number
))
3628 goal_alternative_win
[i
] = 1;
3631 /* Record the values of the earlyclobber operands for the caller. */
3632 if (goal_earlyclobber
)
3633 for (i
= 0; i
< noperands
; i
++)
3634 if (goal_alternative_earlyclobber
[i
])
3635 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3637 /* Now record reloads for all the operands that need them. */
3638 for (i
= 0; i
< noperands
; i
++)
3639 if (! goal_alternative_win
[i
])
3641 /* Operands that match previous ones have already been handled. */
3642 if (goal_alternative_matches
[i
] >= 0)
3644 /* Handle an operand with a nonoffsettable address
3645 appearing where an offsettable address will do
3646 by reloading the address into a base register.
3648 ??? We can also do this when the operand is a register and
3649 reg_equiv_mem is not offsettable, but this is a bit tricky,
3650 so we don't bother with it. It may not be worth doing. */
3651 else if (goal_alternative_matched
[i
] == -1
3652 && goal_alternative_offmemok
[i
]
3653 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3655 operand_reloadnum
[i
]
3656 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3657 &XEXP (recog_data
.operand
[i
], 0), (rtx
*)0,
3659 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3660 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3661 rld
[operand_reloadnum
[i
]].inc
3662 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3664 /* If this operand is an output, we will have made any
3665 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3666 now we are treating part of the operand as an input, so
3667 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3669 if (modified
[i
] == RELOAD_WRITE
)
3671 for (j
= 0; j
< n_reloads
; j
++)
3673 if (rld
[j
].opnum
== i
)
3675 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3676 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3677 else if (rld
[j
].when_needed
3678 == RELOAD_FOR_OUTADDR_ADDRESS
)
3679 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3684 else if (goal_alternative_matched
[i
] == -1)
3686 operand_reloadnum
[i
]
3687 = push_reload ((modified
[i
] != RELOAD_WRITE
3688 ? recog_data
.operand
[i
] : 0),
3689 (modified
[i
] != RELOAD_READ
3690 ? recog_data
.operand
[i
] : 0),
3691 (modified
[i
] != RELOAD_WRITE
3692 ? recog_data
.operand_loc
[i
] : 0),
3693 (modified
[i
] != RELOAD_READ
3694 ? recog_data
.operand_loc
[i
] : 0),
3695 (enum reg_class
) goal_alternative
[i
],
3696 (modified
[i
] == RELOAD_WRITE
3697 ? VOIDmode
: operand_mode
[i
]),
3698 (modified
[i
] == RELOAD_READ
3699 ? VOIDmode
: operand_mode
[i
]),
3700 (insn_code_number
< 0 ? 0
3701 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3702 0, i
, operand_type
[i
]);
3704 /* In a matching pair of operands, one must be input only
3705 and the other must be output only.
3706 Pass the input operand as IN and the other as OUT. */
3707 else if (modified
[i
] == RELOAD_READ
3708 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3710 operand_reloadnum
[i
]
3711 = push_reload (recog_data
.operand
[i
],
3712 recog_data
.operand
[goal_alternative_matched
[i
]],
3713 recog_data
.operand_loc
[i
],
3714 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3715 (enum reg_class
) goal_alternative
[i
],
3717 operand_mode
[goal_alternative_matched
[i
]],
3718 0, 0, i
, RELOAD_OTHER
);
3719 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3721 else if (modified
[i
] == RELOAD_WRITE
3722 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3724 operand_reloadnum
[goal_alternative_matched
[i
]]
3725 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3726 recog_data
.operand
[i
],
3727 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3728 recog_data
.operand_loc
[i
],
3729 (enum reg_class
) goal_alternative
[i
],
3730 operand_mode
[goal_alternative_matched
[i
]],
3732 0, 0, i
, RELOAD_OTHER
);
3733 operand_reloadnum
[i
] = output_reloadnum
;
3735 else if (insn_code_number
>= 0)
3739 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3740 /* Avoid further trouble with this insn. */
3741 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3746 else if (goal_alternative_matched
[i
] < 0
3747 && goal_alternative_matches
[i
] < 0
3750 /* For each non-matching operand that's a MEM or a pseudo-register
3751 that didn't get a hard register, make an optional reload.
3752 This may get done even if the insn needs no reloads otherwise. */
3754 rtx operand
= recog_data
.operand
[i
];
3756 while (GET_CODE (operand
) == SUBREG
)
3757 operand
= SUBREG_REG (operand
);
3758 if ((GET_CODE (operand
) == MEM
3759 || (GET_CODE (operand
) == REG
3760 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3761 /* If this is only for an output, the optional reload would not
3762 actually cause us to use a register now, just note that
3763 something is stored here. */
3764 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3765 || modified
[i
] == RELOAD_WRITE
)
3766 && ! no_input_reloads
3767 /* An optional output reload might allow to delete INSN later.
3768 We mustn't make in-out reloads on insns that are not permitted
3770 If this is an asm, we can't delete it; we must not even call
3771 push_reload for an optional output reload in this case,
3772 because we can't be sure that the constraint allows a register,
3773 and push_reload verifies the constraints for asms. */
3774 && (modified
[i
] == RELOAD_READ
3775 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3776 operand_reloadnum
[i
]
3777 = push_reload ((modified
[i
] != RELOAD_WRITE
3778 ? recog_data
.operand
[i
] : 0),
3779 (modified
[i
] != RELOAD_READ
3780 ? recog_data
.operand
[i
] : 0),
3781 (modified
[i
] != RELOAD_WRITE
3782 ? recog_data
.operand_loc
[i
] : 0),
3783 (modified
[i
] != RELOAD_READ
3784 ? recog_data
.operand_loc
[i
] : 0),
3785 (enum reg_class
) goal_alternative
[i
],
3786 (modified
[i
] == RELOAD_WRITE
3787 ? VOIDmode
: operand_mode
[i
]),
3788 (modified
[i
] == RELOAD_READ
3789 ? VOIDmode
: operand_mode
[i
]),
3790 (insn_code_number
< 0 ? 0
3791 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3792 1, i
, operand_type
[i
]);
3793 /* If a memory reference remains (either as a MEM or a pseudo that
3794 did not get a hard register), yet we can't make an optional
3795 reload, check if this is actually a pseudo register reference;
3796 we then need to emit a USE and/or a CLOBBER so that reload
3797 inheritance will do the right thing. */
3799 && (GET_CODE (operand
) == MEM
3800 || (GET_CODE (operand
) == REG
3801 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3802 && reg_renumber
[REGNO (operand
)] < 0)))
3804 operand
= *recog_data
.operand_loc
[i
];
3806 while (GET_CODE (operand
) == SUBREG
)
3807 operand
= SUBREG_REG (operand
);
3808 if (GET_CODE (operand
) == REG
)
3810 if (modified
[i
] != RELOAD_WRITE
)
3811 emit_insn_before (gen_rtx_USE (VOIDmode
, operand
), insn
);
3812 if (modified
[i
] != RELOAD_READ
)
3813 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3817 else if (goal_alternative_matches
[i
] >= 0
3818 && goal_alternative_win
[goal_alternative_matches
[i
]]
3819 && modified
[i
] == RELOAD_READ
3820 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3821 && ! no_input_reloads
&& ! no_output_reloads
3824 /* Similarly, make an optional reload for a pair of matching
3825 objects that are in MEM or a pseudo that didn't get a hard reg. */
3827 rtx operand
= recog_data
.operand
[i
];
3829 while (GET_CODE (operand
) == SUBREG
)
3830 operand
= SUBREG_REG (operand
);
3831 if ((GET_CODE (operand
) == MEM
3832 || (GET_CODE (operand
) == REG
3833 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3834 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3836 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3837 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
3838 recog_data
.operand
[i
],
3839 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
3840 recog_data
.operand_loc
[i
],
3841 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3842 operand_mode
[goal_alternative_matches
[i
]],
3844 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3847 /* Perform whatever substitutions on the operands we are supposed
3848 to make due to commutativity or replacement of registers
3849 with equivalent constants or memory slots. */
3851 for (i
= 0; i
< noperands
; i
++)
3853 /* We only do this on the last pass through reload, because it is
3854 possible for some data (like reg_equiv_address) to be changed during
3855 later passes. Moreover, we loose the opportunity to get a useful
3856 reload_{in,out}_reg when we do these replacements. */
3860 rtx substitution
= substed_operand
[i
];
3862 *recog_data
.operand_loc
[i
] = substitution
;
3864 /* If we're replacing an operand with a LABEL_REF, we need
3865 to make sure that there's a REG_LABEL note attached to
3866 this instruction. */
3867 if (GET_CODE (insn
) != JUMP_INSN
3868 && GET_CODE (substitution
) == LABEL_REF
3869 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
3870 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
,
3871 XEXP (substitution
, 0),
3875 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
3878 /* If this insn pattern contains any MATCH_DUP's, make sure that
3879 they will be substituted if the operands they match are substituted.
3880 Also do now any substitutions we already did on the operands.
3882 Don't do this if we aren't making replacements because we might be
3883 propagating things allocated by frame pointer elimination into places
3884 it doesn't expect. */
3886 if (insn_code_number
>= 0 && replace
)
3887 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
3889 int opno
= recog_data
.dup_num
[i
];
3890 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
3891 if (operand_reloadnum
[opno
] >= 0)
3892 push_replacement (recog_data
.dup_loc
[i
], operand_reloadnum
[opno
],
3893 insn_data
[insn_code_number
].operand
[opno
].mode
);
3897 /* This loses because reloading of prior insns can invalidate the equivalence
3898 (or at least find_equiv_reg isn't smart enough to find it any more),
3899 causing this insn to need more reload regs than it needed before.
3900 It may be too late to make the reload regs available.
3901 Now this optimization is done safely in choose_reload_regs. */
3903 /* For each reload of a reg into some other class of reg,
3904 search for an existing equivalent reg (same value now) in the right class.
3905 We can use it as long as we don't need to change its contents. */
3906 for (i
= 0; i
< n_reloads
; i
++)
3907 if (rld
[i
].reg_rtx
== 0
3909 && GET_CODE (rld
[i
].in
) == REG
3913 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
3914 static_reload_reg_p
, 0, rld
[i
].inmode
);
3915 /* Prevent generation of insn to load the value
3916 because the one we found already has the value. */
3918 rld
[i
].in
= rld
[i
].reg_rtx
;
3922 /* Perhaps an output reload can be combined with another
3923 to reduce needs by one. */
3924 if (!goal_earlyclobber
)
3927 /* If we have a pair of reloads for parts of an address, they are reloading
3928 the same object, the operands themselves were not reloaded, and they
3929 are for two operands that are supposed to match, merge the reloads and
3930 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3932 for (i
= 0; i
< n_reloads
; i
++)
3936 for (j
= i
+ 1; j
< n_reloads
; j
++)
3937 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3938 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3939 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3940 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3941 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3942 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3943 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3944 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3945 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
3946 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3947 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
3948 && (operand_reloadnum
[rld
[j
].opnum
] < 0
3949 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
3950 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
3951 || (goal_alternative_matches
[rld
[j
].opnum
]
3954 for (k
= 0; k
< n_replacements
; k
++)
3955 if (replacements
[k
].what
== j
)
3956 replacements
[k
].what
= i
;
3958 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3959 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3960 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3962 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3967 /* Scan all the reloads and update their type.
3968 If a reload is for the address of an operand and we didn't reload
3969 that operand, change the type. Similarly, change the operand number
3970 of a reload when two operands match. If a reload is optional, treat it
3971 as though the operand isn't reloaded.
3973 ??? This latter case is somewhat odd because if we do the optional
3974 reload, it means the object is hanging around. Thus we need only
3975 do the address reload if the optional reload was NOT done.
3977 Change secondary reloads to be the address type of their operand, not
3980 If an operand's reload is now RELOAD_OTHER, change any
3981 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3982 RELOAD_FOR_OTHER_ADDRESS. */
3984 for (i
= 0; i
< n_reloads
; i
++)
3986 if (rld
[i
].secondary_p
3987 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
3988 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
3990 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3991 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3992 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3993 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3994 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3995 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
3997 /* If we have a secondary reload to go along with this reload,
3998 change its type to RELOAD_FOR_OPADDR_ADDR. */
4000 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4001 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4002 && rld
[i
].secondary_in_reload
!= -1)
4004 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4006 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4008 /* If there's a tertiary reload we have to change it also. */
4009 if (secondary_in_reload
> 0
4010 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4011 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4012 = RELOAD_FOR_OPADDR_ADDR
;
4015 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4016 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4017 && rld
[i
].secondary_out_reload
!= -1)
4019 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4021 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4023 /* If there's a tertiary reload we have to change it also. */
4024 if (secondary_out_reload
4025 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4026 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4027 = RELOAD_FOR_OPADDR_ADDR
;
4030 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4031 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4032 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4034 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4037 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4038 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4039 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4040 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4042 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4044 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4045 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4048 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4049 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4050 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4052 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4053 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4054 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4055 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4056 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4057 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4058 This is complicated by the fact that a single operand can have more
4059 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4060 choose_reload_regs without affecting code quality, and cases that
4061 actually fail are extremely rare, so it turns out to be better to fix
4062 the problem here by not generating cases that choose_reload_regs will
4064 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4065 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4067 We can reduce the register pressure by exploiting that a
4068 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4069 does not conflict with any of them, if it is only used for the first of
4070 the RELOAD_FOR_X_ADDRESS reloads. */
4072 int first_op_addr_num
= -2;
4073 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4074 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4075 int need_change
= 0;
4076 /* We use last_op_addr_reload and the contents of the above arrays
4077 first as flags - -2 means no instance encountered, -1 means exactly
4078 one instance encountered.
4079 If more than one instance has been encountered, we store the reload
4080 number of the first reload of the kind in question; reload numbers
4081 are known to be non-negative. */
4082 for (i
= 0; i
< noperands
; i
++)
4083 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4084 for (i
= n_reloads
- 1; i
>= 0; i
--)
4086 switch (rld
[i
].when_needed
)
4088 case RELOAD_FOR_OPERAND_ADDRESS
:
4089 if (++first_op_addr_num
>= 0)
4091 first_op_addr_num
= i
;
4095 case RELOAD_FOR_INPUT_ADDRESS
:
4096 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4098 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4102 case RELOAD_FOR_OUTPUT_ADDRESS
:
4103 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4105 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4116 for (i
= 0; i
< n_reloads
; i
++)
4119 enum reload_type type
;
4121 switch (rld
[i
].when_needed
)
4123 case RELOAD_FOR_OPADDR_ADDR
:
4124 first_num
= first_op_addr_num
;
4125 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4127 case RELOAD_FOR_INPADDR_ADDRESS
:
4128 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4129 type
= RELOAD_FOR_INPUT_ADDRESS
;
4131 case RELOAD_FOR_OUTADDR_ADDRESS
:
4132 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4133 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4140 else if (i
> first_num
)
4141 rld
[i
].when_needed
= type
;
4144 /* Check if the only TYPE reload that uses reload I is
4145 reload FIRST_NUM. */
4146 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4148 if (rld
[j
].when_needed
== type
4149 && (rld
[i
].secondary_p
4150 ? rld
[j
].secondary_in_reload
== i
4151 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4153 rld
[i
].when_needed
= type
;
4162 /* See if we have any reloads that are now allowed to be merged
4163 because we've changed when the reload is needed to
4164 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4165 check for the most common cases. */
4167 for (i
= 0; i
< n_reloads
; i
++)
4168 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4169 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4170 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4171 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4172 for (j
= 0; j
< n_reloads
; j
++)
4173 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4174 && rld
[j
].when_needed
== rld
[i
].when_needed
4175 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4176 && rld
[i
].class == rld
[j
].class
4177 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4178 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4180 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4181 transfer_replacements (i
, j
);
4186 /* If we made any reloads for addresses, see if they violate a
4187 "no input reloads" requirement for this insn. But loads that we
4188 do after the insn (such as for output addresses) are fine. */
4189 if (no_input_reloads
)
4190 for (i
= 0; i
< n_reloads
; i
++)
4192 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
4193 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
)
4197 /* Compute reload_mode and reload_nregs. */
4198 for (i
= 0; i
< n_reloads
; i
++)
4201 = (rld
[i
].inmode
== VOIDmode
4202 || (GET_MODE_SIZE (rld
[i
].outmode
)
4203 > GET_MODE_SIZE (rld
[i
].inmode
)))
4204 ? rld
[i
].outmode
: rld
[i
].inmode
;
4206 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4212 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4213 accepts a memory operand with constant address. */
4216 alternative_allows_memconst (constraint
, altnum
)
4217 const char *constraint
;
4221 /* Skip alternatives before the one requested. */
4224 while (*constraint
++ != ',');
4227 /* Scan the requested alternative for 'm' or 'o'.
4228 If one of them is present, this alternative accepts memory constants. */
4229 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
4230 if (c
== 'm' || c
== 'o')
4235 /* Scan X for memory references and scan the addresses for reloading.
4236 Also checks for references to "constant" regs that we want to eliminate
4237 and replaces them with the values they stand for.
4238 We may alter X destructively if it contains a reference to such.
4239 If X is just a constant reg, we return the equivalent value
4242 IND_LEVELS says how many levels of indirect addressing this machine
4245 OPNUM and TYPE identify the purpose of the reload.
4247 IS_SET_DEST is true if X is the destination of a SET, which is not
4248 appropriate to be replaced by a constant.
4250 INSN, if nonzero, is the insn in which we do the reload. It is used
4251 to determine if we may generate output reloads, and where to put USEs
4252 for pseudos that we have to replace with stack slots.
4254 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4255 result of find_reloads_address. */
4258 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
, insn
,
4262 enum reload_type type
;
4266 int *address_reloaded
;
4268 register RTX_CODE code
= GET_CODE (x
);
4270 register const char *fmt
= GET_RTX_FORMAT (code
);
4276 /* This code is duplicated for speed in find_reloads. */
4277 register int regno
= REGNO (x
);
4278 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4279 x
= reg_equiv_constant
[regno
];
4281 /* This creates (subreg (mem...)) which would cause an unnecessary
4282 reload of the mem. */
4283 else if (reg_equiv_mem
[regno
] != 0)
4284 x
= reg_equiv_mem
[regno
];
4286 else if (reg_equiv_memory_loc
[regno
]
4287 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4289 rtx mem
= make_memloc (x
, regno
);
4290 if (reg_equiv_address
[regno
]
4291 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4293 /* If this is not a toplevel operand, find_reloads doesn't see
4294 this substitution. We have to emit a USE of the pseudo so
4295 that delete_output_reload can see it. */
4296 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4297 emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
);
4299 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4300 opnum
, type
, ind_levels
, insn
);
4301 if (address_reloaded
)
4302 *address_reloaded
= i
;
4311 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4312 opnum
, type
, ind_levels
, insn
);
4313 if (address_reloaded
)
4314 *address_reloaded
= i
;
4319 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4321 /* Check for SUBREG containing a REG that's equivalent to a constant.
4322 If the constant has a known value, truncate it right now.
4323 Similarly if we are extracting a single-word of a multi-word
4324 constant. If the constant is symbolic, allow it to be substituted
4325 normally. push_reload will strip the subreg later. If the
4326 constant is VOIDmode, abort because we will lose the mode of
4327 the register (this should never happen because one of the cases
4328 above should handle it). */
4330 register int regno
= REGNO (SUBREG_REG (x
));
4333 if (subreg_lowpart_p (x
)
4334 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4335 && reg_equiv_constant
[regno
] != 0
4336 && (tem
= gen_lowpart_common (GET_MODE (x
),
4337 reg_equiv_constant
[regno
])) != 0)
4340 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
4341 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4342 && reg_equiv_constant
[regno
] != 0
4343 && (tem
= operand_subword (reg_equiv_constant
[regno
],
4344 SUBREG_BYTE (x
) / UNITS_PER_WORD
, 0,
4345 GET_MODE (SUBREG_REG (x
)))) != 0)
4347 /* TEM is now a word sized constant for the bits from X that
4348 we wanted. However, TEM may be the wrong representation.
4350 Use gen_lowpart_common to convert a CONST_INT into a
4351 CONST_DOUBLE and vice versa as needed according to by the mode
4353 tem
= gen_lowpart_common (GET_MODE (x
), tem
);
4359 /* If the SUBREG is wider than a word, the above test will fail.
4360 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4361 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4362 a 32 bit target. We still can - and have to - handle this
4363 for non-paradoxical subregs of CONST_INTs. */
4364 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4365 && reg_equiv_constant
[regno
] != 0
4366 && GET_CODE (reg_equiv_constant
[regno
]) == CONST_INT
4367 && (GET_MODE_SIZE (GET_MODE (x
))
4368 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
4370 int shift
= SUBREG_BYTE (x
) * BITS_PER_UNIT
;
4371 if (WORDS_BIG_ENDIAN
)
4372 shift
= (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4373 - GET_MODE_BITSIZE (GET_MODE (x
))
4375 /* Here we use the knowledge that CONST_INTs have a
4376 HOST_WIDE_INT field. */
4377 if (shift
>= HOST_BITS_PER_WIDE_INT
)
4378 shift
= HOST_BITS_PER_WIDE_INT
- 1;
4379 return GEN_INT (INTVAL (reg_equiv_constant
[regno
]) >> shift
);
4382 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4383 && reg_equiv_constant
[regno
] != 0
4384 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
4387 /* If the subreg contains a reg that will be converted to a mem,
4388 convert the subreg to a narrower memref now.
4389 Otherwise, we would get (subreg (mem ...) ...),
4390 which would force reload of the mem.
4392 We also need to do this if there is an equivalent MEM that is
4393 not offsettable. In that case, alter_subreg would produce an
4394 invalid address on big-endian machines.
4396 For machines that extend byte loads, we must not reload using
4397 a wider mode if we have a paradoxical SUBREG. find_reloads will
4398 force a reload in that case. So we should not do anything here. */
4400 else if (regno
>= FIRST_PSEUDO_REGISTER
4401 #ifdef LOAD_EXTEND_OP
4402 && (GET_MODE_SIZE (GET_MODE (x
))
4403 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4405 && (reg_equiv_address
[regno
] != 0
4406 || (reg_equiv_mem
[regno
] != 0
4407 && (! strict_memory_address_p (GET_MODE (x
),
4408 XEXP (reg_equiv_mem
[regno
], 0))
4409 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4410 || num_not_at_initial_offset
))))
4411 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4414 else if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == MEM
4415 && (GET_MODE_SIZE (GET_MODE (x
))
4416 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4417 && mode_dependent_address_p (XEXP (SUBREG_REG (x
), 0)))
4419 /* A paradoxical subreg will simply have the mode of the access
4420 changed, so we need to reload such a memory operand to stabilize
4421 the meaning of the memory access. */
4422 enum machine_mode subreg_mode
= GET_MODE (SUBREG_REG (x
));
4424 /* SUBREG_REG (x) is a MEM, so we cant take the offset, instead we
4425 calculate the register number as :
4426 SUBREG_BYTE (x) / GET_MODE_SIZE (subreg_mode) */
4428 push_reload (NULL_RTX
, SUBREG_REG (x
), (rtx
*)0, &SUBREG_REG (x
),
4429 find_valid_class (subreg_mode
,
4430 SUBREG_BYTE (x
) / GET_MODE_SIZE (subreg_mode
)),
4431 VOIDmode
, subreg_mode
, 0, 0, opnum
, type
);
4433 push_reload (SUBREG_REG (x
), NULL_RTX
, &SUBREG_REG (x
), (rtx
*)0,
4434 find_valid_class (subreg_mode
,
4435 SUBREG_BYTE (x
) / GET_MODE_SIZE (subreg_mode
)),
4436 subreg_mode
, VOIDmode
, 0, 0, opnum
, type
);
4439 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4443 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4444 ind_levels
, is_set_dest
, insn
,
4446 /* If we have replaced a reg with it's equivalent memory loc -
4447 that can still be handled here e.g. if it's in a paradoxical
4448 subreg - we must make the change in a copy, rather than using
4449 a destructive change. This way, find_reloads can still elect
4450 not to do the change. */
4451 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4453 x
= shallow_copy_rtx (x
);
4456 XEXP (x
, i
) = new_part
;
4462 /* Return a mem ref for the memory equivalent of reg REGNO.
4463 This mem ref is not shared with anything. */
4466 make_memloc (ad
, regno
)
4470 /* We must rerun eliminate_regs, in case the elimination
4471 offsets have changed. */
4473 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4475 /* If TEM might contain a pseudo, we must copy it to avoid
4476 modifying it when we do the substitution for the reload. */
4477 if (rtx_varies_p (tem
, 0))
4478 tem
= copy_rtx (tem
);
4480 tem
= replace_equiv_address_nv (reg_equiv_memory_loc
[regno
], tem
);
4481 return adjust_address_nv (tem
, GET_MODE (ad
), 0);
4484 /* Record all reloads needed for handling memory address AD
4485 which appears in *LOC in a memory reference to mode MODE
4486 which itself is found in location *MEMREFLOC.
4487 Note that we take shortcuts assuming that no multi-reg machine mode
4488 occurs as part of an address.
4490 OPNUM and TYPE specify the purpose of this reload.
4492 IND_LEVELS says how many levels of indirect addressing this machine
4495 INSN, if nonzero, is the insn in which we do the reload. It is used
4496 to determine if we may generate output reloads, and where to put USEs
4497 for pseudos that we have to replace with stack slots.
4499 Value is nonzero if this address is reloaded or replaced as a whole.
4500 This is interesting to the caller if the address is an autoincrement.
4502 Note that there is no verification that the address will be valid after
4503 this routine does its work. Instead, we rely on the fact that the address
4504 was valid when reload started. So we need only undo things that reload
4505 could have broken. These are wrong register types, pseudos not allocated
4506 to a hard register, and frame pointer elimination. */
4509 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4510 enum machine_mode mode
;
4515 enum reload_type type
;
4520 int removed_and
= 0;
4523 /* If the address is a register, see if it is a legitimate address and
4524 reload if not. We first handle the cases where we need not reload
4525 or where we must reload in a non-standard way. */
4527 if (GET_CODE (ad
) == REG
)
4531 /* If the register is equivalent to an invariant expression, substitute
4532 the invariant, and eliminate any eliminable register references. */
4533 tem
= reg_equiv_constant
[regno
];
4535 && (tem
= eliminate_regs (tem
, mode
, insn
))
4536 && strict_memory_address_p (mode
, tem
))
4542 tem
= reg_equiv_memory_loc
[regno
];
4545 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4547 tem
= make_memloc (ad
, regno
);
4548 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4550 find_reloads_address (GET_MODE (tem
), (rtx
*)0, XEXP (tem
, 0),
4551 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
4554 /* We can avoid a reload if the register's equivalent memory
4555 expression is valid as an indirect memory address.
4556 But not all addresses are valid in a mem used as an indirect
4557 address: only reg or reg+constant. */
4560 && strict_memory_address_p (mode
, tem
)
4561 && (GET_CODE (XEXP (tem
, 0)) == REG
4562 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4563 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4564 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4566 /* TEM is not the same as what we'll be replacing the
4567 pseudo with after reload, put a USE in front of INSN
4568 in the final reload pass. */
4570 && num_not_at_initial_offset
4571 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4574 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4575 /* This doesn't really count as replacing the address
4576 as a whole, since it is still a memory access. */
4584 /* The only remaining case where we can avoid a reload is if this is a
4585 hard register that is valid as a base register and which is not the
4586 subject of a CLOBBER in this insn. */
4588 else if (regno
< FIRST_PSEUDO_REGISTER
4589 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4590 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4593 /* If we do not have one of the cases above, we must do the reload. */
4594 push_reload (ad
, NULL_RTX
, loc
, (rtx
*)0, BASE_REG_CLASS
,
4595 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4599 if (strict_memory_address_p (mode
, ad
))
4601 /* The address appears valid, so reloads are not needed.
4602 But the address may contain an eliminable register.
4603 This can happen because a machine with indirect addressing
4604 may consider a pseudo register by itself a valid address even when
4605 it has failed to get a hard reg.
4606 So do a tree-walk to find and eliminate all such regs. */
4608 /* But first quickly dispose of a common case. */
4609 if (GET_CODE (ad
) == PLUS
4610 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4611 && GET_CODE (XEXP (ad
, 0)) == REG
4612 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4615 subst_reg_equivs_changed
= 0;
4616 *loc
= subst_reg_equivs (ad
, insn
);
4618 if (! subst_reg_equivs_changed
)
4621 /* Check result for validity after substitution. */
4622 if (strict_memory_address_p (mode
, ad
))
4626 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4631 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4636 *memrefloc
= copy_rtx (*memrefloc
);
4637 XEXP (*memrefloc
, 0) = ad
;
4638 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4644 /* The address is not valid. We have to figure out why. First see if
4645 we have an outer AND and remove it if so. Then analyze what's inside. */
4647 if (GET_CODE (ad
) == AND
)
4650 loc
= &XEXP (ad
, 0);
4654 /* One possibility for why the address is invalid is that it is itself
4655 a MEM. This can happen when the frame pointer is being eliminated, a
4656 pseudo is not allocated to a hard register, and the offset between the
4657 frame and stack pointers is not its initial value. In that case the
4658 pseudo will have been replaced by a MEM referring to the
4660 if (GET_CODE (ad
) == MEM
)
4662 /* First ensure that the address in this MEM is valid. Then, unless
4663 indirect addresses are valid, reload the MEM into a register. */
4665 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4666 opnum
, ADDR_TYPE (type
),
4667 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4669 /* If tem was changed, then we must create a new memory reference to
4670 hold it and store it back into memrefloc. */
4671 if (tem
!= ad
&& memrefloc
)
4673 *memrefloc
= copy_rtx (*memrefloc
);
4674 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4675 loc
= &XEXP (*memrefloc
, 0);
4677 loc
= &XEXP (*loc
, 0);
4680 /* Check similar cases as for indirect addresses as above except
4681 that we can allow pseudos and a MEM since they should have been
4682 taken care of above. */
4685 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4686 || GET_CODE (XEXP (tem
, 0)) == MEM
4687 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4688 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4689 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4690 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4692 /* Must use TEM here, not AD, since it is the one that will
4693 have any subexpressions reloaded, if needed. */
4694 push_reload (tem
, NULL_RTX
, loc
, (rtx
*)0,
4695 BASE_REG_CLASS
, GET_MODE (tem
),
4698 return ! removed_and
;
4704 /* If we have address of a stack slot but it's not valid because the
4705 displacement is too large, compute the sum in a register.
4706 Handle all base registers here, not just fp/ap/sp, because on some
4707 targets (namely SH) we can also get too large displacements from
4708 big-endian corrections. */
4709 else if (GET_CODE (ad
) == PLUS
4710 && GET_CODE (XEXP (ad
, 0)) == REG
4711 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4712 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4713 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4715 /* Unshare the MEM rtx so we can safely alter it. */
4718 *memrefloc
= copy_rtx (*memrefloc
);
4719 loc
= &XEXP (*memrefloc
, 0);
4721 loc
= &XEXP (*loc
, 0);
4724 if (double_reg_address_ok
)
4726 /* Unshare the sum as well. */
4727 *loc
= ad
= copy_rtx (ad
);
4729 /* Reload the displacement into an index reg.
4730 We assume the frame pointer or arg pointer is a base reg. */
4731 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4732 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4738 /* If the sum of two regs is not necessarily valid,
4739 reload the sum into a base reg.
4740 That will at least work. */
4741 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
,
4742 Pmode
, opnum
, type
, ind_levels
);
4744 return ! removed_and
;
4747 /* If we have an indexed stack slot, there are three possible reasons why
4748 it might be invalid: The index might need to be reloaded, the address
4749 might have been made by frame pointer elimination and hence have a
4750 constant out of range, or both reasons might apply.
4752 We can easily check for an index needing reload, but even if that is the
4753 case, we might also have an invalid constant. To avoid making the
4754 conservative assumption and requiring two reloads, we see if this address
4755 is valid when not interpreted strictly. If it is, the only problem is
4756 that the index needs a reload and find_reloads_address_1 will take care
4759 If we decide to do something here, it must be that
4760 `double_reg_address_ok' is true and that this address rtl was made by
4761 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4762 rework the sum so that the reload register will be added to the index.
4763 This is safe because we know the address isn't shared.
4765 We check for fp/ap/sp as both the first and second operand of the
4768 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4769 && GET_CODE (XEXP (ad
, 0)) == PLUS
4770 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4771 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4772 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4774 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4775 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4777 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4778 && ! memory_address_p (mode
, ad
))
4780 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4781 plus_constant (XEXP (XEXP (ad
, 0), 0),
4782 INTVAL (XEXP (ad
, 1))),
4783 XEXP (XEXP (ad
, 0), 1));
4784 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4785 GET_MODE (ad
), opnum
, type
, ind_levels
);
4786 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4792 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4793 && GET_CODE (XEXP (ad
, 0)) == PLUS
4794 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4795 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4796 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4798 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4799 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4801 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4802 && ! memory_address_p (mode
, ad
))
4804 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4805 XEXP (XEXP (ad
, 0), 0),
4806 plus_constant (XEXP (XEXP (ad
, 0), 1),
4807 INTVAL (XEXP (ad
, 1))));
4808 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1), BASE_REG_CLASS
,
4809 GET_MODE (ad
), opnum
, type
, ind_levels
);
4810 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4816 /* See if address becomes valid when an eliminable register
4817 in a sum is replaced. */
4820 if (GET_CODE (ad
) == PLUS
)
4821 tem
= subst_indexed_address (ad
);
4822 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4824 /* Ok, we win that way. Replace any additional eliminable
4827 subst_reg_equivs_changed
= 0;
4828 tem
= subst_reg_equivs (tem
, insn
);
4830 /* Make sure that didn't make the address invalid again. */
4832 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4839 /* If constants aren't valid addresses, reload the constant address
4841 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4843 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4844 Unshare it so we can safely alter it. */
4845 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4846 && CONSTANT_POOL_ADDRESS_P (ad
))
4848 *memrefloc
= copy_rtx (*memrefloc
);
4849 loc
= &XEXP (*memrefloc
, 0);
4851 loc
= &XEXP (*loc
, 0);
4854 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4856 return ! removed_and
;
4859 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
4863 /* Find all pseudo regs appearing in AD
4864 that are eliminable in favor of equivalent values
4865 and do not have hard regs; replace them by their equivalents.
4866 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4867 front of it for pseudos that we have to replace with stack slots. */
4870 subst_reg_equivs (ad
, insn
)
4874 register RTX_CODE code
= GET_CODE (ad
);
4876 register const char *fmt
;
4892 register int regno
= REGNO (ad
);
4894 if (reg_equiv_constant
[regno
] != 0)
4896 subst_reg_equivs_changed
= 1;
4897 return reg_equiv_constant
[regno
];
4899 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
4901 rtx mem
= make_memloc (ad
, regno
);
4902 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4904 subst_reg_equivs_changed
= 1;
4905 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4913 /* Quickly dispose of a common case. */
4914 if (XEXP (ad
, 0) == frame_pointer_rtx
4915 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4923 fmt
= GET_RTX_FORMAT (code
);
4924 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4926 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
4930 /* Compute the sum of X and Y, making canonicalizations assumed in an
4931 address, namely: sum constant integers, surround the sum of two
4932 constants with a CONST, put the constant as the second operand, and
4933 group the constant on the outermost sum.
4935 This routine assumes both inputs are already in canonical form. */
4942 enum machine_mode mode
= GET_MODE (x
);
4944 if (mode
== VOIDmode
)
4945 mode
= GET_MODE (y
);
4947 if (mode
== VOIDmode
)
4950 if (GET_CODE (x
) == CONST_INT
)
4951 return plus_constant (y
, INTVAL (x
));
4952 else if (GET_CODE (y
) == CONST_INT
)
4953 return plus_constant (x
, INTVAL (y
));
4954 else if (CONSTANT_P (x
))
4955 tem
= x
, x
= y
, y
= tem
;
4957 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4958 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4960 /* Note that if the operands of Y are specified in the opposite
4961 order in the recursive calls below, infinite recursion will occur. */
4962 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4963 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4965 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4966 constant will have been placed second. */
4967 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4969 if (GET_CODE (x
) == CONST
)
4971 if (GET_CODE (y
) == CONST
)
4974 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
4977 return gen_rtx_PLUS (mode
, x
, y
);
4980 /* If ADDR is a sum containing a pseudo register that should be
4981 replaced with a constant (from reg_equiv_constant),
4982 return the result of doing so, and also apply the associative
4983 law so that the result is more likely to be a valid address.
4984 (But it is not guaranteed to be one.)
4986 Note that at most one register is replaced, even if more are
4987 replaceable. Also, we try to put the result into a canonical form
4988 so it is more likely to be a valid address.
4990 In all other cases, return ADDR. */
4993 subst_indexed_address (addr
)
4996 rtx op0
= 0, op1
= 0, op2
= 0;
5000 if (GET_CODE (addr
) == PLUS
)
5002 /* Try to find a register to replace. */
5003 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5004 if (GET_CODE (op0
) == REG
5005 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5006 && reg_renumber
[regno
] < 0
5007 && reg_equiv_constant
[regno
] != 0)
5008 op0
= reg_equiv_constant
[regno
];
5009 else if (GET_CODE (op1
) == REG
5010 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5011 && reg_renumber
[regno
] < 0
5012 && reg_equiv_constant
[regno
] != 0)
5013 op1
= reg_equiv_constant
[regno
];
5014 else if (GET_CODE (op0
) == PLUS
5015 && (tem
= subst_indexed_address (op0
)) != op0
)
5017 else if (GET_CODE (op1
) == PLUS
5018 && (tem
= subst_indexed_address (op1
)) != op1
)
5023 /* Pick out up to three things to add. */
5024 if (GET_CODE (op1
) == PLUS
)
5025 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5026 else if (GET_CODE (op0
) == PLUS
)
5027 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5029 /* Compute the sum. */
5031 op1
= form_sum (op1
, op2
);
5033 op0
= form_sum (op0
, op1
);
5040 /* Update the REG_INC notes for an insn. It updates all REG_INC
5041 notes for the instruction which refer to REGNO the to refer
5042 to the reload number.
5044 INSN is the insn for which any REG_INC notes need updating.
5046 REGNO is the register number which has been reloaded.
5048 RELOADNUM is the reload number. */
5051 update_auto_inc_notes (insn
, regno
, reloadnum
)
5052 rtx insn ATTRIBUTE_UNUSED
;
5053 int regno ATTRIBUTE_UNUSED
;
5054 int reloadnum ATTRIBUTE_UNUSED
;
5059 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5060 if (REG_NOTE_KIND (link
) == REG_INC
5061 && REGNO (XEXP (link
, 0)) == regno
)
5062 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5066 /* Record the pseudo registers we must reload into hard registers in a
5067 subexpression of a would-be memory address, X referring to a value
5068 in mode MODE. (This function is not called if the address we find
5071 CONTEXT = 1 means we are considering regs as index regs,
5072 = 0 means we are considering them as base regs.
5074 OPNUM and TYPE specify the purpose of any reloads made.
5076 IND_LEVELS says how many levels of indirect addressing are
5077 supported at this point in the address.
5079 INSN, if nonzero, is the insn in which we do the reload. It is used
5080 to determine if we may generate output reloads.
5082 We return nonzero if X, as a whole, is reloaded or replaced. */
5084 /* Note that we take shortcuts assuming that no multi-reg machine mode
5085 occurs as part of an address.
5086 Also, this is not fully machine-customizable; it works for machines
5087 such as vaxes and 68000's and 32000's, but other possible machines
5088 could have addressing modes that this does not handle right. */
5091 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
5092 enum machine_mode mode
;
5097 enum reload_type type
;
5101 register RTX_CODE code
= GET_CODE (x
);
5107 register rtx orig_op0
= XEXP (x
, 0);
5108 register rtx orig_op1
= XEXP (x
, 1);
5109 register RTX_CODE code0
= GET_CODE (orig_op0
);
5110 register RTX_CODE code1
= GET_CODE (orig_op1
);
5111 register rtx op0
= orig_op0
;
5112 register rtx op1
= orig_op1
;
5114 if (GET_CODE (op0
) == SUBREG
)
5116 op0
= SUBREG_REG (op0
);
5117 code0
= GET_CODE (op0
);
5118 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5119 op0
= gen_rtx_REG (word_mode
,
5121 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5122 GET_MODE (SUBREG_REG (orig_op0
)),
5123 SUBREG_BYTE (orig_op0
),
5124 GET_MODE (orig_op0
))));
5127 if (GET_CODE (op1
) == SUBREG
)
5129 op1
= SUBREG_REG (op1
);
5130 code1
= GET_CODE (op1
);
5131 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5132 /* ??? Why is this given op1's mode and above for
5133 ??? op0 SUBREGs we use word_mode? */
5134 op1
= gen_rtx_REG (GET_MODE (op1
),
5136 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5137 GET_MODE (SUBREG_REG (orig_op1
)),
5138 SUBREG_BYTE (orig_op1
),
5139 GET_MODE (orig_op1
))));
5142 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5143 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5145 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5146 type
, ind_levels
, insn
);
5147 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5148 type
, ind_levels
, insn
);
5151 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5152 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5154 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5155 type
, ind_levels
, insn
);
5156 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5157 type
, ind_levels
, insn
);
5160 else if (code0
== CONST_INT
|| code0
== CONST
5161 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5162 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5163 type
, ind_levels
, insn
);
5165 else if (code1
== CONST_INT
|| code1
== CONST
5166 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5167 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5168 type
, ind_levels
, insn
);
5170 else if (code0
== REG
&& code1
== REG
)
5172 if (REG_OK_FOR_INDEX_P (op0
)
5173 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5175 else if (REG_OK_FOR_INDEX_P (op1
)
5176 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5178 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5179 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5180 type
, ind_levels
, insn
);
5181 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5182 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5183 type
, ind_levels
, insn
);
5184 else if (REG_OK_FOR_INDEX_P (op1
))
5185 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5186 type
, ind_levels
, insn
);
5187 else if (REG_OK_FOR_INDEX_P (op0
))
5188 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5189 type
, ind_levels
, insn
);
5192 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5193 type
, ind_levels
, insn
);
5194 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5195 type
, ind_levels
, insn
);
5199 else if (code0
== REG
)
5201 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5202 type
, ind_levels
, insn
);
5203 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5204 type
, ind_levels
, insn
);
5207 else if (code1
== REG
)
5209 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5210 type
, ind_levels
, insn
);
5211 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5212 type
, ind_levels
, insn
);
5221 rtx op0
= XEXP (x
, 0);
5222 rtx op1
= XEXP (x
, 1);
5224 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5227 /* Currently, we only support {PRE,POST}_MODIFY constructs
5228 where a base register is {inc,dec}remented by the contents
5229 of another register or by a constant value. Thus, these
5230 operands must match. */
5231 if (op0
!= XEXP (op1
, 0))
5234 /* Require index register (or constant). Let's just handle the
5235 register case in the meantime... If the target allows
5236 auto-modify by a constant then we could try replacing a pseudo
5237 register with its equivalent constant where applicable. */
5238 if (REG_P (XEXP (op1
, 1)))
5239 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5240 find_reloads_address_1 (mode
, XEXP (op1
, 1), 1, &XEXP (op1
, 1),
5241 opnum
, type
, ind_levels
, insn
);
5243 if (REG_P (XEXP (op1
, 0)))
5245 int regno
= REGNO (XEXP (op1
, 0));
5248 /* A register that is incremented cannot be constant! */
5249 if (regno
>= FIRST_PSEUDO_REGISTER
5250 && reg_equiv_constant
[regno
] != 0)
5253 /* Handle a register that is equivalent to a memory location
5254 which cannot be addressed directly. */
5255 if (reg_equiv_memory_loc
[regno
] != 0
5256 && (reg_equiv_address
[regno
] != 0
5257 || num_not_at_initial_offset
))
5259 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5261 if (reg_equiv_address
[regno
]
5262 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5264 /* First reload the memory location's address.
5265 We can't use ADDR_TYPE (type) here, because we need to
5266 write back the value after reading it, hence we actually
5267 need two registers. */
5268 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
5269 &XEXP (tem
, 0), opnum
,
5273 /* Then reload the memory location into a base
5275 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5276 &XEXP (op1
, 0), BASE_REG_CLASS
,
5277 GET_MODE (x
), GET_MODE (x
), 0,
5278 0, opnum
, RELOAD_OTHER
);
5280 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5285 if (reg_renumber
[regno
] >= 0)
5286 regno
= reg_renumber
[regno
];
5288 /* We require a base register here... */
5289 if (!REGNO_MODE_OK_FOR_BASE_P (regno
, GET_MODE (x
)))
5291 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5292 &XEXP (op1
, 0), &XEXP (x
, 0),
5294 GET_MODE (x
), GET_MODE (x
), 0, 0,
5295 opnum
, RELOAD_OTHER
);
5297 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5310 if (GET_CODE (XEXP (x
, 0)) == REG
)
5312 register int regno
= REGNO (XEXP (x
, 0));
5316 /* A register that is incremented cannot be constant! */
5317 if (regno
>= FIRST_PSEUDO_REGISTER
5318 && reg_equiv_constant
[regno
] != 0)
5321 /* Handle a register that is equivalent to a memory location
5322 which cannot be addressed directly. */
5323 if (reg_equiv_memory_loc
[regno
] != 0
5324 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5326 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5327 if (reg_equiv_address
[regno
]
5328 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5330 /* First reload the memory location's address.
5331 We can't use ADDR_TYPE (type) here, because we need to
5332 write back the value after reading it, hence we actually
5333 need two registers. */
5334 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5335 &XEXP (tem
, 0), opnum
, type
,
5337 /* Put this inside a new increment-expression. */
5338 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5339 /* Proceed to reload that, as if it contained a register. */
5343 /* If we have a hard register that is ok as an index,
5344 don't make a reload. If an autoincrement of a nice register
5345 isn't "valid", it must be that no autoincrement is "valid".
5346 If that is true and something made an autoincrement anyway,
5347 this must be a special context where one is allowed.
5348 (For example, a "push" instruction.)
5349 We can't improve this address, so leave it alone. */
5351 /* Otherwise, reload the autoincrement into a suitable hard reg
5352 and record how much to increment by. */
5354 if (reg_renumber
[regno
] >= 0)
5355 regno
= reg_renumber
[regno
];
5356 if ((regno
>= FIRST_PSEUDO_REGISTER
5357 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5358 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5362 /* If we can output the register afterwards, do so, this
5363 saves the extra update.
5364 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5365 CALL_INSN - and it does not set CC0.
5366 But don't do this if we cannot directly address the
5367 memory location, since this will make it harder to
5368 reuse address reloads, and increases register pressure.
5369 Also don't do this if we can probably update x directly. */
5370 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5372 : reg_equiv_mem
[regno
]);
5373 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5374 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5375 && memory_operand (equiv
, GET_MODE (equiv
))
5377 && ! sets_cc0_p (PATTERN (insn
))
5379 && ! (icode
!= CODE_FOR_nothing
5380 && ((*insn_data
[icode
].operand
[0].predicate
)
5382 && ((*insn_data
[icode
].operand
[1].predicate
)
5385 /* We use the original pseudo for loc, so that
5386 emit_reload_insns() knows which pseudo this
5387 reload refers to and updates the pseudo rtx, not
5388 its equivalent memory location, as well as the
5389 corresponding entry in reg_last_reload_reg. */
5390 loc
= &XEXP (x_orig
, 0);
5393 = push_reload (x
, x
, loc
, loc
,
5394 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5395 GET_MODE (x
), GET_MODE (x
), 0, 0,
5396 opnum
, RELOAD_OTHER
);
5401 = push_reload (x
, NULL_RTX
, loc
, (rtx
*)0,
5402 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5403 GET_MODE (x
), GET_MODE (x
), 0, 0,
5406 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5411 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5417 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5419 /* This is probably the result of a substitution, by eliminate_regs,
5420 of an equivalent address for a pseudo that was not allocated to a
5421 hard register. Verify that the specified address is valid and
5422 reload it into a register. */
5423 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5424 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5428 /* Since we know we are going to reload this item, don't decrement
5429 for the indirection level.
5431 Note that this is actually conservative: it would be slightly
5432 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5434 /* We can't use ADDR_TYPE (type) here, because we need to
5435 write back the value after reading it, hence we actually
5436 need two registers. */
5437 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5438 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5439 opnum
, type
, ind_levels
, insn
);
5441 reloadnum
= push_reload (x
, NULL_RTX
, loc
, (rtx
*)0,
5442 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5443 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5445 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5447 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5449 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5456 /* This is probably the result of a substitution, by eliminate_regs, of
5457 an equivalent address for a pseudo that was not allocated to a hard
5458 register. Verify that the specified address is valid and reload it
5461 Since we know we are going to reload this item, don't decrement for
5462 the indirection level.
5464 Note that this is actually conservative: it would be slightly more
5465 efficient to use the value of SPILL_INDIRECT_LEVELS from
5468 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5469 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5470 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*)0,
5471 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5472 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5477 register int regno
= REGNO (x
);
5479 if (reg_equiv_constant
[regno
] != 0)
5481 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5482 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5483 GET_MODE (x
), opnum
, type
, ind_levels
);
5487 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5488 that feeds this insn. */
5489 if (reg_equiv_mem
[regno
] != 0)
5491 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, (rtx
*)0,
5492 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5493 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5498 if (reg_equiv_memory_loc
[regno
]
5499 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5501 rtx tem
= make_memloc (x
, regno
);
5502 if (reg_equiv_address
[regno
] != 0
5503 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5506 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5507 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5512 if (reg_renumber
[regno
] >= 0)
5513 regno
= reg_renumber
[regno
];
5515 if ((regno
>= FIRST_PSEUDO_REGISTER
5516 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5517 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5519 push_reload (x
, NULL_RTX
, loc
, (rtx
*)0,
5520 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5521 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5525 /* If a register appearing in an address is the subject of a CLOBBER
5526 in this insn, reload it into some other register to be safe.
5527 The CLOBBER is supposed to make the register unavailable
5528 from before this insn to after it. */
5529 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
5531 push_reload (x
, NULL_RTX
, loc
, (rtx
*)0,
5532 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5533 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5540 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5542 /* If this is a SUBREG of a hard register and the resulting register
5543 is of the wrong class, reload the whole SUBREG. This avoids
5544 needless copies if SUBREG_REG is multi-word. */
5545 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5547 int regno
= subreg_regno (x
);
5549 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5550 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5552 push_reload (x
, NULL_RTX
, loc
, (rtx
*)0,
5553 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5554 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5558 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5559 is larger than the class size, then reload the whole SUBREG. */
5562 enum reg_class
class = (context
? INDEX_REG_CLASS
5564 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5565 > reg_class_size
[class])
5567 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5569 push_reload (x
, NULL_RTX
, loc
, (rtx
*)0, class,
5570 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5582 register const char *fmt
= GET_RTX_FORMAT (code
);
5585 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5588 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5589 opnum
, type
, ind_levels
, insn
);
5596 /* X, which is found at *LOC, is a part of an address that needs to be
5597 reloaded into a register of class CLASS. If X is a constant, or if
5598 X is a PLUS that contains a constant, check that the constant is a
5599 legitimate operand and that we are supposed to be able to load
5600 it into the register.
5602 If not, force the constant into memory and reload the MEM instead.
5604 MODE is the mode to use, in case X is an integer constant.
5606 OPNUM and TYPE describe the purpose of any reloads made.
5608 IND_LEVELS says how many levels of indirect addressing this machine
5612 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5615 enum reg_class
class;
5616 enum machine_mode mode
;
5618 enum reload_type type
;
5622 && (! LEGITIMATE_CONSTANT_P (x
)
5623 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5627 tem
= x
= force_const_mem (mode
, x
);
5628 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5629 opnum
, type
, ind_levels
, 0);
5632 else if (GET_CODE (x
) == PLUS
5633 && CONSTANT_P (XEXP (x
, 1))
5634 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5635 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5639 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5640 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5641 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5642 opnum
, type
, ind_levels
, 0);
5645 push_reload (x
, NULL_RTX
, loc
, (rtx
*)0, class,
5646 mode
, VOIDmode
, 0, 0, opnum
, type
);
5649 /* X, a subreg of a pseudo, is a part of an address that needs to be
5652 If the pseudo is equivalent to a memory location that cannot be directly
5653 addressed, make the necessary address reloads.
5655 If address reloads have been necessary, or if the address is changed
5656 by register elimination, return the rtx of the memory location;
5657 otherwise, return X.
5659 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5662 OPNUM and TYPE identify the purpose of the reload.
5664 IND_LEVELS says how many levels of indirect addressing are
5665 supported at this point in the address.
5667 INSN, if nonzero, is the insn in which we do the reload. It is used
5668 to determine where to put USEs for pseudos that we have to replace with
5672 find_reloads_subreg_address (x
, force_replace
, opnum
, type
,
5677 enum reload_type type
;
5681 int regno
= REGNO (SUBREG_REG (x
));
5683 if (reg_equiv_memory_loc
[regno
])
5685 /* If the address is not directly addressable, or if the address is not
5686 offsettable, then it must be replaced. */
5688 && (reg_equiv_address
[regno
]
5689 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5692 if (force_replace
|| num_not_at_initial_offset
)
5694 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5696 /* If the address changes because of register elimination, then
5697 it must be replaced. */
5699 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5701 int offset
= SUBREG_BYTE (x
);
5702 unsigned outer_size
= GET_MODE_SIZE (GET_MODE (x
));
5703 unsigned inner_size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5705 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5706 PUT_MODE (tem
, GET_MODE (x
));
5708 /* If this was a paradoxical subreg that we replaced, the
5709 resulting memory must be sufficiently aligned to allow
5710 us to widen the mode of the memory. */
5711 if (outer_size
> inner_size
&& STRICT_ALIGNMENT
)
5715 base
= XEXP (tem
, 0);
5716 if (GET_CODE (base
) == PLUS
)
5718 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
5719 && INTVAL (XEXP (base
, 1)) % outer_size
!= 0)
5721 base
= XEXP (base
, 0);
5723 if (GET_CODE (base
) != REG
5724 || (REGNO_POINTER_ALIGN (REGNO (base
))
5725 < outer_size
* BITS_PER_UNIT
))
5729 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5730 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5733 /* If this is not a toplevel operand, find_reloads doesn't see
5734 this substitution. We have to emit a USE of the pseudo so
5735 that delete_output_reload can see it. */
5736 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5737 emit_insn_before (gen_rtx_USE (VOIDmode
, SUBREG_REG (x
)), insn
);
5745 /* Substitute into the current INSN the registers into which we have reloaded
5746 the things that need reloading. The array `replacements'
5747 contains the locations of all pointers that must be changed
5748 and says what to replace them with.
5750 Return the rtx that X translates into; usually X, but modified. */
5753 subst_reloads (insn
)
5758 for (i
= 0; i
< n_replacements
; i
++)
5760 register struct replacement
*r
= &replacements
[i
];
5761 register rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5764 /* If we're replacing a LABEL_REF with a register, add a
5765 REG_LABEL note to indicate to flow which label this
5766 register refers to. */
5767 if (GET_CODE (*r
->where
) == LABEL_REF
5768 && GET_CODE (insn
) == JUMP_INSN
)
5769 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
,
5770 XEXP (*r
->where
, 0),
5773 /* Encapsulate RELOADREG so its machine mode matches what
5774 used to be there. Note that gen_lowpart_common will
5775 do the wrong thing if RELOADREG is multi-word. RELOADREG
5776 will always be a REG here. */
5777 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5778 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5780 /* If we are putting this into a SUBREG and RELOADREG is a
5781 SUBREG, we would be making nested SUBREGs, so we have to fix
5782 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5784 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5786 if (GET_MODE (*r
->subreg_loc
)
5787 == GET_MODE (SUBREG_REG (reloadreg
)))
5788 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5792 SUBREG_BYTE (*r
->subreg_loc
) + SUBREG_BYTE (reloadreg
);
5794 /* When working with SUBREGs the rule is that the byte
5795 offset must be a multiple of the SUBREG's mode. */
5796 final_offset
= (final_offset
/
5797 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
5798 final_offset
= (final_offset
*
5799 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
5801 *r
->where
= SUBREG_REG (reloadreg
);
5802 SUBREG_BYTE (*r
->subreg_loc
) = final_offset
;
5806 *r
->where
= reloadreg
;
5808 /* If reload got no reg and isn't optional, something's wrong. */
5809 else if (! rld
[r
->what
].optional
)
5814 /* Make a copy of any replacements being done into X and move those copies
5815 to locations in Y, a copy of X. We only look at the highest level of
5819 copy_replacements (x
, y
)
5824 enum rtx_code code
= GET_CODE (x
);
5825 const char *fmt
= GET_RTX_FORMAT (code
);
5826 struct replacement
*r
;
5828 /* We can't support X being a SUBREG because we might then need to know its
5829 location if something inside it was replaced. */
5833 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5835 for (j
= 0; j
< n_replacements
; j
++)
5837 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
5839 r
= &replacements
[n_replacements
++];
5840 r
->where
= replacements
[j
].where
;
5841 r
->subreg_loc
= &XEXP (y
, i
);
5842 r
->what
= replacements
[j
].what
;
5843 r
->mode
= replacements
[j
].mode
;
5845 else if (replacements
[j
].where
== &XEXP (x
, i
))
5847 r
= &replacements
[n_replacements
++];
5848 r
->where
= &XEXP (y
, i
);
5850 r
->what
= replacements
[j
].what
;
5851 r
->mode
= replacements
[j
].mode
;
5856 /* Change any replacements being done to *X to be done to *Y */
5859 move_replacements (x
, y
)
5865 for (i
= 0; i
< n_replacements
; i
++)
5866 if (replacements
[i
].subreg_loc
== x
)
5867 replacements
[i
].subreg_loc
= y
;
5868 else if (replacements
[i
].where
== x
)
5870 replacements
[i
].where
= y
;
5871 replacements
[i
].subreg_loc
= 0;
5875 /* If LOC was scheduled to be replaced by something, return the replacement.
5876 Otherwise, return *LOC. */
5879 find_replacement (loc
)
5882 struct replacement
*r
;
5884 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
5886 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5888 if (reloadreg
&& r
->where
== loc
)
5890 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
5891 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5895 else if (reloadreg
&& r
->subreg_loc
== loc
)
5897 /* RELOADREG must be either a REG or a SUBREG.
5899 ??? Is it actually still ever a SUBREG? If so, why? */
5901 if (GET_CODE (reloadreg
) == REG
)
5902 return gen_rtx_REG (GET_MODE (*loc
),
5903 (REGNO (reloadreg
) +
5904 subreg_regno_offset (REGNO (SUBREG_REG (*loc
)),
5905 GET_MODE (SUBREG_REG (*loc
)),
5908 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
5912 int final_offset
= SUBREG_BYTE (reloadreg
) + SUBREG_BYTE (*loc
);
5914 /* When working with SUBREGs the rule is that the byte
5915 offset must be a multiple of the SUBREG's mode. */
5916 final_offset
= (final_offset
/ GET_MODE_SIZE (GET_MODE (*loc
)));
5917 final_offset
= (final_offset
* GET_MODE_SIZE (GET_MODE (*loc
)));
5918 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
5924 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5925 what's inside and make a new rtl if so. */
5926 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
5927 || GET_CODE (*loc
) == MULT
)
5929 rtx x
= find_replacement (&XEXP (*loc
, 0));
5930 rtx y
= find_replacement (&XEXP (*loc
, 1));
5932 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
5933 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
5939 /* Return nonzero if register in range [REGNO, ENDREGNO)
5940 appears either explicitly or implicitly in X
5941 other than being stored into (except for earlyclobber operands).
5943 References contained within the substructure at LOC do not count.
5944 LOC may be zero, meaning don't ignore anything.
5946 This is similar to refers_to_regno_p in rtlanal.c except that we
5947 look at equivalences for pseudos that didn't get hard registers. */
5950 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
5951 unsigned int regno
, endregno
;
5964 code
= GET_CODE (x
);
5971 /* If this is a pseudo, a hard register must not have been allocated.
5972 X must therefore either be a constant or be in memory. */
5973 if (r
>= FIRST_PSEUDO_REGISTER
)
5975 if (reg_equiv_memory_loc
[r
])
5976 return refers_to_regno_for_reload_p (regno
, endregno
,
5977 reg_equiv_memory_loc
[r
],
5980 if (reg_equiv_constant
[r
])
5986 return (endregno
> r
5987 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
5988 ? HARD_REGNO_NREGS (r
, GET_MODE (x
))
5992 /* If this is a SUBREG of a hard reg, we can see exactly which
5993 registers are being modified. Otherwise, handle normally. */
5994 if (GET_CODE (SUBREG_REG (x
)) == REG
5995 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5997 unsigned int inner_regno
= subreg_regno (x
);
5998 unsigned int inner_endregno
5999 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6000 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6002 return endregno
> inner_regno
&& regno
< inner_endregno
;
6008 if (&SET_DEST (x
) != loc
6009 /* Note setting a SUBREG counts as referring to the REG it is in for
6010 a pseudo but not for hard registers since we can
6011 treat each word individually. */
6012 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6013 && loc
!= &SUBREG_REG (SET_DEST (x
))
6014 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
6015 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6016 && refers_to_regno_for_reload_p (regno
, endregno
,
6017 SUBREG_REG (SET_DEST (x
)),
6019 /* If the output is an earlyclobber operand, this is
6021 || ((GET_CODE (SET_DEST (x
)) != REG
6022 || earlyclobber_operand_p (SET_DEST (x
)))
6023 && refers_to_regno_for_reload_p (regno
, endregno
,
6024 SET_DEST (x
), loc
))))
6027 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6036 /* X does not match, so try its subexpressions. */
6038 fmt
= GET_RTX_FORMAT (code
);
6039 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6041 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6049 if (refers_to_regno_for_reload_p (regno
, endregno
,
6053 else if (fmt
[i
] == 'E')
6056 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6057 if (loc
!= &XVECEXP (x
, i
, j
)
6058 && refers_to_regno_for_reload_p (regno
, endregno
,
6059 XVECEXP (x
, i
, j
), loc
))
6066 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6067 we check if any register number in X conflicts with the relevant register
6068 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6069 contains a MEM (we don't bother checking for memory addresses that can't
6070 conflict because we expect this to be a rare case.
6072 This function is similar to reg_overlap_mention_p in rtlanal.c except
6073 that we look at equivalences for pseudos that didn't get hard registers. */
6076 reg_overlap_mentioned_for_reload_p (x
, in
)
6079 int regno
, endregno
;
6081 /* Overly conservative. */
6082 if (GET_CODE (x
) == STRICT_LOW_PART
)
6085 /* If either argument is a constant, then modifying X can not affect IN. */
6086 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6088 else if (GET_CODE (x
) == SUBREG
)
6090 regno
= REGNO (SUBREG_REG (x
));
6091 if (regno
< FIRST_PSEUDO_REGISTER
)
6092 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6093 GET_MODE (SUBREG_REG (x
)),
6097 else if (GET_CODE (x
) == REG
)
6101 /* If this is a pseudo, it must not have been assigned a hard register.
6102 Therefore, it must either be in memory or be a constant. */
6104 if (regno
>= FIRST_PSEUDO_REGISTER
)
6106 if (reg_equiv_memory_loc
[regno
])
6107 return refers_to_mem_for_reload_p (in
);
6108 else if (reg_equiv_constant
[regno
])
6113 else if (GET_CODE (x
) == MEM
)
6114 return refers_to_mem_for_reload_p (in
);
6115 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6116 || GET_CODE (x
) == CC0
)
6117 return reg_mentioned_p (x
, in
);
6121 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6122 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6124 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*)0);
6127 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6131 refers_to_mem_for_reload_p (x
)
6137 if (GET_CODE (x
) == MEM
)
6140 if (GET_CODE (x
) == REG
)
6141 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6142 && reg_equiv_memory_loc
[REGNO (x
)]);
6144 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6145 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6147 && (GET_CODE (XEXP (x
, i
)) == MEM
6148 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6154 /* Check the insns before INSN to see if there is a suitable register
6155 containing the same value as GOAL.
6156 If OTHER is -1, look for a register in class CLASS.
6157 Otherwise, just see if register number OTHER shares GOAL's value.
6159 Return an rtx for the register found, or zero if none is found.
6161 If RELOAD_REG_P is (short *)1,
6162 we reject any hard reg that appears in reload_reg_rtx
6163 because such a hard reg is also needed coming into this insn.
6165 If RELOAD_REG_P is any other nonzero value,
6166 it is a vector indexed by hard reg number
6167 and we reject any hard reg whose element in the vector is nonnegative
6168 as well as any that appears in reload_reg_rtx.
6170 If GOAL is zero, then GOALREG is a register number; we look
6171 for an equivalent for that register.
6173 MODE is the machine mode of the value we want an equivalence for.
6174 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6176 This function is used by jump.c as well as in the reload pass.
6178 If GOAL is the sum of the stack pointer and a constant, we treat it
6179 as if it were a constant except that sp is required to be unchanging. */
6182 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
6185 enum reg_class
class;
6187 short *reload_reg_p
;
6189 enum machine_mode mode
;
6191 register rtx p
= insn
;
6192 rtx goaltry
, valtry
, value
, where
;
6194 register int regno
= -1;
6198 int goal_mem_addr_varies
= 0;
6199 int need_stable_sp
= 0;
6205 else if (GET_CODE (goal
) == REG
)
6206 regno
= REGNO (goal
);
6207 else if (GET_CODE (goal
) == MEM
)
6209 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6210 if (MEM_VOLATILE_P (goal
))
6212 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
6214 /* An address with side effects must be reexecuted. */
6229 else if (CONSTANT_P (goal
))
6231 else if (GET_CODE (goal
) == PLUS
6232 && XEXP (goal
, 0) == stack_pointer_rtx
6233 && CONSTANT_P (XEXP (goal
, 1)))
6234 goal_const
= need_stable_sp
= 1;
6235 else if (GET_CODE (goal
) == PLUS
6236 && XEXP (goal
, 0) == frame_pointer_rtx
6237 && CONSTANT_P (XEXP (goal
, 1)))
6242 /* Scan insns back from INSN, looking for one that copies
6243 a value into or out of GOAL.
6244 Stop and give up if we reach a label. */
6249 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
6252 if (GET_CODE (p
) == INSN
6253 /* If we don't want spill regs ... */
6254 && (! (reload_reg_p
!= 0
6255 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6256 /* ... then ignore insns introduced by reload; they aren't
6257 useful and can cause results in reload_as_needed to be
6258 different from what they were when calculating the need for
6259 spills. If we notice an input-reload insn here, we will
6260 reject it below, but it might hide a usable equivalent.
6261 That makes bad code. It may even abort: perhaps no reg was
6262 spilled for this insn because it was assumed we would find
6264 || INSN_UID (p
) < reload_first_uid
))
6267 pat
= single_set (p
);
6269 /* First check for something that sets some reg equal to GOAL. */
6272 && true_regnum (SET_SRC (pat
)) == regno
6273 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6276 && true_regnum (SET_DEST (pat
)) == regno
6277 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6279 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6280 /* When looking for stack pointer + const,
6281 make sure we don't use a stack adjust. */
6282 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6283 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6285 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6286 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6288 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6289 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6290 /* If we are looking for a constant,
6291 and something equivalent to that constant was copied
6292 into a reg, we can use that reg. */
6293 || (goal_const
&& REG_NOTES (p
) != 0
6294 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6295 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6297 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6298 || (GET_CODE (SET_DEST (pat
)) == REG
6299 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6300 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6302 && GET_CODE (goal
) == CONST_INT
6304 = operand_subword (XEXP (tem
, 0), 0, 0,
6306 && rtx_equal_p (goal
, goaltry
)
6308 = operand_subword (SET_DEST (pat
), 0, 0,
6310 && (valueno
= true_regnum (valtry
)) >= 0)))
6311 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6313 && GET_CODE (SET_DEST (pat
)) == REG
6314 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6315 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6317 && GET_CODE (goal
) == CONST_INT
6318 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6320 && rtx_equal_p (goal
, goaltry
)
6322 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6323 && (valueno
= true_regnum (valtry
)) >= 0)))
6327 if (valueno
!= other
)
6330 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6336 for (i
= HARD_REGNO_NREGS (valueno
, mode
) - 1; i
>= 0; i
--)
6337 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6350 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6351 (or copying VALUE into GOAL, if GOAL is also a register).
6352 Now verify that VALUE is really valid. */
6354 /* VALUENO is the register number of VALUE; a hard register. */
6356 /* Don't try to re-use something that is killed in this insn. We want
6357 to be able to trust REG_UNUSED notes. */
6358 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6361 /* If we propose to get the value from the stack pointer or if GOAL is
6362 a MEM based on the stack pointer, we need a stable SP. */
6363 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6364 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6368 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6369 if (GET_MODE (value
) != mode
)
6372 /* Reject VALUE if it was loaded from GOAL
6373 and is also a register that appears in the address of GOAL. */
6375 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6376 && refers_to_regno_for_reload_p (valueno
,
6378 + HARD_REGNO_NREGS (valueno
, mode
)),
6382 /* Reject registers that overlap GOAL. */
6384 if (!goal_mem
&& !goal_const
6385 && regno
+ (int) HARD_REGNO_NREGS (regno
, mode
) > valueno
6386 && regno
< valueno
+ (int) HARD_REGNO_NREGS (valueno
, mode
))
6389 nregs
= HARD_REGNO_NREGS (regno
, mode
);
6390 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
6392 /* Reject VALUE if it is one of the regs reserved for reloads.
6393 Reload1 knows how to reuse them anyway, and it would get
6394 confused if we allocated one without its knowledge.
6395 (Now that insns introduced by reload are ignored above,
6396 this case shouldn't happen, but I'm not positive.) */
6398 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6401 for (i
= 0; i
< valuenregs
; ++i
)
6402 if (reload_reg_p
[valueno
+ i
] >= 0)
6406 /* Reject VALUE if it is a register being used for an input reload
6407 even if it is not one of those reserved. */
6409 if (reload_reg_p
!= 0)
6412 for (i
= 0; i
< n_reloads
; i
++)
6413 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6415 int regno1
= REGNO (rld
[i
].reg_rtx
);
6416 int nregs1
= HARD_REGNO_NREGS (regno1
,
6417 GET_MODE (rld
[i
].reg_rtx
));
6418 if (regno1
< valueno
+ valuenregs
6419 && regno1
+ nregs1
> valueno
)
6425 /* We must treat frame pointer as varying here,
6426 since it can vary--in a nonlocal goto as generated by expand_goto. */
6427 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6429 /* Now verify that the values of GOAL and VALUE remain unaltered
6430 until INSN is reached. */
6439 /* Don't trust the conversion past a function call
6440 if either of the two is in a call-clobbered register, or memory. */
6441 if (GET_CODE (p
) == CALL_INSN
)
6445 if (goal_mem
|| need_stable_sp
)
6448 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6449 for (i
= 0; i
< nregs
; ++i
)
6450 if (call_used_regs
[regno
+ i
])
6453 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6454 for (i
= 0; i
< valuenregs
; ++i
)
6455 if (call_used_regs
[valueno
+ i
])
6459 #ifdef NON_SAVING_SETJMP
6460 if (NON_SAVING_SETJMP
&& GET_CODE (p
) == NOTE
6461 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
6469 /* Watch out for unspec_volatile, and volatile asms. */
6470 if (volatile_insn_p (pat
))
6473 /* If this insn P stores in either GOAL or VALUE, return 0.
6474 If GOAL is a memory ref and this insn writes memory, return 0.
6475 If GOAL is a memory ref and its address is not constant,
6476 and this insn P changes a register used in GOAL, return 0. */
6478 if (GET_CODE (pat
) == COND_EXEC
)
6479 pat
= COND_EXEC_CODE (pat
);
6480 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6482 register rtx dest
= SET_DEST (pat
);
6483 while (GET_CODE (dest
) == SUBREG
6484 || GET_CODE (dest
) == ZERO_EXTRACT
6485 || GET_CODE (dest
) == SIGN_EXTRACT
6486 || GET_CODE (dest
) == STRICT_LOW_PART
)
6487 dest
= XEXP (dest
, 0);
6488 if (GET_CODE (dest
) == REG
)
6490 register int xregno
= REGNO (dest
);
6492 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6493 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6496 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6498 if (xregno
< valueno
+ valuenregs
6499 && xregno
+ xnregs
> valueno
)
6501 if (goal_mem_addr_varies
6502 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6504 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6507 else if (goal_mem
&& GET_CODE (dest
) == MEM
6508 && ! push_operand (dest
, GET_MODE (dest
)))
6510 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6511 && reg_equiv_memory_loc
[regno
] != 0)
6513 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6516 else if (GET_CODE (pat
) == PARALLEL
)
6519 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6521 register rtx v1
= XVECEXP (pat
, 0, i
);
6522 if (GET_CODE (v1
) == COND_EXEC
)
6523 v1
= COND_EXEC_CODE (v1
);
6524 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6526 register rtx dest
= SET_DEST (v1
);
6527 while (GET_CODE (dest
) == SUBREG
6528 || GET_CODE (dest
) == ZERO_EXTRACT
6529 || GET_CODE (dest
) == SIGN_EXTRACT
6530 || GET_CODE (dest
) == STRICT_LOW_PART
)
6531 dest
= XEXP (dest
, 0);
6532 if (GET_CODE (dest
) == REG
)
6534 register int xregno
= REGNO (dest
);
6536 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6537 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6540 if (xregno
< regno
+ nregs
6541 && xregno
+ xnregs
> regno
)
6543 if (xregno
< valueno
+ valuenregs
6544 && xregno
+ xnregs
> valueno
)
6546 if (goal_mem_addr_varies
6547 && reg_overlap_mentioned_for_reload_p (dest
,
6550 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6553 else if (goal_mem
&& GET_CODE (dest
) == MEM
6554 && ! push_operand (dest
, GET_MODE (dest
)))
6556 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6557 && reg_equiv_memory_loc
[regno
] != 0)
6559 else if (need_stable_sp
6560 && push_operand (dest
, GET_MODE (dest
)))
6566 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6570 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6571 link
= XEXP (link
, 1))
6573 pat
= XEXP (link
, 0);
6574 if (GET_CODE (pat
) == CLOBBER
)
6576 register rtx dest
= SET_DEST (pat
);
6578 if (GET_CODE (dest
) == REG
)
6580 register int xregno
= REGNO (dest
);
6582 = HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6584 if (xregno
< regno
+ nregs
6585 && xregno
+ xnregs
> regno
)
6587 else if (xregno
< valueno
+ valuenregs
6588 && xregno
+ xnregs
> valueno
)
6590 else if (goal_mem_addr_varies
6591 && reg_overlap_mentioned_for_reload_p (dest
,
6596 else if (goal_mem
&& GET_CODE (dest
) == MEM
6597 && ! push_operand (dest
, GET_MODE (dest
)))
6599 else if (need_stable_sp
6600 && push_operand (dest
, GET_MODE (dest
)))
6607 /* If this insn auto-increments or auto-decrements
6608 either regno or valueno, return 0 now.
6609 If GOAL is a memory ref and its address is not constant,
6610 and this insn P increments a register used in GOAL, return 0. */
6614 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6615 if (REG_NOTE_KIND (link
) == REG_INC
6616 && GET_CODE (XEXP (link
, 0)) == REG
)
6618 register int incno
= REGNO (XEXP (link
, 0));
6619 if (incno
< regno
+ nregs
&& incno
>= regno
)
6621 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6623 if (goal_mem_addr_varies
6624 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6634 /* Find a place where INCED appears in an increment or decrement operator
6635 within X, and return the amount INCED is incremented or decremented by.
6636 The value is always positive. */
6639 find_inc_amount (x
, inced
)
6642 register enum rtx_code code
= GET_CODE (x
);
6643 register const char *fmt
;
6648 register rtx addr
= XEXP (x
, 0);
6649 if ((GET_CODE (addr
) == PRE_DEC
6650 || GET_CODE (addr
) == POST_DEC
6651 || GET_CODE (addr
) == PRE_INC
6652 || GET_CODE (addr
) == POST_INC
)
6653 && XEXP (addr
, 0) == inced
)
6654 return GET_MODE_SIZE (GET_MODE (x
));
6655 else if ((GET_CODE (addr
) == PRE_MODIFY
6656 || GET_CODE (addr
) == POST_MODIFY
)
6657 && GET_CODE (XEXP (addr
, 1)) == PLUS
6658 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
6659 && XEXP (addr
, 0) == inced
6660 && GET_CODE (XEXP (XEXP (addr
, 1), 1)) == CONST_INT
)
6662 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
6663 return i
< 0 ? -i
: i
;
6667 fmt
= GET_RTX_FORMAT (code
);
6668 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6672 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6679 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6681 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6691 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6692 If SETS is nonzero, also consider SETs. */
6695 regno_clobbered_p (regno
, insn
, mode
, sets
)
6698 enum machine_mode mode
;
6701 unsigned int nregs
= HARD_REGNO_NREGS (regno
, mode
);
6702 unsigned int endregno
= regno
+ nregs
;
6704 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
6705 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6706 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6708 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
6710 return test
>= regno
&& test
< endregno
;
6713 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6715 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6719 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6720 if ((GET_CODE (elt
) == CLOBBER
6721 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6722 && GET_CODE (XEXP (elt
, 0)) == REG
)
6724 unsigned int test
= REGNO (XEXP (elt
, 0));
6726 if (test
>= regno
&& test
< endregno
)
6735 static const char *reload_when_needed_name
[] =
6738 "RELOAD_FOR_OUTPUT",
6740 "RELOAD_FOR_INPUT_ADDRESS",
6741 "RELOAD_FOR_INPADDR_ADDRESS",
6742 "RELOAD_FOR_OUTPUT_ADDRESS",
6743 "RELOAD_FOR_OUTADDR_ADDRESS",
6744 "RELOAD_FOR_OPERAND_ADDRESS",
6745 "RELOAD_FOR_OPADDR_ADDR",
6747 "RELOAD_FOR_OTHER_ADDRESS"
6750 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
6752 /* These functions are used to print the variables set by 'find_reloads' */
6755 debug_reload_to_stream (f
)
6763 for (r
= 0; r
< n_reloads
; r
++)
6765 fprintf (f
, "Reload %d: ", r
);
6769 fprintf (f
, "reload_in (%s) = ",
6770 GET_MODE_NAME (rld
[r
].inmode
));
6771 print_inline_rtx (f
, rld
[r
].in
, 24);
6772 fprintf (f
, "\n\t");
6775 if (rld
[r
].out
!= 0)
6777 fprintf (f
, "reload_out (%s) = ",
6778 GET_MODE_NAME (rld
[r
].outmode
));
6779 print_inline_rtx (f
, rld
[r
].out
, 24);
6780 fprintf (f
, "\n\t");
6783 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
6785 fprintf (f
, "%s (opnum = %d)",
6786 reload_when_needed_name
[(int) rld
[r
].when_needed
],
6789 if (rld
[r
].optional
)
6790 fprintf (f
, ", optional");
6792 if (rld
[r
].nongroup
)
6793 fprintf (f
, ", nongroup");
6795 if (rld
[r
].inc
!= 0)
6796 fprintf (f
, ", inc by %d", rld
[r
].inc
);
6798 if (rld
[r
].nocombine
)
6799 fprintf (f
, ", can't combine");
6801 if (rld
[r
].secondary_p
)
6802 fprintf (f
, ", secondary_reload_p");
6804 if (rld
[r
].in_reg
!= 0)
6806 fprintf (f
, "\n\treload_in_reg: ");
6807 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
6810 if (rld
[r
].out_reg
!= 0)
6812 fprintf (f
, "\n\treload_out_reg: ");
6813 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
6816 if (rld
[r
].reg_rtx
!= 0)
6818 fprintf (f
, "\n\treload_reg_rtx: ");
6819 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
6823 if (rld
[r
].secondary_in_reload
!= -1)
6825 fprintf (f
, "%ssecondary_in_reload = %d",
6826 prefix
, rld
[r
].secondary_in_reload
);
6830 if (rld
[r
].secondary_out_reload
!= -1)
6831 fprintf (f
, "%ssecondary_out_reload = %d\n",
6832 prefix
, rld
[r
].secondary_out_reload
);
6835 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
6837 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
6838 insn_data
[rld
[r
].secondary_in_icode
].name
);
6842 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
6843 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
6844 insn_data
[rld
[r
].secondary_out_icode
].name
);
6853 debug_reload_to_stream (stderr
);