1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
93 #include "insn-config.h"
94 #include "insn-codes.h"
98 #include "hard-reg-set.h"
102 #include "function.h"
106 #ifndef REGISTER_MOVE_COST
107 #define REGISTER_MOVE_COST(x, y) 2
110 #ifndef REGNO_MODE_OK_FOR_BASE_P
111 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
114 #ifndef REG_MODE_OK_FOR_BASE_P
115 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
118 /* All reloads of the current insn are recorded here. See reload.h for
121 struct reload rld
[MAX_RELOADS
];
123 /* All the "earlyclobber" operands of the current insn
124 are recorded here. */
126 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
128 int reload_n_operands
;
130 /* Replacing reloads.
132 If `replace_reloads' is nonzero, then as each reload is recorded
133 an entry is made for it in the table `replacements'.
134 Then later `subst_reloads' can look through that table and
135 perform all the replacements needed. */
137 /* Nonzero means record the places to replace. */
138 static int replace_reloads
;
140 /* Each replacement is recorded with a structure like this. */
143 rtx
*where
; /* Location to store in */
144 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
145 a SUBREG; 0 otherwise. */
146 int what
; /* which reload this is for */
147 enum machine_mode mode
; /* mode it must have */
150 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
152 /* Number of replacements currently recorded. */
153 static int n_replacements
;
155 /* Used to track what is modified by an operand. */
158 int reg_flag
; /* Nonzero if referencing a register. */
159 int safe
; /* Nonzero if this can't conflict with anything. */
160 rtx base
; /* Base address for MEM. */
161 HOST_WIDE_INT start
; /* Starting offset or register number. */
162 HOST_WIDE_INT end
; /* Ending offset or register number. */
165 #ifdef SECONDARY_MEMORY_NEEDED
167 /* Save MEMs needed to copy from one class of registers to another. One MEM
168 is used per mode, but normally only one or two modes are ever used.
170 We keep two versions, before and after register elimination. The one
171 after register elimination is record separately for each operand. This
172 is done in case the address is not valid to be sure that we separately
175 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
176 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
179 /* The instruction we are doing reloads for;
180 so we can test whether a register dies in it. */
181 static rtx this_insn
;
183 /* Nonzero if this instruction is a user-specified asm with operands. */
184 static int this_insn_is_asm
;
186 /* If hard_regs_live_known is nonzero,
187 we can tell which hard regs are currently live,
188 at least enough to succeed in choosing dummy reloads. */
189 static int hard_regs_live_known
;
191 /* Indexed by hard reg number,
192 element is nonnegative if hard reg has been spilled.
193 This vector is passed to `find_reloads' as an argument
194 and is not changed here. */
195 static short *static_reload_reg_p
;
197 /* Set to 1 in subst_reg_equivs if it changes anything. */
198 static int subst_reg_equivs_changed
;
200 /* On return from push_reload, holds the reload-number for the OUT
201 operand, which can be different for that from the input operand. */
202 static int output_reloadnum
;
204 /* Compare two RTX's. */
205 #define MATCHES(x, y) \
206 (x == y || (x != 0 && (GET_CODE (x) == REG \
207 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
208 : rtx_equal_p (x, y) && ! side_effects_p (x))))
210 /* Indicates if two reloads purposes are for similar enough things that we
211 can merge their reloads. */
212 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
213 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
214 || ((when1) == (when2) && (op1) == (op2)) \
215 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
216 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
217 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
218 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
219 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
221 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
222 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
223 ((when1) != (when2) \
224 || ! ((op1) == (op2) \
225 || (when1) == RELOAD_FOR_INPUT \
226 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
227 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
229 /* If we are going to reload an address, compute the reload type to
231 #define ADDR_TYPE(type) \
232 ((type) == RELOAD_FOR_INPUT_ADDRESS \
233 ? RELOAD_FOR_INPADDR_ADDRESS \
234 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
235 ? RELOAD_FOR_OUTADDR_ADDRESS \
238 #ifdef HAVE_SECONDARY_RELOADS
239 static int push_secondary_reload
PARAMS ((int, rtx
, int, int, enum reg_class
,
240 enum machine_mode
, enum reload_type
,
243 static enum reg_class find_valid_class
PARAMS ((enum machine_mode
, int));
244 static int reload_inner_reg_of_subreg
PARAMS ((rtx
, enum machine_mode
));
245 static int push_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
246 enum machine_mode
, enum machine_mode
,
247 int, int, int, enum reload_type
));
248 static void push_replacement
PARAMS ((rtx
*, int, enum machine_mode
));
249 static void combine_reloads
PARAMS ((void));
250 static int find_reusable_reload
PARAMS ((rtx
*, rtx
, enum reg_class
,
251 enum reload_type
, int, int));
252 static rtx find_dummy_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*,
253 enum machine_mode
, enum machine_mode
,
254 enum reg_class
, int, int));
255 static int hard_reg_set_here_p
PARAMS ((unsigned int, unsigned int, rtx
));
256 static struct decomposition decompose
PARAMS ((rtx
));
257 static int immune_p
PARAMS ((rtx
, rtx
, struct decomposition
));
258 static int alternative_allows_memconst
PARAMS ((const char *, int));
259 static rtx find_reloads_toplev
PARAMS ((rtx
, int, enum reload_type
, int,
261 static rtx make_memloc
PARAMS ((rtx
, int));
262 static int find_reloads_address
PARAMS ((enum machine_mode
, rtx
*, rtx
, rtx
*,
263 int, enum reload_type
, int, rtx
));
264 static rtx subst_reg_equivs
PARAMS ((rtx
, rtx
));
265 static rtx subst_indexed_address
PARAMS ((rtx
));
266 static int find_reloads_address_1
PARAMS ((enum machine_mode
, rtx
, int, rtx
*,
267 int, enum reload_type
,int, rtx
));
268 static void find_reloads_address_part
PARAMS ((rtx
, rtx
*, enum reg_class
,
269 enum machine_mode
, int,
270 enum reload_type
, int));
271 static rtx find_reloads_subreg_address
PARAMS ((rtx
, int, int, enum reload_type
,
273 static int find_inc_amount
PARAMS ((rtx
, rtx
));
275 #ifdef HAVE_SECONDARY_RELOADS
277 /* Determine if any secondary reloads are needed for loading (if IN_P is
278 non-zero) or storing (if IN_P is zero) X to or from a reload register of
279 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
280 are needed, push them.
282 Return the reload number of the secondary reload we made, or -1 if
283 we didn't need one. *PICODE is set to the insn_code to use if we do
284 need a secondary reload. */
287 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
293 enum reg_class reload_class
;
294 enum machine_mode reload_mode
;
295 enum reload_type type
;
296 enum insn_code
*picode
;
298 enum reg_class
class = NO_REGS
;
299 enum machine_mode mode
= reload_mode
;
300 enum insn_code icode
= CODE_FOR_nothing
;
301 enum reg_class t_class
= NO_REGS
;
302 enum machine_mode t_mode
= VOIDmode
;
303 enum insn_code t_icode
= CODE_FOR_nothing
;
304 enum reload_type secondary_type
;
305 int s_reload
, t_reload
= -1;
307 if (type
== RELOAD_FOR_INPUT_ADDRESS
308 || type
== RELOAD_FOR_OUTPUT_ADDRESS
309 || type
== RELOAD_FOR_INPADDR_ADDRESS
310 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
311 secondary_type
= type
;
313 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
315 *picode
= CODE_FOR_nothing
;
317 /* If X is a paradoxical SUBREG, use the inner value to determine both the
318 mode and object being reloaded. */
319 if (GET_CODE (x
) == SUBREG
320 && (GET_MODE_SIZE (GET_MODE (x
))
321 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
324 reload_mode
= GET_MODE (x
);
327 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
328 is still a pseudo-register by now, it *must* have an equivalent MEM
329 but we don't want to assume that), use that equivalent when seeing if
330 a secondary reload is needed since whether or not a reload is needed
331 might be sensitive to the form of the MEM. */
333 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
334 && reg_equiv_mem
[REGNO (x
)] != 0)
335 x
= reg_equiv_mem
[REGNO (x
)];
337 #ifdef SECONDARY_INPUT_RELOAD_CLASS
339 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
342 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
344 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
347 /* If we don't need any secondary registers, done. */
348 if (class == NO_REGS
)
351 /* Get a possible insn to use. If the predicate doesn't accept X, don't
354 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
355 : reload_out_optab
[(int) reload_mode
]);
357 if (icode
!= CODE_FOR_nothing
358 && insn_data
[(int) icode
].operand
[in_p
].predicate
359 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
360 icode
= CODE_FOR_nothing
;
362 /* If we will be using an insn, see if it can directly handle the reload
363 register we will be using. If it can, the secondary reload is for a
364 scratch register. If it can't, we will use the secondary reload for
365 an intermediate register and require a tertiary reload for the scratch
368 if (icode
!= CODE_FOR_nothing
)
370 /* If IN_P is non-zero, the reload register will be the output in
371 operand 0. If IN_P is zero, the reload register will be the input
372 in operand 1. Outputs should have an initial "=", which we must
376 = insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
377 enum reg_class insn_class
378 = (insn_letter
== 'r' ? GENERAL_REGS
379 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter
));
381 if (insn_class
== NO_REGS
383 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
384 /* The scratch register's constraint must start with "=&". */
385 || insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
386 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
389 if (reg_class_subset_p (reload_class
, insn_class
))
390 mode
= insn_data
[(int) icode
].operand
[2].mode
;
393 char t_letter
= insn_data
[(int) icode
].operand
[2].constraint
[2];
395 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
396 t_class
= (t_letter
== 'r' ? GENERAL_REGS
397 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter
));
399 icode
= CODE_FOR_nothing
;
403 /* This case isn't valid, so fail. Reload is allowed to use the same
404 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
405 in the case of a secondary register, we actually need two different
406 registers for correct code. We fail here to prevent the possibility of
407 silently generating incorrect code later.
409 The convention is that secondary input reloads are valid only if the
410 secondary_class is different from class. If you have such a case, you
411 can not use secondary reloads, you must work around the problem some
414 Allow this when a reload_in/out pattern is being used. I.e. assume
415 that the generated code handles this case. */
417 if (in_p
&& class == reload_class
&& icode
== CODE_FOR_nothing
418 && t_icode
== CODE_FOR_nothing
)
421 /* If we need a tertiary reload, see if we have one we can reuse or else
424 if (t_class
!= NO_REGS
)
426 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
427 if (rld
[t_reload
].secondary_p
428 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
429 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
430 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
431 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
432 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
433 == CODE_FOR_nothing
))
434 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
435 == CODE_FOR_nothing
)))
436 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
437 && MERGABLE_RELOADS (secondary_type
,
438 rld
[t_reload
].when_needed
,
439 opnum
, rld
[t_reload
].opnum
))
442 rld
[t_reload
].inmode
= t_mode
;
444 rld
[t_reload
].outmode
= t_mode
;
446 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
447 rld
[t_reload
].class = t_class
;
449 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
450 rld
[t_reload
].optional
&= optional
;
451 rld
[t_reload
].secondary_p
= 1;
452 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
453 opnum
, rld
[t_reload
].opnum
))
454 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
457 if (t_reload
== n_reloads
)
459 /* We need to make a new tertiary reload for this register class. */
460 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
461 rld
[t_reload
].class = t_class
;
462 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
463 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
464 rld
[t_reload
].reg_rtx
= 0;
465 rld
[t_reload
].optional
= optional
;
466 rld
[t_reload
].inc
= 0;
467 /* Maybe we could combine these, but it seems too tricky. */
468 rld
[t_reload
].nocombine
= 1;
469 rld
[t_reload
].in_reg
= 0;
470 rld
[t_reload
].out_reg
= 0;
471 rld
[t_reload
].opnum
= opnum
;
472 rld
[t_reload
].when_needed
= secondary_type
;
473 rld
[t_reload
].secondary_in_reload
= -1;
474 rld
[t_reload
].secondary_out_reload
= -1;
475 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
476 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
477 rld
[t_reload
].secondary_p
= 1;
483 /* See if we can reuse an existing secondary reload. */
484 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
485 if (rld
[s_reload
].secondary_p
486 && (reg_class_subset_p (class, rld
[s_reload
].class)
487 || reg_class_subset_p (rld
[s_reload
].class, class))
488 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
489 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
490 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
491 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
492 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
493 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
494 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
495 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
496 opnum
, rld
[s_reload
].opnum
))
499 rld
[s_reload
].inmode
= mode
;
501 rld
[s_reload
].outmode
= mode
;
503 if (reg_class_subset_p (class, rld
[s_reload
].class))
504 rld
[s_reload
].class = class;
506 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
507 rld
[s_reload
].optional
&= optional
;
508 rld
[s_reload
].secondary_p
= 1;
509 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
510 opnum
, rld
[s_reload
].opnum
))
511 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
514 if (s_reload
== n_reloads
)
516 #ifdef SECONDARY_MEMORY_NEEDED
517 /* If we need a memory location to copy between the two reload regs,
518 set it up now. Note that we do the input case before making
519 the reload and the output case after. This is due to the
520 way reloads are output. */
522 if (in_p
&& icode
== CODE_FOR_nothing
523 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
525 get_secondary_mem (x
, reload_mode
, opnum
, type
);
527 /* We may have just added new reloads. Make sure we add
528 the new reload at the end. */
529 s_reload
= n_reloads
;
533 /* We need to make a new secondary reload for this register class. */
534 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
535 rld
[s_reload
].class = class;
537 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
538 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
539 rld
[s_reload
].reg_rtx
= 0;
540 rld
[s_reload
].optional
= optional
;
541 rld
[s_reload
].inc
= 0;
542 /* Maybe we could combine these, but it seems too tricky. */
543 rld
[s_reload
].nocombine
= 1;
544 rld
[s_reload
].in_reg
= 0;
545 rld
[s_reload
].out_reg
= 0;
546 rld
[s_reload
].opnum
= opnum
;
547 rld
[s_reload
].when_needed
= secondary_type
;
548 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
549 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
550 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
551 rld
[s_reload
].secondary_out_icode
552 = ! in_p
? t_icode
: CODE_FOR_nothing
;
553 rld
[s_reload
].secondary_p
= 1;
557 #ifdef SECONDARY_MEMORY_NEEDED
558 if (! in_p
&& icode
== CODE_FOR_nothing
559 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
560 get_secondary_mem (x
, mode
, opnum
, type
);
567 #endif /* HAVE_SECONDARY_RELOADS */
569 #ifdef SECONDARY_MEMORY_NEEDED
571 /* Return a memory location that will be used to copy X in mode MODE.
572 If we haven't already made a location for this mode in this insn,
573 call find_reloads_address on the location being returned. */
576 get_secondary_mem (x
, mode
, opnum
, type
)
577 rtx x ATTRIBUTE_UNUSED
;
578 enum machine_mode mode
;
580 enum reload_type type
;
585 /* By default, if MODE is narrower than a word, widen it to a word.
586 This is required because most machines that require these memory
587 locations do not support short load and stores from all registers
588 (e.g., FP registers). */
590 #ifdef SECONDARY_MEMORY_NEEDED_MODE
591 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
593 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
594 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
597 /* If we already have made a MEM for this operand in MODE, return it. */
598 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
599 return secondary_memlocs_elim
[(int) mode
][opnum
];
601 /* If this is the first time we've tried to get a MEM for this mode,
602 allocate a new one. `something_changed' in reload will get set
603 by noticing that the frame size has changed. */
605 if (secondary_memlocs
[(int) mode
] == 0)
607 #ifdef SECONDARY_MEMORY_NEEDED_RTX
608 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
610 secondary_memlocs
[(int) mode
]
611 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
615 /* Get a version of the address doing any eliminations needed. If that
616 didn't give us a new MEM, make a new one if it isn't valid. */
618 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
619 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
621 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
622 loc
= copy_rtx (loc
);
624 /* The only time the call below will do anything is if the stack
625 offset is too large. In that case IND_LEVELS doesn't matter, so we
626 can just pass a zero. Adjust the type to be the address of the
627 corresponding object. If the address was valid, save the eliminated
628 address. If it wasn't valid, we need to make a reload each time, so
633 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
634 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
637 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
641 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
645 /* Clear any secondary memory locations we've made. */
648 clear_secondary_mem ()
650 bzero ((char *) secondary_memlocs
, sizeof secondary_memlocs
);
652 #endif /* SECONDARY_MEMORY_NEEDED */
654 /* Find the largest class for which every register number plus N is valid in
655 M1 (if in range). Abort if no such class exists. */
657 static enum reg_class
658 find_valid_class (m1
, n
)
659 enum machine_mode m1 ATTRIBUTE_UNUSED
;
664 enum reg_class best_class
= NO_REGS
;
665 unsigned int best_size
= 0;
667 for (class = 1; class < N_REG_CLASSES
; class++)
670 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
671 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
672 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
673 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
676 if (! bad
&& reg_class_size
[class] > best_size
)
677 best_class
= class, best_size
= reg_class_size
[class];
686 /* Return the number of a previously made reload that can be combined with
687 a new one, or n_reloads if none of the existing reloads can be used.
688 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
689 push_reload, they determine the kind of the new reload that we try to
690 combine. P_IN points to the corresponding value of IN, which can be
691 modified by this function.
692 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
694 find_reusable_reload (p_in
, out
, class, type
, opnum
, dont_share
)
696 enum reg_class
class;
697 enum reload_type type
;
698 int opnum
, dont_share
;
702 /* We can't merge two reloads if the output of either one is
705 if (earlyclobber_operand_p (out
))
708 /* We can use an existing reload if the class is right
709 and at least one of IN and OUT is a match
710 and the other is at worst neutral.
711 (A zero compared against anything is neutral.)
713 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
714 for the same thing since that can cause us to need more reload registers
715 than we otherwise would. */
717 for (i
= 0; i
< n_reloads
; i
++)
718 if ((reg_class_subset_p (class, rld
[i
].class)
719 || reg_class_subset_p (rld
[i
].class, class))
720 /* If the existing reload has a register, it must fit our class. */
721 && (rld
[i
].reg_rtx
== 0
722 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
723 true_regnum (rld
[i
].reg_rtx
)))
724 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
725 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
726 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
727 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
728 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
729 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
730 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
733 /* Reloading a plain reg for input can match a reload to postincrement
734 that reg, since the postincrement's value is the right value.
735 Likewise, it can match a preincrement reload, since we regard
736 the preincrementation as happening before any ref in this insn
738 for (i
= 0; i
< n_reloads
; i
++)
739 if ((reg_class_subset_p (class, rld
[i
].class)
740 || reg_class_subset_p (rld
[i
].class, class))
741 /* If the existing reload has a register, it must fit our
743 && (rld
[i
].reg_rtx
== 0
744 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
745 true_regnum (rld
[i
].reg_rtx
)))
746 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
747 && ((GET_CODE (in
) == REG
748 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == 'a'
749 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
750 || (GET_CODE (rld
[i
].in
) == REG
751 && GET_RTX_CLASS (GET_CODE (in
)) == 'a'
752 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
753 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
754 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
755 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
756 opnum
, rld
[i
].opnum
))
758 /* Make sure reload_in ultimately has the increment,
759 not the plain register. */
760 if (GET_CODE (in
) == REG
)
767 /* Return nonzero if X is a SUBREG which will require reloading of its
768 SUBREG_REG expression. */
771 reload_inner_reg_of_subreg (x
, mode
)
773 enum machine_mode mode
;
777 /* Only SUBREGs are problematical. */
778 if (GET_CODE (x
) != SUBREG
)
781 inner
= SUBREG_REG (x
);
783 /* If INNER is a constant, then INNER must be reloaded. */
784 if (CONSTANT_P (inner
))
787 /* If INNER is not a hard register, then INNER will not need to
789 if (GET_CODE (inner
) != REG
790 || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
793 /* If INNER is not ok for MODE, then INNER will need reloading. */
794 if (! HARD_REGNO_MODE_OK (REGNO (inner
) + SUBREG_WORD (x
), mode
))
797 /* If the outer part is a word or smaller, INNER larger than a
798 word and the number of regs for INNER is not the same as the
799 number of words in INNER, then INNER will need reloading. */
800 return (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
801 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
802 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
803 != HARD_REGNO_NREGS (REGNO (inner
), GET_MODE (inner
))));
806 /* Record one reload that needs to be performed.
807 IN is an rtx saying where the data are to be found before this instruction.
808 OUT says where they must be stored after the instruction.
809 (IN is zero for data not read, and OUT is zero for data not written.)
810 INLOC and OUTLOC point to the places in the instructions where
811 IN and OUT were found.
812 If IN and OUT are both non-zero, it means the same register must be used
813 to reload both IN and OUT.
815 CLASS is a register class required for the reloaded data.
816 INMODE is the machine mode that the instruction requires
817 for the reg that replaces IN and OUTMODE is likewise for OUT.
819 If IN is zero, then OUT's location and mode should be passed as
822 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
824 OPTIONAL nonzero means this reload does not need to be performed:
825 it can be discarded if that is more convenient.
827 OPNUM and TYPE say what the purpose of this reload is.
829 The return value is the reload-number for this reload.
831 If both IN and OUT are nonzero, in some rare cases we might
832 want to make two separate reloads. (Actually we never do this now.)
833 Therefore, the reload-number for OUT is stored in
834 output_reloadnum when we return; the return value applies to IN.
835 Usually (presently always), when IN and OUT are nonzero,
836 the two reload-numbers are equal, but the caller should be careful to
840 push_reload (in
, out
, inloc
, outloc
, class,
841 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
844 enum reg_class
class;
845 enum machine_mode inmode
, outmode
;
849 enum reload_type type
;
853 int dont_remove_subreg
= 0;
854 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
855 int secondary_in_reload
= -1, secondary_out_reload
= -1;
856 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
857 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
859 /* INMODE and/or OUTMODE could be VOIDmode if no mode
860 has been specified for the operand. In that case,
861 use the operand's mode as the mode to reload. */
862 if (inmode
== VOIDmode
&& in
!= 0)
863 inmode
= GET_MODE (in
);
864 if (outmode
== VOIDmode
&& out
!= 0)
865 outmode
= GET_MODE (out
);
867 /* If IN is a pseudo register everywhere-equivalent to a constant, and
868 it is not in a hard register, reload straight from the constant,
869 since we want to get rid of such pseudo registers.
870 Often this is done earlier, but not always in find_reloads_address. */
871 if (in
!= 0 && GET_CODE (in
) == REG
)
873 register int regno
= REGNO (in
);
875 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
876 && reg_equiv_constant
[regno
] != 0)
877 in
= reg_equiv_constant
[regno
];
880 /* Likewise for OUT. Of course, OUT will never be equivalent to
881 an actual constant, but it might be equivalent to a memory location
882 (in the case of a parameter). */
883 if (out
!= 0 && GET_CODE (out
) == REG
)
885 register int regno
= REGNO (out
);
887 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
888 && reg_equiv_constant
[regno
] != 0)
889 out
= reg_equiv_constant
[regno
];
892 /* If we have a read-write operand with an address side-effect,
893 change either IN or OUT so the side-effect happens only once. */
894 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
896 if (GET_CODE (XEXP (in
, 0)) == POST_INC
897 || GET_CODE (XEXP (in
, 0)) == POST_DEC
898 || GET_CODE (XEXP (in
, 0)) == POST_MODIFY
)
900 rtx
new = gen_rtx_MEM (GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
902 MEM_COPY_ATTRIBUTES (new, in
);
905 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
906 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
907 || GET_CODE (XEXP (in
, 0)) == PRE_MODIFY
)
909 rtx
new = gen_rtx_MEM (GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
911 MEM_COPY_ATTRIBUTES (new, out
);
916 /* If we are reloading a (SUBREG constant ...), really reload just the
917 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
918 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
919 a pseudo and hence will become a MEM) with M1 wider than M2 and the
920 register is a pseudo, also reload the inside expression.
921 For machines that extend byte loads, do this for any SUBREG of a pseudo
922 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
923 M2 is an integral mode that gets extended when loaded.
924 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
925 either M1 is not valid for R or M2 is wider than a word but we only
926 need one word to store an M2-sized quantity in R.
927 (However, if OUT is nonzero, we need to reload the reg *and*
928 the subreg, so do nothing here, and let following statement handle it.)
930 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
931 we can't handle it here because CONST_INT does not indicate a mode.
933 Similarly, we must reload the inside expression if we have a
934 STRICT_LOW_PART (presumably, in == out in the cas).
936 Also reload the inner expression if it does not require a secondary
937 reload but the SUBREG does.
939 Finally, reload the inner expression if it is a register that is in
940 the class whose registers cannot be referenced in a different size
941 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
942 cannot reload just the inside since we might end up with the wrong
943 register class. But if it is inside a STRICT_LOW_PART, we have
944 no choice, so we hope we do get the right register class there. */
946 if (in
!= 0 && GET_CODE (in
) == SUBREG
947 && (SUBREG_WORD (in
) == 0 || strict_low
)
948 #ifdef CLASS_CANNOT_CHANGE_MODE
949 && (class != CLASS_CANNOT_CHANGE_MODE
950 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)), inmode
))
952 && (CONSTANT_P (SUBREG_REG (in
))
953 || GET_CODE (SUBREG_REG (in
)) == PLUS
955 || (((GET_CODE (SUBREG_REG (in
)) == REG
956 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
957 || GET_CODE (SUBREG_REG (in
)) == MEM
)
958 && ((GET_MODE_SIZE (inmode
)
959 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
960 #ifdef LOAD_EXTEND_OP
961 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
962 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
964 && (GET_MODE_SIZE (inmode
)
965 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
966 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
967 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
969 #ifdef WORD_REGISTER_OPERATIONS
970 || ((GET_MODE_SIZE (inmode
)
971 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
972 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
973 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
977 || (GET_CODE (SUBREG_REG (in
)) == REG
978 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
979 /* The case where out is nonzero
980 is handled differently in the following statement. */
981 && (out
== 0 || SUBREG_WORD (in
) == 0)
982 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
983 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
985 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
987 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
988 GET_MODE (SUBREG_REG (in
)))))
989 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in
))
992 #ifdef SECONDARY_INPUT_RELOAD_CLASS
993 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
994 && (SECONDARY_INPUT_RELOAD_CLASS (class,
995 GET_MODE (SUBREG_REG (in
)),
999 #ifdef CLASS_CANNOT_CHANGE_MODE
1000 || (GET_CODE (SUBREG_REG (in
)) == REG
1001 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1002 && (TEST_HARD_REG_BIT
1003 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1004 REGNO (SUBREG_REG (in
))))
1005 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)),
1010 in_subreg_loc
= inloc
;
1011 inloc
= &SUBREG_REG (in
);
1013 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1014 if (GET_CODE (in
) == MEM
)
1015 /* This is supposed to happen only for paradoxical subregs made by
1016 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1017 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
1020 inmode
= GET_MODE (in
);
1023 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1024 either M1 is not valid for R or M2 is wider than a word but we only
1025 need one word to store an M2-sized quantity in R.
1027 However, we must reload the inner reg *as well as* the subreg in
1030 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1031 code above. This can happen if SUBREG_WORD != 0. */
1033 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
))
1035 /* This relies on the fact that emit_reload_insns outputs the
1036 instructions for input reloads of type RELOAD_OTHER in the same
1037 order as the reloads. Thus if the outer reload is also of type
1038 RELOAD_OTHER, we are guaranteed that this inner reload will be
1039 output before the outer reload. */
1040 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), NULL_PTR
,
1041 find_valid_class (inmode
, SUBREG_WORD (in
)),
1042 VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1043 dont_remove_subreg
= 1;
1046 /* Similarly for paradoxical and problematical SUBREGs on the output.
1047 Note that there is no reason we need worry about the previous value
1048 of SUBREG_REG (out); even if wider than out,
1049 storing in a subreg is entitled to clobber it all
1050 (except in the case of STRICT_LOW_PART,
1051 and in that case the constraint should label it input-output.) */
1052 if (out
!= 0 && GET_CODE (out
) == SUBREG
1053 && (SUBREG_WORD (out
) == 0 || strict_low
)
1054 #ifdef CLASS_CANNOT_CHANGE_MODE
1055 && (class != CLASS_CANNOT_CHANGE_MODE
1056 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1059 && (CONSTANT_P (SUBREG_REG (out
))
1061 || (((GET_CODE (SUBREG_REG (out
)) == REG
1062 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1063 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1064 && ((GET_MODE_SIZE (outmode
)
1065 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1066 #ifdef WORD_REGISTER_OPERATIONS
1067 || ((GET_MODE_SIZE (outmode
)
1068 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1069 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1070 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1074 || (GET_CODE (SUBREG_REG (out
)) == REG
1075 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1076 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1077 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1079 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1081 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1082 GET_MODE (SUBREG_REG (out
)))))
1083 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out
))
1084 + SUBREG_WORD (out
)),
1086 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1087 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1088 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1089 GET_MODE (SUBREG_REG (out
)),
1093 #ifdef CLASS_CANNOT_CHANGE_MODE
1094 || (GET_CODE (SUBREG_REG (out
)) == REG
1095 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1096 && (TEST_HARD_REG_BIT
1097 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1098 REGNO (SUBREG_REG (out
))))
1099 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1104 out_subreg_loc
= outloc
;
1105 outloc
= &SUBREG_REG (out
);
1107 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1108 if (GET_CODE (out
) == MEM
1109 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1112 outmode
= GET_MODE (out
);
1115 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1116 either M1 is not valid for R or M2 is wider than a word but we only
1117 need one word to store an M2-sized quantity in R.
1119 However, we must reload the inner reg *as well as* the subreg in
1120 that case. In this case, the inner reg is an in-out reload. */
1122 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
))
1124 /* This relies on the fact that emit_reload_insns outputs the
1125 instructions for output reloads of type RELOAD_OTHER in reverse
1126 order of the reloads. Thus if the outer reload is also of type
1127 RELOAD_OTHER, we are guaranteed that this inner reload will be
1128 output after the outer reload. */
1129 dont_remove_subreg
= 1;
1130 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1132 find_valid_class (outmode
, SUBREG_WORD (out
)),
1133 VOIDmode
, VOIDmode
, 0, 0,
1134 opnum
, RELOAD_OTHER
);
1137 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1138 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1139 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1140 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1143 /* If IN is a SUBREG of a hard register, make a new REG. This
1144 simplifies some of the cases below. */
1146 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1147 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1148 && ! dont_remove_subreg
)
1149 in
= gen_rtx_REG (GET_MODE (in
),
1150 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
1152 /* Similarly for OUT. */
1153 if (out
!= 0 && GET_CODE (out
) == SUBREG
1154 && GET_CODE (SUBREG_REG (out
)) == REG
1155 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1156 && ! dont_remove_subreg
)
1157 out
= gen_rtx_REG (GET_MODE (out
),
1158 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
1160 /* Narrow down the class of register wanted if that is
1161 desirable on this machine for efficiency. */
1163 class = PREFERRED_RELOAD_CLASS (in
, class);
1165 /* Output reloads may need analogous treatment, different in detail. */
1166 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1168 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1171 /* Make sure we use a class that can handle the actual pseudo
1172 inside any subreg. For example, on the 386, QImode regs
1173 can appear within SImode subregs. Although GENERAL_REGS
1174 can handle SImode, QImode needs a smaller class. */
1175 #ifdef LIMIT_RELOAD_CLASS
1177 class = LIMIT_RELOAD_CLASS (inmode
, class);
1178 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1179 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1182 class = LIMIT_RELOAD_CLASS (outmode
, class);
1183 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1184 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1187 /* Verify that this class is at least possible for the mode that
1189 if (this_insn_is_asm
)
1191 enum machine_mode mode
;
1192 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1196 if (mode
== VOIDmode
)
1198 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1203 outmode
= word_mode
;
1205 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1206 if (HARD_REGNO_MODE_OK (i
, mode
)
1207 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1209 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1212 for (j
= 1; j
< nregs
; j
++)
1213 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1218 if (i
== FIRST_PSEUDO_REGISTER
)
1220 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1225 /* Optional output reloads are always OK even if we have no register class,
1226 since the function of these reloads is only to have spill_reg_store etc.
1227 set, so that the storing insn can be deleted later. */
1228 if (class == NO_REGS
1229 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1232 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1236 /* See if we need a secondary reload register to move between CLASS
1237 and IN or CLASS and OUT. Get the icode and push any required reloads
1238 needed for each of them if so. */
1240 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1243 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1244 &secondary_in_icode
);
1247 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1248 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1249 secondary_out_reload
1250 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1251 type
, &secondary_out_icode
);
1254 /* We found no existing reload suitable for re-use.
1255 So add an additional reload. */
1257 #ifdef SECONDARY_MEMORY_NEEDED
1258 /* If a memory location is needed for the copy, make one. */
1259 if (in
!= 0 && GET_CODE (in
) == REG
1260 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1261 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1263 get_secondary_mem (in
, inmode
, opnum
, type
);
1269 rld
[i
].class = class;
1270 rld
[i
].inmode
= inmode
;
1271 rld
[i
].outmode
= outmode
;
1273 rld
[i
].optional
= optional
;
1275 rld
[i
].nocombine
= 0;
1276 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1277 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1278 rld
[i
].opnum
= opnum
;
1279 rld
[i
].when_needed
= type
;
1280 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1281 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1282 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1283 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1284 rld
[i
].secondary_p
= 0;
1288 #ifdef SECONDARY_MEMORY_NEEDED
1289 if (out
!= 0 && GET_CODE (out
) == REG
1290 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1291 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1293 get_secondary_mem (out
, outmode
, opnum
, type
);
1298 /* We are reusing an existing reload,
1299 but we may have additional information for it.
1300 For example, we may now have both IN and OUT
1301 while the old one may have just one of them. */
1303 /* The modes can be different. If they are, we want to reload in
1304 the larger mode, so that the value is valid for both modes. */
1305 if (inmode
!= VOIDmode
1306 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1307 rld
[i
].inmode
= inmode
;
1308 if (outmode
!= VOIDmode
1309 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1310 rld
[i
].outmode
= outmode
;
1313 rtx in_reg
= inloc
? *inloc
: 0;
1314 /* If we merge reloads for two distinct rtl expressions that
1315 are identical in content, there might be duplicate address
1316 reloads. Remove the extra set now, so that if we later find
1317 that we can inherit this reload, we can get rid of the
1318 address reloads altogether.
1320 Do not do this if both reloads are optional since the result
1321 would be an optional reload which could potentially leave
1322 unresolved address replacements.
1324 It is not sufficient to call transfer_replacements since
1325 choose_reload_regs will remove the replacements for address
1326 reloads of inherited reloads which results in the same
1328 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1329 && ! (rld
[i
].optional
&& optional
))
1331 /* We must keep the address reload with the lower operand
1333 if (opnum
> rld
[i
].opnum
)
1335 remove_address_replacements (in
);
1337 in_reg
= rld
[i
].in_reg
;
1340 remove_address_replacements (rld
[i
].in
);
1343 rld
[i
].in_reg
= in_reg
;
1348 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1350 if (reg_class_subset_p (class, rld
[i
].class))
1351 rld
[i
].class = class;
1352 rld
[i
].optional
&= optional
;
1353 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1354 opnum
, rld
[i
].opnum
))
1355 rld
[i
].when_needed
= RELOAD_OTHER
;
1356 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1359 /* If the ostensible rtx being reload differs from the rtx found
1360 in the location to substitute, this reload is not safe to combine
1361 because we cannot reliably tell whether it appears in the insn. */
1363 if (in
!= 0 && in
!= *inloc
)
1364 rld
[i
].nocombine
= 1;
1367 /* This was replaced by changes in find_reloads_address_1 and the new
1368 function inc_for_reload, which go with a new meaning of reload_inc. */
1370 /* If this is an IN/OUT reload in an insn that sets the CC,
1371 it must be for an autoincrement. It doesn't work to store
1372 the incremented value after the insn because that would clobber the CC.
1373 So we must do the increment of the value reloaded from,
1374 increment it, store it back, then decrement again. */
1375 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1379 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1380 /* If we did not find a nonzero amount-to-increment-by,
1381 that contradicts the belief that IN is being incremented
1382 in an address in this insn. */
1383 if (rld
[i
].inc
== 0)
1388 /* If we will replace IN and OUT with the reload-reg,
1389 record where they are located so that substitution need
1390 not do a tree walk. */
1392 if (replace_reloads
)
1396 register struct replacement
*r
= &replacements
[n_replacements
++];
1398 r
->subreg_loc
= in_subreg_loc
;
1402 if (outloc
!= 0 && outloc
!= inloc
)
1404 register struct replacement
*r
= &replacements
[n_replacements
++];
1407 r
->subreg_loc
= out_subreg_loc
;
1412 /* If this reload is just being introduced and it has both
1413 an incoming quantity and an outgoing quantity that are
1414 supposed to be made to match, see if either one of the two
1415 can serve as the place to reload into.
1417 If one of them is acceptable, set rld[i].reg_rtx
1420 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1422 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1425 earlyclobber_operand_p (out
));
1427 /* If the outgoing register already contains the same value
1428 as the incoming one, we can dispense with loading it.
1429 The easiest way to tell the caller that is to give a phony
1430 value for the incoming operand (same as outgoing one). */
1431 if (rld
[i
].reg_rtx
== out
1432 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1433 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1434 static_reload_reg_p
, i
, inmode
))
1438 /* If this is an input reload and the operand contains a register that
1439 dies in this insn and is used nowhere else, see if it is the right class
1440 to be used for this reload. Use it if so. (This occurs most commonly
1441 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1442 this if it is also an output reload that mentions the register unless
1443 the output is a SUBREG that clobbers an entire register.
1445 Note that the operand might be one of the spill regs, if it is a
1446 pseudo reg and we are in a block where spilling has not taken place.
1447 But if there is no spilling in this block, that is OK.
1448 An explicitly used hard reg cannot be a spill reg. */
1450 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1455 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1456 if (REG_NOTE_KIND (note
) == REG_DEAD
1457 && GET_CODE (XEXP (note
, 0)) == REG
1458 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1459 && reg_mentioned_p (XEXP (note
, 0), in
)
1460 && ! refers_to_regno_for_reload_p (regno
,
1462 + HARD_REGNO_NREGS (regno
,
1464 PATTERN (this_insn
), inloc
)
1465 /* If this is also an output reload, IN cannot be used as
1466 the reload register if it is set in this insn unless IN
1468 && (out
== 0 || in
== out
1469 || ! hard_reg_set_here_p (regno
,
1471 + HARD_REGNO_NREGS (regno
,
1473 PATTERN (this_insn
)))
1474 /* ??? Why is this code so different from the previous?
1475 Is there any simple coherent way to describe the two together?
1476 What's going on here. */
1478 || (GET_CODE (in
) == SUBREG
1479 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1481 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1482 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1483 /* Make sure the operand fits in the reg that dies. */
1484 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1485 && HARD_REGNO_MODE_OK (regno
, inmode
)
1486 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1487 && HARD_REGNO_MODE_OK (regno
, outmode
))
1490 unsigned int nregs
= MAX (HARD_REGNO_NREGS (regno
, inmode
),
1491 HARD_REGNO_NREGS (regno
, outmode
));
1493 for (offs
= 0; offs
< nregs
; offs
++)
1494 if (fixed_regs
[regno
+ offs
]
1495 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1501 rld
[i
].reg_rtx
= gen_rtx_REG (inmode
, regno
);
1508 output_reloadnum
= i
;
1513 /* Record an additional place we must replace a value
1514 for which we have already recorded a reload.
1515 RELOADNUM is the value returned by push_reload
1516 when the reload was recorded.
1517 This is used in insn patterns that use match_dup. */
1520 push_replacement (loc
, reloadnum
, mode
)
1523 enum machine_mode mode
;
1525 if (replace_reloads
)
1527 register struct replacement
*r
= &replacements
[n_replacements
++];
1528 r
->what
= reloadnum
;
1535 /* Transfer all replacements that used to be in reload FROM to be in
1539 transfer_replacements (to
, from
)
1544 for (i
= 0; i
< n_replacements
; i
++)
1545 if (replacements
[i
].what
== from
)
1546 replacements
[i
].what
= to
;
1549 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1550 or a subpart of it. If we have any replacements registered for IN_RTX,
1551 cancel the reloads that were supposed to load them.
1552 Return non-zero if we canceled any reloads. */
1554 remove_address_replacements (in_rtx
)
1558 char reload_flags
[MAX_RELOADS
];
1559 int something_changed
= 0;
1561 bzero (reload_flags
, sizeof reload_flags
);
1562 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1564 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1565 reload_flags
[replacements
[i
].what
] |= 1;
1568 replacements
[j
++] = replacements
[i
];
1569 reload_flags
[replacements
[i
].what
] |= 2;
1572 /* Note that the following store must be done before the recursive calls. */
1575 for (i
= n_reloads
- 1; i
>= 0; i
--)
1577 if (reload_flags
[i
] == 1)
1579 deallocate_reload_reg (i
);
1580 remove_address_replacements (rld
[i
].in
);
1582 something_changed
= 1;
1585 return something_changed
;
1588 /* If there is only one output reload, and it is not for an earlyclobber
1589 operand, try to combine it with a (logically unrelated) input reload
1590 to reduce the number of reload registers needed.
1592 This is safe if the input reload does not appear in
1593 the value being output-reloaded, because this implies
1594 it is not needed any more once the original insn completes.
1596 If that doesn't work, see we can use any of the registers that
1597 die in this insn as a reload register. We can if it is of the right
1598 class and does not appear in the value being output-reloaded. */
1604 int output_reload
= -1;
1605 int secondary_out
= -1;
1608 /* Find the output reload; return unless there is exactly one
1609 and that one is mandatory. */
1611 for (i
= 0; i
< n_reloads
; i
++)
1612 if (rld
[i
].out
!= 0)
1614 if (output_reload
>= 0)
1619 if (output_reload
< 0 || rld
[output_reload
].optional
)
1622 /* An input-output reload isn't combinable. */
1624 if (rld
[output_reload
].in
!= 0)
1627 /* If this reload is for an earlyclobber operand, we can't do anything. */
1628 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1631 /* Check each input reload; can we combine it? */
1633 for (i
= 0; i
< n_reloads
; i
++)
1634 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1635 /* Life span of this reload must not extend past main insn. */
1636 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1637 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1638 && rld
[i
].when_needed
!= RELOAD_OTHER
1639 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1640 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1641 rld
[output_reload
].outmode
))
1643 && rld
[i
].reg_rtx
== 0
1644 #ifdef SECONDARY_MEMORY_NEEDED
1645 /* Don't combine two reloads with different secondary
1646 memory locations. */
1647 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1648 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1649 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1650 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1652 && (SMALL_REGISTER_CLASSES
1653 ? (rld
[i
].class == rld
[output_reload
].class)
1654 : (reg_class_subset_p (rld
[i
].class,
1655 rld
[output_reload
].class)
1656 || reg_class_subset_p (rld
[output_reload
].class,
1658 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1659 /* Args reversed because the first arg seems to be
1660 the one that we imagine being modified
1661 while the second is the one that might be affected. */
1662 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1664 /* However, if the input is a register that appears inside
1665 the output, then we also can't share.
1666 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1667 If the same reload reg is used for both reg 69 and the
1668 result to be stored in memory, then that result
1669 will clobber the address of the memory ref. */
1670 && ! (GET_CODE (rld
[i
].in
) == REG
1671 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1672 rld
[output_reload
].out
))))
1673 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
)
1674 && (reg_class_size
[(int) rld
[i
].class]
1675 || SMALL_REGISTER_CLASSES
)
1676 /* We will allow making things slightly worse by combining an
1677 input and an output, but no worse than that. */
1678 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1679 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1683 /* We have found a reload to combine with! */
1684 rld
[i
].out
= rld
[output_reload
].out
;
1685 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1686 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1687 /* Mark the old output reload as inoperative. */
1688 rld
[output_reload
].out
= 0;
1689 /* The combined reload is needed for the entire insn. */
1690 rld
[i
].when_needed
= RELOAD_OTHER
;
1691 /* If the output reload had a secondary reload, copy it. */
1692 if (rld
[output_reload
].secondary_out_reload
!= -1)
1694 rld
[i
].secondary_out_reload
1695 = rld
[output_reload
].secondary_out_reload
;
1696 rld
[i
].secondary_out_icode
1697 = rld
[output_reload
].secondary_out_icode
;
1700 #ifdef SECONDARY_MEMORY_NEEDED
1701 /* Copy any secondary MEM. */
1702 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1703 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1704 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1706 /* If required, minimize the register class. */
1707 if (reg_class_subset_p (rld
[output_reload
].class,
1709 rld
[i
].class = rld
[output_reload
].class;
1711 /* Transfer all replacements from the old reload to the combined. */
1712 for (j
= 0; j
< n_replacements
; j
++)
1713 if (replacements
[j
].what
== output_reload
)
1714 replacements
[j
].what
= i
;
1719 /* If this insn has only one operand that is modified or written (assumed
1720 to be the first), it must be the one corresponding to this reload. It
1721 is safe to use anything that dies in this insn for that output provided
1722 that it does not occur in the output (we already know it isn't an
1723 earlyclobber. If this is an asm insn, give up. */
1725 if (INSN_CODE (this_insn
) == -1)
1728 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1729 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1730 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1733 /* See if some hard register that dies in this insn and is not used in
1734 the output is the right class. Only works if the register we pick
1735 up can fully hold our output reload. */
1736 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1737 if (REG_NOTE_KIND (note
) == REG_DEAD
1738 && GET_CODE (XEXP (note
, 0)) == REG
1739 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1740 rld
[output_reload
].out
)
1741 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1742 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1743 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1744 REGNO (XEXP (note
, 0)))
1745 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1746 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1747 /* Ensure that a secondary or tertiary reload for this output
1748 won't want this register. */
1749 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1750 || (! (TEST_HARD_REG_BIT
1751 (reg_class_contents
[(int) rld
[secondary_out
].class],
1752 REGNO (XEXP (note
, 0))))
1753 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1754 || ! (TEST_HARD_REG_BIT
1755 (reg_class_contents
[(int) rld
[secondary_out
].class],
1756 REGNO (XEXP (note
, 0)))))))
1757 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1759 rld
[output_reload
].reg_rtx
1760 = gen_rtx_REG (rld
[output_reload
].outmode
,
1761 REGNO (XEXP (note
, 0)));
1766 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1767 See if one of IN and OUT is a register that may be used;
1768 this is desirable since a spill-register won't be needed.
1769 If so, return the register rtx that proves acceptable.
1771 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1772 CLASS is the register class required for the reload.
1774 If FOR_REAL is >= 0, it is the number of the reload,
1775 and in some cases when it can be discovered that OUT doesn't need
1776 to be computed, clear out rld[FOR_REAL].out.
1778 If FOR_REAL is -1, this should not be done, because this call
1779 is just to see if a register can be found, not to find and install it.
1781 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1782 puts an additional constraint on being able to use IN for OUT since
1783 IN must not appear elsewhere in the insn (it is assumed that IN itself
1784 is safe from the earlyclobber). */
1787 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1788 inmode
, outmode
, class, for_real
, earlyclobber
)
1789 rtx real_in
, real_out
;
1790 rtx
*inloc
, *outloc
;
1791 enum machine_mode inmode
, outmode
;
1792 enum reg_class
class;
1802 /* If operands exceed a word, we can't use either of them
1803 unless they have the same size. */
1804 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1805 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1806 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1809 /* Find the inside of any subregs. */
1810 while (GET_CODE (out
) == SUBREG
)
1812 out_offset
= SUBREG_WORD (out
);
1813 out
= SUBREG_REG (out
);
1815 while (GET_CODE (in
) == SUBREG
)
1817 in_offset
= SUBREG_WORD (in
);
1818 in
= SUBREG_REG (in
);
1821 /* Narrow down the reg class, the same way push_reload will;
1822 otherwise we might find a dummy now, but push_reload won't. */
1823 class = PREFERRED_RELOAD_CLASS (in
, class);
1825 /* See if OUT will do. */
1826 if (GET_CODE (out
) == REG
1827 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1829 unsigned int regno
= REGNO (out
) + out_offset
;
1830 unsigned int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1833 /* When we consider whether the insn uses OUT,
1834 ignore references within IN. They don't prevent us
1835 from copying IN into OUT, because those refs would
1836 move into the insn that reloads IN.
1838 However, we only ignore IN in its role as this reload.
1839 If the insn uses IN elsewhere and it contains OUT,
1840 that counts. We can't be sure it's the "same" operand
1841 so it might not go through this reload. */
1843 *inloc
= const0_rtx
;
1845 if (regno
< FIRST_PSEUDO_REGISTER
1846 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1847 PATTERN (this_insn
), outloc
))
1851 for (i
= 0; i
< nwords
; i
++)
1852 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1858 if (GET_CODE (real_out
) == REG
)
1861 value
= gen_rtx_REG (outmode
, regno
);
1868 /* Consider using IN if OUT was not acceptable
1869 or if OUT dies in this insn (like the quotient in a divmod insn).
1870 We can't use IN unless it is dies in this insn,
1871 which means we must know accurately which hard regs are live.
1872 Also, the result can't go in IN if IN is used within OUT,
1873 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1874 if (hard_regs_live_known
1875 && GET_CODE (in
) == REG
1876 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1878 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1879 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1880 && !fixed_regs
[REGNO (in
)]
1881 && HARD_REGNO_MODE_OK (REGNO (in
),
1882 /* The only case where out and real_out might
1883 have different modes is where real_out
1884 is a subreg, and in that case, out
1886 (GET_MODE (out
) != VOIDmode
1887 ? GET_MODE (out
) : outmode
)))
1889 unsigned int regno
= REGNO (in
) + in_offset
;
1890 unsigned int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1892 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1893 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1894 PATTERN (this_insn
))
1896 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1897 PATTERN (this_insn
), inloc
)))
1901 for (i
= 0; i
< nwords
; i
++)
1902 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1908 /* If we were going to use OUT as the reload reg
1909 and changed our mind, it means OUT is a dummy that
1910 dies here. So don't bother copying value to it. */
1911 if (for_real
>= 0 && value
== real_out
)
1912 rld
[for_real
].out
= 0;
1913 if (GET_CODE (real_in
) == REG
)
1916 value
= gen_rtx_REG (inmode
, regno
);
1924 /* This page contains subroutines used mainly for determining
1925 whether the IN or an OUT of a reload can serve as the
1928 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1931 earlyclobber_operand_p (x
)
1936 for (i
= 0; i
< n_earlyclobbers
; i
++)
1937 if (reload_earlyclobbers
[i
] == x
)
1943 /* Return 1 if expression X alters a hard reg in the range
1944 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1945 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1946 X should be the body of an instruction. */
1949 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1950 unsigned int beg_regno
, end_regno
;
1953 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1955 register rtx op0
= SET_DEST (x
);
1957 while (GET_CODE (op0
) == SUBREG
)
1958 op0
= SUBREG_REG (op0
);
1959 if (GET_CODE (op0
) == REG
)
1961 unsigned int r
= REGNO (op0
);
1963 /* See if this reg overlaps range under consideration. */
1965 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1969 else if (GET_CODE (x
) == PARALLEL
)
1971 register int i
= XVECLEN (x
, 0) - 1;
1974 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1981 /* Return 1 if ADDR is a valid memory address for mode MODE,
1982 and check that each pseudo reg has the proper kind of
1986 strict_memory_address_p (mode
, addr
)
1987 enum machine_mode mode ATTRIBUTE_UNUSED
;
1990 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1997 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1998 if they are the same hard reg, and has special hacks for
1999 autoincrement and autodecrement.
2000 This is specifically intended for find_reloads to use
2001 in determining whether two operands match.
2002 X is the operand whose number is the lower of the two.
2004 The value is 2 if Y contains a pre-increment that matches
2005 a non-incrementing address in X. */
2007 /* ??? To be completely correct, we should arrange to pass
2008 for X the output operand and for Y the input operand.
2009 For now, we assume that the output operand has the lower number
2010 because that is natural in (SET output (... input ...)). */
2013 operands_match_p (x
, y
)
2017 register RTX_CODE code
= GET_CODE (x
);
2018 register const char *fmt
;
2023 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
2024 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
2025 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2031 i
= REGNO (SUBREG_REG (x
));
2032 if (i
>= FIRST_PSEUDO_REGISTER
)
2034 i
+= SUBREG_WORD (x
);
2039 if (GET_CODE (y
) == SUBREG
)
2041 j
= REGNO (SUBREG_REG (y
));
2042 if (j
>= FIRST_PSEUDO_REGISTER
)
2044 j
+= SUBREG_WORD (y
);
2049 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2050 multiple hard register group, so that for example (reg:DI 0) and
2051 (reg:SI 1) will be considered the same register. */
2052 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2053 && i
< FIRST_PSEUDO_REGISTER
)
2054 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
2055 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2056 && j
< FIRST_PSEUDO_REGISTER
)
2057 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
2061 /* If two operands must match, because they are really a single
2062 operand of an assembler insn, then two postincrements are invalid
2063 because the assembler insn would increment only once.
2064 On the other hand, an postincrement matches ordinary indexing
2065 if the postincrement is the output operand. */
2066 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2067 return operands_match_p (XEXP (x
, 0), y
);
2068 /* Two preincrements are invalid
2069 because the assembler insn would increment only once.
2070 On the other hand, an preincrement matches ordinary indexing
2071 if the preincrement is the input operand.
2072 In this case, return 2, since some callers need to do special
2073 things when this happens. */
2074 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2075 || GET_CODE (y
) == PRE_MODIFY
)
2076 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2080 /* Now we have disposed of all the cases
2081 in which different rtx codes can match. */
2082 if (code
!= GET_CODE (y
))
2084 if (code
== LABEL_REF
)
2085 return XEXP (x
, 0) == XEXP (y
, 0);
2086 if (code
== SYMBOL_REF
)
2087 return XSTR (x
, 0) == XSTR (y
, 0);
2089 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2091 if (GET_MODE (x
) != GET_MODE (y
))
2094 /* Compare the elements. If any pair of corresponding elements
2095 fail to match, return 0 for the whole things. */
2098 fmt
= GET_RTX_FORMAT (code
);
2099 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2105 if (XWINT (x
, i
) != XWINT (y
, i
))
2110 if (XINT (x
, i
) != XINT (y
, i
))
2115 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2118 /* If any subexpression returns 2,
2119 we should return 2 if we are successful. */
2128 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2130 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2132 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2140 /* It is believed that rtx's at this level will never
2141 contain anything but integers and other rtx's,
2142 except for within LABEL_REFs and SYMBOL_REFs. */
2147 return 1 + success_2
;
2150 /* Describe the range of registers or memory referenced by X.
2151 If X is a register, set REG_FLAG and put the first register
2152 number into START and the last plus one into END.
2153 If X is a memory reference, put a base address into BASE
2154 and a range of integer offsets into START and END.
2155 If X is pushing on the stack, we can assume it causes no trouble,
2156 so we set the SAFE field. */
2158 static struct decomposition
2162 struct decomposition val
;
2168 if (GET_CODE (x
) == MEM
)
2170 rtx base
= NULL_RTX
, offset
= 0;
2171 rtx addr
= XEXP (x
, 0);
2173 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2174 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2176 val
.base
= XEXP (addr
, 0);
2177 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2178 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2179 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2183 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2185 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2186 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2187 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2189 val
.base
= XEXP (addr
, 0);
2190 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2191 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2192 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2197 if (GET_CODE (addr
) == CONST
)
2199 addr
= XEXP (addr
, 0);
2202 if (GET_CODE (addr
) == PLUS
)
2204 if (CONSTANT_P (XEXP (addr
, 0)))
2206 base
= XEXP (addr
, 1);
2207 offset
= XEXP (addr
, 0);
2209 else if (CONSTANT_P (XEXP (addr
, 1)))
2211 base
= XEXP (addr
, 0);
2212 offset
= XEXP (addr
, 1);
2219 offset
= const0_rtx
;
2221 if (GET_CODE (offset
) == CONST
)
2222 offset
= XEXP (offset
, 0);
2223 if (GET_CODE (offset
) == PLUS
)
2225 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2227 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2228 offset
= XEXP (offset
, 0);
2230 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2232 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2233 offset
= XEXP (offset
, 1);
2237 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2238 offset
= const0_rtx
;
2241 else if (GET_CODE (offset
) != CONST_INT
)
2243 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2244 offset
= const0_rtx
;
2247 if (all_const
&& GET_CODE (base
) == PLUS
)
2248 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2250 if (GET_CODE (offset
) != CONST_INT
)
2253 val
.start
= INTVAL (offset
);
2254 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2258 else if (GET_CODE (x
) == REG
)
2261 val
.start
= true_regnum (x
);
2264 /* A pseudo with no hard reg. */
2265 val
.start
= REGNO (x
);
2266 val
.end
= val
.start
+ 1;
2270 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2272 else if (GET_CODE (x
) == SUBREG
)
2274 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2275 /* This could be more precise, but it's good enough. */
2276 return decompose (SUBREG_REG (x
));
2278 val
.start
= true_regnum (x
);
2280 return decompose (SUBREG_REG (x
));
2283 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2285 else if (CONSTANT_P (x
)
2286 /* This hasn't been assigned yet, so it can't conflict yet. */
2287 || GET_CODE (x
) == SCRATCH
)
2294 /* Return 1 if altering Y will not modify the value of X.
2295 Y is also described by YDATA, which should be decompose (Y). */
2298 immune_p (x
, y
, ydata
)
2300 struct decomposition ydata
;
2302 struct decomposition xdata
;
2305 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
2309 if (GET_CODE (y
) != MEM
)
2311 /* If Y is memory and X is not, Y can't affect X. */
2312 if (GET_CODE (x
) != MEM
)
2315 xdata
= decompose (x
);
2317 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2319 /* If bases are distinct symbolic constants, there is no overlap. */
2320 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2322 /* Constants and stack slots never overlap. */
2323 if (CONSTANT_P (xdata
.base
)
2324 && (ydata
.base
== frame_pointer_rtx
2325 || ydata
.base
== hard_frame_pointer_rtx
2326 || ydata
.base
== stack_pointer_rtx
))
2328 if (CONSTANT_P (ydata
.base
)
2329 && (xdata
.base
== frame_pointer_rtx
2330 || xdata
.base
== hard_frame_pointer_rtx
2331 || xdata
.base
== stack_pointer_rtx
))
2333 /* If either base is variable, we don't know anything. */
2337 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2340 /* Similar, but calls decompose. */
2343 safe_from_earlyclobber (op
, clobber
)
2346 struct decomposition early_data
;
2348 early_data
= decompose (clobber
);
2349 return immune_p (op
, clobber
, early_data
);
2352 /* Main entry point of this file: search the body of INSN
2353 for values that need reloading and record them with push_reload.
2354 REPLACE nonzero means record also where the values occur
2355 so that subst_reloads can be used.
2357 IND_LEVELS says how many levels of indirection are supported by this
2358 machine; a value of zero means that a memory reference is not a valid
2361 LIVE_KNOWN says we have valid information about which hard
2362 regs are live at each point in the program; this is true when
2363 we are called from global_alloc but false when stupid register
2364 allocation has been done.
2366 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2367 which is nonnegative if the reg has been commandeered for reloading into.
2368 It is copied into STATIC_RELOAD_REG_P and referenced from there
2369 by various subroutines.
2371 Return TRUE if some operands need to be changed, because of swapping
2372 commutative operands, reg_equiv_address substitution, or whatever. */
2375 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2377 int replace
, ind_levels
;
2379 short *reload_reg_p
;
2381 register int insn_code_number
;
2384 /* These start out as the constraints for the insn
2385 and they are chewed up as we consider alternatives. */
2386 char *constraints
[MAX_RECOG_OPERANDS
];
2387 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2389 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2390 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2391 /* Nonzero for a MEM operand whose entire address needs a reload. */
2392 int address_reloaded
[MAX_RECOG_OPERANDS
];
2393 /* Value of enum reload_type to use for operand. */
2394 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2395 /* Value of enum reload_type to use within address of operand. */
2396 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2397 /* Save the usage of each operand. */
2398 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2399 int no_input_reloads
= 0, no_output_reloads
= 0;
2401 int this_alternative
[MAX_RECOG_OPERANDS
];
2402 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2403 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2404 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2405 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2407 int goal_alternative
[MAX_RECOG_OPERANDS
];
2408 int this_alternative_number
;
2409 int goal_alternative_number
= 0;
2410 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2411 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2412 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2413 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2414 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2415 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2416 int goal_alternative_swapped
;
2419 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2420 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2421 rtx body
= PATTERN (insn
);
2422 rtx set
= single_set (insn
);
2423 int goal_earlyclobber
= 0, this_earlyclobber
;
2424 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2430 n_earlyclobbers
= 0;
2431 replace_reloads
= replace
;
2432 hard_regs_live_known
= live_known
;
2433 static_reload_reg_p
= reload_reg_p
;
2435 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2436 neither are insns that SET cc0. Insns that use CC0 are not allowed
2437 to have any input reloads. */
2438 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2439 no_output_reloads
= 1;
2442 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2443 no_input_reloads
= 1;
2444 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2445 no_output_reloads
= 1;
2448 #ifdef SECONDARY_MEMORY_NEEDED
2449 /* The eliminated forms of any secondary memory locations are per-insn, so
2450 clear them out here. */
2452 bzero ((char *) secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2455 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2456 is cheap to move between them. If it is not, there may not be an insn
2457 to do the copy, so we may need a reload. */
2458 if (GET_CODE (body
) == SET
2459 && GET_CODE (SET_DEST (body
)) == REG
2460 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2461 && GET_CODE (SET_SRC (body
)) == REG
2462 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2463 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2464 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2467 extract_insn (insn
);
2469 noperands
= reload_n_operands
= recog_data
.n_operands
;
2470 n_alternatives
= recog_data
.n_alternatives
;
2472 /* Just return "no reloads" if insn has no operands with constraints. */
2473 if (noperands
== 0 || n_alternatives
== 0)
2476 insn_code_number
= INSN_CODE (insn
);
2477 this_insn_is_asm
= insn_code_number
< 0;
2479 memcpy (operand_mode
, recog_data
.operand_mode
,
2480 noperands
* sizeof (enum machine_mode
));
2481 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2485 /* If we will need to know, later, whether some pair of operands
2486 are the same, we must compare them now and save the result.
2487 Reloading the base and index registers will clobber them
2488 and afterward they will fail to match. */
2490 for (i
= 0; i
< noperands
; i
++)
2495 substed_operand
[i
] = recog_data
.operand
[i
];
2498 modified
[i
] = RELOAD_READ
;
2500 /* Scan this operand's constraint to see if it is an output operand,
2501 an in-out operand, is commutative, or should match another. */
2506 modified
[i
] = RELOAD_WRITE
;
2508 modified
[i
] = RELOAD_READ_WRITE
;
2511 /* The last operand should not be marked commutative. */
2512 if (i
== noperands
- 1)
2517 else if (c
>= '0' && c
<= '9')
2520 operands_match
[c
][i
]
2521 = operands_match_p (recog_data
.operand
[c
],
2522 recog_data
.operand
[i
]);
2524 /* An operand may not match itself. */
2528 /* If C can be commuted with C+1, and C might need to match I,
2529 then C+1 might also need to match I. */
2530 if (commutative
>= 0)
2532 if (c
== commutative
|| c
== commutative
+ 1)
2534 int other
= c
+ (c
== commutative
? 1 : -1);
2535 operands_match
[other
][i
]
2536 = operands_match_p (recog_data
.operand
[other
],
2537 recog_data
.operand
[i
]);
2539 if (i
== commutative
|| i
== commutative
+ 1)
2541 int other
= i
+ (i
== commutative
? 1 : -1);
2542 operands_match
[c
][other
]
2543 = operands_match_p (recog_data
.operand
[c
],
2544 recog_data
.operand
[other
]);
2546 /* Note that C is supposed to be less than I.
2547 No need to consider altering both C and I because in
2548 that case we would alter one into the other. */
2554 /* Examine each operand that is a memory reference or memory address
2555 and reload parts of the addresses into index registers.
2556 Also here any references to pseudo regs that didn't get hard regs
2557 but are equivalent to constants get replaced in the insn itself
2558 with those constants. Nobody will ever see them again.
2560 Finally, set up the preferred classes of each operand. */
2562 for (i
= 0; i
< noperands
; i
++)
2564 register RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2566 address_reloaded
[i
] = 0;
2567 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2568 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2571 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2572 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2575 if (*constraints
[i
] == 0)
2576 /* Ignore things like match_operator operands. */
2578 else if (constraints
[i
][0] == 'p')
2580 find_reloads_address (VOIDmode
, NULL_PTR
,
2581 recog_data
.operand
[i
],
2582 recog_data
.operand_loc
[i
],
2583 i
, operand_type
[i
], ind_levels
, insn
);
2585 /* If we now have a simple operand where we used to have a
2586 PLUS or MULT, re-recognize and try again. */
2587 if ((GET_RTX_CLASS (GET_CODE (*recog_data
.operand_loc
[i
])) == 'o'
2588 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2589 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2590 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2592 INSN_CODE (insn
) = -1;
2593 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2598 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2599 substed_operand
[i
] = recog_data
.operand
[i
];
2601 else if (code
== MEM
)
2604 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2605 recog_data
.operand_loc
[i
],
2606 XEXP (recog_data
.operand
[i
], 0),
2607 &XEXP (recog_data
.operand
[i
], 0),
2608 i
, address_type
[i
], ind_levels
, insn
);
2609 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2610 substed_operand
[i
] = recog_data
.operand
[i
];
2612 else if (code
== SUBREG
)
2614 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2616 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2619 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2621 &address_reloaded
[i
]);
2623 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2624 that didn't get a hard register, emit a USE with a REG_EQUAL
2625 note in front so that we might inherit a previous, possibly
2629 && GET_CODE (op
) == MEM
2630 && GET_CODE (reg
) == REG
2631 && (GET_MODE_SIZE (GET_MODE (reg
))
2632 >= GET_MODE_SIZE (GET_MODE (op
))))
2633 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
), insn
))
2634 = gen_rtx_EXPR_LIST (REG_EQUAL
,
2635 reg_equiv_memory_loc
[REGNO (reg
)], NULL_RTX
);
2637 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2639 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2640 /* We can get a PLUS as an "operand" as a result of register
2641 elimination. See eliminate_regs and gen_reload. We handle
2642 a unary operator by reloading the operand. */
2643 substed_operand
[i
] = recog_data
.operand
[i
]
2644 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2645 ind_levels
, 0, insn
,
2646 &address_reloaded
[i
]);
2647 else if (code
== REG
)
2649 /* This is equivalent to calling find_reloads_toplev.
2650 The code is duplicated for speed.
2651 When we find a pseudo always equivalent to a constant,
2652 we replace it by the constant. We must be sure, however,
2653 that we don't try to replace it in the insn in which it
2655 register int regno
= REGNO (recog_data
.operand
[i
]);
2656 if (reg_equiv_constant
[regno
] != 0
2657 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2659 /* Record the existing mode so that the check if constants are
2660 allowed will work when operand_mode isn't specified. */
2662 if (operand_mode
[i
] == VOIDmode
)
2663 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2665 substed_operand
[i
] = recog_data
.operand
[i
]
2666 = reg_equiv_constant
[regno
];
2668 if (reg_equiv_memory_loc
[regno
] != 0
2669 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2670 /* We need not give a valid is_set_dest argument since the case
2671 of a constant equivalence was checked above. */
2672 substed_operand
[i
] = recog_data
.operand
[i
]
2673 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2674 ind_levels
, 0, insn
,
2675 &address_reloaded
[i
]);
2677 /* If the operand is still a register (we didn't replace it with an
2678 equivalent), get the preferred class to reload it into. */
2679 code
= GET_CODE (recog_data
.operand
[i
]);
2681 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2682 >= FIRST_PSEUDO_REGISTER
)
2683 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2687 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2688 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2691 /* If this is simply a copy from operand 1 to operand 0, merge the
2692 preferred classes for the operands. */
2693 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2694 && recog_data
.operand
[1] == SET_SRC (set
))
2696 preferred_class
[0] = preferred_class
[1]
2697 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2698 pref_or_nothing
[0] |= pref_or_nothing
[1];
2699 pref_or_nothing
[1] |= pref_or_nothing
[0];
2702 /* Now see what we need for pseudo-regs that didn't get hard regs
2703 or got the wrong kind of hard reg. For this, we must consider
2704 all the operands together against the register constraints. */
2706 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2709 goal_alternative_swapped
= 0;
2712 /* The constraints are made of several alternatives.
2713 Each operand's constraint looks like foo,bar,... with commas
2714 separating the alternatives. The first alternatives for all
2715 operands go together, the second alternatives go together, etc.
2717 First loop over alternatives. */
2719 for (this_alternative_number
= 0;
2720 this_alternative_number
< n_alternatives
;
2721 this_alternative_number
++)
2723 /* Loop over operands for one constraint alternative. */
2724 /* LOSERS counts those that don't fit this alternative
2725 and would require loading. */
2727 /* BAD is set to 1 if it some operand can't fit this alternative
2728 even after reloading. */
2730 /* REJECT is a count of how undesirable this alternative says it is
2731 if any reloading is required. If the alternative matches exactly
2732 then REJECT is ignored, but otherwise it gets this much
2733 counted against it in addition to the reloading needed. Each
2734 ? counts three times here since we want the disparaging caused by
2735 a bad register class to only count 1/3 as much. */
2738 this_earlyclobber
= 0;
2740 for (i
= 0; i
< noperands
; i
++)
2742 register char *p
= constraints
[i
];
2743 register int win
= 0;
2744 /* 0 => this operand can be reloaded somehow for this alternative */
2746 /* 0 => this operand can be reloaded if the alternative allows regs. */
2749 register rtx operand
= recog_data
.operand
[i
];
2751 /* Nonzero means this is a MEM that must be reloaded into a reg
2752 regardless of what the constraint says. */
2753 int force_reload
= 0;
2755 /* Nonzero if a constant forced into memory would be OK for this
2758 int earlyclobber
= 0;
2760 /* If the predicate accepts a unary operator, it means that
2761 we need to reload the operand, but do not do this for
2762 match_operator and friends. */
2763 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1' && *p
!= 0)
2764 operand
= XEXP (operand
, 0);
2766 /* If the operand is a SUBREG, extract
2767 the REG or MEM (or maybe even a constant) within.
2768 (Constants can occur as a result of reg_equiv_constant.) */
2770 while (GET_CODE (operand
) == SUBREG
)
2772 offset
+= SUBREG_WORD (operand
);
2773 operand
= SUBREG_REG (operand
);
2774 /* Force reload if this is a constant or PLUS or if there may
2775 be a problem accessing OPERAND in the outer mode. */
2776 if (CONSTANT_P (operand
)
2777 || GET_CODE (operand
) == PLUS
2778 /* We must force a reload of paradoxical SUBREGs
2779 of a MEM because the alignment of the inner value
2780 may not be enough to do the outer reference. On
2781 big-endian machines, it may also reference outside
2784 On machines that extend byte operations and we have a
2785 SUBREG where both the inner and outer modes are no wider
2786 than a word and the inner mode is narrower, is integral,
2787 and gets extended when loaded from memory, combine.c has
2788 made assumptions about the behavior of the machine in such
2789 register access. If the data is, in fact, in memory we
2790 must always load using the size assumed to be in the
2791 register and let the insn do the different-sized
2794 This is doubly true if WORD_REGISTER_OPERATIONS. In
2795 this case eliminate_regs has left non-paradoxical
2796 subregs for push_reloads to see. Make sure it does
2797 by forcing the reload.
2799 ??? When is it right at this stage to have a subreg
2800 of a mem that is _not_ to be handled specialy? IMO
2801 those should have been reduced to just a mem. */
2802 || ((GET_CODE (operand
) == MEM
2803 || (GET_CODE (operand
)== REG
2804 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2805 #ifndef WORD_REGISTER_OPERATIONS
2806 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2807 < BIGGEST_ALIGNMENT
)
2808 && (GET_MODE_SIZE (operand_mode
[i
])
2809 > GET_MODE_SIZE (GET_MODE (operand
))))
2810 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2811 #ifdef LOAD_EXTEND_OP
2812 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2813 && (GET_MODE_SIZE (GET_MODE (operand
))
2815 && (GET_MODE_SIZE (operand_mode
[i
])
2816 > GET_MODE_SIZE (GET_MODE (operand
)))
2817 && INTEGRAL_MODE_P (GET_MODE (operand
))
2818 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2823 /* Subreg of a hard reg which can't handle the subreg's mode
2824 or which would handle that mode in the wrong number of
2825 registers for subregging to work. */
2826 || (GET_CODE (operand
) == REG
2827 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2828 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2829 && (GET_MODE_SIZE (GET_MODE (operand
))
2831 && ((GET_MODE_SIZE (GET_MODE (operand
))
2833 != HARD_REGNO_NREGS (REGNO (operand
),
2834 GET_MODE (operand
))))
2835 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2840 this_alternative
[i
] = (int) NO_REGS
;
2841 this_alternative_win
[i
] = 0;
2842 this_alternative_offmemok
[i
] = 0;
2843 this_alternative_earlyclobber
[i
] = 0;
2844 this_alternative_matches
[i
] = -1;
2846 /* An empty constraint or empty alternative
2847 allows anything which matched the pattern. */
2848 if (*p
== 0 || *p
== ',')
2851 /* Scan this alternative's specs for this operand;
2852 set WIN if the operand fits any letter in this alternative.
2853 Otherwise, clear BADOP if this operand could
2854 fit some letter after reloads,
2855 or set WINREG if this operand could fit after reloads
2856 provided the constraint allows some registers. */
2858 while (*p
&& (c
= *p
++) != ',')
2861 case '=': case '+': case '*':
2865 /* The last operand should not be marked commutative. */
2866 if (i
!= noperands
- 1)
2879 /* Ignore rest of this alternative as far as
2880 reloading is concerned. */
2881 while (*p
&& *p
!= ',')
2885 case '0': case '1': case '2': case '3': case '4':
2886 case '5': case '6': case '7': case '8': case '9':
2889 this_alternative_matches
[i
] = c
;
2890 /* We are supposed to match a previous operand.
2891 If we do, we win if that one did.
2892 If we do not, count both of the operands as losers.
2893 (This is too conservative, since most of the time
2894 only a single reload insn will be needed to make
2895 the two operands win. As a result, this alternative
2896 may be rejected when it is actually desirable.) */
2897 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2898 /* If we are matching as if two operands were swapped,
2899 also pretend that operands_match had been computed
2901 But if I is the second of those and C is the first,
2902 don't exchange them, because operands_match is valid
2903 only on one side of its diagonal. */
2905 [(c
== commutative
|| c
== commutative
+ 1)
2906 ? 2 * commutative
+ 1 - c
: c
]
2907 [(i
== commutative
|| i
== commutative
+ 1)
2908 ? 2 * commutative
+ 1 - i
: i
])
2909 : operands_match
[c
][i
])
2911 /* If we are matching a non-offsettable address where an
2912 offsettable address was expected, then we must reject
2913 this combination, because we can't reload it. */
2914 if (this_alternative_offmemok
[c
]
2915 && GET_CODE (recog_data
.operand
[c
]) == MEM
2916 && this_alternative
[c
] == (int) NO_REGS
2917 && ! this_alternative_win
[c
])
2920 win
= this_alternative_win
[c
];
2924 /* Operands don't match. */
2926 /* Retroactively mark the operand we had to match
2927 as a loser, if it wasn't already. */
2928 if (this_alternative_win
[c
])
2930 this_alternative_win
[c
] = 0;
2931 if (this_alternative
[c
] == (int) NO_REGS
)
2933 /* But count the pair only once in the total badness of
2934 this alternative, if the pair can be a dummy reload. */
2936 = find_dummy_reload (recog_data
.operand
[i
],
2937 recog_data
.operand
[c
],
2938 recog_data
.operand_loc
[i
],
2939 recog_data
.operand_loc
[c
],
2940 operand_mode
[i
], operand_mode
[c
],
2941 this_alternative
[c
], -1,
2942 this_alternative_earlyclobber
[c
]);
2947 /* This can be fixed with reloads if the operand
2948 we are supposed to match can be fixed with reloads. */
2950 this_alternative
[i
] = this_alternative
[c
];
2952 /* If we have to reload this operand and some previous
2953 operand also had to match the same thing as this
2954 operand, we don't know how to do that. So reject this
2956 if (! win
|| force_reload
)
2957 for (j
= 0; j
< i
; j
++)
2958 if (this_alternative_matches
[j
]
2959 == this_alternative_matches
[i
])
2965 /* All necessary reloads for an address_operand
2966 were handled in find_reloads_address. */
2967 this_alternative
[i
] = (int) BASE_REG_CLASS
;
2974 if (GET_CODE (operand
) == MEM
2975 || (GET_CODE (operand
) == REG
2976 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2977 && reg_renumber
[REGNO (operand
)] < 0))
2979 if (CONSTANT_P (operand
)
2980 /* force_const_mem does not accept HIGH. */
2981 && GET_CODE (operand
) != HIGH
)
2987 if (GET_CODE (operand
) == MEM
2988 && ! address_reloaded
[i
]
2989 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2990 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2995 if (GET_CODE (operand
) == MEM
2996 && ! address_reloaded
[i
]
2997 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2998 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3002 /* Memory operand whose address is not offsettable. */
3006 if (GET_CODE (operand
) == MEM
3007 && ! (ind_levels
? offsettable_memref_p (operand
)
3008 : offsettable_nonstrict_memref_p (operand
))
3009 /* Certain mem addresses will become offsettable
3010 after they themselves are reloaded. This is important;
3011 we don't want our own handling of unoffsettables
3012 to override the handling of reg_equiv_address. */
3013 && !(GET_CODE (XEXP (operand
, 0)) == REG
3015 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3019 /* Memory operand whose address is offsettable. */
3023 if ((GET_CODE (operand
) == MEM
3024 /* If IND_LEVELS, find_reloads_address won't reload a
3025 pseudo that didn't get a hard reg, so we have to
3026 reject that case. */
3027 && ((ind_levels
? offsettable_memref_p (operand
)
3028 : offsettable_nonstrict_memref_p (operand
))
3029 /* A reloaded address is offsettable because it is now
3030 just a simple register indirect. */
3031 || address_reloaded
[i
]))
3032 || (GET_CODE (operand
) == REG
3033 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3034 && reg_renumber
[REGNO (operand
)] < 0
3035 /* If reg_equiv_address is nonzero, we will be
3036 loading it into a register; hence it will be
3037 offsettable, but we cannot say that reg_equiv_mem
3038 is offsettable without checking. */
3039 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3040 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3041 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3043 /* force_const_mem does not accept HIGH. */
3044 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3045 || GET_CODE (operand
) == MEM
)
3052 /* Output operand that is stored before the need for the
3053 input operands (and their index registers) is over. */
3054 earlyclobber
= 1, this_earlyclobber
= 1;
3058 #ifndef REAL_ARITHMETIC
3059 /* Match any floating double constant, but only if
3060 we can examine the bits of it reliably. */
3061 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
3062 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
3063 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
3066 if (GET_CODE (operand
) == CONST_DOUBLE
)
3071 if (GET_CODE (operand
) == CONST_DOUBLE
)
3077 if (GET_CODE (operand
) == CONST_DOUBLE
3078 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
3083 if (GET_CODE (operand
) == CONST_INT
3084 || (GET_CODE (operand
) == CONST_DOUBLE
3085 && GET_MODE (operand
) == VOIDmode
))
3088 if (CONSTANT_P (operand
)
3089 #ifdef LEGITIMATE_PIC_OPERAND_P
3090 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3097 if (GET_CODE (operand
) == CONST_INT
3098 || (GET_CODE (operand
) == CONST_DOUBLE
3099 && GET_MODE (operand
) == VOIDmode
))
3111 if (GET_CODE (operand
) == CONST_INT
3112 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
3122 /* A PLUS is never a valid operand, but reload can make
3123 it from a register when eliminating registers. */
3124 && GET_CODE (operand
) != PLUS
3125 /* A SCRATCH is not a valid operand. */
3126 && GET_CODE (operand
) != SCRATCH
3127 #ifdef LEGITIMATE_PIC_OPERAND_P
3128 && (! CONSTANT_P (operand
)
3130 || LEGITIMATE_PIC_OPERAND_P (operand
))
3132 && (GENERAL_REGS
== ALL_REGS
3133 || GET_CODE (operand
) != REG
3134 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3135 && reg_renumber
[REGNO (operand
)] < 0)))
3137 /* Drop through into 'r' case */
3141 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3145 if (REG_CLASS_FROM_LETTER (c
) == NO_REGS
)
3147 #ifdef EXTRA_CONSTRAINT
3148 if (EXTRA_CONSTRAINT (operand
, c
))
3155 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
3157 if (GET_MODE (operand
) == BLKmode
)
3160 if (GET_CODE (operand
) == REG
3161 && reg_fits_class_p (operand
, this_alternative
[i
],
3162 offset
, GET_MODE (recog_data
.operand
[i
])))
3169 /* If this operand could be handled with a reg,
3170 and some reg is allowed, then this operand can be handled. */
3171 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3174 /* Record which operands fit this alternative. */
3175 this_alternative_earlyclobber
[i
] = earlyclobber
;
3176 if (win
&& ! force_reload
)
3177 this_alternative_win
[i
] = 1;
3180 int const_to_mem
= 0;
3182 this_alternative_offmemok
[i
] = offmemok
;
3186 /* Alternative loses if it has no regs for a reg operand. */
3187 if (GET_CODE (operand
) == REG
3188 && this_alternative
[i
] == (int) NO_REGS
3189 && this_alternative_matches
[i
] < 0)
3192 /* If this is a constant that is reloaded into the desired
3193 class by copying it to memory first, count that as another
3194 reload. This is consistent with other code and is
3195 required to avoid choosing another alternative when
3196 the constant is moved into memory by this function on
3197 an early reload pass. Note that the test here is
3198 precisely the same as in the code below that calls
3200 if (CONSTANT_P (operand
)
3201 /* force_const_mem does not accept HIGH. */
3202 && GET_CODE (operand
) != HIGH
3203 && ((PREFERRED_RELOAD_CLASS (operand
,
3204 (enum reg_class
) this_alternative
[i
])
3206 || no_input_reloads
)
3207 && operand_mode
[i
] != VOIDmode
)
3210 if (this_alternative
[i
] != (int) NO_REGS
)
3214 /* If we can't reload this value at all, reject this
3215 alternative. Note that we could also lose due to
3216 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3219 if (! CONSTANT_P (operand
)
3220 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3221 && (PREFERRED_RELOAD_CLASS (operand
,
3222 (enum reg_class
) this_alternative
[i
])
3226 /* Alternative loses if it requires a type of reload not
3227 permitted for this insn. We can always reload SCRATCH
3228 and objects with a REG_UNUSED note. */
3229 else if (GET_CODE (operand
) != SCRATCH
3230 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3231 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3233 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3237 /* We prefer to reload pseudos over reloading other things,
3238 since such reloads may be able to be eliminated later.
3239 If we are reloading a SCRATCH, we won't be generating any
3240 insns, just using a register, so it is also preferred.
3241 So bump REJECT in other cases. Don't do this in the
3242 case where we are forcing a constant into memory and
3243 it will then win since we don't want to have a different
3244 alternative match then. */
3245 if (! (GET_CODE (operand
) == REG
3246 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3247 && GET_CODE (operand
) != SCRATCH
3248 && ! (const_to_mem
&& constmemok
))
3251 /* Input reloads can be inherited more often than output
3252 reloads can be removed, so penalize output reloads. */
3253 if (operand_type
[i
] != RELOAD_FOR_INPUT
3254 && GET_CODE (operand
) != SCRATCH
)
3258 /* If this operand is a pseudo register that didn't get a hard
3259 reg and this alternative accepts some register, see if the
3260 class that we want is a subset of the preferred class for this
3261 register. If not, but it intersects that class, use the
3262 preferred class instead. If it does not intersect the preferred
3263 class, show that usage of this alternative should be discouraged;
3264 it will be discouraged more still if the register is `preferred
3265 or nothing'. We do this because it increases the chance of
3266 reusing our spill register in a later insn and avoiding a pair
3267 of memory stores and loads.
3269 Don't bother with this if this alternative will accept this
3272 Don't do this for a multiword operand, since it is only a
3273 small win and has the risk of requiring more spill registers,
3274 which could cause a large loss.
3276 Don't do this if the preferred class has only one register
3277 because we might otherwise exhaust the class. */
3279 if (! win
&& this_alternative
[i
] != (int) NO_REGS
3280 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3281 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3283 if (! reg_class_subset_p (this_alternative
[i
],
3284 preferred_class
[i
]))
3286 /* Since we don't have a way of forming the intersection,
3287 we just do something special if the preferred class
3288 is a subset of the class we have; that's the most
3289 common case anyway. */
3290 if (reg_class_subset_p (preferred_class
[i
],
3291 this_alternative
[i
]))
3292 this_alternative
[i
] = (int) preferred_class
[i
];
3294 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3299 /* Now see if any output operands that are marked "earlyclobber"
3300 in this alternative conflict with any input operands
3301 or any memory addresses. */
3303 for (i
= 0; i
< noperands
; i
++)
3304 if (this_alternative_earlyclobber
[i
]
3305 && this_alternative_win
[i
])
3307 struct decomposition early_data
;
3309 early_data
= decompose (recog_data
.operand
[i
]);
3311 if (modified
[i
] == RELOAD_READ
)
3314 if (this_alternative
[i
] == NO_REGS
)
3316 this_alternative_earlyclobber
[i
] = 0;
3317 if (this_insn_is_asm
)
3318 error_for_asm (this_insn
,
3319 "`&' constraint used with no register class");
3324 for (j
= 0; j
< noperands
; j
++)
3325 /* Is this an input operand or a memory ref? */
3326 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3327 || modified
[j
] != RELOAD_WRITE
)
3329 /* Ignore things like match_operator operands. */
3330 && *recog_data
.constraints
[j
] != 0
3331 /* Don't count an input operand that is constrained to match
3332 the early clobber operand. */
3333 && ! (this_alternative_matches
[j
] == i
3334 && rtx_equal_p (recog_data
.operand
[i
],
3335 recog_data
.operand
[j
]))
3336 /* Is it altered by storing the earlyclobber operand? */
3337 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3340 /* If the output is in a single-reg class,
3341 it's costly to reload it, so reload the input instead. */
3342 if (reg_class_size
[this_alternative
[i
]] == 1
3343 && (GET_CODE (recog_data
.operand
[j
]) == REG
3344 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3347 this_alternative_win
[j
] = 0;
3352 /* If an earlyclobber operand conflicts with something,
3353 it must be reloaded, so request this and count the cost. */
3357 this_alternative_win
[i
] = 0;
3358 for (j
= 0; j
< noperands
; j
++)
3359 if (this_alternative_matches
[j
] == i
3360 && this_alternative_win
[j
])
3362 this_alternative_win
[j
] = 0;
3368 /* If one alternative accepts all the operands, no reload required,
3369 choose that alternative; don't consider the remaining ones. */
3372 /* Unswap these so that they are never swapped at `finish'. */
3373 if (commutative
>= 0)
3375 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3376 recog_data
.operand
[commutative
+ 1]
3377 = substed_operand
[commutative
+ 1];
3379 for (i
= 0; i
< noperands
; i
++)
3381 goal_alternative_win
[i
] = 1;
3382 goal_alternative
[i
] = this_alternative
[i
];
3383 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3384 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3385 goal_alternative_earlyclobber
[i
]
3386 = this_alternative_earlyclobber
[i
];
3388 goal_alternative_number
= this_alternative_number
;
3389 goal_alternative_swapped
= swapped
;
3390 goal_earlyclobber
= this_earlyclobber
;
3394 /* REJECT, set by the ! and ? constraint characters and when a register
3395 would be reloaded into a non-preferred class, discourages the use of
3396 this alternative for a reload goal. REJECT is incremented by six
3397 for each ? and two for each non-preferred class. */
3398 losers
= losers
* 6 + reject
;
3400 /* If this alternative can be made to work by reloading,
3401 and it needs less reloading than the others checked so far,
3402 record it as the chosen goal for reloading. */
3403 if (! bad
&& best
> losers
)
3405 for (i
= 0; i
< noperands
; i
++)
3407 goal_alternative
[i
] = this_alternative
[i
];
3408 goal_alternative_win
[i
] = this_alternative_win
[i
];
3409 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3410 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3411 goal_alternative_earlyclobber
[i
]
3412 = this_alternative_earlyclobber
[i
];
3414 goal_alternative_swapped
= swapped
;
3416 goal_alternative_number
= this_alternative_number
;
3417 goal_earlyclobber
= this_earlyclobber
;
3421 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3422 then we need to try each alternative twice,
3423 the second time matching those two operands
3424 as if we had exchanged them.
3425 To do this, really exchange them in operands.
3427 If we have just tried the alternatives the second time,
3428 return operands to normal and drop through. */
3430 if (commutative
>= 0)
3435 register enum reg_class tclass
;
3438 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3439 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3441 tclass
= preferred_class
[commutative
];
3442 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3443 preferred_class
[commutative
+ 1] = tclass
;
3445 t
= pref_or_nothing
[commutative
];
3446 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3447 pref_or_nothing
[commutative
+ 1] = t
;
3449 memcpy (constraints
, recog_data
.constraints
,
3450 noperands
* sizeof (char *));
3455 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3456 recog_data
.operand
[commutative
+ 1]
3457 = substed_operand
[commutative
+ 1];
3461 /* The operands don't meet the constraints.
3462 goal_alternative describes the alternative
3463 that we could reach by reloading the fewest operands.
3464 Reload so as to fit it. */
3466 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3468 /* No alternative works with reloads?? */
3469 if (insn_code_number
>= 0)
3470 fatal_insn ("Unable to generate reloads for:", insn
);
3471 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3472 /* Avoid further trouble with this insn. */
3473 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3478 /* Jump to `finish' from above if all operands are valid already.
3479 In that case, goal_alternative_win is all 1. */
3482 /* Right now, for any pair of operands I and J that are required to match,
3484 goal_alternative_matches[J] is I.
3485 Set up goal_alternative_matched as the inverse function:
3486 goal_alternative_matched[I] = J. */
3488 for (i
= 0; i
< noperands
; i
++)
3489 goal_alternative_matched
[i
] = -1;
3491 for (i
= 0; i
< noperands
; i
++)
3492 if (! goal_alternative_win
[i
]
3493 && goal_alternative_matches
[i
] >= 0)
3494 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3496 /* If the best alternative is with operands 1 and 2 swapped,
3497 consider them swapped before reporting the reloads. Update the
3498 operand numbers of any reloads already pushed. */
3500 if (goal_alternative_swapped
)
3504 tem
= substed_operand
[commutative
];
3505 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3506 substed_operand
[commutative
+ 1] = tem
;
3507 tem
= recog_data
.operand
[commutative
];
3508 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3509 recog_data
.operand
[commutative
+ 1] = tem
;
3510 tem
= *recog_data
.operand_loc
[commutative
];
3511 *recog_data
.operand_loc
[commutative
]
3512 = *recog_data
.operand_loc
[commutative
+ 1];
3513 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3515 for (i
= 0; i
< n_reloads
; i
++)
3517 if (rld
[i
].opnum
== commutative
)
3518 rld
[i
].opnum
= commutative
+ 1;
3519 else if (rld
[i
].opnum
== commutative
+ 1)
3520 rld
[i
].opnum
= commutative
;
3524 for (i
= 0; i
< noperands
; i
++)
3526 operand_reloadnum
[i
] = -1;
3528 /* If this is an earlyclobber operand, we need to widen the scope.
3529 The reload must remain valid from the start of the insn being
3530 reloaded until after the operand is stored into its destination.
3531 We approximate this with RELOAD_OTHER even though we know that we
3532 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3534 One special case that is worth checking is when we have an
3535 output that is earlyclobber but isn't used past the insn (typically
3536 a SCRATCH). In this case, we only need have the reload live
3537 through the insn itself, but not for any of our input or output
3539 But we must not accidentally narrow the scope of an existing
3540 RELOAD_OTHER reload - leave these alone.
3542 In any case, anything needed to address this operand can remain
3543 however they were previously categorized. */
3545 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3547 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3548 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3551 /* Any constants that aren't allowed and can't be reloaded
3552 into registers are here changed into memory references. */
3553 for (i
= 0; i
< noperands
; i
++)
3554 if (! goal_alternative_win
[i
]
3555 && CONSTANT_P (recog_data
.operand
[i
])
3556 /* force_const_mem does not accept HIGH. */
3557 && GET_CODE (recog_data
.operand
[i
]) != HIGH
3558 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3559 (enum reg_class
) goal_alternative
[i
])
3561 || no_input_reloads
)
3562 && operand_mode
[i
] != VOIDmode
)
3564 substed_operand
[i
] = recog_data
.operand
[i
]
3565 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3566 recog_data
.operand
[i
]),
3567 i
, address_type
[i
], ind_levels
, 0, insn
,
3569 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3570 goal_alternative_number
))
3571 goal_alternative_win
[i
] = 1;
3574 /* Record the values of the earlyclobber operands for the caller. */
3575 if (goal_earlyclobber
)
3576 for (i
= 0; i
< noperands
; i
++)
3577 if (goal_alternative_earlyclobber
[i
])
3578 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3580 /* Now record reloads for all the operands that need them. */
3581 for (i
= 0; i
< noperands
; i
++)
3582 if (! goal_alternative_win
[i
])
3584 /* Operands that match previous ones have already been handled. */
3585 if (goal_alternative_matches
[i
] >= 0)
3587 /* Handle an operand with a nonoffsettable address
3588 appearing where an offsettable address will do
3589 by reloading the address into a base register.
3591 ??? We can also do this when the operand is a register and
3592 reg_equiv_mem is not offsettable, but this is a bit tricky,
3593 so we don't bother with it. It may not be worth doing. */
3594 else if (goal_alternative_matched
[i
] == -1
3595 && goal_alternative_offmemok
[i
]
3596 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3598 operand_reloadnum
[i
]
3599 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3600 &XEXP (recog_data
.operand
[i
], 0), NULL_PTR
,
3602 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3603 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3604 rld
[operand_reloadnum
[i
]].inc
3605 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3607 /* If this operand is an output, we will have made any
3608 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3609 now we are treating part of the operand as an input, so
3610 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3612 if (modified
[i
] == RELOAD_WRITE
)
3614 for (j
= 0; j
< n_reloads
; j
++)
3616 if (rld
[j
].opnum
== i
)
3618 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3619 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3620 else if (rld
[j
].when_needed
3621 == RELOAD_FOR_OUTADDR_ADDRESS
)
3622 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3627 else if (goal_alternative_matched
[i
] == -1)
3629 operand_reloadnum
[i
]
3630 = push_reload ((modified
[i
] != RELOAD_WRITE
3631 ? recog_data
.operand
[i
] : 0),
3632 (modified
[i
] != RELOAD_READ
3633 ? recog_data
.operand
[i
] : 0),
3634 (modified
[i
] != RELOAD_WRITE
3635 ? recog_data
.operand_loc
[i
] : 0),
3636 (modified
[i
] != RELOAD_READ
3637 ? recog_data
.operand_loc
[i
] : 0),
3638 (enum reg_class
) goal_alternative
[i
],
3639 (modified
[i
] == RELOAD_WRITE
3640 ? VOIDmode
: operand_mode
[i
]),
3641 (modified
[i
] == RELOAD_READ
3642 ? VOIDmode
: operand_mode
[i
]),
3643 (insn_code_number
< 0 ? 0
3644 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3645 0, i
, operand_type
[i
]);
3647 /* In a matching pair of operands, one must be input only
3648 and the other must be output only.
3649 Pass the input operand as IN and the other as OUT. */
3650 else if (modified
[i
] == RELOAD_READ
3651 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3653 operand_reloadnum
[i
]
3654 = push_reload (recog_data
.operand
[i
],
3655 recog_data
.operand
[goal_alternative_matched
[i
]],
3656 recog_data
.operand_loc
[i
],
3657 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3658 (enum reg_class
) goal_alternative
[i
],
3660 operand_mode
[goal_alternative_matched
[i
]],
3661 0, 0, i
, RELOAD_OTHER
);
3662 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3664 else if (modified
[i
] == RELOAD_WRITE
3665 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3667 operand_reloadnum
[goal_alternative_matched
[i
]]
3668 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3669 recog_data
.operand
[i
],
3670 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3671 recog_data
.operand_loc
[i
],
3672 (enum reg_class
) goal_alternative
[i
],
3673 operand_mode
[goal_alternative_matched
[i
]],
3675 0, 0, i
, RELOAD_OTHER
);
3676 operand_reloadnum
[i
] = output_reloadnum
;
3678 else if (insn_code_number
>= 0)
3682 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3683 /* Avoid further trouble with this insn. */
3684 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3689 else if (goal_alternative_matched
[i
] < 0
3690 && goal_alternative_matches
[i
] < 0
3693 /* For each non-matching operand that's a MEM or a pseudo-register
3694 that didn't get a hard register, make an optional reload.
3695 This may get done even if the insn needs no reloads otherwise. */
3697 rtx operand
= recog_data
.operand
[i
];
3699 while (GET_CODE (operand
) == SUBREG
)
3700 operand
= XEXP (operand
, 0);
3701 if ((GET_CODE (operand
) == MEM
3702 || (GET_CODE (operand
) == REG
3703 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3704 /* If this is only for an output, the optional reload would not
3705 actually cause us to use a register now, just note that
3706 something is stored here. */
3707 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3708 || modified
[i
] == RELOAD_WRITE
)
3709 && ! no_input_reloads
3710 /* An optional output reload might allow to delete INSN later.
3711 We mustn't make in-out reloads on insns that are not permitted
3713 If this is an asm, we can't delete it; we must not even call
3714 push_reload for an optional output reload in this case,
3715 because we can't be sure that the constraint allows a register,
3716 and push_reload verifies the constraints for asms. */
3717 && (modified
[i
] == RELOAD_READ
3718 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3719 operand_reloadnum
[i
]
3720 = push_reload ((modified
[i
] != RELOAD_WRITE
3721 ? recog_data
.operand
[i
] : 0),
3722 (modified
[i
] != RELOAD_READ
3723 ? recog_data
.operand
[i
] : 0),
3724 (modified
[i
] != RELOAD_WRITE
3725 ? recog_data
.operand_loc
[i
] : 0),
3726 (modified
[i
] != RELOAD_READ
3727 ? recog_data
.operand_loc
[i
] : 0),
3728 (enum reg_class
) goal_alternative
[i
],
3729 (modified
[i
] == RELOAD_WRITE
3730 ? VOIDmode
: operand_mode
[i
]),
3731 (modified
[i
] == RELOAD_READ
3732 ? VOIDmode
: operand_mode
[i
]),
3733 (insn_code_number
< 0 ? 0
3734 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3735 1, i
, operand_type
[i
]);
3736 /* If a memory reference remains (either as a MEM or a pseudo that
3737 did not get a hard register), yet we can't make an optional
3738 reload, check if this is actually a pseudo register reference;
3739 we then need to emit a USE and/or a CLOBBER so that reload
3740 inheritance will do the right thing. */
3742 && (GET_CODE (operand
) == MEM
3743 || (GET_CODE (operand
) == REG
3744 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3745 && reg_renumber
[REGNO (operand
)] < 0)))
3747 operand
= *recog_data
.operand_loc
[i
];
3749 while (GET_CODE (operand
) == SUBREG
)
3750 operand
= XEXP (operand
, 0);
3751 if (GET_CODE (operand
) == REG
)
3753 if (modified
[i
] != RELOAD_WRITE
)
3754 emit_insn_before (gen_rtx_USE (VOIDmode
, operand
), insn
);
3755 if (modified
[i
] != RELOAD_READ
)
3756 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3760 else if (goal_alternative_matches
[i
] >= 0
3761 && goal_alternative_win
[goal_alternative_matches
[i
]]
3762 && modified
[i
] == RELOAD_READ
3763 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3764 && ! no_input_reloads
&& ! no_output_reloads
3767 /* Similarly, make an optional reload for a pair of matching
3768 objects that are in MEM or a pseudo that didn't get a hard reg. */
3770 rtx operand
= recog_data
.operand
[i
];
3772 while (GET_CODE (operand
) == SUBREG
)
3773 operand
= XEXP (operand
, 0);
3774 if ((GET_CODE (operand
) == MEM
3775 || (GET_CODE (operand
) == REG
3776 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3777 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3779 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3780 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
3781 recog_data
.operand
[i
],
3782 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
3783 recog_data
.operand_loc
[i
],
3784 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3785 operand_mode
[goal_alternative_matches
[i
]],
3787 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3790 /* Perform whatever substitutions on the operands we are supposed
3791 to make due to commutativity or replacement of registers
3792 with equivalent constants or memory slots. */
3794 for (i
= 0; i
< noperands
; i
++)
3796 /* We only do this on the last pass through reload, because it is
3797 possible for some data (like reg_equiv_address) to be changed during
3798 later passes. Moreover, we loose the opportunity to get a useful
3799 reload_{in,out}_reg when we do these replacements. */
3803 rtx substitution
= substed_operand
[i
];
3805 *recog_data
.operand_loc
[i
] = substitution
;
3807 /* If we're replacing an operand with a LABEL_REF, we need
3808 to make sure that there's a REG_LABEL note attached to
3809 this instruction. */
3810 if (GET_CODE (insn
) != JUMP_INSN
3811 && GET_CODE (substitution
) == LABEL_REF
3812 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
3813 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
,
3814 XEXP (substitution
, 0),
3818 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
3821 /* If this insn pattern contains any MATCH_DUP's, make sure that
3822 they will be substituted if the operands they match are substituted.
3823 Also do now any substitutions we already did on the operands.
3825 Don't do this if we aren't making replacements because we might be
3826 propagating things allocated by frame pointer elimination into places
3827 it doesn't expect. */
3829 if (insn_code_number
>= 0 && replace
)
3830 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
3832 int opno
= recog_data
.dup_num
[i
];
3833 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
3834 if (operand_reloadnum
[opno
] >= 0)
3835 push_replacement (recog_data
.dup_loc
[i
], operand_reloadnum
[opno
],
3836 insn_data
[insn_code_number
].operand
[opno
].mode
);
3840 /* This loses because reloading of prior insns can invalidate the equivalence
3841 (or at least find_equiv_reg isn't smart enough to find it any more),
3842 causing this insn to need more reload regs than it needed before.
3843 It may be too late to make the reload regs available.
3844 Now this optimization is done safely in choose_reload_regs. */
3846 /* For each reload of a reg into some other class of reg,
3847 search for an existing equivalent reg (same value now) in the right class.
3848 We can use it as long as we don't need to change its contents. */
3849 for (i
= 0; i
< n_reloads
; i
++)
3850 if (rld
[i
].reg_rtx
== 0
3852 && GET_CODE (rld
[i
].in
) == REG
3856 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
3857 static_reload_reg_p
, 0, rld
[i
].inmode
);
3858 /* Prevent generation of insn to load the value
3859 because the one we found already has the value. */
3861 rld
[i
].in
= rld
[i
].reg_rtx
;
3865 /* Perhaps an output reload can be combined with another
3866 to reduce needs by one. */
3867 if (!goal_earlyclobber
)
3870 /* If we have a pair of reloads for parts of an address, they are reloading
3871 the same object, the operands themselves were not reloaded, and they
3872 are for two operands that are supposed to match, merge the reloads and
3873 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3875 for (i
= 0; i
< n_reloads
; i
++)
3879 for (j
= i
+ 1; j
< n_reloads
; j
++)
3880 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3881 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3882 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3883 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3884 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3885 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3886 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3887 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3888 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
3889 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3890 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
3891 && (operand_reloadnum
[rld
[j
].opnum
] < 0
3892 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
3893 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
3894 || (goal_alternative_matches
[rld
[j
].opnum
]
3897 for (k
= 0; k
< n_replacements
; k
++)
3898 if (replacements
[k
].what
== j
)
3899 replacements
[k
].what
= i
;
3901 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3902 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3903 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3905 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3910 /* Scan all the reloads and update their type.
3911 If a reload is for the address of an operand and we didn't reload
3912 that operand, change the type. Similarly, change the operand number
3913 of a reload when two operands match. If a reload is optional, treat it
3914 as though the operand isn't reloaded.
3916 ??? This latter case is somewhat odd because if we do the optional
3917 reload, it means the object is hanging around. Thus we need only
3918 do the address reload if the optional reload was NOT done.
3920 Change secondary reloads to be the address type of their operand, not
3923 If an operand's reload is now RELOAD_OTHER, change any
3924 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3925 RELOAD_FOR_OTHER_ADDRESS. */
3927 for (i
= 0; i
< n_reloads
; i
++)
3929 if (rld
[i
].secondary_p
3930 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
3931 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
3933 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3934 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3935 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3936 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3937 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3938 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
3940 /* If we have a secondary reload to go along with this reload,
3941 change its type to RELOAD_FOR_OPADDR_ADDR. */
3943 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3944 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
3945 && rld
[i
].secondary_in_reload
!= -1)
3947 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
3949 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3951 /* If there's a tertiary reload we have to change it also. */
3952 if (secondary_in_reload
> 0
3953 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
3954 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
3955 = RELOAD_FOR_OPADDR_ADDR
;
3958 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3959 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3960 && rld
[i
].secondary_out_reload
!= -1)
3962 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
3964 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3966 /* If there's a tertiary reload we have to change it also. */
3967 if (secondary_out_reload
3968 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
3969 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
3970 = RELOAD_FOR_OPADDR_ADDR
;
3973 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3974 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3975 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3977 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3980 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3981 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
3982 && operand_reloadnum
[rld
[i
].opnum
] >= 0
3983 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
3985 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
3987 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
3988 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
3991 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
3992 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
3993 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
3995 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
3996 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
3997 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
3998 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
3999 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4000 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4001 This is complicated by the fact that a single operand can have more
4002 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4003 choose_reload_regs without affecting code quality, and cases that
4004 actually fail are extremely rare, so it turns out to be better to fix
4005 the problem here by not generating cases that choose_reload_regs will
4007 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4008 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4010 We can reduce the register pressure by exploiting that a
4011 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4012 does not conflict with any of them, if it is only used for the first of
4013 the RELOAD_FOR_X_ADDRESS reloads. */
4015 int first_op_addr_num
= -2;
4016 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4017 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4018 int need_change
= 0;
4019 /* We use last_op_addr_reload and the contents of the above arrays
4020 first as flags - -2 means no instance encountered, -1 means exactly
4021 one instance encountered.
4022 If more than one instance has been encountered, we store the reload
4023 number of the first reload of the kind in question; reload numbers
4024 are known to be non-negative. */
4025 for (i
= 0; i
< noperands
; i
++)
4026 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4027 for (i
= n_reloads
- 1; i
>= 0; i
--)
4029 switch (rld
[i
].when_needed
)
4031 case RELOAD_FOR_OPERAND_ADDRESS
:
4032 if (++first_op_addr_num
>= 0)
4034 first_op_addr_num
= i
;
4038 case RELOAD_FOR_INPUT_ADDRESS
:
4039 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4041 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4045 case RELOAD_FOR_OUTPUT_ADDRESS
:
4046 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4048 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4059 for (i
= 0; i
< n_reloads
; i
++)
4062 enum reload_type type
;
4064 switch (rld
[i
].when_needed
)
4066 case RELOAD_FOR_OPADDR_ADDR
:
4067 first_num
= first_op_addr_num
;
4068 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4070 case RELOAD_FOR_INPADDR_ADDRESS
:
4071 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4072 type
= RELOAD_FOR_INPUT_ADDRESS
;
4074 case RELOAD_FOR_OUTADDR_ADDRESS
:
4075 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4076 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4083 else if (i
> first_num
)
4084 rld
[i
].when_needed
= type
;
4087 /* Check if the only TYPE reload that uses reload I is
4088 reload FIRST_NUM. */
4089 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4091 if (rld
[j
].when_needed
== type
4092 && (rld
[i
].secondary_p
4093 ? rld
[j
].secondary_in_reload
== i
4094 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4096 rld
[i
].when_needed
= type
;
4105 /* See if we have any reloads that are now allowed to be merged
4106 because we've changed when the reload is needed to
4107 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4108 check for the most common cases. */
4110 for (i
= 0; i
< n_reloads
; i
++)
4111 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4112 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4113 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4114 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4115 for (j
= 0; j
< n_reloads
; j
++)
4116 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4117 && rld
[j
].when_needed
== rld
[i
].when_needed
4118 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4119 && rld
[i
].class == rld
[j
].class
4120 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4121 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4123 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4124 transfer_replacements (i
, j
);
4129 /* If we made any reloads for addresses, see if they violate a
4130 "no input reloads" requirement for this insn. But loads that we
4131 do after the insn (such as for output addresses) are fine. */
4132 if (no_input_reloads
)
4133 for (i
= 0; i
< n_reloads
; i
++)
4135 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
4136 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
)
4140 /* Compute reload_mode and reload_nregs. */
4141 for (i
= 0; i
< n_reloads
; i
++)
4144 = (rld
[i
].inmode
== VOIDmode
4145 || (GET_MODE_SIZE (rld
[i
].outmode
)
4146 > GET_MODE_SIZE (rld
[i
].inmode
)))
4147 ? rld
[i
].outmode
: rld
[i
].inmode
;
4149 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4155 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4156 accepts a memory operand with constant address. */
4159 alternative_allows_memconst (constraint
, altnum
)
4160 const char *constraint
;
4164 /* Skip alternatives before the one requested. */
4167 while (*constraint
++ != ',');
4170 /* Scan the requested alternative for 'm' or 'o'.
4171 If one of them is present, this alternative accepts memory constants. */
4172 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
4173 if (c
== 'm' || c
== 'o')
4178 /* Scan X for memory references and scan the addresses for reloading.
4179 Also checks for references to "constant" regs that we want to eliminate
4180 and replaces them with the values they stand for.
4181 We may alter X destructively if it contains a reference to such.
4182 If X is just a constant reg, we return the equivalent value
4185 IND_LEVELS says how many levels of indirect addressing this machine
4188 OPNUM and TYPE identify the purpose of the reload.
4190 IS_SET_DEST is true if X is the destination of a SET, which is not
4191 appropriate to be replaced by a constant.
4193 INSN, if nonzero, is the insn in which we do the reload. It is used
4194 to determine if we may generate output reloads, and where to put USEs
4195 for pseudos that we have to replace with stack slots.
4197 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4198 result of find_reloads_address. */
4201 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
, insn
,
4205 enum reload_type type
;
4209 int *address_reloaded
;
4211 register RTX_CODE code
= GET_CODE (x
);
4213 register const char *fmt
= GET_RTX_FORMAT (code
);
4219 /* This code is duplicated for speed in find_reloads. */
4220 register int regno
= REGNO (x
);
4221 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4222 x
= reg_equiv_constant
[regno
];
4224 /* This creates (subreg (mem...)) which would cause an unnecessary
4225 reload of the mem. */
4226 else if (reg_equiv_mem
[regno
] != 0)
4227 x
= reg_equiv_mem
[regno
];
4229 else if (reg_equiv_memory_loc
[regno
]
4230 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4232 rtx mem
= make_memloc (x
, regno
);
4233 if (reg_equiv_address
[regno
]
4234 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4236 /* If this is not a toplevel operand, find_reloads doesn't see
4237 this substitution. We have to emit a USE of the pseudo so
4238 that delete_output_reload can see it. */
4239 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4240 emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
);
4242 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4243 opnum
, type
, ind_levels
, insn
);
4244 if (address_reloaded
)
4245 *address_reloaded
= i
;
4254 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4255 opnum
, type
, ind_levels
, insn
);
4256 if (address_reloaded
)
4257 *address_reloaded
= i
;
4262 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4264 /* Check for SUBREG containing a REG that's equivalent to a constant.
4265 If the constant has a known value, truncate it right now.
4266 Similarly if we are extracting a single-word of a multi-word
4267 constant. If the constant is symbolic, allow it to be substituted
4268 normally. push_reload will strip the subreg later. If the
4269 constant is VOIDmode, abort because we will lose the mode of
4270 the register (this should never happen because one of the cases
4271 above should handle it). */
4273 register int regno
= REGNO (SUBREG_REG (x
));
4276 if (subreg_lowpart_p (x
)
4277 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4278 && reg_equiv_constant
[regno
] != 0
4279 && (tem
= gen_lowpart_common (GET_MODE (x
),
4280 reg_equiv_constant
[regno
])) != 0)
4283 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
4284 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4285 && reg_equiv_constant
[regno
] != 0
4286 && (tem
= operand_subword (reg_equiv_constant
[regno
],
4288 GET_MODE (SUBREG_REG (x
)))) != 0)
4290 /* TEM is now a word sized constant for the bits from X that
4291 we wanted. However, TEM may be the wrong representation.
4293 Use gen_lowpart_common to convert a CONST_INT into a
4294 CONST_DOUBLE and vice versa as needed according to by the mode
4296 tem
= gen_lowpart_common (GET_MODE (x
), tem
);
4302 /* If the SUBREG is wider than a word, the above test will fail.
4303 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4304 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4305 a 32 bit target. We still can - and have to - handle this
4306 for non-paradoxical subregs of CONST_INTs. */
4307 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4308 && reg_equiv_constant
[regno
] != 0
4309 && GET_CODE (reg_equiv_constant
[regno
]) == CONST_INT
4310 && (GET_MODE_SIZE (GET_MODE (x
))
4311 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
4313 int shift
= SUBREG_WORD (x
) * BITS_PER_WORD
;
4314 if (WORDS_BIG_ENDIAN
)
4315 shift
= (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4316 - GET_MODE_BITSIZE (GET_MODE (x
))
4318 /* Here we use the knowledge that CONST_INTs have a
4319 HOST_WIDE_INT field. */
4320 if (shift
>= HOST_BITS_PER_WIDE_INT
)
4321 shift
= HOST_BITS_PER_WIDE_INT
- 1;
4322 return GEN_INT (INTVAL (reg_equiv_constant
[regno
]) >> shift
);
4325 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4326 && reg_equiv_constant
[regno
] != 0
4327 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
4330 /* If the subreg contains a reg that will be converted to a mem,
4331 convert the subreg to a narrower memref now.
4332 Otherwise, we would get (subreg (mem ...) ...),
4333 which would force reload of the mem.
4335 We also need to do this if there is an equivalent MEM that is
4336 not offsettable. In that case, alter_subreg would produce an
4337 invalid address on big-endian machines.
4339 For machines that extend byte loads, we must not reload using
4340 a wider mode if we have a paradoxical SUBREG. find_reloads will
4341 force a reload in that case. So we should not do anything here. */
4343 else if (regno
>= FIRST_PSEUDO_REGISTER
4344 #ifdef LOAD_EXTEND_OP
4345 && (GET_MODE_SIZE (GET_MODE (x
))
4346 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4348 && (reg_equiv_address
[regno
] != 0
4349 || (reg_equiv_mem
[regno
] != 0
4350 && (! strict_memory_address_p (GET_MODE (x
),
4351 XEXP (reg_equiv_mem
[regno
], 0))
4352 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4353 || num_not_at_initial_offset
))))
4354 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4357 else if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == MEM
4358 && (GET_MODE_SIZE (GET_MODE (x
))
4359 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4360 && mode_dependent_address_p (XEXP (SUBREG_REG (x
), 0)))
4362 /* A paradoxical subreg will simply have the mode of the access
4363 changed, so we need to reload such a memory operand to stabilize
4364 the meaning of the memory access. */
4365 enum machine_mode subreg_mode
= GET_MODE (SUBREG_REG (x
));
4368 push_reload (NULL_RTX
, SUBREG_REG (x
), NULL_PTR
, &SUBREG_REG (x
),
4369 find_valid_class (subreg_mode
, SUBREG_WORD (x
)),
4370 VOIDmode
, subreg_mode
, 0, 0, opnum
, type
);
4372 push_reload (SUBREG_REG (x
), NULL_RTX
, &SUBREG_REG (x
), NULL_PTR
,
4373 find_valid_class (subreg_mode
, SUBREG_WORD (x
)),
4374 subreg_mode
, VOIDmode
, 0, 0, opnum
, type
);
4377 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4381 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4382 ind_levels
, is_set_dest
, insn
,
4384 /* If we have replaced a reg with it's equivalent memory loc -
4385 that can still be handled here e.g. if it's in a paradoxical
4386 subreg - we must make the change in a copy, rather than using
4387 a destructive change. This way, find_reloads can still elect
4388 not to do the change. */
4389 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4391 x
= shallow_copy_rtx (x
);
4394 XEXP (x
, i
) = new_part
;
4400 /* Return a mem ref for the memory equivalent of reg REGNO.
4401 This mem ref is not shared with anything. */
4404 make_memloc (ad
, regno
)
4408 /* We must rerun eliminate_regs, in case the elimination
4409 offsets have changed. */
4411 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4413 /* If TEM might contain a pseudo, we must copy it to avoid
4414 modifying it when we do the substitution for the reload. */
4415 if (rtx_varies_p (tem
))
4416 tem
= copy_rtx (tem
);
4418 tem
= gen_rtx_MEM (GET_MODE (ad
), tem
);
4419 MEM_COPY_ATTRIBUTES (tem
, reg_equiv_memory_loc
[regno
]);
4423 /* Record all reloads needed for handling memory address AD
4424 which appears in *LOC in a memory reference to mode MODE
4425 which itself is found in location *MEMREFLOC.
4426 Note that we take shortcuts assuming that no multi-reg machine mode
4427 occurs as part of an address.
4429 OPNUM and TYPE specify the purpose of this reload.
4431 IND_LEVELS says how many levels of indirect addressing this machine
4434 INSN, if nonzero, is the insn in which we do the reload. It is used
4435 to determine if we may generate output reloads, and where to put USEs
4436 for pseudos that we have to replace with stack slots.
4438 Value is nonzero if this address is reloaded or replaced as a whole.
4439 This is interesting to the caller if the address is an autoincrement.
4441 Note that there is no verification that the address will be valid after
4442 this routine does its work. Instead, we rely on the fact that the address
4443 was valid when reload started. So we need only undo things that reload
4444 could have broken. These are wrong register types, pseudos not allocated
4445 to a hard register, and frame pointer elimination. */
4448 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4449 enum machine_mode mode
;
4454 enum reload_type type
;
4459 int removed_and
= 0;
4462 /* If the address is a register, see if it is a legitimate address and
4463 reload if not. We first handle the cases where we need not reload
4464 or where we must reload in a non-standard way. */
4466 if (GET_CODE (ad
) == REG
)
4470 if (reg_equiv_constant
[regno
] != 0
4471 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
4473 *loc
= ad
= reg_equiv_constant
[regno
];
4477 tem
= reg_equiv_memory_loc
[regno
];
4480 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4482 tem
= make_memloc (ad
, regno
);
4483 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4485 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
4486 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
4489 /* We can avoid a reload if the register's equivalent memory
4490 expression is valid as an indirect memory address.
4491 But not all addresses are valid in a mem used as an indirect
4492 address: only reg or reg+constant. */
4495 && strict_memory_address_p (mode
, tem
)
4496 && (GET_CODE (XEXP (tem
, 0)) == REG
4497 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4498 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4499 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4501 /* TEM is not the same as what we'll be replacing the
4502 pseudo with after reload, put a USE in front of INSN
4503 in the final reload pass. */
4505 && num_not_at_initial_offset
4506 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4509 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4510 /* This doesn't really count as replacing the address
4511 as a whole, since it is still a memory access. */
4519 /* The only remaining case where we can avoid a reload is if this is a
4520 hard register that is valid as a base register and which is not the
4521 subject of a CLOBBER in this insn. */
4523 else if (regno
< FIRST_PSEUDO_REGISTER
4524 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4525 && ! regno_clobbered_p (regno
, this_insn
, mode
))
4528 /* If we do not have one of the cases above, we must do the reload. */
4529 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4530 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4534 if (strict_memory_address_p (mode
, ad
))
4536 /* The address appears valid, so reloads are not needed.
4537 But the address may contain an eliminable register.
4538 This can happen because a machine with indirect addressing
4539 may consider a pseudo register by itself a valid address even when
4540 it has failed to get a hard reg.
4541 So do a tree-walk to find and eliminate all such regs. */
4543 /* But first quickly dispose of a common case. */
4544 if (GET_CODE (ad
) == PLUS
4545 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4546 && GET_CODE (XEXP (ad
, 0)) == REG
4547 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4550 subst_reg_equivs_changed
= 0;
4551 *loc
= subst_reg_equivs (ad
, insn
);
4553 if (! subst_reg_equivs_changed
)
4556 /* Check result for validity after substitution. */
4557 if (strict_memory_address_p (mode
, ad
))
4561 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4566 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4571 *memrefloc
= copy_rtx (*memrefloc
);
4572 XEXP (*memrefloc
, 0) = ad
;
4573 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4579 /* The address is not valid. We have to figure out why. First see if
4580 we have an outer AND and remove it if so. Then analyze what's inside. */
4582 if (GET_CODE (ad
) == AND
)
4585 loc
= &XEXP (ad
, 0);
4589 /* One possibility for why the address is invalid is that it is itself
4590 a MEM. This can happen when the frame pointer is being eliminated, a
4591 pseudo is not allocated to a hard register, and the offset between the
4592 frame and stack pointers is not its initial value. In that case the
4593 pseudo will have been replaced by a MEM referring to the
4595 if (GET_CODE (ad
) == MEM
)
4597 /* First ensure that the address in this MEM is valid. Then, unless
4598 indirect addresses are valid, reload the MEM into a register. */
4600 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4601 opnum
, ADDR_TYPE (type
),
4602 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4604 /* If tem was changed, then we must create a new memory reference to
4605 hold it and store it back into memrefloc. */
4606 if (tem
!= ad
&& memrefloc
)
4608 *memrefloc
= copy_rtx (*memrefloc
);
4609 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4610 loc
= &XEXP (*memrefloc
, 0);
4612 loc
= &XEXP (*loc
, 0);
4615 /* Check similar cases as for indirect addresses as above except
4616 that we can allow pseudos and a MEM since they should have been
4617 taken care of above. */
4620 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4621 || GET_CODE (XEXP (tem
, 0)) == MEM
4622 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4623 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4624 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4625 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4627 /* Must use TEM here, not AD, since it is the one that will
4628 have any subexpressions reloaded, if needed. */
4629 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4630 BASE_REG_CLASS
, GET_MODE (tem
),
4633 return ! removed_and
;
4639 /* If we have address of a stack slot but it's not valid because the
4640 displacement is too large, compute the sum in a register.
4641 Handle all base registers here, not just fp/ap/sp, because on some
4642 targets (namely SH) we can also get too large displacements from
4643 big-endian corrections. */
4644 else if (GET_CODE (ad
) == PLUS
4645 && GET_CODE (XEXP (ad
, 0)) == REG
4646 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4647 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4648 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4650 /* Unshare the MEM rtx so we can safely alter it. */
4653 *memrefloc
= copy_rtx (*memrefloc
);
4654 loc
= &XEXP (*memrefloc
, 0);
4656 loc
= &XEXP (*loc
, 0);
4659 if (double_reg_address_ok
)
4661 /* Unshare the sum as well. */
4662 *loc
= ad
= copy_rtx (ad
);
4664 /* Reload the displacement into an index reg.
4665 We assume the frame pointer or arg pointer is a base reg. */
4666 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4667 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4673 /* If the sum of two regs is not necessarily valid,
4674 reload the sum into a base reg.
4675 That will at least work. */
4676 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
,
4677 Pmode
, opnum
, type
, ind_levels
);
4679 return ! removed_and
;
4682 /* If we have an indexed stack slot, there are three possible reasons why
4683 it might be invalid: The index might need to be reloaded, the address
4684 might have been made by frame pointer elimination and hence have a
4685 constant out of range, or both reasons might apply.
4687 We can easily check for an index needing reload, but even if that is the
4688 case, we might also have an invalid constant. To avoid making the
4689 conservative assumption and requiring two reloads, we see if this address
4690 is valid when not interpreted strictly. If it is, the only problem is
4691 that the index needs a reload and find_reloads_address_1 will take care
4694 If we decide to do something here, it must be that
4695 `double_reg_address_ok' is true and that this address rtl was made by
4696 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4697 rework the sum so that the reload register will be added to the index.
4698 This is safe because we know the address isn't shared.
4700 We check for fp/ap/sp as both the first and second operand of the
4703 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4704 && GET_CODE (XEXP (ad
, 0)) == PLUS
4705 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4706 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4707 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4709 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4710 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4712 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4713 && ! memory_address_p (mode
, ad
))
4715 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4716 plus_constant (XEXP (XEXP (ad
, 0), 0),
4717 INTVAL (XEXP (ad
, 1))),
4718 XEXP (XEXP (ad
, 0), 1));
4719 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4720 GET_MODE (ad
), opnum
, type
, ind_levels
);
4721 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4727 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4728 && GET_CODE (XEXP (ad
, 0)) == PLUS
4729 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4730 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4731 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4733 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4734 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4736 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4737 && ! memory_address_p (mode
, ad
))
4739 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4740 XEXP (XEXP (ad
, 0), 0),
4741 plus_constant (XEXP (XEXP (ad
, 0), 1),
4742 INTVAL (XEXP (ad
, 1))));
4743 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1), BASE_REG_CLASS
,
4744 GET_MODE (ad
), opnum
, type
, ind_levels
);
4745 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4751 /* See if address becomes valid when an eliminable register
4752 in a sum is replaced. */
4755 if (GET_CODE (ad
) == PLUS
)
4756 tem
= subst_indexed_address (ad
);
4757 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4759 /* Ok, we win that way. Replace any additional eliminable
4762 subst_reg_equivs_changed
= 0;
4763 tem
= subst_reg_equivs (tem
, insn
);
4765 /* Make sure that didn't make the address invalid again. */
4767 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4774 /* If constants aren't valid addresses, reload the constant address
4776 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4778 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4779 Unshare it so we can safely alter it. */
4780 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4781 && CONSTANT_POOL_ADDRESS_P (ad
))
4783 *memrefloc
= copy_rtx (*memrefloc
);
4784 loc
= &XEXP (*memrefloc
, 0);
4786 loc
= &XEXP (*loc
, 0);
4789 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4791 return ! removed_and
;
4794 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
4798 /* Find all pseudo regs appearing in AD
4799 that are eliminable in favor of equivalent values
4800 and do not have hard regs; replace them by their equivalents.
4801 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4802 front of it for pseudos that we have to replace with stack slots. */
4805 subst_reg_equivs (ad
, insn
)
4809 register RTX_CODE code
= GET_CODE (ad
);
4811 register const char *fmt
;
4827 register int regno
= REGNO (ad
);
4829 if (reg_equiv_constant
[regno
] != 0)
4831 subst_reg_equivs_changed
= 1;
4832 return reg_equiv_constant
[regno
];
4834 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
4836 rtx mem
= make_memloc (ad
, regno
);
4837 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4839 subst_reg_equivs_changed
= 1;
4840 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4848 /* Quickly dispose of a common case. */
4849 if (XEXP (ad
, 0) == frame_pointer_rtx
4850 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4858 fmt
= GET_RTX_FORMAT (code
);
4859 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4861 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
4865 /* Compute the sum of X and Y, making canonicalizations assumed in an
4866 address, namely: sum constant integers, surround the sum of two
4867 constants with a CONST, put the constant as the second operand, and
4868 group the constant on the outermost sum.
4870 This routine assumes both inputs are already in canonical form. */
4877 enum machine_mode mode
= GET_MODE (x
);
4879 if (mode
== VOIDmode
)
4880 mode
= GET_MODE (y
);
4882 if (mode
== VOIDmode
)
4885 if (GET_CODE (x
) == CONST_INT
)
4886 return plus_constant (y
, INTVAL (x
));
4887 else if (GET_CODE (y
) == CONST_INT
)
4888 return plus_constant (x
, INTVAL (y
));
4889 else if (CONSTANT_P (x
))
4890 tem
= x
, x
= y
, y
= tem
;
4892 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4893 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4895 /* Note that if the operands of Y are specified in the opposite
4896 order in the recursive calls below, infinite recursion will occur. */
4897 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4898 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4900 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4901 constant will have been placed second. */
4902 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4904 if (GET_CODE (x
) == CONST
)
4906 if (GET_CODE (y
) == CONST
)
4909 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
4912 return gen_rtx_PLUS (mode
, x
, y
);
4915 /* If ADDR is a sum containing a pseudo register that should be
4916 replaced with a constant (from reg_equiv_constant),
4917 return the result of doing so, and also apply the associative
4918 law so that the result is more likely to be a valid address.
4919 (But it is not guaranteed to be one.)
4921 Note that at most one register is replaced, even if more are
4922 replaceable. Also, we try to put the result into a canonical form
4923 so it is more likely to be a valid address.
4925 In all other cases, return ADDR. */
4928 subst_indexed_address (addr
)
4931 rtx op0
= 0, op1
= 0, op2
= 0;
4935 if (GET_CODE (addr
) == PLUS
)
4937 /* Try to find a register to replace. */
4938 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4939 if (GET_CODE (op0
) == REG
4940 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4941 && reg_renumber
[regno
] < 0
4942 && reg_equiv_constant
[regno
] != 0)
4943 op0
= reg_equiv_constant
[regno
];
4944 else if (GET_CODE (op1
) == REG
4945 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4946 && reg_renumber
[regno
] < 0
4947 && reg_equiv_constant
[regno
] != 0)
4948 op1
= reg_equiv_constant
[regno
];
4949 else if (GET_CODE (op0
) == PLUS
4950 && (tem
= subst_indexed_address (op0
)) != op0
)
4952 else if (GET_CODE (op1
) == PLUS
4953 && (tem
= subst_indexed_address (op1
)) != op1
)
4958 /* Pick out up to three things to add. */
4959 if (GET_CODE (op1
) == PLUS
)
4960 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4961 else if (GET_CODE (op0
) == PLUS
)
4962 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4964 /* Compute the sum. */
4966 op1
= form_sum (op1
, op2
);
4968 op0
= form_sum (op0
, op1
);
4975 /* Record the pseudo registers we must reload into hard registers in a
4976 subexpression of a would-be memory address, X referring to a value
4977 in mode MODE. (This function is not called if the address we find
4980 CONTEXT = 1 means we are considering regs as index regs,
4981 = 0 means we are considering them as base regs.
4983 OPNUM and TYPE specify the purpose of any reloads made.
4985 IND_LEVELS says how many levels of indirect addressing are
4986 supported at this point in the address.
4988 INSN, if nonzero, is the insn in which we do the reload. It is used
4989 to determine if we may generate output reloads.
4991 We return nonzero if X, as a whole, is reloaded or replaced. */
4993 /* Note that we take shortcuts assuming that no multi-reg machine mode
4994 occurs as part of an address.
4995 Also, this is not fully machine-customizable; it works for machines
4996 such as vaxes and 68000's and 32000's, but other possible machines
4997 could have addressing modes that this does not handle right. */
5000 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
5001 enum machine_mode mode
;
5006 enum reload_type type
;
5010 register RTX_CODE code
= GET_CODE (x
);
5016 register rtx orig_op0
= XEXP (x
, 0);
5017 register rtx orig_op1
= XEXP (x
, 1);
5018 register RTX_CODE code0
= GET_CODE (orig_op0
);
5019 register RTX_CODE code1
= GET_CODE (orig_op1
);
5020 register rtx op0
= orig_op0
;
5021 register rtx op1
= orig_op1
;
5023 if (GET_CODE (op0
) == SUBREG
)
5025 op0
= SUBREG_REG (op0
);
5026 code0
= GET_CODE (op0
);
5027 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5028 op0
= gen_rtx_REG (word_mode
,
5029 REGNO (op0
) + SUBREG_WORD (orig_op0
));
5032 if (GET_CODE (op1
) == SUBREG
)
5034 op1
= SUBREG_REG (op1
);
5035 code1
= GET_CODE (op1
);
5036 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5037 op1
= gen_rtx_REG (GET_MODE (op1
),
5038 REGNO (op1
) + SUBREG_WORD (orig_op1
));
5041 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5042 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5044 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5045 type
, ind_levels
, insn
);
5046 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5047 type
, ind_levels
, insn
);
5050 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5051 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5053 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5054 type
, ind_levels
, insn
);
5055 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5056 type
, ind_levels
, insn
);
5059 else if (code0
== CONST_INT
|| code0
== CONST
5060 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5061 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5062 type
, ind_levels
, insn
);
5064 else if (code1
== CONST_INT
|| code1
== CONST
5065 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5066 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5067 type
, ind_levels
, insn
);
5069 else if (code0
== REG
&& code1
== REG
)
5071 if (REG_OK_FOR_INDEX_P (op0
)
5072 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5074 else if (REG_OK_FOR_INDEX_P (op1
)
5075 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5077 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5078 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5079 type
, ind_levels
, insn
);
5080 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5081 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5082 type
, ind_levels
, insn
);
5083 else if (REG_OK_FOR_INDEX_P (op1
))
5084 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5085 type
, ind_levels
, insn
);
5086 else if (REG_OK_FOR_INDEX_P (op0
))
5087 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5088 type
, ind_levels
, insn
);
5091 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5092 type
, ind_levels
, insn
);
5093 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5094 type
, ind_levels
, insn
);
5098 else if (code0
== REG
)
5100 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5101 type
, ind_levels
, insn
);
5102 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5103 type
, ind_levels
, insn
);
5106 else if (code1
== REG
)
5108 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5109 type
, ind_levels
, insn
);
5110 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5111 type
, ind_levels
, insn
);
5120 rtx op0
= XEXP (x
, 0);
5121 rtx op1
= XEXP (x
, 1);
5123 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5126 /* Currently, we only support {PRE,POST}_MODIFY constructs
5127 where a base register is {inc,dec}remented by the contents
5128 of another register or by a constant value. Thus, these
5129 operands must match. */
5130 if (op0
!= XEXP (op1
, 0))
5133 /* Require index register (or constant). Let's just handle the
5134 register case in the meantime... If the target allows
5135 auto-modify by a constant then we could try replacing a pseudo
5136 register with its equivalent constant where applicable. */
5137 if (REG_P (XEXP (op1
, 1)))
5138 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5139 find_reloads_address_1 (mode
, XEXP (op1
, 1), 1, &XEXP (op1
, 1),
5140 opnum
, type
, ind_levels
, insn
);
5142 if (REG_P (XEXP (op1
, 0)))
5144 register int regno
= REGNO (XEXP (op1
, 0));
5146 /* A register that is incremented cannot be constant! */
5147 if (regno
>= FIRST_PSEUDO_REGISTER
5148 && reg_equiv_constant
[regno
] != 0)
5151 /* Handle a register that is equivalent to a memory location
5152 which cannot be addressed directly. */
5153 if (reg_equiv_memory_loc
[regno
] != 0
5154 && (reg_equiv_address
[regno
] != 0
5155 || num_not_at_initial_offset
))
5157 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5159 if (reg_equiv_address
[regno
]
5160 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5162 /* First reload the memory location's address.
5163 We can't use ADDR_TYPE (type) here, because we need to
5164 write back the value after reading it, hence we actually
5165 need two registers. */
5166 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
5167 &XEXP (tem
, 0), opnum
, type
,
5170 /* Then reload the memory location into a base
5172 push_reload (tem
, tem
, &XEXP (x
, 0), &XEXP (op1
, 0),
5173 BASE_REG_CLASS
, GET_MODE (x
), GET_MODE (x
),
5174 0, 0, opnum
, RELOAD_OTHER
);
5179 if (reg_renumber
[regno
] >= 0)
5180 regno
= reg_renumber
[regno
];
5182 /* We require a base register here... */
5183 if (!REGNO_MODE_OK_FOR_BASE_P (regno
, GET_MODE (x
)))
5185 push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5186 &XEXP (op1
, 0), &XEXP (x
, 0),
5188 GET_MODE (x
), GET_MODE (x
), 0, 0,
5189 opnum
, RELOAD_OTHER
);
5201 if (GET_CODE (XEXP (x
, 0)) == REG
)
5203 register int regno
= REGNO (XEXP (x
, 0));
5207 /* A register that is incremented cannot be constant! */
5208 if (regno
>= FIRST_PSEUDO_REGISTER
5209 && reg_equiv_constant
[regno
] != 0)
5212 /* Handle a register that is equivalent to a memory location
5213 which cannot be addressed directly. */
5214 if (reg_equiv_memory_loc
[regno
] != 0
5215 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5217 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5218 if (reg_equiv_address
[regno
]
5219 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5221 /* First reload the memory location's address.
5222 We can't use ADDR_TYPE (type) here, because we need to
5223 write back the value after reading it, hence we actually
5224 need two registers. */
5225 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5226 &XEXP (tem
, 0), opnum
, type
,
5228 /* Put this inside a new increment-expression. */
5229 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5230 /* Proceed to reload that, as if it contained a register. */
5234 /* If we have a hard register that is ok as an index,
5235 don't make a reload. If an autoincrement of a nice register
5236 isn't "valid", it must be that no autoincrement is "valid".
5237 If that is true and something made an autoincrement anyway,
5238 this must be a special context where one is allowed.
5239 (For example, a "push" instruction.)
5240 We can't improve this address, so leave it alone. */
5242 /* Otherwise, reload the autoincrement into a suitable hard reg
5243 and record how much to increment by. */
5245 if (reg_renumber
[regno
] >= 0)
5246 regno
= reg_renumber
[regno
];
5247 if ((regno
>= FIRST_PSEUDO_REGISTER
5248 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5249 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5256 /* If we can output the register afterwards, do so, this
5257 saves the extra update.
5258 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5259 CALL_INSN - and it does not set CC0.
5260 But don't do this if we cannot directly address the
5261 memory location, since this will make it harder to
5262 reuse address reloads, and increases register pressure.
5263 Also don't do this if we can probably update x directly. */
5264 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5266 : reg_equiv_mem
[regno
]);
5267 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5268 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5269 && memory_operand (equiv
, GET_MODE (equiv
))
5271 && ! sets_cc0_p (PATTERN (insn
))
5273 && ! (icode
!= CODE_FOR_nothing
5274 && ((*insn_data
[icode
].operand
[0].predicate
)
5276 && ((*insn_data
[icode
].operand
[1].predicate
)
5282 = push_reload (x
, x
, loc
, loc
,
5283 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5284 GET_MODE (x
), GET_MODE (x
), 0, 0,
5285 opnum
, RELOAD_OTHER
);
5287 /* If we created a new MEM based on reg_equiv_mem[REGNO], then
5288 LOC above is part of the new MEM, not the MEM in INSN.
5290 We must also replace the address of the MEM in INSN. */
5291 if (&XEXP (x_orig
, 0) != loc
)
5292 push_replacement (&XEXP (x_orig
, 0), reloadnum
, VOIDmode
);
5298 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5299 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5300 GET_MODE (x
), GET_MODE (x
), 0, 0,
5303 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5309 /* Update the REG_INC notes. */
5311 for (link
= REG_NOTES (this_insn
);
5312 link
; link
= XEXP (link
, 1))
5313 if (REG_NOTE_KIND (link
) == REG_INC
5314 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
5315 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5321 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5323 /* This is probably the result of a substitution, by eliminate_regs,
5324 of an equivalent address for a pseudo that was not allocated to a
5325 hard register. Verify that the specified address is valid and
5326 reload it into a register. */
5327 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5328 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5332 /* Since we know we are going to reload this item, don't decrement
5333 for the indirection level.
5335 Note that this is actually conservative: it would be slightly
5336 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5338 /* We can't use ADDR_TYPE (type) here, because we need to
5339 write back the value after reading it, hence we actually
5340 need two registers. */
5341 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5342 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5343 opnum
, type
, ind_levels
, insn
);
5345 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5346 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5347 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5349 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5351 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5353 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5360 /* This is probably the result of a substitution, by eliminate_regs, of
5361 an equivalent address for a pseudo that was not allocated to a hard
5362 register. Verify that the specified address is valid and reload it
5365 Since we know we are going to reload this item, don't decrement for
5366 the indirection level.
5368 Note that this is actually conservative: it would be slightly more
5369 efficient to use the value of SPILL_INDIRECT_LEVELS from
5372 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5373 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5374 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
5375 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5376 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5381 register int regno
= REGNO (x
);
5383 if (reg_equiv_constant
[regno
] != 0)
5385 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5386 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5387 GET_MODE (x
), opnum
, type
, ind_levels
);
5391 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5392 that feeds this insn. */
5393 if (reg_equiv_mem
[regno
] != 0)
5395 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
5396 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5397 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5402 if (reg_equiv_memory_loc
[regno
]
5403 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5405 rtx tem
= make_memloc (x
, regno
);
5406 if (reg_equiv_address
[regno
] != 0
5407 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5410 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5411 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5416 if (reg_renumber
[regno
] >= 0)
5417 regno
= reg_renumber
[regno
];
5419 if ((regno
>= FIRST_PSEUDO_REGISTER
5420 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5421 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5423 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5424 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5425 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5429 /* If a register appearing in an address is the subject of a CLOBBER
5430 in this insn, reload it into some other register to be safe.
5431 The CLOBBER is supposed to make the register unavailable
5432 from before this insn to after it. */
5433 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
)))
5435 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5436 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5437 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5444 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5446 /* If this is a SUBREG of a hard register and the resulting register
5447 is of the wrong class, reload the whole SUBREG. This avoids
5448 needless copies if SUBREG_REG is multi-word. */
5449 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5451 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5453 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5454 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5456 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5457 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5458 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5462 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5463 is larger than the class size, then reload the whole SUBREG. */
5466 enum reg_class
class = (context
? INDEX_REG_CLASS
5468 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5469 > reg_class_size
[class])
5471 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5473 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5474 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5486 register const char *fmt
= GET_RTX_FORMAT (code
);
5489 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5492 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5493 opnum
, type
, ind_levels
, insn
);
5500 /* X, which is found at *LOC, is a part of an address that needs to be
5501 reloaded into a register of class CLASS. If X is a constant, or if
5502 X is a PLUS that contains a constant, check that the constant is a
5503 legitimate operand and that we are supposed to be able to load
5504 it into the register.
5506 If not, force the constant into memory and reload the MEM instead.
5508 MODE is the mode to use, in case X is an integer constant.
5510 OPNUM and TYPE describe the purpose of any reloads made.
5512 IND_LEVELS says how many levels of indirect addressing this machine
5516 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5519 enum reg_class
class;
5520 enum machine_mode mode
;
5522 enum reload_type type
;
5526 && (! LEGITIMATE_CONSTANT_P (x
)
5527 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5531 /* If this is a CONST_INT, it could have been created by a
5532 plus_constant call in eliminate_regs, which means it may be
5533 on the reload_obstack. reload_obstack will be freed later, so
5534 we can't allow such RTL to be put in the constant pool. There
5535 is code in force_const_mem to check for this case, but it doesn't
5536 work because we have already popped off the reload_obstack, so
5537 rtl_obstack == saveable_obstack is true at this point. */
5538 if (GET_CODE (x
) == CONST_INT
)
5539 tem
= x
= force_const_mem (mode
, GEN_INT (INTVAL (x
)));
5541 tem
= x
= force_const_mem (mode
, x
);
5543 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5544 opnum
, type
, ind_levels
, 0);
5547 else if (GET_CODE (x
) == PLUS
5548 && CONSTANT_P (XEXP (x
, 1))
5549 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5550 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5554 /* See comment above. */
5555 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
5556 tem
= force_const_mem (GET_MODE (x
), GEN_INT (INTVAL (XEXP (x
, 1))));
5558 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5560 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5561 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5562 opnum
, type
, ind_levels
, 0);
5565 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5566 mode
, VOIDmode
, 0, 0, opnum
, type
);
5569 /* X, a subreg of a pseudo, is a part of an address that needs to be
5572 If the pseudo is equivalent to a memory location that cannot be directly
5573 addressed, make the necessary address reloads.
5575 If address reloads have been necessary, or if the address is changed
5576 by register elimination, return the rtx of the memory location;
5577 otherwise, return X.
5579 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5582 OPNUM and TYPE identify the purpose of the reload.
5584 IND_LEVELS says how many levels of indirect addressing are
5585 supported at this point in the address.
5587 INSN, if nonzero, is the insn in which we do the reload. It is used
5588 to determine where to put USEs for pseudos that we have to replace with
5592 find_reloads_subreg_address (x
, force_replace
, opnum
, type
,
5597 enum reload_type type
;
5601 int regno
= REGNO (SUBREG_REG (x
));
5603 if (reg_equiv_memory_loc
[regno
])
5605 /* If the address is not directly addressable, or if the address is not
5606 offsettable, then it must be replaced. */
5608 && (reg_equiv_address
[regno
]
5609 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5612 if (force_replace
|| num_not_at_initial_offset
)
5614 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5616 /* If the address changes because of register elimination, then
5617 it must be replaced. */
5619 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5621 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
5623 if (BYTES_BIG_ENDIAN
)
5627 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5628 offset
+= MIN (size
, UNITS_PER_WORD
);
5629 size
= GET_MODE_SIZE (GET_MODE (x
));
5630 offset
-= MIN (size
, UNITS_PER_WORD
);
5632 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5633 PUT_MODE (tem
, GET_MODE (x
));
5634 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5635 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5637 /* If this is not a toplevel operand, find_reloads doesn't see
5638 this substitution. We have to emit a USE of the pseudo so
5639 that delete_output_reload can see it. */
5640 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5641 emit_insn_before (gen_rtx_USE (VOIDmode
, SUBREG_REG (x
)), insn
);
5649 /* Substitute into the current INSN the registers into which we have reloaded
5650 the things that need reloading. The array `replacements'
5651 contains the locations of all pointers that must be changed
5652 and says what to replace them with.
5654 Return the rtx that X translates into; usually X, but modified. */
5661 for (i
= 0; i
< n_replacements
; i
++)
5663 register struct replacement
*r
= &replacements
[i
];
5664 register rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5667 /* Encapsulate RELOADREG so its machine mode matches what
5668 used to be there. Note that gen_lowpart_common will
5669 do the wrong thing if RELOADREG is multi-word. RELOADREG
5670 will always be a REG here. */
5671 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5672 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5674 /* If we are putting this into a SUBREG and RELOADREG is a
5675 SUBREG, we would be making nested SUBREGs, so we have to fix
5676 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5678 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5680 if (GET_MODE (*r
->subreg_loc
)
5681 == GET_MODE (SUBREG_REG (reloadreg
)))
5682 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5685 *r
->where
= SUBREG_REG (reloadreg
);
5686 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
5690 *r
->where
= reloadreg
;
5692 /* If reload got no reg and isn't optional, something's wrong. */
5693 else if (! rld
[r
->what
].optional
)
5698 /* Make a copy of any replacements being done into X and move those copies
5699 to locations in Y, a copy of X. We only look at the highest level of
5703 copy_replacements (x
, y
)
5708 enum rtx_code code
= GET_CODE (x
);
5709 const char *fmt
= GET_RTX_FORMAT (code
);
5710 struct replacement
*r
;
5712 /* We can't support X being a SUBREG because we might then need to know its
5713 location if something inside it was replaced. */
5717 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5719 for (j
= 0; j
< n_replacements
; j
++)
5721 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
5723 r
= &replacements
[n_replacements
++];
5724 r
->where
= replacements
[j
].where
;
5725 r
->subreg_loc
= &XEXP (y
, i
);
5726 r
->what
= replacements
[j
].what
;
5727 r
->mode
= replacements
[j
].mode
;
5729 else if (replacements
[j
].where
== &XEXP (x
, i
))
5731 r
= &replacements
[n_replacements
++];
5732 r
->where
= &XEXP (y
, i
);
5734 r
->what
= replacements
[j
].what
;
5735 r
->mode
= replacements
[j
].mode
;
5740 /* Change any replacements being done to *X to be done to *Y */
5743 move_replacements (x
, y
)
5749 for (i
= 0; i
< n_replacements
; i
++)
5750 if (replacements
[i
].subreg_loc
== x
)
5751 replacements
[i
].subreg_loc
= y
;
5752 else if (replacements
[i
].where
== x
)
5754 replacements
[i
].where
= y
;
5755 replacements
[i
].subreg_loc
= 0;
5759 /* If LOC was scheduled to be replaced by something, return the replacement.
5760 Otherwise, return *LOC. */
5763 find_replacement (loc
)
5766 struct replacement
*r
;
5768 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
5770 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5772 if (reloadreg
&& r
->where
== loc
)
5774 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
5775 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5779 else if (reloadreg
&& r
->subreg_loc
== loc
)
5781 /* RELOADREG must be either a REG or a SUBREG.
5783 ??? Is it actually still ever a SUBREG? If so, why? */
5785 if (GET_CODE (reloadreg
) == REG
)
5786 return gen_rtx_REG (GET_MODE (*loc
),
5787 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
5788 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
5791 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
5792 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
5796 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5797 what's inside and make a new rtl if so. */
5798 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
5799 || GET_CODE (*loc
) == MULT
)
5801 rtx x
= find_replacement (&XEXP (*loc
, 0));
5802 rtx y
= find_replacement (&XEXP (*loc
, 1));
5804 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
5805 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
5811 /* Return nonzero if register in range [REGNO, ENDREGNO)
5812 appears either explicitly or implicitly in X
5813 other than being stored into (except for earlyclobber operands).
5815 References contained within the substructure at LOC do not count.
5816 LOC may be zero, meaning don't ignore anything.
5818 This is similar to refers_to_regno_p in rtlanal.c except that we
5819 look at equivalences for pseudos that didn't get hard registers. */
5822 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
5823 unsigned int regno
, endregno
;
5836 code
= GET_CODE (x
);
5843 /* If this is a pseudo, a hard register must not have been allocated.
5844 X must therefore either be a constant or be in memory. */
5845 if (r
>= FIRST_PSEUDO_REGISTER
)
5847 if (reg_equiv_memory_loc
[r
])
5848 return refers_to_regno_for_reload_p (regno
, endregno
,
5849 reg_equiv_memory_loc
[r
],
5852 if (reg_equiv_constant
[r
])
5858 return (endregno
> r
5859 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
5860 ? HARD_REGNO_NREGS (r
, GET_MODE (x
))
5864 /* If this is a SUBREG of a hard reg, we can see exactly which
5865 registers are being modified. Otherwise, handle normally. */
5866 if (GET_CODE (SUBREG_REG (x
)) == REG
5867 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5869 unsigned int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5870 unsigned int inner_endregno
5871 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
5872 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5874 return endregno
> inner_regno
&& regno
< inner_endregno
;
5880 if (&SET_DEST (x
) != loc
5881 /* Note setting a SUBREG counts as referring to the REG it is in for
5882 a pseudo but not for hard registers since we can
5883 treat each word individually. */
5884 && ((GET_CODE (SET_DEST (x
)) == SUBREG
5885 && loc
!= &SUBREG_REG (SET_DEST (x
))
5886 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
5887 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
5888 && refers_to_regno_for_reload_p (regno
, endregno
,
5889 SUBREG_REG (SET_DEST (x
)),
5891 /* If the output is an earlyclobber operand, this is
5893 || ((GET_CODE (SET_DEST (x
)) != REG
5894 || earlyclobber_operand_p (SET_DEST (x
)))
5895 && refers_to_regno_for_reload_p (regno
, endregno
,
5896 SET_DEST (x
), loc
))))
5899 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
5908 /* X does not match, so try its subexpressions. */
5910 fmt
= GET_RTX_FORMAT (code
);
5911 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5913 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
5921 if (refers_to_regno_for_reload_p (regno
, endregno
,
5925 else if (fmt
[i
] == 'E')
5928 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
5929 if (loc
!= &XVECEXP (x
, i
, j
)
5930 && refers_to_regno_for_reload_p (regno
, endregno
,
5931 XVECEXP (x
, i
, j
), loc
))
5938 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5939 we check if any register number in X conflicts with the relevant register
5940 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5941 contains a MEM (we don't bother checking for memory addresses that can't
5942 conflict because we expect this to be a rare case.
5944 This function is similar to reg_overlap_mention_p in rtlanal.c except
5945 that we look at equivalences for pseudos that didn't get hard registers. */
5948 reg_overlap_mentioned_for_reload_p (x
, in
)
5951 int regno
, endregno
;
5953 /* Overly conservative. */
5954 if (GET_CODE (x
) == STRICT_LOW_PART
)
5957 /* If either argument is a constant, then modifying X can not affect IN. */
5958 if (CONSTANT_P (x
) || CONSTANT_P (in
))
5960 else if (GET_CODE (x
) == SUBREG
)
5962 regno
= REGNO (SUBREG_REG (x
));
5963 if (regno
< FIRST_PSEUDO_REGISTER
)
5964 regno
+= SUBREG_WORD (x
);
5966 else if (GET_CODE (x
) == REG
)
5970 /* If this is a pseudo, it must not have been assigned a hard register.
5971 Therefore, it must either be in memory or be a constant. */
5973 if (regno
>= FIRST_PSEUDO_REGISTER
)
5975 if (reg_equiv_memory_loc
[regno
])
5976 return refers_to_mem_for_reload_p (in
);
5977 else if (reg_equiv_constant
[regno
])
5982 else if (GET_CODE (x
) == MEM
)
5983 return refers_to_mem_for_reload_p (in
);
5984 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
5985 || GET_CODE (x
) == CC0
)
5986 return reg_mentioned_p (x
, in
);
5990 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
5991 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5993 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
5996 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6000 refers_to_mem_for_reload_p (x
)
6006 if (GET_CODE (x
) == MEM
)
6009 if (GET_CODE (x
) == REG
)
6010 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6011 && reg_equiv_memory_loc
[REGNO (x
)]);
6013 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6014 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6016 && (GET_CODE (XEXP (x
, i
)) == MEM
6017 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6023 /* Check the insns before INSN to see if there is a suitable register
6024 containing the same value as GOAL.
6025 If OTHER is -1, look for a register in class CLASS.
6026 Otherwise, just see if register number OTHER shares GOAL's value.
6028 Return an rtx for the register found, or zero if none is found.
6030 If RELOAD_REG_P is (short *)1,
6031 we reject any hard reg that appears in reload_reg_rtx
6032 because such a hard reg is also needed coming into this insn.
6034 If RELOAD_REG_P is any other nonzero value,
6035 it is a vector indexed by hard reg number
6036 and we reject any hard reg whose element in the vector is nonnegative
6037 as well as any that appears in reload_reg_rtx.
6039 If GOAL is zero, then GOALREG is a register number; we look
6040 for an equivalent for that register.
6042 MODE is the machine mode of the value we want an equivalence for.
6043 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6045 This function is used by jump.c as well as in the reload pass.
6047 If GOAL is the sum of the stack pointer and a constant, we treat it
6048 as if it were a constant except that sp is required to be unchanging. */
6051 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
6054 enum reg_class
class;
6056 short *reload_reg_p
;
6058 enum machine_mode mode
;
6060 register rtx p
= insn
;
6061 rtx goaltry
, valtry
, value
, where
;
6063 register int regno
= -1;
6067 int goal_mem_addr_varies
= 0;
6068 int need_stable_sp
= 0;
6074 else if (GET_CODE (goal
) == REG
)
6075 regno
= REGNO (goal
);
6076 else if (GET_CODE (goal
) == MEM
)
6078 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6079 if (MEM_VOLATILE_P (goal
))
6081 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
6083 /* An address with side effects must be reexecuted. */
6098 else if (CONSTANT_P (goal
))
6100 else if (GET_CODE (goal
) == PLUS
6101 && XEXP (goal
, 0) == stack_pointer_rtx
6102 && CONSTANT_P (XEXP (goal
, 1)))
6103 goal_const
= need_stable_sp
= 1;
6104 else if (GET_CODE (goal
) == PLUS
6105 && XEXP (goal
, 0) == frame_pointer_rtx
6106 && CONSTANT_P (XEXP (goal
, 1)))
6111 /* Scan insns back from INSN, looking for one that copies
6112 a value into or out of GOAL.
6113 Stop and give up if we reach a label. */
6118 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
6121 if (GET_CODE (p
) == INSN
6122 /* If we don't want spill regs ... */
6123 && (! (reload_reg_p
!= 0
6124 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6125 /* ... then ignore insns introduced by reload; they aren't
6126 useful and can cause results in reload_as_needed to be
6127 different from what they were when calculating the need for
6128 spills. If we notice an input-reload insn here, we will
6129 reject it below, but it might hide a usable equivalent.
6130 That makes bad code. It may even abort: perhaps no reg was
6131 spilled for this insn because it was assumed we would find
6133 || INSN_UID (p
) < reload_first_uid
))
6136 pat
= single_set (p
);
6138 /* First check for something that sets some reg equal to GOAL. */
6141 && true_regnum (SET_SRC (pat
)) == regno
6142 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6145 && true_regnum (SET_DEST (pat
)) == regno
6146 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6148 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6149 /* When looking for stack pointer + const,
6150 make sure we don't use a stack adjust. */
6151 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6152 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6154 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6155 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6157 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6158 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6159 /* If we are looking for a constant,
6160 and something equivalent to that constant was copied
6161 into a reg, we can use that reg. */
6162 || (goal_const
&& REG_NOTES (p
) != 0
6163 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6164 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6166 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6167 || (GET_CODE (SET_DEST (pat
)) == REG
6168 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6169 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6171 && GET_CODE (goal
) == CONST_INT
6173 = operand_subword (XEXP (tem
, 0), 0, 0,
6175 && rtx_equal_p (goal
, goaltry
)
6177 = operand_subword (SET_DEST (pat
), 0, 0,
6179 && (valueno
= true_regnum (valtry
)) >= 0)))
6180 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6182 && GET_CODE (SET_DEST (pat
)) == REG
6183 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6184 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6186 && GET_CODE (goal
) == CONST_INT
6187 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6189 && rtx_equal_p (goal
, goaltry
)
6191 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6192 && (valueno
= true_regnum (valtry
)) >= 0)))
6195 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
6196 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6206 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6207 (or copying VALUE into GOAL, if GOAL is also a register).
6208 Now verify that VALUE is really valid. */
6210 /* VALUENO is the register number of VALUE; a hard register. */
6212 /* Don't try to re-use something that is killed in this insn. We want
6213 to be able to trust REG_UNUSED notes. */
6214 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6217 /* If we propose to get the value from the stack pointer or if GOAL is
6218 a MEM based on the stack pointer, we need a stable SP. */
6219 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6220 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6224 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6225 if (GET_MODE (value
) != mode
)
6228 /* Reject VALUE if it was loaded from GOAL
6229 and is also a register that appears in the address of GOAL. */
6231 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6232 && refers_to_regno_for_reload_p (valueno
,
6234 + HARD_REGNO_NREGS (valueno
, mode
)),
6238 /* Reject registers that overlap GOAL. */
6240 if (!goal_mem
&& !goal_const
6241 && regno
+ (int) HARD_REGNO_NREGS (regno
, mode
) > valueno
6242 && regno
< valueno
+ (int) HARD_REGNO_NREGS (valueno
, mode
))
6245 nregs
= HARD_REGNO_NREGS (regno
, mode
);
6246 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
6248 /* Reject VALUE if it is one of the regs reserved for reloads.
6249 Reload1 knows how to reuse them anyway, and it would get
6250 confused if we allocated one without its knowledge.
6251 (Now that insns introduced by reload are ignored above,
6252 this case shouldn't happen, but I'm not positive.) */
6254 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6257 for (i
= 0; i
< valuenregs
; ++i
)
6258 if (reload_reg_p
[valueno
+ i
] >= 0)
6262 /* Reject VALUE if it is a register being used for an input reload
6263 even if it is not one of those reserved. */
6265 if (reload_reg_p
!= 0)
6268 for (i
= 0; i
< n_reloads
; i
++)
6269 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6271 int regno1
= REGNO (rld
[i
].reg_rtx
);
6272 int nregs1
= HARD_REGNO_NREGS (regno1
,
6273 GET_MODE (rld
[i
].reg_rtx
));
6274 if (regno1
< valueno
+ valuenregs
6275 && regno1
+ nregs1
> valueno
)
6281 /* We must treat frame pointer as varying here,
6282 since it can vary--in a nonlocal goto as generated by expand_goto. */
6283 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6285 /* Now verify that the values of GOAL and VALUE remain unaltered
6286 until INSN is reached. */
6295 /* Don't trust the conversion past a function call
6296 if either of the two is in a call-clobbered register, or memory. */
6297 if (GET_CODE (p
) == CALL_INSN
)
6301 if (goal_mem
|| need_stable_sp
)
6304 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6305 for (i
= 0; i
< nregs
; ++i
)
6306 if (call_used_regs
[regno
+ i
])
6309 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6310 for (i
= 0; i
< valuenregs
; ++i
)
6311 if (call_used_regs
[valueno
+ i
])
6315 #ifdef NON_SAVING_SETJMP
6316 if (NON_SAVING_SETJMP
&& GET_CODE (p
) == NOTE
6317 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
6325 /* Watch out for unspec_volatile, and volatile asms. */
6326 if (volatile_insn_p (pat
))
6329 /* If this insn P stores in either GOAL or VALUE, return 0.
6330 If GOAL is a memory ref and this insn writes memory, return 0.
6331 If GOAL is a memory ref and its address is not constant,
6332 and this insn P changes a register used in GOAL, return 0. */
6334 if (GET_CODE (pat
) == COND_EXEC
)
6335 pat
= COND_EXEC_CODE (pat
);
6336 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6338 register rtx dest
= SET_DEST (pat
);
6339 while (GET_CODE (dest
) == SUBREG
6340 || GET_CODE (dest
) == ZERO_EXTRACT
6341 || GET_CODE (dest
) == SIGN_EXTRACT
6342 || GET_CODE (dest
) == STRICT_LOW_PART
)
6343 dest
= XEXP (dest
, 0);
6344 if (GET_CODE (dest
) == REG
)
6346 register int xregno
= REGNO (dest
);
6348 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6349 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6352 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6354 if (xregno
< valueno
+ valuenregs
6355 && xregno
+ xnregs
> valueno
)
6357 if (goal_mem_addr_varies
6358 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6360 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6363 else if (goal_mem
&& GET_CODE (dest
) == MEM
6364 && ! push_operand (dest
, GET_MODE (dest
)))
6366 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6367 && reg_equiv_memory_loc
[regno
] != 0)
6369 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6372 else if (GET_CODE (pat
) == PARALLEL
)
6375 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6377 register rtx v1
= XVECEXP (pat
, 0, i
);
6378 if (GET_CODE (v1
) == COND_EXEC
)
6379 v1
= COND_EXEC_CODE (v1
);
6380 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6382 register rtx dest
= SET_DEST (v1
);
6383 while (GET_CODE (dest
) == SUBREG
6384 || GET_CODE (dest
) == ZERO_EXTRACT
6385 || GET_CODE (dest
) == SIGN_EXTRACT
6386 || GET_CODE (dest
) == STRICT_LOW_PART
)
6387 dest
= XEXP (dest
, 0);
6388 if (GET_CODE (dest
) == REG
)
6390 register int xregno
= REGNO (dest
);
6392 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6393 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6396 if (xregno
< regno
+ nregs
6397 && xregno
+ xnregs
> regno
)
6399 if (xregno
< valueno
+ valuenregs
6400 && xregno
+ xnregs
> valueno
)
6402 if (goal_mem_addr_varies
6403 && reg_overlap_mentioned_for_reload_p (dest
,
6406 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6409 else if (goal_mem
&& GET_CODE (dest
) == MEM
6410 && ! push_operand (dest
, GET_MODE (dest
)))
6412 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6413 && reg_equiv_memory_loc
[regno
] != 0)
6415 else if (need_stable_sp
6416 && push_operand (dest
, GET_MODE (dest
)))
6422 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6426 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6427 link
= XEXP (link
, 1))
6429 pat
= XEXP (link
, 0);
6430 if (GET_CODE (pat
) == CLOBBER
)
6432 register rtx dest
= SET_DEST (pat
);
6434 if (GET_CODE (dest
) == REG
)
6436 register int xregno
= REGNO (dest
);
6438 = HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6440 if (xregno
< regno
+ nregs
6441 && xregno
+ xnregs
> regno
)
6443 else if (xregno
< valueno
+ valuenregs
6444 && xregno
+ xnregs
> valueno
)
6446 else if (goal_mem_addr_varies
6447 && reg_overlap_mentioned_for_reload_p (dest
,
6452 else if (goal_mem
&& GET_CODE (dest
) == MEM
6453 && ! push_operand (dest
, GET_MODE (dest
)))
6455 else if (need_stable_sp
6456 && push_operand (dest
, GET_MODE (dest
)))
6463 /* If this insn auto-increments or auto-decrements
6464 either regno or valueno, return 0 now.
6465 If GOAL is a memory ref and its address is not constant,
6466 and this insn P increments a register used in GOAL, return 0. */
6470 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6471 if (REG_NOTE_KIND (link
) == REG_INC
6472 && GET_CODE (XEXP (link
, 0)) == REG
)
6474 register int incno
= REGNO (XEXP (link
, 0));
6475 if (incno
< regno
+ nregs
&& incno
>= regno
)
6477 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6479 if (goal_mem_addr_varies
6480 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6490 /* Find a place where INCED appears in an increment or decrement operator
6491 within X, and return the amount INCED is incremented or decremented by.
6492 The value is always positive. */
6495 find_inc_amount (x
, inced
)
6498 register enum rtx_code code
= GET_CODE (x
);
6499 register const char *fmt
;
6504 register rtx addr
= XEXP (x
, 0);
6505 if ((GET_CODE (addr
) == PRE_DEC
6506 || GET_CODE (addr
) == POST_DEC
6507 || GET_CODE (addr
) == PRE_INC
6508 || GET_CODE (addr
) == POST_INC
)
6509 && XEXP (addr
, 0) == inced
)
6510 return GET_MODE_SIZE (GET_MODE (x
));
6511 else if ((GET_CODE (addr
) == PRE_MODIFY
6512 || GET_CODE (addr
) == POST_MODIFY
)
6513 && GET_CODE (XEXP (addr
, 1)) == PLUS
6514 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
6515 && XEXP (addr
, 0) == inced
6516 && GET_CODE (XEXP (XEXP (addr
, 1), 1)) == CONST_INT
)
6518 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
6519 return i
< 0 ? -i
: i
;
6523 fmt
= GET_RTX_FORMAT (code
);
6524 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6528 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6535 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6537 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6547 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6550 regno_clobbered_p (regno
, insn
, mode
)
6553 enum machine_mode mode
;
6555 int nregs
= HARD_REGNO_NREGS (regno
, mode
);
6556 int endregno
= regno
+ nregs
;
6558 if (GET_CODE (PATTERN (insn
)) == CLOBBER
6559 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6561 int test
= REGNO (XEXP (PATTERN (insn
), 0));
6563 return test
>= regno
&& test
< endregno
;
6566 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6568 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6572 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6573 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
)
6575 int test
= REGNO (XEXP (elt
, 0));
6577 if (test
>= regno
&& test
< endregno
)
6586 static const char *reload_when_needed_name
[] =
6589 "RELOAD_FOR_OUTPUT",
6591 "RELOAD_FOR_INPUT_ADDRESS",
6592 "RELOAD_FOR_INPADDR_ADDRESS",
6593 "RELOAD_FOR_OUTPUT_ADDRESS",
6594 "RELOAD_FOR_OUTADDR_ADDRESS",
6595 "RELOAD_FOR_OPERAND_ADDRESS",
6596 "RELOAD_FOR_OPADDR_ADDR",
6598 "RELOAD_FOR_OTHER_ADDRESS"
6601 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
6603 /* These functions are used to print the variables set by 'find_reloads' */
6606 debug_reload_to_stream (f
)
6614 for (r
= 0; r
< n_reloads
; r
++)
6616 fprintf (f
, "Reload %d: ", r
);
6620 fprintf (f
, "reload_in (%s) = ",
6621 GET_MODE_NAME (rld
[r
].inmode
));
6622 print_inline_rtx (f
, rld
[r
].in
, 24);
6623 fprintf (f
, "\n\t");
6626 if (rld
[r
].out
!= 0)
6628 fprintf (f
, "reload_out (%s) = ",
6629 GET_MODE_NAME (rld
[r
].outmode
));
6630 print_inline_rtx (f
, rld
[r
].out
, 24);
6631 fprintf (f
, "\n\t");
6634 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
6636 fprintf (f
, "%s (opnum = %d)",
6637 reload_when_needed_name
[(int) rld
[r
].when_needed
],
6640 if (rld
[r
].optional
)
6641 fprintf (f
, ", optional");
6643 if (rld
[r
].nongroup
)
6644 fprintf (f
, ", nongroup");
6646 if (rld
[r
].inc
!= 0)
6647 fprintf (f
, ", inc by %d", rld
[r
].inc
);
6649 if (rld
[r
].nocombine
)
6650 fprintf (f
, ", can't combine");
6652 if (rld
[r
].secondary_p
)
6653 fprintf (f
, ", secondary_reload_p");
6655 if (rld
[r
].in_reg
!= 0)
6657 fprintf (f
, "\n\treload_in_reg: ");
6658 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
6661 if (rld
[r
].out_reg
!= 0)
6663 fprintf (f
, "\n\treload_out_reg: ");
6664 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
6667 if (rld
[r
].reg_rtx
!= 0)
6669 fprintf (f
, "\n\treload_reg_rtx: ");
6670 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
6674 if (rld
[r
].secondary_in_reload
!= -1)
6676 fprintf (f
, "%ssecondary_in_reload = %d",
6677 prefix
, rld
[r
].secondary_in_reload
);
6681 if (rld
[r
].secondary_out_reload
!= -1)
6682 fprintf (f
, "%ssecondary_out_reload = %d\n",
6683 prefix
, rld
[r
].secondary_out_reload
);
6686 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
6688 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
6689 insn_data
[rld
[r
].secondary_in_icode
].name
);
6693 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
6694 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
6695 insn_data
[rld
[r
].secondary_out_icode
].name
);
6704 debug_reload_to_stream (stderr
);