1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* This file contains subroutines used only from the file reload1.c.
24 It knows how to scan one insn for operands and values
25 that need to be copied into registers to make valid code.
26 It also finds other operands and values which are valid
27 but for which equivalent values in registers exist and
28 ought to be used instead.
30 Before processing the first insn of the function, call `init_reload'.
32 To scan an insn, call `find_reloads'. This does two things:
33 1. sets up tables describing which values must be reloaded
34 for this insn, and what kind of hard regs they must be reloaded into;
35 2. optionally record the locations where those values appear in
36 the data, so they can be replaced properly later.
37 This is done only if the second arg to `find_reloads' is nonzero.
39 The third arg to `find_reloads' specifies the number of levels
40 of indirect addressing supported by the machine. If it is zero,
41 indirect addressing is not valid. If it is one, (MEM (REG n))
42 is valid even if (REG n) did not get a hard register; if it is two,
43 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44 hard register, and similarly for higher values.
46 Then you must choose the hard regs to reload those pseudo regs into,
47 and generate appropriate load insns before this insn and perhaps
48 also store insns after this insn. Set up the array `reload_reg_rtx'
49 to contain the REG rtx's for the registers you used. In some
50 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51 for certain reloads. Then that tells you which register to use,
52 so you do not need to allocate one. But you still do need to add extra
53 instructions to copy the value into and out of that register.
55 Finally you must call `subst_reloads' to substitute the reload reg rtx's
56 into the locations already recorded.
60 find_reloads can alter the operands of the instruction it is called on.
62 1. Two operands of any sort may be interchanged, if they are in a
63 commutative instruction.
64 This happens only if find_reloads thinks the instruction will compile
67 2. Pseudo-registers that are equivalent to constants are replaced
68 with those constants if they are not in hard registers.
70 1 happens every time find_reloads is called.
71 2 happens only when REPLACE is 1, which is only when
72 actually doing the reloads, not when just counting them.
75 Using a reload register for several reloads in one insn:
77 When an insn has reloads, it is considered as having three parts:
78 the input reloads, the insn itself after reloading, and the output reloads.
79 Reloads of values used in memory addresses are often needed for only one part.
81 When this is so, reload_when_needed records which part needs the reload.
82 Two reloads for different parts of the insn can share the same reload
85 When a reload is used for addresses in multiple parts, or when it is
86 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
87 a register with any other reload. */
95 #include "insn-config.h"
96 #include "insn-codes.h"
100 #include "hard-reg-set.h"
104 #include "function.h"
108 #ifndef REGISTER_MOVE_COST
109 #define REGISTER_MOVE_COST(x, y) 2
112 #ifndef REGNO_MODE_OK_FOR_BASE_P
113 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
116 #ifndef REG_MODE_OK_FOR_BASE_P
117 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
120 /* All reloads of the current insn are recorded here. See reload.h for
123 struct reload rld
[MAX_RELOADS
];
125 /* All the "earlyclobber" operands of the current insn
126 are recorded here. */
128 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
130 int reload_n_operands
;
132 /* Replacing reloads.
134 If `replace_reloads' is nonzero, then as each reload is recorded
135 an entry is made for it in the table `replacements'.
136 Then later `subst_reloads' can look through that table and
137 perform all the replacements needed. */
139 /* Nonzero means record the places to replace. */
140 static int replace_reloads
;
142 /* Each replacement is recorded with a structure like this. */
145 rtx
*where
; /* Location to store in */
146 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
147 a SUBREG; 0 otherwise. */
148 int what
; /* which reload this is for */
149 enum machine_mode mode
; /* mode it must have */
152 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
154 /* Number of replacements currently recorded. */
155 static int n_replacements
;
157 /* Used to track what is modified by an operand. */
160 int reg_flag
; /* Nonzero if referencing a register. */
161 int safe
; /* Nonzero if this can't conflict with anything. */
162 rtx base
; /* Base address for MEM. */
163 HOST_WIDE_INT start
; /* Starting offset or register number. */
164 HOST_WIDE_INT end
; /* Ending offset or register number. */
167 #ifdef SECONDARY_MEMORY_NEEDED
169 /* Save MEMs needed to copy from one class of registers to another. One MEM
170 is used per mode, but normally only one or two modes are ever used.
172 We keep two versions, before and after register elimination. The one
173 after register elimination is record separately for each operand. This
174 is done in case the address is not valid to be sure that we separately
177 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
178 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
181 /* The instruction we are doing reloads for;
182 so we can test whether a register dies in it. */
183 static rtx this_insn
;
185 /* Nonzero if this instruction is a user-specified asm with operands. */
186 static int this_insn_is_asm
;
188 /* If hard_regs_live_known is nonzero,
189 we can tell which hard regs are currently live,
190 at least enough to succeed in choosing dummy reloads. */
191 static int hard_regs_live_known
;
193 /* Indexed by hard reg number,
194 element is nonnegative if hard reg has been spilled.
195 This vector is passed to `find_reloads' as an argument
196 and is not changed here. */
197 static short *static_reload_reg_p
;
199 /* Set to 1 in subst_reg_equivs if it changes anything. */
200 static int subst_reg_equivs_changed
;
202 /* On return from push_reload, holds the reload-number for the OUT
203 operand, which can be different for that from the input operand. */
204 static int output_reloadnum
;
206 /* Compare two RTX's. */
207 #define MATCHES(x, y) \
208 (x == y || (x != 0 && (GET_CODE (x) == REG \
209 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
210 : rtx_equal_p (x, y) && ! side_effects_p (x))))
212 /* Indicates if two reloads purposes are for similar enough things that we
213 can merge their reloads. */
214 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
215 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
216 || ((when1) == (when2) && (op1) == (op2)) \
217 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
218 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
219 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
220 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
221 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
223 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
224 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
225 ((when1) != (when2) \
226 || ! ((op1) == (op2) \
227 || (when1) == RELOAD_FOR_INPUT \
228 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
229 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
231 /* If we are going to reload an address, compute the reload type to
233 #define ADDR_TYPE(type) \
234 ((type) == RELOAD_FOR_INPUT_ADDRESS \
235 ? RELOAD_FOR_INPADDR_ADDRESS \
236 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
237 ? RELOAD_FOR_OUTADDR_ADDRESS \
240 #ifdef HAVE_SECONDARY_RELOADS
241 static int push_secondary_reload
PARAMS ((int, rtx
, int, int, enum reg_class
,
242 enum machine_mode
, enum reload_type
,
245 static enum reg_class find_valid_class
PARAMS ((enum machine_mode
, int));
246 static int reload_inner_reg_of_subreg
PARAMS ((rtx
, enum machine_mode
));
247 static int push_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
248 enum machine_mode
, enum machine_mode
,
249 int, int, int, enum reload_type
));
250 static void push_replacement
PARAMS ((rtx
*, int, enum machine_mode
));
251 static void combine_reloads
PARAMS ((void));
252 static int find_reusable_reload
PARAMS ((rtx
*, rtx
, enum reg_class
,
253 enum reload_type
, int, int));
254 static rtx find_dummy_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*,
255 enum machine_mode
, enum machine_mode
,
256 enum reg_class
, int, int));
257 static int hard_reg_set_here_p
PARAMS ((unsigned int, unsigned int, rtx
));
258 static struct decomposition decompose
PARAMS ((rtx
));
259 static int immune_p
PARAMS ((rtx
, rtx
, struct decomposition
));
260 static int alternative_allows_memconst
PARAMS ((const char *, int));
261 static rtx find_reloads_toplev
PARAMS ((rtx
, int, enum reload_type
, int,
263 static rtx make_memloc
PARAMS ((rtx
, int));
264 static int find_reloads_address
PARAMS ((enum machine_mode
, rtx
*, rtx
, rtx
*,
265 int, enum reload_type
, int, rtx
));
266 static rtx subst_reg_equivs
PARAMS ((rtx
, rtx
));
267 static rtx subst_indexed_address
PARAMS ((rtx
));
268 static int find_reloads_address_1
PARAMS ((enum machine_mode
, rtx
, int, rtx
*,
269 int, enum reload_type
,int, rtx
));
270 static void find_reloads_address_part
PARAMS ((rtx
, rtx
*, enum reg_class
,
271 enum machine_mode
, int,
272 enum reload_type
, int));
273 static rtx find_reloads_subreg_address
PARAMS ((rtx
, int, int, enum reload_type
,
275 static int find_inc_amount
PARAMS ((rtx
, rtx
));
277 #ifdef HAVE_SECONDARY_RELOADS
279 /* Determine if any secondary reloads are needed for loading (if IN_P is
280 non-zero) or storing (if IN_P is zero) X to or from a reload register of
281 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
282 are needed, push them.
284 Return the reload number of the secondary reload we made, or -1 if
285 we didn't need one. *PICODE is set to the insn_code to use if we do
286 need a secondary reload. */
289 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
295 enum reg_class reload_class
;
296 enum machine_mode reload_mode
;
297 enum reload_type type
;
298 enum insn_code
*picode
;
300 enum reg_class
class = NO_REGS
;
301 enum machine_mode mode
= reload_mode
;
302 enum insn_code icode
= CODE_FOR_nothing
;
303 enum reg_class t_class
= NO_REGS
;
304 enum machine_mode t_mode
= VOIDmode
;
305 enum insn_code t_icode
= CODE_FOR_nothing
;
306 enum reload_type secondary_type
;
307 int s_reload
, t_reload
= -1;
309 if (type
== RELOAD_FOR_INPUT_ADDRESS
310 || type
== RELOAD_FOR_OUTPUT_ADDRESS
311 || type
== RELOAD_FOR_INPADDR_ADDRESS
312 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
313 secondary_type
= type
;
315 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
317 *picode
= CODE_FOR_nothing
;
319 /* If X is a paradoxical SUBREG, use the inner value to determine both the
320 mode and object being reloaded. */
321 if (GET_CODE (x
) == SUBREG
322 && (GET_MODE_SIZE (GET_MODE (x
))
323 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
326 reload_mode
= GET_MODE (x
);
329 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
330 is still a pseudo-register by now, it *must* have an equivalent MEM
331 but we don't want to assume that), use that equivalent when seeing if
332 a secondary reload is needed since whether or not a reload is needed
333 might be sensitive to the form of the MEM. */
335 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
336 && reg_equiv_mem
[REGNO (x
)] != 0)
337 x
= reg_equiv_mem
[REGNO (x
)];
339 #ifdef SECONDARY_INPUT_RELOAD_CLASS
341 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
344 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
346 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
349 /* If we don't need any secondary registers, done. */
350 if (class == NO_REGS
)
353 /* Get a possible insn to use. If the predicate doesn't accept X, don't
356 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
357 : reload_out_optab
[(int) reload_mode
]);
359 if (icode
!= CODE_FOR_nothing
360 && insn_data
[(int) icode
].operand
[in_p
].predicate
361 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
362 icode
= CODE_FOR_nothing
;
364 /* If we will be using an insn, see if it can directly handle the reload
365 register we will be using. If it can, the secondary reload is for a
366 scratch register. If it can't, we will use the secondary reload for
367 an intermediate register and require a tertiary reload for the scratch
370 if (icode
!= CODE_FOR_nothing
)
372 /* If IN_P is non-zero, the reload register will be the output in
373 operand 0. If IN_P is zero, the reload register will be the input
374 in operand 1. Outputs should have an initial "=", which we must
378 = insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
379 enum reg_class insn_class
380 = (insn_letter
== 'r' ? GENERAL_REGS
381 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter
));
383 if (insn_class
== NO_REGS
385 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
386 /* The scratch register's constraint must start with "=&". */
387 || insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
388 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
391 if (reg_class_subset_p (reload_class
, insn_class
))
392 mode
= insn_data
[(int) icode
].operand
[2].mode
;
395 char t_letter
= insn_data
[(int) icode
].operand
[2].constraint
[2];
397 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
398 t_class
= (t_letter
== 'r' ? GENERAL_REGS
399 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter
));
401 icode
= CODE_FOR_nothing
;
404 secondary_type
= in_p
? RELOAD_FOR_INPUT
: RELOAD_FOR_OUTPUT
;
407 /* This case isn't valid, so fail. Reload is allowed to use the same
408 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
409 in the case of a secondary register, we actually need two different
410 registers for correct code. We fail here to prevent the possibility of
411 silently generating incorrect code later.
413 The convention is that secondary input reloads are valid only if the
414 secondary_class is different from class. If you have such a case, you
415 can not use secondary reloads, you must work around the problem some
418 Allow this when MODE is not reload_mode and assume that the generated
419 code handles this case (it does on the Alpha, which is the only place
420 this currently happens). */
422 if (in_p
&& class == reload_class
&& mode
== reload_mode
)
425 /* If we need a tertiary reload, see if we have one we can reuse or else
428 if (t_class
!= NO_REGS
)
430 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
431 if (rld
[t_reload
].secondary_p
432 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
433 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
434 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
435 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
436 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
437 == CODE_FOR_nothing
))
438 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
439 == CODE_FOR_nothing
)))
440 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
441 && MERGABLE_RELOADS (secondary_type
,
442 rld
[t_reload
].when_needed
,
443 opnum
, rld
[t_reload
].opnum
))
446 rld
[t_reload
].inmode
= t_mode
;
448 rld
[t_reload
].outmode
= t_mode
;
450 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
451 rld
[t_reload
].class = t_class
;
453 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
454 rld
[t_reload
].optional
&= optional
;
455 rld
[t_reload
].secondary_p
= 1;
456 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
457 opnum
, rld
[t_reload
].opnum
))
458 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
461 if (t_reload
== n_reloads
)
463 /* We need to make a new tertiary reload for this register class. */
464 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
465 rld
[t_reload
].class = t_class
;
466 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
467 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
468 rld
[t_reload
].reg_rtx
= 0;
469 rld
[t_reload
].optional
= optional
;
470 rld
[t_reload
].inc
= 0;
471 /* Maybe we could combine these, but it seems too tricky. */
472 rld
[t_reload
].nocombine
= 1;
473 rld
[t_reload
].in_reg
= 0;
474 rld
[t_reload
].out_reg
= 0;
475 rld
[t_reload
].opnum
= opnum
;
476 rld
[t_reload
].when_needed
= secondary_type
;
477 rld
[t_reload
].secondary_in_reload
= -1;
478 rld
[t_reload
].secondary_out_reload
= -1;
479 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
480 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
481 rld
[t_reload
].secondary_p
= 1;
487 /* See if we can reuse an existing secondary reload. */
488 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
489 if (rld
[s_reload
].secondary_p
490 && (reg_class_subset_p (class, rld
[s_reload
].class)
491 || reg_class_subset_p (rld
[s_reload
].class, class))
492 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
493 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
494 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
495 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
496 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
497 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
498 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
499 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
500 opnum
, rld
[s_reload
].opnum
))
503 rld
[s_reload
].inmode
= mode
;
505 rld
[s_reload
].outmode
= mode
;
507 if (reg_class_subset_p (class, rld
[s_reload
].class))
508 rld
[s_reload
].class = class;
510 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
511 rld
[s_reload
].optional
&= optional
;
512 rld
[s_reload
].secondary_p
= 1;
513 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
514 opnum
, rld
[s_reload
].opnum
))
515 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
518 if (s_reload
== n_reloads
)
520 #ifdef SECONDARY_MEMORY_NEEDED
521 /* If we need a memory location to copy between the two reload regs,
522 set it up now. Note that we do the input case before making
523 the reload and the output case after. This is due to the
524 way reloads are output. */
526 if (in_p
&& icode
== CODE_FOR_nothing
527 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
529 get_secondary_mem (x
, reload_mode
, opnum
, type
);
531 /* We may have just added new reloads. Make sure we add
532 the new reload at the end. */
533 s_reload
= n_reloads
;
537 /* We need to make a new secondary reload for this register class. */
538 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
539 rld
[s_reload
].class = class;
541 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
542 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
543 rld
[s_reload
].reg_rtx
= 0;
544 rld
[s_reload
].optional
= optional
;
545 rld
[s_reload
].inc
= 0;
546 /* Maybe we could combine these, but it seems too tricky. */
547 rld
[s_reload
].nocombine
= 1;
548 rld
[s_reload
].in_reg
= 0;
549 rld
[s_reload
].out_reg
= 0;
550 rld
[s_reload
].opnum
= opnum
;
551 rld
[s_reload
].when_needed
= secondary_type
;
552 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
553 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
554 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
555 rld
[s_reload
].secondary_out_icode
556 = ! in_p
? t_icode
: CODE_FOR_nothing
;
557 rld
[s_reload
].secondary_p
= 1;
561 #ifdef SECONDARY_MEMORY_NEEDED
562 if (! in_p
&& icode
== CODE_FOR_nothing
563 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
564 get_secondary_mem (x
, mode
, opnum
, type
);
571 #endif /* HAVE_SECONDARY_RELOADS */
573 #ifdef SECONDARY_MEMORY_NEEDED
575 /* Return a memory location that will be used to copy X in mode MODE.
576 If we haven't already made a location for this mode in this insn,
577 call find_reloads_address on the location being returned. */
580 get_secondary_mem (x
, mode
, opnum
, type
)
581 rtx x ATTRIBUTE_UNUSED
;
582 enum machine_mode mode
;
584 enum reload_type type
;
589 /* By default, if MODE is narrower than a word, widen it to a word.
590 This is required because most machines that require these memory
591 locations do not support short load and stores from all registers
592 (e.g., FP registers). */
594 #ifdef SECONDARY_MEMORY_NEEDED_MODE
595 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
597 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
598 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
601 /* If we already have made a MEM for this operand in MODE, return it. */
602 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
603 return secondary_memlocs_elim
[(int) mode
][opnum
];
605 /* If this is the first time we've tried to get a MEM for this mode,
606 allocate a new one. `something_changed' in reload will get set
607 by noticing that the frame size has changed. */
609 if (secondary_memlocs
[(int) mode
] == 0)
611 #ifdef SECONDARY_MEMORY_NEEDED_RTX
612 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
614 secondary_memlocs
[(int) mode
]
615 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
619 /* Get a version of the address doing any eliminations needed. If that
620 didn't give us a new MEM, make a new one if it isn't valid. */
622 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
623 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
625 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
626 loc
= copy_rtx (loc
);
628 /* The only time the call below will do anything is if the stack
629 offset is too large. In that case IND_LEVELS doesn't matter, so we
630 can just pass a zero. Adjust the type to be the address of the
631 corresponding object. If the address was valid, save the eliminated
632 address. If it wasn't valid, we need to make a reload each time, so
637 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
638 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
641 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
645 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
649 /* Clear any secondary memory locations we've made. */
652 clear_secondary_mem ()
654 bzero ((char *) secondary_memlocs
, sizeof secondary_memlocs
);
656 #endif /* SECONDARY_MEMORY_NEEDED */
658 /* Find the largest class for which every register number plus N is valid in
659 M1 (if in range). Abort if no such class exists. */
661 static enum reg_class
662 find_valid_class (m1
, n
)
663 enum machine_mode m1 ATTRIBUTE_UNUSED
;
668 enum reg_class best_class
= NO_REGS
;
669 unsigned int best_size
= 0;
671 for (class = 1; class < N_REG_CLASSES
; class++)
674 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
675 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
676 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
677 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
680 if (! bad
&& reg_class_size
[class] > best_size
)
681 best_class
= class, best_size
= reg_class_size
[class];
690 /* Return the number of a previously made reload that can be combined with
691 a new one, or n_reloads if none of the existing reloads can be used.
692 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
693 push_reload, they determine the kind of the new reload that we try to
694 combine. P_IN points to the corresponding value of IN, which can be
695 modified by this function.
696 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
698 find_reusable_reload (p_in
, out
, class, type
, opnum
, dont_share
)
700 enum reg_class
class;
701 enum reload_type type
;
702 int opnum
, dont_share
;
706 /* We can't merge two reloads if the output of either one is
709 if (earlyclobber_operand_p (out
))
712 /* We can use an existing reload if the class is right
713 and at least one of IN and OUT is a match
714 and the other is at worst neutral.
715 (A zero compared against anything is neutral.)
717 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
718 for the same thing since that can cause us to need more reload registers
719 than we otherwise would. */
721 for (i
= 0; i
< n_reloads
; i
++)
722 if ((reg_class_subset_p (class, rld
[i
].class)
723 || reg_class_subset_p (rld
[i
].class, class))
724 /* If the existing reload has a register, it must fit our class. */
725 && (rld
[i
].reg_rtx
== 0
726 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
727 true_regnum (rld
[i
].reg_rtx
)))
728 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
729 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
730 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
731 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
732 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
733 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
734 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
737 /* Reloading a plain reg for input can match a reload to postincrement
738 that reg, since the postincrement's value is the right value.
739 Likewise, it can match a preincrement reload, since we regard
740 the preincrementation as happening before any ref in this insn
742 for (i
= 0; i
< n_reloads
; i
++)
743 if ((reg_class_subset_p (class, rld
[i
].class)
744 || reg_class_subset_p (rld
[i
].class, class))
745 /* If the existing reload has a register, it must fit our
747 && (rld
[i
].reg_rtx
== 0
748 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
749 true_regnum (rld
[i
].reg_rtx
)))
750 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
751 && ((GET_CODE (in
) == REG
752 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == 'a'
753 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
754 || (GET_CODE (rld
[i
].in
) == REG
755 && GET_RTX_CLASS (GET_CODE (in
)) == 'a'
756 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
757 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
758 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
759 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
760 opnum
, rld
[i
].opnum
))
762 /* Make sure reload_in ultimately has the increment,
763 not the plain register. */
764 if (GET_CODE (in
) == REG
)
771 /* Return nonzero if X is a SUBREG which will require reloading of its
772 SUBREG_REG expression. */
775 reload_inner_reg_of_subreg (x
, mode
)
777 enum machine_mode mode
;
781 /* Only SUBREGs are problematical. */
782 if (GET_CODE (x
) != SUBREG
)
785 inner
= SUBREG_REG (x
);
787 /* If INNER is a constant, then INNER must be reloaded. */
788 if (CONSTANT_P (inner
))
791 /* If INNER is not a hard register, then INNER will not need to
793 if (GET_CODE (inner
) != REG
794 || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
797 /* If INNER is not ok for MODE, then INNER will need reloading. */
798 if (! HARD_REGNO_MODE_OK (REGNO (inner
) + SUBREG_WORD (x
), mode
))
801 /* If the outer part is a word or smaller, INNER larger than a
802 word and the number of regs for INNER is not the same as the
803 number of words in INNER, then INNER will need reloading. */
804 return (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
805 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
806 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
807 != HARD_REGNO_NREGS (REGNO (inner
), GET_MODE (inner
))));
810 /* Record one reload that needs to be performed.
811 IN is an rtx saying where the data are to be found before this instruction.
812 OUT says where they must be stored after the instruction.
813 (IN is zero for data not read, and OUT is zero for data not written.)
814 INLOC and OUTLOC point to the places in the instructions where
815 IN and OUT were found.
816 If IN and OUT are both non-zero, it means the same register must be used
817 to reload both IN and OUT.
819 CLASS is a register class required for the reloaded data.
820 INMODE is the machine mode that the instruction requires
821 for the reg that replaces IN and OUTMODE is likewise for OUT.
823 If IN is zero, then OUT's location and mode should be passed as
826 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
828 OPTIONAL nonzero means this reload does not need to be performed:
829 it can be discarded if that is more convenient.
831 OPNUM and TYPE say what the purpose of this reload is.
833 The return value is the reload-number for this reload.
835 If both IN and OUT are nonzero, in some rare cases we might
836 want to make two separate reloads. (Actually we never do this now.)
837 Therefore, the reload-number for OUT is stored in
838 output_reloadnum when we return; the return value applies to IN.
839 Usually (presently always), when IN and OUT are nonzero,
840 the two reload-numbers are equal, but the caller should be careful to
844 push_reload (in
, out
, inloc
, outloc
, class,
845 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
848 enum reg_class
class;
849 enum machine_mode inmode
, outmode
;
853 enum reload_type type
;
857 int dont_remove_subreg
= 0;
858 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
859 int secondary_in_reload
= -1, secondary_out_reload
= -1;
860 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
861 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
863 /* INMODE and/or OUTMODE could be VOIDmode if no mode
864 has been specified for the operand. In that case,
865 use the operand's mode as the mode to reload. */
866 if (inmode
== VOIDmode
&& in
!= 0)
867 inmode
= GET_MODE (in
);
868 if (outmode
== VOIDmode
&& out
!= 0)
869 outmode
= GET_MODE (out
);
871 /* If IN is a pseudo register everywhere-equivalent to a constant, and
872 it is not in a hard register, reload straight from the constant,
873 since we want to get rid of such pseudo registers.
874 Often this is done earlier, but not always in find_reloads_address. */
875 if (in
!= 0 && GET_CODE (in
) == REG
)
877 register int regno
= REGNO (in
);
879 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
880 && reg_equiv_constant
[regno
] != 0)
881 in
= reg_equiv_constant
[regno
];
884 /* Likewise for OUT. Of course, OUT will never be equivalent to
885 an actual constant, but it might be equivalent to a memory location
886 (in the case of a parameter). */
887 if (out
!= 0 && GET_CODE (out
) == REG
)
889 register int regno
= REGNO (out
);
891 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
892 && reg_equiv_constant
[regno
] != 0)
893 out
= reg_equiv_constant
[regno
];
896 /* If we have a read-write operand with an address side-effect,
897 change either IN or OUT so the side-effect happens only once. */
898 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
900 if (GET_CODE (XEXP (in
, 0)) == POST_INC
901 || GET_CODE (XEXP (in
, 0)) == POST_DEC
902 || GET_CODE (XEXP (in
, 0)) == POST_MODIFY
)
904 rtx
new = gen_rtx_MEM (GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
906 MEM_COPY_ATTRIBUTES (new, in
);
909 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
910 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
911 || GET_CODE (XEXP (in
, 0)) == PRE_MODIFY
)
913 rtx
new = gen_rtx_MEM (GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
915 MEM_COPY_ATTRIBUTES (new, out
);
920 /* If we are reloading a (SUBREG constant ...), really reload just the
921 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
922 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
923 a pseudo and hence will become a MEM) with M1 wider than M2 and the
924 register is a pseudo, also reload the inside expression.
925 For machines that extend byte loads, do this for any SUBREG of a pseudo
926 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
927 M2 is an integral mode that gets extended when loaded.
928 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
929 either M1 is not valid for R or M2 is wider than a word but we only
930 need one word to store an M2-sized quantity in R.
931 (However, if OUT is nonzero, we need to reload the reg *and*
932 the subreg, so do nothing here, and let following statement handle it.)
934 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
935 we can't handle it here because CONST_INT does not indicate a mode.
937 Similarly, we must reload the inside expression if we have a
938 STRICT_LOW_PART (presumably, in == out in the cas).
940 Also reload the inner expression if it does not require a secondary
941 reload but the SUBREG does.
943 Finally, reload the inner expression if it is a register that is in
944 the class whose registers cannot be referenced in a different size
945 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
946 cannot reload just the inside since we might end up with the wrong
947 register class. But if it is inside a STRICT_LOW_PART, we have
948 no choice, so we hope we do get the right register class there. */
950 if (in
!= 0 && GET_CODE (in
) == SUBREG
951 && (SUBREG_WORD (in
) == 0 || strict_low
)
952 #ifdef CLASS_CANNOT_CHANGE_MODE
953 && class != CLASS_CANNOT_CHANGE_MODE
955 && (CONSTANT_P (SUBREG_REG (in
))
956 || GET_CODE (SUBREG_REG (in
)) == PLUS
958 || (((GET_CODE (SUBREG_REG (in
)) == REG
959 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
960 || GET_CODE (SUBREG_REG (in
)) == MEM
)
961 && ((GET_MODE_SIZE (inmode
)
962 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
963 #ifdef LOAD_EXTEND_OP
964 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
965 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
967 && (GET_MODE_SIZE (inmode
)
968 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
969 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
970 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
972 #ifdef WORD_REGISTER_OPERATIONS
973 || ((GET_MODE_SIZE (inmode
)
974 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
975 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
976 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
980 || (GET_CODE (SUBREG_REG (in
)) == REG
981 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
982 /* The case where out is nonzero
983 is handled differently in the following statement. */
984 && (out
== 0 || SUBREG_WORD (in
) == 0)
985 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
986 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
988 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
990 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
991 GET_MODE (SUBREG_REG (in
)))))
992 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in
))
995 #ifdef SECONDARY_INPUT_RELOAD_CLASS
996 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
997 && (SECONDARY_INPUT_RELOAD_CLASS (class,
998 GET_MODE (SUBREG_REG (in
)),
1002 #ifdef CLASS_CANNOT_CHANGE_MODE
1003 || (GET_CODE (SUBREG_REG (in
)) == REG
1004 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1005 && (TEST_HARD_REG_BIT
1006 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1007 REGNO (SUBREG_REG (in
))))
1008 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)),
1013 in_subreg_loc
= inloc
;
1014 inloc
= &SUBREG_REG (in
);
1016 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1017 if (GET_CODE (in
) == MEM
)
1018 /* This is supposed to happen only for paradoxical subregs made by
1019 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1020 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
1023 inmode
= GET_MODE (in
);
1026 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1027 either M1 is not valid for R or M2 is wider than a word but we only
1028 need one word to store an M2-sized quantity in R.
1030 However, we must reload the inner reg *as well as* the subreg in
1033 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1034 code above. This can happen if SUBREG_WORD != 0. */
1036 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
))
1038 /* This relies on the fact that emit_reload_insns outputs the
1039 instructions for input reloads of type RELOAD_OTHER in the same
1040 order as the reloads. Thus if the outer reload is also of type
1041 RELOAD_OTHER, we are guaranteed that this inner reload will be
1042 output before the outer reload. */
1043 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), NULL_PTR
,
1044 find_valid_class (inmode
, SUBREG_WORD (in
)),
1045 VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1046 dont_remove_subreg
= 1;
1049 /* Similarly for paradoxical and problematical SUBREGs on the output.
1050 Note that there is no reason we need worry about the previous value
1051 of SUBREG_REG (out); even if wider than out,
1052 storing in a subreg is entitled to clobber it all
1053 (except in the case of STRICT_LOW_PART,
1054 and in that case the constraint should label it input-output.) */
1055 if (out
!= 0 && GET_CODE (out
) == SUBREG
1056 && (SUBREG_WORD (out
) == 0 || strict_low
)
1057 #ifdef CLASS_CANNOT_CHANGE_MODE
1058 && class != CLASS_CANNOT_CHANGE_MODE
1060 && (CONSTANT_P (SUBREG_REG (out
))
1062 || (((GET_CODE (SUBREG_REG (out
)) == REG
1063 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1064 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1065 && ((GET_MODE_SIZE (outmode
)
1066 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1067 #ifdef WORD_REGISTER_OPERATIONS
1068 || ((GET_MODE_SIZE (outmode
)
1069 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1070 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1071 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1075 || (GET_CODE (SUBREG_REG (out
)) == REG
1076 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1077 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1078 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1080 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1082 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1083 GET_MODE (SUBREG_REG (out
)))))
1084 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out
))
1085 + SUBREG_WORD (out
)),
1087 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1088 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1089 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1090 GET_MODE (SUBREG_REG (out
)),
1094 #ifdef CLASS_CANNOT_CHANGE_MODE
1095 || (GET_CODE (SUBREG_REG (out
)) == REG
1096 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1097 && (TEST_HARD_REG_BIT
1098 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1099 REGNO (SUBREG_REG (out
))))
1100 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1105 out_subreg_loc
= outloc
;
1106 outloc
= &SUBREG_REG (out
);
1108 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1109 if (GET_CODE (out
) == MEM
1110 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1113 outmode
= GET_MODE (out
);
1116 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1117 either M1 is not valid for R or M2 is wider than a word but we only
1118 need one word to store an M2-sized quantity in R.
1120 However, we must reload the inner reg *as well as* the subreg in
1121 that case. In this case, the inner reg is an in-out reload. */
1123 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
))
1125 /* This relies on the fact that emit_reload_insns outputs the
1126 instructions for output reloads of type RELOAD_OTHER in reverse
1127 order of the reloads. Thus if the outer reload is also of type
1128 RELOAD_OTHER, we are guaranteed that this inner reload will be
1129 output after the outer reload. */
1130 dont_remove_subreg
= 1;
1131 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1133 find_valid_class (outmode
, SUBREG_WORD (out
)),
1134 VOIDmode
, VOIDmode
, 0, 0,
1135 opnum
, RELOAD_OTHER
);
1138 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1139 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1140 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1141 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1144 /* If IN is a SUBREG of a hard register, make a new REG. This
1145 simplifies some of the cases below. */
1147 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1148 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1149 && ! dont_remove_subreg
)
1150 in
= gen_rtx_REG (GET_MODE (in
),
1151 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
1153 /* Similarly for OUT. */
1154 if (out
!= 0 && GET_CODE (out
) == SUBREG
1155 && GET_CODE (SUBREG_REG (out
)) == REG
1156 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1157 && ! dont_remove_subreg
)
1158 out
= gen_rtx_REG (GET_MODE (out
),
1159 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
1161 /* Narrow down the class of register wanted if that is
1162 desirable on this machine for efficiency. */
1164 class = PREFERRED_RELOAD_CLASS (in
, class);
1166 /* Output reloads may need analogous treatment, different in detail. */
1167 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1169 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1172 /* Make sure we use a class that can handle the actual pseudo
1173 inside any subreg. For example, on the 386, QImode regs
1174 can appear within SImode subregs. Although GENERAL_REGS
1175 can handle SImode, QImode needs a smaller class. */
1176 #ifdef LIMIT_RELOAD_CLASS
1178 class = LIMIT_RELOAD_CLASS (inmode
, class);
1179 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1180 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1183 class = LIMIT_RELOAD_CLASS (outmode
, class);
1184 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1185 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1188 /* Verify that this class is at least possible for the mode that
1190 if (this_insn_is_asm
)
1192 enum machine_mode mode
;
1193 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1197 if (mode
== VOIDmode
)
1199 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1204 outmode
= word_mode
;
1206 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1207 if (HARD_REGNO_MODE_OK (i
, mode
)
1208 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1210 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1213 for (j
= 1; j
< nregs
; j
++)
1214 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1219 if (i
== FIRST_PSEUDO_REGISTER
)
1221 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1226 /* Optional output reloads are always OK even if we have no register class,
1227 since the function of these reloads is only to have spill_reg_store etc.
1228 set, so that the storing insn can be deleted later. */
1229 if (class == NO_REGS
1230 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1233 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1237 /* See if we need a secondary reload register to move between CLASS
1238 and IN or CLASS and OUT. Get the icode and push any required reloads
1239 needed for each of them if so. */
1241 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1244 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1245 &secondary_in_icode
);
1248 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1249 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1250 secondary_out_reload
1251 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1252 type
, &secondary_out_icode
);
1255 /* We found no existing reload suitable for re-use.
1256 So add an additional reload. */
1258 #ifdef SECONDARY_MEMORY_NEEDED
1259 /* If a memory location is needed for the copy, make one. */
1260 if (in
!= 0 && GET_CODE (in
) == REG
1261 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1262 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1264 get_secondary_mem (in
, inmode
, opnum
, type
);
1270 rld
[i
].class = class;
1271 rld
[i
].inmode
= inmode
;
1272 rld
[i
].outmode
= outmode
;
1274 rld
[i
].optional
= optional
;
1276 rld
[i
].nocombine
= 0;
1277 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1278 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1279 rld
[i
].opnum
= opnum
;
1280 rld
[i
].when_needed
= type
;
1281 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1282 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1283 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1284 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1285 rld
[i
].secondary_p
= 0;
1289 #ifdef SECONDARY_MEMORY_NEEDED
1290 if (out
!= 0 && GET_CODE (out
) == REG
1291 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1292 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1294 get_secondary_mem (out
, outmode
, opnum
, type
);
1299 /* We are reusing an existing reload,
1300 but we may have additional information for it.
1301 For example, we may now have both IN and OUT
1302 while the old one may have just one of them. */
1304 /* The modes can be different. If they are, we want to reload in
1305 the larger mode, so that the value is valid for both modes. */
1306 if (inmode
!= VOIDmode
1307 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1308 rld
[i
].inmode
= inmode
;
1309 if (outmode
!= VOIDmode
1310 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1311 rld
[i
].outmode
= outmode
;
1314 rtx in_reg
= inloc
? *inloc
: 0;
1315 /* If we merge reloads for two distinct rtl expressions that
1316 are identical in content, there might be duplicate address
1317 reloads. Remove the extra set now, so that if we later find
1318 that we can inherit this reload, we can get rid of the
1319 address reloads altogether.
1321 Do not do this if both reloads are optional since the result
1322 would be an optional reload which could potentially leave
1323 unresolved address replacements.
1325 It is not sufficient to call transfer_replacements since
1326 choose_reload_regs will remove the replacements for address
1327 reloads of inherited reloads which results in the same
1329 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1330 && ! (rld
[i
].optional
&& optional
))
1332 /* We must keep the address reload with the lower operand
1334 if (opnum
> rld
[i
].opnum
)
1336 remove_address_replacements (in
);
1338 in_reg
= rld
[i
].in_reg
;
1341 remove_address_replacements (rld
[i
].in
);
1344 rld
[i
].in_reg
= in_reg
;
1349 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1351 if (reg_class_subset_p (class, rld
[i
].class))
1352 rld
[i
].class = class;
1353 rld
[i
].optional
&= optional
;
1354 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1355 opnum
, rld
[i
].opnum
))
1356 rld
[i
].when_needed
= RELOAD_OTHER
;
1357 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1360 /* If the ostensible rtx being reload differs from the rtx found
1361 in the location to substitute, this reload is not safe to combine
1362 because we cannot reliably tell whether it appears in the insn. */
1364 if (in
!= 0 && in
!= *inloc
)
1365 rld
[i
].nocombine
= 1;
1368 /* This was replaced by changes in find_reloads_address_1 and the new
1369 function inc_for_reload, which go with a new meaning of reload_inc. */
1371 /* If this is an IN/OUT reload in an insn that sets the CC,
1372 it must be for an autoincrement. It doesn't work to store
1373 the incremented value after the insn because that would clobber the CC.
1374 So we must do the increment of the value reloaded from,
1375 increment it, store it back, then decrement again. */
1376 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1380 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1381 /* If we did not find a nonzero amount-to-increment-by,
1382 that contradicts the belief that IN is being incremented
1383 in an address in this insn. */
1384 if (rld
[i
].inc
== 0)
1389 /* If we will replace IN and OUT with the reload-reg,
1390 record where they are located so that substitution need
1391 not do a tree walk. */
1393 if (replace_reloads
)
1397 register struct replacement
*r
= &replacements
[n_replacements
++];
1399 r
->subreg_loc
= in_subreg_loc
;
1403 if (outloc
!= 0 && outloc
!= inloc
)
1405 register struct replacement
*r
= &replacements
[n_replacements
++];
1408 r
->subreg_loc
= out_subreg_loc
;
1413 /* If this reload is just being introduced and it has both
1414 an incoming quantity and an outgoing quantity that are
1415 supposed to be made to match, see if either one of the two
1416 can serve as the place to reload into.
1418 If one of them is acceptable, set rld[i].reg_rtx
1421 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1423 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1426 earlyclobber_operand_p (out
));
1428 /* If the outgoing register already contains the same value
1429 as the incoming one, we can dispense with loading it.
1430 The easiest way to tell the caller that is to give a phony
1431 value for the incoming operand (same as outgoing one). */
1432 if (rld
[i
].reg_rtx
== out
1433 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1434 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1435 static_reload_reg_p
, i
, inmode
))
1439 /* If this is an input reload and the operand contains a register that
1440 dies in this insn and is used nowhere else, see if it is the right class
1441 to be used for this reload. Use it if so. (This occurs most commonly
1442 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1443 this if it is also an output reload that mentions the register unless
1444 the output is a SUBREG that clobbers an entire register.
1446 Note that the operand might be one of the spill regs, if it is a
1447 pseudo reg and we are in a block where spilling has not taken place.
1448 But if there is no spilling in this block, that is OK.
1449 An explicitly used hard reg cannot be a spill reg. */
1451 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1456 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1457 if (REG_NOTE_KIND (note
) == REG_DEAD
1458 && GET_CODE (XEXP (note
, 0)) == REG
1459 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1460 && reg_mentioned_p (XEXP (note
, 0), in
)
1461 && ! refers_to_regno_for_reload_p (regno
,
1463 + HARD_REGNO_NREGS (regno
,
1465 PATTERN (this_insn
), inloc
)
1466 /* If this is also an output reload, IN cannot be used as
1467 the reload register if it is set in this insn unless IN
1469 && (out
== 0 || in
== out
1470 || ! hard_reg_set_here_p (regno
,
1472 + HARD_REGNO_NREGS (regno
,
1474 PATTERN (this_insn
)))
1475 /* ??? Why is this code so different from the previous?
1476 Is there any simple coherent way to describe the two together?
1477 What's going on here. */
1479 || (GET_CODE (in
) == SUBREG
1480 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1482 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1483 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1484 /* Make sure the operand fits in the reg that dies. */
1485 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1486 && HARD_REGNO_MODE_OK (regno
, inmode
)
1487 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1488 && HARD_REGNO_MODE_OK (regno
, outmode
))
1491 unsigned int nregs
= MAX (HARD_REGNO_NREGS (regno
, inmode
),
1492 HARD_REGNO_NREGS (regno
, outmode
));
1494 for (offs
= 0; offs
< nregs
; offs
++)
1495 if (fixed_regs
[regno
+ offs
]
1496 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1502 rld
[i
].reg_rtx
= gen_rtx_REG (inmode
, regno
);
1509 output_reloadnum
= i
;
1514 /* Record an additional place we must replace a value
1515 for which we have already recorded a reload.
1516 RELOADNUM is the value returned by push_reload
1517 when the reload was recorded.
1518 This is used in insn patterns that use match_dup. */
1521 push_replacement (loc
, reloadnum
, mode
)
1524 enum machine_mode mode
;
1526 if (replace_reloads
)
1528 register struct replacement
*r
= &replacements
[n_replacements
++];
1529 r
->what
= reloadnum
;
1536 /* Transfer all replacements that used to be in reload FROM to be in
1540 transfer_replacements (to
, from
)
1545 for (i
= 0; i
< n_replacements
; i
++)
1546 if (replacements
[i
].what
== from
)
1547 replacements
[i
].what
= to
;
1550 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1551 or a subpart of it. If we have any replacements registered for IN_RTX,
1552 cancel the reloads that were supposed to load them.
1553 Return non-zero if we canceled any reloads. */
1555 remove_address_replacements (in_rtx
)
1559 char reload_flags
[MAX_RELOADS
];
1560 int something_changed
= 0;
1562 bzero (reload_flags
, sizeof reload_flags
);
1563 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1565 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1566 reload_flags
[replacements
[i
].what
] |= 1;
1569 replacements
[j
++] = replacements
[i
];
1570 reload_flags
[replacements
[i
].what
] |= 2;
1573 /* Note that the following store must be done before the recursive calls. */
1576 for (i
= n_reloads
- 1; i
>= 0; i
--)
1578 if (reload_flags
[i
] == 1)
1580 deallocate_reload_reg (i
);
1581 remove_address_replacements (rld
[i
].in
);
1583 something_changed
= 1;
1586 return something_changed
;
1589 /* If there is only one output reload, and it is not for an earlyclobber
1590 operand, try to combine it with a (logically unrelated) input reload
1591 to reduce the number of reload registers needed.
1593 This is safe if the input reload does not appear in
1594 the value being output-reloaded, because this implies
1595 it is not needed any more once the original insn completes.
1597 If that doesn't work, see we can use any of the registers that
1598 die in this insn as a reload register. We can if it is of the right
1599 class and does not appear in the value being output-reloaded. */
1605 int output_reload
= -1;
1606 int secondary_out
= -1;
1609 /* Find the output reload; return unless there is exactly one
1610 and that one is mandatory. */
1612 for (i
= 0; i
< n_reloads
; i
++)
1613 if (rld
[i
].out
!= 0)
1615 if (output_reload
>= 0)
1620 if (output_reload
< 0 || rld
[output_reload
].optional
)
1623 /* An input-output reload isn't combinable. */
1625 if (rld
[output_reload
].in
!= 0)
1628 /* If this reload is for an earlyclobber operand, we can't do anything. */
1629 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1632 /* Check each input reload; can we combine it? */
1634 for (i
= 0; i
< n_reloads
; i
++)
1635 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1636 /* Life span of this reload must not extend past main insn. */
1637 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1638 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1639 && rld
[i
].when_needed
!= RELOAD_OTHER
1640 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1641 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1642 rld
[output_reload
].outmode
))
1644 && rld
[i
].reg_rtx
== 0
1645 #ifdef SECONDARY_MEMORY_NEEDED
1646 /* Don't combine two reloads with different secondary
1647 memory locations. */
1648 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1649 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1650 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1651 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1653 && (SMALL_REGISTER_CLASSES
1654 ? (rld
[i
].class == rld
[output_reload
].class)
1655 : (reg_class_subset_p (rld
[i
].class,
1656 rld
[output_reload
].class)
1657 || reg_class_subset_p (rld
[output_reload
].class,
1659 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1660 /* Args reversed because the first arg seems to be
1661 the one that we imagine being modified
1662 while the second is the one that might be affected. */
1663 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1665 /* However, if the input is a register that appears inside
1666 the output, then we also can't share.
1667 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1668 If the same reload reg is used for both reg 69 and the
1669 result to be stored in memory, then that result
1670 will clobber the address of the memory ref. */
1671 && ! (GET_CODE (rld
[i
].in
) == REG
1672 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1673 rld
[output_reload
].out
))))
1674 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
)
1675 && (reg_class_size
[(int) rld
[i
].class]
1676 || SMALL_REGISTER_CLASSES
)
1677 /* We will allow making things slightly worse by combining an
1678 input and an output, but no worse than that. */
1679 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1680 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1684 /* We have found a reload to combine with! */
1685 rld
[i
].out
= rld
[output_reload
].out
;
1686 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1687 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1688 /* Mark the old output reload as inoperative. */
1689 rld
[output_reload
].out
= 0;
1690 /* The combined reload is needed for the entire insn. */
1691 rld
[i
].when_needed
= RELOAD_OTHER
;
1692 /* If the output reload had a secondary reload, copy it. */
1693 if (rld
[output_reload
].secondary_out_reload
!= -1)
1695 rld
[i
].secondary_out_reload
1696 = rld
[output_reload
].secondary_out_reload
;
1697 rld
[i
].secondary_out_icode
1698 = rld
[output_reload
].secondary_out_icode
;
1701 #ifdef SECONDARY_MEMORY_NEEDED
1702 /* Copy any secondary MEM. */
1703 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1704 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1705 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1707 /* If required, minimize the register class. */
1708 if (reg_class_subset_p (rld
[output_reload
].class,
1710 rld
[i
].class = rld
[output_reload
].class;
1712 /* Transfer all replacements from the old reload to the combined. */
1713 for (j
= 0; j
< n_replacements
; j
++)
1714 if (replacements
[j
].what
== output_reload
)
1715 replacements
[j
].what
= i
;
1720 /* If this insn has only one operand that is modified or written (assumed
1721 to be the first), it must be the one corresponding to this reload. It
1722 is safe to use anything that dies in this insn for that output provided
1723 that it does not occur in the output (we already know it isn't an
1724 earlyclobber. If this is an asm insn, give up. */
1726 if (INSN_CODE (this_insn
) == -1)
1729 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1730 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1731 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1734 /* See if some hard register that dies in this insn and is not used in
1735 the output is the right class. Only works if the register we pick
1736 up can fully hold our output reload. */
1737 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1738 if (REG_NOTE_KIND (note
) == REG_DEAD
1739 && GET_CODE (XEXP (note
, 0)) == REG
1740 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1741 rld
[output_reload
].out
)
1742 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1743 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1744 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1745 REGNO (XEXP (note
, 0)))
1746 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1747 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1748 /* Ensure that a secondary or tertiary reload for this output
1749 won't want this register. */
1750 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1751 || (! (TEST_HARD_REG_BIT
1752 (reg_class_contents
[(int) rld
[secondary_out
].class],
1753 REGNO (XEXP (note
, 0))))
1754 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1755 || ! (TEST_HARD_REG_BIT
1756 (reg_class_contents
[(int) rld
[secondary_out
].class],
1757 REGNO (XEXP (note
, 0)))))))
1758 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1760 rld
[output_reload
].reg_rtx
1761 = gen_rtx_REG (rld
[output_reload
].outmode
,
1762 REGNO (XEXP (note
, 0)));
1767 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1768 See if one of IN and OUT is a register that may be used;
1769 this is desirable since a spill-register won't be needed.
1770 If so, return the register rtx that proves acceptable.
1772 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1773 CLASS is the register class required for the reload.
1775 If FOR_REAL is >= 0, it is the number of the reload,
1776 and in some cases when it can be discovered that OUT doesn't need
1777 to be computed, clear out rld[FOR_REAL].out.
1779 If FOR_REAL is -1, this should not be done, because this call
1780 is just to see if a register can be found, not to find and install it.
1782 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1783 puts an additional constraint on being able to use IN for OUT since
1784 IN must not appear elsewhere in the insn (it is assumed that IN itself
1785 is safe from the earlyclobber). */
1788 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1789 inmode
, outmode
, class, for_real
, earlyclobber
)
1790 rtx real_in
, real_out
;
1791 rtx
*inloc
, *outloc
;
1792 enum machine_mode inmode
, outmode
;
1793 enum reg_class
class;
1803 /* If operands exceed a word, we can't use either of them
1804 unless they have the same size. */
1805 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1806 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1807 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1810 /* Find the inside of any subregs. */
1811 while (GET_CODE (out
) == SUBREG
)
1813 out_offset
= SUBREG_WORD (out
);
1814 out
= SUBREG_REG (out
);
1816 while (GET_CODE (in
) == SUBREG
)
1818 in_offset
= SUBREG_WORD (in
);
1819 in
= SUBREG_REG (in
);
1822 /* Narrow down the reg class, the same way push_reload will;
1823 otherwise we might find a dummy now, but push_reload won't. */
1824 class = PREFERRED_RELOAD_CLASS (in
, class);
1826 /* See if OUT will do. */
1827 if (GET_CODE (out
) == REG
1828 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1830 unsigned int regno
= REGNO (out
) + out_offset
;
1831 unsigned int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1834 /* When we consider whether the insn uses OUT,
1835 ignore references within IN. They don't prevent us
1836 from copying IN into OUT, because those refs would
1837 move into the insn that reloads IN.
1839 However, we only ignore IN in its role as this reload.
1840 If the insn uses IN elsewhere and it contains OUT,
1841 that counts. We can't be sure it's the "same" operand
1842 so it might not go through this reload. */
1844 *inloc
= const0_rtx
;
1846 if (regno
< FIRST_PSEUDO_REGISTER
1847 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1848 PATTERN (this_insn
), outloc
))
1852 for (i
= 0; i
< nwords
; i
++)
1853 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1859 if (GET_CODE (real_out
) == REG
)
1862 value
= gen_rtx_REG (outmode
, regno
);
1869 /* Consider using IN if OUT was not acceptable
1870 or if OUT dies in this insn (like the quotient in a divmod insn).
1871 We can't use IN unless it is dies in this insn,
1872 which means we must know accurately which hard regs are live.
1873 Also, the result can't go in IN if IN is used within OUT,
1874 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1875 if (hard_regs_live_known
1876 && GET_CODE (in
) == REG
1877 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1879 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1880 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1881 && !fixed_regs
[REGNO (in
)]
1882 && HARD_REGNO_MODE_OK (REGNO (in
),
1883 /* The only case where out and real_out might
1884 have different modes is where real_out
1885 is a subreg, and in that case, out
1887 (GET_MODE (out
) != VOIDmode
1888 ? GET_MODE (out
) : outmode
)))
1890 unsigned int regno
= REGNO (in
) + in_offset
;
1891 unsigned int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1893 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1894 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1895 PATTERN (this_insn
))
1897 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1898 PATTERN (this_insn
), inloc
)))
1902 for (i
= 0; i
< nwords
; i
++)
1903 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1909 /* If we were going to use OUT as the reload reg
1910 and changed our mind, it means OUT is a dummy that
1911 dies here. So don't bother copying value to it. */
1912 if (for_real
>= 0 && value
== real_out
)
1913 rld
[for_real
].out
= 0;
1914 if (GET_CODE (real_in
) == REG
)
1917 value
= gen_rtx_REG (inmode
, regno
);
1925 /* This page contains subroutines used mainly for determining
1926 whether the IN or an OUT of a reload can serve as the
1929 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1932 earlyclobber_operand_p (x
)
1937 for (i
= 0; i
< n_earlyclobbers
; i
++)
1938 if (reload_earlyclobbers
[i
] == x
)
1944 /* Return 1 if expression X alters a hard reg in the range
1945 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1946 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1947 X should be the body of an instruction. */
1950 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1951 unsigned int beg_regno
, end_regno
;
1954 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1956 register rtx op0
= SET_DEST (x
);
1958 while (GET_CODE (op0
) == SUBREG
)
1959 op0
= SUBREG_REG (op0
);
1960 if (GET_CODE (op0
) == REG
)
1962 unsigned int r
= REGNO (op0
);
1964 /* See if this reg overlaps range under consideration. */
1966 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1970 else if (GET_CODE (x
) == PARALLEL
)
1972 register int i
= XVECLEN (x
, 0) - 1;
1975 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1982 /* Return 1 if ADDR is a valid memory address for mode MODE,
1983 and check that each pseudo reg has the proper kind of
1987 strict_memory_address_p (mode
, addr
)
1988 enum machine_mode mode ATTRIBUTE_UNUSED
;
1991 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1998 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1999 if they are the same hard reg, and has special hacks for
2000 autoincrement and autodecrement.
2001 This is specifically intended for find_reloads to use
2002 in determining whether two operands match.
2003 X is the operand whose number is the lower of the two.
2005 The value is 2 if Y contains a pre-increment that matches
2006 a non-incrementing address in X. */
2008 /* ??? To be completely correct, we should arrange to pass
2009 for X the output operand and for Y the input operand.
2010 For now, we assume that the output operand has the lower number
2011 because that is natural in (SET output (... input ...)). */
2014 operands_match_p (x
, y
)
2018 register RTX_CODE code
= GET_CODE (x
);
2019 register const char *fmt
;
2024 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
2025 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
2026 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2032 i
= REGNO (SUBREG_REG (x
));
2033 if (i
>= FIRST_PSEUDO_REGISTER
)
2035 i
+= SUBREG_WORD (x
);
2040 if (GET_CODE (y
) == SUBREG
)
2042 j
= REGNO (SUBREG_REG (y
));
2043 if (j
>= FIRST_PSEUDO_REGISTER
)
2045 j
+= SUBREG_WORD (y
);
2050 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2051 multiple hard register group, so that for example (reg:DI 0) and
2052 (reg:SI 1) will be considered the same register. */
2053 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2054 && i
< FIRST_PSEUDO_REGISTER
)
2055 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
2056 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2057 && j
< FIRST_PSEUDO_REGISTER
)
2058 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
2062 /* If two operands must match, because they are really a single
2063 operand of an assembler insn, then two postincrements are invalid
2064 because the assembler insn would increment only once.
2065 On the other hand, an postincrement matches ordinary indexing
2066 if the postincrement is the output operand. */
2067 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2068 return operands_match_p (XEXP (x
, 0), y
);
2069 /* Two preincrements are invalid
2070 because the assembler insn would increment only once.
2071 On the other hand, an preincrement matches ordinary indexing
2072 if the preincrement is the input operand.
2073 In this case, return 2, since some callers need to do special
2074 things when this happens. */
2075 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2076 || GET_CODE (y
) == PRE_MODIFY
)
2077 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2081 /* Now we have disposed of all the cases
2082 in which different rtx codes can match. */
2083 if (code
!= GET_CODE (y
))
2085 if (code
== LABEL_REF
)
2086 return XEXP (x
, 0) == XEXP (y
, 0);
2087 if (code
== SYMBOL_REF
)
2088 return XSTR (x
, 0) == XSTR (y
, 0);
2090 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2092 if (GET_MODE (x
) != GET_MODE (y
))
2095 /* Compare the elements. If any pair of corresponding elements
2096 fail to match, return 0 for the whole things. */
2099 fmt
= GET_RTX_FORMAT (code
);
2100 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2106 if (XWINT (x
, i
) != XWINT (y
, i
))
2111 if (XINT (x
, i
) != XINT (y
, i
))
2116 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2119 /* If any subexpression returns 2,
2120 we should return 2 if we are successful. */
2129 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2131 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2133 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2141 /* It is believed that rtx's at this level will never
2142 contain anything but integers and other rtx's,
2143 except for within LABEL_REFs and SYMBOL_REFs. */
2148 return 1 + success_2
;
2151 /* Describe the range of registers or memory referenced by X.
2152 If X is a register, set REG_FLAG and put the first register
2153 number into START and the last plus one into END.
2154 If X is a memory reference, put a base address into BASE
2155 and a range of integer offsets into START and END.
2156 If X is pushing on the stack, we can assume it causes no trouble,
2157 so we set the SAFE field. */
2159 static struct decomposition
2163 struct decomposition val
;
2169 if (GET_CODE (x
) == MEM
)
2171 rtx base
= NULL_RTX
, offset
= 0;
2172 rtx addr
= XEXP (x
, 0);
2174 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2175 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2177 val
.base
= XEXP (addr
, 0);
2178 val
.start
= - GET_MODE_SIZE (GET_MODE (x
));
2179 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2180 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2184 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2186 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2187 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2188 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2190 val
.base
= XEXP (addr
, 0);
2191 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2192 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2193 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2198 if (GET_CODE (addr
) == CONST
)
2200 addr
= XEXP (addr
, 0);
2203 if (GET_CODE (addr
) == PLUS
)
2205 if (CONSTANT_P (XEXP (addr
, 0)))
2207 base
= XEXP (addr
, 1);
2208 offset
= XEXP (addr
, 0);
2210 else if (CONSTANT_P (XEXP (addr
, 1)))
2212 base
= XEXP (addr
, 0);
2213 offset
= XEXP (addr
, 1);
2220 offset
= const0_rtx
;
2222 if (GET_CODE (offset
) == CONST
)
2223 offset
= XEXP (offset
, 0);
2224 if (GET_CODE (offset
) == PLUS
)
2226 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2228 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2229 offset
= XEXP (offset
, 0);
2231 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2233 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2234 offset
= XEXP (offset
, 1);
2238 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2239 offset
= const0_rtx
;
2242 else if (GET_CODE (offset
) != CONST_INT
)
2244 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2245 offset
= const0_rtx
;
2248 if (all_const
&& GET_CODE (base
) == PLUS
)
2249 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2251 if (GET_CODE (offset
) != CONST_INT
)
2254 val
.start
= INTVAL (offset
);
2255 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2259 else if (GET_CODE (x
) == REG
)
2262 val
.start
= true_regnum (x
);
2265 /* A pseudo with no hard reg. */
2266 val
.start
= REGNO (x
);
2267 val
.end
= val
.start
+ 1;
2271 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2273 else if (GET_CODE (x
) == SUBREG
)
2275 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2276 /* This could be more precise, but it's good enough. */
2277 return decompose (SUBREG_REG (x
));
2279 val
.start
= true_regnum (x
);
2281 return decompose (SUBREG_REG (x
));
2284 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2286 else if (CONSTANT_P (x
)
2287 /* This hasn't been assigned yet, so it can't conflict yet. */
2288 || GET_CODE (x
) == SCRATCH
)
2295 /* Return 1 if altering Y will not modify the value of X.
2296 Y is also described by YDATA, which should be decompose (Y). */
2299 immune_p (x
, y
, ydata
)
2301 struct decomposition ydata
;
2303 struct decomposition xdata
;
2306 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
2310 if (GET_CODE (y
) != MEM
)
2312 /* If Y is memory and X is not, Y can't affect X. */
2313 if (GET_CODE (x
) != MEM
)
2316 xdata
= decompose (x
);
2318 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2320 /* If bases are distinct symbolic constants, there is no overlap. */
2321 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2323 /* Constants and stack slots never overlap. */
2324 if (CONSTANT_P (xdata
.base
)
2325 && (ydata
.base
== frame_pointer_rtx
2326 || ydata
.base
== hard_frame_pointer_rtx
2327 || ydata
.base
== stack_pointer_rtx
))
2329 if (CONSTANT_P (ydata
.base
)
2330 && (xdata
.base
== frame_pointer_rtx
2331 || xdata
.base
== hard_frame_pointer_rtx
2332 || xdata
.base
== stack_pointer_rtx
))
2334 /* If either base is variable, we don't know anything. */
2339 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2342 /* Similar, but calls decompose. */
2345 safe_from_earlyclobber (op
, clobber
)
2348 struct decomposition early_data
;
2350 early_data
= decompose (clobber
);
2351 return immune_p (op
, clobber
, early_data
);
2354 /* Main entry point of this file: search the body of INSN
2355 for values that need reloading and record them with push_reload.
2356 REPLACE nonzero means record also where the values occur
2357 so that subst_reloads can be used.
2359 IND_LEVELS says how many levels of indirection are supported by this
2360 machine; a value of zero means that a memory reference is not a valid
2363 LIVE_KNOWN says we have valid information about which hard
2364 regs are live at each point in the program; this is true when
2365 we are called from global_alloc but false when stupid register
2366 allocation has been done.
2368 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2369 which is nonnegative if the reg has been commandeered for reloading into.
2370 It is copied into STATIC_RELOAD_REG_P and referenced from there
2371 by various subroutines.
2373 Return TRUE if some operands need to be changed, because of swapping
2374 commutative operands, reg_equiv_address substitution, or whatever. */
2377 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2379 int replace
, ind_levels
;
2381 short *reload_reg_p
;
2383 register int insn_code_number
;
2386 /* These start out as the constraints for the insn
2387 and they are chewed up as we consider alternatives. */
2388 char *constraints
[MAX_RECOG_OPERANDS
];
2389 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2391 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2392 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2393 /* Nonzero for a MEM operand whose entire address needs a reload. */
2394 int address_reloaded
[MAX_RECOG_OPERANDS
];
2395 /* Value of enum reload_type to use for operand. */
2396 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2397 /* Value of enum reload_type to use within address of operand. */
2398 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2399 /* Save the usage of each operand. */
2400 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2401 int no_input_reloads
= 0, no_output_reloads
= 0;
2403 int this_alternative
[MAX_RECOG_OPERANDS
];
2404 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2405 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2406 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2407 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2409 int goal_alternative
[MAX_RECOG_OPERANDS
];
2410 int this_alternative_number
;
2411 int goal_alternative_number
= 0;
2412 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2413 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2414 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2415 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2416 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2417 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2418 int goal_alternative_swapped
;
2421 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2422 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2423 rtx body
= PATTERN (insn
);
2424 rtx set
= single_set (insn
);
2425 int goal_earlyclobber
= 0, this_earlyclobber
;
2426 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2432 n_earlyclobbers
= 0;
2433 replace_reloads
= replace
;
2434 hard_regs_live_known
= live_known
;
2435 static_reload_reg_p
= reload_reg_p
;
2437 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2438 neither are insns that SET cc0. Insns that use CC0 are not allowed
2439 to have any input reloads. */
2440 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2441 no_output_reloads
= 1;
2444 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2445 no_input_reloads
= 1;
2446 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2447 no_output_reloads
= 1;
2450 #ifdef SECONDARY_MEMORY_NEEDED
2451 /* The eliminated forms of any secondary memory locations are per-insn, so
2452 clear them out here. */
2454 bzero ((char *) secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2457 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2458 is cheap to move between them. If it is not, there may not be an insn
2459 to do the copy, so we may need a reload. */
2460 if (GET_CODE (body
) == SET
2461 && GET_CODE (SET_DEST (body
)) == REG
2462 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2463 && GET_CODE (SET_SRC (body
)) == REG
2464 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2465 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2466 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2469 extract_insn (insn
);
2471 noperands
= reload_n_operands
= recog_data
.n_operands
;
2472 n_alternatives
= recog_data
.n_alternatives
;
2474 /* Just return "no reloads" if insn has no operands with constraints. */
2475 if (noperands
== 0 || n_alternatives
== 0)
2478 insn_code_number
= INSN_CODE (insn
);
2479 this_insn_is_asm
= insn_code_number
< 0;
2481 memcpy (operand_mode
, recog_data
.operand_mode
,
2482 noperands
* sizeof (enum machine_mode
));
2483 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2487 /* If we will need to know, later, whether some pair of operands
2488 are the same, we must compare them now and save the result.
2489 Reloading the base and index registers will clobber them
2490 and afterward they will fail to match. */
2492 for (i
= 0; i
< noperands
; i
++)
2497 substed_operand
[i
] = recog_data
.operand
[i
];
2500 modified
[i
] = RELOAD_READ
;
2502 /* Scan this operand's constraint to see if it is an output operand,
2503 an in-out operand, is commutative, or should match another. */
2508 modified
[i
] = RELOAD_WRITE
;
2510 modified
[i
] = RELOAD_READ_WRITE
;
2513 /* The last operand should not be marked commutative. */
2514 if (i
== noperands
- 1)
2519 else if (c
>= '0' && c
<= '9')
2522 operands_match
[c
][i
]
2523 = operands_match_p (recog_data
.operand
[c
],
2524 recog_data
.operand
[i
]);
2526 /* An operand may not match itself. */
2530 /* If C can be commuted with C+1, and C might need to match I,
2531 then C+1 might also need to match I. */
2532 if (commutative
>= 0)
2534 if (c
== commutative
|| c
== commutative
+ 1)
2536 int other
= c
+ (c
== commutative
? 1 : -1);
2537 operands_match
[other
][i
]
2538 = operands_match_p (recog_data
.operand
[other
],
2539 recog_data
.operand
[i
]);
2541 if (i
== commutative
|| i
== commutative
+ 1)
2543 int other
= i
+ (i
== commutative
? 1 : -1);
2544 operands_match
[c
][other
]
2545 = operands_match_p (recog_data
.operand
[c
],
2546 recog_data
.operand
[other
]);
2548 /* Note that C is supposed to be less than I.
2549 No need to consider altering both C and I because in
2550 that case we would alter one into the other. */
2556 /* Examine each operand that is a memory reference or memory address
2557 and reload parts of the addresses into index registers.
2558 Also here any references to pseudo regs that didn't get hard regs
2559 but are equivalent to constants get replaced in the insn itself
2560 with those constants. Nobody will ever see them again.
2562 Finally, set up the preferred classes of each operand. */
2564 for (i
= 0; i
< noperands
; i
++)
2566 register RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2568 address_reloaded
[i
] = 0;
2569 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2570 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2573 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2574 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2577 if (*constraints
[i
] == 0)
2578 /* Ignore things like match_operator operands. */
2580 else if (constraints
[i
][0] == 'p')
2582 find_reloads_address (VOIDmode
, NULL_PTR
,
2583 recog_data
.operand
[i
],
2584 recog_data
.operand_loc
[i
],
2585 i
, operand_type
[i
], ind_levels
, insn
);
2587 /* If we now have a simple operand where we used to have a
2588 PLUS or MULT, re-recognize and try again. */
2589 if ((GET_RTX_CLASS (GET_CODE (*recog_data
.operand_loc
[i
])) == 'o'
2590 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2591 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2592 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2594 INSN_CODE (insn
) = -1;
2595 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2600 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2601 substed_operand
[i
] = recog_data
.operand
[i
];
2603 else if (code
== MEM
)
2606 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2607 recog_data
.operand_loc
[i
],
2608 XEXP (recog_data
.operand
[i
], 0),
2609 &XEXP (recog_data
.operand
[i
], 0),
2610 i
, address_type
[i
], ind_levels
, insn
);
2611 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2612 substed_operand
[i
] = recog_data
.operand
[i
];
2614 else if (code
== SUBREG
)
2616 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2618 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2621 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2623 &address_reloaded
[i
]);
2625 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2626 that didn't get a hard register, emit a USE with a REG_EQUAL
2627 note in front so that we might inherit a previous, possibly
2631 && GET_CODE (op
) == MEM
2632 && GET_CODE (reg
) == REG
2633 && (GET_MODE_SIZE (GET_MODE (reg
))
2634 >= GET_MODE_SIZE (GET_MODE (op
))))
2635 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
), insn
))
2636 = gen_rtx_EXPR_LIST (REG_EQUAL
,
2637 reg_equiv_memory_loc
[REGNO (reg
)], NULL_RTX
);
2639 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2641 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2642 /* We can get a PLUS as an "operand" as a result of register
2643 elimination. See eliminate_regs and gen_reload. We handle
2644 a unary operator by reloading the operand. */
2645 substed_operand
[i
] = recog_data
.operand
[i
]
2646 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2647 ind_levels
, 0, insn
,
2648 &address_reloaded
[i
]);
2649 else if (code
== REG
)
2651 /* This is equivalent to calling find_reloads_toplev.
2652 The code is duplicated for speed.
2653 When we find a pseudo always equivalent to a constant,
2654 we replace it by the constant. We must be sure, however,
2655 that we don't try to replace it in the insn in which it
2657 register int regno
= REGNO (recog_data
.operand
[i
]);
2658 if (reg_equiv_constant
[regno
] != 0
2659 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2661 /* Record the existing mode so that the check if constants are
2662 allowed will work when operand_mode isn't specified. */
2664 if (operand_mode
[i
] == VOIDmode
)
2665 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2667 substed_operand
[i
] = recog_data
.operand
[i
]
2668 = reg_equiv_constant
[regno
];
2670 if (reg_equiv_memory_loc
[regno
] != 0
2671 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2672 /* We need not give a valid is_set_dest argument since the case
2673 of a constant equivalence was checked above. */
2674 substed_operand
[i
] = recog_data
.operand
[i
]
2675 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2676 ind_levels
, 0, insn
,
2677 &address_reloaded
[i
]);
2679 /* If the operand is still a register (we didn't replace it with an
2680 equivalent), get the preferred class to reload it into. */
2681 code
= GET_CODE (recog_data
.operand
[i
]);
2683 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2684 >= FIRST_PSEUDO_REGISTER
)
2685 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2689 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2690 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2693 /* If this is simply a copy from operand 1 to operand 0, merge the
2694 preferred classes for the operands. */
2695 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2696 && recog_data
.operand
[1] == SET_SRC (set
))
2698 preferred_class
[0] = preferred_class
[1]
2699 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2700 pref_or_nothing
[0] |= pref_or_nothing
[1];
2701 pref_or_nothing
[1] |= pref_or_nothing
[0];
2704 /* Now see what we need for pseudo-regs that didn't get hard regs
2705 or got the wrong kind of hard reg. For this, we must consider
2706 all the operands together against the register constraints. */
2708 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2711 goal_alternative_swapped
= 0;
2714 /* The constraints are made of several alternatives.
2715 Each operand's constraint looks like foo,bar,... with commas
2716 separating the alternatives. The first alternatives for all
2717 operands go together, the second alternatives go together, etc.
2719 First loop over alternatives. */
2721 for (this_alternative_number
= 0;
2722 this_alternative_number
< n_alternatives
;
2723 this_alternative_number
++)
2725 /* Loop over operands for one constraint alternative. */
2726 /* LOSERS counts those that don't fit this alternative
2727 and would require loading. */
2729 /* BAD is set to 1 if it some operand can't fit this alternative
2730 even after reloading. */
2732 /* REJECT is a count of how undesirable this alternative says it is
2733 if any reloading is required. If the alternative matches exactly
2734 then REJECT is ignored, but otherwise it gets this much
2735 counted against it in addition to the reloading needed. Each
2736 ? counts three times here since we want the disparaging caused by
2737 a bad register class to only count 1/3 as much. */
2740 this_earlyclobber
= 0;
2742 for (i
= 0; i
< noperands
; i
++)
2744 register char *p
= constraints
[i
];
2745 register int win
= 0;
2746 /* 0 => this operand can be reloaded somehow for this alternative */
2748 /* 0 => this operand can be reloaded if the alternative allows regs. */
2751 register rtx operand
= recog_data
.operand
[i
];
2753 /* Nonzero means this is a MEM that must be reloaded into a reg
2754 regardless of what the constraint says. */
2755 int force_reload
= 0;
2757 /* Nonzero if a constant forced into memory would be OK for this
2760 int earlyclobber
= 0;
2762 /* If the predicate accepts a unary operator, it means that
2763 we need to reload the operand, but do not do this for
2764 match_operator and friends. */
2765 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1' && *p
!= 0)
2766 operand
= XEXP (operand
, 0);
2768 /* If the operand is a SUBREG, extract
2769 the REG or MEM (or maybe even a constant) within.
2770 (Constants can occur as a result of reg_equiv_constant.) */
2772 while (GET_CODE (operand
) == SUBREG
)
2774 offset
+= SUBREG_WORD (operand
);
2775 operand
= SUBREG_REG (operand
);
2776 /* Force reload if this is a constant or PLUS or if there may
2777 be a problem accessing OPERAND in the outer mode. */
2778 if (CONSTANT_P (operand
)
2779 || GET_CODE (operand
) == PLUS
2780 /* We must force a reload of paradoxical SUBREGs
2781 of a MEM because the alignment of the inner value
2782 may not be enough to do the outer reference. On
2783 big-endian machines, it may also reference outside
2786 On machines that extend byte operations and we have a
2787 SUBREG where both the inner and outer modes are no wider
2788 than a word and the inner mode is narrower, is integral,
2789 and gets extended when loaded from memory, combine.c has
2790 made assumptions about the behavior of the machine in such
2791 register access. If the data is, in fact, in memory we
2792 must always load using the size assumed to be in the
2793 register and let the insn do the different-sized
2796 This is doubly true if WORD_REGISTER_OPERATIONS. In
2797 this case eliminate_regs has left non-paradoxical
2798 subregs for push_reloads to see. Make sure it does
2799 by forcing the reload.
2801 ??? When is it right at this stage to have a subreg
2802 of a mem that is _not_ to be handled specialy? IMO
2803 those should have been reduced to just a mem. */
2804 || ((GET_CODE (operand
) == MEM
2805 || (GET_CODE (operand
)== REG
2806 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2807 #ifndef WORD_REGISTER_OPERATIONS
2808 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2809 < BIGGEST_ALIGNMENT
)
2810 && (GET_MODE_SIZE (operand_mode
[i
])
2811 > GET_MODE_SIZE (GET_MODE (operand
))))
2812 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2813 #ifdef LOAD_EXTEND_OP
2814 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2815 && (GET_MODE_SIZE (GET_MODE (operand
))
2817 && (GET_MODE_SIZE (operand_mode
[i
])
2818 > GET_MODE_SIZE (GET_MODE (operand
)))
2819 && INTEGRAL_MODE_P (GET_MODE (operand
))
2820 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2825 /* Subreg of a hard reg which can't handle the subreg's mode
2826 or which would handle that mode in the wrong number of
2827 registers for subregging to work. */
2828 || (GET_CODE (operand
) == REG
2829 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2830 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2831 && (GET_MODE_SIZE (GET_MODE (operand
))
2833 && ((GET_MODE_SIZE (GET_MODE (operand
))
2835 != HARD_REGNO_NREGS (REGNO (operand
),
2836 GET_MODE (operand
))))
2837 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2842 this_alternative
[i
] = (int) NO_REGS
;
2843 this_alternative_win
[i
] = 0;
2844 this_alternative_offmemok
[i
] = 0;
2845 this_alternative_earlyclobber
[i
] = 0;
2846 this_alternative_matches
[i
] = -1;
2848 /* An empty constraint or empty alternative
2849 allows anything which matched the pattern. */
2850 if (*p
== 0 || *p
== ',')
2853 /* Scan this alternative's specs for this operand;
2854 set WIN if the operand fits any letter in this alternative.
2855 Otherwise, clear BADOP if this operand could
2856 fit some letter after reloads,
2857 or set WINREG if this operand could fit after reloads
2858 provided the constraint allows some registers. */
2860 while (*p
&& (c
= *p
++) != ',')
2863 case '=': case '+': case '*':
2867 /* The last operand should not be marked commutative. */
2868 if (i
!= noperands
- 1)
2881 /* Ignore rest of this alternative as far as
2882 reloading is concerned. */
2883 while (*p
&& *p
!= ',') p
++;
2886 case '0': case '1': case '2': case '3': case '4':
2887 case '5': case '6': case '7': case '8': case '9':
2890 this_alternative_matches
[i
] = c
;
2891 /* We are supposed to match a previous operand.
2892 If we do, we win if that one did.
2893 If we do not, count both of the operands as losers.
2894 (This is too conservative, since most of the time
2895 only a single reload insn will be needed to make
2896 the two operands win. As a result, this alternative
2897 may be rejected when it is actually desirable.) */
2898 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2899 /* If we are matching as if two operands were swapped,
2900 also pretend that operands_match had been computed
2902 But if I is the second of those and C is the first,
2903 don't exchange them, because operands_match is valid
2904 only on one side of its diagonal. */
2906 [(c
== commutative
|| c
== commutative
+ 1)
2907 ? 2*commutative
+ 1 - c
: c
]
2908 [(i
== commutative
|| i
== commutative
+ 1)
2909 ? 2*commutative
+ 1 - i
: i
])
2910 : operands_match
[c
][i
])
2912 /* If we are matching a non-offsettable address where an
2913 offsettable address was expected, then we must reject
2914 this combination, because we can't reload it. */
2915 if (this_alternative_offmemok
[c
]
2916 && GET_CODE (recog_data
.operand
[c
]) == MEM
2917 && this_alternative
[c
] == (int) NO_REGS
2918 && ! this_alternative_win
[c
])
2921 win
= this_alternative_win
[c
];
2925 /* Operands don't match. */
2927 /* Retroactively mark the operand we had to match
2928 as a loser, if it wasn't already. */
2929 if (this_alternative_win
[c
])
2931 this_alternative_win
[c
] = 0;
2932 if (this_alternative
[c
] == (int) NO_REGS
)
2934 /* But count the pair only once in the total badness of
2935 this alternative, if the pair can be a dummy reload. */
2937 = find_dummy_reload (recog_data
.operand
[i
],
2938 recog_data
.operand
[c
],
2939 recog_data
.operand_loc
[i
],
2940 recog_data
.operand_loc
[c
],
2941 operand_mode
[i
], operand_mode
[c
],
2942 this_alternative
[c
], -1,
2943 this_alternative_earlyclobber
[c
]);
2948 /* This can be fixed with reloads if the operand
2949 we are supposed to match can be fixed with reloads. */
2951 this_alternative
[i
] = this_alternative
[c
];
2953 /* If we have to reload this operand and some previous
2954 operand also had to match the same thing as this
2955 operand, we don't know how to do that. So reject this
2957 if (! win
|| force_reload
)
2958 for (j
= 0; j
< i
; j
++)
2959 if (this_alternative_matches
[j
]
2960 == this_alternative_matches
[i
])
2966 /* All necessary reloads for an address_operand
2967 were handled in find_reloads_address. */
2968 this_alternative
[i
] = (int) BASE_REG_CLASS
;
2975 if (GET_CODE (operand
) == MEM
2976 || (GET_CODE (operand
) == REG
2977 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2978 && reg_renumber
[REGNO (operand
)] < 0))
2980 if (CONSTANT_P (operand
)
2981 /* force_const_mem does not accept HIGH. */
2982 && GET_CODE (operand
) != HIGH
)
2988 if (GET_CODE (operand
) == MEM
2989 && ! address_reloaded
[i
]
2990 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2991 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2996 if (GET_CODE (operand
) == MEM
2997 && ! address_reloaded
[i
]
2998 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2999 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3003 /* Memory operand whose address is not offsettable. */
3007 if (GET_CODE (operand
) == MEM
3008 && ! (ind_levels
? offsettable_memref_p (operand
)
3009 : offsettable_nonstrict_memref_p (operand
))
3010 /* Certain mem addresses will become offsettable
3011 after they themselves are reloaded. This is important;
3012 we don't want our own handling of unoffsettables
3013 to override the handling of reg_equiv_address. */
3014 && !(GET_CODE (XEXP (operand
, 0)) == REG
3016 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3020 /* Memory operand whose address is offsettable. */
3024 if ((GET_CODE (operand
) == MEM
3025 /* If IND_LEVELS, find_reloads_address won't reload a
3026 pseudo that didn't get a hard reg, so we have to
3027 reject that case. */
3028 && ((ind_levels
? offsettable_memref_p (operand
)
3029 : offsettable_nonstrict_memref_p (operand
))
3030 /* A reloaded address is offsettable because it is now
3031 just a simple register indirect. */
3032 || address_reloaded
[i
]))
3033 || (GET_CODE (operand
) == REG
3034 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3035 && reg_renumber
[REGNO (operand
)] < 0
3036 /* If reg_equiv_address is nonzero, we will be
3037 loading it into a register; hence it will be
3038 offsettable, but we cannot say that reg_equiv_mem
3039 is offsettable without checking. */
3040 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3041 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3042 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3044 /* force_const_mem does not accept HIGH. */
3045 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3046 || GET_CODE (operand
) == MEM
)
3053 /* Output operand that is stored before the need for the
3054 input operands (and their index registers) is over. */
3055 earlyclobber
= 1, this_earlyclobber
= 1;
3059 #ifndef REAL_ARITHMETIC
3060 /* Match any floating double constant, but only if
3061 we can examine the bits of it reliably. */
3062 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
3063 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
3064 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
3067 if (GET_CODE (operand
) == CONST_DOUBLE
)
3072 if (GET_CODE (operand
) == CONST_DOUBLE
)
3078 if (GET_CODE (operand
) == CONST_DOUBLE
3079 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
3084 if (GET_CODE (operand
) == CONST_INT
3085 || (GET_CODE (operand
) == CONST_DOUBLE
3086 && GET_MODE (operand
) == VOIDmode
))
3089 if (CONSTANT_P (operand
)
3090 #ifdef LEGITIMATE_PIC_OPERAND_P
3091 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3098 if (GET_CODE (operand
) == CONST_INT
3099 || (GET_CODE (operand
) == CONST_DOUBLE
3100 && GET_MODE (operand
) == VOIDmode
))
3112 if (GET_CODE (operand
) == CONST_INT
3113 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
3123 /* A PLUS is never a valid operand, but reload can make
3124 it from a register when eliminating registers. */
3125 && GET_CODE (operand
) != PLUS
3126 /* A SCRATCH is not a valid operand. */
3127 && GET_CODE (operand
) != SCRATCH
3128 #ifdef LEGITIMATE_PIC_OPERAND_P
3129 && (! CONSTANT_P (operand
)
3131 || LEGITIMATE_PIC_OPERAND_P (operand
))
3133 && (GENERAL_REGS
== ALL_REGS
3134 || GET_CODE (operand
) != REG
3135 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3136 && reg_renumber
[REGNO (operand
)] < 0)))
3138 /* Drop through into 'r' case */
3142 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3146 if (REG_CLASS_FROM_LETTER (c
) == NO_REGS
)
3148 #ifdef EXTRA_CONSTRAINT
3149 if (EXTRA_CONSTRAINT (operand
, c
))
3156 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
3158 if (GET_MODE (operand
) == BLKmode
)
3161 if (GET_CODE (operand
) == REG
3162 && reg_fits_class_p (operand
, this_alternative
[i
],
3163 offset
, GET_MODE (recog_data
.operand
[i
])))
3170 /* If this operand could be handled with a reg,
3171 and some reg is allowed, then this operand can be handled. */
3172 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3175 /* Record which operands fit this alternative. */
3176 this_alternative_earlyclobber
[i
] = earlyclobber
;
3177 if (win
&& ! force_reload
)
3178 this_alternative_win
[i
] = 1;
3181 int const_to_mem
= 0;
3183 this_alternative_offmemok
[i
] = offmemok
;
3187 /* Alternative loses if it has no regs for a reg operand. */
3188 if (GET_CODE (operand
) == REG
3189 && this_alternative
[i
] == (int) NO_REGS
3190 && this_alternative_matches
[i
] < 0)
3193 /* If this is a constant that is reloaded into the desired
3194 class by copying it to memory first, count that as another
3195 reload. This is consistent with other code and is
3196 required to avoid choosing another alternative when
3197 the constant is moved into memory by this function on
3198 an early reload pass. Note that the test here is
3199 precisely the same as in the code below that calls
3201 if (CONSTANT_P (operand
)
3202 /* force_const_mem does not accept HIGH. */
3203 && GET_CODE (operand
) != HIGH
3204 && ((PREFERRED_RELOAD_CLASS (operand
,
3205 (enum reg_class
) this_alternative
[i
])
3207 || no_input_reloads
)
3208 && operand_mode
[i
] != VOIDmode
)
3211 if (this_alternative
[i
] != (int) NO_REGS
)
3215 /* If we can't reload this value at all, reject this
3216 alternative. Note that we could also lose due to
3217 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3220 if (! CONSTANT_P (operand
)
3221 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3222 && (PREFERRED_RELOAD_CLASS (operand
,
3223 (enum reg_class
) this_alternative
[i
])
3227 /* Alternative loses if it requires a type of reload not
3228 permitted for this insn. We can always reload SCRATCH
3229 and objects with a REG_UNUSED note. */
3230 else if (GET_CODE (operand
) != SCRATCH
3231 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3232 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3234 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3239 /* We prefer to reload pseudos over reloading other things,
3240 since such reloads may be able to be eliminated later.
3241 If we are reloading a SCRATCH, we won't be generating any
3242 insns, just using a register, so it is also preferred.
3243 So bump REJECT in other cases. Don't do this in the
3244 case where we are forcing a constant into memory and
3245 it will then win since we don't want to have a different
3246 alternative match then. */
3247 if (! (GET_CODE (operand
) == REG
3248 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3249 && GET_CODE (operand
) != SCRATCH
3250 && ! (const_to_mem
&& constmemok
))
3253 /* Input reloads can be inherited more often than output
3254 reloads can be removed, so penalize output reloads. */
3255 if (operand_type
[i
] != RELOAD_FOR_INPUT
3256 && GET_CODE (operand
) != SCRATCH
)
3260 /* If this operand is a pseudo register that didn't get a hard
3261 reg and this alternative accepts some register, see if the
3262 class that we want is a subset of the preferred class for this
3263 register. If not, but it intersects that class, use the
3264 preferred class instead. If it does not intersect the preferred
3265 class, show that usage of this alternative should be discouraged;
3266 it will be discouraged more still if the register is `preferred
3267 or nothing'. We do this because it increases the chance of
3268 reusing our spill register in a later insn and avoiding a pair
3269 of memory stores and loads.
3271 Don't bother with this if this alternative will accept this
3274 Don't do this for a multiword operand, since it is only a
3275 small win and has the risk of requiring more spill registers,
3276 which could cause a large loss.
3278 Don't do this if the preferred class has only one register
3279 because we might otherwise exhaust the class. */
3282 if (! win
&& this_alternative
[i
] != (int) NO_REGS
3283 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3284 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3286 if (! reg_class_subset_p (this_alternative
[i
],
3287 preferred_class
[i
]))
3289 /* Since we don't have a way of forming the intersection,
3290 we just do something special if the preferred class
3291 is a subset of the class we have; that's the most
3292 common case anyway. */
3293 if (reg_class_subset_p (preferred_class
[i
],
3294 this_alternative
[i
]))
3295 this_alternative
[i
] = (int) preferred_class
[i
];
3297 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3302 /* Now see if any output operands that are marked "earlyclobber"
3303 in this alternative conflict with any input operands
3304 or any memory addresses. */
3306 for (i
= 0; i
< noperands
; i
++)
3307 if (this_alternative_earlyclobber
[i
]
3308 && this_alternative_win
[i
])
3310 struct decomposition early_data
;
3312 early_data
= decompose (recog_data
.operand
[i
]);
3314 if (modified
[i
] == RELOAD_READ
)
3317 if (this_alternative
[i
] == NO_REGS
)
3319 this_alternative_earlyclobber
[i
] = 0;
3320 if (this_insn_is_asm
)
3321 error_for_asm (this_insn
,
3322 "`&' constraint used with no register class");
3327 for (j
= 0; j
< noperands
; j
++)
3328 /* Is this an input operand or a memory ref? */
3329 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3330 || modified
[j
] != RELOAD_WRITE
)
3332 /* Ignore things like match_operator operands. */
3333 && *recog_data
.constraints
[j
] != 0
3334 /* Don't count an input operand that is constrained to match
3335 the early clobber operand. */
3336 && ! (this_alternative_matches
[j
] == i
3337 && rtx_equal_p (recog_data
.operand
[i
],
3338 recog_data
.operand
[j
]))
3339 /* Is it altered by storing the earlyclobber operand? */
3340 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3343 /* If the output is in a single-reg class,
3344 it's costly to reload it, so reload the input instead. */
3345 if (reg_class_size
[this_alternative
[i
]] == 1
3346 && (GET_CODE (recog_data
.operand
[j
]) == REG
3347 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3350 this_alternative_win
[j
] = 0;
3355 /* If an earlyclobber operand conflicts with something,
3356 it must be reloaded, so request this and count the cost. */
3360 this_alternative_win
[i
] = 0;
3361 for (j
= 0; j
< noperands
; j
++)
3362 if (this_alternative_matches
[j
] == i
3363 && this_alternative_win
[j
])
3365 this_alternative_win
[j
] = 0;
3371 /* If one alternative accepts all the operands, no reload required,
3372 choose that alternative; don't consider the remaining ones. */
3375 /* Unswap these so that they are never swapped at `finish'. */
3376 if (commutative
>= 0)
3378 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3379 recog_data
.operand
[commutative
+ 1]
3380 = substed_operand
[commutative
+ 1];
3382 for (i
= 0; i
< noperands
; i
++)
3384 goal_alternative_win
[i
] = 1;
3385 goal_alternative
[i
] = this_alternative
[i
];
3386 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3387 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3388 goal_alternative_earlyclobber
[i
]
3389 = this_alternative_earlyclobber
[i
];
3391 goal_alternative_number
= this_alternative_number
;
3392 goal_alternative_swapped
= swapped
;
3393 goal_earlyclobber
= this_earlyclobber
;
3397 /* REJECT, set by the ! and ? constraint characters and when a register
3398 would be reloaded into a non-preferred class, discourages the use of
3399 this alternative for a reload goal. REJECT is incremented by six
3400 for each ? and two for each non-preferred class. */
3401 losers
= losers
* 6 + reject
;
3403 /* If this alternative can be made to work by reloading,
3404 and it needs less reloading than the others checked so far,
3405 record it as the chosen goal for reloading. */
3406 if (! bad
&& best
> losers
)
3408 for (i
= 0; i
< noperands
; i
++)
3410 goal_alternative
[i
] = this_alternative
[i
];
3411 goal_alternative_win
[i
] = this_alternative_win
[i
];
3412 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3413 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3414 goal_alternative_earlyclobber
[i
]
3415 = this_alternative_earlyclobber
[i
];
3417 goal_alternative_swapped
= swapped
;
3419 goal_alternative_number
= this_alternative_number
;
3420 goal_earlyclobber
= this_earlyclobber
;
3424 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3425 then we need to try each alternative twice,
3426 the second time matching those two operands
3427 as if we had exchanged them.
3428 To do this, really exchange them in operands.
3430 If we have just tried the alternatives the second time,
3431 return operands to normal and drop through. */
3433 if (commutative
>= 0)
3438 register enum reg_class tclass
;
3441 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3442 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3444 tclass
= preferred_class
[commutative
];
3445 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3446 preferred_class
[commutative
+ 1] = tclass
;
3448 t
= pref_or_nothing
[commutative
];
3449 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3450 pref_or_nothing
[commutative
+ 1] = t
;
3452 memcpy (constraints
, recog_data
.constraints
,
3453 noperands
* sizeof (char *));
3458 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3459 recog_data
.operand
[commutative
+ 1]
3460 = substed_operand
[commutative
+ 1];
3464 /* The operands don't meet the constraints.
3465 goal_alternative describes the alternative
3466 that we could reach by reloading the fewest operands.
3467 Reload so as to fit it. */
3469 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3471 /* No alternative works with reloads?? */
3472 if (insn_code_number
>= 0)
3473 fatal_insn ("Unable to generate reloads for:", insn
);
3474 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3475 /* Avoid further trouble with this insn. */
3476 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3481 /* Jump to `finish' from above if all operands are valid already.
3482 In that case, goal_alternative_win is all 1. */
3485 /* Right now, for any pair of operands I and J that are required to match,
3487 goal_alternative_matches[J] is I.
3488 Set up goal_alternative_matched as the inverse function:
3489 goal_alternative_matched[I] = J. */
3491 for (i
= 0; i
< noperands
; i
++)
3492 goal_alternative_matched
[i
] = -1;
3494 for (i
= 0; i
< noperands
; i
++)
3495 if (! goal_alternative_win
[i
]
3496 && goal_alternative_matches
[i
] >= 0)
3497 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3499 /* If the best alternative is with operands 1 and 2 swapped,
3500 consider them swapped before reporting the reloads. Update the
3501 operand numbers of any reloads already pushed. */
3503 if (goal_alternative_swapped
)
3507 tem
= substed_operand
[commutative
];
3508 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3509 substed_operand
[commutative
+ 1] = tem
;
3510 tem
= recog_data
.operand
[commutative
];
3511 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3512 recog_data
.operand
[commutative
+ 1] = tem
;
3513 tem
= *recog_data
.operand_loc
[commutative
];
3514 *recog_data
.operand_loc
[commutative
]
3515 = *recog_data
.operand_loc
[commutative
+ 1];
3516 *recog_data
.operand_loc
[commutative
+1] = tem
;
3518 for (i
= 0; i
< n_reloads
; i
++)
3520 if (rld
[i
].opnum
== commutative
)
3521 rld
[i
].opnum
= commutative
+ 1;
3522 else if (rld
[i
].opnum
== commutative
+ 1)
3523 rld
[i
].opnum
= commutative
;
3527 for (i
= 0; i
< noperands
; i
++)
3529 operand_reloadnum
[i
] = -1;
3531 /* If this is an earlyclobber operand, we need to widen the scope.
3532 The reload must remain valid from the start of the insn being
3533 reloaded until after the operand is stored into its destination.
3534 We approximate this with RELOAD_OTHER even though we know that we
3535 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3537 One special case that is worth checking is when we have an
3538 output that is earlyclobber but isn't used past the insn (typically
3539 a SCRATCH). In this case, we only need have the reload live
3540 through the insn itself, but not for any of our input or output
3542 But we must not accidentally narrow the scope of an existing
3543 RELOAD_OTHER reload - leave these alone.
3545 In any case, anything needed to address this operand can remain
3546 however they were previously categorized. */
3548 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3550 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3551 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3554 /* Any constants that aren't allowed and can't be reloaded
3555 into registers are here changed into memory references. */
3556 for (i
= 0; i
< noperands
; i
++)
3557 if (! goal_alternative_win
[i
]
3558 && CONSTANT_P (recog_data
.operand
[i
])
3559 /* force_const_mem does not accept HIGH. */
3560 && GET_CODE (recog_data
.operand
[i
]) != HIGH
3561 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3562 (enum reg_class
) goal_alternative
[i
])
3564 || no_input_reloads
)
3565 && operand_mode
[i
] != VOIDmode
)
3567 substed_operand
[i
] = recog_data
.operand
[i
]
3568 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3569 recog_data
.operand
[i
]),
3570 i
, address_type
[i
], ind_levels
, 0, insn
,
3572 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3573 goal_alternative_number
))
3574 goal_alternative_win
[i
] = 1;
3577 /* Record the values of the earlyclobber operands for the caller. */
3578 if (goal_earlyclobber
)
3579 for (i
= 0; i
< noperands
; i
++)
3580 if (goal_alternative_earlyclobber
[i
])
3581 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3583 /* Now record reloads for all the operands that need them. */
3584 for (i
= 0; i
< noperands
; i
++)
3585 if (! goal_alternative_win
[i
])
3587 /* Operands that match previous ones have already been handled. */
3588 if (goal_alternative_matches
[i
] >= 0)
3590 /* Handle an operand with a nonoffsettable address
3591 appearing where an offsettable address will do
3592 by reloading the address into a base register.
3594 ??? We can also do this when the operand is a register and
3595 reg_equiv_mem is not offsettable, but this is a bit tricky,
3596 so we don't bother with it. It may not be worth doing. */
3597 else if (goal_alternative_matched
[i
] == -1
3598 && goal_alternative_offmemok
[i
]
3599 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3601 operand_reloadnum
[i
]
3602 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3603 &XEXP (recog_data
.operand
[i
], 0), NULL_PTR
,
3605 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3606 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3607 rld
[operand_reloadnum
[i
]].inc
3608 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3610 /* If this operand is an output, we will have made any
3611 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3612 now we are treating part of the operand as an input, so
3613 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3615 if (modified
[i
] == RELOAD_WRITE
)
3617 for (j
= 0; j
< n_reloads
; j
++)
3619 if (rld
[j
].opnum
== i
)
3621 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3622 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3623 else if (rld
[j
].when_needed
3624 == RELOAD_FOR_OUTADDR_ADDRESS
)
3625 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3630 else if (goal_alternative_matched
[i
] == -1)
3632 operand_reloadnum
[i
]
3633 = push_reload ((modified
[i
] != RELOAD_WRITE
3634 ? recog_data
.operand
[i
] : 0),
3635 (modified
[i
] != RELOAD_READ
3636 ? recog_data
.operand
[i
] : 0),
3637 (modified
[i
] != RELOAD_WRITE
3638 ? recog_data
.operand_loc
[i
] : 0),
3639 (modified
[i
] != RELOAD_READ
3640 ? recog_data
.operand_loc
[i
] : 0),
3641 (enum reg_class
) goal_alternative
[i
],
3642 (modified
[i
] == RELOAD_WRITE
3643 ? VOIDmode
: operand_mode
[i
]),
3644 (modified
[i
] == RELOAD_READ
3645 ? VOIDmode
: operand_mode
[i
]),
3646 (insn_code_number
< 0 ? 0
3647 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3648 0, i
, operand_type
[i
]);
3650 /* In a matching pair of operands, one must be input only
3651 and the other must be output only.
3652 Pass the input operand as IN and the other as OUT. */
3653 else if (modified
[i
] == RELOAD_READ
3654 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3656 operand_reloadnum
[i
]
3657 = push_reload (recog_data
.operand
[i
],
3658 recog_data
.operand
[goal_alternative_matched
[i
]],
3659 recog_data
.operand_loc
[i
],
3660 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3661 (enum reg_class
) goal_alternative
[i
],
3663 operand_mode
[goal_alternative_matched
[i
]],
3664 0, 0, i
, RELOAD_OTHER
);
3665 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3667 else if (modified
[i
] == RELOAD_WRITE
3668 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3670 operand_reloadnum
[goal_alternative_matched
[i
]]
3671 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3672 recog_data
.operand
[i
],
3673 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3674 recog_data
.operand_loc
[i
],
3675 (enum reg_class
) goal_alternative
[i
],
3676 operand_mode
[goal_alternative_matched
[i
]],
3678 0, 0, i
, RELOAD_OTHER
);
3679 operand_reloadnum
[i
] = output_reloadnum
;
3681 else if (insn_code_number
>= 0)
3685 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3686 /* Avoid further trouble with this insn. */
3687 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3692 else if (goal_alternative_matched
[i
] < 0
3693 && goal_alternative_matches
[i
] < 0
3696 /* For each non-matching operand that's a MEM or a pseudo-register
3697 that didn't get a hard register, make an optional reload.
3698 This may get done even if the insn needs no reloads otherwise. */
3700 rtx operand
= recog_data
.operand
[i
];
3702 while (GET_CODE (operand
) == SUBREG
)
3703 operand
= XEXP (operand
, 0);
3704 if ((GET_CODE (operand
) == MEM
3705 || (GET_CODE (operand
) == REG
3706 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3707 /* If this is only for an output, the optional reload would not
3708 actually cause us to use a register now, just note that
3709 something is stored here. */
3710 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3711 || modified
[i
] == RELOAD_WRITE
)
3712 && ! no_input_reloads
3713 /* An optional output reload might allow to delete INSN later.
3714 We mustn't make in-out reloads on insns that are not permitted
3716 If this is an asm, we can't delete it; we must not even call
3717 push_reload for an optional output reload in this case,
3718 because we can't be sure that the constraint allows a register,
3719 and push_reload verifies the constraints for asms. */
3720 && (modified
[i
] == RELOAD_READ
3721 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3722 operand_reloadnum
[i
]
3723 = push_reload ((modified
[i
] != RELOAD_WRITE
3724 ? recog_data
.operand
[i
] : 0),
3725 (modified
[i
] != RELOAD_READ
3726 ? recog_data
.operand
[i
] : 0),
3727 (modified
[i
] != RELOAD_WRITE
3728 ? recog_data
.operand_loc
[i
] : 0),
3729 (modified
[i
] != RELOAD_READ
3730 ? recog_data
.operand_loc
[i
] : 0),
3731 (enum reg_class
) goal_alternative
[i
],
3732 (modified
[i
] == RELOAD_WRITE
3733 ? VOIDmode
: operand_mode
[i
]),
3734 (modified
[i
] == RELOAD_READ
3735 ? VOIDmode
: operand_mode
[i
]),
3736 (insn_code_number
< 0 ? 0
3737 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3738 1, i
, operand_type
[i
]);
3739 /* If a memory reference remains (either as a MEM or a pseudo that
3740 did not get a hard register), yet we can't make an optional
3741 reload, check if this is actually a pseudo register reference;
3742 we then need to emit a USE and/or a CLOBBER so that reload
3743 inheritance will do the right thing. */
3745 && (GET_CODE (operand
) == MEM
3746 || (GET_CODE (operand
) == REG
3747 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3748 && reg_renumber
[REGNO (operand
)] < 0)))
3750 operand
= *recog_data
.operand_loc
[i
];
3752 while (GET_CODE (operand
) == SUBREG
)
3753 operand
= XEXP (operand
, 0);
3754 if (GET_CODE (operand
) == REG
)
3756 if (modified
[i
] != RELOAD_WRITE
)
3757 emit_insn_before (gen_rtx_USE (VOIDmode
, operand
), insn
);
3758 if (modified
[i
] != RELOAD_READ
)
3759 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3763 else if (goal_alternative_matches
[i
] >= 0
3764 && goal_alternative_win
[goal_alternative_matches
[i
]]
3765 && modified
[i
] == RELOAD_READ
3766 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3767 && ! no_input_reloads
&& ! no_output_reloads
3770 /* Similarly, make an optional reload for a pair of matching
3771 objects that are in MEM or a pseudo that didn't get a hard reg. */
3773 rtx operand
= recog_data
.operand
[i
];
3775 while (GET_CODE (operand
) == SUBREG
)
3776 operand
= XEXP (operand
, 0);
3777 if ((GET_CODE (operand
) == MEM
3778 || (GET_CODE (operand
) == REG
3779 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3780 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3782 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3783 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
3784 recog_data
.operand
[i
],
3785 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
3786 recog_data
.operand_loc
[i
],
3787 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3788 operand_mode
[goal_alternative_matches
[i
]],
3790 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3793 /* Perform whatever substitutions on the operands we are supposed
3794 to make due to commutativity or replacement of registers
3795 with equivalent constants or memory slots. */
3797 for (i
= 0; i
< noperands
; i
++)
3799 /* We only do this on the last pass through reload, because it is
3800 possible for some data (like reg_equiv_address) to be changed during
3801 later passes. Moreover, we loose the opportunity to get a useful
3802 reload_{in,out}_reg when we do these replacements. */
3806 rtx substitution
= substed_operand
[i
];
3808 *recog_data
.operand_loc
[i
] = substitution
;
3810 /* If we're replacing an operand with a LABEL_REF, we need
3811 to make sure that there's a REG_LABEL note attached to
3812 this instruction. */
3813 if (GET_CODE (insn
) != JUMP_INSN
3814 && GET_CODE (substitution
) == LABEL_REF
3815 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
3816 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
,
3817 XEXP (substitution
, 0),
3821 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
3824 /* If this insn pattern contains any MATCH_DUP's, make sure that
3825 they will be substituted if the operands they match are substituted.
3826 Also do now any substitutions we already did on the operands.
3828 Don't do this if we aren't making replacements because we might be
3829 propagating things allocated by frame pointer elimination into places
3830 it doesn't expect. */
3832 if (insn_code_number
>= 0 && replace
)
3833 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
3835 int opno
= recog_data
.dup_num
[i
];
3836 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
3837 if (operand_reloadnum
[opno
] >= 0)
3838 push_replacement (recog_data
.dup_loc
[i
], operand_reloadnum
[opno
],
3839 insn_data
[insn_code_number
].operand
[opno
].mode
);
3843 /* This loses because reloading of prior insns can invalidate the equivalence
3844 (or at least find_equiv_reg isn't smart enough to find it any more),
3845 causing this insn to need more reload regs than it needed before.
3846 It may be too late to make the reload regs available.
3847 Now this optimization is done safely in choose_reload_regs. */
3849 /* For each reload of a reg into some other class of reg,
3850 search for an existing equivalent reg (same value now) in the right class.
3851 We can use it as long as we don't need to change its contents. */
3852 for (i
= 0; i
< n_reloads
; i
++)
3853 if (rld
[i
].reg_rtx
== 0
3855 && GET_CODE (rld
[i
].in
) == REG
3859 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
3860 static_reload_reg_p
, 0, rld
[i
].inmode
);
3861 /* Prevent generation of insn to load the value
3862 because the one we found already has the value. */
3864 rld
[i
].in
= rld
[i
].reg_rtx
;
3868 /* Perhaps an output reload can be combined with another
3869 to reduce needs by one. */
3870 if (!goal_earlyclobber
)
3873 /* If we have a pair of reloads for parts of an address, they are reloading
3874 the same object, the operands themselves were not reloaded, and they
3875 are for two operands that are supposed to match, merge the reloads and
3876 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3878 for (i
= 0; i
< n_reloads
; i
++)
3882 for (j
= i
+ 1; j
< n_reloads
; j
++)
3883 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3884 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3885 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3886 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3887 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3888 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3889 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3890 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3891 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
3892 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3893 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
3894 && (operand_reloadnum
[rld
[j
].opnum
] < 0
3895 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
3896 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
3897 || (goal_alternative_matches
[rld
[j
].opnum
]
3900 for (k
= 0; k
< n_replacements
; k
++)
3901 if (replacements
[k
].what
== j
)
3902 replacements
[k
].what
= i
;
3904 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3905 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3906 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3908 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3913 /* Scan all the reloads and update their type.
3914 If a reload is for the address of an operand and we didn't reload
3915 that operand, change the type. Similarly, change the operand number
3916 of a reload when two operands match. If a reload is optional, treat it
3917 as though the operand isn't reloaded.
3919 ??? This latter case is somewhat odd because if we do the optional
3920 reload, it means the object is hanging around. Thus we need only
3921 do the address reload if the optional reload was NOT done.
3923 Change secondary reloads to be the address type of their operand, not
3926 If an operand's reload is now RELOAD_OTHER, change any
3927 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3928 RELOAD_FOR_OTHER_ADDRESS. */
3930 for (i
= 0; i
< n_reloads
; i
++)
3932 if (rld
[i
].secondary_p
3933 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
]
3934 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3935 || (rld
[operand_reloadnum
[rld
[i
].opnum
]].secondary_in_icode
== -1
3936 && rld
[operand_reloadnum
[rld
[i
].opnum
]].secondary_out_icode
== -1)))
3937 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
3939 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3940 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3941 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3942 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3943 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3944 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
3946 /* If we have a secondary reload to go along with this reload,
3947 change its type to RELOAD_FOR_OPADDR_ADDR. */
3949 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3950 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
3951 && rld
[i
].secondary_in_reload
!= -1)
3953 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
3955 rld
[secondary_in_reload
].when_needed
3956 = (rld
[i
].secondary_in_icode
== -1
3957 ? RELOAD_FOR_OPADDR_ADDR
3958 : RELOAD_FOR_OPERAND_ADDRESS
);
3960 /* If there's a tertiary reload we have to change it also. */
3961 if (secondary_in_reload
> 0
3962 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
3963 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
3964 = rld
[secondary_in_reload
].when_needed
;
3967 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3968 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3969 && rld
[i
].secondary_out_reload
!= -1)
3971 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
3973 rld
[secondary_out_reload
].when_needed
3974 = (rld
[i
].secondary_out_icode
== -1
3975 ? RELOAD_FOR_OPADDR_ADDR
3976 : RELOAD_FOR_OPERAND_ADDRESS
);
3978 /* If there's a tertiary reload we have to change it also. */
3979 if (secondary_out_reload
3980 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
3981 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
3982 = rld
[secondary_out_reload
].when_needed
;
3985 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3986 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3987 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3989 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3992 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3993 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
3994 && operand_reloadnum
[rld
[i
].opnum
] >= 0
3995 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
3997 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
3999 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4000 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4003 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4004 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4005 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4007 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4008 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4009 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4010 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4011 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4012 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4013 This is complicated by the fact that a single operand can have more
4014 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4015 choose_reload_regs without affecting code quality, and cases that
4016 actually fail are extremely rare, so it turns out to be better to fix
4017 the problem here by not generating cases that choose_reload_regs will
4019 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4020 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4022 We can reduce the register pressure by exploiting that a
4023 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4024 does not conflict with any of them, if it is only used for the first of
4025 the RELOAD_FOR_X_ADDRESS reloads. */
4027 int first_op_addr_num
= -2;
4028 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4029 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4031 /* We use last_op_addr_reload and the contents of the above arrays
4032 first as flags - -2 means no instance encountered, -1 means exactly
4033 one instance encountered.
4034 If more than one instance has been encountered, we store the reload
4035 number of the first reload of the kind in question; reload numbers
4036 are known to be non-negative. */
4037 for (i
= 0; i
< noperands
; i
++)
4038 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4039 for (i
= n_reloads
- 1; i
>= 0; i
--)
4041 switch (rld
[i
].when_needed
)
4043 case RELOAD_FOR_OPERAND_ADDRESS
:
4044 if (++first_op_addr_num
>= 0)
4046 first_op_addr_num
= i
;
4050 case RELOAD_FOR_INPUT_ADDRESS
:
4051 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4053 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4057 case RELOAD_FOR_OUTPUT_ADDRESS
:
4058 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4060 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4071 for (i
= 0; i
< n_reloads
; i
++)
4074 enum reload_type type
;
4076 switch (rld
[i
].when_needed
)
4078 case RELOAD_FOR_OPADDR_ADDR
:
4079 first_num
= first_op_addr_num
;
4080 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4082 case RELOAD_FOR_INPADDR_ADDRESS
:
4083 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4084 type
= RELOAD_FOR_INPUT_ADDRESS
;
4086 case RELOAD_FOR_OUTADDR_ADDRESS
:
4087 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4088 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4095 else if (i
> first_num
)
4096 rld
[i
].when_needed
= type
;
4099 /* Check if the only TYPE reload that uses reload I is
4100 reload FIRST_NUM. */
4101 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4103 if (rld
[j
].when_needed
== type
4104 && (rld
[i
].secondary_p
4105 ? rld
[j
].secondary_in_reload
== i
4106 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4108 rld
[i
].when_needed
= type
;
4117 /* See if we have any reloads that are now allowed to be merged
4118 because we've changed when the reload is needed to
4119 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4120 check for the most common cases. */
4122 for (i
= 0; i
< n_reloads
; i
++)
4123 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4124 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4125 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4126 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4127 for (j
= 0; j
< n_reloads
; j
++)
4128 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4129 && rld
[j
].when_needed
== rld
[i
].when_needed
4130 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4131 && rld
[i
].class == rld
[j
].class
4132 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4133 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4135 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4136 transfer_replacements (i
, j
);
4141 /* If we made any reloads for addresses, see if they violate a
4142 "no input reloads" requirement for this insn. But loads that we
4143 do after the insn (such as for output addresses) are fine. */
4144 if (no_input_reloads
)
4145 for (i
= 0; i
< n_reloads
; i
++)
4147 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
4148 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
)
4152 /* Compute reload_mode and reload_nregs. */
4153 for (i
= 0; i
< n_reloads
; i
++)
4156 = (rld
[i
].inmode
== VOIDmode
4157 || (GET_MODE_SIZE (rld
[i
].outmode
)
4158 > GET_MODE_SIZE (rld
[i
].inmode
)))
4159 ? rld
[i
].outmode
: rld
[i
].inmode
;
4161 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4167 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4168 accepts a memory operand with constant address. */
4171 alternative_allows_memconst (constraint
, altnum
)
4172 const char *constraint
;
4176 /* Skip alternatives before the one requested. */
4179 while (*constraint
++ != ',');
4182 /* Scan the requested alternative for 'm' or 'o'.
4183 If one of them is present, this alternative accepts memory constants. */
4184 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
4185 if (c
== 'm' || c
== 'o')
4190 /* Scan X for memory references and scan the addresses for reloading.
4191 Also checks for references to "constant" regs that we want to eliminate
4192 and replaces them with the values they stand for.
4193 We may alter X destructively if it contains a reference to such.
4194 If X is just a constant reg, we return the equivalent value
4197 IND_LEVELS says how many levels of indirect addressing this machine
4200 OPNUM and TYPE identify the purpose of the reload.
4202 IS_SET_DEST is true if X is the destination of a SET, which is not
4203 appropriate to be replaced by a constant.
4205 INSN, if nonzero, is the insn in which we do the reload. It is used
4206 to determine if we may generate output reloads, and where to put USEs
4207 for pseudos that we have to replace with stack slots.
4209 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4210 result of find_reloads_address. */
4213 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
, insn
,
4217 enum reload_type type
;
4221 int *address_reloaded
;
4223 register RTX_CODE code
= GET_CODE (x
);
4225 register const char *fmt
= GET_RTX_FORMAT (code
);
4231 /* This code is duplicated for speed in find_reloads. */
4232 register int regno
= REGNO (x
);
4233 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4234 x
= reg_equiv_constant
[regno
];
4236 /* This creates (subreg (mem...)) which would cause an unnecessary
4237 reload of the mem. */
4238 else if (reg_equiv_mem
[regno
] != 0)
4239 x
= reg_equiv_mem
[regno
];
4241 else if (reg_equiv_memory_loc
[regno
]
4242 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4244 rtx mem
= make_memloc (x
, regno
);
4245 if (reg_equiv_address
[regno
]
4246 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4248 /* If this is not a toplevel operand, find_reloads doesn't see
4249 this substitution. We have to emit a USE of the pseudo so
4250 that delete_output_reload can see it. */
4251 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4252 emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
);
4254 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4255 opnum
, type
, ind_levels
, insn
);
4256 if (address_reloaded
)
4257 *address_reloaded
= i
;
4266 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4267 opnum
, type
, ind_levels
, insn
);
4268 if (address_reloaded
)
4269 *address_reloaded
= i
;
4274 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4276 /* Check for SUBREG containing a REG that's equivalent to a constant.
4277 If the constant has a known value, truncate it right now.
4278 Similarly if we are extracting a single-word of a multi-word
4279 constant. If the constant is symbolic, allow it to be substituted
4280 normally. push_reload will strip the subreg later. If the
4281 constant is VOIDmode, abort because we will lose the mode of
4282 the register (this should never happen because one of the cases
4283 above should handle it). */
4285 register int regno
= REGNO (SUBREG_REG (x
));
4288 if (subreg_lowpart_p (x
)
4289 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4290 && reg_equiv_constant
[regno
] != 0
4291 && (tem
= gen_lowpart_common (GET_MODE (x
),
4292 reg_equiv_constant
[regno
])) != 0)
4295 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
4296 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4297 && reg_equiv_constant
[regno
] != 0
4298 && (tem
= operand_subword (reg_equiv_constant
[regno
],
4300 GET_MODE (SUBREG_REG (x
)))) != 0)
4302 /* TEM is now a word sized constant for the bits from X that
4303 we wanted. However, TEM may be the wrong representation.
4305 Use gen_lowpart_common to convert a CONST_INT into a
4306 CONST_DOUBLE and vice versa as needed according to by the mode
4308 tem
= gen_lowpart_common (GET_MODE (x
), tem
);
4314 /* If the SUBREG is wider than a word, the above test will fail.
4315 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4316 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4317 a 32 bit target. We still can - and have to - handle this
4318 for non-paradoxical subregs of CONST_INTs. */
4319 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4320 && reg_equiv_constant
[regno
] != 0
4321 && GET_CODE (reg_equiv_constant
[regno
]) == CONST_INT
4322 && (GET_MODE_SIZE (GET_MODE (x
))
4323 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
4325 int shift
= SUBREG_WORD (x
) * BITS_PER_WORD
;
4326 if (WORDS_BIG_ENDIAN
)
4327 shift
= (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4328 - GET_MODE_BITSIZE (GET_MODE (x
))
4330 /* Here we use the knowledge that CONST_INTs have a
4331 HOST_WIDE_INT field. */
4332 if (shift
>= HOST_BITS_PER_WIDE_INT
)
4333 shift
= HOST_BITS_PER_WIDE_INT
- 1;
4334 return GEN_INT (INTVAL (reg_equiv_constant
[regno
]) >> shift
);
4337 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4338 && reg_equiv_constant
[regno
] != 0
4339 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
4342 /* If the subreg contains a reg that will be converted to a mem,
4343 convert the subreg to a narrower memref now.
4344 Otherwise, we would get (subreg (mem ...) ...),
4345 which would force reload of the mem.
4347 We also need to do this if there is an equivalent MEM that is
4348 not offsettable. In that case, alter_subreg would produce an
4349 invalid address on big-endian machines.
4351 For machines that extend byte loads, we must not reload using
4352 a wider mode if we have a paradoxical SUBREG. find_reloads will
4353 force a reload in that case. So we should not do anything here. */
4355 else if (regno
>= FIRST_PSEUDO_REGISTER
4356 #ifdef LOAD_EXTEND_OP
4357 && (GET_MODE_SIZE (GET_MODE (x
))
4358 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4360 && (reg_equiv_address
[regno
] != 0
4361 || (reg_equiv_mem
[regno
] != 0
4362 && (! strict_memory_address_p (GET_MODE (x
),
4363 XEXP (reg_equiv_mem
[regno
], 0))
4364 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4365 || num_not_at_initial_offset
))))
4366 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4369 else if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == MEM
4370 && (GET_MODE_SIZE (GET_MODE (x
))
4371 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4372 && mode_dependent_address_p (XEXP (SUBREG_REG (x
), 0)))
4374 /* A paradoxical subreg will simply have the mode of the access
4375 changed, so we need to reload such a memory operand to stabilize
4376 the meaning of the memory access. */
4377 enum machine_mode subreg_mode
= GET_MODE (SUBREG_REG (x
));
4380 push_reload (NULL_RTX
, SUBREG_REG (x
), NULL_PTR
, &SUBREG_REG (x
),
4381 find_valid_class (subreg_mode
, SUBREG_WORD (x
)),
4382 VOIDmode
, subreg_mode
, 0, 0, opnum
, type
);
4384 push_reload (SUBREG_REG (x
), NULL_RTX
, &SUBREG_REG (x
), NULL_PTR
,
4385 find_valid_class (subreg_mode
, SUBREG_WORD (x
)),
4386 subreg_mode
, VOIDmode
, 0, 0, opnum
, type
);
4389 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4393 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4394 ind_levels
, is_set_dest
, insn
,
4396 /* If we have replaced a reg with it's equivalent memory loc -
4397 that can still be handled here e.g. if it's in a paradoxical
4398 subreg - we must make the change in a copy, rather than using
4399 a destructive change. This way, find_reloads can still elect
4400 not to do the change. */
4401 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4403 x
= shallow_copy_rtx (x
);
4406 XEXP (x
, i
) = new_part
;
4412 /* Return a mem ref for the memory equivalent of reg REGNO.
4413 This mem ref is not shared with anything. */
4416 make_memloc (ad
, regno
)
4420 /* We must rerun eliminate_regs, in case the elimination
4421 offsets have changed. */
4423 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4425 /* If TEM might contain a pseudo, we must copy it to avoid
4426 modifying it when we do the substitution for the reload. */
4427 if (rtx_varies_p (tem
))
4428 tem
= copy_rtx (tem
);
4430 tem
= gen_rtx_MEM (GET_MODE (ad
), tem
);
4431 MEM_COPY_ATTRIBUTES (tem
, reg_equiv_memory_loc
[regno
]);
4435 /* Record all reloads needed for handling memory address AD
4436 which appears in *LOC in a memory reference to mode MODE
4437 which itself is found in location *MEMREFLOC.
4438 Note that we take shortcuts assuming that no multi-reg machine mode
4439 occurs as part of an address.
4441 OPNUM and TYPE specify the purpose of this reload.
4443 IND_LEVELS says how many levels of indirect addressing this machine
4446 INSN, if nonzero, is the insn in which we do the reload. It is used
4447 to determine if we may generate output reloads, and where to put USEs
4448 for pseudos that we have to replace with stack slots.
4450 Value is nonzero if this address is reloaded or replaced as a whole.
4451 This is interesting to the caller if the address is an autoincrement.
4453 Note that there is no verification that the address will be valid after
4454 this routine does its work. Instead, we rely on the fact that the address
4455 was valid when reload started. So we need only undo things that reload
4456 could have broken. These are wrong register types, pseudos not allocated
4457 to a hard register, and frame pointer elimination. */
4460 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4461 enum machine_mode mode
;
4466 enum reload_type type
;
4471 int removed_and
= 0;
4474 /* If the address is a register, see if it is a legitimate address and
4475 reload if not. We first handle the cases where we need not reload
4476 or where we must reload in a non-standard way. */
4478 if (GET_CODE (ad
) == REG
)
4482 if (reg_equiv_constant
[regno
] != 0
4483 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
4485 *loc
= ad
= reg_equiv_constant
[regno
];
4489 tem
= reg_equiv_memory_loc
[regno
];
4492 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4494 tem
= make_memloc (ad
, regno
);
4495 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4497 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
4498 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
4501 /* We can avoid a reload if the register's equivalent memory
4502 expression is valid as an indirect memory address.
4503 But not all addresses are valid in a mem used as an indirect
4504 address: only reg or reg+constant. */
4507 && strict_memory_address_p (mode
, tem
)
4508 && (GET_CODE (XEXP (tem
, 0)) == REG
4509 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4510 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4511 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4513 /* TEM is not the same as what we'll be replacing the
4514 pseudo with after reload, put a USE in front of INSN
4515 in the final reload pass. */
4517 && num_not_at_initial_offset
4518 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4521 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4522 /* This doesn't really count as replacing the address
4523 as a whole, since it is still a memory access. */
4531 /* The only remaining case where we can avoid a reload is if this is a
4532 hard register that is valid as a base register and which is not the
4533 subject of a CLOBBER in this insn. */
4535 else if (regno
< FIRST_PSEUDO_REGISTER
4536 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4537 && ! regno_clobbered_p (regno
, this_insn
))
4540 /* If we do not have one of the cases above, we must do the reload. */
4541 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4542 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4546 if (strict_memory_address_p (mode
, ad
))
4548 /* The address appears valid, so reloads are not needed.
4549 But the address may contain an eliminable register.
4550 This can happen because a machine with indirect addressing
4551 may consider a pseudo register by itself a valid address even when
4552 it has failed to get a hard reg.
4553 So do a tree-walk to find and eliminate all such regs. */
4555 /* But first quickly dispose of a common case. */
4556 if (GET_CODE (ad
) == PLUS
4557 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4558 && GET_CODE (XEXP (ad
, 0)) == REG
4559 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4562 subst_reg_equivs_changed
= 0;
4563 *loc
= subst_reg_equivs (ad
, insn
);
4565 if (! subst_reg_equivs_changed
)
4568 /* Check result for validity after substitution. */
4569 if (strict_memory_address_p (mode
, ad
))
4573 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4578 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4583 *memrefloc
= copy_rtx (*memrefloc
);
4584 XEXP (*memrefloc
, 0) = ad
;
4585 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4591 /* The address is not valid. We have to figure out why. First see if
4592 we have an outer AND and remove it if so. Then analyze what's inside. */
4594 if (GET_CODE (ad
) == AND
)
4597 loc
= &XEXP (ad
, 0);
4601 /* One possibility for why the address is invalid is that it is itself
4602 a MEM. This can happen when the frame pointer is being eliminated, a
4603 pseudo is not allocated to a hard register, and the offset between the
4604 frame and stack pointers is not its initial value. In that case the
4605 pseudo will have been replaced by a MEM referring to the
4607 if (GET_CODE (ad
) == MEM
)
4609 /* First ensure that the address in this MEM is valid. Then, unless
4610 indirect addresses are valid, reload the MEM into a register. */
4612 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4613 opnum
, ADDR_TYPE (type
),
4614 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4616 /* If tem was changed, then we must create a new memory reference to
4617 hold it and store it back into memrefloc. */
4618 if (tem
!= ad
&& memrefloc
)
4620 *memrefloc
= copy_rtx (*memrefloc
);
4621 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4622 loc
= &XEXP (*memrefloc
, 0);
4624 loc
= &XEXP (*loc
, 0);
4627 /* Check similar cases as for indirect addresses as above except
4628 that we can allow pseudos and a MEM since they should have been
4629 taken care of above. */
4632 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4633 || GET_CODE (XEXP (tem
, 0)) == MEM
4634 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4635 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4636 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4637 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4639 /* Must use TEM here, not AD, since it is the one that will
4640 have any subexpressions reloaded, if needed. */
4641 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4642 BASE_REG_CLASS
, GET_MODE (tem
),
4645 return ! removed_and
;
4651 /* If we have address of a stack slot but it's not valid because the
4652 displacement is too large, compute the sum in a register.
4653 Handle all base registers here, not just fp/ap/sp, because on some
4654 targets (namely SH) we can also get too large displacements from
4655 big-endian corrections. */
4656 else if (GET_CODE (ad
) == PLUS
4657 && GET_CODE (XEXP (ad
, 0)) == REG
4658 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4659 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4660 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4662 /* Unshare the MEM rtx so we can safely alter it. */
4665 *memrefloc
= copy_rtx (*memrefloc
);
4666 loc
= &XEXP (*memrefloc
, 0);
4668 loc
= &XEXP (*loc
, 0);
4671 if (double_reg_address_ok
)
4673 /* Unshare the sum as well. */
4674 *loc
= ad
= copy_rtx (ad
);
4676 /* Reload the displacement into an index reg.
4677 We assume the frame pointer or arg pointer is a base reg. */
4678 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4679 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4685 /* If the sum of two regs is not necessarily valid,
4686 reload the sum into a base reg.
4687 That will at least work. */
4688 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
,
4689 Pmode
, opnum
, type
, ind_levels
);
4691 return ! removed_and
;
4694 /* If we have an indexed stack slot, there are three possible reasons why
4695 it might be invalid: The index might need to be reloaded, the address
4696 might have been made by frame pointer elimination and hence have a
4697 constant out of range, or both reasons might apply.
4699 We can easily check for an index needing reload, but even if that is the
4700 case, we might also have an invalid constant. To avoid making the
4701 conservative assumption and requiring two reloads, we see if this address
4702 is valid when not interpreted strictly. If it is, the only problem is
4703 that the index needs a reload and find_reloads_address_1 will take care
4706 If we decide to do something here, it must be that
4707 `double_reg_address_ok' is true and that this address rtl was made by
4708 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4709 rework the sum so that the reload register will be added to the index.
4710 This is safe because we know the address isn't shared.
4712 We check for fp/ap/sp as both the first and second operand of the
4715 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4716 && GET_CODE (XEXP (ad
, 0)) == PLUS
4717 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4718 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4719 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4721 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4722 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4724 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4725 && ! memory_address_p (mode
, ad
))
4727 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4728 plus_constant (XEXP (XEXP (ad
, 0), 0),
4729 INTVAL (XEXP (ad
, 1))),
4730 XEXP (XEXP (ad
, 0), 1));
4731 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4732 GET_MODE (ad
), opnum
, type
, ind_levels
);
4733 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4739 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4740 && GET_CODE (XEXP (ad
, 0)) == PLUS
4741 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4742 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4743 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4745 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4746 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4748 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4749 && ! memory_address_p (mode
, ad
))
4751 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4752 XEXP (XEXP (ad
, 0), 0),
4753 plus_constant (XEXP (XEXP (ad
, 0), 1),
4754 INTVAL (XEXP (ad
, 1))));
4755 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1), BASE_REG_CLASS
,
4756 GET_MODE (ad
), opnum
, type
, ind_levels
);
4757 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4763 /* See if address becomes valid when an eliminable register
4764 in a sum is replaced. */
4767 if (GET_CODE (ad
) == PLUS
)
4768 tem
= subst_indexed_address (ad
);
4769 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4771 /* Ok, we win that way. Replace any additional eliminable
4774 subst_reg_equivs_changed
= 0;
4775 tem
= subst_reg_equivs (tem
, insn
);
4777 /* Make sure that didn't make the address invalid again. */
4779 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4786 /* If constants aren't valid addresses, reload the constant address
4788 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4790 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4791 Unshare it so we can safely alter it. */
4792 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4793 && CONSTANT_POOL_ADDRESS_P (ad
))
4795 *memrefloc
= copy_rtx (*memrefloc
);
4796 loc
= &XEXP (*memrefloc
, 0);
4798 loc
= &XEXP (*loc
, 0);
4801 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4803 return ! removed_and
;
4806 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
4810 /* Find all pseudo regs appearing in AD
4811 that are eliminable in favor of equivalent values
4812 and do not have hard regs; replace them by their equivalents.
4813 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4814 front of it for pseudos that we have to replace with stack slots. */
4817 subst_reg_equivs (ad
, insn
)
4821 register RTX_CODE code
= GET_CODE (ad
);
4823 register const char *fmt
;
4839 register int regno
= REGNO (ad
);
4841 if (reg_equiv_constant
[regno
] != 0)
4843 subst_reg_equivs_changed
= 1;
4844 return reg_equiv_constant
[regno
];
4846 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
4848 rtx mem
= make_memloc (ad
, regno
);
4849 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4851 subst_reg_equivs_changed
= 1;
4852 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4860 /* Quickly dispose of a common case. */
4861 if (XEXP (ad
, 0) == frame_pointer_rtx
4862 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4870 fmt
= GET_RTX_FORMAT (code
);
4871 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4873 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
4877 /* Compute the sum of X and Y, making canonicalizations assumed in an
4878 address, namely: sum constant integers, surround the sum of two
4879 constants with a CONST, put the constant as the second operand, and
4880 group the constant on the outermost sum.
4882 This routine assumes both inputs are already in canonical form. */
4889 enum machine_mode mode
= GET_MODE (x
);
4891 if (mode
== VOIDmode
)
4892 mode
= GET_MODE (y
);
4894 if (mode
== VOIDmode
)
4897 if (GET_CODE (x
) == CONST_INT
)
4898 return plus_constant (y
, INTVAL (x
));
4899 else if (GET_CODE (y
) == CONST_INT
)
4900 return plus_constant (x
, INTVAL (y
));
4901 else if (CONSTANT_P (x
))
4902 tem
= x
, x
= y
, y
= tem
;
4904 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4905 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4907 /* Note that if the operands of Y are specified in the opposite
4908 order in the recursive calls below, infinite recursion will occur. */
4909 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4910 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4912 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4913 constant will have been placed second. */
4914 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4916 if (GET_CODE (x
) == CONST
)
4918 if (GET_CODE (y
) == CONST
)
4921 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
4924 return gen_rtx_PLUS (mode
, x
, y
);
4927 /* If ADDR is a sum containing a pseudo register that should be
4928 replaced with a constant (from reg_equiv_constant),
4929 return the result of doing so, and also apply the associative
4930 law so that the result is more likely to be a valid address.
4931 (But it is not guaranteed to be one.)
4933 Note that at most one register is replaced, even if more are
4934 replaceable. Also, we try to put the result into a canonical form
4935 so it is more likely to be a valid address.
4937 In all other cases, return ADDR. */
4940 subst_indexed_address (addr
)
4943 rtx op0
= 0, op1
= 0, op2
= 0;
4947 if (GET_CODE (addr
) == PLUS
)
4949 /* Try to find a register to replace. */
4950 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4951 if (GET_CODE (op0
) == REG
4952 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4953 && reg_renumber
[regno
] < 0
4954 && reg_equiv_constant
[regno
] != 0)
4955 op0
= reg_equiv_constant
[regno
];
4956 else if (GET_CODE (op1
) == REG
4957 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4958 && reg_renumber
[regno
] < 0
4959 && reg_equiv_constant
[regno
] != 0)
4960 op1
= reg_equiv_constant
[regno
];
4961 else if (GET_CODE (op0
) == PLUS
4962 && (tem
= subst_indexed_address (op0
)) != op0
)
4964 else if (GET_CODE (op1
) == PLUS
4965 && (tem
= subst_indexed_address (op1
)) != op1
)
4970 /* Pick out up to three things to add. */
4971 if (GET_CODE (op1
) == PLUS
)
4972 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4973 else if (GET_CODE (op0
) == PLUS
)
4974 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4976 /* Compute the sum. */
4978 op1
= form_sum (op1
, op2
);
4980 op0
= form_sum (op0
, op1
);
4987 /* Record the pseudo registers we must reload into hard registers in a
4988 subexpression of a would-be memory address, X referring to a value
4989 in mode MODE. (This function is not called if the address we find
4992 CONTEXT = 1 means we are considering regs as index regs,
4993 = 0 means we are considering them as base regs.
4995 OPNUM and TYPE specify the purpose of any reloads made.
4997 IND_LEVELS says how many levels of indirect addressing are
4998 supported at this point in the address.
5000 INSN, if nonzero, is the insn in which we do the reload. It is used
5001 to determine if we may generate output reloads.
5003 We return nonzero if X, as a whole, is reloaded or replaced. */
5005 /* Note that we take shortcuts assuming that no multi-reg machine mode
5006 occurs as part of an address.
5007 Also, this is not fully machine-customizable; it works for machines
5008 such as vaxes and 68000's and 32000's, but other possible machines
5009 could have addressing modes that this does not handle right. */
5012 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
5013 enum machine_mode mode
;
5018 enum reload_type type
;
5022 register RTX_CODE code
= GET_CODE (x
);
5028 register rtx orig_op0
= XEXP (x
, 0);
5029 register rtx orig_op1
= XEXP (x
, 1);
5030 register RTX_CODE code0
= GET_CODE (orig_op0
);
5031 register RTX_CODE code1
= GET_CODE (orig_op1
);
5032 register rtx op0
= orig_op0
;
5033 register rtx op1
= orig_op1
;
5035 if (GET_CODE (op0
) == SUBREG
)
5037 op0
= SUBREG_REG (op0
);
5038 code0
= GET_CODE (op0
);
5039 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5040 op0
= gen_rtx_REG (word_mode
,
5041 REGNO (op0
) + SUBREG_WORD (orig_op0
));
5044 if (GET_CODE (op1
) == SUBREG
)
5046 op1
= SUBREG_REG (op1
);
5047 code1
= GET_CODE (op1
);
5048 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5049 op1
= gen_rtx_REG (GET_MODE (op1
),
5050 REGNO (op1
) + SUBREG_WORD (orig_op1
));
5053 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5054 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5056 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5057 type
, ind_levels
, insn
);
5058 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5059 type
, ind_levels
, insn
);
5062 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5063 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5065 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5066 type
, ind_levels
, insn
);
5067 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5068 type
, ind_levels
, insn
);
5071 else if (code0
== CONST_INT
|| code0
== CONST
5072 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5073 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5074 type
, ind_levels
, insn
);
5076 else if (code1
== CONST_INT
|| code1
== CONST
5077 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5078 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5079 type
, ind_levels
, insn
);
5081 else if (code0
== REG
&& code1
== REG
)
5083 if (REG_OK_FOR_INDEX_P (op0
)
5084 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5086 else if (REG_OK_FOR_INDEX_P (op1
)
5087 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5089 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5090 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5091 type
, ind_levels
, insn
);
5092 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5093 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5094 type
, ind_levels
, insn
);
5095 else if (REG_OK_FOR_INDEX_P (op1
))
5096 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5097 type
, ind_levels
, insn
);
5098 else if (REG_OK_FOR_INDEX_P (op0
))
5099 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5100 type
, ind_levels
, insn
);
5103 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5104 type
, ind_levels
, insn
);
5105 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5106 type
, ind_levels
, insn
);
5110 else if (code0
== REG
)
5112 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5113 type
, ind_levels
, insn
);
5114 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5115 type
, ind_levels
, insn
);
5118 else if (code1
== REG
)
5120 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5121 type
, ind_levels
, insn
);
5122 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5123 type
, ind_levels
, insn
);
5132 rtx op0
= XEXP (x
, 0);
5133 rtx op1
= XEXP (x
, 1);
5135 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5138 /* Currently, we only support {PRE,POST}_MODIFY constructs
5139 where a base register is {inc,dec}remented by the contents
5140 of another register or by a constant value. Thus, these
5141 operands must match. */
5142 if (op0
!= XEXP (op1
, 0))
5145 /* Require index register (or constant). Let's just handle the
5146 register case in the meantime... If the target allows
5147 auto-modify by a constant then we could try replacing a pseudo
5148 register with its equivalent constant where applicable. */
5149 if (REG_P (XEXP (op1
, 1)))
5150 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5151 find_reloads_address_1 (mode
, XEXP (op1
, 1), 1, &XEXP (op1
, 1),
5152 opnum
, type
, ind_levels
, insn
);
5154 if (REG_P (XEXP (op1
, 0)))
5156 register int regno
= REGNO (XEXP (op1
, 0));
5158 /* A register that is incremented cannot be constant! */
5159 if (regno
>= FIRST_PSEUDO_REGISTER
5160 && reg_equiv_constant
[regno
] != 0)
5163 /* Handle a register that is equivalent to a memory location
5164 which cannot be addressed directly. */
5165 if (reg_equiv_memory_loc
[regno
] != 0
5166 && (reg_equiv_address
[regno
] != 0
5167 || num_not_at_initial_offset
))
5169 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5171 if (reg_equiv_address
[regno
]
5172 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5174 /* First reload the memory location's address.
5175 We can't use ADDR_TYPE (type) here, because we need to
5176 write back the value after reading it, hence we actually
5177 need two registers. */
5178 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
5179 &XEXP (tem
, 0), opnum
, type
,
5182 /* Then reload the memory location into a base
5184 push_reload (tem
, tem
, &XEXP (x
, 0), &XEXP (op1
, 0),
5185 BASE_REG_CLASS
, GET_MODE (x
), GET_MODE (x
),
5186 0, 0, opnum
, RELOAD_OTHER
);
5191 if (reg_renumber
[regno
] >= 0)
5192 regno
= reg_renumber
[regno
];
5194 /* We require a base register here... */
5195 if (!REGNO_MODE_OK_FOR_BASE_P (regno
, GET_MODE (x
)))
5197 push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5198 &XEXP (op1
, 0), &XEXP (x
, 0),
5200 GET_MODE (x
), GET_MODE (x
), 0, 0,
5201 opnum
, RELOAD_OTHER
);
5213 if (GET_CODE (XEXP (x
, 0)) == REG
)
5215 register int regno
= REGNO (XEXP (x
, 0));
5219 /* A register that is incremented cannot be constant! */
5220 if (regno
>= FIRST_PSEUDO_REGISTER
5221 && reg_equiv_constant
[regno
] != 0)
5224 /* Handle a register that is equivalent to a memory location
5225 which cannot be addressed directly. */
5226 if (reg_equiv_memory_loc
[regno
] != 0
5227 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5229 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5230 if (reg_equiv_address
[regno
]
5231 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5233 /* First reload the memory location's address.
5234 We can't use ADDR_TYPE (type) here, because we need to
5235 write back the value after reading it, hence we actually
5236 need two registers. */
5237 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5238 &XEXP (tem
, 0), opnum
, type
,
5240 /* Put this inside a new increment-expression. */
5241 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5242 /* Proceed to reload that, as if it contained a register. */
5246 /* If we have a hard register that is ok as an index,
5247 don't make a reload. If an autoincrement of a nice register
5248 isn't "valid", it must be that no autoincrement is "valid".
5249 If that is true and something made an autoincrement anyway,
5250 this must be a special context where one is allowed.
5251 (For example, a "push" instruction.)
5252 We can't improve this address, so leave it alone. */
5254 /* Otherwise, reload the autoincrement into a suitable hard reg
5255 and record how much to increment by. */
5257 if (reg_renumber
[regno
] >= 0)
5258 regno
= reg_renumber
[regno
];
5259 if ((regno
>= FIRST_PSEUDO_REGISTER
5260 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5261 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5268 /* If we can output the register afterwards, do so, this
5269 saves the extra update.
5270 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5271 CALL_INSN - and it does not set CC0.
5272 But don't do this if we cannot directly address the
5273 memory location, since this will make it harder to
5274 reuse address reloads, and increases register pressure.
5275 Also don't do this if we can probably update x directly. */
5276 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5278 : reg_equiv_mem
[regno
]);
5279 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5280 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5281 && memory_operand (equiv
, GET_MODE (equiv
))
5283 && ! sets_cc0_p (PATTERN (insn
))
5285 && ! (icode
!= CODE_FOR_nothing
5286 && ((*insn_data
[icode
].operand
[0].predicate
)
5288 && ((*insn_data
[icode
].operand
[1].predicate
)
5294 = push_reload (x
, x
, loc
, loc
,
5295 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5296 GET_MODE (x
), GET_MODE (x
), 0, 0,
5297 opnum
, RELOAD_OTHER
);
5299 /* If we created a new MEM based on reg_equiv_mem[REGNO], then
5300 LOC above is part of the new MEM, not the MEM in INSN.
5302 We must also replace the address of the MEM in INSN. */
5303 if (&XEXP (x_orig
, 0) != loc
)
5304 push_replacement (&XEXP (x_orig
, 0), reloadnum
, VOIDmode
);
5310 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5311 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5312 GET_MODE (x
), GET_MODE (x
), 0, 0,
5315 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5321 /* Update the REG_INC notes. */
5323 for (link
= REG_NOTES (this_insn
);
5324 link
; link
= XEXP (link
, 1))
5325 if (REG_NOTE_KIND (link
) == REG_INC
5326 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
5327 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5333 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5335 /* This is probably the result of a substitution, by eliminate_regs,
5336 of an equivalent address for a pseudo that was not allocated to a
5337 hard register. Verify that the specified address is valid and
5338 reload it into a register. */
5339 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5340 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5344 /* Since we know we are going to reload this item, don't decrement
5345 for the indirection level.
5347 Note that this is actually conservative: it would be slightly
5348 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5350 /* We can't use ADDR_TYPE (type) here, because we need to
5351 write back the value after reading it, hence we actually
5352 need two registers. */
5353 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5354 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5355 opnum
, type
, ind_levels
, insn
);
5357 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5358 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5359 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5361 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5363 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5365 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5372 /* This is probably the result of a substitution, by eliminate_regs, of
5373 an equivalent address for a pseudo that was not allocated to a hard
5374 register. Verify that the specified address is valid and reload it
5377 Since we know we are going to reload this item, don't decrement for
5378 the indirection level.
5380 Note that this is actually conservative: it would be slightly more
5381 efficient to use the value of SPILL_INDIRECT_LEVELS from
5384 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5385 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5386 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
5387 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5388 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5393 register int regno
= REGNO (x
);
5395 if (reg_equiv_constant
[regno
] != 0)
5397 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5398 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5399 GET_MODE (x
), opnum
, type
, ind_levels
);
5403 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5404 that feeds this insn. */
5405 if (reg_equiv_mem
[regno
] != 0)
5407 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
5408 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5409 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5414 if (reg_equiv_memory_loc
[regno
]
5415 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5417 rtx tem
= make_memloc (x
, regno
);
5418 if (reg_equiv_address
[regno
] != 0
5419 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5422 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5423 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5428 if (reg_renumber
[regno
] >= 0)
5429 regno
= reg_renumber
[regno
];
5431 if ((regno
>= FIRST_PSEUDO_REGISTER
5432 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5433 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5435 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5436 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5437 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5441 /* If a register appearing in an address is the subject of a CLOBBER
5442 in this insn, reload it into some other register to be safe.
5443 The CLOBBER is supposed to make the register unavailable
5444 from before this insn to after it. */
5445 if (regno_clobbered_p (regno
, this_insn
))
5447 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5448 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5449 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5456 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5458 /* If this is a SUBREG of a hard register and the resulting register
5459 is of the wrong class, reload the whole SUBREG. This avoids
5460 needless copies if SUBREG_REG is multi-word. */
5461 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5463 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5465 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5466 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5468 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5469 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5470 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5474 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5475 is larger than the class size, then reload the whole SUBREG. */
5478 enum reg_class
class = (context
? INDEX_REG_CLASS
5480 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5481 > reg_class_size
[class])
5483 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5485 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5486 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5498 register const char *fmt
= GET_RTX_FORMAT (code
);
5501 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5504 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5505 opnum
, type
, ind_levels
, insn
);
5512 /* X, which is found at *LOC, is a part of an address that needs to be
5513 reloaded into a register of class CLASS. If X is a constant, or if
5514 X is a PLUS that contains a constant, check that the constant is a
5515 legitimate operand and that we are supposed to be able to load
5516 it into the register.
5518 If not, force the constant into memory and reload the MEM instead.
5520 MODE is the mode to use, in case X is an integer constant.
5522 OPNUM and TYPE describe the purpose of any reloads made.
5524 IND_LEVELS says how many levels of indirect addressing this machine
5528 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5531 enum reg_class
class;
5532 enum machine_mode mode
;
5534 enum reload_type type
;
5538 && (! LEGITIMATE_CONSTANT_P (x
)
5539 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5543 /* If this is a CONST_INT, it could have been created by a
5544 plus_constant call in eliminate_regs, which means it may be
5545 on the reload_obstack. reload_obstack will be freed later, so
5546 we can't allow such RTL to be put in the constant pool. There
5547 is code in force_const_mem to check for this case, but it doesn't
5548 work because we have already popped off the reload_obstack, so
5549 rtl_obstack == saveable_obstack is true at this point. */
5550 if (GET_CODE (x
) == CONST_INT
)
5551 tem
= x
= force_const_mem (mode
, GEN_INT (INTVAL (x
)));
5553 tem
= x
= force_const_mem (mode
, x
);
5555 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5556 opnum
, type
, ind_levels
, 0);
5559 else if (GET_CODE (x
) == PLUS
5560 && CONSTANT_P (XEXP (x
, 1))
5561 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5562 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5566 /* See comment above. */
5567 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
5568 tem
= force_const_mem (GET_MODE (x
), GEN_INT (INTVAL (XEXP (x
, 1))));
5570 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5572 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5573 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5574 opnum
, type
, ind_levels
, 0);
5577 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5578 mode
, VOIDmode
, 0, 0, opnum
, type
);
5581 /* X, a subreg of a pseudo, is a part of an address that needs to be
5584 If the pseudo is equivalent to a memory location that cannot be directly
5585 addressed, make the necessary address reloads.
5587 If address reloads have been necessary, or if the address is changed
5588 by register elimination, return the rtx of the memory location;
5589 otherwise, return X.
5591 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5594 OPNUM and TYPE identify the purpose of the reload.
5596 IND_LEVELS says how many levels of indirect addressing are
5597 supported at this point in the address.
5599 INSN, if nonzero, is the insn in which we do the reload. It is used
5600 to determine where to put USEs for pseudos that we have to replace with
5604 find_reloads_subreg_address (x
, force_replace
, opnum
, type
,
5609 enum reload_type type
;
5613 int regno
= REGNO (SUBREG_REG (x
));
5615 if (reg_equiv_memory_loc
[regno
])
5617 /* If the address is not directly addressable, or if the address is not
5618 offsettable, then it must be replaced. */
5620 && (reg_equiv_address
[regno
]
5621 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5624 if (force_replace
|| num_not_at_initial_offset
)
5626 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5628 /* If the address changes because of register elimination, then
5629 it must be replaced. */
5631 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5633 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
5635 if (BYTES_BIG_ENDIAN
)
5639 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5640 offset
+= MIN (size
, UNITS_PER_WORD
);
5641 size
= GET_MODE_SIZE (GET_MODE (x
));
5642 offset
-= MIN (size
, UNITS_PER_WORD
);
5644 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5645 PUT_MODE (tem
, GET_MODE (x
));
5646 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5647 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5649 /* If this is not a toplevel operand, find_reloads doesn't see
5650 this substitution. We have to emit a USE of the pseudo so
5651 that delete_output_reload can see it. */
5652 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5653 emit_insn_before (gen_rtx_USE (VOIDmode
, SUBREG_REG (x
)), insn
);
5661 /* Substitute into the current INSN the registers into which we have reloaded
5662 the things that need reloading. The array `replacements'
5663 contains the locations of all pointers that must be changed
5664 and says what to replace them with.
5666 Return the rtx that X translates into; usually X, but modified. */
5673 for (i
= 0; i
< n_replacements
; i
++)
5675 register struct replacement
*r
= &replacements
[i
];
5676 register rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5679 /* Encapsulate RELOADREG so its machine mode matches what
5680 used to be there. Note that gen_lowpart_common will
5681 do the wrong thing if RELOADREG is multi-word. RELOADREG
5682 will always be a REG here. */
5683 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5684 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5686 /* If we are putting this into a SUBREG and RELOADREG is a
5687 SUBREG, we would be making nested SUBREGs, so we have to fix
5688 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5690 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5692 if (GET_MODE (*r
->subreg_loc
)
5693 == GET_MODE (SUBREG_REG (reloadreg
)))
5694 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5697 *r
->where
= SUBREG_REG (reloadreg
);
5698 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
5702 *r
->where
= reloadreg
;
5704 /* If reload got no reg and isn't optional, something's wrong. */
5705 else if (! rld
[r
->what
].optional
)
5710 /* Make a copy of any replacements being done into X and move those copies
5711 to locations in Y, a copy of X. We only look at the highest level of
5715 copy_replacements (x
, y
)
5720 enum rtx_code code
= GET_CODE (x
);
5721 const char *fmt
= GET_RTX_FORMAT (code
);
5722 struct replacement
*r
;
5724 /* We can't support X being a SUBREG because we might then need to know its
5725 location if something inside it was replaced. */
5729 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5731 for (j
= 0; j
< n_replacements
; j
++)
5733 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
5735 r
= &replacements
[n_replacements
++];
5736 r
->where
= replacements
[j
].where
;
5737 r
->subreg_loc
= &XEXP (y
, i
);
5738 r
->what
= replacements
[j
].what
;
5739 r
->mode
= replacements
[j
].mode
;
5741 else if (replacements
[j
].where
== &XEXP (x
, i
))
5743 r
= &replacements
[n_replacements
++];
5744 r
->where
= &XEXP (y
, i
);
5746 r
->what
= replacements
[j
].what
;
5747 r
->mode
= replacements
[j
].mode
;
5752 /* Change any replacements being done to *X to be done to *Y */
5755 move_replacements (x
, y
)
5761 for (i
= 0; i
< n_replacements
; i
++)
5762 if (replacements
[i
].subreg_loc
== x
)
5763 replacements
[i
].subreg_loc
= y
;
5764 else if (replacements
[i
].where
== x
)
5766 replacements
[i
].where
= y
;
5767 replacements
[i
].subreg_loc
= 0;
5771 /* If LOC was scheduled to be replaced by something, return the replacement.
5772 Otherwise, return *LOC. */
5775 find_replacement (loc
)
5778 struct replacement
*r
;
5780 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
5782 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5784 if (reloadreg
&& r
->where
== loc
)
5786 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
5787 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5791 else if (reloadreg
&& r
->subreg_loc
== loc
)
5793 /* RELOADREG must be either a REG or a SUBREG.
5795 ??? Is it actually still ever a SUBREG? If so, why? */
5797 if (GET_CODE (reloadreg
) == REG
)
5798 return gen_rtx_REG (GET_MODE (*loc
),
5799 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
5800 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
5803 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
5804 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
5808 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5809 what's inside and make a new rtl if so. */
5810 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
5811 || GET_CODE (*loc
) == MULT
)
5813 rtx x
= find_replacement (&XEXP (*loc
, 0));
5814 rtx y
= find_replacement (&XEXP (*loc
, 1));
5816 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
5817 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
5823 /* Return nonzero if register in range [REGNO, ENDREGNO)
5824 appears either explicitly or implicitly in X
5825 other than being stored into (except for earlyclobber operands).
5827 References contained within the substructure at LOC do not count.
5828 LOC may be zero, meaning don't ignore anything.
5830 This is similar to refers_to_regno_p in rtlanal.c except that we
5831 look at equivalences for pseudos that didn't get hard registers. */
5834 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
5835 unsigned int regno
, endregno
;
5848 code
= GET_CODE (x
);
5855 /* If this is a pseudo, a hard register must not have been allocated.
5856 X must therefore either be a constant or be in memory. */
5857 if (r
>= FIRST_PSEUDO_REGISTER
)
5859 if (reg_equiv_memory_loc
[r
])
5860 return refers_to_regno_for_reload_p (regno
, endregno
,
5861 reg_equiv_memory_loc
[r
],
5864 if (reg_equiv_constant
[r
])
5870 return (endregno
> r
5871 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
5872 ? HARD_REGNO_NREGS (r
, GET_MODE (x
))
5876 /* If this is a SUBREG of a hard reg, we can see exactly which
5877 registers are being modified. Otherwise, handle normally. */
5878 if (GET_CODE (SUBREG_REG (x
)) == REG
5879 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5881 unsigned int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5882 unsigned int inner_endregno
5883 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
5884 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5886 return endregno
> inner_regno
&& regno
< inner_endregno
;
5892 if (&SET_DEST (x
) != loc
5893 /* Note setting a SUBREG counts as referring to the REG it is in for
5894 a pseudo but not for hard registers since we can
5895 treat each word individually. */
5896 && ((GET_CODE (SET_DEST (x
)) == SUBREG
5897 && loc
!= &SUBREG_REG (SET_DEST (x
))
5898 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
5899 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
5900 && refers_to_regno_for_reload_p (regno
, endregno
,
5901 SUBREG_REG (SET_DEST (x
)),
5903 /* If the output is an earlyclobber operand, this is
5905 || ((GET_CODE (SET_DEST (x
)) != REG
5906 || earlyclobber_operand_p (SET_DEST (x
)))
5907 && refers_to_regno_for_reload_p (regno
, endregno
,
5908 SET_DEST (x
), loc
))))
5911 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
5920 /* X does not match, so try its subexpressions. */
5922 fmt
= GET_RTX_FORMAT (code
);
5923 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5925 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
5933 if (refers_to_regno_for_reload_p (regno
, endregno
,
5937 else if (fmt
[i
] == 'E')
5940 for (j
= XVECLEN (x
, i
) - 1; j
>=0; j
--)
5941 if (loc
!= &XVECEXP (x
, i
, j
)
5942 && refers_to_regno_for_reload_p (regno
, endregno
,
5943 XVECEXP (x
, i
, j
), loc
))
5950 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5951 we check if any register number in X conflicts with the relevant register
5952 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5953 contains a MEM (we don't bother checking for memory addresses that can't
5954 conflict because we expect this to be a rare case.
5956 This function is similar to reg_overlap_mention_p in rtlanal.c except
5957 that we look at equivalences for pseudos that didn't get hard registers. */
5960 reg_overlap_mentioned_for_reload_p (x
, in
)
5963 int regno
, endregno
;
5965 /* Overly conservative. */
5966 if (GET_CODE (x
) == STRICT_LOW_PART
)
5969 /* If either argument is a constant, then modifying X can not affect IN. */
5970 if (CONSTANT_P (x
) || CONSTANT_P (in
))
5972 else if (GET_CODE (x
) == SUBREG
)
5974 regno
= REGNO (SUBREG_REG (x
));
5975 if (regno
< FIRST_PSEUDO_REGISTER
)
5976 regno
+= SUBREG_WORD (x
);
5978 else if (GET_CODE (x
) == REG
)
5982 /* If this is a pseudo, it must not have been assigned a hard register.
5983 Therefore, it must either be in memory or be a constant. */
5985 if (regno
>= FIRST_PSEUDO_REGISTER
)
5987 if (reg_equiv_memory_loc
[regno
])
5988 return refers_to_mem_for_reload_p (in
);
5989 else if (reg_equiv_constant
[regno
])
5994 else if (GET_CODE (x
) == MEM
)
5995 return refers_to_mem_for_reload_p (in
);
5996 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
5997 || GET_CODE (x
) == CC0
)
5998 return reg_mentioned_p (x
, in
);
6002 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6003 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6005 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
6008 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6012 refers_to_mem_for_reload_p (x
)
6018 if (GET_CODE (x
) == MEM
)
6021 if (GET_CODE (x
) == REG
)
6022 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6023 && reg_equiv_memory_loc
[REGNO (x
)]);
6025 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6026 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6028 && (GET_CODE (XEXP (x
, i
)) == MEM
6029 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6035 /* Check the insns before INSN to see if there is a suitable register
6036 containing the same value as GOAL.
6037 If OTHER is -1, look for a register in class CLASS.
6038 Otherwise, just see if register number OTHER shares GOAL's value.
6040 Return an rtx for the register found, or zero if none is found.
6042 If RELOAD_REG_P is (short *)1,
6043 we reject any hard reg that appears in reload_reg_rtx
6044 because such a hard reg is also needed coming into this insn.
6046 If RELOAD_REG_P is any other nonzero value,
6047 it is a vector indexed by hard reg number
6048 and we reject any hard reg whose element in the vector is nonnegative
6049 as well as any that appears in reload_reg_rtx.
6051 If GOAL is zero, then GOALREG is a register number; we look
6052 for an equivalent for that register.
6054 MODE is the machine mode of the value we want an equivalence for.
6055 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6057 This function is used by jump.c as well as in the reload pass.
6059 If GOAL is the sum of the stack pointer and a constant, we treat it
6060 as if it were a constant except that sp is required to be unchanging. */
6063 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
6066 enum reg_class
class;
6068 short *reload_reg_p
;
6070 enum machine_mode mode
;
6072 register rtx p
= insn
;
6073 rtx goaltry
, valtry
, value
, where
;
6075 register int regno
= -1;
6079 int goal_mem_addr_varies
= 0;
6080 int need_stable_sp
= 0;
6086 else if (GET_CODE (goal
) == REG
)
6087 regno
= REGNO (goal
);
6088 else if (GET_CODE (goal
) == MEM
)
6090 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6091 if (MEM_VOLATILE_P (goal
))
6093 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
6095 /* An address with side effects must be reexecuted. */
6110 else if (CONSTANT_P (goal
))
6112 else if (GET_CODE (goal
) == PLUS
6113 && XEXP (goal
, 0) == stack_pointer_rtx
6114 && CONSTANT_P (XEXP (goal
, 1)))
6115 goal_const
= need_stable_sp
= 1;
6116 else if (GET_CODE (goal
) == PLUS
6117 && XEXP (goal
, 0) == frame_pointer_rtx
6118 && CONSTANT_P (XEXP (goal
, 1)))
6123 /* Scan insns back from INSN, looking for one that copies
6124 a value into or out of GOAL.
6125 Stop and give up if we reach a label. */
6130 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
6133 if (GET_CODE (p
) == INSN
6134 /* If we don't want spill regs ... */
6135 && (! (reload_reg_p
!= 0
6136 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6137 /* ... then ignore insns introduced by reload; they aren't
6138 useful and can cause results in reload_as_needed to be
6139 different from what they were when calculating the need for
6140 spills. If we notice an input-reload insn here, we will
6141 reject it below, but it might hide a usable equivalent.
6142 That makes bad code. It may even abort: perhaps no reg was
6143 spilled for this insn because it was assumed we would find
6145 || INSN_UID (p
) < reload_first_uid
))
6148 pat
= single_set (p
);
6150 /* First check for something that sets some reg equal to GOAL. */
6153 && true_regnum (SET_SRC (pat
)) == regno
6154 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6157 && true_regnum (SET_DEST (pat
)) == regno
6158 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6160 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6161 /* When looking for stack pointer + const,
6162 make sure we don't use a stack adjust. */
6163 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6164 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6166 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6167 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6169 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6170 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6171 /* If we are looking for a constant,
6172 and something equivalent to that constant was copied
6173 into a reg, we can use that reg. */
6174 || (goal_const
&& REG_NOTES (p
) != 0
6175 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6176 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6178 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6179 || (GET_CODE (SET_DEST (pat
)) == REG
6180 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6181 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6183 && GET_CODE (goal
) == CONST_INT
6185 = operand_subword (XEXP (tem
, 0), 0, 0,
6187 && rtx_equal_p (goal
, goaltry
)
6189 = operand_subword (SET_DEST (pat
), 0, 0,
6191 && (valueno
= true_regnum (valtry
)) >= 0)))
6192 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6194 && GET_CODE (SET_DEST (pat
)) == REG
6195 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6196 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6198 && GET_CODE (goal
) == CONST_INT
6199 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6201 && rtx_equal_p (goal
, goaltry
)
6203 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6204 && (valueno
= true_regnum (valtry
)) >= 0)))
6207 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
6208 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6218 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6219 (or copying VALUE into GOAL, if GOAL is also a register).
6220 Now verify that VALUE is really valid. */
6222 /* VALUENO is the register number of VALUE; a hard register. */
6224 /* Don't try to re-use something that is killed in this insn. We want
6225 to be able to trust REG_UNUSED notes. */
6226 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6229 /* If we propose to get the value from the stack pointer or if GOAL is
6230 a MEM based on the stack pointer, we need a stable SP. */
6231 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6232 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6236 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6237 if (GET_MODE (value
) != mode
)
6240 /* Reject VALUE if it was loaded from GOAL
6241 and is also a register that appears in the address of GOAL. */
6243 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6244 && refers_to_regno_for_reload_p (valueno
,
6246 + HARD_REGNO_NREGS (valueno
, mode
)),
6250 /* Reject registers that overlap GOAL. */
6252 if (!goal_mem
&& !goal_const
6253 && regno
+ (int) HARD_REGNO_NREGS (regno
, mode
) > valueno
6254 && regno
< valueno
+ (int) HARD_REGNO_NREGS (valueno
, mode
))
6257 nregs
= HARD_REGNO_NREGS (regno
, mode
);
6258 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
6260 /* Reject VALUE if it is one of the regs reserved for reloads.
6261 Reload1 knows how to reuse them anyway, and it would get
6262 confused if we allocated one without its knowledge.
6263 (Now that insns introduced by reload are ignored above,
6264 this case shouldn't happen, but I'm not positive.) */
6266 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6269 for (i
= 0; i
< valuenregs
; ++i
)
6270 if (reload_reg_p
[valueno
+ i
] >= 0)
6274 /* Reject VALUE if it is a register being used for an input reload
6275 even if it is not one of those reserved. */
6277 if (reload_reg_p
!= 0)
6280 for (i
= 0; i
< n_reloads
; i
++)
6281 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6283 int regno1
= REGNO (rld
[i
].reg_rtx
);
6284 int nregs1
= HARD_REGNO_NREGS (regno1
,
6285 GET_MODE (rld
[i
].reg_rtx
));
6286 if (regno1
< valueno
+ valuenregs
6287 && regno1
+ nregs1
> valueno
)
6293 /* We must treat frame pointer as varying here,
6294 since it can vary--in a nonlocal goto as generated by expand_goto. */
6295 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6297 /* Now verify that the values of GOAL and VALUE remain unaltered
6298 until INSN is reached. */
6307 /* Don't trust the conversion past a function call
6308 if either of the two is in a call-clobbered register, or memory. */
6309 if (GET_CODE (p
) == CALL_INSN
)
6313 if (goal_mem
|| need_stable_sp
)
6316 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6317 for (i
= 0; i
< nregs
; ++i
)
6318 if (call_used_regs
[regno
+ i
])
6321 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6322 for (i
= 0; i
< valuenregs
; ++i
)
6323 if (call_used_regs
[valueno
+ i
])
6327 #ifdef NON_SAVING_SETJMP
6328 if (NON_SAVING_SETJMP
&& GET_CODE (p
) == NOTE
6329 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
6337 /* Watch out for unspec_volatile, and volatile asms. */
6338 if (volatile_insn_p (pat
))
6341 /* If this insn P stores in either GOAL or VALUE, return 0.
6342 If GOAL is a memory ref and this insn writes memory, return 0.
6343 If GOAL is a memory ref and its address is not constant,
6344 and this insn P changes a register used in GOAL, return 0. */
6346 if (GET_CODE (pat
) == COND_EXEC
)
6347 pat
= COND_EXEC_CODE (pat
);
6348 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6350 register rtx dest
= SET_DEST (pat
);
6351 while (GET_CODE (dest
) == SUBREG
6352 || GET_CODE (dest
) == ZERO_EXTRACT
6353 || GET_CODE (dest
) == SIGN_EXTRACT
6354 || GET_CODE (dest
) == STRICT_LOW_PART
)
6355 dest
= XEXP (dest
, 0);
6356 if (GET_CODE (dest
) == REG
)
6358 register int xregno
= REGNO (dest
);
6360 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6361 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6364 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6366 if (xregno
< valueno
+ valuenregs
6367 && xregno
+ xnregs
> valueno
)
6369 if (goal_mem_addr_varies
6370 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6372 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6375 else if (goal_mem
&& GET_CODE (dest
) == MEM
6376 && ! push_operand (dest
, GET_MODE (dest
)))
6378 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6379 && reg_equiv_memory_loc
[regno
] != 0)
6381 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6384 else if (GET_CODE (pat
) == PARALLEL
)
6387 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6389 register rtx v1
= XVECEXP (pat
, 0, i
);
6390 if (GET_CODE (v1
) == COND_EXEC
)
6391 v1
= COND_EXEC_CODE (v1
);
6392 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6394 register rtx dest
= SET_DEST (v1
);
6395 while (GET_CODE (dest
) == SUBREG
6396 || GET_CODE (dest
) == ZERO_EXTRACT
6397 || GET_CODE (dest
) == SIGN_EXTRACT
6398 || GET_CODE (dest
) == STRICT_LOW_PART
)
6399 dest
= XEXP (dest
, 0);
6400 if (GET_CODE (dest
) == REG
)
6402 register int xregno
= REGNO (dest
);
6404 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6405 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6408 if (xregno
< regno
+ nregs
6409 && xregno
+ xnregs
> regno
)
6411 if (xregno
< valueno
+ valuenregs
6412 && xregno
+ xnregs
> valueno
)
6414 if (goal_mem_addr_varies
6415 && reg_overlap_mentioned_for_reload_p (dest
,
6418 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6421 else if (goal_mem
&& GET_CODE (dest
) == MEM
6422 && ! push_operand (dest
, GET_MODE (dest
)))
6424 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6425 && reg_equiv_memory_loc
[regno
] != 0)
6427 else if (need_stable_sp
6428 && push_operand (dest
, GET_MODE (dest
)))
6434 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6438 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6439 link
= XEXP (link
, 1))
6441 pat
= XEXP (link
, 0);
6442 if (GET_CODE (pat
) == CLOBBER
)
6444 register rtx dest
= SET_DEST (pat
);
6446 if (GET_CODE (dest
) == REG
)
6448 register int xregno
= REGNO (dest
);
6450 = HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6452 if (xregno
< regno
+ nregs
6453 && xregno
+ xnregs
> regno
)
6455 else if (xregno
< valueno
+ valuenregs
6456 && xregno
+ xnregs
> valueno
)
6458 else if (goal_mem_addr_varies
6459 && reg_overlap_mentioned_for_reload_p (dest
,
6464 else if (goal_mem
&& GET_CODE (dest
) == MEM
6465 && ! push_operand (dest
, GET_MODE (dest
)))
6467 else if (need_stable_sp
6468 && push_operand (dest
, GET_MODE (dest
)))
6475 /* If this insn auto-increments or auto-decrements
6476 either regno or valueno, return 0 now.
6477 If GOAL is a memory ref and its address is not constant,
6478 and this insn P increments a register used in GOAL, return 0. */
6482 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6483 if (REG_NOTE_KIND (link
) == REG_INC
6484 && GET_CODE (XEXP (link
, 0)) == REG
)
6486 register int incno
= REGNO (XEXP (link
, 0));
6487 if (incno
< regno
+ nregs
&& incno
>= regno
)
6489 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6491 if (goal_mem_addr_varies
6492 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6502 /* Find a place where INCED appears in an increment or decrement operator
6503 within X, and return the amount INCED is incremented or decremented by.
6504 The value is always positive. */
6507 find_inc_amount (x
, inced
)
6510 register enum rtx_code code
= GET_CODE (x
);
6511 register const char *fmt
;
6516 register rtx addr
= XEXP (x
, 0);
6517 if ((GET_CODE (addr
) == PRE_DEC
6518 || GET_CODE (addr
) == POST_DEC
6519 || GET_CODE (addr
) == PRE_INC
6520 || GET_CODE (addr
) == POST_INC
)
6521 && XEXP (addr
, 0) == inced
)
6522 return GET_MODE_SIZE (GET_MODE (x
));
6523 else if ((GET_CODE (addr
) == PRE_MODIFY
6524 || GET_CODE (addr
) == POST_MODIFY
)
6525 && GET_CODE (XEXP (addr
, 1)) == PLUS
6526 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
6527 && XEXP (addr
, 0) == inced
6528 && GET_CODE (XEXP (XEXP (addr
, 1), 1)) == CONST_INT
)
6530 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
6531 return i
< 0 ? -i
: i
;
6535 fmt
= GET_RTX_FORMAT (code
);
6536 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6540 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6547 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6549 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6559 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6562 regno_clobbered_p (regno
, insn
)
6566 if (GET_CODE (PATTERN (insn
)) == CLOBBER
6567 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6568 return REGNO (XEXP (PATTERN (insn
), 0)) == regno
;
6570 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6572 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6576 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6577 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
6578 && REGNO (XEXP (elt
, 0)) == regno
)
6586 static const char *reload_when_needed_name
[] =
6589 "RELOAD_FOR_OUTPUT",
6591 "RELOAD_FOR_INPUT_ADDRESS",
6592 "RELOAD_FOR_INPADDR_ADDRESS",
6593 "RELOAD_FOR_OUTPUT_ADDRESS",
6594 "RELOAD_FOR_OUTADDR_ADDRESS",
6595 "RELOAD_FOR_OPERAND_ADDRESS",
6596 "RELOAD_FOR_OPADDR_ADDR",
6598 "RELOAD_FOR_OTHER_ADDRESS"
6601 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
6603 /* These functions are used to print the variables set by 'find_reloads' */
6606 debug_reload_to_stream (f
)
6614 for (r
= 0; r
< n_reloads
; r
++)
6616 fprintf (f
, "Reload %d: ", r
);
6620 fprintf (f
, "reload_in (%s) = ",
6621 GET_MODE_NAME (rld
[r
].inmode
));
6622 print_inline_rtx (f
, rld
[r
].in
, 24);
6623 fprintf (f
, "\n\t");
6626 if (rld
[r
].out
!= 0)
6628 fprintf (f
, "reload_out (%s) = ",
6629 GET_MODE_NAME (rld
[r
].outmode
));
6630 print_inline_rtx (f
, rld
[r
].out
, 24);
6631 fprintf (f
, "\n\t");
6634 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
6636 fprintf (f
, "%s (opnum = %d)",
6637 reload_when_needed_name
[(int) rld
[r
].when_needed
],
6640 if (rld
[r
].optional
)
6641 fprintf (f
, ", optional");
6643 if (rld
[r
].nongroup
)
6644 fprintf (stderr
, ", nongroup");
6646 if (rld
[r
].inc
!= 0)
6647 fprintf (f
, ", inc by %d", rld
[r
].inc
);
6649 if (rld
[r
].nocombine
)
6650 fprintf (f
, ", can't combine");
6652 if (rld
[r
].secondary_p
)
6653 fprintf (f
, ", secondary_reload_p");
6655 if (rld
[r
].in_reg
!= 0)
6657 fprintf (f
, "\n\treload_in_reg: ");
6658 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
6661 if (rld
[r
].out_reg
!= 0)
6663 fprintf (f
, "\n\treload_out_reg: ");
6664 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
6667 if (rld
[r
].reg_rtx
!= 0)
6669 fprintf (f
, "\n\treload_reg_rtx: ");
6670 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
6674 if (rld
[r
].secondary_in_reload
!= -1)
6676 fprintf (f
, "%ssecondary_in_reload = %d",
6677 prefix
, rld
[r
].secondary_in_reload
);
6681 if (rld
[r
].secondary_out_reload
!= -1)
6682 fprintf (f
, "%ssecondary_out_reload = %d\n",
6683 prefix
, rld
[r
].secondary_out_reload
);
6686 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
6688 fprintf (stderr
, "%ssecondary_in_icode = %s", prefix
,
6689 insn_data
[rld
[r
].secondary_in_icode
].name
);
6693 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
6694 fprintf (stderr
, "%ssecondary_out_icode = %s", prefix
,
6695 insn_data
[rld
[r
].secondary_out_icode
].name
);
6704 debug_reload_to_stream (stderr
);