1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
93 #include "insn-config.h"
99 #include "hard-reg-set.h"
103 #include "function.h"
106 #ifndef REGISTER_MOVE_COST
107 #define REGISTER_MOVE_COST(m, x, y) 2
110 #ifndef REGNO_MODE_OK_FOR_BASE_P
111 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
114 #ifndef REG_MODE_OK_FOR_BASE_P
115 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
118 /* All reloads of the current insn are recorded here. See reload.h for
121 struct reload rld
[MAX_RELOADS
];
123 /* All the "earlyclobber" operands of the current insn
124 are recorded here. */
126 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
128 int reload_n_operands
;
130 /* Replacing reloads.
132 If `replace_reloads' is nonzero, then as each reload is recorded
133 an entry is made for it in the table `replacements'.
134 Then later `subst_reloads' can look through that table and
135 perform all the replacements needed. */
137 /* Nonzero means record the places to replace. */
138 static int replace_reloads
;
140 /* Each replacement is recorded with a structure like this. */
143 rtx
*where
; /* Location to store in */
144 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
145 a SUBREG; 0 otherwise. */
146 int what
; /* which reload this is for */
147 enum machine_mode mode
; /* mode it must have */
150 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
152 /* Number of replacements currently recorded. */
153 static int n_replacements
;
155 /* Used to track what is modified by an operand. */
158 int reg_flag
; /* Nonzero if referencing a register. */
159 int safe
; /* Nonzero if this can't conflict with anything. */
160 rtx base
; /* Base address for MEM. */
161 HOST_WIDE_INT start
; /* Starting offset or register number. */
162 HOST_WIDE_INT end
; /* Ending offset or register number. */
165 #ifdef SECONDARY_MEMORY_NEEDED
167 /* Save MEMs needed to copy from one class of registers to another. One MEM
168 is used per mode, but normally only one or two modes are ever used.
170 We keep two versions, before and after register elimination. The one
171 after register elimination is record separately for each operand. This
172 is done in case the address is not valid to be sure that we separately
175 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
176 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
179 /* The instruction we are doing reloads for;
180 so we can test whether a register dies in it. */
181 static rtx this_insn
;
183 /* Nonzero if this instruction is a user-specified asm with operands. */
184 static int this_insn_is_asm
;
186 /* If hard_regs_live_known is nonzero,
187 we can tell which hard regs are currently live,
188 at least enough to succeed in choosing dummy reloads. */
189 static int hard_regs_live_known
;
191 /* Indexed by hard reg number,
192 element is nonnegative if hard reg has been spilled.
193 This vector is passed to `find_reloads' as an argument
194 and is not changed here. */
195 static short *static_reload_reg_p
;
197 /* Set to 1 in subst_reg_equivs if it changes anything. */
198 static int subst_reg_equivs_changed
;
200 /* On return from push_reload, holds the reload-number for the OUT
201 operand, which can be different for that from the input operand. */
202 static int output_reloadnum
;
204 /* Compare two RTX's. */
205 #define MATCHES(x, y) \
206 (x == y || (x != 0 && (GET_CODE (x) == REG \
207 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
208 : rtx_equal_p (x, y) && ! side_effects_p (x))))
210 /* Indicates if two reloads purposes are for similar enough things that we
211 can merge their reloads. */
212 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
213 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
214 || ((when1) == (when2) && (op1) == (op2)) \
215 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
216 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
217 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
218 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
219 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
221 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
222 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
223 ((when1) != (when2) \
224 || ! ((op1) == (op2) \
225 || (when1) == RELOAD_FOR_INPUT \
226 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
227 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
229 /* If we are going to reload an address, compute the reload type to
231 #define ADDR_TYPE(type) \
232 ((type) == RELOAD_FOR_INPUT_ADDRESS \
233 ? RELOAD_FOR_INPADDR_ADDRESS \
234 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
235 ? RELOAD_FOR_OUTADDR_ADDRESS \
238 #ifdef HAVE_SECONDARY_RELOADS
239 static int push_secondary_reload
PARAMS ((int, rtx
, int, int, enum reg_class
,
240 enum machine_mode
, enum reload_type
,
243 static enum reg_class find_valid_class
PARAMS ((enum machine_mode
, int));
244 static int reload_inner_reg_of_subreg
PARAMS ((rtx
, enum machine_mode
));
245 static int push_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
246 enum machine_mode
, enum machine_mode
,
247 int, int, int, enum reload_type
));
248 static void push_replacement
PARAMS ((rtx
*, int, enum machine_mode
));
249 static void combine_reloads
PARAMS ((void));
250 static int find_reusable_reload
PARAMS ((rtx
*, rtx
, enum reg_class
,
251 enum reload_type
, int, int));
252 static rtx find_dummy_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*,
253 enum machine_mode
, enum machine_mode
,
254 enum reg_class
, int, int));
255 static int hard_reg_set_here_p
PARAMS ((unsigned int, unsigned int, rtx
));
256 static struct decomposition decompose
PARAMS ((rtx
));
257 static int immune_p
PARAMS ((rtx
, rtx
, struct decomposition
));
258 static int alternative_allows_memconst
PARAMS ((const char *, int));
259 static rtx find_reloads_toplev
PARAMS ((rtx
, int, enum reload_type
, int,
261 static rtx make_memloc
PARAMS ((rtx
, int));
262 static int find_reloads_address
PARAMS ((enum machine_mode
, rtx
*, rtx
, rtx
*,
263 int, enum reload_type
, int, rtx
));
264 static rtx subst_reg_equivs
PARAMS ((rtx
, rtx
));
265 static rtx subst_indexed_address
PARAMS ((rtx
));
266 static void update_auto_inc_notes
PARAMS ((rtx
, int, int));
267 static int find_reloads_address_1
PARAMS ((enum machine_mode
, rtx
, int, rtx
*,
268 int, enum reload_type
,int, rtx
));
269 static void find_reloads_address_part
PARAMS ((rtx
, rtx
*, enum reg_class
,
270 enum machine_mode
, int,
271 enum reload_type
, int));
272 static rtx find_reloads_subreg_address
PARAMS ((rtx
, int, int, enum reload_type
,
274 static int find_inc_amount
PARAMS ((rtx
, rtx
));
276 #ifdef HAVE_SECONDARY_RELOADS
278 /* Determine if any secondary reloads are needed for loading (if IN_P is
279 non-zero) or storing (if IN_P is zero) X to or from a reload register of
280 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
281 are needed, push them.
283 Return the reload number of the secondary reload we made, or -1 if
284 we didn't need one. *PICODE is set to the insn_code to use if we do
285 need a secondary reload. */
288 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
294 enum reg_class reload_class
;
295 enum machine_mode reload_mode
;
296 enum reload_type type
;
297 enum insn_code
*picode
;
299 enum reg_class
class = NO_REGS
;
300 enum machine_mode mode
= reload_mode
;
301 enum insn_code icode
= CODE_FOR_nothing
;
302 enum reg_class t_class
= NO_REGS
;
303 enum machine_mode t_mode
= VOIDmode
;
304 enum insn_code t_icode
= CODE_FOR_nothing
;
305 enum reload_type secondary_type
;
306 int s_reload
, t_reload
= -1;
308 if (type
== RELOAD_FOR_INPUT_ADDRESS
309 || type
== RELOAD_FOR_OUTPUT_ADDRESS
310 || type
== RELOAD_FOR_INPADDR_ADDRESS
311 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
312 secondary_type
= type
;
314 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
316 *picode
= CODE_FOR_nothing
;
318 /* If X is a paradoxical SUBREG, use the inner value to determine both the
319 mode and object being reloaded. */
320 if (GET_CODE (x
) == SUBREG
321 && (GET_MODE_SIZE (GET_MODE (x
))
322 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
325 reload_mode
= GET_MODE (x
);
328 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
329 is still a pseudo-register by now, it *must* have an equivalent MEM
330 but we don't want to assume that), use that equivalent when seeing if
331 a secondary reload is needed since whether or not a reload is needed
332 might be sensitive to the form of the MEM. */
334 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
335 && reg_equiv_mem
[REGNO (x
)] != 0)
336 x
= reg_equiv_mem
[REGNO (x
)];
338 #ifdef SECONDARY_INPUT_RELOAD_CLASS
340 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
343 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
345 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
348 /* If we don't need any secondary registers, done. */
349 if (class == NO_REGS
)
352 /* Get a possible insn to use. If the predicate doesn't accept X, don't
355 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
356 : reload_out_optab
[(int) reload_mode
]);
358 if (icode
!= CODE_FOR_nothing
359 && insn_data
[(int) icode
].operand
[in_p
].predicate
360 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
361 icode
= CODE_FOR_nothing
;
363 /* If we will be using an insn, see if it can directly handle the reload
364 register we will be using. If it can, the secondary reload is for a
365 scratch register. If it can't, we will use the secondary reload for
366 an intermediate register and require a tertiary reload for the scratch
369 if (icode
!= CODE_FOR_nothing
)
371 /* If IN_P is non-zero, the reload register will be the output in
372 operand 0. If IN_P is zero, the reload register will be the input
373 in operand 1. Outputs should have an initial "=", which we must
376 enum reg_class insn_class
;
378 if (insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] == 0)
379 insn_class
= ALL_REGS
;
383 = insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
385 = (insn_letter
== 'r' ? GENERAL_REGS
386 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter
));
389 if (insn_class
== NO_REGS
391 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
392 /* The scratch register's constraint must start with "=&". */
393 || insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
394 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
397 if (reg_class_subset_p (reload_class
, insn_class
))
398 mode
= insn_data
[(int) icode
].operand
[2].mode
;
401 char t_letter
= insn_data
[(int) icode
].operand
[2].constraint
[2];
403 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
404 t_class
= (t_letter
== 'r' ? GENERAL_REGS
405 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter
));
407 icode
= CODE_FOR_nothing
;
411 /* This case isn't valid, so fail. Reload is allowed to use the same
412 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
413 in the case of a secondary register, we actually need two different
414 registers for correct code. We fail here to prevent the possibility of
415 silently generating incorrect code later.
417 The convention is that secondary input reloads are valid only if the
418 secondary_class is different from class. If you have such a case, you
419 can not use secondary reloads, you must work around the problem some
422 Allow this when a reload_in/out pattern is being used. I.e. assume
423 that the generated code handles this case. */
425 if (in_p
&& class == reload_class
&& icode
== CODE_FOR_nothing
426 && t_icode
== CODE_FOR_nothing
)
429 /* If we need a tertiary reload, see if we have one we can reuse or else
432 if (t_class
!= NO_REGS
)
434 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
435 if (rld
[t_reload
].secondary_p
436 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
437 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
438 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
439 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
440 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
441 == CODE_FOR_nothing
))
442 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
443 == CODE_FOR_nothing
)))
444 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
445 && MERGABLE_RELOADS (secondary_type
,
446 rld
[t_reload
].when_needed
,
447 opnum
, rld
[t_reload
].opnum
))
450 rld
[t_reload
].inmode
= t_mode
;
452 rld
[t_reload
].outmode
= t_mode
;
454 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
455 rld
[t_reload
].class = t_class
;
457 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
458 rld
[t_reload
].optional
&= optional
;
459 rld
[t_reload
].secondary_p
= 1;
460 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
461 opnum
, rld
[t_reload
].opnum
))
462 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
465 if (t_reload
== n_reloads
)
467 /* We need to make a new tertiary reload for this register class. */
468 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
469 rld
[t_reload
].class = t_class
;
470 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
471 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
472 rld
[t_reload
].reg_rtx
= 0;
473 rld
[t_reload
].optional
= optional
;
474 rld
[t_reload
].inc
= 0;
475 /* Maybe we could combine these, but it seems too tricky. */
476 rld
[t_reload
].nocombine
= 1;
477 rld
[t_reload
].in_reg
= 0;
478 rld
[t_reload
].out_reg
= 0;
479 rld
[t_reload
].opnum
= opnum
;
480 rld
[t_reload
].when_needed
= secondary_type
;
481 rld
[t_reload
].secondary_in_reload
= -1;
482 rld
[t_reload
].secondary_out_reload
= -1;
483 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
484 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
485 rld
[t_reload
].secondary_p
= 1;
491 /* See if we can reuse an existing secondary reload. */
492 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
493 if (rld
[s_reload
].secondary_p
494 && (reg_class_subset_p (class, rld
[s_reload
].class)
495 || reg_class_subset_p (rld
[s_reload
].class, class))
496 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
497 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
498 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
499 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
500 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
501 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
502 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
503 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
504 opnum
, rld
[s_reload
].opnum
))
507 rld
[s_reload
].inmode
= mode
;
509 rld
[s_reload
].outmode
= mode
;
511 if (reg_class_subset_p (class, rld
[s_reload
].class))
512 rld
[s_reload
].class = class;
514 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
515 rld
[s_reload
].optional
&= optional
;
516 rld
[s_reload
].secondary_p
= 1;
517 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
518 opnum
, rld
[s_reload
].opnum
))
519 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
522 if (s_reload
== n_reloads
)
524 #ifdef SECONDARY_MEMORY_NEEDED
525 /* If we need a memory location to copy between the two reload regs,
526 set it up now. Note that we do the input case before making
527 the reload and the output case after. This is due to the
528 way reloads are output. */
530 if (in_p
&& icode
== CODE_FOR_nothing
531 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
533 get_secondary_mem (x
, reload_mode
, opnum
, type
);
535 /* We may have just added new reloads. Make sure we add
536 the new reload at the end. */
537 s_reload
= n_reloads
;
541 /* We need to make a new secondary reload for this register class. */
542 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
543 rld
[s_reload
].class = class;
545 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
546 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
547 rld
[s_reload
].reg_rtx
= 0;
548 rld
[s_reload
].optional
= optional
;
549 rld
[s_reload
].inc
= 0;
550 /* Maybe we could combine these, but it seems too tricky. */
551 rld
[s_reload
].nocombine
= 1;
552 rld
[s_reload
].in_reg
= 0;
553 rld
[s_reload
].out_reg
= 0;
554 rld
[s_reload
].opnum
= opnum
;
555 rld
[s_reload
].when_needed
= secondary_type
;
556 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
557 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
558 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
559 rld
[s_reload
].secondary_out_icode
560 = ! in_p
? t_icode
: CODE_FOR_nothing
;
561 rld
[s_reload
].secondary_p
= 1;
565 #ifdef SECONDARY_MEMORY_NEEDED
566 if (! in_p
&& icode
== CODE_FOR_nothing
567 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
568 get_secondary_mem (x
, mode
, opnum
, type
);
575 #endif /* HAVE_SECONDARY_RELOADS */
577 #ifdef SECONDARY_MEMORY_NEEDED
579 /* Return a memory location that will be used to copy X in mode MODE.
580 If we haven't already made a location for this mode in this insn,
581 call find_reloads_address on the location being returned. */
584 get_secondary_mem (x
, mode
, opnum
, type
)
585 rtx x ATTRIBUTE_UNUSED
;
586 enum machine_mode mode
;
588 enum reload_type type
;
593 /* By default, if MODE is narrower than a word, widen it to a word.
594 This is required because most machines that require these memory
595 locations do not support short load and stores from all registers
596 (e.g., FP registers). */
598 #ifdef SECONDARY_MEMORY_NEEDED_MODE
599 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
601 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
602 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
605 /* If we already have made a MEM for this operand in MODE, return it. */
606 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
607 return secondary_memlocs_elim
[(int) mode
][opnum
];
609 /* If this is the first time we've tried to get a MEM for this mode,
610 allocate a new one. `something_changed' in reload will get set
611 by noticing that the frame size has changed. */
613 if (secondary_memlocs
[(int) mode
] == 0)
615 #ifdef SECONDARY_MEMORY_NEEDED_RTX
616 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
618 secondary_memlocs
[(int) mode
]
619 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
623 /* Get a version of the address doing any eliminations needed. If that
624 didn't give us a new MEM, make a new one if it isn't valid. */
626 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
627 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
629 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
630 loc
= copy_rtx (loc
);
632 /* The only time the call below will do anything is if the stack
633 offset is too large. In that case IND_LEVELS doesn't matter, so we
634 can just pass a zero. Adjust the type to be the address of the
635 corresponding object. If the address was valid, save the eliminated
636 address. If it wasn't valid, we need to make a reload each time, so
641 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
642 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
645 find_reloads_address (mode
, (rtx
*)0, XEXP (loc
, 0), &XEXP (loc
, 0),
649 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
653 /* Clear any secondary memory locations we've made. */
656 clear_secondary_mem ()
658 memset ((char *) secondary_memlocs
, 0, sizeof secondary_memlocs
);
660 #endif /* SECONDARY_MEMORY_NEEDED */
662 /* Find the largest class for which every register number plus N is valid in
663 M1 (if in range). Abort if no such class exists. */
665 static enum reg_class
666 find_valid_class (m1
, n
)
667 enum machine_mode m1 ATTRIBUTE_UNUSED
;
672 enum reg_class best_class
= NO_REGS
;
673 unsigned int best_size
= 0;
675 for (class = 1; class < N_REG_CLASSES
; class++)
678 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
679 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
680 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
681 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
684 if (! bad
&& reg_class_size
[class] > best_size
)
685 best_class
= class, best_size
= reg_class_size
[class];
694 /* Return the number of a previously made reload that can be combined with
695 a new one, or n_reloads if none of the existing reloads can be used.
696 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
697 push_reload, they determine the kind of the new reload that we try to
698 combine. P_IN points to the corresponding value of IN, which can be
699 modified by this function.
700 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
703 find_reusable_reload (p_in
, out
, class, type
, opnum
, dont_share
)
705 enum reg_class
class;
706 enum reload_type type
;
707 int opnum
, dont_share
;
711 /* We can't merge two reloads if the output of either one is
714 if (earlyclobber_operand_p (out
))
717 /* We can use an existing reload if the class is right
718 and at least one of IN and OUT is a match
719 and the other is at worst neutral.
720 (A zero compared against anything is neutral.)
722 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
723 for the same thing since that can cause us to need more reload registers
724 than we otherwise would. */
726 for (i
= 0; i
< n_reloads
; i
++)
727 if ((reg_class_subset_p (class, rld
[i
].class)
728 || reg_class_subset_p (rld
[i
].class, class))
729 /* If the existing reload has a register, it must fit our class. */
730 && (rld
[i
].reg_rtx
== 0
731 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
732 true_regnum (rld
[i
].reg_rtx
)))
733 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
734 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
735 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
736 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
737 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
738 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
739 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
742 /* Reloading a plain reg for input can match a reload to postincrement
743 that reg, since the postincrement's value is the right value.
744 Likewise, it can match a preincrement reload, since we regard
745 the preincrementation as happening before any ref in this insn
747 for (i
= 0; i
< n_reloads
; i
++)
748 if ((reg_class_subset_p (class, rld
[i
].class)
749 || reg_class_subset_p (rld
[i
].class, class))
750 /* If the existing reload has a register, it must fit our
752 && (rld
[i
].reg_rtx
== 0
753 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
754 true_regnum (rld
[i
].reg_rtx
)))
755 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
756 && ((GET_CODE (in
) == REG
757 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == 'a'
758 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
759 || (GET_CODE (rld
[i
].in
) == REG
760 && GET_RTX_CLASS (GET_CODE (in
)) == 'a'
761 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
762 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
763 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
764 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
765 opnum
, rld
[i
].opnum
))
767 /* Make sure reload_in ultimately has the increment,
768 not the plain register. */
769 if (GET_CODE (in
) == REG
)
776 /* Return nonzero if X is a SUBREG which will require reloading of its
777 SUBREG_REG expression. */
780 reload_inner_reg_of_subreg (x
, mode
)
782 enum machine_mode mode
;
786 /* Only SUBREGs are problematical. */
787 if (GET_CODE (x
) != SUBREG
)
790 inner
= SUBREG_REG (x
);
792 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
793 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
796 /* If INNER is not a hard register, then INNER will not need to
798 if (GET_CODE (inner
) != REG
799 || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
802 /* If INNER is not ok for MODE, then INNER will need reloading. */
803 if (! HARD_REGNO_MODE_OK (subreg_regno (x
), mode
))
806 /* If the outer part is a word or smaller, INNER larger than a
807 word and the number of regs for INNER is not the same as the
808 number of words in INNER, then INNER will need reloading. */
809 return (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
810 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
811 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
812 != HARD_REGNO_NREGS (REGNO (inner
), GET_MODE (inner
))));
815 /* Record one reload that needs to be performed.
816 IN is an rtx saying where the data are to be found before this instruction.
817 OUT says where they must be stored after the instruction.
818 (IN is zero for data not read, and OUT is zero for data not written.)
819 INLOC and OUTLOC point to the places in the instructions where
820 IN and OUT were found.
821 If IN and OUT are both non-zero, it means the same register must be used
822 to reload both IN and OUT.
824 CLASS is a register class required for the reloaded data.
825 INMODE is the machine mode that the instruction requires
826 for the reg that replaces IN and OUTMODE is likewise for OUT.
828 If IN is zero, then OUT's location and mode should be passed as
831 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
833 OPTIONAL nonzero means this reload does not need to be performed:
834 it can be discarded if that is more convenient.
836 OPNUM and TYPE say what the purpose of this reload is.
838 The return value is the reload-number for this reload.
840 If both IN and OUT are nonzero, in some rare cases we might
841 want to make two separate reloads. (Actually we never do this now.)
842 Therefore, the reload-number for OUT is stored in
843 output_reloadnum when we return; the return value applies to IN.
844 Usually (presently always), when IN and OUT are nonzero,
845 the two reload-numbers are equal, but the caller should be careful to
849 push_reload (in
, out
, inloc
, outloc
, class,
850 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
853 enum reg_class
class;
854 enum machine_mode inmode
, outmode
;
858 enum reload_type type
;
862 int dont_remove_subreg
= 0;
863 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
864 int secondary_in_reload
= -1, secondary_out_reload
= -1;
865 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
866 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
868 /* INMODE and/or OUTMODE could be VOIDmode if no mode
869 has been specified for the operand. In that case,
870 use the operand's mode as the mode to reload. */
871 if (inmode
== VOIDmode
&& in
!= 0)
872 inmode
= GET_MODE (in
);
873 if (outmode
== VOIDmode
&& out
!= 0)
874 outmode
= GET_MODE (out
);
876 /* If IN is a pseudo register everywhere-equivalent to a constant, and
877 it is not in a hard register, reload straight from the constant,
878 since we want to get rid of such pseudo registers.
879 Often this is done earlier, but not always in find_reloads_address. */
880 if (in
!= 0 && GET_CODE (in
) == REG
)
882 register int regno
= REGNO (in
);
884 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
885 && reg_equiv_constant
[regno
] != 0)
886 in
= reg_equiv_constant
[regno
];
889 /* Likewise for OUT. Of course, OUT will never be equivalent to
890 an actual constant, but it might be equivalent to a memory location
891 (in the case of a parameter). */
892 if (out
!= 0 && GET_CODE (out
) == REG
)
894 register int regno
= REGNO (out
);
896 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
897 && reg_equiv_constant
[regno
] != 0)
898 out
= reg_equiv_constant
[regno
];
901 /* If we have a read-write operand with an address side-effect,
902 change either IN or OUT so the side-effect happens only once. */
903 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
904 switch (GET_CODE (XEXP (in
, 0)))
906 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
907 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
910 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
911 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
918 /* If we are reloading a (SUBREG constant ...), really reload just the
919 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
920 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
921 a pseudo and hence will become a MEM) with M1 wider than M2 and the
922 register is a pseudo, also reload the inside expression.
923 For machines that extend byte loads, do this for any SUBREG of a pseudo
924 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
925 M2 is an integral mode that gets extended when loaded.
926 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
927 either M1 is not valid for R or M2 is wider than a word but we only
928 need one word to store an M2-sized quantity in R.
929 (However, if OUT is nonzero, we need to reload the reg *and*
930 the subreg, so do nothing here, and let following statement handle it.)
932 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
933 we can't handle it here because CONST_INT does not indicate a mode.
935 Similarly, we must reload the inside expression if we have a
936 STRICT_LOW_PART (presumably, in == out in the cas).
938 Also reload the inner expression if it does not require a secondary
939 reload but the SUBREG does.
941 Finally, reload the inner expression if it is a register that is in
942 the class whose registers cannot be referenced in a different size
943 and M1 is not the same size as M2. If SUBREG_BYTE is nonzero, we
944 cannot reload just the inside since we might end up with the wrong
945 register class. But if it is inside a STRICT_LOW_PART, we have
946 no choice, so we hope we do get the right register class there. */
948 if (in
!= 0 && GET_CODE (in
) == SUBREG
949 && (SUBREG_BYTE (in
) == 0 || strict_low
)
950 #ifdef CLASS_CANNOT_CHANGE_MODE
951 && (class != CLASS_CANNOT_CHANGE_MODE
952 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)), inmode
))
954 && (CONSTANT_P (SUBREG_REG (in
))
955 || GET_CODE (SUBREG_REG (in
)) == PLUS
957 || (((GET_CODE (SUBREG_REG (in
)) == REG
958 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
959 || GET_CODE (SUBREG_REG (in
)) == MEM
)
960 && ((GET_MODE_SIZE (inmode
)
961 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
962 #ifdef LOAD_EXTEND_OP
963 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
964 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
966 && (GET_MODE_SIZE (inmode
)
967 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
968 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
969 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
971 #ifdef WORD_REGISTER_OPERATIONS
972 || ((GET_MODE_SIZE (inmode
)
973 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
974 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
975 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
979 || (GET_CODE (SUBREG_REG (in
)) == REG
980 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
981 /* The case where out is nonzero
982 is handled differently in the following statement. */
983 && (out
== 0 || SUBREG_BYTE (in
) == 0)
984 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
985 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
987 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
989 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
990 GET_MODE (SUBREG_REG (in
)))))
991 || ! HARD_REGNO_MODE_OK (subreg_regno (in
), inmode
)))
992 #ifdef SECONDARY_INPUT_RELOAD_CLASS
993 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
994 && (SECONDARY_INPUT_RELOAD_CLASS (class,
995 GET_MODE (SUBREG_REG (in
)),
999 #ifdef CLASS_CANNOT_CHANGE_MODE
1000 || (GET_CODE (SUBREG_REG (in
)) == REG
1001 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1002 && (TEST_HARD_REG_BIT
1003 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1004 REGNO (SUBREG_REG (in
))))
1005 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)),
1010 in_subreg_loc
= inloc
;
1011 inloc
= &SUBREG_REG (in
);
1013 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1014 if (GET_CODE (in
) == MEM
)
1015 /* This is supposed to happen only for paradoxical subregs made by
1016 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1017 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
1020 inmode
= GET_MODE (in
);
1023 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1024 either M1 is not valid for R or M2 is wider than a word but we only
1025 need one word to store an M2-sized quantity in R.
1027 However, we must reload the inner reg *as well as* the subreg in
1030 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1031 code above. This can happen if SUBREG_BYTE != 0. */
1033 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
))
1035 enum reg_class in_class
= class;
1037 if (GET_CODE (SUBREG_REG (in
)) == REG
)
1039 = find_valid_class (inmode
,
1040 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1041 GET_MODE (SUBREG_REG (in
)),
1045 /* This relies on the fact that emit_reload_insns outputs the
1046 instructions for input reloads of type RELOAD_OTHER in the same
1047 order as the reloads. Thus if the outer reload is also of type
1048 RELOAD_OTHER, we are guaranteed that this inner reload will be
1049 output before the outer reload. */
1050 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*)0,
1051 in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1052 dont_remove_subreg
= 1;
1055 /* Similarly for paradoxical and problematical SUBREGs on the output.
1056 Note that there is no reason we need worry about the previous value
1057 of SUBREG_REG (out); even if wider than out,
1058 storing in a subreg is entitled to clobber it all
1059 (except in the case of STRICT_LOW_PART,
1060 and in that case the constraint should label it input-output.) */
1061 if (out
!= 0 && GET_CODE (out
) == SUBREG
1062 && (SUBREG_BYTE (out
) == 0 || strict_low
)
1063 #ifdef CLASS_CANNOT_CHANGE_MODE
1064 && (class != CLASS_CANNOT_CHANGE_MODE
1065 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1068 && (CONSTANT_P (SUBREG_REG (out
))
1070 || (((GET_CODE (SUBREG_REG (out
)) == REG
1071 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1072 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1073 && ((GET_MODE_SIZE (outmode
)
1074 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1075 #ifdef WORD_REGISTER_OPERATIONS
1076 || ((GET_MODE_SIZE (outmode
)
1077 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1078 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1079 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1083 || (GET_CODE (SUBREG_REG (out
)) == REG
1084 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1085 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1086 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1088 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1090 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1091 GET_MODE (SUBREG_REG (out
)))))
1092 || ! HARD_REGNO_MODE_OK (subreg_regno (out
), outmode
)))
1093 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1094 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1095 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1096 GET_MODE (SUBREG_REG (out
)),
1100 #ifdef CLASS_CANNOT_CHANGE_MODE
1101 || (GET_CODE (SUBREG_REG (out
)) == REG
1102 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1103 && (TEST_HARD_REG_BIT
1104 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1105 REGNO (SUBREG_REG (out
))))
1106 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1111 out_subreg_loc
= outloc
;
1112 outloc
= &SUBREG_REG (out
);
1114 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1115 if (GET_CODE (out
) == MEM
1116 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1119 outmode
= GET_MODE (out
);
1122 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1123 either M1 is not valid for R or M2 is wider than a word but we only
1124 need one word to store an M2-sized quantity in R.
1126 However, we must reload the inner reg *as well as* the subreg in
1127 that case. In this case, the inner reg is an in-out reload. */
1129 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
))
1131 /* This relies on the fact that emit_reload_insns outputs the
1132 instructions for output reloads of type RELOAD_OTHER in reverse
1133 order of the reloads. Thus if the outer reload is also of type
1134 RELOAD_OTHER, we are guaranteed that this inner reload will be
1135 output after the outer reload. */
1136 dont_remove_subreg
= 1;
1137 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1139 find_valid_class (outmode
,
1140 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1141 GET_MODE (SUBREG_REG (out
)),
1144 VOIDmode
, VOIDmode
, 0, 0,
1145 opnum
, RELOAD_OTHER
);
1148 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1149 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1150 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1151 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1154 /* If IN is a SUBREG of a hard register, make a new REG. This
1155 simplifies some of the cases below. */
1157 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1158 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1159 && ! dont_remove_subreg
)
1160 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1162 /* Similarly for OUT. */
1163 if (out
!= 0 && GET_CODE (out
) == SUBREG
1164 && GET_CODE (SUBREG_REG (out
)) == REG
1165 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1166 && ! dont_remove_subreg
)
1167 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1169 /* Narrow down the class of register wanted if that is
1170 desirable on this machine for efficiency. */
1172 class = PREFERRED_RELOAD_CLASS (in
, class);
1174 /* Output reloads may need analogous treatment, different in detail. */
1175 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1177 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1180 /* Make sure we use a class that can handle the actual pseudo
1181 inside any subreg. For example, on the 386, QImode regs
1182 can appear within SImode subregs. Although GENERAL_REGS
1183 can handle SImode, QImode needs a smaller class. */
1184 #ifdef LIMIT_RELOAD_CLASS
1186 class = LIMIT_RELOAD_CLASS (inmode
, class);
1187 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1188 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1191 class = LIMIT_RELOAD_CLASS (outmode
, class);
1192 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1193 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1196 /* Verify that this class is at least possible for the mode that
1198 if (this_insn_is_asm
)
1200 enum machine_mode mode
;
1201 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1205 if (mode
== VOIDmode
)
1207 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1212 outmode
= word_mode
;
1214 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1215 if (HARD_REGNO_MODE_OK (i
, mode
)
1216 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1218 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1221 for (j
= 1; j
< nregs
; j
++)
1222 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1227 if (i
== FIRST_PSEUDO_REGISTER
)
1229 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1234 /* Optional output reloads are always OK even if we have no register class,
1235 since the function of these reloads is only to have spill_reg_store etc.
1236 set, so that the storing insn can be deleted later. */
1237 if (class == NO_REGS
1238 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1241 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1245 /* See if we need a secondary reload register to move between CLASS
1246 and IN or CLASS and OUT. Get the icode and push any required reloads
1247 needed for each of them if so. */
1249 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1252 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1253 &secondary_in_icode
);
1256 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1257 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1258 secondary_out_reload
1259 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1260 type
, &secondary_out_icode
);
1263 /* We found no existing reload suitable for re-use.
1264 So add an additional reload. */
1266 #ifdef SECONDARY_MEMORY_NEEDED
1267 /* If a memory location is needed for the copy, make one. */
1268 if (in
!= 0 && GET_CODE (in
) == REG
1269 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1270 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1272 get_secondary_mem (in
, inmode
, opnum
, type
);
1278 rld
[i
].class = class;
1279 rld
[i
].inmode
= inmode
;
1280 rld
[i
].outmode
= outmode
;
1282 rld
[i
].optional
= optional
;
1284 rld
[i
].nocombine
= 0;
1285 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1286 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1287 rld
[i
].opnum
= opnum
;
1288 rld
[i
].when_needed
= type
;
1289 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1290 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1291 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1292 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1293 rld
[i
].secondary_p
= 0;
1297 #ifdef SECONDARY_MEMORY_NEEDED
1298 if (out
!= 0 && GET_CODE (out
) == REG
1299 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1300 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1302 get_secondary_mem (out
, outmode
, opnum
, type
);
1307 /* We are reusing an existing reload,
1308 but we may have additional information for it.
1309 For example, we may now have both IN and OUT
1310 while the old one may have just one of them. */
1312 /* The modes can be different. If they are, we want to reload in
1313 the larger mode, so that the value is valid for both modes. */
1314 if (inmode
!= VOIDmode
1315 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1316 rld
[i
].inmode
= inmode
;
1317 if (outmode
!= VOIDmode
1318 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1319 rld
[i
].outmode
= outmode
;
1322 rtx in_reg
= inloc
? *inloc
: 0;
1323 /* If we merge reloads for two distinct rtl expressions that
1324 are identical in content, there might be duplicate address
1325 reloads. Remove the extra set now, so that if we later find
1326 that we can inherit this reload, we can get rid of the
1327 address reloads altogether.
1329 Do not do this if both reloads are optional since the result
1330 would be an optional reload which could potentially leave
1331 unresolved address replacements.
1333 It is not sufficient to call transfer_replacements since
1334 choose_reload_regs will remove the replacements for address
1335 reloads of inherited reloads which results in the same
1337 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1338 && ! (rld
[i
].optional
&& optional
))
1340 /* We must keep the address reload with the lower operand
1342 if (opnum
> rld
[i
].opnum
)
1344 remove_address_replacements (in
);
1346 in_reg
= rld
[i
].in_reg
;
1349 remove_address_replacements (rld
[i
].in
);
1352 rld
[i
].in_reg
= in_reg
;
1357 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1359 if (reg_class_subset_p (class, rld
[i
].class))
1360 rld
[i
].class = class;
1361 rld
[i
].optional
&= optional
;
1362 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1363 opnum
, rld
[i
].opnum
))
1364 rld
[i
].when_needed
= RELOAD_OTHER
;
1365 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1368 /* If the ostensible rtx being reloaded differs from the rtx found
1369 in the location to substitute, this reload is not safe to combine
1370 because we cannot reliably tell whether it appears in the insn. */
1372 if (in
!= 0 && in
!= *inloc
)
1373 rld
[i
].nocombine
= 1;
1376 /* This was replaced by changes in find_reloads_address_1 and the new
1377 function inc_for_reload, which go with a new meaning of reload_inc. */
1379 /* If this is an IN/OUT reload in an insn that sets the CC,
1380 it must be for an autoincrement. It doesn't work to store
1381 the incremented value after the insn because that would clobber the CC.
1382 So we must do the increment of the value reloaded from,
1383 increment it, store it back, then decrement again. */
1384 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1388 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1389 /* If we did not find a nonzero amount-to-increment-by,
1390 that contradicts the belief that IN is being incremented
1391 in an address in this insn. */
1392 if (rld
[i
].inc
== 0)
1397 /* If we will replace IN and OUT with the reload-reg,
1398 record where they are located so that substitution need
1399 not do a tree walk. */
1401 if (replace_reloads
)
1405 register struct replacement
*r
= &replacements
[n_replacements
++];
1407 r
->subreg_loc
= in_subreg_loc
;
1411 if (outloc
!= 0 && outloc
!= inloc
)
1413 register struct replacement
*r
= &replacements
[n_replacements
++];
1416 r
->subreg_loc
= out_subreg_loc
;
1421 /* If this reload is just being introduced and it has both
1422 an incoming quantity and an outgoing quantity that are
1423 supposed to be made to match, see if either one of the two
1424 can serve as the place to reload into.
1426 If one of them is acceptable, set rld[i].reg_rtx
1429 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1431 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1434 earlyclobber_operand_p (out
));
1436 /* If the outgoing register already contains the same value
1437 as the incoming one, we can dispense with loading it.
1438 The easiest way to tell the caller that is to give a phony
1439 value for the incoming operand (same as outgoing one). */
1440 if (rld
[i
].reg_rtx
== out
1441 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1442 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1443 static_reload_reg_p
, i
, inmode
))
1447 /* If this is an input reload and the operand contains a register that
1448 dies in this insn and is used nowhere else, see if it is the right class
1449 to be used for this reload. Use it if so. (This occurs most commonly
1450 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1451 this if it is also an output reload that mentions the register unless
1452 the output is a SUBREG that clobbers an entire register.
1454 Note that the operand might be one of the spill regs, if it is a
1455 pseudo reg and we are in a block where spilling has not taken place.
1456 But if there is no spilling in this block, that is OK.
1457 An explicitly used hard reg cannot be a spill reg. */
1459 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1463 enum machine_mode rel_mode
= inmode
;
1465 if (out
&& GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (inmode
))
1468 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1469 if (REG_NOTE_KIND (note
) == REG_DEAD
1470 && GET_CODE (XEXP (note
, 0)) == REG
1471 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1472 && reg_mentioned_p (XEXP (note
, 0), in
)
1473 && ! refers_to_regno_for_reload_p (regno
,
1475 + HARD_REGNO_NREGS (regno
,
1477 PATTERN (this_insn
), inloc
)
1478 /* If this is also an output reload, IN cannot be used as
1479 the reload register if it is set in this insn unless IN
1481 && (out
== 0 || in
== out
1482 || ! hard_reg_set_here_p (regno
,
1484 + HARD_REGNO_NREGS (regno
,
1486 PATTERN (this_insn
)))
1487 /* ??? Why is this code so different from the previous?
1488 Is there any simple coherent way to describe the two together?
1489 What's going on here. */
1491 || (GET_CODE (in
) == SUBREG
1492 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1494 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1495 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1496 /* Make sure the operand fits in the reg that dies. */
1497 && (GET_MODE_SIZE (rel_mode
)
1498 <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1499 && HARD_REGNO_MODE_OK (regno
, inmode
)
1500 && HARD_REGNO_MODE_OK (regno
, outmode
))
1503 unsigned int nregs
= MAX (HARD_REGNO_NREGS (regno
, inmode
),
1504 HARD_REGNO_NREGS (regno
, outmode
));
1506 for (offs
= 0; offs
< nregs
; offs
++)
1507 if (fixed_regs
[regno
+ offs
]
1508 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1514 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1521 output_reloadnum
= i
;
1526 /* Record an additional place we must replace a value
1527 for which we have already recorded a reload.
1528 RELOADNUM is the value returned by push_reload
1529 when the reload was recorded.
1530 This is used in insn patterns that use match_dup. */
1533 push_replacement (loc
, reloadnum
, mode
)
1536 enum machine_mode mode
;
1538 if (replace_reloads
)
1540 register struct replacement
*r
= &replacements
[n_replacements
++];
1541 r
->what
= reloadnum
;
1548 /* Transfer all replacements that used to be in reload FROM to be in
1552 transfer_replacements (to
, from
)
1557 for (i
= 0; i
< n_replacements
; i
++)
1558 if (replacements
[i
].what
== from
)
1559 replacements
[i
].what
= to
;
1562 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1563 or a subpart of it. If we have any replacements registered for IN_RTX,
1564 cancel the reloads that were supposed to load them.
1565 Return non-zero if we canceled any reloads. */
1567 remove_address_replacements (in_rtx
)
1571 char reload_flags
[MAX_RELOADS
];
1572 int something_changed
= 0;
1574 memset (reload_flags
, 0, sizeof reload_flags
);
1575 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1577 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1578 reload_flags
[replacements
[i
].what
] |= 1;
1581 replacements
[j
++] = replacements
[i
];
1582 reload_flags
[replacements
[i
].what
] |= 2;
1585 /* Note that the following store must be done before the recursive calls. */
1588 for (i
= n_reloads
- 1; i
>= 0; i
--)
1590 if (reload_flags
[i
] == 1)
1592 deallocate_reload_reg (i
);
1593 remove_address_replacements (rld
[i
].in
);
1595 something_changed
= 1;
1598 return something_changed
;
1601 /* If there is only one output reload, and it is not for an earlyclobber
1602 operand, try to combine it with a (logically unrelated) input reload
1603 to reduce the number of reload registers needed.
1605 This is safe if the input reload does not appear in
1606 the value being output-reloaded, because this implies
1607 it is not needed any more once the original insn completes.
1609 If that doesn't work, see we can use any of the registers that
1610 die in this insn as a reload register. We can if it is of the right
1611 class and does not appear in the value being output-reloaded. */
1617 int output_reload
= -1;
1618 int secondary_out
= -1;
1621 /* Find the output reload; return unless there is exactly one
1622 and that one is mandatory. */
1624 for (i
= 0; i
< n_reloads
; i
++)
1625 if (rld
[i
].out
!= 0)
1627 if (output_reload
>= 0)
1632 if (output_reload
< 0 || rld
[output_reload
].optional
)
1635 /* An input-output reload isn't combinable. */
1637 if (rld
[output_reload
].in
!= 0)
1640 /* If this reload is for an earlyclobber operand, we can't do anything. */
1641 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1644 /* Check each input reload; can we combine it? */
1646 for (i
= 0; i
< n_reloads
; i
++)
1647 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1648 /* Life span of this reload must not extend past main insn. */
1649 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1650 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1651 && rld
[i
].when_needed
!= RELOAD_OTHER
1652 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1653 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1654 rld
[output_reload
].outmode
))
1656 && rld
[i
].reg_rtx
== 0
1657 #ifdef SECONDARY_MEMORY_NEEDED
1658 /* Don't combine two reloads with different secondary
1659 memory locations. */
1660 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1661 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1662 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1663 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1665 && (SMALL_REGISTER_CLASSES
1666 ? (rld
[i
].class == rld
[output_reload
].class)
1667 : (reg_class_subset_p (rld
[i
].class,
1668 rld
[output_reload
].class)
1669 || reg_class_subset_p (rld
[output_reload
].class,
1671 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1672 /* Args reversed because the first arg seems to be
1673 the one that we imagine being modified
1674 while the second is the one that might be affected. */
1675 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1677 /* However, if the input is a register that appears inside
1678 the output, then we also can't share.
1679 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1680 If the same reload reg is used for both reg 69 and the
1681 result to be stored in memory, then that result
1682 will clobber the address of the memory ref. */
1683 && ! (GET_CODE (rld
[i
].in
) == REG
1684 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1685 rld
[output_reload
].out
))))
1686 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
)
1687 && (reg_class_size
[(int) rld
[i
].class]
1688 || SMALL_REGISTER_CLASSES
)
1689 /* We will allow making things slightly worse by combining an
1690 input and an output, but no worse than that. */
1691 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1692 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1696 /* We have found a reload to combine with! */
1697 rld
[i
].out
= rld
[output_reload
].out
;
1698 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1699 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1700 /* Mark the old output reload as inoperative. */
1701 rld
[output_reload
].out
= 0;
1702 /* The combined reload is needed for the entire insn. */
1703 rld
[i
].when_needed
= RELOAD_OTHER
;
1704 /* If the output reload had a secondary reload, copy it. */
1705 if (rld
[output_reload
].secondary_out_reload
!= -1)
1707 rld
[i
].secondary_out_reload
1708 = rld
[output_reload
].secondary_out_reload
;
1709 rld
[i
].secondary_out_icode
1710 = rld
[output_reload
].secondary_out_icode
;
1713 #ifdef SECONDARY_MEMORY_NEEDED
1714 /* Copy any secondary MEM. */
1715 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1716 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1717 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1719 /* If required, minimize the register class. */
1720 if (reg_class_subset_p (rld
[output_reload
].class,
1722 rld
[i
].class = rld
[output_reload
].class;
1724 /* Transfer all replacements from the old reload to the combined. */
1725 for (j
= 0; j
< n_replacements
; j
++)
1726 if (replacements
[j
].what
== output_reload
)
1727 replacements
[j
].what
= i
;
1732 /* If this insn has only one operand that is modified or written (assumed
1733 to be the first), it must be the one corresponding to this reload. It
1734 is safe to use anything that dies in this insn for that output provided
1735 that it does not occur in the output (we already know it isn't an
1736 earlyclobber. If this is an asm insn, give up. */
1738 if (INSN_CODE (this_insn
) == -1)
1741 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1742 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1743 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1746 /* See if some hard register that dies in this insn and is not used in
1747 the output is the right class. Only works if the register we pick
1748 up can fully hold our output reload. */
1749 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1750 if (REG_NOTE_KIND (note
) == REG_DEAD
1751 && GET_CODE (XEXP (note
, 0)) == REG
1752 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1753 rld
[output_reload
].out
)
1754 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1755 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1756 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1757 REGNO (XEXP (note
, 0)))
1758 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1759 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1760 /* Ensure that a secondary or tertiary reload for this output
1761 won't want this register. */
1762 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1763 || (! (TEST_HARD_REG_BIT
1764 (reg_class_contents
[(int) rld
[secondary_out
].class],
1765 REGNO (XEXP (note
, 0))))
1766 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1767 || ! (TEST_HARD_REG_BIT
1768 (reg_class_contents
[(int) rld
[secondary_out
].class],
1769 REGNO (XEXP (note
, 0)))))))
1770 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1772 rld
[output_reload
].reg_rtx
1773 = gen_rtx_REG (rld
[output_reload
].outmode
,
1774 REGNO (XEXP (note
, 0)));
1779 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1780 See if one of IN and OUT is a register that may be used;
1781 this is desirable since a spill-register won't be needed.
1782 If so, return the register rtx that proves acceptable.
1784 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1785 CLASS is the register class required for the reload.
1787 If FOR_REAL is >= 0, it is the number of the reload,
1788 and in some cases when it can be discovered that OUT doesn't need
1789 to be computed, clear out rld[FOR_REAL].out.
1791 If FOR_REAL is -1, this should not be done, because this call
1792 is just to see if a register can be found, not to find and install it.
1794 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1795 puts an additional constraint on being able to use IN for OUT since
1796 IN must not appear elsewhere in the insn (it is assumed that IN itself
1797 is safe from the earlyclobber). */
1800 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1801 inmode
, outmode
, class, for_real
, earlyclobber
)
1802 rtx real_in
, real_out
;
1803 rtx
*inloc
, *outloc
;
1804 enum machine_mode inmode
, outmode
;
1805 enum reg_class
class;
1815 /* If operands exceed a word, we can't use either of them
1816 unless they have the same size. */
1817 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1818 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1819 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1822 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1823 respectively refers to a hard register. */
1825 /* Find the inside of any subregs. */
1826 while (GET_CODE (out
) == SUBREG
)
1828 if (GET_CODE (SUBREG_REG (out
)) == REG
1829 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
1830 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1831 GET_MODE (SUBREG_REG (out
)),
1834 out
= SUBREG_REG (out
);
1836 while (GET_CODE (in
) == SUBREG
)
1838 if (GET_CODE (SUBREG_REG (in
)) == REG
1839 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
1840 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1841 GET_MODE (SUBREG_REG (in
)),
1844 in
= SUBREG_REG (in
);
1847 /* Narrow down the reg class, the same way push_reload will;
1848 otherwise we might find a dummy now, but push_reload won't. */
1849 class = PREFERRED_RELOAD_CLASS (in
, class);
1851 /* See if OUT will do. */
1852 if (GET_CODE (out
) == REG
1853 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1855 unsigned int regno
= REGNO (out
) + out_offset
;
1856 unsigned int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1859 /* When we consider whether the insn uses OUT,
1860 ignore references within IN. They don't prevent us
1861 from copying IN into OUT, because those refs would
1862 move into the insn that reloads IN.
1864 However, we only ignore IN in its role as this reload.
1865 If the insn uses IN elsewhere and it contains OUT,
1866 that counts. We can't be sure it's the "same" operand
1867 so it might not go through this reload. */
1869 *inloc
= const0_rtx
;
1871 if (regno
< FIRST_PSEUDO_REGISTER
1872 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1873 PATTERN (this_insn
), outloc
))
1877 for (i
= 0; i
< nwords
; i
++)
1878 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1884 if (GET_CODE (real_out
) == REG
)
1887 value
= gen_rtx_REG (outmode
, regno
);
1894 /* Consider using IN if OUT was not acceptable
1895 or if OUT dies in this insn (like the quotient in a divmod insn).
1896 We can't use IN unless it is dies in this insn,
1897 which means we must know accurately which hard regs are live.
1898 Also, the result can't go in IN if IN is used within OUT,
1899 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1900 if (hard_regs_live_known
1901 && GET_CODE (in
) == REG
1902 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1904 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1905 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1906 && !fixed_regs
[REGNO (in
)]
1907 && HARD_REGNO_MODE_OK (REGNO (in
),
1908 /* The only case where out and real_out might
1909 have different modes is where real_out
1910 is a subreg, and in that case, out
1912 (GET_MODE (out
) != VOIDmode
1913 ? GET_MODE (out
) : outmode
)))
1915 unsigned int regno
= REGNO (in
) + in_offset
;
1916 unsigned int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1918 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*)0)
1919 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1920 PATTERN (this_insn
))
1922 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1923 PATTERN (this_insn
), inloc
)))
1927 for (i
= 0; i
< nwords
; i
++)
1928 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1934 /* If we were going to use OUT as the reload reg
1935 and changed our mind, it means OUT is a dummy that
1936 dies here. So don't bother copying value to it. */
1937 if (for_real
>= 0 && value
== real_out
)
1938 rld
[for_real
].out
= 0;
1939 if (GET_CODE (real_in
) == REG
)
1942 value
= gen_rtx_REG (inmode
, regno
);
1950 /* This page contains subroutines used mainly for determining
1951 whether the IN or an OUT of a reload can serve as the
1954 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1957 earlyclobber_operand_p (x
)
1962 for (i
= 0; i
< n_earlyclobbers
; i
++)
1963 if (reload_earlyclobbers
[i
] == x
)
1969 /* Return 1 if expression X alters a hard reg in the range
1970 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1971 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1972 X should be the body of an instruction. */
1975 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1976 unsigned int beg_regno
, end_regno
;
1979 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1981 register rtx op0
= SET_DEST (x
);
1983 while (GET_CODE (op0
) == SUBREG
)
1984 op0
= SUBREG_REG (op0
);
1985 if (GET_CODE (op0
) == REG
)
1987 unsigned int r
= REGNO (op0
);
1989 /* See if this reg overlaps range under consideration. */
1991 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1995 else if (GET_CODE (x
) == PARALLEL
)
1997 register int i
= XVECLEN (x
, 0) - 1;
2000 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
2007 /* Return 1 if ADDR is a valid memory address for mode MODE,
2008 and check that each pseudo reg has the proper kind of
2012 strict_memory_address_p (mode
, addr
)
2013 enum machine_mode mode ATTRIBUTE_UNUSED
;
2016 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2023 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2024 if they are the same hard reg, and has special hacks for
2025 autoincrement and autodecrement.
2026 This is specifically intended for find_reloads to use
2027 in determining whether two operands match.
2028 X is the operand whose number is the lower of the two.
2030 The value is 2 if Y contains a pre-increment that matches
2031 a non-incrementing address in X. */
2033 /* ??? To be completely correct, we should arrange to pass
2034 for X the output operand and for Y the input operand.
2035 For now, we assume that the output operand has the lower number
2036 because that is natural in (SET output (... input ...)). */
2039 operands_match_p (x
, y
)
2043 register RTX_CODE code
= GET_CODE (x
);
2044 register const char *fmt
;
2049 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
2050 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
2051 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2057 i
= REGNO (SUBREG_REG (x
));
2058 if (i
>= FIRST_PSEUDO_REGISTER
)
2060 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2061 GET_MODE (SUBREG_REG (x
)),
2068 if (GET_CODE (y
) == SUBREG
)
2070 j
= REGNO (SUBREG_REG (y
));
2071 if (j
>= FIRST_PSEUDO_REGISTER
)
2073 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2074 GET_MODE (SUBREG_REG (y
)),
2081 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2082 multiple hard register group, so that for example (reg:DI 0) and
2083 (reg:SI 1) will be considered the same register. */
2084 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2085 && i
< FIRST_PSEUDO_REGISTER
)
2086 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
2087 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2088 && j
< FIRST_PSEUDO_REGISTER
)
2089 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
2093 /* If two operands must match, because they are really a single
2094 operand of an assembler insn, then two postincrements are invalid
2095 because the assembler insn would increment only once.
2096 On the other hand, an postincrement matches ordinary indexing
2097 if the postincrement is the output operand. */
2098 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2099 return operands_match_p (XEXP (x
, 0), y
);
2100 /* Two preincrements are invalid
2101 because the assembler insn would increment only once.
2102 On the other hand, an preincrement matches ordinary indexing
2103 if the preincrement is the input operand.
2104 In this case, return 2, since some callers need to do special
2105 things when this happens. */
2106 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2107 || GET_CODE (y
) == PRE_MODIFY
)
2108 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2112 /* Now we have disposed of all the cases
2113 in which different rtx codes can match. */
2114 if (code
!= GET_CODE (y
))
2116 if (code
== LABEL_REF
)
2117 return XEXP (x
, 0) == XEXP (y
, 0);
2118 if (code
== SYMBOL_REF
)
2119 return XSTR (x
, 0) == XSTR (y
, 0);
2121 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2123 if (GET_MODE (x
) != GET_MODE (y
))
2126 /* Compare the elements. If any pair of corresponding elements
2127 fail to match, return 0 for the whole things. */
2130 fmt
= GET_RTX_FORMAT (code
);
2131 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2137 if (XWINT (x
, i
) != XWINT (y
, i
))
2142 if (XINT (x
, i
) != XINT (y
, i
))
2147 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2150 /* If any subexpression returns 2,
2151 we should return 2 if we are successful. */
2160 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2162 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2164 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2172 /* It is believed that rtx's at this level will never
2173 contain anything but integers and other rtx's,
2174 except for within LABEL_REFs and SYMBOL_REFs. */
2179 return 1 + success_2
;
2182 /* Describe the range of registers or memory referenced by X.
2183 If X is a register, set REG_FLAG and put the first register
2184 number into START and the last plus one into END.
2185 If X is a memory reference, put a base address into BASE
2186 and a range of integer offsets into START and END.
2187 If X is pushing on the stack, we can assume it causes no trouble,
2188 so we set the SAFE field. */
2190 static struct decomposition
2194 struct decomposition val
;
2200 if (GET_CODE (x
) == MEM
)
2202 rtx base
= NULL_RTX
, offset
= 0;
2203 rtx addr
= XEXP (x
, 0);
2205 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2206 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2208 val
.base
= XEXP (addr
, 0);
2209 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2210 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2211 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2215 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2217 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2218 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2219 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2221 val
.base
= XEXP (addr
, 0);
2222 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2223 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2224 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2229 if (GET_CODE (addr
) == CONST
)
2231 addr
= XEXP (addr
, 0);
2234 if (GET_CODE (addr
) == PLUS
)
2236 if (CONSTANT_P (XEXP (addr
, 0)))
2238 base
= XEXP (addr
, 1);
2239 offset
= XEXP (addr
, 0);
2241 else if (CONSTANT_P (XEXP (addr
, 1)))
2243 base
= XEXP (addr
, 0);
2244 offset
= XEXP (addr
, 1);
2251 offset
= const0_rtx
;
2253 if (GET_CODE (offset
) == CONST
)
2254 offset
= XEXP (offset
, 0);
2255 if (GET_CODE (offset
) == PLUS
)
2257 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2259 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2260 offset
= XEXP (offset
, 0);
2262 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2264 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2265 offset
= XEXP (offset
, 1);
2269 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2270 offset
= const0_rtx
;
2273 else if (GET_CODE (offset
) != CONST_INT
)
2275 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2276 offset
= const0_rtx
;
2279 if (all_const
&& GET_CODE (base
) == PLUS
)
2280 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2282 if (GET_CODE (offset
) != CONST_INT
)
2285 val
.start
= INTVAL (offset
);
2286 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2290 else if (GET_CODE (x
) == REG
)
2293 val
.start
= true_regnum (x
);
2296 /* A pseudo with no hard reg. */
2297 val
.start
= REGNO (x
);
2298 val
.end
= val
.start
+ 1;
2302 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2304 else if (GET_CODE (x
) == SUBREG
)
2306 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2307 /* This could be more precise, but it's good enough. */
2308 return decompose (SUBREG_REG (x
));
2310 val
.start
= true_regnum (x
);
2312 return decompose (SUBREG_REG (x
));
2315 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2317 else if (CONSTANT_P (x
)
2318 /* This hasn't been assigned yet, so it can't conflict yet. */
2319 || GET_CODE (x
) == SCRATCH
)
2326 /* Return 1 if altering Y will not modify the value of X.
2327 Y is also described by YDATA, which should be decompose (Y). */
2330 immune_p (x
, y
, ydata
)
2332 struct decomposition ydata
;
2334 struct decomposition xdata
;
2337 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, (rtx
*)0);
2341 if (GET_CODE (y
) != MEM
)
2343 /* If Y is memory and X is not, Y can't affect X. */
2344 if (GET_CODE (x
) != MEM
)
2347 xdata
= decompose (x
);
2349 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2351 /* If bases are distinct symbolic constants, there is no overlap. */
2352 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2354 /* Constants and stack slots never overlap. */
2355 if (CONSTANT_P (xdata
.base
)
2356 && (ydata
.base
== frame_pointer_rtx
2357 || ydata
.base
== hard_frame_pointer_rtx
2358 || ydata
.base
== stack_pointer_rtx
))
2360 if (CONSTANT_P (ydata
.base
)
2361 && (xdata
.base
== frame_pointer_rtx
2362 || xdata
.base
== hard_frame_pointer_rtx
2363 || xdata
.base
== stack_pointer_rtx
))
2365 /* If either base is variable, we don't know anything. */
2369 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2372 /* Similar, but calls decompose. */
2375 safe_from_earlyclobber (op
, clobber
)
2378 struct decomposition early_data
;
2380 early_data
= decompose (clobber
);
2381 return immune_p (op
, clobber
, early_data
);
2384 /* Main entry point of this file: search the body of INSN
2385 for values that need reloading and record them with push_reload.
2386 REPLACE nonzero means record also where the values occur
2387 so that subst_reloads can be used.
2389 IND_LEVELS says how many levels of indirection are supported by this
2390 machine; a value of zero means that a memory reference is not a valid
2393 LIVE_KNOWN says we have valid information about which hard
2394 regs are live at each point in the program; this is true when
2395 we are called from global_alloc but false when stupid register
2396 allocation has been done.
2398 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2399 which is nonnegative if the reg has been commandeered for reloading into.
2400 It is copied into STATIC_RELOAD_REG_P and referenced from there
2401 by various subroutines.
2403 Return TRUE if some operands need to be changed, because of swapping
2404 commutative operands, reg_equiv_address substitution, or whatever. */
2407 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2409 int replace
, ind_levels
;
2411 short *reload_reg_p
;
2413 register int insn_code_number
;
2416 /* These start out as the constraints for the insn
2417 and they are chewed up as we consider alternatives. */
2418 char *constraints
[MAX_RECOG_OPERANDS
];
2419 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2421 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2422 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2423 /* Nonzero for a MEM operand whose entire address needs a reload. */
2424 int address_reloaded
[MAX_RECOG_OPERANDS
];
2425 /* Value of enum reload_type to use for operand. */
2426 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2427 /* Value of enum reload_type to use within address of operand. */
2428 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2429 /* Save the usage of each operand. */
2430 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2431 int no_input_reloads
= 0, no_output_reloads
= 0;
2433 int this_alternative
[MAX_RECOG_OPERANDS
];
2434 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2435 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2436 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2437 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2438 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2440 int goal_alternative
[MAX_RECOG_OPERANDS
];
2441 int this_alternative_number
;
2442 int goal_alternative_number
= 0;
2443 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2444 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2445 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2446 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2447 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2448 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2449 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2450 int goal_alternative_swapped
;
2453 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2454 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2455 rtx body
= PATTERN (insn
);
2456 rtx set
= single_set (insn
);
2457 int goal_earlyclobber
= 0, this_earlyclobber
;
2458 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2464 n_earlyclobbers
= 0;
2465 replace_reloads
= replace
;
2466 hard_regs_live_known
= live_known
;
2467 static_reload_reg_p
= reload_reg_p
;
2469 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2470 neither are insns that SET cc0. Insns that use CC0 are not allowed
2471 to have any input reloads. */
2472 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2473 no_output_reloads
= 1;
2476 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2477 no_input_reloads
= 1;
2478 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2479 no_output_reloads
= 1;
2482 #ifdef SECONDARY_MEMORY_NEEDED
2483 /* The eliminated forms of any secondary memory locations are per-insn, so
2484 clear them out here. */
2486 memset ((char *) secondary_memlocs_elim
, 0, sizeof secondary_memlocs_elim
);
2489 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2490 is cheap to move between them. If it is not, there may not be an insn
2491 to do the copy, so we may need a reload. */
2492 if (GET_CODE (body
) == SET
2493 && GET_CODE (SET_DEST (body
)) == REG
2494 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2495 && GET_CODE (SET_SRC (body
)) == REG
2496 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2497 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body
)),
2498 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2499 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2502 extract_insn (insn
);
2504 noperands
= reload_n_operands
= recog_data
.n_operands
;
2505 n_alternatives
= recog_data
.n_alternatives
;
2507 /* Just return "no reloads" if insn has no operands with constraints. */
2508 if (noperands
== 0 || n_alternatives
== 0)
2511 insn_code_number
= INSN_CODE (insn
);
2512 this_insn_is_asm
= insn_code_number
< 0;
2514 memcpy (operand_mode
, recog_data
.operand_mode
,
2515 noperands
* sizeof (enum machine_mode
));
2516 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2520 /* If we will need to know, later, whether some pair of operands
2521 are the same, we must compare them now and save the result.
2522 Reloading the base and index registers will clobber them
2523 and afterward they will fail to match. */
2525 for (i
= 0; i
< noperands
; i
++)
2530 substed_operand
[i
] = recog_data
.operand
[i
];
2533 modified
[i
] = RELOAD_READ
;
2535 /* Scan this operand's constraint to see if it is an output operand,
2536 an in-out operand, is commutative, or should match another. */
2541 modified
[i
] = RELOAD_WRITE
;
2543 modified
[i
] = RELOAD_READ_WRITE
;
2546 /* The last operand should not be marked commutative. */
2547 if (i
== noperands
- 1)
2552 else if (c
>= '0' && c
<= '9')
2555 operands_match
[c
][i
]
2556 = operands_match_p (recog_data
.operand
[c
],
2557 recog_data
.operand
[i
]);
2559 /* An operand may not match itself. */
2563 /* If C can be commuted with C+1, and C might need to match I,
2564 then C+1 might also need to match I. */
2565 if (commutative
>= 0)
2567 if (c
== commutative
|| c
== commutative
+ 1)
2569 int other
= c
+ (c
== commutative
? 1 : -1);
2570 operands_match
[other
][i
]
2571 = operands_match_p (recog_data
.operand
[other
],
2572 recog_data
.operand
[i
]);
2574 if (i
== commutative
|| i
== commutative
+ 1)
2576 int other
= i
+ (i
== commutative
? 1 : -1);
2577 operands_match
[c
][other
]
2578 = operands_match_p (recog_data
.operand
[c
],
2579 recog_data
.operand
[other
]);
2581 /* Note that C is supposed to be less than I.
2582 No need to consider altering both C and I because in
2583 that case we would alter one into the other. */
2589 /* Examine each operand that is a memory reference or memory address
2590 and reload parts of the addresses into index registers.
2591 Also here any references to pseudo regs that didn't get hard regs
2592 but are equivalent to constants get replaced in the insn itself
2593 with those constants. Nobody will ever see them again.
2595 Finally, set up the preferred classes of each operand. */
2597 for (i
= 0; i
< noperands
; i
++)
2599 register RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2601 address_reloaded
[i
] = 0;
2602 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2603 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2606 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2607 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2610 if (*constraints
[i
] == 0)
2611 /* Ignore things like match_operator operands. */
2613 else if (constraints
[i
][0] == 'p')
2615 find_reloads_address (VOIDmode
, (rtx
*)0,
2616 recog_data
.operand
[i
],
2617 recog_data
.operand_loc
[i
],
2618 i
, operand_type
[i
], ind_levels
, insn
);
2620 /* If we now have a simple operand where we used to have a
2621 PLUS or MULT, re-recognize and try again. */
2622 if ((GET_RTX_CLASS (GET_CODE (*recog_data
.operand_loc
[i
])) == 'o'
2623 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2624 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2625 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2627 INSN_CODE (insn
) = -1;
2628 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2633 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2634 substed_operand
[i
] = recog_data
.operand
[i
];
2636 else if (code
== MEM
)
2639 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2640 recog_data
.operand_loc
[i
],
2641 XEXP (recog_data
.operand
[i
], 0),
2642 &XEXP (recog_data
.operand
[i
], 0),
2643 i
, address_type
[i
], ind_levels
, insn
);
2644 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2645 substed_operand
[i
] = recog_data
.operand
[i
];
2647 else if (code
== SUBREG
)
2649 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2651 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2654 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2656 &address_reloaded
[i
]);
2658 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2659 that didn't get a hard register, emit a USE with a REG_EQUAL
2660 note in front so that we might inherit a previous, possibly
2664 && GET_CODE (op
) == MEM
2665 && GET_CODE (reg
) == REG
2666 && (GET_MODE_SIZE (GET_MODE (reg
))
2667 >= GET_MODE_SIZE (GET_MODE (op
))))
2668 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
), insn
))
2669 = gen_rtx_EXPR_LIST (REG_EQUAL
,
2670 reg_equiv_memory_loc
[REGNO (reg
)], NULL_RTX
);
2672 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2674 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2675 /* We can get a PLUS as an "operand" as a result of register
2676 elimination. See eliminate_regs and gen_reload. We handle
2677 a unary operator by reloading the operand. */
2678 substed_operand
[i
] = recog_data
.operand
[i
]
2679 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2680 ind_levels
, 0, insn
,
2681 &address_reloaded
[i
]);
2682 else if (code
== REG
)
2684 /* This is equivalent to calling find_reloads_toplev.
2685 The code is duplicated for speed.
2686 When we find a pseudo always equivalent to a constant,
2687 we replace it by the constant. We must be sure, however,
2688 that we don't try to replace it in the insn in which it
2690 register int regno
= REGNO (recog_data
.operand
[i
]);
2691 if (reg_equiv_constant
[regno
] != 0
2692 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2694 /* Record the existing mode so that the check if constants are
2695 allowed will work when operand_mode isn't specified. */
2697 if (operand_mode
[i
] == VOIDmode
)
2698 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2700 substed_operand
[i
] = recog_data
.operand
[i
]
2701 = reg_equiv_constant
[regno
];
2703 if (reg_equiv_memory_loc
[regno
] != 0
2704 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2705 /* We need not give a valid is_set_dest argument since the case
2706 of a constant equivalence was checked above. */
2707 substed_operand
[i
] = recog_data
.operand
[i
]
2708 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2709 ind_levels
, 0, insn
,
2710 &address_reloaded
[i
]);
2712 /* If the operand is still a register (we didn't replace it with an
2713 equivalent), get the preferred class to reload it into. */
2714 code
= GET_CODE (recog_data
.operand
[i
]);
2716 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2717 >= FIRST_PSEUDO_REGISTER
)
2718 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2722 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2723 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2726 /* If this is simply a copy from operand 1 to operand 0, merge the
2727 preferred classes for the operands. */
2728 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2729 && recog_data
.operand
[1] == SET_SRC (set
))
2731 preferred_class
[0] = preferred_class
[1]
2732 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2733 pref_or_nothing
[0] |= pref_or_nothing
[1];
2734 pref_or_nothing
[1] |= pref_or_nothing
[0];
2737 /* Now see what we need for pseudo-regs that didn't get hard regs
2738 or got the wrong kind of hard reg. For this, we must consider
2739 all the operands together against the register constraints. */
2741 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2744 goal_alternative_swapped
= 0;
2747 /* The constraints are made of several alternatives.
2748 Each operand's constraint looks like foo,bar,... with commas
2749 separating the alternatives. The first alternatives for all
2750 operands go together, the second alternatives go together, etc.
2752 First loop over alternatives. */
2754 for (this_alternative_number
= 0;
2755 this_alternative_number
< n_alternatives
;
2756 this_alternative_number
++)
2758 /* Loop over operands for one constraint alternative. */
2759 /* LOSERS counts those that don't fit this alternative
2760 and would require loading. */
2762 /* BAD is set to 1 if it some operand can't fit this alternative
2763 even after reloading. */
2765 /* REJECT is a count of how undesirable this alternative says it is
2766 if any reloading is required. If the alternative matches exactly
2767 then REJECT is ignored, but otherwise it gets this much
2768 counted against it in addition to the reloading needed. Each
2769 ? counts three times here since we want the disparaging caused by
2770 a bad register class to only count 1/3 as much. */
2773 this_earlyclobber
= 0;
2775 for (i
= 0; i
< noperands
; i
++)
2777 register char *p
= constraints
[i
];
2778 register int win
= 0;
2780 /* 0 => this operand can be reloaded somehow for this alternative. */
2782 /* 0 => this operand can be reloaded if the alternative allows regs. */
2785 register rtx operand
= recog_data
.operand
[i
];
2787 /* Nonzero means this is a MEM that must be reloaded into a reg
2788 regardless of what the constraint says. */
2789 int force_reload
= 0;
2791 /* Nonzero if a constant forced into memory would be OK for this
2794 int earlyclobber
= 0;
2796 /* If the predicate accepts a unary operator, it means that
2797 we need to reload the operand, but do not do this for
2798 match_operator and friends. */
2799 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1' && *p
!= 0)
2800 operand
= XEXP (operand
, 0);
2802 /* If the operand is a SUBREG, extract
2803 the REG or MEM (or maybe even a constant) within.
2804 (Constants can occur as a result of reg_equiv_constant.) */
2806 while (GET_CODE (operand
) == SUBREG
)
2808 /* Offset only matters when operand is a REG and
2809 it is a hard reg. This is because it is passed
2810 to reg_fits_class_p if it is a REG and all pseudos
2811 return 0 from that function. */
2812 if (GET_CODE (SUBREG_REG (operand
)) == REG
2813 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
2815 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
2816 GET_MODE (SUBREG_REG (operand
)),
2817 SUBREG_BYTE (operand
),
2818 GET_MODE (operand
));
2820 operand
= SUBREG_REG (operand
);
2821 /* Force reload if this is a constant or PLUS or if there may
2822 be a problem accessing OPERAND in the outer mode. */
2823 if (CONSTANT_P (operand
)
2824 || GET_CODE (operand
) == PLUS
2825 /* We must force a reload of paradoxical SUBREGs
2826 of a MEM because the alignment of the inner value
2827 may not be enough to do the outer reference. On
2828 big-endian machines, it may also reference outside
2831 On machines that extend byte operations and we have a
2832 SUBREG where both the inner and outer modes are no wider
2833 than a word and the inner mode is narrower, is integral,
2834 and gets extended when loaded from memory, combine.c has
2835 made assumptions about the behavior of the machine in such
2836 register access. If the data is, in fact, in memory we
2837 must always load using the size assumed to be in the
2838 register and let the insn do the different-sized
2841 This is doubly true if WORD_REGISTER_OPERATIONS. In
2842 this case eliminate_regs has left non-paradoxical
2843 subregs for push_reloads to see. Make sure it does
2844 by forcing the reload.
2846 ??? When is it right at this stage to have a subreg
2847 of a mem that is _not_ to be handled specialy? IMO
2848 those should have been reduced to just a mem. */
2849 || ((GET_CODE (operand
) == MEM
2850 || (GET_CODE (operand
)== REG
2851 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2852 #ifndef WORD_REGISTER_OPERATIONS
2853 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2854 < BIGGEST_ALIGNMENT
)
2855 && (GET_MODE_SIZE (operand_mode
[i
])
2856 > GET_MODE_SIZE (GET_MODE (operand
))))
2857 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2858 #ifdef LOAD_EXTEND_OP
2859 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2860 && (GET_MODE_SIZE (GET_MODE (operand
))
2862 && (GET_MODE_SIZE (operand_mode
[i
])
2863 > GET_MODE_SIZE (GET_MODE (operand
)))
2864 && INTEGRAL_MODE_P (GET_MODE (operand
))
2865 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2870 /* This following hunk of code should no longer be
2871 needed at all with SUBREG_BYTE. If you need this
2872 code back, please explain to me why so I can
2873 fix the real problem. -DaveM */
2875 /* Subreg of a hard reg which can't handle the subreg's mode
2876 or which would handle that mode in the wrong number of
2877 registers for subregging to work. */
2878 || (GET_CODE (operand
) == REG
2879 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2880 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2881 && (GET_MODE_SIZE (GET_MODE (operand
))
2883 && ((GET_MODE_SIZE (GET_MODE (operand
))
2885 != HARD_REGNO_NREGS (REGNO (operand
),
2886 GET_MODE (operand
))))
2887 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2894 this_alternative
[i
] = (int) NO_REGS
;
2895 this_alternative_win
[i
] = 0;
2896 this_alternative_match_win
[i
] = 0;
2897 this_alternative_offmemok
[i
] = 0;
2898 this_alternative_earlyclobber
[i
] = 0;
2899 this_alternative_matches
[i
] = -1;
2901 /* An empty constraint or empty alternative
2902 allows anything which matched the pattern. */
2903 if (*p
== 0 || *p
== ',')
2906 /* Scan this alternative's specs for this operand;
2907 set WIN if the operand fits any letter in this alternative.
2908 Otherwise, clear BADOP if this operand could
2909 fit some letter after reloads,
2910 or set WINREG if this operand could fit after reloads
2911 provided the constraint allows some registers. */
2913 while (*p
&& (c
= *p
++) != ',')
2916 case '=': case '+': case '*':
2920 /* The last operand should not be marked commutative. */
2921 if (i
!= noperands
- 1)
2934 /* Ignore rest of this alternative as far as
2935 reloading is concerned. */
2936 while (*p
&& *p
!= ',')
2940 case '0': case '1': case '2': case '3': case '4':
2941 case '5': case '6': case '7': case '8': case '9':
2944 this_alternative_matches
[i
] = c
;
2945 /* We are supposed to match a previous operand.
2946 If we do, we win if that one did.
2947 If we do not, count both of the operands as losers.
2948 (This is too conservative, since most of the time
2949 only a single reload insn will be needed to make
2950 the two operands win. As a result, this alternative
2951 may be rejected when it is actually desirable.) */
2952 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2953 /* If we are matching as if two operands were swapped,
2954 also pretend that operands_match had been computed
2956 But if I is the second of those and C is the first,
2957 don't exchange them, because operands_match is valid
2958 only on one side of its diagonal. */
2960 [(c
== commutative
|| c
== commutative
+ 1)
2961 ? 2 * commutative
+ 1 - c
: c
]
2962 [(i
== commutative
|| i
== commutative
+ 1)
2963 ? 2 * commutative
+ 1 - i
: i
])
2964 : operands_match
[c
][i
])
2966 /* If we are matching a non-offsettable address where an
2967 offsettable address was expected, then we must reject
2968 this combination, because we can't reload it. */
2969 if (this_alternative_offmemok
[c
]
2970 && GET_CODE (recog_data
.operand
[c
]) == MEM
2971 && this_alternative
[c
] == (int) NO_REGS
2972 && ! this_alternative_win
[c
])
2975 did_match
= this_alternative_win
[c
];
2979 /* Operands don't match. */
2981 /* Retroactively mark the operand we had to match
2982 as a loser, if it wasn't already. */
2983 if (this_alternative_win
[c
])
2985 this_alternative_win
[c
] = 0;
2986 if (this_alternative
[c
] == (int) NO_REGS
)
2988 /* But count the pair only once in the total badness of
2989 this alternative, if the pair can be a dummy reload. */
2991 = find_dummy_reload (recog_data
.operand
[i
],
2992 recog_data
.operand
[c
],
2993 recog_data
.operand_loc
[i
],
2994 recog_data
.operand_loc
[c
],
2995 operand_mode
[i
], operand_mode
[c
],
2996 this_alternative
[c
], -1,
2997 this_alternative_earlyclobber
[c
]);
3002 /* This can be fixed with reloads if the operand
3003 we are supposed to match can be fixed with reloads. */
3005 this_alternative
[i
] = this_alternative
[c
];
3007 /* If we have to reload this operand and some previous
3008 operand also had to match the same thing as this
3009 operand, we don't know how to do that. So reject this
3011 if (! did_match
|| force_reload
)
3012 for (j
= 0; j
< i
; j
++)
3013 if (this_alternative_matches
[j
]
3014 == this_alternative_matches
[i
])
3019 /* All necessary reloads for an address_operand
3020 were handled in find_reloads_address. */
3021 this_alternative
[i
] = (int) BASE_REG_CLASS
;
3028 if (GET_CODE (operand
) == MEM
3029 || (GET_CODE (operand
) == REG
3030 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3031 && reg_renumber
[REGNO (operand
)] < 0))
3033 if (CONSTANT_P (operand
)
3034 /* force_const_mem does not accept HIGH. */
3035 && GET_CODE (operand
) != HIGH
)
3041 if (GET_CODE (operand
) == MEM
3042 && ! address_reloaded
[i
]
3043 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3044 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3049 if (GET_CODE (operand
) == MEM
3050 && ! address_reloaded
[i
]
3051 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3052 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3056 /* Memory operand whose address is not offsettable. */
3060 if (GET_CODE (operand
) == MEM
3061 && ! (ind_levels
? offsettable_memref_p (operand
)
3062 : offsettable_nonstrict_memref_p (operand
))
3063 /* Certain mem addresses will become offsettable
3064 after they themselves are reloaded. This is important;
3065 we don't want our own handling of unoffsettables
3066 to override the handling of reg_equiv_address. */
3067 && !(GET_CODE (XEXP (operand
, 0)) == REG
3069 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3073 /* Memory operand whose address is offsettable. */
3077 if ((GET_CODE (operand
) == MEM
3078 /* If IND_LEVELS, find_reloads_address won't reload a
3079 pseudo that didn't get a hard reg, so we have to
3080 reject that case. */
3081 && ((ind_levels
? offsettable_memref_p (operand
)
3082 : offsettable_nonstrict_memref_p (operand
))
3083 /* A reloaded address is offsettable because it is now
3084 just a simple register indirect. */
3085 || address_reloaded
[i
]))
3086 || (GET_CODE (operand
) == REG
3087 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3088 && reg_renumber
[REGNO (operand
)] < 0
3089 /* If reg_equiv_address is nonzero, we will be
3090 loading it into a register; hence it will be
3091 offsettable, but we cannot say that reg_equiv_mem
3092 is offsettable without checking. */
3093 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3094 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3095 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3097 /* force_const_mem does not accept HIGH. */
3098 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3099 || GET_CODE (operand
) == MEM
)
3106 /* Output operand that is stored before the need for the
3107 input operands (and their index registers) is over. */
3108 earlyclobber
= 1, this_earlyclobber
= 1;
3112 #ifndef REAL_ARITHMETIC
3113 /* Match any floating double constant, but only if
3114 we can examine the bits of it reliably. */
3115 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
3116 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
3117 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
3120 if (GET_CODE (operand
) == CONST_DOUBLE
)
3125 if (GET_CODE (operand
) == CONST_DOUBLE
)
3131 if (GET_CODE (operand
) == CONST_DOUBLE
3132 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
3137 if (GET_CODE (operand
) == CONST_INT
3138 || (GET_CODE (operand
) == CONST_DOUBLE
3139 && GET_MODE (operand
) == VOIDmode
))
3142 if (CONSTANT_P (operand
)
3143 #ifdef LEGITIMATE_PIC_OPERAND_P
3144 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3151 if (GET_CODE (operand
) == CONST_INT
3152 || (GET_CODE (operand
) == CONST_DOUBLE
3153 && GET_MODE (operand
) == VOIDmode
))
3165 if (GET_CODE (operand
) == CONST_INT
3166 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
3176 /* A PLUS is never a valid operand, but reload can make
3177 it from a register when eliminating registers. */
3178 && GET_CODE (operand
) != PLUS
3179 /* A SCRATCH is not a valid operand. */
3180 && GET_CODE (operand
) != SCRATCH
3181 #ifdef LEGITIMATE_PIC_OPERAND_P
3182 && (! CONSTANT_P (operand
)
3184 || LEGITIMATE_PIC_OPERAND_P (operand
))
3186 && (GENERAL_REGS
== ALL_REGS
3187 || GET_CODE (operand
) != REG
3188 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3189 && reg_renumber
[REGNO (operand
)] < 0)))
3191 /* Drop through into 'r' case. */
3195 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3199 if (REG_CLASS_FROM_LETTER (c
) == NO_REGS
)
3201 #ifdef EXTRA_CONSTRAINT
3202 if (EXTRA_CONSTRAINT (operand
, c
))
3209 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
3211 if (GET_MODE (operand
) == BLKmode
)
3214 if (GET_CODE (operand
) == REG
3215 && reg_fits_class_p (operand
, this_alternative
[i
],
3216 offset
, GET_MODE (recog_data
.operand
[i
])))
3223 /* If this operand could be handled with a reg,
3224 and some reg is allowed, then this operand can be handled. */
3225 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3228 /* Record which operands fit this alternative. */
3229 this_alternative_earlyclobber
[i
] = earlyclobber
;
3230 if (win
&& ! force_reload
)
3231 this_alternative_win
[i
] = 1;
3232 else if (did_match
&& ! force_reload
)
3233 this_alternative_match_win
[i
] = 1;
3236 int const_to_mem
= 0;
3238 this_alternative_offmemok
[i
] = offmemok
;
3242 /* Alternative loses if it has no regs for a reg operand. */
3243 if (GET_CODE (operand
) == REG
3244 && this_alternative
[i
] == (int) NO_REGS
3245 && this_alternative_matches
[i
] < 0)
3248 /* If this is a constant that is reloaded into the desired
3249 class by copying it to memory first, count that as another
3250 reload. This is consistent with other code and is
3251 required to avoid choosing another alternative when
3252 the constant is moved into memory by this function on
3253 an early reload pass. Note that the test here is
3254 precisely the same as in the code below that calls
3256 if (CONSTANT_P (operand
)
3257 /* force_const_mem does not accept HIGH. */
3258 && GET_CODE (operand
) != HIGH
3259 && ((PREFERRED_RELOAD_CLASS (operand
,
3260 (enum reg_class
) this_alternative
[i
])
3262 || no_input_reloads
)
3263 && operand_mode
[i
] != VOIDmode
)
3266 if (this_alternative
[i
] != (int) NO_REGS
)
3270 /* If we can't reload this value at all, reject this
3271 alternative. Note that we could also lose due to
3272 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3275 if (! CONSTANT_P (operand
)
3276 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3277 && (PREFERRED_RELOAD_CLASS (operand
,
3278 (enum reg_class
) this_alternative
[i
])
3282 /* Alternative loses if it requires a type of reload not
3283 permitted for this insn. We can always reload SCRATCH
3284 and objects with a REG_UNUSED note. */
3285 else if (GET_CODE (operand
) != SCRATCH
3286 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3287 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3289 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3293 /* We prefer to reload pseudos over reloading other things,
3294 since such reloads may be able to be eliminated later.
3295 If we are reloading a SCRATCH, we won't be generating any
3296 insns, just using a register, so it is also preferred.
3297 So bump REJECT in other cases. Don't do this in the
3298 case where we are forcing a constant into memory and
3299 it will then win since we don't want to have a different
3300 alternative match then. */
3301 if (! (GET_CODE (operand
) == REG
3302 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3303 && GET_CODE (operand
) != SCRATCH
3304 && ! (const_to_mem
&& constmemok
))
3307 /* Input reloads can be inherited more often than output
3308 reloads can be removed, so penalize output reloads. */
3309 if (operand_type
[i
] != RELOAD_FOR_INPUT
3310 && GET_CODE (operand
) != SCRATCH
)
3314 /* If this operand is a pseudo register that didn't get a hard
3315 reg and this alternative accepts some register, see if the
3316 class that we want is a subset of the preferred class for this
3317 register. If not, but it intersects that class, use the
3318 preferred class instead. If it does not intersect the preferred
3319 class, show that usage of this alternative should be discouraged;
3320 it will be discouraged more still if the register is `preferred
3321 or nothing'. We do this because it increases the chance of
3322 reusing our spill register in a later insn and avoiding a pair
3323 of memory stores and loads.
3325 Don't bother with this if this alternative will accept this
3328 Don't do this for a multiword operand, since it is only a
3329 small win and has the risk of requiring more spill registers,
3330 which could cause a large loss.
3332 Don't do this if the preferred class has only one register
3333 because we might otherwise exhaust the class. */
3335 if (! win
&& ! did_match
3336 && this_alternative
[i
] != (int) NO_REGS
3337 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3338 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3340 if (! reg_class_subset_p (this_alternative
[i
],
3341 preferred_class
[i
]))
3343 /* Since we don't have a way of forming the intersection,
3344 we just do something special if the preferred class
3345 is a subset of the class we have; that's the most
3346 common case anyway. */
3347 if (reg_class_subset_p (preferred_class
[i
],
3348 this_alternative
[i
]))
3349 this_alternative
[i
] = (int) preferred_class
[i
];
3351 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3356 /* Now see if any output operands that are marked "earlyclobber"
3357 in this alternative conflict with any input operands
3358 or any memory addresses. */
3360 for (i
= 0; i
< noperands
; i
++)
3361 if (this_alternative_earlyclobber
[i
]
3362 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3364 struct decomposition early_data
;
3366 early_data
= decompose (recog_data
.operand
[i
]);
3368 if (modified
[i
] == RELOAD_READ
)
3371 if (this_alternative
[i
] == NO_REGS
)
3373 this_alternative_earlyclobber
[i
] = 0;
3374 if (this_insn_is_asm
)
3375 error_for_asm (this_insn
,
3376 "`&' constraint used with no register class");
3381 for (j
= 0; j
< noperands
; j
++)
3382 /* Is this an input operand or a memory ref? */
3383 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3384 || modified
[j
] != RELOAD_WRITE
)
3386 /* Ignore things like match_operator operands. */
3387 && *recog_data
.constraints
[j
] != 0
3388 /* Don't count an input operand that is constrained to match
3389 the early clobber operand. */
3390 && ! (this_alternative_matches
[j
] == i
3391 && rtx_equal_p (recog_data
.operand
[i
],
3392 recog_data
.operand
[j
]))
3393 /* Is it altered by storing the earlyclobber operand? */
3394 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3397 /* If the output is in a single-reg class,
3398 it's costly to reload it, so reload the input instead. */
3399 if (reg_class_size
[this_alternative
[i
]] == 1
3400 && (GET_CODE (recog_data
.operand
[j
]) == REG
3401 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3404 this_alternative_win
[j
] = 0;
3405 this_alternative_match_win
[j
] = 0;
3410 /* If an earlyclobber operand conflicts with something,
3411 it must be reloaded, so request this and count the cost. */
3415 this_alternative_win
[i
] = 0;
3416 this_alternative_match_win
[j
] = 0;
3417 for (j
= 0; j
< noperands
; j
++)
3418 if (this_alternative_matches
[j
] == i
3419 && this_alternative_match_win
[j
])
3421 this_alternative_win
[j
] = 0;
3422 this_alternative_match_win
[j
] = 0;
3428 /* If one alternative accepts all the operands, no reload required,
3429 choose that alternative; don't consider the remaining ones. */
3432 /* Unswap these so that they are never swapped at `finish'. */
3433 if (commutative
>= 0)
3435 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3436 recog_data
.operand
[commutative
+ 1]
3437 = substed_operand
[commutative
+ 1];
3439 for (i
= 0; i
< noperands
; i
++)
3441 goal_alternative_win
[i
] = this_alternative_win
[i
];
3442 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3443 goal_alternative
[i
] = this_alternative
[i
];
3444 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3445 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3446 goal_alternative_earlyclobber
[i
]
3447 = this_alternative_earlyclobber
[i
];
3449 goal_alternative_number
= this_alternative_number
;
3450 goal_alternative_swapped
= swapped
;
3451 goal_earlyclobber
= this_earlyclobber
;
3455 /* REJECT, set by the ! and ? constraint characters and when a register
3456 would be reloaded into a non-preferred class, discourages the use of
3457 this alternative for a reload goal. REJECT is incremented by six
3458 for each ? and two for each non-preferred class. */
3459 losers
= losers
* 6 + reject
;
3461 /* If this alternative can be made to work by reloading,
3462 and it needs less reloading than the others checked so far,
3463 record it as the chosen goal for reloading. */
3464 if (! bad
&& best
> losers
)
3466 for (i
= 0; i
< noperands
; i
++)
3468 goal_alternative
[i
] = this_alternative
[i
];
3469 goal_alternative_win
[i
] = this_alternative_win
[i
];
3470 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3471 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3472 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3473 goal_alternative_earlyclobber
[i
]
3474 = this_alternative_earlyclobber
[i
];
3476 goal_alternative_swapped
= swapped
;
3478 goal_alternative_number
= this_alternative_number
;
3479 goal_earlyclobber
= this_earlyclobber
;
3483 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3484 then we need to try each alternative twice,
3485 the second time matching those two operands
3486 as if we had exchanged them.
3487 To do this, really exchange them in operands.
3489 If we have just tried the alternatives the second time,
3490 return operands to normal and drop through. */
3492 if (commutative
>= 0)
3497 register enum reg_class tclass
;
3500 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3501 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3503 tclass
= preferred_class
[commutative
];
3504 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3505 preferred_class
[commutative
+ 1] = tclass
;
3507 t
= pref_or_nothing
[commutative
];
3508 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3509 pref_or_nothing
[commutative
+ 1] = t
;
3511 memcpy (constraints
, recog_data
.constraints
,
3512 noperands
* sizeof (char *));
3517 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3518 recog_data
.operand
[commutative
+ 1]
3519 = substed_operand
[commutative
+ 1];
3523 /* The operands don't meet the constraints.
3524 goal_alternative describes the alternative
3525 that we could reach by reloading the fewest operands.
3526 Reload so as to fit it. */
3528 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3530 /* No alternative works with reloads?? */
3531 if (insn_code_number
>= 0)
3532 fatal_insn ("Unable to generate reloads for:", insn
);
3533 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3534 /* Avoid further trouble with this insn. */
3535 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3540 /* Jump to `finish' from above if all operands are valid already.
3541 In that case, goal_alternative_win is all 1. */
3544 /* Right now, for any pair of operands I and J that are required to match,
3546 goal_alternative_matches[J] is I.
3547 Set up goal_alternative_matched as the inverse function:
3548 goal_alternative_matched[I] = J. */
3550 for (i
= 0; i
< noperands
; i
++)
3551 goal_alternative_matched
[i
] = -1;
3553 for (i
= 0; i
< noperands
; i
++)
3554 if (! goal_alternative_win
[i
]
3555 && goal_alternative_matches
[i
] >= 0)
3556 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3558 for (i
= 0; i
< noperands
; i
++)
3559 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3561 /* If the best alternative is with operands 1 and 2 swapped,
3562 consider them swapped before reporting the reloads. Update the
3563 operand numbers of any reloads already pushed. */
3565 if (goal_alternative_swapped
)
3569 tem
= substed_operand
[commutative
];
3570 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3571 substed_operand
[commutative
+ 1] = tem
;
3572 tem
= recog_data
.operand
[commutative
];
3573 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3574 recog_data
.operand
[commutative
+ 1] = tem
;
3575 tem
= *recog_data
.operand_loc
[commutative
];
3576 *recog_data
.operand_loc
[commutative
]
3577 = *recog_data
.operand_loc
[commutative
+ 1];
3578 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3580 for (i
= 0; i
< n_reloads
; i
++)
3582 if (rld
[i
].opnum
== commutative
)
3583 rld
[i
].opnum
= commutative
+ 1;
3584 else if (rld
[i
].opnum
== commutative
+ 1)
3585 rld
[i
].opnum
= commutative
;
3589 for (i
= 0; i
< noperands
; i
++)
3591 operand_reloadnum
[i
] = -1;
3593 /* If this is an earlyclobber operand, we need to widen the scope.
3594 The reload must remain valid from the start of the insn being
3595 reloaded until after the operand is stored into its destination.
3596 We approximate this with RELOAD_OTHER even though we know that we
3597 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3599 One special case that is worth checking is when we have an
3600 output that is earlyclobber but isn't used past the insn (typically
3601 a SCRATCH). In this case, we only need have the reload live
3602 through the insn itself, but not for any of our input or output
3604 But we must not accidentally narrow the scope of an existing
3605 RELOAD_OTHER reload - leave these alone.
3607 In any case, anything needed to address this operand can remain
3608 however they were previously categorized. */
3610 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3612 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3613 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3616 /* Any constants that aren't allowed and can't be reloaded
3617 into registers are here changed into memory references. */
3618 for (i
= 0; i
< noperands
; i
++)
3619 if (! goal_alternative_win
[i
]
3620 && CONSTANT_P (recog_data
.operand
[i
])
3621 /* force_const_mem does not accept HIGH. */
3622 && GET_CODE (recog_data
.operand
[i
]) != HIGH
3623 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3624 (enum reg_class
) goal_alternative
[i
])
3626 || no_input_reloads
)
3627 && operand_mode
[i
] != VOIDmode
)
3629 substed_operand
[i
] = recog_data
.operand
[i
]
3630 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3631 recog_data
.operand
[i
]),
3632 i
, address_type
[i
], ind_levels
, 0, insn
,
3634 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3635 goal_alternative_number
))
3636 goal_alternative_win
[i
] = 1;
3639 /* Record the values of the earlyclobber operands for the caller. */
3640 if (goal_earlyclobber
)
3641 for (i
= 0; i
< noperands
; i
++)
3642 if (goal_alternative_earlyclobber
[i
])
3643 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3645 /* Now record reloads for all the operands that need them. */
3646 for (i
= 0; i
< noperands
; i
++)
3647 if (! goal_alternative_win
[i
])
3649 /* Operands that match previous ones have already been handled. */
3650 if (goal_alternative_matches
[i
] >= 0)
3652 /* Handle an operand with a nonoffsettable address
3653 appearing where an offsettable address will do
3654 by reloading the address into a base register.
3656 ??? We can also do this when the operand is a register and
3657 reg_equiv_mem is not offsettable, but this is a bit tricky,
3658 so we don't bother with it. It may not be worth doing. */
3659 else if (goal_alternative_matched
[i
] == -1
3660 && goal_alternative_offmemok
[i
]
3661 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3663 operand_reloadnum
[i
]
3664 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3665 &XEXP (recog_data
.operand
[i
], 0), (rtx
*)0,
3667 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3668 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3669 rld
[operand_reloadnum
[i
]].inc
3670 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3672 /* If this operand is an output, we will have made any
3673 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3674 now we are treating part of the operand as an input, so
3675 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3677 if (modified
[i
] == RELOAD_WRITE
)
3679 for (j
= 0; j
< n_reloads
; j
++)
3681 if (rld
[j
].opnum
== i
)
3683 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3684 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3685 else if (rld
[j
].when_needed
3686 == RELOAD_FOR_OUTADDR_ADDRESS
)
3687 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3692 else if (goal_alternative_matched
[i
] == -1)
3694 operand_reloadnum
[i
]
3695 = push_reload ((modified
[i
] != RELOAD_WRITE
3696 ? recog_data
.operand
[i
] : 0),
3697 (modified
[i
] != RELOAD_READ
3698 ? recog_data
.operand
[i
] : 0),
3699 (modified
[i
] != RELOAD_WRITE
3700 ? recog_data
.operand_loc
[i
] : 0),
3701 (modified
[i
] != RELOAD_READ
3702 ? recog_data
.operand_loc
[i
] : 0),
3703 (enum reg_class
) goal_alternative
[i
],
3704 (modified
[i
] == RELOAD_WRITE
3705 ? VOIDmode
: operand_mode
[i
]),
3706 (modified
[i
] == RELOAD_READ
3707 ? VOIDmode
: operand_mode
[i
]),
3708 (insn_code_number
< 0 ? 0
3709 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3710 0, i
, operand_type
[i
]);
3712 /* In a matching pair of operands, one must be input only
3713 and the other must be output only.
3714 Pass the input operand as IN and the other as OUT. */
3715 else if (modified
[i
] == RELOAD_READ
3716 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3718 operand_reloadnum
[i
]
3719 = push_reload (recog_data
.operand
[i
],
3720 recog_data
.operand
[goal_alternative_matched
[i
]],
3721 recog_data
.operand_loc
[i
],
3722 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3723 (enum reg_class
) goal_alternative
[i
],
3725 operand_mode
[goal_alternative_matched
[i
]],
3726 0, 0, i
, RELOAD_OTHER
);
3727 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3729 else if (modified
[i
] == RELOAD_WRITE
3730 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3732 operand_reloadnum
[goal_alternative_matched
[i
]]
3733 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3734 recog_data
.operand
[i
],
3735 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3736 recog_data
.operand_loc
[i
],
3737 (enum reg_class
) goal_alternative
[i
],
3738 operand_mode
[goal_alternative_matched
[i
]],
3740 0, 0, i
, RELOAD_OTHER
);
3741 operand_reloadnum
[i
] = output_reloadnum
;
3743 else if (insn_code_number
>= 0)
3747 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3748 /* Avoid further trouble with this insn. */
3749 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3754 else if (goal_alternative_matched
[i
] < 0
3755 && goal_alternative_matches
[i
] < 0
3758 /* For each non-matching operand that's a MEM or a pseudo-register
3759 that didn't get a hard register, make an optional reload.
3760 This may get done even if the insn needs no reloads otherwise. */
3762 rtx operand
= recog_data
.operand
[i
];
3764 while (GET_CODE (operand
) == SUBREG
)
3765 operand
= SUBREG_REG (operand
);
3766 if ((GET_CODE (operand
) == MEM
3767 || (GET_CODE (operand
) == REG
3768 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3769 /* If this is only for an output, the optional reload would not
3770 actually cause us to use a register now, just note that
3771 something is stored here. */
3772 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3773 || modified
[i
] == RELOAD_WRITE
)
3774 && ! no_input_reloads
3775 /* An optional output reload might allow to delete INSN later.
3776 We mustn't make in-out reloads on insns that are not permitted
3778 If this is an asm, we can't delete it; we must not even call
3779 push_reload for an optional output reload in this case,
3780 because we can't be sure that the constraint allows a register,
3781 and push_reload verifies the constraints for asms. */
3782 && (modified
[i
] == RELOAD_READ
3783 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3784 operand_reloadnum
[i
]
3785 = push_reload ((modified
[i
] != RELOAD_WRITE
3786 ? recog_data
.operand
[i
] : 0),
3787 (modified
[i
] != RELOAD_READ
3788 ? recog_data
.operand
[i
] : 0),
3789 (modified
[i
] != RELOAD_WRITE
3790 ? recog_data
.operand_loc
[i
] : 0),
3791 (modified
[i
] != RELOAD_READ
3792 ? recog_data
.operand_loc
[i
] : 0),
3793 (enum reg_class
) goal_alternative
[i
],
3794 (modified
[i
] == RELOAD_WRITE
3795 ? VOIDmode
: operand_mode
[i
]),
3796 (modified
[i
] == RELOAD_READ
3797 ? VOIDmode
: operand_mode
[i
]),
3798 (insn_code_number
< 0 ? 0
3799 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3800 1, i
, operand_type
[i
]);
3801 /* If a memory reference remains (either as a MEM or a pseudo that
3802 did not get a hard register), yet we can't make an optional
3803 reload, check if this is actually a pseudo register reference;
3804 we then need to emit a USE and/or a CLOBBER so that reload
3805 inheritance will do the right thing. */
3807 && (GET_CODE (operand
) == MEM
3808 || (GET_CODE (operand
) == REG
3809 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3810 && reg_renumber
[REGNO (operand
)] < 0)))
3812 operand
= *recog_data
.operand_loc
[i
];
3814 while (GET_CODE (operand
) == SUBREG
)
3815 operand
= SUBREG_REG (operand
);
3816 if (GET_CODE (operand
) == REG
)
3818 if (modified
[i
] != RELOAD_WRITE
)
3819 emit_insn_before (gen_rtx_USE (VOIDmode
, operand
), insn
);
3820 if (modified
[i
] != RELOAD_READ
)
3821 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3825 else if (goal_alternative_matches
[i
] >= 0
3826 && goal_alternative_win
[goal_alternative_matches
[i
]]
3827 && modified
[i
] == RELOAD_READ
3828 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3829 && ! no_input_reloads
&& ! no_output_reloads
3832 /* Similarly, make an optional reload for a pair of matching
3833 objects that are in MEM or a pseudo that didn't get a hard reg. */
3835 rtx operand
= recog_data
.operand
[i
];
3837 while (GET_CODE (operand
) == SUBREG
)
3838 operand
= SUBREG_REG (operand
);
3839 if ((GET_CODE (operand
) == MEM
3840 || (GET_CODE (operand
) == REG
3841 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3842 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3844 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3845 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
3846 recog_data
.operand
[i
],
3847 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
3848 recog_data
.operand_loc
[i
],
3849 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3850 operand_mode
[goal_alternative_matches
[i
]],
3852 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3855 /* Perform whatever substitutions on the operands we are supposed
3856 to make due to commutativity or replacement of registers
3857 with equivalent constants or memory slots. */
3859 for (i
= 0; i
< noperands
; i
++)
3861 /* We only do this on the last pass through reload, because it is
3862 possible for some data (like reg_equiv_address) to be changed during
3863 later passes. Moreover, we loose the opportunity to get a useful
3864 reload_{in,out}_reg when we do these replacements. */
3868 rtx substitution
= substed_operand
[i
];
3870 *recog_data
.operand_loc
[i
] = substitution
;
3872 /* If we're replacing an operand with a LABEL_REF, we need
3873 to make sure that there's a REG_LABEL note attached to
3874 this instruction. */
3875 if (GET_CODE (insn
) != JUMP_INSN
3876 && GET_CODE (substitution
) == LABEL_REF
3877 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
3878 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
,
3879 XEXP (substitution
, 0),
3883 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
3886 /* If this insn pattern contains any MATCH_DUP's, make sure that
3887 they will be substituted if the operands they match are substituted.
3888 Also do now any substitutions we already did on the operands.
3890 Don't do this if we aren't making replacements because we might be
3891 propagating things allocated by frame pointer elimination into places
3892 it doesn't expect. */
3894 if (insn_code_number
>= 0 && replace
)
3895 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
3897 int opno
= recog_data
.dup_num
[i
];
3898 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
3899 if (operand_reloadnum
[opno
] >= 0)
3900 push_replacement (recog_data
.dup_loc
[i
], operand_reloadnum
[opno
],
3901 insn_data
[insn_code_number
].operand
[opno
].mode
);
3905 /* This loses because reloading of prior insns can invalidate the equivalence
3906 (or at least find_equiv_reg isn't smart enough to find it any more),
3907 causing this insn to need more reload regs than it needed before.
3908 It may be too late to make the reload regs available.
3909 Now this optimization is done safely in choose_reload_regs. */
3911 /* For each reload of a reg into some other class of reg,
3912 search for an existing equivalent reg (same value now) in the right class.
3913 We can use it as long as we don't need to change its contents. */
3914 for (i
= 0; i
< n_reloads
; i
++)
3915 if (rld
[i
].reg_rtx
== 0
3917 && GET_CODE (rld
[i
].in
) == REG
3921 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
3922 static_reload_reg_p
, 0, rld
[i
].inmode
);
3923 /* Prevent generation of insn to load the value
3924 because the one we found already has the value. */
3926 rld
[i
].in
= rld
[i
].reg_rtx
;
3930 /* Perhaps an output reload can be combined with another
3931 to reduce needs by one. */
3932 if (!goal_earlyclobber
)
3935 /* If we have a pair of reloads for parts of an address, they are reloading
3936 the same object, the operands themselves were not reloaded, and they
3937 are for two operands that are supposed to match, merge the reloads and
3938 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3940 for (i
= 0; i
< n_reloads
; i
++)
3944 for (j
= i
+ 1; j
< n_reloads
; j
++)
3945 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3946 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3947 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3948 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3949 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3950 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3951 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3952 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3953 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
3954 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3955 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
3956 && (operand_reloadnum
[rld
[j
].opnum
] < 0
3957 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
3958 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
3959 || (goal_alternative_matches
[rld
[j
].opnum
]
3962 for (k
= 0; k
< n_replacements
; k
++)
3963 if (replacements
[k
].what
== j
)
3964 replacements
[k
].what
= i
;
3966 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3967 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3968 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3970 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3975 /* Scan all the reloads and update their type.
3976 If a reload is for the address of an operand and we didn't reload
3977 that operand, change the type. Similarly, change the operand number
3978 of a reload when two operands match. If a reload is optional, treat it
3979 as though the operand isn't reloaded.
3981 ??? This latter case is somewhat odd because if we do the optional
3982 reload, it means the object is hanging around. Thus we need only
3983 do the address reload if the optional reload was NOT done.
3985 Change secondary reloads to be the address type of their operand, not
3988 If an operand's reload is now RELOAD_OTHER, change any
3989 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3990 RELOAD_FOR_OTHER_ADDRESS. */
3992 for (i
= 0; i
< n_reloads
; i
++)
3994 if (rld
[i
].secondary_p
3995 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
3996 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
3998 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3999 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4000 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4001 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4002 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4003 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
4005 /* If we have a secondary reload to go along with this reload,
4006 change its type to RELOAD_FOR_OPADDR_ADDR. */
4008 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4009 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4010 && rld
[i
].secondary_in_reload
!= -1)
4012 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4014 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4016 /* If there's a tertiary reload we have to change it also. */
4017 if (secondary_in_reload
> 0
4018 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4019 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4020 = RELOAD_FOR_OPADDR_ADDR
;
4023 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4024 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4025 && rld
[i
].secondary_out_reload
!= -1)
4027 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4029 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4031 /* If there's a tertiary reload we have to change it also. */
4032 if (secondary_out_reload
4033 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4034 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4035 = RELOAD_FOR_OPADDR_ADDR
;
4038 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4039 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4040 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4042 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4045 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4046 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4047 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4048 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4050 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4052 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4053 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4056 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4057 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4058 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4060 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4061 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4062 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4063 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4064 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4065 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4066 This is complicated by the fact that a single operand can have more
4067 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4068 choose_reload_regs without affecting code quality, and cases that
4069 actually fail are extremely rare, so it turns out to be better to fix
4070 the problem here by not generating cases that choose_reload_regs will
4072 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4073 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4075 We can reduce the register pressure by exploiting that a
4076 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4077 does not conflict with any of them, if it is only used for the first of
4078 the RELOAD_FOR_X_ADDRESS reloads. */
4080 int first_op_addr_num
= -2;
4081 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4082 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4083 int need_change
= 0;
4084 /* We use last_op_addr_reload and the contents of the above arrays
4085 first as flags - -2 means no instance encountered, -1 means exactly
4086 one instance encountered.
4087 If more than one instance has been encountered, we store the reload
4088 number of the first reload of the kind in question; reload numbers
4089 are known to be non-negative. */
4090 for (i
= 0; i
< noperands
; i
++)
4091 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4092 for (i
= n_reloads
- 1; i
>= 0; i
--)
4094 switch (rld
[i
].when_needed
)
4096 case RELOAD_FOR_OPERAND_ADDRESS
:
4097 if (++first_op_addr_num
>= 0)
4099 first_op_addr_num
= i
;
4103 case RELOAD_FOR_INPUT_ADDRESS
:
4104 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4106 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4110 case RELOAD_FOR_OUTPUT_ADDRESS
:
4111 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4113 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4124 for (i
= 0; i
< n_reloads
; i
++)
4127 enum reload_type type
;
4129 switch (rld
[i
].when_needed
)
4131 case RELOAD_FOR_OPADDR_ADDR
:
4132 first_num
= first_op_addr_num
;
4133 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4135 case RELOAD_FOR_INPADDR_ADDRESS
:
4136 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4137 type
= RELOAD_FOR_INPUT_ADDRESS
;
4139 case RELOAD_FOR_OUTADDR_ADDRESS
:
4140 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4141 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4148 else if (i
> first_num
)
4149 rld
[i
].when_needed
= type
;
4152 /* Check if the only TYPE reload that uses reload I is
4153 reload FIRST_NUM. */
4154 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4156 if (rld
[j
].when_needed
== type
4157 && (rld
[i
].secondary_p
4158 ? rld
[j
].secondary_in_reload
== i
4159 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4161 rld
[i
].when_needed
= type
;
4170 /* See if we have any reloads that are now allowed to be merged
4171 because we've changed when the reload is needed to
4172 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4173 check for the most common cases. */
4175 for (i
= 0; i
< n_reloads
; i
++)
4176 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4177 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4178 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4179 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4180 for (j
= 0; j
< n_reloads
; j
++)
4181 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4182 && rld
[j
].when_needed
== rld
[i
].when_needed
4183 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4184 && rld
[i
].class == rld
[j
].class
4185 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4186 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4188 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4189 transfer_replacements (i
, j
);
4194 /* If we made any reloads for addresses, see if they violate a
4195 "no input reloads" requirement for this insn. But loads that we
4196 do after the insn (such as for output addresses) are fine. */
4197 if (no_input_reloads
)
4198 for (i
= 0; i
< n_reloads
; i
++)
4200 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
4201 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
)
4205 /* Compute reload_mode and reload_nregs. */
4206 for (i
= 0; i
< n_reloads
; i
++)
4209 = (rld
[i
].inmode
== VOIDmode
4210 || (GET_MODE_SIZE (rld
[i
].outmode
)
4211 > GET_MODE_SIZE (rld
[i
].inmode
)))
4212 ? rld
[i
].outmode
: rld
[i
].inmode
;
4214 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4220 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4221 accepts a memory operand with constant address. */
4224 alternative_allows_memconst (constraint
, altnum
)
4225 const char *constraint
;
4229 /* Skip alternatives before the one requested. */
4232 while (*constraint
++ != ',');
4235 /* Scan the requested alternative for 'm' or 'o'.
4236 If one of them is present, this alternative accepts memory constants. */
4237 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
4238 if (c
== 'm' || c
== 'o')
4243 /* Scan X for memory references and scan the addresses for reloading.
4244 Also checks for references to "constant" regs that we want to eliminate
4245 and replaces them with the values they stand for.
4246 We may alter X destructively if it contains a reference to such.
4247 If X is just a constant reg, we return the equivalent value
4250 IND_LEVELS says how many levels of indirect addressing this machine
4253 OPNUM and TYPE identify the purpose of the reload.
4255 IS_SET_DEST is true if X is the destination of a SET, which is not
4256 appropriate to be replaced by a constant.
4258 INSN, if nonzero, is the insn in which we do the reload. It is used
4259 to determine if we may generate output reloads, and where to put USEs
4260 for pseudos that we have to replace with stack slots.
4262 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4263 result of find_reloads_address. */
4266 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
, insn
,
4270 enum reload_type type
;
4274 int *address_reloaded
;
4276 register RTX_CODE code
= GET_CODE (x
);
4278 register const char *fmt
= GET_RTX_FORMAT (code
);
4284 /* This code is duplicated for speed in find_reloads. */
4285 register int regno
= REGNO (x
);
4286 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4287 x
= reg_equiv_constant
[regno
];
4289 /* This creates (subreg (mem...)) which would cause an unnecessary
4290 reload of the mem. */
4291 else if (reg_equiv_mem
[regno
] != 0)
4292 x
= reg_equiv_mem
[regno
];
4294 else if (reg_equiv_memory_loc
[regno
]
4295 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4297 rtx mem
= make_memloc (x
, regno
);
4298 if (reg_equiv_address
[regno
]
4299 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4301 /* If this is not a toplevel operand, find_reloads doesn't see
4302 this substitution. We have to emit a USE of the pseudo so
4303 that delete_output_reload can see it. */
4304 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4305 emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
);
4307 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4308 opnum
, type
, ind_levels
, insn
);
4309 if (address_reloaded
)
4310 *address_reloaded
= i
;
4319 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4320 opnum
, type
, ind_levels
, insn
);
4321 if (address_reloaded
)
4322 *address_reloaded
= i
;
4327 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4329 /* Check for SUBREG containing a REG that's equivalent to a constant.
4330 If the constant has a known value, truncate it right now.
4331 Similarly if we are extracting a single-word of a multi-word
4332 constant. If the constant is symbolic, allow it to be substituted
4333 normally. push_reload will strip the subreg later. If the
4334 constant is VOIDmode, abort because we will lose the mode of
4335 the register (this should never happen because one of the cases
4336 above should handle it). */
4338 register int regno
= REGNO (SUBREG_REG (x
));
4341 if (subreg_lowpart_p (x
)
4342 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4343 && reg_equiv_constant
[regno
] != 0
4344 && (tem
= gen_lowpart_common (GET_MODE (x
),
4345 reg_equiv_constant
[regno
])) != 0)
4348 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
4349 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4350 && reg_equiv_constant
[regno
] != 0
4351 && (tem
= operand_subword (reg_equiv_constant
[regno
],
4352 SUBREG_BYTE (x
) / UNITS_PER_WORD
, 0,
4353 GET_MODE (SUBREG_REG (x
)))) != 0)
4355 /* TEM is now a word sized constant for the bits from X that
4356 we wanted. However, TEM may be the wrong representation.
4358 Use gen_lowpart_common to convert a CONST_INT into a
4359 CONST_DOUBLE and vice versa as needed according to by the mode
4361 tem
= gen_lowpart_common (GET_MODE (x
), tem
);
4367 /* If the SUBREG is wider than a word, the above test will fail.
4368 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4369 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4370 a 32 bit target. We still can - and have to - handle this
4371 for non-paradoxical subregs of CONST_INTs. */
4372 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4373 && reg_equiv_constant
[regno
] != 0
4374 && GET_CODE (reg_equiv_constant
[regno
]) == CONST_INT
4375 && (GET_MODE_SIZE (GET_MODE (x
))
4376 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
4378 int shift
= SUBREG_BYTE (x
) * BITS_PER_UNIT
;
4379 if (WORDS_BIG_ENDIAN
)
4380 shift
= (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4381 - GET_MODE_BITSIZE (GET_MODE (x
))
4383 /* Here we use the knowledge that CONST_INTs have a
4384 HOST_WIDE_INT field. */
4385 if (shift
>= HOST_BITS_PER_WIDE_INT
)
4386 shift
= HOST_BITS_PER_WIDE_INT
- 1;
4387 return GEN_INT (INTVAL (reg_equiv_constant
[regno
]) >> shift
);
4390 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4391 && reg_equiv_constant
[regno
] != 0
4392 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
4395 /* If the subreg contains a reg that will be converted to a mem,
4396 convert the subreg to a narrower memref now.
4397 Otherwise, we would get (subreg (mem ...) ...),
4398 which would force reload of the mem.
4400 We also need to do this if there is an equivalent MEM that is
4401 not offsettable. In that case, alter_subreg would produce an
4402 invalid address on big-endian machines.
4404 For machines that extend byte loads, we must not reload using
4405 a wider mode if we have a paradoxical SUBREG. find_reloads will
4406 force a reload in that case. So we should not do anything here. */
4408 else if (regno
>= FIRST_PSEUDO_REGISTER
4409 #ifdef LOAD_EXTEND_OP
4410 && (GET_MODE_SIZE (GET_MODE (x
))
4411 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4413 && (reg_equiv_address
[regno
] != 0
4414 || (reg_equiv_mem
[regno
] != 0
4415 && (! strict_memory_address_p (GET_MODE (x
),
4416 XEXP (reg_equiv_mem
[regno
], 0))
4417 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4418 || num_not_at_initial_offset
))))
4419 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4422 else if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == MEM
4423 && (GET_MODE_SIZE (GET_MODE (x
))
4424 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4425 && mode_dependent_address_p (XEXP (SUBREG_REG (x
), 0)))
4427 /* A paradoxical subreg will simply have the mode of the access
4428 changed, so we need to reload such a memory operand to stabilize
4429 the meaning of the memory access. */
4430 enum machine_mode subreg_mode
= GET_MODE (SUBREG_REG (x
));
4432 /* SUBREG_REG (x) is a MEM, so we cant take the offset, instead we
4433 calculate the register number as :
4434 SUBREG_BYTE (x) / GET_MODE_SIZE (subreg_mode) */
4436 push_reload (NULL_RTX
, SUBREG_REG (x
), (rtx
*)0, &SUBREG_REG (x
),
4437 find_valid_class (subreg_mode
,
4438 SUBREG_BYTE (x
) / GET_MODE_SIZE (subreg_mode
)),
4439 VOIDmode
, subreg_mode
, 0, 0, opnum
, type
);
4441 push_reload (SUBREG_REG (x
), NULL_RTX
, &SUBREG_REG (x
), (rtx
*)0,
4442 find_valid_class (subreg_mode
,
4443 SUBREG_BYTE (x
) / GET_MODE_SIZE (subreg_mode
)),
4444 subreg_mode
, VOIDmode
, 0, 0, opnum
, type
);
4447 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4451 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4452 ind_levels
, is_set_dest
, insn
,
4454 /* If we have replaced a reg with it's equivalent memory loc -
4455 that can still be handled here e.g. if it's in a paradoxical
4456 subreg - we must make the change in a copy, rather than using
4457 a destructive change. This way, find_reloads can still elect
4458 not to do the change. */
4459 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4461 x
= shallow_copy_rtx (x
);
4464 XEXP (x
, i
) = new_part
;
4470 /* Return a mem ref for the memory equivalent of reg REGNO.
4471 This mem ref is not shared with anything. */
4474 make_memloc (ad
, regno
)
4478 /* We must rerun eliminate_regs, in case the elimination
4479 offsets have changed. */
4481 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4483 /* If TEM might contain a pseudo, we must copy it to avoid
4484 modifying it when we do the substitution for the reload. */
4485 if (rtx_varies_p (tem
, 0))
4486 tem
= copy_rtx (tem
);
4488 tem
= replace_equiv_address_nv (reg_equiv_memory_loc
[regno
], tem
);
4489 tem
= adjust_address_nv (tem
, GET_MODE (ad
), 0);
4491 /* Copy the result if it's still the same as the equivalence, to avoid
4492 modifying it when we do the substitution for the reload. */
4493 if (tem
== reg_equiv_memory_loc
[regno
])
4494 tem
= copy_rtx (tem
);
4498 /* Record all reloads needed for handling memory address AD
4499 which appears in *LOC in a memory reference to mode MODE
4500 which itself is found in location *MEMREFLOC.
4501 Note that we take shortcuts assuming that no multi-reg machine mode
4502 occurs as part of an address.
4504 OPNUM and TYPE specify the purpose of this reload.
4506 IND_LEVELS says how many levels of indirect addressing this machine
4509 INSN, if nonzero, is the insn in which we do the reload. It is used
4510 to determine if we may generate output reloads, and where to put USEs
4511 for pseudos that we have to replace with stack slots.
4513 Value is nonzero if this address is reloaded or replaced as a whole.
4514 This is interesting to the caller if the address is an autoincrement.
4516 Note that there is no verification that the address will be valid after
4517 this routine does its work. Instead, we rely on the fact that the address
4518 was valid when reload started. So we need only undo things that reload
4519 could have broken. These are wrong register types, pseudos not allocated
4520 to a hard register, and frame pointer elimination. */
4523 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4524 enum machine_mode mode
;
4529 enum reload_type type
;
4534 int removed_and
= 0;
4537 /* If the address is a register, see if it is a legitimate address and
4538 reload if not. We first handle the cases where we need not reload
4539 or where we must reload in a non-standard way. */
4541 if (GET_CODE (ad
) == REG
)
4545 /* If the register is equivalent to an invariant expression, substitute
4546 the invariant, and eliminate any eliminable register references. */
4547 tem
= reg_equiv_constant
[regno
];
4549 && (tem
= eliminate_regs (tem
, mode
, insn
))
4550 && strict_memory_address_p (mode
, tem
))
4556 tem
= reg_equiv_memory_loc
[regno
];
4559 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4561 tem
= make_memloc (ad
, regno
);
4562 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4564 find_reloads_address (GET_MODE (tem
), (rtx
*)0, XEXP (tem
, 0),
4565 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
4568 /* We can avoid a reload if the register's equivalent memory
4569 expression is valid as an indirect memory address.
4570 But not all addresses are valid in a mem used as an indirect
4571 address: only reg or reg+constant. */
4574 && strict_memory_address_p (mode
, tem
)
4575 && (GET_CODE (XEXP (tem
, 0)) == REG
4576 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4577 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4578 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4580 /* TEM is not the same as what we'll be replacing the
4581 pseudo with after reload, put a USE in front of INSN
4582 in the final reload pass. */
4584 && num_not_at_initial_offset
4585 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4588 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4589 /* This doesn't really count as replacing the address
4590 as a whole, since it is still a memory access. */
4598 /* The only remaining case where we can avoid a reload is if this is a
4599 hard register that is valid as a base register and which is not the
4600 subject of a CLOBBER in this insn. */
4602 else if (regno
< FIRST_PSEUDO_REGISTER
4603 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4604 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4607 /* If we do not have one of the cases above, we must do the reload. */
4608 push_reload (ad
, NULL_RTX
, loc
, (rtx
*)0, BASE_REG_CLASS
,
4609 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4613 if (strict_memory_address_p (mode
, ad
))
4615 /* The address appears valid, so reloads are not needed.
4616 But the address may contain an eliminable register.
4617 This can happen because a machine with indirect addressing
4618 may consider a pseudo register by itself a valid address even when
4619 it has failed to get a hard reg.
4620 So do a tree-walk to find and eliminate all such regs. */
4622 /* But first quickly dispose of a common case. */
4623 if (GET_CODE (ad
) == PLUS
4624 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4625 && GET_CODE (XEXP (ad
, 0)) == REG
4626 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4629 subst_reg_equivs_changed
= 0;
4630 *loc
= subst_reg_equivs (ad
, insn
);
4632 if (! subst_reg_equivs_changed
)
4635 /* Check result for validity after substitution. */
4636 if (strict_memory_address_p (mode
, ad
))
4640 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4645 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4650 *memrefloc
= copy_rtx (*memrefloc
);
4651 XEXP (*memrefloc
, 0) = ad
;
4652 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4658 /* The address is not valid. We have to figure out why. First see if
4659 we have an outer AND and remove it if so. Then analyze what's inside. */
4661 if (GET_CODE (ad
) == AND
)
4664 loc
= &XEXP (ad
, 0);
4668 /* One possibility for why the address is invalid is that it is itself
4669 a MEM. This can happen when the frame pointer is being eliminated, a
4670 pseudo is not allocated to a hard register, and the offset between the
4671 frame and stack pointers is not its initial value. In that case the
4672 pseudo will have been replaced by a MEM referring to the
4674 if (GET_CODE (ad
) == MEM
)
4676 /* First ensure that the address in this MEM is valid. Then, unless
4677 indirect addresses are valid, reload the MEM into a register. */
4679 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4680 opnum
, ADDR_TYPE (type
),
4681 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4683 /* If tem was changed, then we must create a new memory reference to
4684 hold it and store it back into memrefloc. */
4685 if (tem
!= ad
&& memrefloc
)
4687 *memrefloc
= copy_rtx (*memrefloc
);
4688 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4689 loc
= &XEXP (*memrefloc
, 0);
4691 loc
= &XEXP (*loc
, 0);
4694 /* Check similar cases as for indirect addresses as above except
4695 that we can allow pseudos and a MEM since they should have been
4696 taken care of above. */
4699 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4700 || GET_CODE (XEXP (tem
, 0)) == MEM
4701 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4702 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4703 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4704 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4706 /* Must use TEM here, not AD, since it is the one that will
4707 have any subexpressions reloaded, if needed. */
4708 push_reload (tem
, NULL_RTX
, loc
, (rtx
*)0,
4709 BASE_REG_CLASS
, GET_MODE (tem
),
4712 return ! removed_and
;
4718 /* If we have address of a stack slot but it's not valid because the
4719 displacement is too large, compute the sum in a register.
4720 Handle all base registers here, not just fp/ap/sp, because on some
4721 targets (namely SH) we can also get too large displacements from
4722 big-endian corrections. */
4723 else if (GET_CODE (ad
) == PLUS
4724 && GET_CODE (XEXP (ad
, 0)) == REG
4725 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4726 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4727 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4729 /* Unshare the MEM rtx so we can safely alter it. */
4732 *memrefloc
= copy_rtx (*memrefloc
);
4733 loc
= &XEXP (*memrefloc
, 0);
4735 loc
= &XEXP (*loc
, 0);
4738 if (double_reg_address_ok
)
4740 /* Unshare the sum as well. */
4741 *loc
= ad
= copy_rtx (ad
);
4743 /* Reload the displacement into an index reg.
4744 We assume the frame pointer or arg pointer is a base reg. */
4745 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4746 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4752 /* If the sum of two regs is not necessarily valid,
4753 reload the sum into a base reg.
4754 That will at least work. */
4755 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
,
4756 Pmode
, opnum
, type
, ind_levels
);
4758 return ! removed_and
;
4761 /* If we have an indexed stack slot, there are three possible reasons why
4762 it might be invalid: The index might need to be reloaded, the address
4763 might have been made by frame pointer elimination and hence have a
4764 constant out of range, or both reasons might apply.
4766 We can easily check for an index needing reload, but even if that is the
4767 case, we might also have an invalid constant. To avoid making the
4768 conservative assumption and requiring two reloads, we see if this address
4769 is valid when not interpreted strictly. If it is, the only problem is
4770 that the index needs a reload and find_reloads_address_1 will take care
4773 If we decide to do something here, it must be that
4774 `double_reg_address_ok' is true and that this address rtl was made by
4775 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4776 rework the sum so that the reload register will be added to the index.
4777 This is safe because we know the address isn't shared.
4779 We check for fp/ap/sp as both the first and second operand of the
4782 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4783 && GET_CODE (XEXP (ad
, 0)) == PLUS
4784 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4785 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4786 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4788 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4789 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4791 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4792 && ! memory_address_p (mode
, ad
))
4794 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4795 plus_constant (XEXP (XEXP (ad
, 0), 0),
4796 INTVAL (XEXP (ad
, 1))),
4797 XEXP (XEXP (ad
, 0), 1));
4798 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4799 GET_MODE (ad
), opnum
, type
, ind_levels
);
4800 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4806 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4807 && GET_CODE (XEXP (ad
, 0)) == PLUS
4808 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4809 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4810 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4812 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4813 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4815 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4816 && ! memory_address_p (mode
, ad
))
4818 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4819 XEXP (XEXP (ad
, 0), 0),
4820 plus_constant (XEXP (XEXP (ad
, 0), 1),
4821 INTVAL (XEXP (ad
, 1))));
4822 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1), BASE_REG_CLASS
,
4823 GET_MODE (ad
), opnum
, type
, ind_levels
);
4824 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4830 /* See if address becomes valid when an eliminable register
4831 in a sum is replaced. */
4834 if (GET_CODE (ad
) == PLUS
)
4835 tem
= subst_indexed_address (ad
);
4836 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4838 /* Ok, we win that way. Replace any additional eliminable
4841 subst_reg_equivs_changed
= 0;
4842 tem
= subst_reg_equivs (tem
, insn
);
4844 /* Make sure that didn't make the address invalid again. */
4846 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4853 /* If constants aren't valid addresses, reload the constant address
4855 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4857 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4858 Unshare it so we can safely alter it. */
4859 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4860 && CONSTANT_POOL_ADDRESS_P (ad
))
4862 *memrefloc
= copy_rtx (*memrefloc
);
4863 loc
= &XEXP (*memrefloc
, 0);
4865 loc
= &XEXP (*loc
, 0);
4868 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4870 return ! removed_and
;
4873 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
4877 /* Find all pseudo regs appearing in AD
4878 that are eliminable in favor of equivalent values
4879 and do not have hard regs; replace them by their equivalents.
4880 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4881 front of it for pseudos that we have to replace with stack slots. */
4884 subst_reg_equivs (ad
, insn
)
4888 register RTX_CODE code
= GET_CODE (ad
);
4890 register const char *fmt
;
4906 register int regno
= REGNO (ad
);
4908 if (reg_equiv_constant
[regno
] != 0)
4910 subst_reg_equivs_changed
= 1;
4911 return reg_equiv_constant
[regno
];
4913 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
4915 rtx mem
= make_memloc (ad
, regno
);
4916 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4918 subst_reg_equivs_changed
= 1;
4919 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4927 /* Quickly dispose of a common case. */
4928 if (XEXP (ad
, 0) == frame_pointer_rtx
4929 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4937 fmt
= GET_RTX_FORMAT (code
);
4938 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4940 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
4944 /* Compute the sum of X and Y, making canonicalizations assumed in an
4945 address, namely: sum constant integers, surround the sum of two
4946 constants with a CONST, put the constant as the second operand, and
4947 group the constant on the outermost sum.
4949 This routine assumes both inputs are already in canonical form. */
4956 enum machine_mode mode
= GET_MODE (x
);
4958 if (mode
== VOIDmode
)
4959 mode
= GET_MODE (y
);
4961 if (mode
== VOIDmode
)
4964 if (GET_CODE (x
) == CONST_INT
)
4965 return plus_constant (y
, INTVAL (x
));
4966 else if (GET_CODE (y
) == CONST_INT
)
4967 return plus_constant (x
, INTVAL (y
));
4968 else if (CONSTANT_P (x
))
4969 tem
= x
, x
= y
, y
= tem
;
4971 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4972 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4974 /* Note that if the operands of Y are specified in the opposite
4975 order in the recursive calls below, infinite recursion will occur. */
4976 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4977 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4979 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4980 constant will have been placed second. */
4981 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4983 if (GET_CODE (x
) == CONST
)
4985 if (GET_CODE (y
) == CONST
)
4988 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
4991 return gen_rtx_PLUS (mode
, x
, y
);
4994 /* If ADDR is a sum containing a pseudo register that should be
4995 replaced with a constant (from reg_equiv_constant),
4996 return the result of doing so, and also apply the associative
4997 law so that the result is more likely to be a valid address.
4998 (But it is not guaranteed to be one.)
5000 Note that at most one register is replaced, even if more are
5001 replaceable. Also, we try to put the result into a canonical form
5002 so it is more likely to be a valid address.
5004 In all other cases, return ADDR. */
5007 subst_indexed_address (addr
)
5010 rtx op0
= 0, op1
= 0, op2
= 0;
5014 if (GET_CODE (addr
) == PLUS
)
5016 /* Try to find a register to replace. */
5017 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5018 if (GET_CODE (op0
) == REG
5019 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5020 && reg_renumber
[regno
] < 0
5021 && reg_equiv_constant
[regno
] != 0)
5022 op0
= reg_equiv_constant
[regno
];
5023 else if (GET_CODE (op1
) == REG
5024 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5025 && reg_renumber
[regno
] < 0
5026 && reg_equiv_constant
[regno
] != 0)
5027 op1
= reg_equiv_constant
[regno
];
5028 else if (GET_CODE (op0
) == PLUS
5029 && (tem
= subst_indexed_address (op0
)) != op0
)
5031 else if (GET_CODE (op1
) == PLUS
5032 && (tem
= subst_indexed_address (op1
)) != op1
)
5037 /* Pick out up to three things to add. */
5038 if (GET_CODE (op1
) == PLUS
)
5039 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5040 else if (GET_CODE (op0
) == PLUS
)
5041 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5043 /* Compute the sum. */
5045 op1
= form_sum (op1
, op2
);
5047 op0
= form_sum (op0
, op1
);
5054 /* Update the REG_INC notes for an insn. It updates all REG_INC
5055 notes for the instruction which refer to REGNO the to refer
5056 to the reload number.
5058 INSN is the insn for which any REG_INC notes need updating.
5060 REGNO is the register number which has been reloaded.
5062 RELOADNUM is the reload number. */
5065 update_auto_inc_notes (insn
, regno
, reloadnum
)
5066 rtx insn ATTRIBUTE_UNUSED
;
5067 int regno ATTRIBUTE_UNUSED
;
5068 int reloadnum ATTRIBUTE_UNUSED
;
5073 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5074 if (REG_NOTE_KIND (link
) == REG_INC
5075 && REGNO (XEXP (link
, 0)) == regno
)
5076 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5080 /* Record the pseudo registers we must reload into hard registers in a
5081 subexpression of a would-be memory address, X referring to a value
5082 in mode MODE. (This function is not called if the address we find
5085 CONTEXT = 1 means we are considering regs as index regs,
5086 = 0 means we are considering them as base regs.
5088 OPNUM and TYPE specify the purpose of any reloads made.
5090 IND_LEVELS says how many levels of indirect addressing are
5091 supported at this point in the address.
5093 INSN, if nonzero, is the insn in which we do the reload. It is used
5094 to determine if we may generate output reloads.
5096 We return nonzero if X, as a whole, is reloaded or replaced. */
5098 /* Note that we take shortcuts assuming that no multi-reg machine mode
5099 occurs as part of an address.
5100 Also, this is not fully machine-customizable; it works for machines
5101 such as VAXen and 68000's and 32000's, but other possible machines
5102 could have addressing modes that this does not handle right. */
5105 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
5106 enum machine_mode mode
;
5111 enum reload_type type
;
5115 register RTX_CODE code
= GET_CODE (x
);
5121 register rtx orig_op0
= XEXP (x
, 0);
5122 register rtx orig_op1
= XEXP (x
, 1);
5123 register RTX_CODE code0
= GET_CODE (orig_op0
);
5124 register RTX_CODE code1
= GET_CODE (orig_op1
);
5125 register rtx op0
= orig_op0
;
5126 register rtx op1
= orig_op1
;
5128 if (GET_CODE (op0
) == SUBREG
)
5130 op0
= SUBREG_REG (op0
);
5131 code0
= GET_CODE (op0
);
5132 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5133 op0
= gen_rtx_REG (word_mode
,
5135 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5136 GET_MODE (SUBREG_REG (orig_op0
)),
5137 SUBREG_BYTE (orig_op0
),
5138 GET_MODE (orig_op0
))));
5141 if (GET_CODE (op1
) == SUBREG
)
5143 op1
= SUBREG_REG (op1
);
5144 code1
= GET_CODE (op1
);
5145 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5146 /* ??? Why is this given op1's mode and above for
5147 ??? op0 SUBREGs we use word_mode? */
5148 op1
= gen_rtx_REG (GET_MODE (op1
),
5150 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5151 GET_MODE (SUBREG_REG (orig_op1
)),
5152 SUBREG_BYTE (orig_op1
),
5153 GET_MODE (orig_op1
))));
5156 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5157 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5159 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5160 type
, ind_levels
, insn
);
5161 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5162 type
, ind_levels
, insn
);
5165 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5166 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5168 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5169 type
, ind_levels
, insn
);
5170 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5171 type
, ind_levels
, insn
);
5174 else if (code0
== CONST_INT
|| code0
== CONST
5175 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5176 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5177 type
, ind_levels
, insn
);
5179 else if (code1
== CONST_INT
|| code1
== CONST
5180 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5181 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5182 type
, ind_levels
, insn
);
5184 else if (code0
== REG
&& code1
== REG
)
5186 if (REG_OK_FOR_INDEX_P (op0
)
5187 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5189 else if (REG_OK_FOR_INDEX_P (op1
)
5190 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5192 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5193 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5194 type
, ind_levels
, insn
);
5195 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5196 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5197 type
, ind_levels
, insn
);
5198 else if (REG_OK_FOR_INDEX_P (op1
))
5199 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5200 type
, ind_levels
, insn
);
5201 else if (REG_OK_FOR_INDEX_P (op0
))
5202 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5203 type
, ind_levels
, insn
);
5206 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5207 type
, ind_levels
, insn
);
5208 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5209 type
, ind_levels
, insn
);
5213 else if (code0
== REG
)
5215 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5216 type
, ind_levels
, insn
);
5217 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5218 type
, ind_levels
, insn
);
5221 else if (code1
== REG
)
5223 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5224 type
, ind_levels
, insn
);
5225 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5226 type
, ind_levels
, insn
);
5235 rtx op0
= XEXP (x
, 0);
5236 rtx op1
= XEXP (x
, 1);
5238 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5241 /* Currently, we only support {PRE,POST}_MODIFY constructs
5242 where a base register is {inc,dec}remented by the contents
5243 of another register or by a constant value. Thus, these
5244 operands must match. */
5245 if (op0
!= XEXP (op1
, 0))
5248 /* Require index register (or constant). Let's just handle the
5249 register case in the meantime... If the target allows
5250 auto-modify by a constant then we could try replacing a pseudo
5251 register with its equivalent constant where applicable. */
5252 if (REG_P (XEXP (op1
, 1)))
5253 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5254 find_reloads_address_1 (mode
, XEXP (op1
, 1), 1, &XEXP (op1
, 1),
5255 opnum
, type
, ind_levels
, insn
);
5257 if (REG_P (XEXP (op1
, 0)))
5259 int regno
= REGNO (XEXP (op1
, 0));
5262 /* A register that is incremented cannot be constant! */
5263 if (regno
>= FIRST_PSEUDO_REGISTER
5264 && reg_equiv_constant
[regno
] != 0)
5267 /* Handle a register that is equivalent to a memory location
5268 which cannot be addressed directly. */
5269 if (reg_equiv_memory_loc
[regno
] != 0
5270 && (reg_equiv_address
[regno
] != 0
5271 || num_not_at_initial_offset
))
5273 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5275 if (reg_equiv_address
[regno
]
5276 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5278 /* First reload the memory location's address.
5279 We can't use ADDR_TYPE (type) here, because we need to
5280 write back the value after reading it, hence we actually
5281 need two registers. */
5282 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
5283 &XEXP (tem
, 0), opnum
,
5287 /* Then reload the memory location into a base
5289 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5290 &XEXP (op1
, 0), BASE_REG_CLASS
,
5291 GET_MODE (x
), GET_MODE (x
), 0,
5292 0, opnum
, RELOAD_OTHER
);
5294 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5299 if (reg_renumber
[regno
] >= 0)
5300 regno
= reg_renumber
[regno
];
5302 /* We require a base register here... */
5303 if (!REGNO_MODE_OK_FOR_BASE_P (regno
, GET_MODE (x
)))
5305 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5306 &XEXP (op1
, 0), &XEXP (x
, 0),
5308 GET_MODE (x
), GET_MODE (x
), 0, 0,
5309 opnum
, RELOAD_OTHER
);
5311 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5324 if (GET_CODE (XEXP (x
, 0)) == REG
)
5326 register int regno
= REGNO (XEXP (x
, 0));
5330 /* A register that is incremented cannot be constant! */
5331 if (regno
>= FIRST_PSEUDO_REGISTER
5332 && reg_equiv_constant
[regno
] != 0)
5335 /* Handle a register that is equivalent to a memory location
5336 which cannot be addressed directly. */
5337 if (reg_equiv_memory_loc
[regno
] != 0
5338 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5340 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5341 if (reg_equiv_address
[regno
]
5342 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5344 /* First reload the memory location's address.
5345 We can't use ADDR_TYPE (type) here, because we need to
5346 write back the value after reading it, hence we actually
5347 need two registers. */
5348 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5349 &XEXP (tem
, 0), opnum
, type
,
5351 /* Put this inside a new increment-expression. */
5352 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5353 /* Proceed to reload that, as if it contained a register. */
5357 /* If we have a hard register that is ok as an index,
5358 don't make a reload. If an autoincrement of a nice register
5359 isn't "valid", it must be that no autoincrement is "valid".
5360 If that is true and something made an autoincrement anyway,
5361 this must be a special context where one is allowed.
5362 (For example, a "push" instruction.)
5363 We can't improve this address, so leave it alone. */
5365 /* Otherwise, reload the autoincrement into a suitable hard reg
5366 and record how much to increment by. */
5368 if (reg_renumber
[regno
] >= 0)
5369 regno
= reg_renumber
[regno
];
5370 if ((regno
>= FIRST_PSEUDO_REGISTER
5371 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5372 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5376 /* If we can output the register afterwards, do so, this
5377 saves the extra update.
5378 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5379 CALL_INSN - and it does not set CC0.
5380 But don't do this if we cannot directly address the
5381 memory location, since this will make it harder to
5382 reuse address reloads, and increases register pressure.
5383 Also don't do this if we can probably update x directly. */
5384 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5386 : reg_equiv_mem
[regno
]);
5387 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5388 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5389 && memory_operand (equiv
, GET_MODE (equiv
))
5391 && ! sets_cc0_p (PATTERN (insn
))
5393 && ! (icode
!= CODE_FOR_nothing
5394 && ((*insn_data
[icode
].operand
[0].predicate
)
5396 && ((*insn_data
[icode
].operand
[1].predicate
)
5399 /* We use the original pseudo for loc, so that
5400 emit_reload_insns() knows which pseudo this
5401 reload refers to and updates the pseudo rtx, not
5402 its equivalent memory location, as well as the
5403 corresponding entry in reg_last_reload_reg. */
5404 loc
= &XEXP (x_orig
, 0);
5407 = push_reload (x
, x
, loc
, loc
,
5408 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5409 GET_MODE (x
), GET_MODE (x
), 0, 0,
5410 opnum
, RELOAD_OTHER
);
5415 = push_reload (x
, NULL_RTX
, loc
, (rtx
*)0,
5416 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5417 GET_MODE (x
), GET_MODE (x
), 0, 0,
5420 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5425 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5431 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5433 /* This is probably the result of a substitution, by eliminate_regs,
5434 of an equivalent address for a pseudo that was not allocated to a
5435 hard register. Verify that the specified address is valid and
5436 reload it into a register. */
5437 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5438 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5442 /* Since we know we are going to reload this item, don't decrement
5443 for the indirection level.
5445 Note that this is actually conservative: it would be slightly
5446 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5448 /* We can't use ADDR_TYPE (type) here, because we need to
5449 write back the value after reading it, hence we actually
5450 need two registers. */
5451 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5452 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5453 opnum
, type
, ind_levels
, insn
);
5455 reloadnum
= push_reload (x
, NULL_RTX
, loc
, (rtx
*)0,
5456 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5457 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5459 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5461 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5463 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5470 /* This is probably the result of a substitution, by eliminate_regs, of
5471 an equivalent address for a pseudo that was not allocated to a hard
5472 register. Verify that the specified address is valid and reload it
5475 Since we know we are going to reload this item, don't decrement for
5476 the indirection level.
5478 Note that this is actually conservative: it would be slightly more
5479 efficient to use the value of SPILL_INDIRECT_LEVELS from
5482 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5483 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5484 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*)0,
5485 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5486 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5491 register int regno
= REGNO (x
);
5493 if (reg_equiv_constant
[regno
] != 0)
5495 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5496 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5497 GET_MODE (x
), opnum
, type
, ind_levels
);
5501 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5502 that feeds this insn. */
5503 if (reg_equiv_mem
[regno
] != 0)
5505 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, (rtx
*)0,
5506 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5507 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5512 if (reg_equiv_memory_loc
[regno
]
5513 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5515 rtx tem
= make_memloc (x
, regno
);
5516 if (reg_equiv_address
[regno
] != 0
5517 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5520 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5521 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5526 if (reg_renumber
[regno
] >= 0)
5527 regno
= reg_renumber
[regno
];
5529 if ((regno
>= FIRST_PSEUDO_REGISTER
5530 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5531 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5533 push_reload (x
, NULL_RTX
, loc
, (rtx
*)0,
5534 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5535 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5539 /* If a register appearing in an address is the subject of a CLOBBER
5540 in this insn, reload it into some other register to be safe.
5541 The CLOBBER is supposed to make the register unavailable
5542 from before this insn to after it. */
5543 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
5545 push_reload (x
, NULL_RTX
, loc
, (rtx
*)0,
5546 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5547 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5554 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5556 /* If this is a SUBREG of a hard register and the resulting register
5557 is of the wrong class, reload the whole SUBREG. This avoids
5558 needless copies if SUBREG_REG is multi-word. */
5559 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5561 int regno
= subreg_regno (x
);
5563 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5564 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5566 push_reload (x
, NULL_RTX
, loc
, (rtx
*)0,
5567 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5568 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5572 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5573 is larger than the class size, then reload the whole SUBREG. */
5576 enum reg_class
class = (context
? INDEX_REG_CLASS
5578 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5579 > reg_class_size
[class])
5581 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5583 push_reload (x
, NULL_RTX
, loc
, (rtx
*)0, class,
5584 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5596 register const char *fmt
= GET_RTX_FORMAT (code
);
5599 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5602 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5603 opnum
, type
, ind_levels
, insn
);
5610 /* X, which is found at *LOC, is a part of an address that needs to be
5611 reloaded into a register of class CLASS. If X is a constant, or if
5612 X is a PLUS that contains a constant, check that the constant is a
5613 legitimate operand and that we are supposed to be able to load
5614 it into the register.
5616 If not, force the constant into memory and reload the MEM instead.
5618 MODE is the mode to use, in case X is an integer constant.
5620 OPNUM and TYPE describe the purpose of any reloads made.
5622 IND_LEVELS says how many levels of indirect addressing this machine
5626 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5629 enum reg_class
class;
5630 enum machine_mode mode
;
5632 enum reload_type type
;
5636 && (! LEGITIMATE_CONSTANT_P (x
)
5637 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5641 tem
= x
= force_const_mem (mode
, x
);
5642 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5643 opnum
, type
, ind_levels
, 0);
5646 else if (GET_CODE (x
) == PLUS
5647 && CONSTANT_P (XEXP (x
, 1))
5648 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5649 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5653 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5654 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5655 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5656 opnum
, type
, ind_levels
, 0);
5659 push_reload (x
, NULL_RTX
, loc
, (rtx
*)0, class,
5660 mode
, VOIDmode
, 0, 0, opnum
, type
);
5663 /* X, a subreg of a pseudo, is a part of an address that needs to be
5666 If the pseudo is equivalent to a memory location that cannot be directly
5667 addressed, make the necessary address reloads.
5669 If address reloads have been necessary, or if the address is changed
5670 by register elimination, return the rtx of the memory location;
5671 otherwise, return X.
5673 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5676 OPNUM and TYPE identify the purpose of the reload.
5678 IND_LEVELS says how many levels of indirect addressing are
5679 supported at this point in the address.
5681 INSN, if nonzero, is the insn in which we do the reload. It is used
5682 to determine where to put USEs for pseudos that we have to replace with
5686 find_reloads_subreg_address (x
, force_replace
, opnum
, type
,
5691 enum reload_type type
;
5695 int regno
= REGNO (SUBREG_REG (x
));
5697 if (reg_equiv_memory_loc
[regno
])
5699 /* If the address is not directly addressable, or if the address is not
5700 offsettable, then it must be replaced. */
5702 && (reg_equiv_address
[regno
]
5703 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5706 if (force_replace
|| num_not_at_initial_offset
)
5708 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5710 /* If the address changes because of register elimination, then
5711 it must be replaced. */
5713 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5715 int offset
= SUBREG_BYTE (x
);
5716 unsigned outer_size
= GET_MODE_SIZE (GET_MODE (x
));
5717 unsigned inner_size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5719 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5720 PUT_MODE (tem
, GET_MODE (x
));
5722 /* If this was a paradoxical subreg that we replaced, the
5723 resulting memory must be sufficiently aligned to allow
5724 us to widen the mode of the memory. */
5725 if (outer_size
> inner_size
&& STRICT_ALIGNMENT
)
5729 base
= XEXP (tem
, 0);
5730 if (GET_CODE (base
) == PLUS
)
5732 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
5733 && INTVAL (XEXP (base
, 1)) % outer_size
!= 0)
5735 base
= XEXP (base
, 0);
5737 if (GET_CODE (base
) != REG
5738 || (REGNO_POINTER_ALIGN (REGNO (base
))
5739 < outer_size
* BITS_PER_UNIT
))
5743 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5744 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5747 /* If this is not a toplevel operand, find_reloads doesn't see
5748 this substitution. We have to emit a USE of the pseudo so
5749 that delete_output_reload can see it. */
5750 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5751 emit_insn_before (gen_rtx_USE (VOIDmode
, SUBREG_REG (x
)), insn
);
5759 /* Substitute into the current INSN the registers into which we have reloaded
5760 the things that need reloading. The array `replacements'
5761 contains the locations of all pointers that must be changed
5762 and says what to replace them with.
5764 Return the rtx that X translates into; usually X, but modified. */
5767 subst_reloads (insn
)
5772 for (i
= 0; i
< n_replacements
; i
++)
5774 register struct replacement
*r
= &replacements
[i
];
5775 register rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5778 #ifdef ENABLE_CHECKING
5779 /* Internal consistency test. Check that we don't modify
5780 anything in the equivalence arrays. Whenever something from
5781 those arrays needs to be reloaded, it must be unshared before
5782 being substituted into; the equivalence must not be modified.
5783 Otherwise, if the equivalence is used after that, it will
5784 have been modified, and the thing substituted (probably a
5785 register) is likely overwritten and not a usable equivalence. */
5788 for (check_regno
= 0; check_regno
< max_regno
; check_regno
++)
5790 #define CHECK_MODF(ARRAY) \
5791 if (ARRAY[check_regno] \
5792 && loc_mentioned_in_p (r->where, \
5793 ARRAY[check_regno])) \
5796 CHECK_MODF (reg_equiv_constant
);
5797 CHECK_MODF (reg_equiv_memory_loc
);
5798 CHECK_MODF (reg_equiv_address
);
5799 CHECK_MODF (reg_equiv_mem
);
5802 #endif /* ENABLE_CHECKING */
5804 /* If we're replacing a LABEL_REF with a register, add a
5805 REG_LABEL note to indicate to flow which label this
5806 register refers to. */
5807 if (GET_CODE (*r
->where
) == LABEL_REF
5808 && GET_CODE (insn
) == JUMP_INSN
)
5809 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
,
5810 XEXP (*r
->where
, 0),
5813 /* Encapsulate RELOADREG so its machine mode matches what
5814 used to be there. Note that gen_lowpart_common will
5815 do the wrong thing if RELOADREG is multi-word. RELOADREG
5816 will always be a REG here. */
5817 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5818 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5820 /* If we are putting this into a SUBREG and RELOADREG is a
5821 SUBREG, we would be making nested SUBREGs, so we have to fix
5822 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5824 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5826 if (GET_MODE (*r
->subreg_loc
)
5827 == GET_MODE (SUBREG_REG (reloadreg
)))
5828 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5832 SUBREG_BYTE (*r
->subreg_loc
) + SUBREG_BYTE (reloadreg
);
5834 /* When working with SUBREGs the rule is that the byte
5835 offset must be a multiple of the SUBREG's mode. */
5836 final_offset
= (final_offset
/
5837 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
5838 final_offset
= (final_offset
*
5839 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
5841 *r
->where
= SUBREG_REG (reloadreg
);
5842 SUBREG_BYTE (*r
->subreg_loc
) = final_offset
;
5846 *r
->where
= reloadreg
;
5848 /* If reload got no reg and isn't optional, something's wrong. */
5849 else if (! rld
[r
->what
].optional
)
5854 /* Make a copy of any replacements being done into X and move those copies
5855 to locations in Y, a copy of X. We only look at the highest level of
5859 copy_replacements (x
, y
)
5864 enum rtx_code code
= GET_CODE (x
);
5865 const char *fmt
= GET_RTX_FORMAT (code
);
5866 struct replacement
*r
;
5868 /* We can't support X being a SUBREG because we might then need to know its
5869 location if something inside it was replaced. */
5873 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5875 for (j
= 0; j
< n_replacements
; j
++)
5877 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
5879 r
= &replacements
[n_replacements
++];
5880 r
->where
= replacements
[j
].where
;
5881 r
->subreg_loc
= &XEXP (y
, i
);
5882 r
->what
= replacements
[j
].what
;
5883 r
->mode
= replacements
[j
].mode
;
5885 else if (replacements
[j
].where
== &XEXP (x
, i
))
5887 r
= &replacements
[n_replacements
++];
5888 r
->where
= &XEXP (y
, i
);
5890 r
->what
= replacements
[j
].what
;
5891 r
->mode
= replacements
[j
].mode
;
5896 /* Change any replacements being done to *X to be done to *Y */
5899 move_replacements (x
, y
)
5905 for (i
= 0; i
< n_replacements
; i
++)
5906 if (replacements
[i
].subreg_loc
== x
)
5907 replacements
[i
].subreg_loc
= y
;
5908 else if (replacements
[i
].where
== x
)
5910 replacements
[i
].where
= y
;
5911 replacements
[i
].subreg_loc
= 0;
5915 /* If LOC was scheduled to be replaced by something, return the replacement.
5916 Otherwise, return *LOC. */
5919 find_replacement (loc
)
5922 struct replacement
*r
;
5924 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
5926 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5928 if (reloadreg
&& r
->where
== loc
)
5930 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
5931 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5935 else if (reloadreg
&& r
->subreg_loc
== loc
)
5937 /* RELOADREG must be either a REG or a SUBREG.
5939 ??? Is it actually still ever a SUBREG? If so, why? */
5941 if (GET_CODE (reloadreg
) == REG
)
5942 return gen_rtx_REG (GET_MODE (*loc
),
5943 (REGNO (reloadreg
) +
5944 subreg_regno_offset (REGNO (SUBREG_REG (*loc
)),
5945 GET_MODE (SUBREG_REG (*loc
)),
5948 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
5952 int final_offset
= SUBREG_BYTE (reloadreg
) + SUBREG_BYTE (*loc
);
5954 /* When working with SUBREGs the rule is that the byte
5955 offset must be a multiple of the SUBREG's mode. */
5956 final_offset
= (final_offset
/ GET_MODE_SIZE (GET_MODE (*loc
)));
5957 final_offset
= (final_offset
* GET_MODE_SIZE (GET_MODE (*loc
)));
5958 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
5964 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5965 what's inside and make a new rtl if so. */
5966 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
5967 || GET_CODE (*loc
) == MULT
)
5969 rtx x
= find_replacement (&XEXP (*loc
, 0));
5970 rtx y
= find_replacement (&XEXP (*loc
, 1));
5972 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
5973 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
5979 /* Return nonzero if register in range [REGNO, ENDREGNO)
5980 appears either explicitly or implicitly in X
5981 other than being stored into (except for earlyclobber operands).
5983 References contained within the substructure at LOC do not count.
5984 LOC may be zero, meaning don't ignore anything.
5986 This is similar to refers_to_regno_p in rtlanal.c except that we
5987 look at equivalences for pseudos that didn't get hard registers. */
5990 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
5991 unsigned int regno
, endregno
;
6004 code
= GET_CODE (x
);
6011 /* If this is a pseudo, a hard register must not have been allocated.
6012 X must therefore either be a constant or be in memory. */
6013 if (r
>= FIRST_PSEUDO_REGISTER
)
6015 if (reg_equiv_memory_loc
[r
])
6016 return refers_to_regno_for_reload_p (regno
, endregno
,
6017 reg_equiv_memory_loc
[r
],
6020 if (reg_equiv_constant
[r
])
6026 return (endregno
> r
6027 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
6028 ? HARD_REGNO_NREGS (r
, GET_MODE (x
))
6032 /* If this is a SUBREG of a hard reg, we can see exactly which
6033 registers are being modified. Otherwise, handle normally. */
6034 if (GET_CODE (SUBREG_REG (x
)) == REG
6035 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6037 unsigned int inner_regno
= subreg_regno (x
);
6038 unsigned int inner_endregno
6039 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6040 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6042 return endregno
> inner_regno
&& regno
< inner_endregno
;
6048 if (&SET_DEST (x
) != loc
6049 /* Note setting a SUBREG counts as referring to the REG it is in for
6050 a pseudo but not for hard registers since we can
6051 treat each word individually. */
6052 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6053 && loc
!= &SUBREG_REG (SET_DEST (x
))
6054 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
6055 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6056 && refers_to_regno_for_reload_p (regno
, endregno
,
6057 SUBREG_REG (SET_DEST (x
)),
6059 /* If the output is an earlyclobber operand, this is
6061 || ((GET_CODE (SET_DEST (x
)) != REG
6062 || earlyclobber_operand_p (SET_DEST (x
)))
6063 && refers_to_regno_for_reload_p (regno
, endregno
,
6064 SET_DEST (x
), loc
))))
6067 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6076 /* X does not match, so try its subexpressions. */
6078 fmt
= GET_RTX_FORMAT (code
);
6079 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6081 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6089 if (refers_to_regno_for_reload_p (regno
, endregno
,
6093 else if (fmt
[i
] == 'E')
6096 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6097 if (loc
!= &XVECEXP (x
, i
, j
)
6098 && refers_to_regno_for_reload_p (regno
, endregno
,
6099 XVECEXP (x
, i
, j
), loc
))
6106 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6107 we check if any register number in X conflicts with the relevant register
6108 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6109 contains a MEM (we don't bother checking for memory addresses that can't
6110 conflict because we expect this to be a rare case.
6112 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6113 that we look at equivalences for pseudos that didn't get hard registers. */
6116 reg_overlap_mentioned_for_reload_p (x
, in
)
6119 int regno
, endregno
;
6121 /* Overly conservative. */
6122 if (GET_CODE (x
) == STRICT_LOW_PART
)
6125 /* If either argument is a constant, then modifying X can not affect IN. */
6126 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6128 else if (GET_CODE (x
) == SUBREG
)
6130 regno
= REGNO (SUBREG_REG (x
));
6131 if (regno
< FIRST_PSEUDO_REGISTER
)
6132 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6133 GET_MODE (SUBREG_REG (x
)),
6137 else if (GET_CODE (x
) == REG
)
6141 /* If this is a pseudo, it must not have been assigned a hard register.
6142 Therefore, it must either be in memory or be a constant. */
6144 if (regno
>= FIRST_PSEUDO_REGISTER
)
6146 if (reg_equiv_memory_loc
[regno
])
6147 return refers_to_mem_for_reload_p (in
);
6148 else if (reg_equiv_constant
[regno
])
6153 else if (GET_CODE (x
) == MEM
)
6154 return refers_to_mem_for_reload_p (in
);
6155 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6156 || GET_CODE (x
) == CC0
)
6157 return reg_mentioned_p (x
, in
);
6161 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6162 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6164 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*)0);
6167 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6171 refers_to_mem_for_reload_p (x
)
6177 if (GET_CODE (x
) == MEM
)
6180 if (GET_CODE (x
) == REG
)
6181 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6182 && reg_equiv_memory_loc
[REGNO (x
)]);
6184 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6185 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6187 && (GET_CODE (XEXP (x
, i
)) == MEM
6188 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6194 /* Check the insns before INSN to see if there is a suitable register
6195 containing the same value as GOAL.
6196 If OTHER is -1, look for a register in class CLASS.
6197 Otherwise, just see if register number OTHER shares GOAL's value.
6199 Return an rtx for the register found, or zero if none is found.
6201 If RELOAD_REG_P is (short *)1,
6202 we reject any hard reg that appears in reload_reg_rtx
6203 because such a hard reg is also needed coming into this insn.
6205 If RELOAD_REG_P is any other nonzero value,
6206 it is a vector indexed by hard reg number
6207 and we reject any hard reg whose element in the vector is nonnegative
6208 as well as any that appears in reload_reg_rtx.
6210 If GOAL is zero, then GOALREG is a register number; we look
6211 for an equivalent for that register.
6213 MODE is the machine mode of the value we want an equivalence for.
6214 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6216 This function is used by jump.c as well as in the reload pass.
6218 If GOAL is the sum of the stack pointer and a constant, we treat it
6219 as if it were a constant except that sp is required to be unchanging. */
6222 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
6225 enum reg_class
class;
6227 short *reload_reg_p
;
6229 enum machine_mode mode
;
6231 register rtx p
= insn
;
6232 rtx goaltry
, valtry
, value
, where
;
6234 register int regno
= -1;
6238 int goal_mem_addr_varies
= 0;
6239 int need_stable_sp
= 0;
6245 else if (GET_CODE (goal
) == REG
)
6246 regno
= REGNO (goal
);
6247 else if (GET_CODE (goal
) == MEM
)
6249 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6250 if (MEM_VOLATILE_P (goal
))
6252 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
6254 /* An address with side effects must be reexecuted. */
6269 else if (CONSTANT_P (goal
))
6271 else if (GET_CODE (goal
) == PLUS
6272 && XEXP (goal
, 0) == stack_pointer_rtx
6273 && CONSTANT_P (XEXP (goal
, 1)))
6274 goal_const
= need_stable_sp
= 1;
6275 else if (GET_CODE (goal
) == PLUS
6276 && XEXP (goal
, 0) == frame_pointer_rtx
6277 && CONSTANT_P (XEXP (goal
, 1)))
6282 /* Scan insns back from INSN, looking for one that copies
6283 a value into or out of GOAL.
6284 Stop and give up if we reach a label. */
6289 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
6292 if (GET_CODE (p
) == INSN
6293 /* If we don't want spill regs ... */
6294 && (! (reload_reg_p
!= 0
6295 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6296 /* ... then ignore insns introduced by reload; they aren't
6297 useful and can cause results in reload_as_needed to be
6298 different from what they were when calculating the need for
6299 spills. If we notice an input-reload insn here, we will
6300 reject it below, but it might hide a usable equivalent.
6301 That makes bad code. It may even abort: perhaps no reg was
6302 spilled for this insn because it was assumed we would find
6304 || INSN_UID (p
) < reload_first_uid
))
6307 pat
= single_set (p
);
6309 /* First check for something that sets some reg equal to GOAL. */
6312 && true_regnum (SET_SRC (pat
)) == regno
6313 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6316 && true_regnum (SET_DEST (pat
)) == regno
6317 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6319 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6320 /* When looking for stack pointer + const,
6321 make sure we don't use a stack adjust. */
6322 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6323 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6325 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6326 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6328 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6329 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6330 /* If we are looking for a constant,
6331 and something equivalent to that constant was copied
6332 into a reg, we can use that reg. */
6333 || (goal_const
&& REG_NOTES (p
) != 0
6334 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6335 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6337 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6338 || (GET_CODE (SET_DEST (pat
)) == REG
6339 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6340 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6342 && GET_CODE (goal
) == CONST_INT
6344 = operand_subword (XEXP (tem
, 0), 0, 0,
6346 && rtx_equal_p (goal
, goaltry
)
6348 = operand_subword (SET_DEST (pat
), 0, 0,
6350 && (valueno
= true_regnum (valtry
)) >= 0)))
6351 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6353 && GET_CODE (SET_DEST (pat
)) == REG
6354 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6355 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6357 && GET_CODE (goal
) == CONST_INT
6358 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6360 && rtx_equal_p (goal
, goaltry
)
6362 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6363 && (valueno
= true_regnum (valtry
)) >= 0)))
6367 if (valueno
!= other
)
6370 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6376 for (i
= HARD_REGNO_NREGS (valueno
, mode
) - 1; i
>= 0; i
--)
6377 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6390 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6391 (or copying VALUE into GOAL, if GOAL is also a register).
6392 Now verify that VALUE is really valid. */
6394 /* VALUENO is the register number of VALUE; a hard register. */
6396 /* Don't try to re-use something that is killed in this insn. We want
6397 to be able to trust REG_UNUSED notes. */
6398 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6401 /* If we propose to get the value from the stack pointer or if GOAL is
6402 a MEM based on the stack pointer, we need a stable SP. */
6403 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6404 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6408 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6409 if (GET_MODE (value
) != mode
)
6412 /* Reject VALUE if it was loaded from GOAL
6413 and is also a register that appears in the address of GOAL. */
6415 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6416 && refers_to_regno_for_reload_p (valueno
,
6418 + HARD_REGNO_NREGS (valueno
, mode
)),
6422 /* Reject registers that overlap GOAL. */
6424 if (!goal_mem
&& !goal_const
6425 && regno
+ (int) HARD_REGNO_NREGS (regno
, mode
) > valueno
6426 && regno
< valueno
+ (int) HARD_REGNO_NREGS (valueno
, mode
))
6429 nregs
= HARD_REGNO_NREGS (regno
, mode
);
6430 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
6432 /* Reject VALUE if it is one of the regs reserved for reloads.
6433 Reload1 knows how to reuse them anyway, and it would get
6434 confused if we allocated one without its knowledge.
6435 (Now that insns introduced by reload are ignored above,
6436 this case shouldn't happen, but I'm not positive.) */
6438 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6441 for (i
= 0; i
< valuenregs
; ++i
)
6442 if (reload_reg_p
[valueno
+ i
] >= 0)
6446 /* Reject VALUE if it is a register being used for an input reload
6447 even if it is not one of those reserved. */
6449 if (reload_reg_p
!= 0)
6452 for (i
= 0; i
< n_reloads
; i
++)
6453 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6455 int regno1
= REGNO (rld
[i
].reg_rtx
);
6456 int nregs1
= HARD_REGNO_NREGS (regno1
,
6457 GET_MODE (rld
[i
].reg_rtx
));
6458 if (regno1
< valueno
+ valuenregs
6459 && regno1
+ nregs1
> valueno
)
6465 /* We must treat frame pointer as varying here,
6466 since it can vary--in a nonlocal goto as generated by expand_goto. */
6467 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6469 /* Now verify that the values of GOAL and VALUE remain unaltered
6470 until INSN is reached. */
6479 /* Don't trust the conversion past a function call
6480 if either of the two is in a call-clobbered register, or memory. */
6481 if (GET_CODE (p
) == CALL_INSN
)
6485 if (goal_mem
|| need_stable_sp
)
6488 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6489 for (i
= 0; i
< nregs
; ++i
)
6490 if (call_used_regs
[regno
+ i
])
6493 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6494 for (i
= 0; i
< valuenregs
; ++i
)
6495 if (call_used_regs
[valueno
+ i
])
6497 #ifdef NON_SAVING_SETJMP
6498 if (NON_SAVING_SETJMP
&& find_reg_note (p
, REG_SETJMP
, NULL
))
6507 /* Watch out for unspec_volatile, and volatile asms. */
6508 if (volatile_insn_p (pat
))
6511 /* If this insn P stores in either GOAL or VALUE, return 0.
6512 If GOAL is a memory ref and this insn writes memory, return 0.
6513 If GOAL is a memory ref and its address is not constant,
6514 and this insn P changes a register used in GOAL, return 0. */
6516 if (GET_CODE (pat
) == COND_EXEC
)
6517 pat
= COND_EXEC_CODE (pat
);
6518 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6520 register rtx dest
= SET_DEST (pat
);
6521 while (GET_CODE (dest
) == SUBREG
6522 || GET_CODE (dest
) == ZERO_EXTRACT
6523 || GET_CODE (dest
) == SIGN_EXTRACT
6524 || GET_CODE (dest
) == STRICT_LOW_PART
)
6525 dest
= XEXP (dest
, 0);
6526 if (GET_CODE (dest
) == REG
)
6528 register int xregno
= REGNO (dest
);
6530 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6531 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6534 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6536 if (xregno
< valueno
+ valuenregs
6537 && xregno
+ xnregs
> valueno
)
6539 if (goal_mem_addr_varies
6540 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6542 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6545 else if (goal_mem
&& GET_CODE (dest
) == MEM
6546 && ! push_operand (dest
, GET_MODE (dest
)))
6548 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6549 && reg_equiv_memory_loc
[regno
] != 0)
6551 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6554 else if (GET_CODE (pat
) == PARALLEL
)
6557 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6559 register rtx v1
= XVECEXP (pat
, 0, i
);
6560 if (GET_CODE (v1
) == COND_EXEC
)
6561 v1
= COND_EXEC_CODE (v1
);
6562 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6564 register rtx dest
= SET_DEST (v1
);
6565 while (GET_CODE (dest
) == SUBREG
6566 || GET_CODE (dest
) == ZERO_EXTRACT
6567 || GET_CODE (dest
) == SIGN_EXTRACT
6568 || GET_CODE (dest
) == STRICT_LOW_PART
)
6569 dest
= XEXP (dest
, 0);
6570 if (GET_CODE (dest
) == REG
)
6572 register int xregno
= REGNO (dest
);
6574 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6575 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6578 if (xregno
< regno
+ nregs
6579 && xregno
+ xnregs
> regno
)
6581 if (xregno
< valueno
+ valuenregs
6582 && xregno
+ xnregs
> valueno
)
6584 if (goal_mem_addr_varies
6585 && reg_overlap_mentioned_for_reload_p (dest
,
6588 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6591 else if (goal_mem
&& GET_CODE (dest
) == MEM
6592 && ! push_operand (dest
, GET_MODE (dest
)))
6594 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6595 && reg_equiv_memory_loc
[regno
] != 0)
6597 else if (need_stable_sp
6598 && push_operand (dest
, GET_MODE (dest
)))
6604 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6608 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6609 link
= XEXP (link
, 1))
6611 pat
= XEXP (link
, 0);
6612 if (GET_CODE (pat
) == CLOBBER
)
6614 register rtx dest
= SET_DEST (pat
);
6616 if (GET_CODE (dest
) == REG
)
6618 register int xregno
= REGNO (dest
);
6620 = HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6622 if (xregno
< regno
+ nregs
6623 && xregno
+ xnregs
> regno
)
6625 else if (xregno
< valueno
+ valuenregs
6626 && xregno
+ xnregs
> valueno
)
6628 else if (goal_mem_addr_varies
6629 && reg_overlap_mentioned_for_reload_p (dest
,
6634 else if (goal_mem
&& GET_CODE (dest
) == MEM
6635 && ! push_operand (dest
, GET_MODE (dest
)))
6637 else if (need_stable_sp
6638 && push_operand (dest
, GET_MODE (dest
)))
6645 /* If this insn auto-increments or auto-decrements
6646 either regno or valueno, return 0 now.
6647 If GOAL is a memory ref and its address is not constant,
6648 and this insn P increments a register used in GOAL, return 0. */
6652 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6653 if (REG_NOTE_KIND (link
) == REG_INC
6654 && GET_CODE (XEXP (link
, 0)) == REG
)
6656 register int incno
= REGNO (XEXP (link
, 0));
6657 if (incno
< regno
+ nregs
&& incno
>= regno
)
6659 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6661 if (goal_mem_addr_varies
6662 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6672 /* Find a place where INCED appears in an increment or decrement operator
6673 within X, and return the amount INCED is incremented or decremented by.
6674 The value is always positive. */
6677 find_inc_amount (x
, inced
)
6680 register enum rtx_code code
= GET_CODE (x
);
6681 register const char *fmt
;
6686 register rtx addr
= XEXP (x
, 0);
6687 if ((GET_CODE (addr
) == PRE_DEC
6688 || GET_CODE (addr
) == POST_DEC
6689 || GET_CODE (addr
) == PRE_INC
6690 || GET_CODE (addr
) == POST_INC
)
6691 && XEXP (addr
, 0) == inced
)
6692 return GET_MODE_SIZE (GET_MODE (x
));
6693 else if ((GET_CODE (addr
) == PRE_MODIFY
6694 || GET_CODE (addr
) == POST_MODIFY
)
6695 && GET_CODE (XEXP (addr
, 1)) == PLUS
6696 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
6697 && XEXP (addr
, 0) == inced
6698 && GET_CODE (XEXP (XEXP (addr
, 1), 1)) == CONST_INT
)
6700 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
6701 return i
< 0 ? -i
: i
;
6705 fmt
= GET_RTX_FORMAT (code
);
6706 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6710 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6717 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6719 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6729 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6730 If SETS is nonzero, also consider SETs. */
6733 regno_clobbered_p (regno
, insn
, mode
, sets
)
6736 enum machine_mode mode
;
6739 unsigned int nregs
= HARD_REGNO_NREGS (regno
, mode
);
6740 unsigned int endregno
= regno
+ nregs
;
6742 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
6743 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6744 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6746 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
6748 return test
>= regno
&& test
< endregno
;
6751 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6753 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6757 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6758 if ((GET_CODE (elt
) == CLOBBER
6759 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6760 && GET_CODE (XEXP (elt
, 0)) == REG
)
6762 unsigned int test
= REGNO (XEXP (elt
, 0));
6764 if (test
>= regno
&& test
< endregno
)
6773 static const char *reload_when_needed_name
[] =
6776 "RELOAD_FOR_OUTPUT",
6778 "RELOAD_FOR_INPUT_ADDRESS",
6779 "RELOAD_FOR_INPADDR_ADDRESS",
6780 "RELOAD_FOR_OUTPUT_ADDRESS",
6781 "RELOAD_FOR_OUTADDR_ADDRESS",
6782 "RELOAD_FOR_OPERAND_ADDRESS",
6783 "RELOAD_FOR_OPADDR_ADDR",
6785 "RELOAD_FOR_OTHER_ADDRESS"
6788 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
6790 /* These functions are used to print the variables set by 'find_reloads' */
6793 debug_reload_to_stream (f
)
6801 for (r
= 0; r
< n_reloads
; r
++)
6803 fprintf (f
, "Reload %d: ", r
);
6807 fprintf (f
, "reload_in (%s) = ",
6808 GET_MODE_NAME (rld
[r
].inmode
));
6809 print_inline_rtx (f
, rld
[r
].in
, 24);
6810 fprintf (f
, "\n\t");
6813 if (rld
[r
].out
!= 0)
6815 fprintf (f
, "reload_out (%s) = ",
6816 GET_MODE_NAME (rld
[r
].outmode
));
6817 print_inline_rtx (f
, rld
[r
].out
, 24);
6818 fprintf (f
, "\n\t");
6821 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
6823 fprintf (f
, "%s (opnum = %d)",
6824 reload_when_needed_name
[(int) rld
[r
].when_needed
],
6827 if (rld
[r
].optional
)
6828 fprintf (f
, ", optional");
6830 if (rld
[r
].nongroup
)
6831 fprintf (f
, ", nongroup");
6833 if (rld
[r
].inc
!= 0)
6834 fprintf (f
, ", inc by %d", rld
[r
].inc
);
6836 if (rld
[r
].nocombine
)
6837 fprintf (f
, ", can't combine");
6839 if (rld
[r
].secondary_p
)
6840 fprintf (f
, ", secondary_reload_p");
6842 if (rld
[r
].in_reg
!= 0)
6844 fprintf (f
, "\n\treload_in_reg: ");
6845 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
6848 if (rld
[r
].out_reg
!= 0)
6850 fprintf (f
, "\n\treload_out_reg: ");
6851 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
6854 if (rld
[r
].reg_rtx
!= 0)
6856 fprintf (f
, "\n\treload_reg_rtx: ");
6857 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
6861 if (rld
[r
].secondary_in_reload
!= -1)
6863 fprintf (f
, "%ssecondary_in_reload = %d",
6864 prefix
, rld
[r
].secondary_in_reload
);
6868 if (rld
[r
].secondary_out_reload
!= -1)
6869 fprintf (f
, "%ssecondary_out_reload = %d\n",
6870 prefix
, rld
[r
].secondary_out_reload
);
6873 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
6875 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
6876 insn_data
[rld
[r
].secondary_in_icode
].name
);
6880 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
6881 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
6882 insn_data
[rld
[r
].secondary_out_icode
].name
);
6891 debug_reload_to_stream (stderr
);