1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
93 #include "insn-config.h"
97 #include "hard-reg-set.h"
101 #include "function.h"
105 #ifndef REGISTER_MOVE_COST
106 #define REGISTER_MOVE_COST(m, x, y) 2
109 #ifndef REGNO_MODE_OK_FOR_BASE_P
110 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
113 #ifndef REG_MODE_OK_FOR_BASE_P
114 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
117 /* All reloads of the current insn are recorded here. See reload.h for
120 struct reload rld
[MAX_RELOADS
];
122 /* All the "earlyclobber" operands of the current insn
123 are recorded here. */
125 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
127 int reload_n_operands
;
129 /* Replacing reloads.
131 If `replace_reloads' is nonzero, then as each reload is recorded
132 an entry is made for it in the table `replacements'.
133 Then later `subst_reloads' can look through that table and
134 perform all the replacements needed. */
136 /* Nonzero means record the places to replace. */
137 static int replace_reloads
;
139 /* Each replacement is recorded with a structure like this. */
142 rtx
*where
; /* Location to store in */
143 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
144 a SUBREG; 0 otherwise. */
145 int what
; /* which reload this is for */
146 enum machine_mode mode
; /* mode it must have */
149 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
151 /* Number of replacements currently recorded. */
152 static int n_replacements
;
154 /* Used to track what is modified by an operand. */
157 int reg_flag
; /* Nonzero if referencing a register. */
158 int safe
; /* Nonzero if this can't conflict with anything. */
159 rtx base
; /* Base address for MEM. */
160 HOST_WIDE_INT start
; /* Starting offset or register number. */
161 HOST_WIDE_INT end
; /* Ending offset or register number. */
164 #ifdef SECONDARY_MEMORY_NEEDED
166 /* Save MEMs needed to copy from one class of registers to another. One MEM
167 is used per mode, but normally only one or two modes are ever used.
169 We keep two versions, before and after register elimination. The one
170 after register elimination is record separately for each operand. This
171 is done in case the address is not valid to be sure that we separately
174 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
175 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
178 /* The instruction we are doing reloads for;
179 so we can test whether a register dies in it. */
180 static rtx this_insn
;
182 /* Nonzero if this instruction is a user-specified asm with operands. */
183 static int this_insn_is_asm
;
185 /* If hard_regs_live_known is nonzero,
186 we can tell which hard regs are currently live,
187 at least enough to succeed in choosing dummy reloads. */
188 static int hard_regs_live_known
;
190 /* Indexed by hard reg number,
191 element is nonnegative if hard reg has been spilled.
192 This vector is passed to `find_reloads' as an argument
193 and is not changed here. */
194 static short *static_reload_reg_p
;
196 /* Set to 1 in subst_reg_equivs if it changes anything. */
197 static int subst_reg_equivs_changed
;
199 /* On return from push_reload, holds the reload-number for the OUT
200 operand, which can be different for that from the input operand. */
201 static int output_reloadnum
;
203 /* Compare two RTX's. */
204 #define MATCHES(x, y) \
205 (x == y || (x != 0 && (GET_CODE (x) == REG \
206 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
207 : rtx_equal_p (x, y) && ! side_effects_p (x))))
209 /* Indicates if two reloads purposes are for similar enough things that we
210 can merge their reloads. */
211 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
212 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
213 || ((when1) == (when2) && (op1) == (op2)) \
214 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
215 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
216 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
217 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
218 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
220 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
221 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
222 ((when1) != (when2) \
223 || ! ((op1) == (op2) \
224 || (when1) == RELOAD_FOR_INPUT \
225 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
226 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
228 /* If we are going to reload an address, compute the reload type to
230 #define ADDR_TYPE(type) \
231 ((type) == RELOAD_FOR_INPUT_ADDRESS \
232 ? RELOAD_FOR_INPADDR_ADDRESS \
233 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
234 ? RELOAD_FOR_OUTADDR_ADDRESS \
237 #ifdef HAVE_SECONDARY_RELOADS
238 static int push_secondary_reload
PARAMS ((int, rtx
, int, int, enum reg_class
,
239 enum machine_mode
, enum reload_type
,
242 static enum reg_class find_valid_class
PARAMS ((enum machine_mode
, int));
243 static int reload_inner_reg_of_subreg
PARAMS ((rtx
, enum machine_mode
));
244 static int push_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
245 enum machine_mode
, enum machine_mode
,
246 int, int, int, enum reload_type
));
247 static void push_replacement
PARAMS ((rtx
*, int, enum machine_mode
));
248 static void combine_reloads
PARAMS ((void));
249 static int find_reusable_reload
PARAMS ((rtx
*, rtx
, enum reg_class
,
250 enum reload_type
, int, int));
251 static rtx find_dummy_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*,
252 enum machine_mode
, enum machine_mode
,
253 enum reg_class
, int, int));
254 static int hard_reg_set_here_p
PARAMS ((unsigned int, unsigned int, rtx
));
255 static struct decomposition decompose
PARAMS ((rtx
));
256 static int immune_p
PARAMS ((rtx
, rtx
, struct decomposition
));
257 static int alternative_allows_memconst
PARAMS ((const char *, int));
258 static rtx find_reloads_toplev
PARAMS ((rtx
, int, enum reload_type
, int,
260 static rtx make_memloc
PARAMS ((rtx
, int));
261 static int find_reloads_address
PARAMS ((enum machine_mode
, rtx
*, rtx
, rtx
*,
262 int, enum reload_type
, int, rtx
));
263 static rtx subst_reg_equivs
PARAMS ((rtx
, rtx
));
264 static rtx subst_indexed_address
PARAMS ((rtx
));
265 static void update_auto_inc_notes
PARAMS ((rtx
, int, int));
266 static int find_reloads_address_1
PARAMS ((enum machine_mode
, rtx
, int, rtx
*,
267 int, enum reload_type
,int, rtx
));
268 static void find_reloads_address_part
PARAMS ((rtx
, rtx
*, enum reg_class
,
269 enum machine_mode
, int,
270 enum reload_type
, int));
271 static rtx find_reloads_subreg_address
PARAMS ((rtx
, int, int, enum reload_type
,
273 static int find_inc_amount
PARAMS ((rtx
, rtx
));
275 #ifdef HAVE_SECONDARY_RELOADS
277 /* Determine if any secondary reloads are needed for loading (if IN_P is
278 non-zero) or storing (if IN_P is zero) X to or from a reload register of
279 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
280 are needed, push them.
282 Return the reload number of the secondary reload we made, or -1 if
283 we didn't need one. *PICODE is set to the insn_code to use if we do
284 need a secondary reload. */
287 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
293 enum reg_class reload_class
;
294 enum machine_mode reload_mode
;
295 enum reload_type type
;
296 enum insn_code
*picode
;
298 enum reg_class
class = NO_REGS
;
299 enum machine_mode mode
= reload_mode
;
300 enum insn_code icode
= CODE_FOR_nothing
;
301 enum reg_class t_class
= NO_REGS
;
302 enum machine_mode t_mode
= VOIDmode
;
303 enum insn_code t_icode
= CODE_FOR_nothing
;
304 enum reload_type secondary_type
;
305 int s_reload
, t_reload
= -1;
307 if (type
== RELOAD_FOR_INPUT_ADDRESS
308 || type
== RELOAD_FOR_OUTPUT_ADDRESS
309 || type
== RELOAD_FOR_INPADDR_ADDRESS
310 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
311 secondary_type
= type
;
313 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
315 *picode
= CODE_FOR_nothing
;
317 /* If X is a paradoxical SUBREG, use the inner value to determine both the
318 mode and object being reloaded. */
319 if (GET_CODE (x
) == SUBREG
320 && (GET_MODE_SIZE (GET_MODE (x
))
321 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
324 reload_mode
= GET_MODE (x
);
327 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
328 is still a pseudo-register by now, it *must* have an equivalent MEM
329 but we don't want to assume that), use that equivalent when seeing if
330 a secondary reload is needed since whether or not a reload is needed
331 might be sensitive to the form of the MEM. */
333 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
334 && reg_equiv_mem
[REGNO (x
)] != 0)
335 x
= reg_equiv_mem
[REGNO (x
)];
337 #ifdef SECONDARY_INPUT_RELOAD_CLASS
339 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
342 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
344 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
347 /* If we don't need any secondary registers, done. */
348 if (class == NO_REGS
)
351 /* Get a possible insn to use. If the predicate doesn't accept X, don't
354 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
355 : reload_out_optab
[(int) reload_mode
]);
357 if (icode
!= CODE_FOR_nothing
358 && insn_data
[(int) icode
].operand
[in_p
].predicate
359 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
360 icode
= CODE_FOR_nothing
;
362 /* If we will be using an insn, see if it can directly handle the reload
363 register we will be using. If it can, the secondary reload is for a
364 scratch register. If it can't, we will use the secondary reload for
365 an intermediate register and require a tertiary reload for the scratch
368 if (icode
!= CODE_FOR_nothing
)
370 /* If IN_P is non-zero, the reload register will be the output in
371 operand 0. If IN_P is zero, the reload register will be the input
372 in operand 1. Outputs should have an initial "=", which we must
375 enum reg_class insn_class
;
377 if (insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] == 0)
378 insn_class
= ALL_REGS
;
382 = insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
384 = (insn_letter
== 'r' ? GENERAL_REGS
385 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter
));
388 if (insn_class
== NO_REGS
390 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
391 /* The scratch register's constraint must start with "=&". */
392 || insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
393 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
396 if (reg_class_subset_p (reload_class
, insn_class
))
397 mode
= insn_data
[(int) icode
].operand
[2].mode
;
400 char t_letter
= insn_data
[(int) icode
].operand
[2].constraint
[2];
402 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
403 t_class
= (t_letter
== 'r' ? GENERAL_REGS
404 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter
));
406 icode
= CODE_FOR_nothing
;
410 /* This case isn't valid, so fail. Reload is allowed to use the same
411 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
412 in the case of a secondary register, we actually need two different
413 registers for correct code. We fail here to prevent the possibility of
414 silently generating incorrect code later.
416 The convention is that secondary input reloads are valid only if the
417 secondary_class is different from class. If you have such a case, you
418 can not use secondary reloads, you must work around the problem some
421 Allow this when a reload_in/out pattern is being used. I.e. assume
422 that the generated code handles this case. */
424 if (in_p
&& class == reload_class
&& icode
== CODE_FOR_nothing
425 && t_icode
== CODE_FOR_nothing
)
428 /* If we need a tertiary reload, see if we have one we can reuse or else
431 if (t_class
!= NO_REGS
)
433 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
434 if (rld
[t_reload
].secondary_p
435 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
436 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
437 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
438 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
439 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
440 == CODE_FOR_nothing
))
441 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
442 == CODE_FOR_nothing
)))
443 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
444 && MERGABLE_RELOADS (secondary_type
,
445 rld
[t_reload
].when_needed
,
446 opnum
, rld
[t_reload
].opnum
))
449 rld
[t_reload
].inmode
= t_mode
;
451 rld
[t_reload
].outmode
= t_mode
;
453 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
454 rld
[t_reload
].class = t_class
;
456 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
457 rld
[t_reload
].optional
&= optional
;
458 rld
[t_reload
].secondary_p
= 1;
459 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
460 opnum
, rld
[t_reload
].opnum
))
461 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
464 if (t_reload
== n_reloads
)
466 /* We need to make a new tertiary reload for this register class. */
467 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
468 rld
[t_reload
].class = t_class
;
469 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
470 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
471 rld
[t_reload
].reg_rtx
= 0;
472 rld
[t_reload
].optional
= optional
;
473 rld
[t_reload
].inc
= 0;
474 /* Maybe we could combine these, but it seems too tricky. */
475 rld
[t_reload
].nocombine
= 1;
476 rld
[t_reload
].in_reg
= 0;
477 rld
[t_reload
].out_reg
= 0;
478 rld
[t_reload
].opnum
= opnum
;
479 rld
[t_reload
].when_needed
= secondary_type
;
480 rld
[t_reload
].secondary_in_reload
= -1;
481 rld
[t_reload
].secondary_out_reload
= -1;
482 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
483 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
484 rld
[t_reload
].secondary_p
= 1;
490 /* See if we can reuse an existing secondary reload. */
491 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
492 if (rld
[s_reload
].secondary_p
493 && (reg_class_subset_p (class, rld
[s_reload
].class)
494 || reg_class_subset_p (rld
[s_reload
].class, class))
495 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
496 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
497 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
498 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
499 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
500 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
501 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
502 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
503 opnum
, rld
[s_reload
].opnum
))
506 rld
[s_reload
].inmode
= mode
;
508 rld
[s_reload
].outmode
= mode
;
510 if (reg_class_subset_p (class, rld
[s_reload
].class))
511 rld
[s_reload
].class = class;
513 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
514 rld
[s_reload
].optional
&= optional
;
515 rld
[s_reload
].secondary_p
= 1;
516 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
517 opnum
, rld
[s_reload
].opnum
))
518 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
521 if (s_reload
== n_reloads
)
523 #ifdef SECONDARY_MEMORY_NEEDED
524 /* If we need a memory location to copy between the two reload regs,
525 set it up now. Note that we do the input case before making
526 the reload and the output case after. This is due to the
527 way reloads are output. */
529 if (in_p
&& icode
== CODE_FOR_nothing
530 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
532 get_secondary_mem (x
, reload_mode
, opnum
, type
);
534 /* We may have just added new reloads. Make sure we add
535 the new reload at the end. */
536 s_reload
= n_reloads
;
540 /* We need to make a new secondary reload for this register class. */
541 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
542 rld
[s_reload
].class = class;
544 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
545 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
546 rld
[s_reload
].reg_rtx
= 0;
547 rld
[s_reload
].optional
= optional
;
548 rld
[s_reload
].inc
= 0;
549 /* Maybe we could combine these, but it seems too tricky. */
550 rld
[s_reload
].nocombine
= 1;
551 rld
[s_reload
].in_reg
= 0;
552 rld
[s_reload
].out_reg
= 0;
553 rld
[s_reload
].opnum
= opnum
;
554 rld
[s_reload
].when_needed
= secondary_type
;
555 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
556 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
557 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
558 rld
[s_reload
].secondary_out_icode
559 = ! in_p
? t_icode
: CODE_FOR_nothing
;
560 rld
[s_reload
].secondary_p
= 1;
564 #ifdef SECONDARY_MEMORY_NEEDED
565 if (! in_p
&& icode
== CODE_FOR_nothing
566 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
567 get_secondary_mem (x
, mode
, opnum
, type
);
574 #endif /* HAVE_SECONDARY_RELOADS */
576 #ifdef SECONDARY_MEMORY_NEEDED
578 /* Return a memory location that will be used to copy X in mode MODE.
579 If we haven't already made a location for this mode in this insn,
580 call find_reloads_address on the location being returned. */
583 get_secondary_mem (x
, mode
, opnum
, type
)
584 rtx x ATTRIBUTE_UNUSED
;
585 enum machine_mode mode
;
587 enum reload_type type
;
592 /* By default, if MODE is narrower than a word, widen it to a word.
593 This is required because most machines that require these memory
594 locations do not support short load and stores from all registers
595 (e.g., FP registers). */
597 #ifdef SECONDARY_MEMORY_NEEDED_MODE
598 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
600 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
601 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
604 /* If we already have made a MEM for this operand in MODE, return it. */
605 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
606 return secondary_memlocs_elim
[(int) mode
][opnum
];
608 /* If this is the first time we've tried to get a MEM for this mode,
609 allocate a new one. `something_changed' in reload will get set
610 by noticing that the frame size has changed. */
612 if (secondary_memlocs
[(int) mode
] == 0)
614 #ifdef SECONDARY_MEMORY_NEEDED_RTX
615 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
617 secondary_memlocs
[(int) mode
]
618 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
622 /* Get a version of the address doing any eliminations needed. If that
623 didn't give us a new MEM, make a new one if it isn't valid. */
625 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
626 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
628 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
629 loc
= copy_rtx (loc
);
631 /* The only time the call below will do anything is if the stack
632 offset is too large. In that case IND_LEVELS doesn't matter, so we
633 can just pass a zero. Adjust the type to be the address of the
634 corresponding object. If the address was valid, save the eliminated
635 address. If it wasn't valid, we need to make a reload each time, so
640 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
641 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
644 find_reloads_address (mode
, (rtx
*)0, XEXP (loc
, 0), &XEXP (loc
, 0),
648 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
652 /* Clear any secondary memory locations we've made. */
655 clear_secondary_mem ()
657 memset ((char *) secondary_memlocs
, 0, sizeof secondary_memlocs
);
659 #endif /* SECONDARY_MEMORY_NEEDED */
661 /* Find the largest class for which every register number plus N is valid in
662 M1 (if in range). Abort if no such class exists. */
664 static enum reg_class
665 find_valid_class (m1
, n
)
666 enum machine_mode m1 ATTRIBUTE_UNUSED
;
671 enum reg_class best_class
= NO_REGS
;
672 unsigned int best_size
= 0;
674 for (class = 1; class < N_REG_CLASSES
; class++)
677 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
678 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
679 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
680 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
683 if (! bad
&& reg_class_size
[class] > best_size
)
684 best_class
= class, best_size
= reg_class_size
[class];
693 /* Return the number of a previously made reload that can be combined with
694 a new one, or n_reloads if none of the existing reloads can be used.
695 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
696 push_reload, they determine the kind of the new reload that we try to
697 combine. P_IN points to the corresponding value of IN, which can be
698 modified by this function.
699 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
702 find_reusable_reload (p_in
, out
, class, type
, opnum
, dont_share
)
704 enum reg_class
class;
705 enum reload_type type
;
706 int opnum
, dont_share
;
710 /* We can't merge two reloads if the output of either one is
713 if (earlyclobber_operand_p (out
))
716 /* We can use an existing reload if the class is right
717 and at least one of IN and OUT is a match
718 and the other is at worst neutral.
719 (A zero compared against anything is neutral.)
721 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
722 for the same thing since that can cause us to need more reload registers
723 than we otherwise would. */
725 for (i
= 0; i
< n_reloads
; i
++)
726 if ((reg_class_subset_p (class, rld
[i
].class)
727 || reg_class_subset_p (rld
[i
].class, class))
728 /* If the existing reload has a register, it must fit our class. */
729 && (rld
[i
].reg_rtx
== 0
730 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
731 true_regnum (rld
[i
].reg_rtx
)))
732 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
733 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
734 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
735 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
736 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
737 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
738 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
741 /* Reloading a plain reg for input can match a reload to postincrement
742 that reg, since the postincrement's value is the right value.
743 Likewise, it can match a preincrement reload, since we regard
744 the preincrementation as happening before any ref in this insn
746 for (i
= 0; i
< n_reloads
; i
++)
747 if ((reg_class_subset_p (class, rld
[i
].class)
748 || reg_class_subset_p (rld
[i
].class, class))
749 /* If the existing reload has a register, it must fit our
751 && (rld
[i
].reg_rtx
== 0
752 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
753 true_regnum (rld
[i
].reg_rtx
)))
754 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
755 && ((GET_CODE (in
) == REG
756 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == 'a'
757 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
758 || (GET_CODE (rld
[i
].in
) == REG
759 && GET_RTX_CLASS (GET_CODE (in
)) == 'a'
760 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
761 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
762 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
763 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
764 opnum
, rld
[i
].opnum
))
766 /* Make sure reload_in ultimately has the increment,
767 not the plain register. */
768 if (GET_CODE (in
) == REG
)
775 /* Return nonzero if X is a SUBREG which will require reloading of its
776 SUBREG_REG expression. */
779 reload_inner_reg_of_subreg (x
, mode
)
781 enum machine_mode mode
;
785 /* Only SUBREGs are problematical. */
786 if (GET_CODE (x
) != SUBREG
)
789 inner
= SUBREG_REG (x
);
791 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
792 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
795 /* If INNER is not a hard register, then INNER will not need to
797 if (GET_CODE (inner
) != REG
798 || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
801 /* If INNER is not ok for MODE, then INNER will need reloading. */
802 if (! HARD_REGNO_MODE_OK (subreg_regno (x
), mode
))
805 /* If the outer part is a word or smaller, INNER larger than a
806 word and the number of regs for INNER is not the same as the
807 number of words in INNER, then INNER will need reloading. */
808 return (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
809 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
810 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
811 != HARD_REGNO_NREGS (REGNO (inner
), GET_MODE (inner
))));
814 /* Record one reload that needs to be performed.
815 IN is an rtx saying where the data are to be found before this instruction.
816 OUT says where they must be stored after the instruction.
817 (IN is zero for data not read, and OUT is zero for data not written.)
818 INLOC and OUTLOC point to the places in the instructions where
819 IN and OUT were found.
820 If IN and OUT are both non-zero, it means the same register must be used
821 to reload both IN and OUT.
823 CLASS is a register class required for the reloaded data.
824 INMODE is the machine mode that the instruction requires
825 for the reg that replaces IN and OUTMODE is likewise for OUT.
827 If IN is zero, then OUT's location and mode should be passed as
830 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
832 OPTIONAL nonzero means this reload does not need to be performed:
833 it can be discarded if that is more convenient.
835 OPNUM and TYPE say what the purpose of this reload is.
837 The return value is the reload-number for this reload.
839 If both IN and OUT are nonzero, in some rare cases we might
840 want to make two separate reloads. (Actually we never do this now.)
841 Therefore, the reload-number for OUT is stored in
842 output_reloadnum when we return; the return value applies to IN.
843 Usually (presently always), when IN and OUT are nonzero,
844 the two reload-numbers are equal, but the caller should be careful to
848 push_reload (in
, out
, inloc
, outloc
, class,
849 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
852 enum reg_class
class;
853 enum machine_mode inmode
, outmode
;
857 enum reload_type type
;
861 int dont_remove_subreg
= 0;
862 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
863 int secondary_in_reload
= -1, secondary_out_reload
= -1;
864 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
865 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
867 /* INMODE and/or OUTMODE could be VOIDmode if no mode
868 has been specified for the operand. In that case,
869 use the operand's mode as the mode to reload. */
870 if (inmode
== VOIDmode
&& in
!= 0)
871 inmode
= GET_MODE (in
);
872 if (outmode
== VOIDmode
&& out
!= 0)
873 outmode
= GET_MODE (out
);
875 /* If IN is a pseudo register everywhere-equivalent to a constant, and
876 it is not in a hard register, reload straight from the constant,
877 since we want to get rid of such pseudo registers.
878 Often this is done earlier, but not always in find_reloads_address. */
879 if (in
!= 0 && GET_CODE (in
) == REG
)
881 register int regno
= REGNO (in
);
883 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
884 && reg_equiv_constant
[regno
] != 0)
885 in
= reg_equiv_constant
[regno
];
888 /* Likewise for OUT. Of course, OUT will never be equivalent to
889 an actual constant, but it might be equivalent to a memory location
890 (in the case of a parameter). */
891 if (out
!= 0 && GET_CODE (out
) == REG
)
893 register int regno
= REGNO (out
);
895 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
896 && reg_equiv_constant
[regno
] != 0)
897 out
= reg_equiv_constant
[regno
];
900 /* If we have a read-write operand with an address side-effect,
901 change either IN or OUT so the side-effect happens only once. */
902 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
903 switch (GET_CODE (XEXP (in
, 0)))
905 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
906 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
909 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
910 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
917 /* If we are reloading a (SUBREG constant ...), really reload just the
918 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
919 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
920 a pseudo and hence will become a MEM) with M1 wider than M2 and the
921 register is a pseudo, also reload the inside expression.
922 For machines that extend byte loads, do this for any SUBREG of a pseudo
923 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
924 M2 is an integral mode that gets extended when loaded.
925 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
926 either M1 is not valid for R or M2 is wider than a word but we only
927 need one word to store an M2-sized quantity in R.
928 (However, if OUT is nonzero, we need to reload the reg *and*
929 the subreg, so do nothing here, and let following statement handle it.)
931 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
932 we can't handle it here because CONST_INT does not indicate a mode.
934 Similarly, we must reload the inside expression if we have a
935 STRICT_LOW_PART (presumably, in == out in the cas).
937 Also reload the inner expression if it does not require a secondary
938 reload but the SUBREG does.
940 Finally, reload the inner expression if it is a register that is in
941 the class whose registers cannot be referenced in a different size
942 and M1 is not the same size as M2. If SUBREG_BYTE is nonzero, we
943 cannot reload just the inside since we might end up with the wrong
944 register class. But if it is inside a STRICT_LOW_PART, we have
945 no choice, so we hope we do get the right register class there. */
947 if (in
!= 0 && GET_CODE (in
) == SUBREG
948 && (SUBREG_BYTE (in
) == 0 || strict_low
)
949 #ifdef CLASS_CANNOT_CHANGE_MODE
950 && (class != CLASS_CANNOT_CHANGE_MODE
951 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)), inmode
))
953 && (CONSTANT_P (SUBREG_REG (in
))
954 || GET_CODE (SUBREG_REG (in
)) == PLUS
956 || (((GET_CODE (SUBREG_REG (in
)) == REG
957 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
958 || GET_CODE (SUBREG_REG (in
)) == MEM
)
959 && ((GET_MODE_SIZE (inmode
)
960 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
961 #ifdef LOAD_EXTEND_OP
962 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
963 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
965 && (GET_MODE_SIZE (inmode
)
966 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
967 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
968 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
970 #ifdef WORD_REGISTER_OPERATIONS
971 || ((GET_MODE_SIZE (inmode
)
972 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
973 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
974 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
978 || (GET_CODE (SUBREG_REG (in
)) == REG
979 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
980 /* The case where out is nonzero
981 is handled differently in the following statement. */
982 && (out
== 0 || SUBREG_BYTE (in
) == 0)
983 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
984 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
986 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
988 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
989 GET_MODE (SUBREG_REG (in
)))))
990 || ! HARD_REGNO_MODE_OK (subreg_regno (in
), inmode
)))
991 #ifdef SECONDARY_INPUT_RELOAD_CLASS
992 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
993 && (SECONDARY_INPUT_RELOAD_CLASS (class,
994 GET_MODE (SUBREG_REG (in
)),
998 #ifdef CLASS_CANNOT_CHANGE_MODE
999 || (GET_CODE (SUBREG_REG (in
)) == REG
1000 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1001 && (TEST_HARD_REG_BIT
1002 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1003 REGNO (SUBREG_REG (in
))))
1004 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)),
1009 in_subreg_loc
= inloc
;
1010 inloc
= &SUBREG_REG (in
);
1012 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1013 if (GET_CODE (in
) == MEM
)
1014 /* This is supposed to happen only for paradoxical subregs made by
1015 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1016 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
1019 inmode
= GET_MODE (in
);
1022 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1023 either M1 is not valid for R or M2 is wider than a word but we only
1024 need one word to store an M2-sized quantity in R.
1026 However, we must reload the inner reg *as well as* the subreg in
1029 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1030 code above. This can happen if SUBREG_BYTE != 0. */
1032 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
))
1034 enum reg_class in_class
= class;
1036 if (GET_CODE (SUBREG_REG (in
)) == REG
)
1038 = find_valid_class (inmode
,
1039 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1040 GET_MODE (SUBREG_REG (in
)),
1044 /* This relies on the fact that emit_reload_insns outputs the
1045 instructions for input reloads of type RELOAD_OTHER in the same
1046 order as the reloads. Thus if the outer reload is also of type
1047 RELOAD_OTHER, we are guaranteed that this inner reload will be
1048 output before the outer reload. */
1049 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*)0,
1050 in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1051 dont_remove_subreg
= 1;
1054 /* Similarly for paradoxical and problematical SUBREGs on the output.
1055 Note that there is no reason we need worry about the previous value
1056 of SUBREG_REG (out); even if wider than out,
1057 storing in a subreg is entitled to clobber it all
1058 (except in the case of STRICT_LOW_PART,
1059 and in that case the constraint should label it input-output.) */
1060 if (out
!= 0 && GET_CODE (out
) == SUBREG
1061 && (SUBREG_BYTE (out
) == 0 || strict_low
)
1062 #ifdef CLASS_CANNOT_CHANGE_MODE
1063 && (class != CLASS_CANNOT_CHANGE_MODE
1064 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1067 && (CONSTANT_P (SUBREG_REG (out
))
1069 || (((GET_CODE (SUBREG_REG (out
)) == REG
1070 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1071 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1072 && ((GET_MODE_SIZE (outmode
)
1073 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1074 #ifdef WORD_REGISTER_OPERATIONS
1075 || ((GET_MODE_SIZE (outmode
)
1076 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1077 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1078 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1082 || (GET_CODE (SUBREG_REG (out
)) == REG
1083 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1084 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1085 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1087 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1089 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1090 GET_MODE (SUBREG_REG (out
)))))
1091 || ! HARD_REGNO_MODE_OK (subreg_regno (out
), outmode
)))
1092 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1093 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1094 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1095 GET_MODE (SUBREG_REG (out
)),
1099 #ifdef CLASS_CANNOT_CHANGE_MODE
1100 || (GET_CODE (SUBREG_REG (out
)) == REG
1101 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1102 && (TEST_HARD_REG_BIT
1103 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1104 REGNO (SUBREG_REG (out
))))
1105 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1110 out_subreg_loc
= outloc
;
1111 outloc
= &SUBREG_REG (out
);
1113 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1114 if (GET_CODE (out
) == MEM
1115 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1118 outmode
= GET_MODE (out
);
1121 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1122 either M1 is not valid for R or M2 is wider than a word but we only
1123 need one word to store an M2-sized quantity in R.
1125 However, we must reload the inner reg *as well as* the subreg in
1126 that case. In this case, the inner reg is an in-out reload. */
1128 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
))
1130 /* This relies on the fact that emit_reload_insns outputs the
1131 instructions for output reloads of type RELOAD_OTHER in reverse
1132 order of the reloads. Thus if the outer reload is also of type
1133 RELOAD_OTHER, we are guaranteed that this inner reload will be
1134 output after the outer reload. */
1135 dont_remove_subreg
= 1;
1136 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1138 find_valid_class (outmode
,
1139 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1140 GET_MODE (SUBREG_REG (out
)),
1143 VOIDmode
, VOIDmode
, 0, 0,
1144 opnum
, RELOAD_OTHER
);
1147 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1148 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1149 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1150 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1153 /* If IN is a SUBREG of a hard register, make a new REG. This
1154 simplifies some of the cases below. */
1156 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1157 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1158 && ! dont_remove_subreg
)
1159 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1161 /* Similarly for OUT. */
1162 if (out
!= 0 && GET_CODE (out
) == SUBREG
1163 && GET_CODE (SUBREG_REG (out
)) == REG
1164 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1165 && ! dont_remove_subreg
)
1166 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1168 /* Narrow down the class of register wanted if that is
1169 desirable on this machine for efficiency. */
1171 class = PREFERRED_RELOAD_CLASS (in
, class);
1173 /* Output reloads may need analogous treatment, different in detail. */
1174 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1176 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1179 /* Make sure we use a class that can handle the actual pseudo
1180 inside any subreg. For example, on the 386, QImode regs
1181 can appear within SImode subregs. Although GENERAL_REGS
1182 can handle SImode, QImode needs a smaller class. */
1183 #ifdef LIMIT_RELOAD_CLASS
1185 class = LIMIT_RELOAD_CLASS (inmode
, class);
1186 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1187 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1190 class = LIMIT_RELOAD_CLASS (outmode
, class);
1191 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1192 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1195 /* Verify that this class is at least possible for the mode that
1197 if (this_insn_is_asm
)
1199 enum machine_mode mode
;
1200 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1204 if (mode
== VOIDmode
)
1206 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1211 outmode
= word_mode
;
1213 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1214 if (HARD_REGNO_MODE_OK (i
, mode
)
1215 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1217 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1220 for (j
= 1; j
< nregs
; j
++)
1221 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1226 if (i
== FIRST_PSEUDO_REGISTER
)
1228 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1233 /* Optional output reloads are always OK even if we have no register class,
1234 since the function of these reloads is only to have spill_reg_store etc.
1235 set, so that the storing insn can be deleted later. */
1236 if (class == NO_REGS
1237 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1240 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1244 /* See if we need a secondary reload register to move between CLASS
1245 and IN or CLASS and OUT. Get the icode and push any required reloads
1246 needed for each of them if so. */
1248 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1251 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1252 &secondary_in_icode
);
1255 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1256 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1257 secondary_out_reload
1258 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1259 type
, &secondary_out_icode
);
1262 /* We found no existing reload suitable for re-use.
1263 So add an additional reload. */
1265 #ifdef SECONDARY_MEMORY_NEEDED
1266 /* If a memory location is needed for the copy, make one. */
1267 if (in
!= 0 && GET_CODE (in
) == REG
1268 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1269 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1271 get_secondary_mem (in
, inmode
, opnum
, type
);
1277 rld
[i
].class = class;
1278 rld
[i
].inmode
= inmode
;
1279 rld
[i
].outmode
= outmode
;
1281 rld
[i
].optional
= optional
;
1283 rld
[i
].nocombine
= 0;
1284 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1285 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1286 rld
[i
].opnum
= opnum
;
1287 rld
[i
].when_needed
= type
;
1288 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1289 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1290 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1291 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1292 rld
[i
].secondary_p
= 0;
1296 #ifdef SECONDARY_MEMORY_NEEDED
1297 if (out
!= 0 && GET_CODE (out
) == REG
1298 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1299 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1301 get_secondary_mem (out
, outmode
, opnum
, type
);
1306 /* We are reusing an existing reload,
1307 but we may have additional information for it.
1308 For example, we may now have both IN and OUT
1309 while the old one may have just one of them. */
1311 /* The modes can be different. If they are, we want to reload in
1312 the larger mode, so that the value is valid for both modes. */
1313 if (inmode
!= VOIDmode
1314 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1315 rld
[i
].inmode
= inmode
;
1316 if (outmode
!= VOIDmode
1317 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1318 rld
[i
].outmode
= outmode
;
1321 rtx in_reg
= inloc
? *inloc
: 0;
1322 /* If we merge reloads for two distinct rtl expressions that
1323 are identical in content, there might be duplicate address
1324 reloads. Remove the extra set now, so that if we later find
1325 that we can inherit this reload, we can get rid of the
1326 address reloads altogether.
1328 Do not do this if both reloads are optional since the result
1329 would be an optional reload which could potentially leave
1330 unresolved address replacements.
1332 It is not sufficient to call transfer_replacements since
1333 choose_reload_regs will remove the replacements for address
1334 reloads of inherited reloads which results in the same
1336 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1337 && ! (rld
[i
].optional
&& optional
))
1339 /* We must keep the address reload with the lower operand
1341 if (opnum
> rld
[i
].opnum
)
1343 remove_address_replacements (in
);
1345 in_reg
= rld
[i
].in_reg
;
1348 remove_address_replacements (rld
[i
].in
);
1351 rld
[i
].in_reg
= in_reg
;
1356 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1358 if (reg_class_subset_p (class, rld
[i
].class))
1359 rld
[i
].class = class;
1360 rld
[i
].optional
&= optional
;
1361 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1362 opnum
, rld
[i
].opnum
))
1363 rld
[i
].when_needed
= RELOAD_OTHER
;
1364 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1367 /* If the ostensible rtx being reloaded differs from the rtx found
1368 in the location to substitute, this reload is not safe to combine
1369 because we cannot reliably tell whether it appears in the insn. */
1371 if (in
!= 0 && in
!= *inloc
)
1372 rld
[i
].nocombine
= 1;
1375 /* This was replaced by changes in find_reloads_address_1 and the new
1376 function inc_for_reload, which go with a new meaning of reload_inc. */
1378 /* If this is an IN/OUT reload in an insn that sets the CC,
1379 it must be for an autoincrement. It doesn't work to store
1380 the incremented value after the insn because that would clobber the CC.
1381 So we must do the increment of the value reloaded from,
1382 increment it, store it back, then decrement again. */
1383 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1387 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1388 /* If we did not find a nonzero amount-to-increment-by,
1389 that contradicts the belief that IN is being incremented
1390 in an address in this insn. */
1391 if (rld
[i
].inc
== 0)
1396 /* If we will replace IN and OUT with the reload-reg,
1397 record where they are located so that substitution need
1398 not do a tree walk. */
1400 if (replace_reloads
)
1404 register struct replacement
*r
= &replacements
[n_replacements
++];
1406 r
->subreg_loc
= in_subreg_loc
;
1410 if (outloc
!= 0 && outloc
!= inloc
)
1412 register struct replacement
*r
= &replacements
[n_replacements
++];
1415 r
->subreg_loc
= out_subreg_loc
;
1420 /* If this reload is just being introduced and it has both
1421 an incoming quantity and an outgoing quantity that are
1422 supposed to be made to match, see if either one of the two
1423 can serve as the place to reload into.
1425 If one of them is acceptable, set rld[i].reg_rtx
1428 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1430 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1433 earlyclobber_operand_p (out
));
1435 /* If the outgoing register already contains the same value
1436 as the incoming one, we can dispense with loading it.
1437 The easiest way to tell the caller that is to give a phony
1438 value for the incoming operand (same as outgoing one). */
1439 if (rld
[i
].reg_rtx
== out
1440 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1441 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1442 static_reload_reg_p
, i
, inmode
))
1446 /* If this is an input reload and the operand contains a register that
1447 dies in this insn and is used nowhere else, see if it is the right class
1448 to be used for this reload. Use it if so. (This occurs most commonly
1449 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1450 this if it is also an output reload that mentions the register unless
1451 the output is a SUBREG that clobbers an entire register.
1453 Note that the operand might be one of the spill regs, if it is a
1454 pseudo reg and we are in a block where spilling has not taken place.
1455 But if there is no spilling in this block, that is OK.
1456 An explicitly used hard reg cannot be a spill reg. */
1458 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1462 enum machine_mode rel_mode
= inmode
;
1464 if (out
&& GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (inmode
))
1467 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1468 if (REG_NOTE_KIND (note
) == REG_DEAD
1469 && GET_CODE (XEXP (note
, 0)) == REG
1470 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1471 && reg_mentioned_p (XEXP (note
, 0), in
)
1472 && ! refers_to_regno_for_reload_p (regno
,
1474 + HARD_REGNO_NREGS (regno
,
1476 PATTERN (this_insn
), inloc
)
1477 /* If this is also an output reload, IN cannot be used as
1478 the reload register if it is set in this insn unless IN
1480 && (out
== 0 || in
== out
1481 || ! hard_reg_set_here_p (regno
,
1483 + HARD_REGNO_NREGS (regno
,
1485 PATTERN (this_insn
)))
1486 /* ??? Why is this code so different from the previous?
1487 Is there any simple coherent way to describe the two together?
1488 What's going on here. */
1490 || (GET_CODE (in
) == SUBREG
1491 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1493 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1494 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1495 /* Make sure the operand fits in the reg that dies. */
1496 && (GET_MODE_SIZE (rel_mode
)
1497 <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1498 && HARD_REGNO_MODE_OK (regno
, inmode
)
1499 && HARD_REGNO_MODE_OK (regno
, outmode
))
1502 unsigned int nregs
= MAX (HARD_REGNO_NREGS (regno
, inmode
),
1503 HARD_REGNO_NREGS (regno
, outmode
));
1505 for (offs
= 0; offs
< nregs
; offs
++)
1506 if (fixed_regs
[regno
+ offs
]
1507 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1513 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1520 output_reloadnum
= i
;
1525 /* Record an additional place we must replace a value
1526 for which we have already recorded a reload.
1527 RELOADNUM is the value returned by push_reload
1528 when the reload was recorded.
1529 This is used in insn patterns that use match_dup. */
1532 push_replacement (loc
, reloadnum
, mode
)
1535 enum machine_mode mode
;
1537 if (replace_reloads
)
1539 register struct replacement
*r
= &replacements
[n_replacements
++];
1540 r
->what
= reloadnum
;
1547 /* Transfer all replacements that used to be in reload FROM to be in
1551 transfer_replacements (to
, from
)
1556 for (i
= 0; i
< n_replacements
; i
++)
1557 if (replacements
[i
].what
== from
)
1558 replacements
[i
].what
= to
;
1561 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1562 or a subpart of it. If we have any replacements registered for IN_RTX,
1563 cancel the reloads that were supposed to load them.
1564 Return non-zero if we canceled any reloads. */
1566 remove_address_replacements (in_rtx
)
1570 char reload_flags
[MAX_RELOADS
];
1571 int something_changed
= 0;
1573 memset (reload_flags
, 0, sizeof reload_flags
);
1574 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1576 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1577 reload_flags
[replacements
[i
].what
] |= 1;
1580 replacements
[j
++] = replacements
[i
];
1581 reload_flags
[replacements
[i
].what
] |= 2;
1584 /* Note that the following store must be done before the recursive calls. */
1587 for (i
= n_reloads
- 1; i
>= 0; i
--)
1589 if (reload_flags
[i
] == 1)
1591 deallocate_reload_reg (i
);
1592 remove_address_replacements (rld
[i
].in
);
1594 something_changed
= 1;
1597 return something_changed
;
1600 /* If there is only one output reload, and it is not for an earlyclobber
1601 operand, try to combine it with a (logically unrelated) input reload
1602 to reduce the number of reload registers needed.
1604 This is safe if the input reload does not appear in
1605 the value being output-reloaded, because this implies
1606 it is not needed any more once the original insn completes.
1608 If that doesn't work, see we can use any of the registers that
1609 die in this insn as a reload register. We can if it is of the right
1610 class and does not appear in the value being output-reloaded. */
1616 int output_reload
= -1;
1617 int secondary_out
= -1;
1620 /* Find the output reload; return unless there is exactly one
1621 and that one is mandatory. */
1623 for (i
= 0; i
< n_reloads
; i
++)
1624 if (rld
[i
].out
!= 0)
1626 if (output_reload
>= 0)
1631 if (output_reload
< 0 || rld
[output_reload
].optional
)
1634 /* An input-output reload isn't combinable. */
1636 if (rld
[output_reload
].in
!= 0)
1639 /* If this reload is for an earlyclobber operand, we can't do anything. */
1640 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1643 /* Check each input reload; can we combine it? */
1645 for (i
= 0; i
< n_reloads
; i
++)
1646 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1647 /* Life span of this reload must not extend past main insn. */
1648 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1649 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1650 && rld
[i
].when_needed
!= RELOAD_OTHER
1651 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1652 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1653 rld
[output_reload
].outmode
))
1655 && rld
[i
].reg_rtx
== 0
1656 #ifdef SECONDARY_MEMORY_NEEDED
1657 /* Don't combine two reloads with different secondary
1658 memory locations. */
1659 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1660 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1661 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1662 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1664 && (SMALL_REGISTER_CLASSES
1665 ? (rld
[i
].class == rld
[output_reload
].class)
1666 : (reg_class_subset_p (rld
[i
].class,
1667 rld
[output_reload
].class)
1668 || reg_class_subset_p (rld
[output_reload
].class,
1670 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1671 /* Args reversed because the first arg seems to be
1672 the one that we imagine being modified
1673 while the second is the one that might be affected. */
1674 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1676 /* However, if the input is a register that appears inside
1677 the output, then we also can't share.
1678 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1679 If the same reload reg is used for both reg 69 and the
1680 result to be stored in memory, then that result
1681 will clobber the address of the memory ref. */
1682 && ! (GET_CODE (rld
[i
].in
) == REG
1683 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1684 rld
[output_reload
].out
))))
1685 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
)
1686 && (reg_class_size
[(int) rld
[i
].class]
1687 || SMALL_REGISTER_CLASSES
)
1688 /* We will allow making things slightly worse by combining an
1689 input and an output, but no worse than that. */
1690 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1691 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1695 /* We have found a reload to combine with! */
1696 rld
[i
].out
= rld
[output_reload
].out
;
1697 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1698 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1699 /* Mark the old output reload as inoperative. */
1700 rld
[output_reload
].out
= 0;
1701 /* The combined reload is needed for the entire insn. */
1702 rld
[i
].when_needed
= RELOAD_OTHER
;
1703 /* If the output reload had a secondary reload, copy it. */
1704 if (rld
[output_reload
].secondary_out_reload
!= -1)
1706 rld
[i
].secondary_out_reload
1707 = rld
[output_reload
].secondary_out_reload
;
1708 rld
[i
].secondary_out_icode
1709 = rld
[output_reload
].secondary_out_icode
;
1712 #ifdef SECONDARY_MEMORY_NEEDED
1713 /* Copy any secondary MEM. */
1714 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1715 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1716 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1718 /* If required, minimize the register class. */
1719 if (reg_class_subset_p (rld
[output_reload
].class,
1721 rld
[i
].class = rld
[output_reload
].class;
1723 /* Transfer all replacements from the old reload to the combined. */
1724 for (j
= 0; j
< n_replacements
; j
++)
1725 if (replacements
[j
].what
== output_reload
)
1726 replacements
[j
].what
= i
;
1731 /* If this insn has only one operand that is modified or written (assumed
1732 to be the first), it must be the one corresponding to this reload. It
1733 is safe to use anything that dies in this insn for that output provided
1734 that it does not occur in the output (we already know it isn't an
1735 earlyclobber. If this is an asm insn, give up. */
1737 if (INSN_CODE (this_insn
) == -1)
1740 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1741 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1742 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1745 /* See if some hard register that dies in this insn and is not used in
1746 the output is the right class. Only works if the register we pick
1747 up can fully hold our output reload. */
1748 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1749 if (REG_NOTE_KIND (note
) == REG_DEAD
1750 && GET_CODE (XEXP (note
, 0)) == REG
1751 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1752 rld
[output_reload
].out
)
1753 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1754 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1755 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1756 REGNO (XEXP (note
, 0)))
1757 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1758 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1759 /* Ensure that a secondary or tertiary reload for this output
1760 won't want this register. */
1761 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1762 || (! (TEST_HARD_REG_BIT
1763 (reg_class_contents
[(int) rld
[secondary_out
].class],
1764 REGNO (XEXP (note
, 0))))
1765 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1766 || ! (TEST_HARD_REG_BIT
1767 (reg_class_contents
[(int) rld
[secondary_out
].class],
1768 REGNO (XEXP (note
, 0)))))))
1769 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1771 rld
[output_reload
].reg_rtx
1772 = gen_rtx_REG (rld
[output_reload
].outmode
,
1773 REGNO (XEXP (note
, 0)));
1778 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1779 See if one of IN and OUT is a register that may be used;
1780 this is desirable since a spill-register won't be needed.
1781 If so, return the register rtx that proves acceptable.
1783 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1784 CLASS is the register class required for the reload.
1786 If FOR_REAL is >= 0, it is the number of the reload,
1787 and in some cases when it can be discovered that OUT doesn't need
1788 to be computed, clear out rld[FOR_REAL].out.
1790 If FOR_REAL is -1, this should not be done, because this call
1791 is just to see if a register can be found, not to find and install it.
1793 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1794 puts an additional constraint on being able to use IN for OUT since
1795 IN must not appear elsewhere in the insn (it is assumed that IN itself
1796 is safe from the earlyclobber). */
1799 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1800 inmode
, outmode
, class, for_real
, earlyclobber
)
1801 rtx real_in
, real_out
;
1802 rtx
*inloc
, *outloc
;
1803 enum machine_mode inmode
, outmode
;
1804 enum reg_class
class;
1814 /* If operands exceed a word, we can't use either of them
1815 unless they have the same size. */
1816 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1817 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1818 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1821 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1822 respectively refers to a hard register. */
1824 /* Find the inside of any subregs. */
1825 while (GET_CODE (out
) == SUBREG
)
1827 if (GET_CODE (SUBREG_REG (out
)) == REG
1828 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
1829 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1830 GET_MODE (SUBREG_REG (out
)),
1833 out
= SUBREG_REG (out
);
1835 while (GET_CODE (in
) == SUBREG
)
1837 if (GET_CODE (SUBREG_REG (in
)) == REG
1838 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
1839 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1840 GET_MODE (SUBREG_REG (in
)),
1843 in
= SUBREG_REG (in
);
1846 /* Narrow down the reg class, the same way push_reload will;
1847 otherwise we might find a dummy now, but push_reload won't. */
1848 class = PREFERRED_RELOAD_CLASS (in
, class);
1850 /* See if OUT will do. */
1851 if (GET_CODE (out
) == REG
1852 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1854 unsigned int regno
= REGNO (out
) + out_offset
;
1855 unsigned int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1858 /* When we consider whether the insn uses OUT,
1859 ignore references within IN. They don't prevent us
1860 from copying IN into OUT, because those refs would
1861 move into the insn that reloads IN.
1863 However, we only ignore IN in its role as this reload.
1864 If the insn uses IN elsewhere and it contains OUT,
1865 that counts. We can't be sure it's the "same" operand
1866 so it might not go through this reload. */
1868 *inloc
= const0_rtx
;
1870 if (regno
< FIRST_PSEUDO_REGISTER
1871 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1872 PATTERN (this_insn
), outloc
))
1876 for (i
= 0; i
< nwords
; i
++)
1877 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1883 if (GET_CODE (real_out
) == REG
)
1886 value
= gen_rtx_REG (outmode
, regno
);
1893 /* Consider using IN if OUT was not acceptable
1894 or if OUT dies in this insn (like the quotient in a divmod insn).
1895 We can't use IN unless it is dies in this insn,
1896 which means we must know accurately which hard regs are live.
1897 Also, the result can't go in IN if IN is used within OUT,
1898 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1899 if (hard_regs_live_known
1900 && GET_CODE (in
) == REG
1901 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1903 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1904 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1905 && !fixed_regs
[REGNO (in
)]
1906 && HARD_REGNO_MODE_OK (REGNO (in
),
1907 /* The only case where out and real_out might
1908 have different modes is where real_out
1909 is a subreg, and in that case, out
1911 (GET_MODE (out
) != VOIDmode
1912 ? GET_MODE (out
) : outmode
)))
1914 unsigned int regno
= REGNO (in
) + in_offset
;
1915 unsigned int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1917 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*)0)
1918 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1919 PATTERN (this_insn
))
1921 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1922 PATTERN (this_insn
), inloc
)))
1926 for (i
= 0; i
< nwords
; i
++)
1927 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1933 /* If we were going to use OUT as the reload reg
1934 and changed our mind, it means OUT is a dummy that
1935 dies here. So don't bother copying value to it. */
1936 if (for_real
>= 0 && value
== real_out
)
1937 rld
[for_real
].out
= 0;
1938 if (GET_CODE (real_in
) == REG
)
1941 value
= gen_rtx_REG (inmode
, regno
);
1949 /* This page contains subroutines used mainly for determining
1950 whether the IN or an OUT of a reload can serve as the
1953 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1956 earlyclobber_operand_p (x
)
1961 for (i
= 0; i
< n_earlyclobbers
; i
++)
1962 if (reload_earlyclobbers
[i
] == x
)
1968 /* Return 1 if expression X alters a hard reg in the range
1969 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1970 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1971 X should be the body of an instruction. */
1974 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1975 unsigned int beg_regno
, end_regno
;
1978 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1980 register rtx op0
= SET_DEST (x
);
1982 while (GET_CODE (op0
) == SUBREG
)
1983 op0
= SUBREG_REG (op0
);
1984 if (GET_CODE (op0
) == REG
)
1986 unsigned int r
= REGNO (op0
);
1988 /* See if this reg overlaps range under consideration. */
1990 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1994 else if (GET_CODE (x
) == PARALLEL
)
1996 register int i
= XVECLEN (x
, 0) - 1;
1999 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
2006 /* Return 1 if ADDR is a valid memory address for mode MODE,
2007 and check that each pseudo reg has the proper kind of
2011 strict_memory_address_p (mode
, addr
)
2012 enum machine_mode mode ATTRIBUTE_UNUSED
;
2015 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2022 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2023 if they are the same hard reg, and has special hacks for
2024 autoincrement and autodecrement.
2025 This is specifically intended for find_reloads to use
2026 in determining whether two operands match.
2027 X is the operand whose number is the lower of the two.
2029 The value is 2 if Y contains a pre-increment that matches
2030 a non-incrementing address in X. */
2032 /* ??? To be completely correct, we should arrange to pass
2033 for X the output operand and for Y the input operand.
2034 For now, we assume that the output operand has the lower number
2035 because that is natural in (SET output (... input ...)). */
2038 operands_match_p (x
, y
)
2042 register RTX_CODE code
= GET_CODE (x
);
2043 register const char *fmt
;
2048 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
2049 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
2050 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2056 i
= REGNO (SUBREG_REG (x
));
2057 if (i
>= FIRST_PSEUDO_REGISTER
)
2059 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2060 GET_MODE (SUBREG_REG (x
)),
2067 if (GET_CODE (y
) == SUBREG
)
2069 j
= REGNO (SUBREG_REG (y
));
2070 if (j
>= FIRST_PSEUDO_REGISTER
)
2072 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2073 GET_MODE (SUBREG_REG (y
)),
2080 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2081 multiple hard register group, so that for example (reg:DI 0) and
2082 (reg:SI 1) will be considered the same register. */
2083 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2084 && i
< FIRST_PSEUDO_REGISTER
)
2085 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
2086 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2087 && j
< FIRST_PSEUDO_REGISTER
)
2088 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
2092 /* If two operands must match, because they are really a single
2093 operand of an assembler insn, then two postincrements are invalid
2094 because the assembler insn would increment only once.
2095 On the other hand, an postincrement matches ordinary indexing
2096 if the postincrement is the output operand. */
2097 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2098 return operands_match_p (XEXP (x
, 0), y
);
2099 /* Two preincrements are invalid
2100 because the assembler insn would increment only once.
2101 On the other hand, an preincrement matches ordinary indexing
2102 if the preincrement is the input operand.
2103 In this case, return 2, since some callers need to do special
2104 things when this happens. */
2105 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2106 || GET_CODE (y
) == PRE_MODIFY
)
2107 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2111 /* Now we have disposed of all the cases
2112 in which different rtx codes can match. */
2113 if (code
!= GET_CODE (y
))
2115 if (code
== LABEL_REF
)
2116 return XEXP (x
, 0) == XEXP (y
, 0);
2117 if (code
== SYMBOL_REF
)
2118 return XSTR (x
, 0) == XSTR (y
, 0);
2120 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2122 if (GET_MODE (x
) != GET_MODE (y
))
2125 /* Compare the elements. If any pair of corresponding elements
2126 fail to match, return 0 for the whole things. */
2129 fmt
= GET_RTX_FORMAT (code
);
2130 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2136 if (XWINT (x
, i
) != XWINT (y
, i
))
2141 if (XINT (x
, i
) != XINT (y
, i
))
2146 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2149 /* If any subexpression returns 2,
2150 we should return 2 if we are successful. */
2159 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2161 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2163 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2171 /* It is believed that rtx's at this level will never
2172 contain anything but integers and other rtx's,
2173 except for within LABEL_REFs and SYMBOL_REFs. */
2178 return 1 + success_2
;
2181 /* Describe the range of registers or memory referenced by X.
2182 If X is a register, set REG_FLAG and put the first register
2183 number into START and the last plus one into END.
2184 If X is a memory reference, put a base address into BASE
2185 and a range of integer offsets into START and END.
2186 If X is pushing on the stack, we can assume it causes no trouble,
2187 so we set the SAFE field. */
2189 static struct decomposition
2193 struct decomposition val
;
2199 if (GET_CODE (x
) == MEM
)
2201 rtx base
= NULL_RTX
, offset
= 0;
2202 rtx addr
= XEXP (x
, 0);
2204 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2205 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2207 val
.base
= XEXP (addr
, 0);
2208 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2209 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2210 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2214 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2216 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2217 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2218 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2220 val
.base
= XEXP (addr
, 0);
2221 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2222 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2223 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2228 if (GET_CODE (addr
) == CONST
)
2230 addr
= XEXP (addr
, 0);
2233 if (GET_CODE (addr
) == PLUS
)
2235 if (CONSTANT_P (XEXP (addr
, 0)))
2237 base
= XEXP (addr
, 1);
2238 offset
= XEXP (addr
, 0);
2240 else if (CONSTANT_P (XEXP (addr
, 1)))
2242 base
= XEXP (addr
, 0);
2243 offset
= XEXP (addr
, 1);
2250 offset
= const0_rtx
;
2252 if (GET_CODE (offset
) == CONST
)
2253 offset
= XEXP (offset
, 0);
2254 if (GET_CODE (offset
) == PLUS
)
2256 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2258 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2259 offset
= XEXP (offset
, 0);
2261 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2263 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2264 offset
= XEXP (offset
, 1);
2268 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2269 offset
= const0_rtx
;
2272 else if (GET_CODE (offset
) != CONST_INT
)
2274 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2275 offset
= const0_rtx
;
2278 if (all_const
&& GET_CODE (base
) == PLUS
)
2279 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2281 if (GET_CODE (offset
) != CONST_INT
)
2284 val
.start
= INTVAL (offset
);
2285 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2289 else if (GET_CODE (x
) == REG
)
2292 val
.start
= true_regnum (x
);
2295 /* A pseudo with no hard reg. */
2296 val
.start
= REGNO (x
);
2297 val
.end
= val
.start
+ 1;
2301 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2303 else if (GET_CODE (x
) == SUBREG
)
2305 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2306 /* This could be more precise, but it's good enough. */
2307 return decompose (SUBREG_REG (x
));
2309 val
.start
= true_regnum (x
);
2311 return decompose (SUBREG_REG (x
));
2314 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2316 else if (CONSTANT_P (x
)
2317 /* This hasn't been assigned yet, so it can't conflict yet. */
2318 || GET_CODE (x
) == SCRATCH
)
2325 /* Return 1 if altering Y will not modify the value of X.
2326 Y is also described by YDATA, which should be decompose (Y). */
2329 immune_p (x
, y
, ydata
)
2331 struct decomposition ydata
;
2333 struct decomposition xdata
;
2336 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, (rtx
*)0);
2340 if (GET_CODE (y
) != MEM
)
2342 /* If Y is memory and X is not, Y can't affect X. */
2343 if (GET_CODE (x
) != MEM
)
2346 xdata
= decompose (x
);
2348 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2350 /* If bases are distinct symbolic constants, there is no overlap. */
2351 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2353 /* Constants and stack slots never overlap. */
2354 if (CONSTANT_P (xdata
.base
)
2355 && (ydata
.base
== frame_pointer_rtx
2356 || ydata
.base
== hard_frame_pointer_rtx
2357 || ydata
.base
== stack_pointer_rtx
))
2359 if (CONSTANT_P (ydata
.base
)
2360 && (xdata
.base
== frame_pointer_rtx
2361 || xdata
.base
== hard_frame_pointer_rtx
2362 || xdata
.base
== stack_pointer_rtx
))
2364 /* If either base is variable, we don't know anything. */
2368 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2371 /* Similar, but calls decompose. */
2374 safe_from_earlyclobber (op
, clobber
)
2377 struct decomposition early_data
;
2379 early_data
= decompose (clobber
);
2380 return immune_p (op
, clobber
, early_data
);
2383 /* Main entry point of this file: search the body of INSN
2384 for values that need reloading and record them with push_reload.
2385 REPLACE nonzero means record also where the values occur
2386 so that subst_reloads can be used.
2388 IND_LEVELS says how many levels of indirection are supported by this
2389 machine; a value of zero means that a memory reference is not a valid
2392 LIVE_KNOWN says we have valid information about which hard
2393 regs are live at each point in the program; this is true when
2394 we are called from global_alloc but false when stupid register
2395 allocation has been done.
2397 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2398 which is nonnegative if the reg has been commandeered for reloading into.
2399 It is copied into STATIC_RELOAD_REG_P and referenced from there
2400 by various subroutines.
2402 Return TRUE if some operands need to be changed, because of swapping
2403 commutative operands, reg_equiv_address substitution, or whatever. */
2406 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2408 int replace
, ind_levels
;
2410 short *reload_reg_p
;
2412 register int insn_code_number
;
2415 /* These start out as the constraints for the insn
2416 and they are chewed up as we consider alternatives. */
2417 char *constraints
[MAX_RECOG_OPERANDS
];
2418 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2420 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2421 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2422 /* Nonzero for a MEM operand whose entire address needs a reload. */
2423 int address_reloaded
[MAX_RECOG_OPERANDS
];
2424 /* Value of enum reload_type to use for operand. */
2425 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2426 /* Value of enum reload_type to use within address of operand. */
2427 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2428 /* Save the usage of each operand. */
2429 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2430 int no_input_reloads
= 0, no_output_reloads
= 0;
2432 int this_alternative
[MAX_RECOG_OPERANDS
];
2433 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2434 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2435 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2436 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2437 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2439 int goal_alternative
[MAX_RECOG_OPERANDS
];
2440 int this_alternative_number
;
2441 int goal_alternative_number
= 0;
2442 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2443 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2444 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2445 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2446 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2447 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2448 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2449 int goal_alternative_swapped
;
2452 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2453 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2454 rtx body
= PATTERN (insn
);
2455 rtx set
= single_set (insn
);
2456 int goal_earlyclobber
= 0, this_earlyclobber
;
2457 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2463 n_earlyclobbers
= 0;
2464 replace_reloads
= replace
;
2465 hard_regs_live_known
= live_known
;
2466 static_reload_reg_p
= reload_reg_p
;
2468 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2469 neither are insns that SET cc0. Insns that use CC0 are not allowed
2470 to have any input reloads. */
2471 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2472 no_output_reloads
= 1;
2475 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2476 no_input_reloads
= 1;
2477 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2478 no_output_reloads
= 1;
2481 #ifdef SECONDARY_MEMORY_NEEDED
2482 /* The eliminated forms of any secondary memory locations are per-insn, so
2483 clear them out here. */
2485 memset ((char *) secondary_memlocs_elim
, 0, sizeof secondary_memlocs_elim
);
2488 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2489 is cheap to move between them. If it is not, there may not be an insn
2490 to do the copy, so we may need a reload. */
2491 if (GET_CODE (body
) == SET
2492 && GET_CODE (SET_DEST (body
)) == REG
2493 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2494 && GET_CODE (SET_SRC (body
)) == REG
2495 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2496 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body
)),
2497 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2498 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2501 extract_insn (insn
);
2503 noperands
= reload_n_operands
= recog_data
.n_operands
;
2504 n_alternatives
= recog_data
.n_alternatives
;
2506 /* Just return "no reloads" if insn has no operands with constraints. */
2507 if (noperands
== 0 || n_alternatives
== 0)
2510 insn_code_number
= INSN_CODE (insn
);
2511 this_insn_is_asm
= insn_code_number
< 0;
2513 memcpy (operand_mode
, recog_data
.operand_mode
,
2514 noperands
* sizeof (enum machine_mode
));
2515 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2519 /* If we will need to know, later, whether some pair of operands
2520 are the same, we must compare them now and save the result.
2521 Reloading the base and index registers will clobber them
2522 and afterward they will fail to match. */
2524 for (i
= 0; i
< noperands
; i
++)
2529 substed_operand
[i
] = recog_data
.operand
[i
];
2532 modified
[i
] = RELOAD_READ
;
2534 /* Scan this operand's constraint to see if it is an output operand,
2535 an in-out operand, is commutative, or should match another. */
2540 modified
[i
] = RELOAD_WRITE
;
2542 modified
[i
] = RELOAD_READ_WRITE
;
2545 /* The last operand should not be marked commutative. */
2546 if (i
== noperands
- 1)
2551 else if (c
>= '0' && c
<= '9')
2554 operands_match
[c
][i
]
2555 = operands_match_p (recog_data
.operand
[c
],
2556 recog_data
.operand
[i
]);
2558 /* An operand may not match itself. */
2562 /* If C can be commuted with C+1, and C might need to match I,
2563 then C+1 might also need to match I. */
2564 if (commutative
>= 0)
2566 if (c
== commutative
|| c
== commutative
+ 1)
2568 int other
= c
+ (c
== commutative
? 1 : -1);
2569 operands_match
[other
][i
]
2570 = operands_match_p (recog_data
.operand
[other
],
2571 recog_data
.operand
[i
]);
2573 if (i
== commutative
|| i
== commutative
+ 1)
2575 int other
= i
+ (i
== commutative
? 1 : -1);
2576 operands_match
[c
][other
]
2577 = operands_match_p (recog_data
.operand
[c
],
2578 recog_data
.operand
[other
]);
2580 /* Note that C is supposed to be less than I.
2581 No need to consider altering both C and I because in
2582 that case we would alter one into the other. */
2588 /* Examine each operand that is a memory reference or memory address
2589 and reload parts of the addresses into index registers.
2590 Also here any references to pseudo regs that didn't get hard regs
2591 but are equivalent to constants get replaced in the insn itself
2592 with those constants. Nobody will ever see them again.
2594 Finally, set up the preferred classes of each operand. */
2596 for (i
= 0; i
< noperands
; i
++)
2598 register RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2600 address_reloaded
[i
] = 0;
2601 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2602 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2605 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2606 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2609 if (*constraints
[i
] == 0)
2610 /* Ignore things like match_operator operands. */
2612 else if (constraints
[i
][0] == 'p')
2614 find_reloads_address (VOIDmode
, (rtx
*)0,
2615 recog_data
.operand
[i
],
2616 recog_data
.operand_loc
[i
],
2617 i
, operand_type
[i
], ind_levels
, insn
);
2619 /* If we now have a simple operand where we used to have a
2620 PLUS or MULT, re-recognize and try again. */
2621 if ((GET_RTX_CLASS (GET_CODE (*recog_data
.operand_loc
[i
])) == 'o'
2622 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2623 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2624 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2626 INSN_CODE (insn
) = -1;
2627 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2632 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2633 substed_operand
[i
] = recog_data
.operand
[i
];
2635 else if (code
== MEM
)
2638 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2639 recog_data
.operand_loc
[i
],
2640 XEXP (recog_data
.operand
[i
], 0),
2641 &XEXP (recog_data
.operand
[i
], 0),
2642 i
, address_type
[i
], ind_levels
, insn
);
2643 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2644 substed_operand
[i
] = recog_data
.operand
[i
];
2646 else if (code
== SUBREG
)
2648 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2650 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2653 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2655 &address_reloaded
[i
]);
2657 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2658 that didn't get a hard register, emit a USE with a REG_EQUAL
2659 note in front so that we might inherit a previous, possibly
2663 && GET_CODE (op
) == MEM
2664 && GET_CODE (reg
) == REG
2665 && (GET_MODE_SIZE (GET_MODE (reg
))
2666 >= GET_MODE_SIZE (GET_MODE (op
))))
2667 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
), insn
))
2668 = gen_rtx_EXPR_LIST (REG_EQUAL
,
2669 reg_equiv_memory_loc
[REGNO (reg
)], NULL_RTX
);
2671 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2673 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2674 /* We can get a PLUS as an "operand" as a result of register
2675 elimination. See eliminate_regs and gen_reload. We handle
2676 a unary operator by reloading the operand. */
2677 substed_operand
[i
] = recog_data
.operand
[i
]
2678 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2679 ind_levels
, 0, insn
,
2680 &address_reloaded
[i
]);
2681 else if (code
== REG
)
2683 /* This is equivalent to calling find_reloads_toplev.
2684 The code is duplicated for speed.
2685 When we find a pseudo always equivalent to a constant,
2686 we replace it by the constant. We must be sure, however,
2687 that we don't try to replace it in the insn in which it
2689 register int regno
= REGNO (recog_data
.operand
[i
]);
2690 if (reg_equiv_constant
[regno
] != 0
2691 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2693 /* Record the existing mode so that the check if constants are
2694 allowed will work when operand_mode isn't specified. */
2696 if (operand_mode
[i
] == VOIDmode
)
2697 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2699 substed_operand
[i
] = recog_data
.operand
[i
]
2700 = reg_equiv_constant
[regno
];
2702 if (reg_equiv_memory_loc
[regno
] != 0
2703 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2704 /* We need not give a valid is_set_dest argument since the case
2705 of a constant equivalence was checked above. */
2706 substed_operand
[i
] = recog_data
.operand
[i
]
2707 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2708 ind_levels
, 0, insn
,
2709 &address_reloaded
[i
]);
2711 /* If the operand is still a register (we didn't replace it with an
2712 equivalent), get the preferred class to reload it into. */
2713 code
= GET_CODE (recog_data
.operand
[i
]);
2715 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2716 >= FIRST_PSEUDO_REGISTER
)
2717 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2721 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2722 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2725 /* If this is simply a copy from operand 1 to operand 0, merge the
2726 preferred classes for the operands. */
2727 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2728 && recog_data
.operand
[1] == SET_SRC (set
))
2730 preferred_class
[0] = preferred_class
[1]
2731 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2732 pref_or_nothing
[0] |= pref_or_nothing
[1];
2733 pref_or_nothing
[1] |= pref_or_nothing
[0];
2736 /* Now see what we need for pseudo-regs that didn't get hard regs
2737 or got the wrong kind of hard reg. For this, we must consider
2738 all the operands together against the register constraints. */
2740 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2743 goal_alternative_swapped
= 0;
2746 /* The constraints are made of several alternatives.
2747 Each operand's constraint looks like foo,bar,... with commas
2748 separating the alternatives. The first alternatives for all
2749 operands go together, the second alternatives go together, etc.
2751 First loop over alternatives. */
2753 for (this_alternative_number
= 0;
2754 this_alternative_number
< n_alternatives
;
2755 this_alternative_number
++)
2757 /* Loop over operands for one constraint alternative. */
2758 /* LOSERS counts those that don't fit this alternative
2759 and would require loading. */
2761 /* BAD is set to 1 if it some operand can't fit this alternative
2762 even after reloading. */
2764 /* REJECT is a count of how undesirable this alternative says it is
2765 if any reloading is required. If the alternative matches exactly
2766 then REJECT is ignored, but otherwise it gets this much
2767 counted against it in addition to the reloading needed. Each
2768 ? counts three times here since we want the disparaging caused by
2769 a bad register class to only count 1/3 as much. */
2772 this_earlyclobber
= 0;
2774 for (i
= 0; i
< noperands
; i
++)
2776 register char *p
= constraints
[i
];
2777 register int win
= 0;
2779 /* 0 => this operand can be reloaded somehow for this alternative */
2781 /* 0 => this operand can be reloaded if the alternative allows regs. */
2784 register rtx operand
= recog_data
.operand
[i
];
2786 /* Nonzero means this is a MEM that must be reloaded into a reg
2787 regardless of what the constraint says. */
2788 int force_reload
= 0;
2790 /* Nonzero if a constant forced into memory would be OK for this
2793 int earlyclobber
= 0;
2795 /* If the predicate accepts a unary operator, it means that
2796 we need to reload the operand, but do not do this for
2797 match_operator and friends. */
2798 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1' && *p
!= 0)
2799 operand
= XEXP (operand
, 0);
2801 /* If the operand is a SUBREG, extract
2802 the REG or MEM (or maybe even a constant) within.
2803 (Constants can occur as a result of reg_equiv_constant.) */
2805 while (GET_CODE (operand
) == SUBREG
)
2807 /* Offset only matters when operand is a REG and
2808 it is a hard reg. This is because it is passed
2809 to reg_fits_class_p if it is a REG and all pseudos
2810 return 0 from that function. */
2811 if (GET_CODE (SUBREG_REG (operand
)) == REG
2812 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
2814 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
2815 GET_MODE (SUBREG_REG (operand
)),
2816 SUBREG_BYTE (operand
),
2817 GET_MODE (operand
));
2819 operand
= SUBREG_REG (operand
);
2820 /* Force reload if this is a constant or PLUS or if there may
2821 be a problem accessing OPERAND in the outer mode. */
2822 if (CONSTANT_P (operand
)
2823 || GET_CODE (operand
) == PLUS
2824 /* We must force a reload of paradoxical SUBREGs
2825 of a MEM because the alignment of the inner value
2826 may not be enough to do the outer reference. On
2827 big-endian machines, it may also reference outside
2830 On machines that extend byte operations and we have a
2831 SUBREG where both the inner and outer modes are no wider
2832 than a word and the inner mode is narrower, is integral,
2833 and gets extended when loaded from memory, combine.c has
2834 made assumptions about the behavior of the machine in such
2835 register access. If the data is, in fact, in memory we
2836 must always load using the size assumed to be in the
2837 register and let the insn do the different-sized
2840 This is doubly true if WORD_REGISTER_OPERATIONS. In
2841 this case eliminate_regs has left non-paradoxical
2842 subregs for push_reloads to see. Make sure it does
2843 by forcing the reload.
2845 ??? When is it right at this stage to have a subreg
2846 of a mem that is _not_ to be handled specialy? IMO
2847 those should have been reduced to just a mem. */
2848 || ((GET_CODE (operand
) == MEM
2849 || (GET_CODE (operand
)== REG
2850 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2851 #ifndef WORD_REGISTER_OPERATIONS
2852 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2853 < BIGGEST_ALIGNMENT
)
2854 && (GET_MODE_SIZE (operand_mode
[i
])
2855 > GET_MODE_SIZE (GET_MODE (operand
))))
2856 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2857 #ifdef LOAD_EXTEND_OP
2858 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2859 && (GET_MODE_SIZE (GET_MODE (operand
))
2861 && (GET_MODE_SIZE (operand_mode
[i
])
2862 > GET_MODE_SIZE (GET_MODE (operand
)))
2863 && INTEGRAL_MODE_P (GET_MODE (operand
))
2864 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2869 /* This following hunk of code should no longer be
2870 needed at all with SUBREG_BYTE. If you need this
2871 code back, please explain to me why so I can
2872 fix the real problem. -DaveM */
2874 /* Subreg of a hard reg which can't handle the subreg's mode
2875 or which would handle that mode in the wrong number of
2876 registers for subregging to work. */
2877 || (GET_CODE (operand
) == REG
2878 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2879 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2880 && (GET_MODE_SIZE (GET_MODE (operand
))
2882 && ((GET_MODE_SIZE (GET_MODE (operand
))
2884 != HARD_REGNO_NREGS (REGNO (operand
),
2885 GET_MODE (operand
))))
2886 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2893 this_alternative
[i
] = (int) NO_REGS
;
2894 this_alternative_win
[i
] = 0;
2895 this_alternative_match_win
[i
] = 0;
2896 this_alternative_offmemok
[i
] = 0;
2897 this_alternative_earlyclobber
[i
] = 0;
2898 this_alternative_matches
[i
] = -1;
2900 /* An empty constraint or empty alternative
2901 allows anything which matched the pattern. */
2902 if (*p
== 0 || *p
== ',')
2905 /* Scan this alternative's specs for this operand;
2906 set WIN if the operand fits any letter in this alternative.
2907 Otherwise, clear BADOP if this operand could
2908 fit some letter after reloads,
2909 or set WINREG if this operand could fit after reloads
2910 provided the constraint allows some registers. */
2912 while (*p
&& (c
= *p
++) != ',')
2915 case '=': case '+': case '*':
2919 /* The last operand should not be marked commutative. */
2920 if (i
!= noperands
- 1)
2933 /* Ignore rest of this alternative as far as
2934 reloading is concerned. */
2935 while (*p
&& *p
!= ',')
2939 case '0': case '1': case '2': case '3': case '4':
2940 case '5': case '6': case '7': case '8': case '9':
2943 this_alternative_matches
[i
] = c
;
2944 /* We are supposed to match a previous operand.
2945 If we do, we win if that one did.
2946 If we do not, count both of the operands as losers.
2947 (This is too conservative, since most of the time
2948 only a single reload insn will be needed to make
2949 the two operands win. As a result, this alternative
2950 may be rejected when it is actually desirable.) */
2951 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2952 /* If we are matching as if two operands were swapped,
2953 also pretend that operands_match had been computed
2955 But if I is the second of those and C is the first,
2956 don't exchange them, because operands_match is valid
2957 only on one side of its diagonal. */
2959 [(c
== commutative
|| c
== commutative
+ 1)
2960 ? 2 * commutative
+ 1 - c
: c
]
2961 [(i
== commutative
|| i
== commutative
+ 1)
2962 ? 2 * commutative
+ 1 - i
: i
])
2963 : operands_match
[c
][i
])
2965 /* If we are matching a non-offsettable address where an
2966 offsettable address was expected, then we must reject
2967 this combination, because we can't reload it. */
2968 if (this_alternative_offmemok
[c
]
2969 && GET_CODE (recog_data
.operand
[c
]) == MEM
2970 && this_alternative
[c
] == (int) NO_REGS
2971 && ! this_alternative_win
[c
])
2974 did_match
= this_alternative_win
[c
];
2978 /* Operands don't match. */
2980 /* Retroactively mark the operand we had to match
2981 as a loser, if it wasn't already. */
2982 if (this_alternative_win
[c
])
2984 this_alternative_win
[c
] = 0;
2985 if (this_alternative
[c
] == (int) NO_REGS
)
2987 /* But count the pair only once in the total badness of
2988 this alternative, if the pair can be a dummy reload. */
2990 = find_dummy_reload (recog_data
.operand
[i
],
2991 recog_data
.operand
[c
],
2992 recog_data
.operand_loc
[i
],
2993 recog_data
.operand_loc
[c
],
2994 operand_mode
[i
], operand_mode
[c
],
2995 this_alternative
[c
], -1,
2996 this_alternative_earlyclobber
[c
]);
3001 /* This can be fixed with reloads if the operand
3002 we are supposed to match can be fixed with reloads. */
3004 this_alternative
[i
] = this_alternative
[c
];
3006 /* If we have to reload this operand and some previous
3007 operand also had to match the same thing as this
3008 operand, we don't know how to do that. So reject this
3010 if (! did_match
|| force_reload
)
3011 for (j
= 0; j
< i
; j
++)
3012 if (this_alternative_matches
[j
]
3013 == this_alternative_matches
[i
])
3018 /* All necessary reloads for an address_operand
3019 were handled in find_reloads_address. */
3020 this_alternative
[i
] = (int) BASE_REG_CLASS
;
3027 if (GET_CODE (operand
) == MEM
3028 || (GET_CODE (operand
) == REG
3029 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3030 && reg_renumber
[REGNO (operand
)] < 0))
3032 if (CONSTANT_P (operand
)
3033 /* force_const_mem does not accept HIGH. */
3034 && GET_CODE (operand
) != HIGH
)
3040 if (GET_CODE (operand
) == MEM
3041 && ! address_reloaded
[i
]
3042 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3043 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3048 if (GET_CODE (operand
) == MEM
3049 && ! address_reloaded
[i
]
3050 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3051 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3055 /* Memory operand whose address is not offsettable. */
3059 if (GET_CODE (operand
) == MEM
3060 && ! (ind_levels
? offsettable_memref_p (operand
)
3061 : offsettable_nonstrict_memref_p (operand
))
3062 /* Certain mem addresses will become offsettable
3063 after they themselves are reloaded. This is important;
3064 we don't want our own handling of unoffsettables
3065 to override the handling of reg_equiv_address. */
3066 && !(GET_CODE (XEXP (operand
, 0)) == REG
3068 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3072 /* Memory operand whose address is offsettable. */
3076 if ((GET_CODE (operand
) == MEM
3077 /* If IND_LEVELS, find_reloads_address won't reload a
3078 pseudo that didn't get a hard reg, so we have to
3079 reject that case. */
3080 && ((ind_levels
? offsettable_memref_p (operand
)
3081 : offsettable_nonstrict_memref_p (operand
))
3082 /* A reloaded address is offsettable because it is now
3083 just a simple register indirect. */
3084 || address_reloaded
[i
]))
3085 || (GET_CODE (operand
) == REG
3086 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3087 && reg_renumber
[REGNO (operand
)] < 0
3088 /* If reg_equiv_address is nonzero, we will be
3089 loading it into a register; hence it will be
3090 offsettable, but we cannot say that reg_equiv_mem
3091 is offsettable without checking. */
3092 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3093 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3094 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3096 /* force_const_mem does not accept HIGH. */
3097 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3098 || GET_CODE (operand
) == MEM
)
3105 /* Output operand that is stored before the need for the
3106 input operands (and their index registers) is over. */
3107 earlyclobber
= 1, this_earlyclobber
= 1;
3111 #ifndef REAL_ARITHMETIC
3112 /* Match any floating double constant, but only if
3113 we can examine the bits of it reliably. */
3114 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
3115 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
3116 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
3119 if (GET_CODE (operand
) == CONST_DOUBLE
)
3124 if (GET_CODE (operand
) == CONST_DOUBLE
)
3130 if (GET_CODE (operand
) == CONST_DOUBLE
3131 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
3136 if (GET_CODE (operand
) == CONST_INT
3137 || (GET_CODE (operand
) == CONST_DOUBLE
3138 && GET_MODE (operand
) == VOIDmode
))
3141 if (CONSTANT_P (operand
)
3142 #ifdef LEGITIMATE_PIC_OPERAND_P
3143 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3150 if (GET_CODE (operand
) == CONST_INT
3151 || (GET_CODE (operand
) == CONST_DOUBLE
3152 && GET_MODE (operand
) == VOIDmode
))
3164 if (GET_CODE (operand
) == CONST_INT
3165 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
3175 /* A PLUS is never a valid operand, but reload can make
3176 it from a register when eliminating registers. */
3177 && GET_CODE (operand
) != PLUS
3178 /* A SCRATCH is not a valid operand. */
3179 && GET_CODE (operand
) != SCRATCH
3180 #ifdef LEGITIMATE_PIC_OPERAND_P
3181 && (! CONSTANT_P (operand
)
3183 || LEGITIMATE_PIC_OPERAND_P (operand
))
3185 && (GENERAL_REGS
== ALL_REGS
3186 || GET_CODE (operand
) != REG
3187 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3188 && reg_renumber
[REGNO (operand
)] < 0)))
3190 /* Drop through into 'r' case */
3194 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3198 if (REG_CLASS_FROM_LETTER (c
) == NO_REGS
)
3200 #ifdef EXTRA_CONSTRAINT
3201 if (EXTRA_CONSTRAINT (operand
, c
))
3208 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
3210 if (GET_MODE (operand
) == BLKmode
)
3213 if (GET_CODE (operand
) == REG
3214 && reg_fits_class_p (operand
, this_alternative
[i
],
3215 offset
, GET_MODE (recog_data
.operand
[i
])))
3222 /* If this operand could be handled with a reg,
3223 and some reg is allowed, then this operand can be handled. */
3224 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3227 /* Record which operands fit this alternative. */
3228 this_alternative_earlyclobber
[i
] = earlyclobber
;
3229 if (win
&& ! force_reload
)
3230 this_alternative_win
[i
] = 1;
3231 else if (did_match
&& ! force_reload
)
3232 this_alternative_match_win
[i
] = 1;
3235 int const_to_mem
= 0;
3237 this_alternative_offmemok
[i
] = offmemok
;
3241 /* Alternative loses if it has no regs for a reg operand. */
3242 if (GET_CODE (operand
) == REG
3243 && this_alternative
[i
] == (int) NO_REGS
3244 && this_alternative_matches
[i
] < 0)
3247 /* If this is a constant that is reloaded into the desired
3248 class by copying it to memory first, count that as another
3249 reload. This is consistent with other code and is
3250 required to avoid choosing another alternative when
3251 the constant is moved into memory by this function on
3252 an early reload pass. Note that the test here is
3253 precisely the same as in the code below that calls
3255 if (CONSTANT_P (operand
)
3256 /* force_const_mem does not accept HIGH. */
3257 && GET_CODE (operand
) != HIGH
3258 && ((PREFERRED_RELOAD_CLASS (operand
,
3259 (enum reg_class
) this_alternative
[i
])
3261 || no_input_reloads
)
3262 && operand_mode
[i
] != VOIDmode
)
3265 if (this_alternative
[i
] != (int) NO_REGS
)
3269 /* If we can't reload this value at all, reject this
3270 alternative. Note that we could also lose due to
3271 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3274 if (! CONSTANT_P (operand
)
3275 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3276 && (PREFERRED_RELOAD_CLASS (operand
,
3277 (enum reg_class
) this_alternative
[i
])
3281 /* Alternative loses if it requires a type of reload not
3282 permitted for this insn. We can always reload SCRATCH
3283 and objects with a REG_UNUSED note. */
3284 else if (GET_CODE (operand
) != SCRATCH
3285 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3286 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3288 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3292 /* We prefer to reload pseudos over reloading other things,
3293 since such reloads may be able to be eliminated later.
3294 If we are reloading a SCRATCH, we won't be generating any
3295 insns, just using a register, so it is also preferred.
3296 So bump REJECT in other cases. Don't do this in the
3297 case where we are forcing a constant into memory and
3298 it will then win since we don't want to have a different
3299 alternative match then. */
3300 if (! (GET_CODE (operand
) == REG
3301 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3302 && GET_CODE (operand
) != SCRATCH
3303 && ! (const_to_mem
&& constmemok
))
3306 /* Input reloads can be inherited more often than output
3307 reloads can be removed, so penalize output reloads. */
3308 if (operand_type
[i
] != RELOAD_FOR_INPUT
3309 && GET_CODE (operand
) != SCRATCH
)
3313 /* If this operand is a pseudo register that didn't get a hard
3314 reg and this alternative accepts some register, see if the
3315 class that we want is a subset of the preferred class for this
3316 register. If not, but it intersects that class, use the
3317 preferred class instead. If it does not intersect the preferred
3318 class, show that usage of this alternative should be discouraged;
3319 it will be discouraged more still if the register is `preferred
3320 or nothing'. We do this because it increases the chance of
3321 reusing our spill register in a later insn and avoiding a pair
3322 of memory stores and loads.
3324 Don't bother with this if this alternative will accept this
3327 Don't do this for a multiword operand, since it is only a
3328 small win and has the risk of requiring more spill registers,
3329 which could cause a large loss.
3331 Don't do this if the preferred class has only one register
3332 because we might otherwise exhaust the class. */
3334 if (! win
&& ! did_match
3335 && this_alternative
[i
] != (int) NO_REGS
3336 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3337 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3339 if (! reg_class_subset_p (this_alternative
[i
],
3340 preferred_class
[i
]))
3342 /* Since we don't have a way of forming the intersection,
3343 we just do something special if the preferred class
3344 is a subset of the class we have; that's the most
3345 common case anyway. */
3346 if (reg_class_subset_p (preferred_class
[i
],
3347 this_alternative
[i
]))
3348 this_alternative
[i
] = (int) preferred_class
[i
];
3350 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3355 /* Now see if any output operands that are marked "earlyclobber"
3356 in this alternative conflict with any input operands
3357 or any memory addresses. */
3359 for (i
= 0; i
< noperands
; i
++)
3360 if (this_alternative_earlyclobber
[i
]
3361 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3363 struct decomposition early_data
;
3365 early_data
= decompose (recog_data
.operand
[i
]);
3367 if (modified
[i
] == RELOAD_READ
)
3370 if (this_alternative
[i
] == NO_REGS
)
3372 this_alternative_earlyclobber
[i
] = 0;
3373 if (this_insn_is_asm
)
3374 error_for_asm (this_insn
,
3375 "`&' constraint used with no register class");
3380 for (j
= 0; j
< noperands
; j
++)
3381 /* Is this an input operand or a memory ref? */
3382 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3383 || modified
[j
] != RELOAD_WRITE
)
3385 /* Ignore things like match_operator operands. */
3386 && *recog_data
.constraints
[j
] != 0
3387 /* Don't count an input operand that is constrained to match
3388 the early clobber operand. */
3389 && ! (this_alternative_matches
[j
] == i
3390 && rtx_equal_p (recog_data
.operand
[i
],
3391 recog_data
.operand
[j
]))
3392 /* Is it altered by storing the earlyclobber operand? */
3393 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3396 /* If the output is in a single-reg class,
3397 it's costly to reload it, so reload the input instead. */
3398 if (reg_class_size
[this_alternative
[i
]] == 1
3399 && (GET_CODE (recog_data
.operand
[j
]) == REG
3400 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3403 this_alternative_win
[j
] = 0;
3404 this_alternative_match_win
[j
] = 0;
3409 /* If an earlyclobber operand conflicts with something,
3410 it must be reloaded, so request this and count the cost. */
3414 this_alternative_win
[i
] = 0;
3415 this_alternative_match_win
[j
] = 0;
3416 for (j
= 0; j
< noperands
; j
++)
3417 if (this_alternative_matches
[j
] == i
3418 && this_alternative_match_win
[j
])
3420 this_alternative_win
[j
] = 0;
3421 this_alternative_match_win
[j
] = 0;
3427 /* If one alternative accepts all the operands, no reload required,
3428 choose that alternative; don't consider the remaining ones. */
3431 /* Unswap these so that they are never swapped at `finish'. */
3432 if (commutative
>= 0)
3434 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3435 recog_data
.operand
[commutative
+ 1]
3436 = substed_operand
[commutative
+ 1];
3438 for (i
= 0; i
< noperands
; i
++)
3440 goal_alternative_win
[i
] = this_alternative_win
[i
];
3441 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3442 goal_alternative
[i
] = this_alternative
[i
];
3443 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3444 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3445 goal_alternative_earlyclobber
[i
]
3446 = this_alternative_earlyclobber
[i
];
3448 goal_alternative_number
= this_alternative_number
;
3449 goal_alternative_swapped
= swapped
;
3450 goal_earlyclobber
= this_earlyclobber
;
3454 /* REJECT, set by the ! and ? constraint characters and when a register
3455 would be reloaded into a non-preferred class, discourages the use of
3456 this alternative for a reload goal. REJECT is incremented by six
3457 for each ? and two for each non-preferred class. */
3458 losers
= losers
* 6 + reject
;
3460 /* If this alternative can be made to work by reloading,
3461 and it needs less reloading than the others checked so far,
3462 record it as the chosen goal for reloading. */
3463 if (! bad
&& best
> losers
)
3465 for (i
= 0; i
< noperands
; i
++)
3467 goal_alternative
[i
] = this_alternative
[i
];
3468 goal_alternative_win
[i
] = this_alternative_win
[i
];
3469 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3470 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3471 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3472 goal_alternative_earlyclobber
[i
]
3473 = this_alternative_earlyclobber
[i
];
3475 goal_alternative_swapped
= swapped
;
3477 goal_alternative_number
= this_alternative_number
;
3478 goal_earlyclobber
= this_earlyclobber
;
3482 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3483 then we need to try each alternative twice,
3484 the second time matching those two operands
3485 as if we had exchanged them.
3486 To do this, really exchange them in operands.
3488 If we have just tried the alternatives the second time,
3489 return operands to normal and drop through. */
3491 if (commutative
>= 0)
3496 register enum reg_class tclass
;
3499 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3500 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3502 tclass
= preferred_class
[commutative
];
3503 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3504 preferred_class
[commutative
+ 1] = tclass
;
3506 t
= pref_or_nothing
[commutative
];
3507 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3508 pref_or_nothing
[commutative
+ 1] = t
;
3510 memcpy (constraints
, recog_data
.constraints
,
3511 noperands
* sizeof (char *));
3516 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3517 recog_data
.operand
[commutative
+ 1]
3518 = substed_operand
[commutative
+ 1];
3522 /* The operands don't meet the constraints.
3523 goal_alternative describes the alternative
3524 that we could reach by reloading the fewest operands.
3525 Reload so as to fit it. */
3527 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3529 /* No alternative works with reloads?? */
3530 if (insn_code_number
>= 0)
3531 fatal_insn ("Unable to generate reloads for:", insn
);
3532 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3533 /* Avoid further trouble with this insn. */
3534 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3539 /* Jump to `finish' from above if all operands are valid already.
3540 In that case, goal_alternative_win is all 1. */
3543 /* Right now, for any pair of operands I and J that are required to match,
3545 goal_alternative_matches[J] is I.
3546 Set up goal_alternative_matched as the inverse function:
3547 goal_alternative_matched[I] = J. */
3549 for (i
= 0; i
< noperands
; i
++)
3550 goal_alternative_matched
[i
] = -1;
3552 for (i
= 0; i
< noperands
; i
++)
3553 if (! goal_alternative_win
[i
]
3554 && goal_alternative_matches
[i
] >= 0)
3555 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3557 for (i
= 0; i
< noperands
; i
++)
3558 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3560 /* If the best alternative is with operands 1 and 2 swapped,
3561 consider them swapped before reporting the reloads. Update the
3562 operand numbers of any reloads already pushed. */
3564 if (goal_alternative_swapped
)
3568 tem
= substed_operand
[commutative
];
3569 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3570 substed_operand
[commutative
+ 1] = tem
;
3571 tem
= recog_data
.operand
[commutative
];
3572 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3573 recog_data
.operand
[commutative
+ 1] = tem
;
3574 tem
= *recog_data
.operand_loc
[commutative
];
3575 *recog_data
.operand_loc
[commutative
]
3576 = *recog_data
.operand_loc
[commutative
+ 1];
3577 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3579 for (i
= 0; i
< n_reloads
; i
++)
3581 if (rld
[i
].opnum
== commutative
)
3582 rld
[i
].opnum
= commutative
+ 1;
3583 else if (rld
[i
].opnum
== commutative
+ 1)
3584 rld
[i
].opnum
= commutative
;
3588 for (i
= 0; i
< noperands
; i
++)
3590 operand_reloadnum
[i
] = -1;
3592 /* If this is an earlyclobber operand, we need to widen the scope.
3593 The reload must remain valid from the start of the insn being
3594 reloaded until after the operand is stored into its destination.
3595 We approximate this with RELOAD_OTHER even though we know that we
3596 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3598 One special case that is worth checking is when we have an
3599 output that is earlyclobber but isn't used past the insn (typically
3600 a SCRATCH). In this case, we only need have the reload live
3601 through the insn itself, but not for any of our input or output
3603 But we must not accidentally narrow the scope of an existing
3604 RELOAD_OTHER reload - leave these alone.
3606 In any case, anything needed to address this operand can remain
3607 however they were previously categorized. */
3609 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3611 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3612 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3615 /* Any constants that aren't allowed and can't be reloaded
3616 into registers are here changed into memory references. */
3617 for (i
= 0; i
< noperands
; i
++)
3618 if (! goal_alternative_win
[i
]
3619 && CONSTANT_P (recog_data
.operand
[i
])
3620 /* force_const_mem does not accept HIGH. */
3621 && GET_CODE (recog_data
.operand
[i
]) != HIGH
3622 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3623 (enum reg_class
) goal_alternative
[i
])
3625 || no_input_reloads
)
3626 && operand_mode
[i
] != VOIDmode
)
3628 substed_operand
[i
] = recog_data
.operand
[i
]
3629 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3630 recog_data
.operand
[i
]),
3631 i
, address_type
[i
], ind_levels
, 0, insn
,
3633 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3634 goal_alternative_number
))
3635 goal_alternative_win
[i
] = 1;
3638 /* Record the values of the earlyclobber operands for the caller. */
3639 if (goal_earlyclobber
)
3640 for (i
= 0; i
< noperands
; i
++)
3641 if (goal_alternative_earlyclobber
[i
])
3642 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3644 /* Now record reloads for all the operands that need them. */
3645 for (i
= 0; i
< noperands
; i
++)
3646 if (! goal_alternative_win
[i
])
3648 /* Operands that match previous ones have already been handled. */
3649 if (goal_alternative_matches
[i
] >= 0)
3651 /* Handle an operand with a nonoffsettable address
3652 appearing where an offsettable address will do
3653 by reloading the address into a base register.
3655 ??? We can also do this when the operand is a register and
3656 reg_equiv_mem is not offsettable, but this is a bit tricky,
3657 so we don't bother with it. It may not be worth doing. */
3658 else if (goal_alternative_matched
[i
] == -1
3659 && goal_alternative_offmemok
[i
]
3660 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3662 operand_reloadnum
[i
]
3663 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3664 &XEXP (recog_data
.operand
[i
], 0), (rtx
*)0,
3666 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3667 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3668 rld
[operand_reloadnum
[i
]].inc
3669 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3671 /* If this operand is an output, we will have made any
3672 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3673 now we are treating part of the operand as an input, so
3674 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3676 if (modified
[i
] == RELOAD_WRITE
)
3678 for (j
= 0; j
< n_reloads
; j
++)
3680 if (rld
[j
].opnum
== i
)
3682 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3683 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3684 else if (rld
[j
].when_needed
3685 == RELOAD_FOR_OUTADDR_ADDRESS
)
3686 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3691 else if (goal_alternative_matched
[i
] == -1)
3693 operand_reloadnum
[i
]
3694 = push_reload ((modified
[i
] != RELOAD_WRITE
3695 ? recog_data
.operand
[i
] : 0),
3696 (modified
[i
] != RELOAD_READ
3697 ? recog_data
.operand
[i
] : 0),
3698 (modified
[i
] != RELOAD_WRITE
3699 ? recog_data
.operand_loc
[i
] : 0),
3700 (modified
[i
] != RELOAD_READ
3701 ? recog_data
.operand_loc
[i
] : 0),
3702 (enum reg_class
) goal_alternative
[i
],
3703 (modified
[i
] == RELOAD_WRITE
3704 ? VOIDmode
: operand_mode
[i
]),
3705 (modified
[i
] == RELOAD_READ
3706 ? VOIDmode
: operand_mode
[i
]),
3707 (insn_code_number
< 0 ? 0
3708 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3709 0, i
, operand_type
[i
]);
3711 /* In a matching pair of operands, one must be input only
3712 and the other must be output only.
3713 Pass the input operand as IN and the other as OUT. */
3714 else if (modified
[i
] == RELOAD_READ
3715 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3717 operand_reloadnum
[i
]
3718 = push_reload (recog_data
.operand
[i
],
3719 recog_data
.operand
[goal_alternative_matched
[i
]],
3720 recog_data
.operand_loc
[i
],
3721 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3722 (enum reg_class
) goal_alternative
[i
],
3724 operand_mode
[goal_alternative_matched
[i
]],
3725 0, 0, i
, RELOAD_OTHER
);
3726 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3728 else if (modified
[i
] == RELOAD_WRITE
3729 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3731 operand_reloadnum
[goal_alternative_matched
[i
]]
3732 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3733 recog_data
.operand
[i
],
3734 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3735 recog_data
.operand_loc
[i
],
3736 (enum reg_class
) goal_alternative
[i
],
3737 operand_mode
[goal_alternative_matched
[i
]],
3739 0, 0, i
, RELOAD_OTHER
);
3740 operand_reloadnum
[i
] = output_reloadnum
;
3742 else if (insn_code_number
>= 0)
3746 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3747 /* Avoid further trouble with this insn. */
3748 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3753 else if (goal_alternative_matched
[i
] < 0
3754 && goal_alternative_matches
[i
] < 0
3757 /* For each non-matching operand that's a MEM or a pseudo-register
3758 that didn't get a hard register, make an optional reload.
3759 This may get done even if the insn needs no reloads otherwise. */
3761 rtx operand
= recog_data
.operand
[i
];
3763 while (GET_CODE (operand
) == SUBREG
)
3764 operand
= SUBREG_REG (operand
);
3765 if ((GET_CODE (operand
) == MEM
3766 || (GET_CODE (operand
) == REG
3767 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3768 /* If this is only for an output, the optional reload would not
3769 actually cause us to use a register now, just note that
3770 something is stored here. */
3771 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3772 || modified
[i
] == RELOAD_WRITE
)
3773 && ! no_input_reloads
3774 /* An optional output reload might allow to delete INSN later.
3775 We mustn't make in-out reloads on insns that are not permitted
3777 If this is an asm, we can't delete it; we must not even call
3778 push_reload for an optional output reload in this case,
3779 because we can't be sure that the constraint allows a register,
3780 and push_reload verifies the constraints for asms. */
3781 && (modified
[i
] == RELOAD_READ
3782 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3783 operand_reloadnum
[i
]
3784 = push_reload ((modified
[i
] != RELOAD_WRITE
3785 ? recog_data
.operand
[i
] : 0),
3786 (modified
[i
] != RELOAD_READ
3787 ? recog_data
.operand
[i
] : 0),
3788 (modified
[i
] != RELOAD_WRITE
3789 ? recog_data
.operand_loc
[i
] : 0),
3790 (modified
[i
] != RELOAD_READ
3791 ? recog_data
.operand_loc
[i
] : 0),
3792 (enum reg_class
) goal_alternative
[i
],
3793 (modified
[i
] == RELOAD_WRITE
3794 ? VOIDmode
: operand_mode
[i
]),
3795 (modified
[i
] == RELOAD_READ
3796 ? VOIDmode
: operand_mode
[i
]),
3797 (insn_code_number
< 0 ? 0
3798 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3799 1, i
, operand_type
[i
]);
3800 /* If a memory reference remains (either as a MEM or a pseudo that
3801 did not get a hard register), yet we can't make an optional
3802 reload, check if this is actually a pseudo register reference;
3803 we then need to emit a USE and/or a CLOBBER so that reload
3804 inheritance will do the right thing. */
3806 && (GET_CODE (operand
) == MEM
3807 || (GET_CODE (operand
) == REG
3808 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3809 && reg_renumber
[REGNO (operand
)] < 0)))
3811 operand
= *recog_data
.operand_loc
[i
];
3813 while (GET_CODE (operand
) == SUBREG
)
3814 operand
= SUBREG_REG (operand
);
3815 if (GET_CODE (operand
) == REG
)
3817 if (modified
[i
] != RELOAD_WRITE
)
3818 emit_insn_before (gen_rtx_USE (VOIDmode
, operand
), insn
);
3819 if (modified
[i
] != RELOAD_READ
)
3820 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3824 else if (goal_alternative_matches
[i
] >= 0
3825 && goal_alternative_win
[goal_alternative_matches
[i
]]
3826 && modified
[i
] == RELOAD_READ
3827 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3828 && ! no_input_reloads
&& ! no_output_reloads
3831 /* Similarly, make an optional reload for a pair of matching
3832 objects that are in MEM or a pseudo that didn't get a hard reg. */
3834 rtx operand
= recog_data
.operand
[i
];
3836 while (GET_CODE (operand
) == SUBREG
)
3837 operand
= SUBREG_REG (operand
);
3838 if ((GET_CODE (operand
) == MEM
3839 || (GET_CODE (operand
) == REG
3840 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3841 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3843 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3844 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
3845 recog_data
.operand
[i
],
3846 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
3847 recog_data
.operand_loc
[i
],
3848 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3849 operand_mode
[goal_alternative_matches
[i
]],
3851 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3854 /* Perform whatever substitutions on the operands we are supposed
3855 to make due to commutativity or replacement of registers
3856 with equivalent constants or memory slots. */
3858 for (i
= 0; i
< noperands
; i
++)
3860 /* We only do this on the last pass through reload, because it is
3861 possible for some data (like reg_equiv_address) to be changed during
3862 later passes. Moreover, we loose the opportunity to get a useful
3863 reload_{in,out}_reg when we do these replacements. */
3867 rtx substitution
= substed_operand
[i
];
3869 *recog_data
.operand_loc
[i
] = substitution
;
3871 /* If we're replacing an operand with a LABEL_REF, we need
3872 to make sure that there's a REG_LABEL note attached to
3873 this instruction. */
3874 if (GET_CODE (insn
) != JUMP_INSN
3875 && GET_CODE (substitution
) == LABEL_REF
3876 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
3877 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
,
3878 XEXP (substitution
, 0),
3882 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
3885 /* If this insn pattern contains any MATCH_DUP's, make sure that
3886 they will be substituted if the operands they match are substituted.
3887 Also do now any substitutions we already did on the operands.
3889 Don't do this if we aren't making replacements because we might be
3890 propagating things allocated by frame pointer elimination into places
3891 it doesn't expect. */
3893 if (insn_code_number
>= 0 && replace
)
3894 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
3896 int opno
= recog_data
.dup_num
[i
];
3897 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
3898 if (operand_reloadnum
[opno
] >= 0)
3899 push_replacement (recog_data
.dup_loc
[i
], operand_reloadnum
[opno
],
3900 insn_data
[insn_code_number
].operand
[opno
].mode
);
3904 /* This loses because reloading of prior insns can invalidate the equivalence
3905 (or at least find_equiv_reg isn't smart enough to find it any more),
3906 causing this insn to need more reload regs than it needed before.
3907 It may be too late to make the reload regs available.
3908 Now this optimization is done safely in choose_reload_regs. */
3910 /* For each reload of a reg into some other class of reg,
3911 search for an existing equivalent reg (same value now) in the right class.
3912 We can use it as long as we don't need to change its contents. */
3913 for (i
= 0; i
< n_reloads
; i
++)
3914 if (rld
[i
].reg_rtx
== 0
3916 && GET_CODE (rld
[i
].in
) == REG
3920 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
3921 static_reload_reg_p
, 0, rld
[i
].inmode
);
3922 /* Prevent generation of insn to load the value
3923 because the one we found already has the value. */
3925 rld
[i
].in
= rld
[i
].reg_rtx
;
3929 /* Perhaps an output reload can be combined with another
3930 to reduce needs by one. */
3931 if (!goal_earlyclobber
)
3934 /* If we have a pair of reloads for parts of an address, they are reloading
3935 the same object, the operands themselves were not reloaded, and they
3936 are for two operands that are supposed to match, merge the reloads and
3937 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3939 for (i
= 0; i
< n_reloads
; i
++)
3943 for (j
= i
+ 1; j
< n_reloads
; j
++)
3944 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3945 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3946 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3947 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3948 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3949 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3950 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3951 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3952 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
3953 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3954 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
3955 && (operand_reloadnum
[rld
[j
].opnum
] < 0
3956 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
3957 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
3958 || (goal_alternative_matches
[rld
[j
].opnum
]
3961 for (k
= 0; k
< n_replacements
; k
++)
3962 if (replacements
[k
].what
== j
)
3963 replacements
[k
].what
= i
;
3965 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3966 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3967 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3969 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3974 /* Scan all the reloads and update their type.
3975 If a reload is for the address of an operand and we didn't reload
3976 that operand, change the type. Similarly, change the operand number
3977 of a reload when two operands match. If a reload is optional, treat it
3978 as though the operand isn't reloaded.
3980 ??? This latter case is somewhat odd because if we do the optional
3981 reload, it means the object is hanging around. Thus we need only
3982 do the address reload if the optional reload was NOT done.
3984 Change secondary reloads to be the address type of their operand, not
3987 If an operand's reload is now RELOAD_OTHER, change any
3988 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3989 RELOAD_FOR_OTHER_ADDRESS. */
3991 for (i
= 0; i
< n_reloads
; i
++)
3993 if (rld
[i
].secondary_p
3994 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
3995 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
3997 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3998 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3999 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4000 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4001 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4002 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
4004 /* If we have a secondary reload to go along with this reload,
4005 change its type to RELOAD_FOR_OPADDR_ADDR. */
4007 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4008 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4009 && rld
[i
].secondary_in_reload
!= -1)
4011 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4013 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4015 /* If there's a tertiary reload we have to change it also. */
4016 if (secondary_in_reload
> 0
4017 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4018 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4019 = RELOAD_FOR_OPADDR_ADDR
;
4022 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4023 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4024 && rld
[i
].secondary_out_reload
!= -1)
4026 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4028 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4030 /* If there's a tertiary reload we have to change it also. */
4031 if (secondary_out_reload
4032 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4033 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4034 = RELOAD_FOR_OPADDR_ADDR
;
4037 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4038 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4039 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4041 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4044 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4045 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4046 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4047 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4049 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4051 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4052 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4055 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4056 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4057 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4059 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4060 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4061 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4062 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4063 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4064 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4065 This is complicated by the fact that a single operand can have more
4066 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4067 choose_reload_regs without affecting code quality, and cases that
4068 actually fail are extremely rare, so it turns out to be better to fix
4069 the problem here by not generating cases that choose_reload_regs will
4071 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4072 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4074 We can reduce the register pressure by exploiting that a
4075 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4076 does not conflict with any of them, if it is only used for the first of
4077 the RELOAD_FOR_X_ADDRESS reloads. */
4079 int first_op_addr_num
= -2;
4080 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4081 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4082 int need_change
= 0;
4083 /* We use last_op_addr_reload and the contents of the above arrays
4084 first as flags - -2 means no instance encountered, -1 means exactly
4085 one instance encountered.
4086 If more than one instance has been encountered, we store the reload
4087 number of the first reload of the kind in question; reload numbers
4088 are known to be non-negative. */
4089 for (i
= 0; i
< noperands
; i
++)
4090 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4091 for (i
= n_reloads
- 1; i
>= 0; i
--)
4093 switch (rld
[i
].when_needed
)
4095 case RELOAD_FOR_OPERAND_ADDRESS
:
4096 if (++first_op_addr_num
>= 0)
4098 first_op_addr_num
= i
;
4102 case RELOAD_FOR_INPUT_ADDRESS
:
4103 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4105 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4109 case RELOAD_FOR_OUTPUT_ADDRESS
:
4110 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4112 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4123 for (i
= 0; i
< n_reloads
; i
++)
4126 enum reload_type type
;
4128 switch (rld
[i
].when_needed
)
4130 case RELOAD_FOR_OPADDR_ADDR
:
4131 first_num
= first_op_addr_num
;
4132 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4134 case RELOAD_FOR_INPADDR_ADDRESS
:
4135 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4136 type
= RELOAD_FOR_INPUT_ADDRESS
;
4138 case RELOAD_FOR_OUTADDR_ADDRESS
:
4139 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4140 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4147 else if (i
> first_num
)
4148 rld
[i
].when_needed
= type
;
4151 /* Check if the only TYPE reload that uses reload I is
4152 reload FIRST_NUM. */
4153 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4155 if (rld
[j
].when_needed
== type
4156 && (rld
[i
].secondary_p
4157 ? rld
[j
].secondary_in_reload
== i
4158 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4160 rld
[i
].when_needed
= type
;
4169 /* See if we have any reloads that are now allowed to be merged
4170 because we've changed when the reload is needed to
4171 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4172 check for the most common cases. */
4174 for (i
= 0; i
< n_reloads
; i
++)
4175 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4176 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4177 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4178 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4179 for (j
= 0; j
< n_reloads
; j
++)
4180 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4181 && rld
[j
].when_needed
== rld
[i
].when_needed
4182 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4183 && rld
[i
].class == rld
[j
].class
4184 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4185 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4187 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4188 transfer_replacements (i
, j
);
4193 /* If we made any reloads for addresses, see if they violate a
4194 "no input reloads" requirement for this insn. But loads that we
4195 do after the insn (such as for output addresses) are fine. */
4196 if (no_input_reloads
)
4197 for (i
= 0; i
< n_reloads
; i
++)
4199 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
4200 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
)
4204 /* Compute reload_mode and reload_nregs. */
4205 for (i
= 0; i
< n_reloads
; i
++)
4208 = (rld
[i
].inmode
== VOIDmode
4209 || (GET_MODE_SIZE (rld
[i
].outmode
)
4210 > GET_MODE_SIZE (rld
[i
].inmode
)))
4211 ? rld
[i
].outmode
: rld
[i
].inmode
;
4213 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4219 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4220 accepts a memory operand with constant address. */
4223 alternative_allows_memconst (constraint
, altnum
)
4224 const char *constraint
;
4228 /* Skip alternatives before the one requested. */
4231 while (*constraint
++ != ',');
4234 /* Scan the requested alternative for 'm' or 'o'.
4235 If one of them is present, this alternative accepts memory constants. */
4236 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
4237 if (c
== 'm' || c
== 'o')
4242 /* Scan X for memory references and scan the addresses for reloading.
4243 Also checks for references to "constant" regs that we want to eliminate
4244 and replaces them with the values they stand for.
4245 We may alter X destructively if it contains a reference to such.
4246 If X is just a constant reg, we return the equivalent value
4249 IND_LEVELS says how many levels of indirect addressing this machine
4252 OPNUM and TYPE identify the purpose of the reload.
4254 IS_SET_DEST is true if X is the destination of a SET, which is not
4255 appropriate to be replaced by a constant.
4257 INSN, if nonzero, is the insn in which we do the reload. It is used
4258 to determine if we may generate output reloads, and where to put USEs
4259 for pseudos that we have to replace with stack slots.
4261 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4262 result of find_reloads_address. */
4265 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
, insn
,
4269 enum reload_type type
;
4273 int *address_reloaded
;
4275 register RTX_CODE code
= GET_CODE (x
);
4277 register const char *fmt
= GET_RTX_FORMAT (code
);
4283 /* This code is duplicated for speed in find_reloads. */
4284 register int regno
= REGNO (x
);
4285 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4286 x
= reg_equiv_constant
[regno
];
4288 /* This creates (subreg (mem...)) which would cause an unnecessary
4289 reload of the mem. */
4290 else if (reg_equiv_mem
[regno
] != 0)
4291 x
= reg_equiv_mem
[regno
];
4293 else if (reg_equiv_memory_loc
[regno
]
4294 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4296 rtx mem
= make_memloc (x
, regno
);
4297 if (reg_equiv_address
[regno
]
4298 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4300 /* If this is not a toplevel operand, find_reloads doesn't see
4301 this substitution. We have to emit a USE of the pseudo so
4302 that delete_output_reload can see it. */
4303 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4304 emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
);
4306 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4307 opnum
, type
, ind_levels
, insn
);
4308 if (address_reloaded
)
4309 *address_reloaded
= i
;
4318 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4319 opnum
, type
, ind_levels
, insn
);
4320 if (address_reloaded
)
4321 *address_reloaded
= i
;
4326 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4328 /* Check for SUBREG containing a REG that's equivalent to a constant.
4329 If the constant has a known value, truncate it right now.
4330 Similarly if we are extracting a single-word of a multi-word
4331 constant. If the constant is symbolic, allow it to be substituted
4332 normally. push_reload will strip the subreg later. If the
4333 constant is VOIDmode, abort because we will lose the mode of
4334 the register (this should never happen because one of the cases
4335 above should handle it). */
4337 register int regno
= REGNO (SUBREG_REG (x
));
4340 if (subreg_lowpart_p (x
)
4341 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4342 && reg_equiv_constant
[regno
] != 0
4343 && (tem
= gen_lowpart_common (GET_MODE (x
),
4344 reg_equiv_constant
[regno
])) != 0)
4347 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
4348 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4349 && reg_equiv_constant
[regno
] != 0
4350 && (tem
= operand_subword (reg_equiv_constant
[regno
],
4351 SUBREG_BYTE (x
) / UNITS_PER_WORD
, 0,
4352 GET_MODE (SUBREG_REG (x
)))) != 0)
4354 /* TEM is now a word sized constant for the bits from X that
4355 we wanted. However, TEM may be the wrong representation.
4357 Use gen_lowpart_common to convert a CONST_INT into a
4358 CONST_DOUBLE and vice versa as needed according to by the mode
4360 tem
= gen_lowpart_common (GET_MODE (x
), tem
);
4366 /* If the SUBREG is wider than a word, the above test will fail.
4367 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4368 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4369 a 32 bit target. We still can - and have to - handle this
4370 for non-paradoxical subregs of CONST_INTs. */
4371 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4372 && reg_equiv_constant
[regno
] != 0
4373 && GET_CODE (reg_equiv_constant
[regno
]) == CONST_INT
4374 && (GET_MODE_SIZE (GET_MODE (x
))
4375 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
4377 int shift
= SUBREG_BYTE (x
) * BITS_PER_UNIT
;
4378 if (WORDS_BIG_ENDIAN
)
4379 shift
= (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4380 - GET_MODE_BITSIZE (GET_MODE (x
))
4382 /* Here we use the knowledge that CONST_INTs have a
4383 HOST_WIDE_INT field. */
4384 if (shift
>= HOST_BITS_PER_WIDE_INT
)
4385 shift
= HOST_BITS_PER_WIDE_INT
- 1;
4386 return GEN_INT (INTVAL (reg_equiv_constant
[regno
]) >> shift
);
4389 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4390 && reg_equiv_constant
[regno
] != 0
4391 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
4394 /* If the subreg contains a reg that will be converted to a mem,
4395 convert the subreg to a narrower memref now.
4396 Otherwise, we would get (subreg (mem ...) ...),
4397 which would force reload of the mem.
4399 We also need to do this if there is an equivalent MEM that is
4400 not offsettable. In that case, alter_subreg would produce an
4401 invalid address on big-endian machines.
4403 For machines that extend byte loads, we must not reload using
4404 a wider mode if we have a paradoxical SUBREG. find_reloads will
4405 force a reload in that case. So we should not do anything here. */
4407 else if (regno
>= FIRST_PSEUDO_REGISTER
4408 #ifdef LOAD_EXTEND_OP
4409 && (GET_MODE_SIZE (GET_MODE (x
))
4410 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4412 && (reg_equiv_address
[regno
] != 0
4413 || (reg_equiv_mem
[regno
] != 0
4414 && (! strict_memory_address_p (GET_MODE (x
),
4415 XEXP (reg_equiv_mem
[regno
], 0))
4416 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4417 || num_not_at_initial_offset
))))
4418 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4421 else if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == MEM
4422 && (GET_MODE_SIZE (GET_MODE (x
))
4423 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4424 && mode_dependent_address_p (XEXP (SUBREG_REG (x
), 0)))
4426 /* A paradoxical subreg will simply have the mode of the access
4427 changed, so we need to reload such a memory operand to stabilize
4428 the meaning of the memory access. */
4429 enum machine_mode subreg_mode
= GET_MODE (SUBREG_REG (x
));
4431 /* SUBREG_REG (x) is a MEM, so we cant take the offset, instead we
4432 calculate the register number as :
4433 SUBREG_BYTE (x) / GET_MODE_SIZE (subreg_mode) */
4435 push_reload (NULL_RTX
, SUBREG_REG (x
), (rtx
*)0, &SUBREG_REG (x
),
4436 find_valid_class (subreg_mode
,
4437 SUBREG_BYTE (x
) / GET_MODE_SIZE (subreg_mode
)),
4438 VOIDmode
, subreg_mode
, 0, 0, opnum
, type
);
4440 push_reload (SUBREG_REG (x
), NULL_RTX
, &SUBREG_REG (x
), (rtx
*)0,
4441 find_valid_class (subreg_mode
,
4442 SUBREG_BYTE (x
) / GET_MODE_SIZE (subreg_mode
)),
4443 subreg_mode
, VOIDmode
, 0, 0, opnum
, type
);
4446 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4450 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4451 ind_levels
, is_set_dest
, insn
,
4453 /* If we have replaced a reg with it's equivalent memory loc -
4454 that can still be handled here e.g. if it's in a paradoxical
4455 subreg - we must make the change in a copy, rather than using
4456 a destructive change. This way, find_reloads can still elect
4457 not to do the change. */
4458 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4460 x
= shallow_copy_rtx (x
);
4463 XEXP (x
, i
) = new_part
;
4469 /* Return a mem ref for the memory equivalent of reg REGNO.
4470 This mem ref is not shared with anything. */
4473 make_memloc (ad
, regno
)
4477 /* We must rerun eliminate_regs, in case the elimination
4478 offsets have changed. */
4480 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4482 /* If TEM might contain a pseudo, we must copy it to avoid
4483 modifying it when we do the substitution for the reload. */
4484 if (rtx_varies_p (tem
, 0))
4485 tem
= copy_rtx (tem
);
4487 tem
= replace_equiv_address_nv (reg_equiv_memory_loc
[regno
], tem
);
4488 return adjust_address_nv (tem
, GET_MODE (ad
), 0);
4491 /* Record all reloads needed for handling memory address AD
4492 which appears in *LOC in a memory reference to mode MODE
4493 which itself is found in location *MEMREFLOC.
4494 Note that we take shortcuts assuming that no multi-reg machine mode
4495 occurs as part of an address.
4497 OPNUM and TYPE specify the purpose of this reload.
4499 IND_LEVELS says how many levels of indirect addressing this machine
4502 INSN, if nonzero, is the insn in which we do the reload. It is used
4503 to determine if we may generate output reloads, and where to put USEs
4504 for pseudos that we have to replace with stack slots.
4506 Value is nonzero if this address is reloaded or replaced as a whole.
4507 This is interesting to the caller if the address is an autoincrement.
4509 Note that there is no verification that the address will be valid after
4510 this routine does its work. Instead, we rely on the fact that the address
4511 was valid when reload started. So we need only undo things that reload
4512 could have broken. These are wrong register types, pseudos not allocated
4513 to a hard register, and frame pointer elimination. */
4516 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4517 enum machine_mode mode
;
4522 enum reload_type type
;
4527 int removed_and
= 0;
4530 /* If the address is a register, see if it is a legitimate address and
4531 reload if not. We first handle the cases where we need not reload
4532 or where we must reload in a non-standard way. */
4534 if (GET_CODE (ad
) == REG
)
4538 /* If the register is equivalent to an invariant expression, substitute
4539 the invariant, and eliminate any eliminable register references. */
4540 tem
= reg_equiv_constant
[regno
];
4542 && (tem
= eliminate_regs (tem
, mode
, insn
))
4543 && strict_memory_address_p (mode
, tem
))
4549 tem
= reg_equiv_memory_loc
[regno
];
4552 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4554 tem
= make_memloc (ad
, regno
);
4555 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4557 find_reloads_address (GET_MODE (tem
), (rtx
*)0, XEXP (tem
, 0),
4558 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
4561 /* We can avoid a reload if the register's equivalent memory
4562 expression is valid as an indirect memory address.
4563 But not all addresses are valid in a mem used as an indirect
4564 address: only reg or reg+constant. */
4567 && strict_memory_address_p (mode
, tem
)
4568 && (GET_CODE (XEXP (tem
, 0)) == REG
4569 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4570 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4571 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4573 /* TEM is not the same as what we'll be replacing the
4574 pseudo with after reload, put a USE in front of INSN
4575 in the final reload pass. */
4577 && num_not_at_initial_offset
4578 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4581 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4582 /* This doesn't really count as replacing the address
4583 as a whole, since it is still a memory access. */
4591 /* The only remaining case where we can avoid a reload is if this is a
4592 hard register that is valid as a base register and which is not the
4593 subject of a CLOBBER in this insn. */
4595 else if (regno
< FIRST_PSEUDO_REGISTER
4596 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4597 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4600 /* If we do not have one of the cases above, we must do the reload. */
4601 push_reload (ad
, NULL_RTX
, loc
, (rtx
*)0, BASE_REG_CLASS
,
4602 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4606 if (strict_memory_address_p (mode
, ad
))
4608 /* The address appears valid, so reloads are not needed.
4609 But the address may contain an eliminable register.
4610 This can happen because a machine with indirect addressing
4611 may consider a pseudo register by itself a valid address even when
4612 it has failed to get a hard reg.
4613 So do a tree-walk to find and eliminate all such regs. */
4615 /* But first quickly dispose of a common case. */
4616 if (GET_CODE (ad
) == PLUS
4617 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4618 && GET_CODE (XEXP (ad
, 0)) == REG
4619 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4622 subst_reg_equivs_changed
= 0;
4623 *loc
= subst_reg_equivs (ad
, insn
);
4625 if (! subst_reg_equivs_changed
)
4628 /* Check result for validity after substitution. */
4629 if (strict_memory_address_p (mode
, ad
))
4633 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4638 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4643 *memrefloc
= copy_rtx (*memrefloc
);
4644 XEXP (*memrefloc
, 0) = ad
;
4645 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4651 /* The address is not valid. We have to figure out why. First see if
4652 we have an outer AND and remove it if so. Then analyze what's inside. */
4654 if (GET_CODE (ad
) == AND
)
4657 loc
= &XEXP (ad
, 0);
4661 /* One possibility for why the address is invalid is that it is itself
4662 a MEM. This can happen when the frame pointer is being eliminated, a
4663 pseudo is not allocated to a hard register, and the offset between the
4664 frame and stack pointers is not its initial value. In that case the
4665 pseudo will have been replaced by a MEM referring to the
4667 if (GET_CODE (ad
) == MEM
)
4669 /* First ensure that the address in this MEM is valid. Then, unless
4670 indirect addresses are valid, reload the MEM into a register. */
4672 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4673 opnum
, ADDR_TYPE (type
),
4674 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4676 /* If tem was changed, then we must create a new memory reference to
4677 hold it and store it back into memrefloc. */
4678 if (tem
!= ad
&& memrefloc
)
4680 *memrefloc
= copy_rtx (*memrefloc
);
4681 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4682 loc
= &XEXP (*memrefloc
, 0);
4684 loc
= &XEXP (*loc
, 0);
4687 /* Check similar cases as for indirect addresses as above except
4688 that we can allow pseudos and a MEM since they should have been
4689 taken care of above. */
4692 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4693 || GET_CODE (XEXP (tem
, 0)) == MEM
4694 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4695 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4696 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4697 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4699 /* Must use TEM here, not AD, since it is the one that will
4700 have any subexpressions reloaded, if needed. */
4701 push_reload (tem
, NULL_RTX
, loc
, (rtx
*)0,
4702 BASE_REG_CLASS
, GET_MODE (tem
),
4705 return ! removed_and
;
4711 /* If we have address of a stack slot but it's not valid because the
4712 displacement is too large, compute the sum in a register.
4713 Handle all base registers here, not just fp/ap/sp, because on some
4714 targets (namely SH) we can also get too large displacements from
4715 big-endian corrections. */
4716 else if (GET_CODE (ad
) == PLUS
4717 && GET_CODE (XEXP (ad
, 0)) == REG
4718 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4719 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4720 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4722 /* Unshare the MEM rtx so we can safely alter it. */
4725 *memrefloc
= copy_rtx (*memrefloc
);
4726 loc
= &XEXP (*memrefloc
, 0);
4728 loc
= &XEXP (*loc
, 0);
4731 if (double_reg_address_ok
)
4733 /* Unshare the sum as well. */
4734 *loc
= ad
= copy_rtx (ad
);
4736 /* Reload the displacement into an index reg.
4737 We assume the frame pointer or arg pointer is a base reg. */
4738 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4739 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4745 /* If the sum of two regs is not necessarily valid,
4746 reload the sum into a base reg.
4747 That will at least work. */
4748 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
,
4749 Pmode
, opnum
, type
, ind_levels
);
4751 return ! removed_and
;
4754 /* If we have an indexed stack slot, there are three possible reasons why
4755 it might be invalid: The index might need to be reloaded, the address
4756 might have been made by frame pointer elimination and hence have a
4757 constant out of range, or both reasons might apply.
4759 We can easily check for an index needing reload, but even if that is the
4760 case, we might also have an invalid constant. To avoid making the
4761 conservative assumption and requiring two reloads, we see if this address
4762 is valid when not interpreted strictly. If it is, the only problem is
4763 that the index needs a reload and find_reloads_address_1 will take care
4766 If we decide to do something here, it must be that
4767 `double_reg_address_ok' is true and that this address rtl was made by
4768 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4769 rework the sum so that the reload register will be added to the index.
4770 This is safe because we know the address isn't shared.
4772 We check for fp/ap/sp as both the first and second operand of the
4775 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4776 && GET_CODE (XEXP (ad
, 0)) == PLUS
4777 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4778 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4779 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4781 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4782 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4784 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4785 && ! memory_address_p (mode
, ad
))
4787 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4788 plus_constant (XEXP (XEXP (ad
, 0), 0),
4789 INTVAL (XEXP (ad
, 1))),
4790 XEXP (XEXP (ad
, 0), 1));
4791 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4792 GET_MODE (ad
), opnum
, type
, ind_levels
);
4793 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4799 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4800 && GET_CODE (XEXP (ad
, 0)) == PLUS
4801 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4802 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4803 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4805 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4806 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4808 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4809 && ! memory_address_p (mode
, ad
))
4811 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4812 XEXP (XEXP (ad
, 0), 0),
4813 plus_constant (XEXP (XEXP (ad
, 0), 1),
4814 INTVAL (XEXP (ad
, 1))));
4815 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1), BASE_REG_CLASS
,
4816 GET_MODE (ad
), opnum
, type
, ind_levels
);
4817 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4823 /* See if address becomes valid when an eliminable register
4824 in a sum is replaced. */
4827 if (GET_CODE (ad
) == PLUS
)
4828 tem
= subst_indexed_address (ad
);
4829 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4831 /* Ok, we win that way. Replace any additional eliminable
4834 subst_reg_equivs_changed
= 0;
4835 tem
= subst_reg_equivs (tem
, insn
);
4837 /* Make sure that didn't make the address invalid again. */
4839 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4846 /* If constants aren't valid addresses, reload the constant address
4848 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4850 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4851 Unshare it so we can safely alter it. */
4852 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4853 && CONSTANT_POOL_ADDRESS_P (ad
))
4855 *memrefloc
= copy_rtx (*memrefloc
);
4856 loc
= &XEXP (*memrefloc
, 0);
4858 loc
= &XEXP (*loc
, 0);
4861 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4863 return ! removed_and
;
4866 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
4870 /* Find all pseudo regs appearing in AD
4871 that are eliminable in favor of equivalent values
4872 and do not have hard regs; replace them by their equivalents.
4873 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4874 front of it for pseudos that we have to replace with stack slots. */
4877 subst_reg_equivs (ad
, insn
)
4881 register RTX_CODE code
= GET_CODE (ad
);
4883 register const char *fmt
;
4899 register int regno
= REGNO (ad
);
4901 if (reg_equiv_constant
[regno
] != 0)
4903 subst_reg_equivs_changed
= 1;
4904 return reg_equiv_constant
[regno
];
4906 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
4908 rtx mem
= make_memloc (ad
, regno
);
4909 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4911 subst_reg_equivs_changed
= 1;
4912 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4920 /* Quickly dispose of a common case. */
4921 if (XEXP (ad
, 0) == frame_pointer_rtx
4922 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4930 fmt
= GET_RTX_FORMAT (code
);
4931 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4933 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
4937 /* Compute the sum of X and Y, making canonicalizations assumed in an
4938 address, namely: sum constant integers, surround the sum of two
4939 constants with a CONST, put the constant as the second operand, and
4940 group the constant on the outermost sum.
4942 This routine assumes both inputs are already in canonical form. */
4949 enum machine_mode mode
= GET_MODE (x
);
4951 if (mode
== VOIDmode
)
4952 mode
= GET_MODE (y
);
4954 if (mode
== VOIDmode
)
4957 if (GET_CODE (x
) == CONST_INT
)
4958 return plus_constant (y
, INTVAL (x
));
4959 else if (GET_CODE (y
) == CONST_INT
)
4960 return plus_constant (x
, INTVAL (y
));
4961 else if (CONSTANT_P (x
))
4962 tem
= x
, x
= y
, y
= tem
;
4964 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4965 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4967 /* Note that if the operands of Y are specified in the opposite
4968 order in the recursive calls below, infinite recursion will occur. */
4969 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4970 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4972 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4973 constant will have been placed second. */
4974 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4976 if (GET_CODE (x
) == CONST
)
4978 if (GET_CODE (y
) == CONST
)
4981 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
4984 return gen_rtx_PLUS (mode
, x
, y
);
4987 /* If ADDR is a sum containing a pseudo register that should be
4988 replaced with a constant (from reg_equiv_constant),
4989 return the result of doing so, and also apply the associative
4990 law so that the result is more likely to be a valid address.
4991 (But it is not guaranteed to be one.)
4993 Note that at most one register is replaced, even if more are
4994 replaceable. Also, we try to put the result into a canonical form
4995 so it is more likely to be a valid address.
4997 In all other cases, return ADDR. */
5000 subst_indexed_address (addr
)
5003 rtx op0
= 0, op1
= 0, op2
= 0;
5007 if (GET_CODE (addr
) == PLUS
)
5009 /* Try to find a register to replace. */
5010 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5011 if (GET_CODE (op0
) == REG
5012 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5013 && reg_renumber
[regno
] < 0
5014 && reg_equiv_constant
[regno
] != 0)
5015 op0
= reg_equiv_constant
[regno
];
5016 else if (GET_CODE (op1
) == REG
5017 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5018 && reg_renumber
[regno
] < 0
5019 && reg_equiv_constant
[regno
] != 0)
5020 op1
= reg_equiv_constant
[regno
];
5021 else if (GET_CODE (op0
) == PLUS
5022 && (tem
= subst_indexed_address (op0
)) != op0
)
5024 else if (GET_CODE (op1
) == PLUS
5025 && (tem
= subst_indexed_address (op1
)) != op1
)
5030 /* Pick out up to three things to add. */
5031 if (GET_CODE (op1
) == PLUS
)
5032 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5033 else if (GET_CODE (op0
) == PLUS
)
5034 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5036 /* Compute the sum. */
5038 op1
= form_sum (op1
, op2
);
5040 op0
= form_sum (op0
, op1
);
5047 /* Update the REG_INC notes for an insn. It updates all REG_INC
5048 notes for the instruction which refer to REGNO the to refer
5049 to the reload number.
5051 INSN is the insn for which any REG_INC notes need updating.
5053 REGNO is the register number which has been reloaded.
5055 RELOADNUM is the reload number. */
5058 update_auto_inc_notes (insn
, regno
, reloadnum
)
5059 rtx insn ATTRIBUTE_UNUSED
;
5060 int regno ATTRIBUTE_UNUSED
;
5061 int reloadnum ATTRIBUTE_UNUSED
;
5066 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5067 if (REG_NOTE_KIND (link
) == REG_INC
5068 && REGNO (XEXP (link
, 0)) == regno
)
5069 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5073 /* Record the pseudo registers we must reload into hard registers in a
5074 subexpression of a would-be memory address, X referring to a value
5075 in mode MODE. (This function is not called if the address we find
5078 CONTEXT = 1 means we are considering regs as index regs,
5079 = 0 means we are considering them as base regs.
5081 OPNUM and TYPE specify the purpose of any reloads made.
5083 IND_LEVELS says how many levels of indirect addressing are
5084 supported at this point in the address.
5086 INSN, if nonzero, is the insn in which we do the reload. It is used
5087 to determine if we may generate output reloads.
5089 We return nonzero if X, as a whole, is reloaded or replaced. */
5091 /* Note that we take shortcuts assuming that no multi-reg machine mode
5092 occurs as part of an address.
5093 Also, this is not fully machine-customizable; it works for machines
5094 such as vaxes and 68000's and 32000's, but other possible machines
5095 could have addressing modes that this does not handle right. */
5098 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
5099 enum machine_mode mode
;
5104 enum reload_type type
;
5108 register RTX_CODE code
= GET_CODE (x
);
5114 register rtx orig_op0
= XEXP (x
, 0);
5115 register rtx orig_op1
= XEXP (x
, 1);
5116 register RTX_CODE code0
= GET_CODE (orig_op0
);
5117 register RTX_CODE code1
= GET_CODE (orig_op1
);
5118 register rtx op0
= orig_op0
;
5119 register rtx op1
= orig_op1
;
5121 if (GET_CODE (op0
) == SUBREG
)
5123 op0
= SUBREG_REG (op0
);
5124 code0
= GET_CODE (op0
);
5125 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5126 op0
= gen_rtx_REG (word_mode
,
5128 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5129 GET_MODE (SUBREG_REG (orig_op0
)),
5130 SUBREG_BYTE (orig_op0
),
5131 GET_MODE (orig_op0
))));
5134 if (GET_CODE (op1
) == SUBREG
)
5136 op1
= SUBREG_REG (op1
);
5137 code1
= GET_CODE (op1
);
5138 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5139 /* ??? Why is this given op1's mode and above for
5140 ??? op0 SUBREGs we use word_mode? */
5141 op1
= gen_rtx_REG (GET_MODE (op1
),
5143 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5144 GET_MODE (SUBREG_REG (orig_op1
)),
5145 SUBREG_BYTE (orig_op1
),
5146 GET_MODE (orig_op1
))));
5149 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5150 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5152 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5153 type
, ind_levels
, insn
);
5154 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5155 type
, ind_levels
, insn
);
5158 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5159 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5161 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5162 type
, ind_levels
, insn
);
5163 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5164 type
, ind_levels
, insn
);
5167 else if (code0
== CONST_INT
|| code0
== CONST
5168 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5169 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5170 type
, ind_levels
, insn
);
5172 else if (code1
== CONST_INT
|| code1
== CONST
5173 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5174 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5175 type
, ind_levels
, insn
);
5177 else if (code0
== REG
&& code1
== REG
)
5179 if (REG_OK_FOR_INDEX_P (op0
)
5180 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5182 else if (REG_OK_FOR_INDEX_P (op1
)
5183 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5185 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5186 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5187 type
, ind_levels
, insn
);
5188 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5189 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5190 type
, ind_levels
, insn
);
5191 else if (REG_OK_FOR_INDEX_P (op1
))
5192 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5193 type
, ind_levels
, insn
);
5194 else if (REG_OK_FOR_INDEX_P (op0
))
5195 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5196 type
, ind_levels
, insn
);
5199 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5200 type
, ind_levels
, insn
);
5201 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5202 type
, ind_levels
, insn
);
5206 else if (code0
== REG
)
5208 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5209 type
, ind_levels
, insn
);
5210 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5211 type
, ind_levels
, insn
);
5214 else if (code1
== REG
)
5216 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5217 type
, ind_levels
, insn
);
5218 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5219 type
, ind_levels
, insn
);
5228 rtx op0
= XEXP (x
, 0);
5229 rtx op1
= XEXP (x
, 1);
5231 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5234 /* Currently, we only support {PRE,POST}_MODIFY constructs
5235 where a base register is {inc,dec}remented by the contents
5236 of another register or by a constant value. Thus, these
5237 operands must match. */
5238 if (op0
!= XEXP (op1
, 0))
5241 /* Require index register (or constant). Let's just handle the
5242 register case in the meantime... If the target allows
5243 auto-modify by a constant then we could try replacing a pseudo
5244 register with its equivalent constant where applicable. */
5245 if (REG_P (XEXP (op1
, 1)))
5246 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5247 find_reloads_address_1 (mode
, XEXP (op1
, 1), 1, &XEXP (op1
, 1),
5248 opnum
, type
, ind_levels
, insn
);
5250 if (REG_P (XEXP (op1
, 0)))
5252 int regno
= REGNO (XEXP (op1
, 0));
5255 /* A register that is incremented cannot be constant! */
5256 if (regno
>= FIRST_PSEUDO_REGISTER
5257 && reg_equiv_constant
[regno
] != 0)
5260 /* Handle a register that is equivalent to a memory location
5261 which cannot be addressed directly. */
5262 if (reg_equiv_memory_loc
[regno
] != 0
5263 && (reg_equiv_address
[regno
] != 0
5264 || num_not_at_initial_offset
))
5266 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5268 if (reg_equiv_address
[regno
]
5269 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5271 /* First reload the memory location's address.
5272 We can't use ADDR_TYPE (type) here, because we need to
5273 write back the value after reading it, hence we actually
5274 need two registers. */
5275 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
5276 &XEXP (tem
, 0), opnum
,
5280 /* Then reload the memory location into a base
5282 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5283 &XEXP (op1
, 0), BASE_REG_CLASS
,
5284 GET_MODE (x
), GET_MODE (x
), 0,
5285 0, opnum
, RELOAD_OTHER
);
5287 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5292 if (reg_renumber
[regno
] >= 0)
5293 regno
= reg_renumber
[regno
];
5295 /* We require a base register here... */
5296 if (!REGNO_MODE_OK_FOR_BASE_P (regno
, GET_MODE (x
)))
5298 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5299 &XEXP (op1
, 0), &XEXP (x
, 0),
5301 GET_MODE (x
), GET_MODE (x
), 0, 0,
5302 opnum
, RELOAD_OTHER
);
5304 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5317 if (GET_CODE (XEXP (x
, 0)) == REG
)
5319 register int regno
= REGNO (XEXP (x
, 0));
5323 /* A register that is incremented cannot be constant! */
5324 if (regno
>= FIRST_PSEUDO_REGISTER
5325 && reg_equiv_constant
[regno
] != 0)
5328 /* Handle a register that is equivalent to a memory location
5329 which cannot be addressed directly. */
5330 if (reg_equiv_memory_loc
[regno
] != 0
5331 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5333 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5334 if (reg_equiv_address
[regno
]
5335 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5337 /* First reload the memory location's address.
5338 We can't use ADDR_TYPE (type) here, because we need to
5339 write back the value after reading it, hence we actually
5340 need two registers. */
5341 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5342 &XEXP (tem
, 0), opnum
, type
,
5344 /* Put this inside a new increment-expression. */
5345 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5346 /* Proceed to reload that, as if it contained a register. */
5350 /* If we have a hard register that is ok as an index,
5351 don't make a reload. If an autoincrement of a nice register
5352 isn't "valid", it must be that no autoincrement is "valid".
5353 If that is true and something made an autoincrement anyway,
5354 this must be a special context where one is allowed.
5355 (For example, a "push" instruction.)
5356 We can't improve this address, so leave it alone. */
5358 /* Otherwise, reload the autoincrement into a suitable hard reg
5359 and record how much to increment by. */
5361 if (reg_renumber
[regno
] >= 0)
5362 regno
= reg_renumber
[regno
];
5363 if ((regno
>= FIRST_PSEUDO_REGISTER
5364 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5365 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5369 /* If we can output the register afterwards, do so, this
5370 saves the extra update.
5371 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5372 CALL_INSN - and it does not set CC0.
5373 But don't do this if we cannot directly address the
5374 memory location, since this will make it harder to
5375 reuse address reloads, and increases register pressure.
5376 Also don't do this if we can probably update x directly. */
5377 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5379 : reg_equiv_mem
[regno
]);
5380 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5381 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5382 && memory_operand (equiv
, GET_MODE (equiv
))
5384 && ! sets_cc0_p (PATTERN (insn
))
5386 && ! (icode
!= CODE_FOR_nothing
5387 && ((*insn_data
[icode
].operand
[0].predicate
)
5389 && ((*insn_data
[icode
].operand
[1].predicate
)
5392 /* We use the original pseudo for loc, so that
5393 emit_reload_insns() knows which pseudo this
5394 reload refers to and updates the pseudo rtx, not
5395 its equivalent memory location, as well as the
5396 corresponding entry in reg_last_reload_reg. */
5397 loc
= &XEXP (x_orig
, 0);
5400 = push_reload (x
, x
, loc
, loc
,
5401 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5402 GET_MODE (x
), GET_MODE (x
), 0, 0,
5403 opnum
, RELOAD_OTHER
);
5408 = push_reload (x
, NULL_RTX
, loc
, (rtx
*)0,
5409 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5410 GET_MODE (x
), GET_MODE (x
), 0, 0,
5413 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5418 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5424 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5426 /* This is probably the result of a substitution, by eliminate_regs,
5427 of an equivalent address for a pseudo that was not allocated to a
5428 hard register. Verify that the specified address is valid and
5429 reload it into a register. */
5430 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5431 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5435 /* Since we know we are going to reload this item, don't decrement
5436 for the indirection level.
5438 Note that this is actually conservative: it would be slightly
5439 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5441 /* We can't use ADDR_TYPE (type) here, because we need to
5442 write back the value after reading it, hence we actually
5443 need two registers. */
5444 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5445 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5446 opnum
, type
, ind_levels
, insn
);
5448 reloadnum
= push_reload (x
, NULL_RTX
, loc
, (rtx
*)0,
5449 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5450 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5452 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5454 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5456 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5463 /* This is probably the result of a substitution, by eliminate_regs, of
5464 an equivalent address for a pseudo that was not allocated to a hard
5465 register. Verify that the specified address is valid and reload it
5468 Since we know we are going to reload this item, don't decrement for
5469 the indirection level.
5471 Note that this is actually conservative: it would be slightly more
5472 efficient to use the value of SPILL_INDIRECT_LEVELS from
5475 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5476 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5477 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*)0,
5478 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5479 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5484 register int regno
= REGNO (x
);
5486 if (reg_equiv_constant
[regno
] != 0)
5488 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5489 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5490 GET_MODE (x
), opnum
, type
, ind_levels
);
5494 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5495 that feeds this insn. */
5496 if (reg_equiv_mem
[regno
] != 0)
5498 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, (rtx
*)0,
5499 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5500 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5505 if (reg_equiv_memory_loc
[regno
]
5506 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5508 rtx tem
= make_memloc (x
, regno
);
5509 if (reg_equiv_address
[regno
] != 0
5510 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5513 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5514 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5519 if (reg_renumber
[regno
] >= 0)
5520 regno
= reg_renumber
[regno
];
5522 if ((regno
>= FIRST_PSEUDO_REGISTER
5523 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5524 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5526 push_reload (x
, NULL_RTX
, loc
, (rtx
*)0,
5527 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5528 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5532 /* If a register appearing in an address is the subject of a CLOBBER
5533 in this insn, reload it into some other register to be safe.
5534 The CLOBBER is supposed to make the register unavailable
5535 from before this insn to after it. */
5536 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
5538 push_reload (x
, NULL_RTX
, loc
, (rtx
*)0,
5539 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5540 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5547 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5549 /* If this is a SUBREG of a hard register and the resulting register
5550 is of the wrong class, reload the whole SUBREG. This avoids
5551 needless copies if SUBREG_REG is multi-word. */
5552 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5554 int regno
= subreg_regno (x
);
5556 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5557 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5559 push_reload (x
, NULL_RTX
, loc
, (rtx
*)0,
5560 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5561 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5565 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5566 is larger than the class size, then reload the whole SUBREG. */
5569 enum reg_class
class = (context
? INDEX_REG_CLASS
5571 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5572 > reg_class_size
[class])
5574 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5576 push_reload (x
, NULL_RTX
, loc
, (rtx
*)0, class,
5577 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5589 register const char *fmt
= GET_RTX_FORMAT (code
);
5592 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5595 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5596 opnum
, type
, ind_levels
, insn
);
5603 /* X, which is found at *LOC, is a part of an address that needs to be
5604 reloaded into a register of class CLASS. If X is a constant, or if
5605 X is a PLUS that contains a constant, check that the constant is a
5606 legitimate operand and that we are supposed to be able to load
5607 it into the register.
5609 If not, force the constant into memory and reload the MEM instead.
5611 MODE is the mode to use, in case X is an integer constant.
5613 OPNUM and TYPE describe the purpose of any reloads made.
5615 IND_LEVELS says how many levels of indirect addressing this machine
5619 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5622 enum reg_class
class;
5623 enum machine_mode mode
;
5625 enum reload_type type
;
5629 && (! LEGITIMATE_CONSTANT_P (x
)
5630 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5634 tem
= x
= force_const_mem (mode
, x
);
5635 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5636 opnum
, type
, ind_levels
, 0);
5639 else if (GET_CODE (x
) == PLUS
5640 && CONSTANT_P (XEXP (x
, 1))
5641 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5642 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5646 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5647 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5648 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5649 opnum
, type
, ind_levels
, 0);
5652 push_reload (x
, NULL_RTX
, loc
, (rtx
*)0, class,
5653 mode
, VOIDmode
, 0, 0, opnum
, type
);
5656 /* X, a subreg of a pseudo, is a part of an address that needs to be
5659 If the pseudo is equivalent to a memory location that cannot be directly
5660 addressed, make the necessary address reloads.
5662 If address reloads have been necessary, or if the address is changed
5663 by register elimination, return the rtx of the memory location;
5664 otherwise, return X.
5666 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5669 OPNUM and TYPE identify the purpose of the reload.
5671 IND_LEVELS says how many levels of indirect addressing are
5672 supported at this point in the address.
5674 INSN, if nonzero, is the insn in which we do the reload. It is used
5675 to determine where to put USEs for pseudos that we have to replace with
5679 find_reloads_subreg_address (x
, force_replace
, opnum
, type
,
5684 enum reload_type type
;
5688 int regno
= REGNO (SUBREG_REG (x
));
5690 if (reg_equiv_memory_loc
[regno
])
5692 /* If the address is not directly addressable, or if the address is not
5693 offsettable, then it must be replaced. */
5695 && (reg_equiv_address
[regno
]
5696 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5699 if (force_replace
|| num_not_at_initial_offset
)
5701 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5703 /* If the address changes because of register elimination, then
5704 it must be replaced. */
5706 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5708 int offset
= SUBREG_BYTE (x
);
5709 unsigned outer_size
= GET_MODE_SIZE (GET_MODE (x
));
5710 unsigned inner_size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5712 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5713 PUT_MODE (tem
, GET_MODE (x
));
5715 /* If this was a paradoxical subreg that we replaced, the
5716 resulting memory must be sufficiently aligned to allow
5717 us to widen the mode of the memory. */
5718 if (outer_size
> inner_size
&& STRICT_ALIGNMENT
)
5722 base
= XEXP (tem
, 0);
5723 if (GET_CODE (base
) == PLUS
)
5725 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
5726 && INTVAL (XEXP (base
, 1)) % outer_size
!= 0)
5728 base
= XEXP (base
, 0);
5730 if (GET_CODE (base
) != REG
5731 || (REGNO_POINTER_ALIGN (REGNO (base
))
5732 < outer_size
* BITS_PER_UNIT
))
5736 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5737 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5740 /* If this is not a toplevel operand, find_reloads doesn't see
5741 this substitution. We have to emit a USE of the pseudo so
5742 that delete_output_reload can see it. */
5743 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5744 emit_insn_before (gen_rtx_USE (VOIDmode
, SUBREG_REG (x
)), insn
);
5752 /* Substitute into the current INSN the registers into which we have reloaded
5753 the things that need reloading. The array `replacements'
5754 contains the locations of all pointers that must be changed
5755 and says what to replace them with.
5757 Return the rtx that X translates into; usually X, but modified. */
5760 subst_reloads (insn
)
5765 for (i
= 0; i
< n_replacements
; i
++)
5767 register struct replacement
*r
= &replacements
[i
];
5768 register rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5771 /* If we're replacing a LABEL_REF with a register, add a
5772 REG_LABEL note to indicate to flow which label this
5773 register refers to. */
5774 if (GET_CODE (*r
->where
) == LABEL_REF
5775 && GET_CODE (insn
) == JUMP_INSN
)
5776 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
,
5777 XEXP (*r
->where
, 0),
5780 /* Encapsulate RELOADREG so its machine mode matches what
5781 used to be there. Note that gen_lowpart_common will
5782 do the wrong thing if RELOADREG is multi-word. RELOADREG
5783 will always be a REG here. */
5784 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5785 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5787 /* If we are putting this into a SUBREG and RELOADREG is a
5788 SUBREG, we would be making nested SUBREGs, so we have to fix
5789 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5791 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5793 if (GET_MODE (*r
->subreg_loc
)
5794 == GET_MODE (SUBREG_REG (reloadreg
)))
5795 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5799 SUBREG_BYTE (*r
->subreg_loc
) + SUBREG_BYTE (reloadreg
);
5801 /* When working with SUBREGs the rule is that the byte
5802 offset must be a multiple of the SUBREG's mode. */
5803 final_offset
= (final_offset
/
5804 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
5805 final_offset
= (final_offset
*
5806 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
5808 *r
->where
= SUBREG_REG (reloadreg
);
5809 SUBREG_BYTE (*r
->subreg_loc
) = final_offset
;
5813 *r
->where
= reloadreg
;
5815 /* If reload got no reg and isn't optional, something's wrong. */
5816 else if (! rld
[r
->what
].optional
)
5821 /* Make a copy of any replacements being done into X and move those copies
5822 to locations in Y, a copy of X. We only look at the highest level of
5826 copy_replacements (x
, y
)
5831 enum rtx_code code
= GET_CODE (x
);
5832 const char *fmt
= GET_RTX_FORMAT (code
);
5833 struct replacement
*r
;
5835 /* We can't support X being a SUBREG because we might then need to know its
5836 location if something inside it was replaced. */
5840 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5842 for (j
= 0; j
< n_replacements
; j
++)
5844 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
5846 r
= &replacements
[n_replacements
++];
5847 r
->where
= replacements
[j
].where
;
5848 r
->subreg_loc
= &XEXP (y
, i
);
5849 r
->what
= replacements
[j
].what
;
5850 r
->mode
= replacements
[j
].mode
;
5852 else if (replacements
[j
].where
== &XEXP (x
, i
))
5854 r
= &replacements
[n_replacements
++];
5855 r
->where
= &XEXP (y
, i
);
5857 r
->what
= replacements
[j
].what
;
5858 r
->mode
= replacements
[j
].mode
;
5863 /* Change any replacements being done to *X to be done to *Y */
5866 move_replacements (x
, y
)
5872 for (i
= 0; i
< n_replacements
; i
++)
5873 if (replacements
[i
].subreg_loc
== x
)
5874 replacements
[i
].subreg_loc
= y
;
5875 else if (replacements
[i
].where
== x
)
5877 replacements
[i
].where
= y
;
5878 replacements
[i
].subreg_loc
= 0;
5882 /* If LOC was scheduled to be replaced by something, return the replacement.
5883 Otherwise, return *LOC. */
5886 find_replacement (loc
)
5889 struct replacement
*r
;
5891 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
5893 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5895 if (reloadreg
&& r
->where
== loc
)
5897 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
5898 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5902 else if (reloadreg
&& r
->subreg_loc
== loc
)
5904 /* RELOADREG must be either a REG or a SUBREG.
5906 ??? Is it actually still ever a SUBREG? If so, why? */
5908 if (GET_CODE (reloadreg
) == REG
)
5909 return gen_rtx_REG (GET_MODE (*loc
),
5910 (REGNO (reloadreg
) +
5911 subreg_regno_offset (REGNO (SUBREG_REG (*loc
)),
5912 GET_MODE (SUBREG_REG (*loc
)),
5915 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
5919 int final_offset
= SUBREG_BYTE (reloadreg
) + SUBREG_BYTE (*loc
);
5921 /* When working with SUBREGs the rule is that the byte
5922 offset must be a multiple of the SUBREG's mode. */
5923 final_offset
= (final_offset
/ GET_MODE_SIZE (GET_MODE (*loc
)));
5924 final_offset
= (final_offset
* GET_MODE_SIZE (GET_MODE (*loc
)));
5925 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
5931 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5932 what's inside and make a new rtl if so. */
5933 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
5934 || GET_CODE (*loc
) == MULT
)
5936 rtx x
= find_replacement (&XEXP (*loc
, 0));
5937 rtx y
= find_replacement (&XEXP (*loc
, 1));
5939 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
5940 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
5946 /* Return nonzero if register in range [REGNO, ENDREGNO)
5947 appears either explicitly or implicitly in X
5948 other than being stored into (except for earlyclobber operands).
5950 References contained within the substructure at LOC do not count.
5951 LOC may be zero, meaning don't ignore anything.
5953 This is similar to refers_to_regno_p in rtlanal.c except that we
5954 look at equivalences for pseudos that didn't get hard registers. */
5957 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
5958 unsigned int regno
, endregno
;
5971 code
= GET_CODE (x
);
5978 /* If this is a pseudo, a hard register must not have been allocated.
5979 X must therefore either be a constant or be in memory. */
5980 if (r
>= FIRST_PSEUDO_REGISTER
)
5982 if (reg_equiv_memory_loc
[r
])
5983 return refers_to_regno_for_reload_p (regno
, endregno
,
5984 reg_equiv_memory_loc
[r
],
5987 if (reg_equiv_constant
[r
])
5993 return (endregno
> r
5994 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
5995 ? HARD_REGNO_NREGS (r
, GET_MODE (x
))
5999 /* If this is a SUBREG of a hard reg, we can see exactly which
6000 registers are being modified. Otherwise, handle normally. */
6001 if (GET_CODE (SUBREG_REG (x
)) == REG
6002 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6004 unsigned int inner_regno
= subreg_regno (x
);
6005 unsigned int inner_endregno
6006 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6007 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6009 return endregno
> inner_regno
&& regno
< inner_endregno
;
6015 if (&SET_DEST (x
) != loc
6016 /* Note setting a SUBREG counts as referring to the REG it is in for
6017 a pseudo but not for hard registers since we can
6018 treat each word individually. */
6019 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6020 && loc
!= &SUBREG_REG (SET_DEST (x
))
6021 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
6022 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6023 && refers_to_regno_for_reload_p (regno
, endregno
,
6024 SUBREG_REG (SET_DEST (x
)),
6026 /* If the output is an earlyclobber operand, this is
6028 || ((GET_CODE (SET_DEST (x
)) != REG
6029 || earlyclobber_operand_p (SET_DEST (x
)))
6030 && refers_to_regno_for_reload_p (regno
, endregno
,
6031 SET_DEST (x
), loc
))))
6034 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6043 /* X does not match, so try its subexpressions. */
6045 fmt
= GET_RTX_FORMAT (code
);
6046 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6048 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6056 if (refers_to_regno_for_reload_p (regno
, endregno
,
6060 else if (fmt
[i
] == 'E')
6063 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6064 if (loc
!= &XVECEXP (x
, i
, j
)
6065 && refers_to_regno_for_reload_p (regno
, endregno
,
6066 XVECEXP (x
, i
, j
), loc
))
6073 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6074 we check if any register number in X conflicts with the relevant register
6075 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6076 contains a MEM (we don't bother checking for memory addresses that can't
6077 conflict because we expect this to be a rare case.
6079 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6080 that we look at equivalences for pseudos that didn't get hard registers. */
6083 reg_overlap_mentioned_for_reload_p (x
, in
)
6086 int regno
, endregno
;
6088 /* Overly conservative. */
6089 if (GET_CODE (x
) == STRICT_LOW_PART
)
6092 /* If either argument is a constant, then modifying X can not affect IN. */
6093 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6095 else if (GET_CODE (x
) == SUBREG
)
6097 regno
= REGNO (SUBREG_REG (x
));
6098 if (regno
< FIRST_PSEUDO_REGISTER
)
6099 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6100 GET_MODE (SUBREG_REG (x
)),
6104 else if (GET_CODE (x
) == REG
)
6108 /* If this is a pseudo, it must not have been assigned a hard register.
6109 Therefore, it must either be in memory or be a constant. */
6111 if (regno
>= FIRST_PSEUDO_REGISTER
)
6113 if (reg_equiv_memory_loc
[regno
])
6114 return refers_to_mem_for_reload_p (in
);
6115 else if (reg_equiv_constant
[regno
])
6120 else if (GET_CODE (x
) == MEM
)
6121 return refers_to_mem_for_reload_p (in
);
6122 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6123 || GET_CODE (x
) == CC0
)
6124 return reg_mentioned_p (x
, in
);
6128 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6129 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6131 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*)0);
6134 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6138 refers_to_mem_for_reload_p (x
)
6144 if (GET_CODE (x
) == MEM
)
6147 if (GET_CODE (x
) == REG
)
6148 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6149 && reg_equiv_memory_loc
[REGNO (x
)]);
6151 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6152 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6154 && (GET_CODE (XEXP (x
, i
)) == MEM
6155 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6161 /* Check the insns before INSN to see if there is a suitable register
6162 containing the same value as GOAL.
6163 If OTHER is -1, look for a register in class CLASS.
6164 Otherwise, just see if register number OTHER shares GOAL's value.
6166 Return an rtx for the register found, or zero if none is found.
6168 If RELOAD_REG_P is (short *)1,
6169 we reject any hard reg that appears in reload_reg_rtx
6170 because such a hard reg is also needed coming into this insn.
6172 If RELOAD_REG_P is any other nonzero value,
6173 it is a vector indexed by hard reg number
6174 and we reject any hard reg whose element in the vector is nonnegative
6175 as well as any that appears in reload_reg_rtx.
6177 If GOAL is zero, then GOALREG is a register number; we look
6178 for an equivalent for that register.
6180 MODE is the machine mode of the value we want an equivalence for.
6181 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6183 This function is used by jump.c as well as in the reload pass.
6185 If GOAL is the sum of the stack pointer and a constant, we treat it
6186 as if it were a constant except that sp is required to be unchanging. */
6189 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
6192 enum reg_class
class;
6194 short *reload_reg_p
;
6196 enum machine_mode mode
;
6198 register rtx p
= insn
;
6199 rtx goaltry
, valtry
, value
, where
;
6201 register int regno
= -1;
6205 int goal_mem_addr_varies
= 0;
6206 int need_stable_sp
= 0;
6212 else if (GET_CODE (goal
) == REG
)
6213 regno
= REGNO (goal
);
6214 else if (GET_CODE (goal
) == MEM
)
6216 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6217 if (MEM_VOLATILE_P (goal
))
6219 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
6221 /* An address with side effects must be reexecuted. */
6236 else if (CONSTANT_P (goal
))
6238 else if (GET_CODE (goal
) == PLUS
6239 && XEXP (goal
, 0) == stack_pointer_rtx
6240 && CONSTANT_P (XEXP (goal
, 1)))
6241 goal_const
= need_stable_sp
= 1;
6242 else if (GET_CODE (goal
) == PLUS
6243 && XEXP (goal
, 0) == frame_pointer_rtx
6244 && CONSTANT_P (XEXP (goal
, 1)))
6249 /* Scan insns back from INSN, looking for one that copies
6250 a value into or out of GOAL.
6251 Stop and give up if we reach a label. */
6256 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
6259 if (GET_CODE (p
) == INSN
6260 /* If we don't want spill regs ... */
6261 && (! (reload_reg_p
!= 0
6262 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6263 /* ... then ignore insns introduced by reload; they aren't
6264 useful and can cause results in reload_as_needed to be
6265 different from what they were when calculating the need for
6266 spills. If we notice an input-reload insn here, we will
6267 reject it below, but it might hide a usable equivalent.
6268 That makes bad code. It may even abort: perhaps no reg was
6269 spilled for this insn because it was assumed we would find
6271 || INSN_UID (p
) < reload_first_uid
))
6274 pat
= single_set (p
);
6276 /* First check for something that sets some reg equal to GOAL. */
6279 && true_regnum (SET_SRC (pat
)) == regno
6280 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6283 && true_regnum (SET_DEST (pat
)) == regno
6284 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6286 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6287 /* When looking for stack pointer + const,
6288 make sure we don't use a stack adjust. */
6289 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6290 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6292 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6293 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6295 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6296 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6297 /* If we are looking for a constant,
6298 and something equivalent to that constant was copied
6299 into a reg, we can use that reg. */
6300 || (goal_const
&& REG_NOTES (p
) != 0
6301 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6302 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6304 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6305 || (GET_CODE (SET_DEST (pat
)) == REG
6306 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6307 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6309 && GET_CODE (goal
) == CONST_INT
6311 = operand_subword (XEXP (tem
, 0), 0, 0,
6313 && rtx_equal_p (goal
, goaltry
)
6315 = operand_subword (SET_DEST (pat
), 0, 0,
6317 && (valueno
= true_regnum (valtry
)) >= 0)))
6318 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6320 && GET_CODE (SET_DEST (pat
)) == REG
6321 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6322 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6324 && GET_CODE (goal
) == CONST_INT
6325 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6327 && rtx_equal_p (goal
, goaltry
)
6329 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6330 && (valueno
= true_regnum (valtry
)) >= 0)))
6334 if (valueno
!= other
)
6337 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6343 for (i
= HARD_REGNO_NREGS (valueno
, mode
) - 1; i
>= 0; i
--)
6344 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6357 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6358 (or copying VALUE into GOAL, if GOAL is also a register).
6359 Now verify that VALUE is really valid. */
6361 /* VALUENO is the register number of VALUE; a hard register. */
6363 /* Don't try to re-use something that is killed in this insn. We want
6364 to be able to trust REG_UNUSED notes. */
6365 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6368 /* If we propose to get the value from the stack pointer or if GOAL is
6369 a MEM based on the stack pointer, we need a stable SP. */
6370 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6371 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6375 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6376 if (GET_MODE (value
) != mode
)
6379 /* Reject VALUE if it was loaded from GOAL
6380 and is also a register that appears in the address of GOAL. */
6382 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6383 && refers_to_regno_for_reload_p (valueno
,
6385 + HARD_REGNO_NREGS (valueno
, mode
)),
6389 /* Reject registers that overlap GOAL. */
6391 if (!goal_mem
&& !goal_const
6392 && regno
+ (int) HARD_REGNO_NREGS (regno
, mode
) > valueno
6393 && regno
< valueno
+ (int) HARD_REGNO_NREGS (valueno
, mode
))
6396 nregs
= HARD_REGNO_NREGS (regno
, mode
);
6397 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
6399 /* Reject VALUE if it is one of the regs reserved for reloads.
6400 Reload1 knows how to reuse them anyway, and it would get
6401 confused if we allocated one without its knowledge.
6402 (Now that insns introduced by reload are ignored above,
6403 this case shouldn't happen, but I'm not positive.) */
6405 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6408 for (i
= 0; i
< valuenregs
; ++i
)
6409 if (reload_reg_p
[valueno
+ i
] >= 0)
6413 /* Reject VALUE if it is a register being used for an input reload
6414 even if it is not one of those reserved. */
6416 if (reload_reg_p
!= 0)
6419 for (i
= 0; i
< n_reloads
; i
++)
6420 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6422 int regno1
= REGNO (rld
[i
].reg_rtx
);
6423 int nregs1
= HARD_REGNO_NREGS (regno1
,
6424 GET_MODE (rld
[i
].reg_rtx
));
6425 if (regno1
< valueno
+ valuenregs
6426 && regno1
+ nregs1
> valueno
)
6432 /* We must treat frame pointer as varying here,
6433 since it can vary--in a nonlocal goto as generated by expand_goto. */
6434 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6436 /* Now verify that the values of GOAL and VALUE remain unaltered
6437 until INSN is reached. */
6446 /* Don't trust the conversion past a function call
6447 if either of the two is in a call-clobbered register, or memory. */
6448 if (GET_CODE (p
) == CALL_INSN
)
6452 if (goal_mem
|| need_stable_sp
)
6455 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6456 for (i
= 0; i
< nregs
; ++i
)
6457 if (call_used_regs
[regno
+ i
])
6460 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6461 for (i
= 0; i
< valuenregs
; ++i
)
6462 if (call_used_regs
[valueno
+ i
])
6466 #ifdef NON_SAVING_SETJMP
6467 if (NON_SAVING_SETJMP
&& GET_CODE (p
) == NOTE
6468 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
6476 /* Watch out for unspec_volatile, and volatile asms. */
6477 if (volatile_insn_p (pat
))
6480 /* If this insn P stores in either GOAL or VALUE, return 0.
6481 If GOAL is a memory ref and this insn writes memory, return 0.
6482 If GOAL is a memory ref and its address is not constant,
6483 and this insn P changes a register used in GOAL, return 0. */
6485 if (GET_CODE (pat
) == COND_EXEC
)
6486 pat
= COND_EXEC_CODE (pat
);
6487 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6489 register rtx dest
= SET_DEST (pat
);
6490 while (GET_CODE (dest
) == SUBREG
6491 || GET_CODE (dest
) == ZERO_EXTRACT
6492 || GET_CODE (dest
) == SIGN_EXTRACT
6493 || GET_CODE (dest
) == STRICT_LOW_PART
)
6494 dest
= XEXP (dest
, 0);
6495 if (GET_CODE (dest
) == REG
)
6497 register int xregno
= REGNO (dest
);
6499 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6500 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6503 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6505 if (xregno
< valueno
+ valuenregs
6506 && xregno
+ xnregs
> valueno
)
6508 if (goal_mem_addr_varies
6509 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6511 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6514 else if (goal_mem
&& GET_CODE (dest
) == MEM
6515 && ! push_operand (dest
, GET_MODE (dest
)))
6517 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6518 && reg_equiv_memory_loc
[regno
] != 0)
6520 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6523 else if (GET_CODE (pat
) == PARALLEL
)
6526 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6528 register rtx v1
= XVECEXP (pat
, 0, i
);
6529 if (GET_CODE (v1
) == COND_EXEC
)
6530 v1
= COND_EXEC_CODE (v1
);
6531 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6533 register rtx dest
= SET_DEST (v1
);
6534 while (GET_CODE (dest
) == SUBREG
6535 || GET_CODE (dest
) == ZERO_EXTRACT
6536 || GET_CODE (dest
) == SIGN_EXTRACT
6537 || GET_CODE (dest
) == STRICT_LOW_PART
)
6538 dest
= XEXP (dest
, 0);
6539 if (GET_CODE (dest
) == REG
)
6541 register int xregno
= REGNO (dest
);
6543 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6544 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6547 if (xregno
< regno
+ nregs
6548 && xregno
+ xnregs
> regno
)
6550 if (xregno
< valueno
+ valuenregs
6551 && xregno
+ xnregs
> valueno
)
6553 if (goal_mem_addr_varies
6554 && reg_overlap_mentioned_for_reload_p (dest
,
6557 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6560 else if (goal_mem
&& GET_CODE (dest
) == MEM
6561 && ! push_operand (dest
, GET_MODE (dest
)))
6563 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6564 && reg_equiv_memory_loc
[regno
] != 0)
6566 else if (need_stable_sp
6567 && push_operand (dest
, GET_MODE (dest
)))
6573 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6577 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6578 link
= XEXP (link
, 1))
6580 pat
= XEXP (link
, 0);
6581 if (GET_CODE (pat
) == CLOBBER
)
6583 register rtx dest
= SET_DEST (pat
);
6585 if (GET_CODE (dest
) == REG
)
6587 register int xregno
= REGNO (dest
);
6589 = HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6591 if (xregno
< regno
+ nregs
6592 && xregno
+ xnregs
> regno
)
6594 else if (xregno
< valueno
+ valuenregs
6595 && xregno
+ xnregs
> valueno
)
6597 else if (goal_mem_addr_varies
6598 && reg_overlap_mentioned_for_reload_p (dest
,
6603 else if (goal_mem
&& GET_CODE (dest
) == MEM
6604 && ! push_operand (dest
, GET_MODE (dest
)))
6606 else if (need_stable_sp
6607 && push_operand (dest
, GET_MODE (dest
)))
6614 /* If this insn auto-increments or auto-decrements
6615 either regno or valueno, return 0 now.
6616 If GOAL is a memory ref and its address is not constant,
6617 and this insn P increments a register used in GOAL, return 0. */
6621 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6622 if (REG_NOTE_KIND (link
) == REG_INC
6623 && GET_CODE (XEXP (link
, 0)) == REG
)
6625 register int incno
= REGNO (XEXP (link
, 0));
6626 if (incno
< regno
+ nregs
&& incno
>= regno
)
6628 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6630 if (goal_mem_addr_varies
6631 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6641 /* Find a place where INCED appears in an increment or decrement operator
6642 within X, and return the amount INCED is incremented or decremented by.
6643 The value is always positive. */
6646 find_inc_amount (x
, inced
)
6649 register enum rtx_code code
= GET_CODE (x
);
6650 register const char *fmt
;
6655 register rtx addr
= XEXP (x
, 0);
6656 if ((GET_CODE (addr
) == PRE_DEC
6657 || GET_CODE (addr
) == POST_DEC
6658 || GET_CODE (addr
) == PRE_INC
6659 || GET_CODE (addr
) == POST_INC
)
6660 && XEXP (addr
, 0) == inced
)
6661 return GET_MODE_SIZE (GET_MODE (x
));
6662 else if ((GET_CODE (addr
) == PRE_MODIFY
6663 || GET_CODE (addr
) == POST_MODIFY
)
6664 && GET_CODE (XEXP (addr
, 1)) == PLUS
6665 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
6666 && XEXP (addr
, 0) == inced
6667 && GET_CODE (XEXP (XEXP (addr
, 1), 1)) == CONST_INT
)
6669 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
6670 return i
< 0 ? -i
: i
;
6674 fmt
= GET_RTX_FORMAT (code
);
6675 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6679 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6686 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6688 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6698 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6699 If SETS is nonzero, also consider SETs. */
6702 regno_clobbered_p (regno
, insn
, mode
, sets
)
6705 enum machine_mode mode
;
6708 unsigned int nregs
= HARD_REGNO_NREGS (regno
, mode
);
6709 unsigned int endregno
= regno
+ nregs
;
6711 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
6712 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6713 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6715 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
6717 return test
>= regno
&& test
< endregno
;
6720 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6722 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6726 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6727 if ((GET_CODE (elt
) == CLOBBER
6728 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6729 && GET_CODE (XEXP (elt
, 0)) == REG
)
6731 unsigned int test
= REGNO (XEXP (elt
, 0));
6733 if (test
>= regno
&& test
< endregno
)
6742 static const char *reload_when_needed_name
[] =
6745 "RELOAD_FOR_OUTPUT",
6747 "RELOAD_FOR_INPUT_ADDRESS",
6748 "RELOAD_FOR_INPADDR_ADDRESS",
6749 "RELOAD_FOR_OUTPUT_ADDRESS",
6750 "RELOAD_FOR_OUTADDR_ADDRESS",
6751 "RELOAD_FOR_OPERAND_ADDRESS",
6752 "RELOAD_FOR_OPADDR_ADDR",
6754 "RELOAD_FOR_OTHER_ADDRESS"
6757 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
6759 /* These functions are used to print the variables set by 'find_reloads' */
6762 debug_reload_to_stream (f
)
6770 for (r
= 0; r
< n_reloads
; r
++)
6772 fprintf (f
, "Reload %d: ", r
);
6776 fprintf (f
, "reload_in (%s) = ",
6777 GET_MODE_NAME (rld
[r
].inmode
));
6778 print_inline_rtx (f
, rld
[r
].in
, 24);
6779 fprintf (f
, "\n\t");
6782 if (rld
[r
].out
!= 0)
6784 fprintf (f
, "reload_out (%s) = ",
6785 GET_MODE_NAME (rld
[r
].outmode
));
6786 print_inline_rtx (f
, rld
[r
].out
, 24);
6787 fprintf (f
, "\n\t");
6790 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
6792 fprintf (f
, "%s (opnum = %d)",
6793 reload_when_needed_name
[(int) rld
[r
].when_needed
],
6796 if (rld
[r
].optional
)
6797 fprintf (f
, ", optional");
6799 if (rld
[r
].nongroup
)
6800 fprintf (f
, ", nongroup");
6802 if (rld
[r
].inc
!= 0)
6803 fprintf (f
, ", inc by %d", rld
[r
].inc
);
6805 if (rld
[r
].nocombine
)
6806 fprintf (f
, ", can't combine");
6808 if (rld
[r
].secondary_p
)
6809 fprintf (f
, ", secondary_reload_p");
6811 if (rld
[r
].in_reg
!= 0)
6813 fprintf (f
, "\n\treload_in_reg: ");
6814 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
6817 if (rld
[r
].out_reg
!= 0)
6819 fprintf (f
, "\n\treload_out_reg: ");
6820 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
6823 if (rld
[r
].reg_rtx
!= 0)
6825 fprintf (f
, "\n\treload_reg_rtx: ");
6826 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
6830 if (rld
[r
].secondary_in_reload
!= -1)
6832 fprintf (f
, "%ssecondary_in_reload = %d",
6833 prefix
, rld
[r
].secondary_in_reload
);
6837 if (rld
[r
].secondary_out_reload
!= -1)
6838 fprintf (f
, "%ssecondary_out_reload = %d\n",
6839 prefix
, rld
[r
].secondary_out_reload
);
6842 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
6844 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
6845 insn_data
[rld
[r
].secondary_in_icode
].name
);
6849 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
6850 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
6851 insn_data
[rld
[r
].secondary_out_icode
].name
);
6860 debug_reload_to_stream (stderr
);