1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "insn-config.h"
92 #include "insn-codes.h"
96 #include "hard-reg-set.h"
100 #ifndef REGISTER_MOVE_COST
101 #define REGISTER_MOVE_COST(x, y) 2
104 /* The variables set up by `find_reloads' are:
106 n_reloads number of distinct reloads needed; max reload # + 1
107 tables indexed by reload number
108 reload_in rtx for value to reload from
109 reload_out rtx for where to store reload-reg afterward if nec
110 (often the same as reload_in)
111 reload_reg_class enum reg_class, saying what regs to reload into
112 reload_inmode enum machine_mode; mode this operand should have
113 when reloaded, on input.
114 reload_outmode enum machine_mode; mode this operand should have
115 when reloaded, on output.
116 reload_optional char, nonzero for an optional reload.
117 Optional reloads are ignored unless the
118 value is already sitting in a register.
119 reload_inc int, positive amount to increment or decrement by if
120 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
121 Ignored otherwise (don't assume it is zero).
122 reload_in_reg rtx. A reg for which reload_in is the equivalent.
123 If reload_in is a symbol_ref which came from
124 reg_equiv_constant, then this is the pseudo
125 which has that symbol_ref as equivalent.
126 reload_reg_rtx rtx. This is the register to reload into.
127 If it is zero when `find_reloads' returns,
128 you must find a suitable register in the class
129 specified by reload_reg_class, and store here
130 an rtx for that register with mode from
131 reload_inmode or reload_outmode.
132 reload_nocombine char, nonzero if this reload shouldn't be
133 combined with another reload.
134 reload_opnum int, operand number being reloaded. This is
135 used to group related reloads and need not always
136 be equal to the actual operand number in the insn,
137 though it current will be; for in-out operands, it
138 is one of the two operand numbers.
139 reload_when_needed enum, classifies reload as needed either for
140 addressing an input reload, addressing an output,
141 for addressing a non-reloaded mem ref,
142 or for unspecified purposes (i.e., more than one
144 reload_secondary_reload int, gives the reload number of a secondary
145 reload, when needed; otherwise -1
146 reload_secondary_p int, 1 if this is a secondary register for one
148 reload_secondary_icode enum insn_code, if a secondary reload is required,
149 gives the INSN_CODE that uses the secondary
150 reload as a scratch register, or CODE_FOR_nothing
151 if the secondary reload register is to be an
152 intermediate register. */
155 rtx reload_in
[MAX_RELOADS
];
156 rtx reload_out
[MAX_RELOADS
];
157 enum reg_class reload_reg_class
[MAX_RELOADS
];
158 enum machine_mode reload_inmode
[MAX_RELOADS
];
159 enum machine_mode reload_outmode
[MAX_RELOADS
];
160 rtx reload_reg_rtx
[MAX_RELOADS
];
161 char reload_optional
[MAX_RELOADS
];
162 int reload_inc
[MAX_RELOADS
];
163 rtx reload_in_reg
[MAX_RELOADS
];
164 char reload_nocombine
[MAX_RELOADS
];
165 int reload_opnum
[MAX_RELOADS
];
166 enum reload_type reload_when_needed
[MAX_RELOADS
];
167 int reload_secondary_reload
[MAX_RELOADS
];
168 int reload_secondary_p
[MAX_RELOADS
];
169 enum insn_code reload_secondary_icode
[MAX_RELOADS
];
171 /* All the "earlyclobber" operands of the current insn
172 are recorded here. */
174 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
176 int reload_n_operands
;
178 /* Replacing reloads.
180 If `replace_reloads' is nonzero, then as each reload is recorded
181 an entry is made for it in the table `replacements'.
182 Then later `subst_reloads' can look through that table and
183 perform all the replacements needed. */
185 /* Nonzero means record the places to replace. */
186 static int replace_reloads
;
188 /* Each replacement is recorded with a structure like this. */
191 rtx
*where
; /* Location to store in */
192 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
193 a SUBREG; 0 otherwise. */
194 int what
; /* which reload this is for */
195 enum machine_mode mode
; /* mode it must have */
198 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
200 /* Number of replacements currently recorded. */
201 static int n_replacements
;
203 /* Used to track what is modified by an operand. */
206 int reg_flag
; /* Nonzero if referencing a register. */
207 int safe
; /* Nonzero if this can't conflict with anything. */
208 rtx base
; /* Base adddress for MEM. */
209 HOST_WIDE_INT start
; /* Starting offset or register number. */
210 HOST_WIDE_INT end
; /* Endinf offset or register number. */
213 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
214 (see reg_equiv_address). */
215 static rtx memlocs
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
216 static int n_memlocs
;
218 #ifdef SECONDARY_MEMORY_NEEDED
220 /* Save MEMs needed to copy from one class of registers to another. One MEM
221 is used per mode, but normally only one or two modes are ever used.
223 We keep two versions, before and after register elimination. The one
224 after register elimination is record separately for each operand. This
225 is done in case the address is not valid to be sure that we separately
228 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
229 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
232 /* The instruction we are doing reloads for;
233 so we can test whether a register dies in it. */
234 static rtx this_insn
;
236 /* Nonzero if this instruction is a user-specified asm with operands. */
237 static int this_insn_is_asm
;
239 /* If hard_regs_live_known is nonzero,
240 we can tell which hard regs are currently live,
241 at least enough to succeed in choosing dummy reloads. */
242 static int hard_regs_live_known
;
244 /* Indexed by hard reg number,
245 element is nonegative if hard reg has been spilled.
246 This vector is passed to `find_reloads' as an argument
247 and is not changed here. */
248 static short *static_reload_reg_p
;
250 /* Set to 1 in subst_reg_equivs if it changes anything. */
251 static int subst_reg_equivs_changed
;
253 /* On return from push_reload, holds the reload-number for the OUT
254 operand, which can be different for that from the input operand. */
255 static int output_reloadnum
;
257 static enum reg_class find_secondary_reload
PROTO((rtx
, enum reg_class
,
258 enum machine_mode
, int,
263 enum machine_mode
*));
264 static int push_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
265 enum machine_mode
, enum machine_mode
,
266 int, int, int, enum reload_type
));
267 static void push_replacement
PROTO((rtx
*, int, enum machine_mode
));
268 static void combine_reloads
PROTO((void));
269 static rtx find_dummy_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*,
270 enum reg_class
, int));
271 static int hard_reg_set_here_p
PROTO((int, int, rtx
));
272 static struct decomposition decompose
PROTO((rtx
));
273 static int immune_p
PROTO((rtx
, rtx
, struct decomposition
));
274 static int alternative_allows_memconst
PROTO((char *, int));
275 static rtx find_reloads_toplev
PROTO((rtx
, int, enum reload_type
, int, int));
276 static rtx make_memloc
PROTO((rtx
, int));
277 static int find_reloads_address
PROTO((enum machine_mode
, rtx
*, rtx
, rtx
*,
278 int, enum reload_type
, int));
279 static rtx subst_reg_equivs
PROTO((rtx
));
280 static rtx subst_indexed_address
PROTO((rtx
));
281 static int find_reloads_address_1
PROTO((rtx
, int, rtx
*, int,
282 enum reload_type
,int));
283 static void find_reloads_address_part
PROTO((rtx
, rtx
*, enum reg_class
,
284 enum machine_mode
, int,
285 enum reload_type
, int));
286 static int find_inc_amount
PROTO((rtx
, rtx
));
288 #ifdef HAVE_SECONDARY_RELOADS
290 /* Determine if any secondary reloads are needed for loading (if IN_P is
291 non-zero) or storing (if IN_P is zero) X to or from a reload register of
292 register class RELOAD_CLASS in mode RELOAD_MODE.
294 Return the register class of a secondary reload register, or NO_REGS if
295 none. *PMODE is set to the mode that the register is required in.
296 If the reload register is needed as a scratch register instead of an
297 intermediate register, *PICODE is set to the insn_code of the insn to be
298 used to load or store the primary reload register; otherwise *PICODE
299 is set to CODE_FOR_nothing.
301 In some cases (such as storing MQ into an external memory location on
302 the RT), both an intermediate register and a scratch register. In that
303 case, *PICODE is set to CODE_FOR_nothing, the class for the intermediate
304 register is returned, and the *PTERTIARY_... variables are set to describe
305 the scratch register. */
307 static enum reg_class
308 find_secondary_reload (x
, reload_class
, reload_mode
, in_p
, picode
, pmode
,
309 ptertiary_class
, ptertiary_icode
, ptertiary_mode
)
311 enum reg_class reload_class
;
312 enum machine_mode reload_mode
;
314 enum insn_code
*picode
;
315 enum machine_mode
*pmode
;
316 enum reg_class
*ptertiary_class
;
317 enum insn_code
*ptertiary_icode
;
318 enum machine_mode
*ptertiary_mode
;
320 enum reg_class
class = NO_REGS
;
321 enum machine_mode mode
= reload_mode
;
322 enum insn_code icode
= CODE_FOR_nothing
;
323 enum reg_class t_class
= NO_REGS
;
324 enum machine_mode t_mode
= VOIDmode
;
325 enum insn_code t_icode
= CODE_FOR_nothing
;
327 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
328 is still a pseudo-register by now, it *must* have an equivalent MEM
329 but we don't want to assume that), use that equivalent when seeing if
330 a secondary reload is needed since whether or not a reload is needed
331 might be sensitive to the form of the MEM. */
333 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
334 && reg_equiv_mem
[REGNO (x
)] != 0)
335 x
= reg_equiv_mem
[REGNO (x
)];
337 #ifdef SECONDARY_INPUT_RELOAD_CLASS
339 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
342 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
344 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
347 /* If we don't need any secondary registers, go away; the rest of the
348 values won't be used. */
349 if (class == NO_REGS
)
352 /* Get a possible insn to use. If the predicate doesn't accept X, don't
355 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
356 : reload_out_optab
[(int) reload_mode
]);
358 if (icode
!= CODE_FOR_nothing
359 && insn_operand_predicate
[(int) icode
][in_p
]
360 && (! (insn_operand_predicate
[(int) icode
][in_p
]) (x
, reload_mode
)))
361 icode
= CODE_FOR_nothing
;
363 /* If we will be using an insn, see if it can directly handle the reload
364 register we will be using. If it can, the secondary reload is for a
365 scratch register. If it can't, we will use the secondary reload for
366 an intermediate register and require a tertiary reload for the scratch
369 if (icode
!= CODE_FOR_nothing
)
371 /* If IN_P is non-zero, the reload register will be the output in
372 operand 0. If IN_P is zero, the reload register will be the input
373 in operand 1. Outputs should have an initial "=", which we must
376 char insn_letter
= insn_operand_constraint
[(int) icode
][!in_p
][in_p
];
377 enum reg_class insn_class
378 = (insn_letter
== 'r' ? GENERAL_REGS
379 : REG_CLASS_FROM_LETTER (insn_letter
));
381 if (insn_class
== NO_REGS
382 || (in_p
&& insn_operand_constraint
[(int) icode
][!in_p
][0] != '=')
383 /* The scratch register's constraint must start with "=&". */
384 || insn_operand_constraint
[(int) icode
][2][0] != '='
385 || insn_operand_constraint
[(int) icode
][2][1] != '&')
388 if (reg_class_subset_p (reload_class
, insn_class
))
389 mode
= insn_operand_mode
[(int) icode
][2];
392 char t_letter
= insn_operand_constraint
[(int) icode
][2][2];
394 t_mode
= insn_operand_mode
[(int) icode
][2];
395 t_class
= (t_letter
== 'r' ? GENERAL_REGS
396 : REG_CLASS_FROM_LETTER (t_letter
));
398 icode
= CODE_FOR_nothing
;
404 *ptertiary_class
= t_class
;
405 *ptertiary_mode
= t_mode
;
406 *ptertiary_icode
= t_icode
;
410 #endif /* HAVE_SECONDARY_RELOADS */
412 #ifdef SECONDARY_MEMORY_NEEDED
414 /* Return a memory location that will be used to copy X in mode MODE.
415 If we haven't already made a location for this mode in this insn,
416 call find_reloads_address on the location being returned. */
419 get_secondary_mem (x
, mode
, opnum
, type
)
421 enum machine_mode mode
;
423 enum reload_type type
;
428 /* If MODE is narrower than a word, widen it. This is required because
429 most machines that require these memory locations do not support
430 short load and stores from all registers (e.g., FP registers). We could
431 possibly conditionalize this, but we lose nothing by doing the wider
434 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
435 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
437 /* If we already have made a MEM for this operand in MODE, return it. */
438 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
439 return secondary_memlocs_elim
[(int) mode
][opnum
];
441 /* If this is the first time we've tried to get a MEM for this mode,
442 allocate a new one. `something_changed' in reload will get set
443 by noticing that the frame size has changed. */
445 if (secondary_memlocs
[(int) mode
] == 0)
447 #ifdef SECONDARY_MEMORY_NEEDED_RTX
448 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
450 secondary_memlocs
[(int) mode
]
451 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
455 /* Get a version of the address doing any eliminations needed. If that
456 didn't give us a new MEM, make a new one if it isn't valid. */
458 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
459 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
461 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
462 loc
= copy_rtx (loc
);
464 /* The only time the call below will do anything is if the stack
465 offset is too large. In that case IND_LEVELS doesn't matter, so we
466 can just pass a zero. Adjust the type to be the address of the
467 corresponding object. If the address was valid, save the eliminated
468 address. If it wasn't valid, we need to make a reload each time, so
473 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
474 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
477 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
481 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
485 /* Clear any secondary memory locations we've made. */
488 clear_secondary_mem ()
490 bzero (secondary_memlocs
, sizeof secondary_memlocs
);
492 #endif /* SECONDARY_MEMORY_NEEDED */
494 /* Record one reload that needs to be performed.
495 IN is an rtx saying where the data are to be found before this instruction.
496 OUT says where they must be stored after the instruction.
497 (IN is zero for data not read, and OUT is zero for data not written.)
498 INLOC and OUTLOC point to the places in the instructions where
499 IN and OUT were found.
500 If IN and OUT are both non-zero, it means the same register must be used
501 to reload both IN and OUT.
503 CLASS is a register class required for the reloaded data.
504 INMODE is the machine mode that the instruction requires
505 for the reg that replaces IN and OUTMODE is likewise for OUT.
507 If IN is zero, then OUT's location and mode should be passed as
510 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
512 OPTIONAL nonzero means this reload does not need to be performed:
513 it can be discarded if that is more convenient.
515 OPNUM and TYPE say what the purpose of this reload is.
517 The return value is the reload-number for this reload.
519 If both IN and OUT are nonzero, in some rare cases we might
520 want to make two separate reloads. (Actually we never do this now.)
521 Therefore, the reload-number for OUT is stored in
522 output_reloadnum when we return; the return value applies to IN.
523 Usually (presently always), when IN and OUT are nonzero,
524 the two reload-numbers are equal, but the caller should be careful to
528 push_reload (in
, out
, inloc
, outloc
, class,
529 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
530 register rtx in
, out
;
532 enum reg_class
class;
533 enum machine_mode inmode
, outmode
;
537 enum reload_type type
;
541 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
542 int secondary_reload
= -1;
543 enum insn_code secondary_icode
= CODE_FOR_nothing
;
545 /* Compare two RTX's. */
546 #define MATCHES(x, y) \
547 (x == y || (x != 0 && (GET_CODE (x) == REG \
548 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
549 : rtx_equal_p (x, y) && ! side_effects_p (x))))
551 /* Indicates if two reloads purposes are for similar enough things that we
552 can merge their reloads. */
553 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
554 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
555 || ((when1) == (when2) && (op1) == (op2)) \
556 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
557 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
558 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
559 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
560 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
562 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
563 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
564 ((when1) != (when2) \
565 || ! ((op1) == (op2) \
566 || (when1) == RELOAD_FOR_INPUT \
567 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
568 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
570 /* INMODE and/or OUTMODE could be VOIDmode if no mode
571 has been specified for the operand. In that case,
572 use the operand's mode as the mode to reload. */
573 if (inmode
== VOIDmode
&& in
!= 0)
574 inmode
= GET_MODE (in
);
575 if (outmode
== VOIDmode
&& out
!= 0)
576 outmode
= GET_MODE (out
);
578 /* If IN is a pseudo register everywhere-equivalent to a constant, and
579 it is not in a hard register, reload straight from the constant,
580 since we want to get rid of such pseudo registers.
581 Often this is done earlier, but not always in find_reloads_address. */
582 if (in
!= 0 && GET_CODE (in
) == REG
)
584 register int regno
= REGNO (in
);
586 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
587 && reg_equiv_constant
[regno
] != 0)
588 in
= reg_equiv_constant
[regno
];
591 /* Likewise for OUT. Of course, OUT will never be equivalent to
592 an actual constant, but it might be equivalent to a memory location
593 (in the case of a parameter). */
594 if (out
!= 0 && GET_CODE (out
) == REG
)
596 register int regno
= REGNO (out
);
598 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
599 && reg_equiv_constant
[regno
] != 0)
600 out
= reg_equiv_constant
[regno
];
603 /* If we have a read-write operand with an address side-effect,
604 change either IN or OUT so the side-effect happens only once. */
605 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
607 if (GET_CODE (XEXP (in
, 0)) == POST_INC
608 || GET_CODE (XEXP (in
, 0)) == POST_DEC
)
609 in
= gen_rtx (MEM
, GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
610 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
611 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
)
612 out
= gen_rtx (MEM
, GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
615 /* If we are reloading a (SUBREG (MEM ...) ...) or (SUBREG constant ...),
616 really reload just the inside expression in its own mode.
617 If we have (SUBREG:M1 (REG:M2 ...) ...) with M1 wider than M2 and the
618 register is a pseudo, this will become the same as the above case.
619 Do the same for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
620 either M1 is not valid for R or M2 is wider than a word but we only
621 need one word to store an M2-sized quantity in R.
622 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
623 we can't handle it here because CONST_INT does not indicate a mode.
625 Similarly, we must reload the inside expression if we have a
626 STRICT_LOW_PART (presumably, in == out in the cas).
628 Also reload the inner expression if it does not require a secondary
629 reload but the SUBREG does. */
631 if (in
!= 0 && GET_CODE (in
) == SUBREG
632 && (GET_CODE (SUBREG_REG (in
)) != REG
634 || (GET_CODE (SUBREG_REG (in
)) == REG
635 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
636 && (GET_MODE_SIZE (inmode
)
637 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))))
638 || (GET_CODE (SUBREG_REG (in
)) == REG
639 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
640 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in
)), inmode
)
641 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
642 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
644 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
646 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
647 GET_MODE (SUBREG_REG (in
)))))))
648 #ifdef SECONDARY_INPUT_RELOAD_CLASS
649 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
650 && (SECONDARY_INPUT_RELOAD_CLASS (class,
651 GET_MODE (SUBREG_REG (in
)),
657 in_subreg_loc
= inloc
;
658 inloc
= &SUBREG_REG (in
);
660 #if ! defined(BYTE_LOADS_ZERO_EXTEND) && ! defined(BYTE_LOADS_SIGN_EXTEND)
661 if (GET_CODE (in
) == MEM
)
662 /* This is supposed to happen only for paradoxical subregs made by
663 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
664 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
667 inmode
= GET_MODE (in
);
670 /* Similarly for paradoxical and problematical SUBREGs on the output.
671 Note that there is no reason we need worry about the previous value
672 of SUBREG_REG (out); even if wider than out,
673 storing in a subreg is entitled to clobber it all
674 (except in the case of STRICT_LOW_PART,
675 and in that case the constraint should label it input-output.) */
676 if (out
!= 0 && GET_CODE (out
) == SUBREG
677 && (GET_CODE (SUBREG_REG (out
)) != REG
679 || (GET_CODE (SUBREG_REG (out
)) == REG
680 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
681 && (GET_MODE_SIZE (outmode
)
682 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))))
683 || (GET_CODE (SUBREG_REG (out
)) == REG
684 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
685 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out
)), outmode
)
686 || (GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
687 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
689 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
691 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
692 GET_MODE (SUBREG_REG (out
)))))))
693 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
694 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
695 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
696 GET_MODE (SUBREG_REG (out
)),
702 out_subreg_loc
= outloc
;
703 outloc
= &SUBREG_REG (out
);
705 #if ! defined(BYTE_LOADS_ZERO_EXTEND) && ! defined(BYTE_LOADS_SIGN_EXTEND)
706 if (GET_CODE (out
) == MEM
707 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
710 outmode
= GET_MODE (out
);
713 /* If IN appears in OUT, we can't share any input-only reload for IN. */
714 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
715 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
716 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
719 /* If IN is a SUBREG of a hard register, make a new REG. This
720 simplifies some of the cases below. */
722 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
723 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
724 in
= gen_rtx (REG
, GET_MODE (in
),
725 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
727 /* Similarly for OUT. */
728 if (out
!= 0 && GET_CODE (out
) == SUBREG
729 && GET_CODE (SUBREG_REG (out
)) == REG
730 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
731 out
= gen_rtx (REG
, GET_MODE (out
),
732 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
734 /* Narrow down the class of register wanted if that is
735 desirable on this machine for efficiency. */
737 class = PREFERRED_RELOAD_CLASS (in
, class);
739 /* Output reloads may need analogous treatment, different in detail. */
740 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
742 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
745 /* Make sure we use a class that can handle the actual pseudo
746 inside any subreg. For example, on the 386, QImode regs
747 can appear within SImode subregs. Although GENERAL_REGS
748 can handle SImode, QImode needs a smaller class. */
749 #ifdef LIMIT_RELOAD_CLASS
751 class = LIMIT_RELOAD_CLASS (inmode
, class);
752 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
753 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
756 class = LIMIT_RELOAD_CLASS (outmode
, class);
757 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
758 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
761 /* Verify that this class is at least possible for the mode that
763 if (this_insn_is_asm
)
765 enum machine_mode mode
;
766 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
770 if (mode
== VOIDmode
)
772 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
779 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
780 if (HARD_REGNO_MODE_OK (i
, mode
)
781 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
783 int nregs
= HARD_REGNO_NREGS (i
, mode
);
786 for (j
= 1; j
< nregs
; j
++)
787 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
792 if (i
== FIRST_PSEUDO_REGISTER
)
794 error_for_asm (this_insn
, "impossible register constraint in `asm'");
799 if (class == NO_REGS
)
802 /* We can use an existing reload if the class is right
803 and at least one of IN and OUT is a match
804 and the other is at worst neutral.
805 (A zero compared against anything is neutral.)
807 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
808 for the same thing since that can cause us to need more reload registers
809 than we otherwise would. */
811 for (i
= 0; i
< n_reloads
; i
++)
812 if ((reg_class_subset_p (class, reload_reg_class
[i
])
813 || reg_class_subset_p (reload_reg_class
[i
], class))
814 /* If the existing reload has a register, it must fit our class. */
815 && (reload_reg_rtx
[i
] == 0
816 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
817 true_regnum (reload_reg_rtx
[i
])))
818 && ((in
!= 0 && MATCHES (reload_in
[i
], in
) && ! dont_share
819 && (out
== 0 || reload_out
[i
] == 0 || MATCHES (reload_out
[i
], out
)))
821 (out
!= 0 && MATCHES (reload_out
[i
], out
)
822 && (in
== 0 || reload_in
[i
] == 0 || MATCHES (reload_in
[i
], in
))))
823 && (reg_class_size
[(int) class] == 1
824 #ifdef SMALL_REGISTER_CLASSES
828 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
829 opnum
, reload_opnum
[i
]))
832 /* Reloading a plain reg for input can match a reload to postincrement
833 that reg, since the postincrement's value is the right value.
834 Likewise, it can match a preincrement reload, since we regard
835 the preincrementation as happening before any ref in this insn
838 for (i
= 0; i
< n_reloads
; i
++)
839 if ((reg_class_subset_p (class, reload_reg_class
[i
])
840 || reg_class_subset_p (reload_reg_class
[i
], class))
841 /* If the existing reload has a register, it must fit our class. */
842 && (reload_reg_rtx
[i
] == 0
843 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
844 true_regnum (reload_reg_rtx
[i
])))
845 && out
== 0 && reload_out
[i
] == 0 && reload_in
[i
] != 0
846 && ((GET_CODE (in
) == REG
847 && (GET_CODE (reload_in
[i
]) == POST_INC
848 || GET_CODE (reload_in
[i
]) == POST_DEC
849 || GET_CODE (reload_in
[i
]) == PRE_INC
850 || GET_CODE (reload_in
[i
]) == PRE_DEC
)
851 && MATCHES (XEXP (reload_in
[i
], 0), in
))
853 (GET_CODE (reload_in
[i
]) == REG
854 && (GET_CODE (in
) == POST_INC
855 || GET_CODE (in
) == POST_DEC
856 || GET_CODE (in
) == PRE_INC
857 || GET_CODE (in
) == PRE_DEC
)
858 && MATCHES (XEXP (in
, 0), reload_in
[i
])))
859 && (reg_class_size
[(int) class] == 1
860 #ifdef SMALL_REGISTER_CLASSES
864 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
865 opnum
, reload_opnum
[i
]))
867 /* Make sure reload_in ultimately has the increment,
868 not the plain register. */
869 if (GET_CODE (in
) == REG
)
876 #ifdef HAVE_SECONDARY_RELOADS
877 enum reg_class secondary_class
= NO_REGS
;
878 enum reg_class secondary_out_class
= NO_REGS
;
879 enum machine_mode secondary_mode
= inmode
;
880 enum machine_mode secondary_out_mode
= outmode
;
881 enum insn_code secondary_icode
;
882 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
883 enum reg_class tertiary_class
= NO_REGS
;
884 enum reg_class tertiary_out_class
= NO_REGS
;
885 enum machine_mode tertiary_mode
;
886 enum machine_mode tertiary_out_mode
;
887 enum insn_code tertiary_icode
;
888 enum insn_code tertiary_out_icode
= CODE_FOR_nothing
;
889 int tertiary_reload
= -1;
891 /* See if we need a secondary reload register to move between
892 CLASS and IN or CLASS and OUT. Get the modes and icodes to
893 use for each of them if so. */
895 #ifdef SECONDARY_INPUT_RELOAD_CLASS
898 = find_secondary_reload (in
, class, inmode
, 1, &secondary_icode
,
899 &secondary_mode
, &tertiary_class
,
900 &tertiary_icode
, &tertiary_mode
);
903 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
904 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
906 = find_secondary_reload (out
, class, outmode
, 0,
907 &secondary_out_icode
, &secondary_out_mode
,
908 &tertiary_out_class
, &tertiary_out_icode
,
912 /* We can only record one secondary and one tertiary reload. If both
913 IN and OUT need secondary reloads, we can only make an in-out
914 reload if neither need an insn and if the classes are compatible.
915 If they aren't, all we can do is abort since making two separate
916 reloads is invalid. */
918 if (secondary_class
!= NO_REGS
&& secondary_out_class
!= NO_REGS
919 && reg_class_subset_p (secondary_out_class
, secondary_class
))
920 secondary_class
= secondary_out_class
;
922 if (secondary_class
!= NO_REGS
&& secondary_out_class
!= NO_REGS
923 && (! reg_class_subset_p (secondary_class
, secondary_out_class
)
924 || secondary_icode
!= CODE_FOR_nothing
925 || secondary_out_icode
!= CODE_FOR_nothing
))
928 /* If we need a secondary reload for OUT but not IN, copy the
930 if (secondary_class
== NO_REGS
&& secondary_out_class
!= NO_REGS
)
932 secondary_class
= secondary_out_class
;
933 secondary_icode
= secondary_out_icode
;
934 tertiary_class
= tertiary_out_class
;
935 tertiary_icode
= tertiary_out_icode
;
936 tertiary_mode
= tertiary_out_mode
;
939 if (secondary_class
!= NO_REGS
)
941 /* Secondary reloads don't conflict as badly as the primary object
942 being reload. Specifically, we can always treat them as
943 being for an input or output address and hence allowed to be
944 reused in the same manner such address components could be
945 reused. This is used as the reload_type for our secondary
948 enum reload_type secondary_type
949 = (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
950 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
953 /* If we need a tertiary reload, see if we have one we can reuse
956 if (tertiary_class
!= NO_REGS
)
958 for (tertiary_reload
= 0; tertiary_reload
< n_reloads
;
960 if (reload_secondary_p
[tertiary_reload
]
961 && (reg_class_subset_p (tertiary_class
,
962 reload_reg_class
[tertiary_reload
])
963 || reg_class_subset_p (reload_reg_class
[tertiary_reload
],
965 && ((reload_inmode
[tertiary_reload
] == tertiary_mode
)
966 || reload_inmode
[tertiary_reload
] == VOIDmode
)
967 && ((reload_outmode
[tertiary_reload
] == tertiary_mode
)
968 || reload_outmode
[tertiary_reload
] == VOIDmode
)
969 && (reload_secondary_icode
[tertiary_reload
]
971 && (reg_class_size
[(int) tertiary_class
] == 1
972 #ifdef SMALL_REGISTER_CLASSES
976 && MERGABLE_RELOADS (secondary_type
,
977 reload_when_needed
[tertiary_reload
],
978 opnum
, reload_opnum
[tertiary_reload
]))
980 if (tertiary_mode
!= VOIDmode
)
981 reload_inmode
[tertiary_reload
] = tertiary_mode
;
982 if (tertiary_out_mode
!= VOIDmode
)
983 reload_outmode
[tertiary_reload
] = tertiary_mode
;
984 if (reg_class_subset_p (tertiary_class
,
985 reload_reg_class
[tertiary_reload
]))
986 reload_reg_class
[tertiary_reload
] = tertiary_class
;
987 if (MERGE_TO_OTHER (secondary_type
,
988 reload_when_needed
[tertiary_reload
],
990 reload_opnum
[tertiary_reload
]))
991 reload_when_needed
[tertiary_reload
] = RELOAD_OTHER
;
992 reload_opnum
[tertiary_reload
]
993 = MIN (reload_opnum
[tertiary_reload
], opnum
);
994 reload_optional
[tertiary_reload
] &= optional
;
995 reload_secondary_p
[tertiary_reload
] = 1;
998 if (tertiary_reload
== n_reloads
)
1000 /* We need to make a new tertiary reload for this register
1002 reload_in
[tertiary_reload
] = reload_out
[tertiary_reload
] = 0;
1003 reload_reg_class
[tertiary_reload
] = tertiary_class
;
1004 reload_inmode
[tertiary_reload
] = tertiary_mode
;
1005 reload_outmode
[tertiary_reload
] = tertiary_mode
;
1006 reload_reg_rtx
[tertiary_reload
] = 0;
1007 reload_optional
[tertiary_reload
] = optional
;
1008 reload_inc
[tertiary_reload
] = 0;
1009 /* Maybe we could combine these, but it seems too tricky. */
1010 reload_nocombine
[tertiary_reload
] = 1;
1011 reload_in_reg
[tertiary_reload
] = 0;
1012 reload_opnum
[tertiary_reload
] = opnum
;
1013 reload_when_needed
[tertiary_reload
] = secondary_type
;
1014 reload_secondary_reload
[tertiary_reload
] = -1;
1015 reload_secondary_icode
[tertiary_reload
] = CODE_FOR_nothing
;
1016 reload_secondary_p
[tertiary_reload
] = 1;
1023 /* See if we can reuse an existing secondary reload. */
1024 for (secondary_reload
= 0; secondary_reload
< n_reloads
;
1026 if (reload_secondary_p
[secondary_reload
]
1027 && (reg_class_subset_p (secondary_class
,
1028 reload_reg_class
[secondary_reload
])
1029 || reg_class_subset_p (reload_reg_class
[secondary_reload
],
1031 && ((reload_inmode
[secondary_reload
] == secondary_mode
)
1032 || reload_inmode
[secondary_reload
] == VOIDmode
)
1033 && ((reload_outmode
[secondary_reload
] == secondary_out_mode
)
1034 || reload_outmode
[secondary_reload
] == VOIDmode
)
1035 && reload_secondary_reload
[secondary_reload
] == tertiary_reload
1036 && reload_secondary_icode
[secondary_reload
] == tertiary_icode
1037 && (reg_class_size
[(int) secondary_class
] == 1
1038 #ifdef SMALL_REGISTER_CLASSES
1042 && MERGABLE_RELOADS (secondary_type
,
1043 reload_when_needed
[secondary_reload
],
1044 opnum
, reload_opnum
[secondary_reload
]))
1046 if (secondary_mode
!= VOIDmode
)
1047 reload_inmode
[secondary_reload
] = secondary_mode
;
1048 if (secondary_out_mode
!= VOIDmode
)
1049 reload_outmode
[secondary_reload
] = secondary_out_mode
;
1050 if (reg_class_subset_p (secondary_class
,
1051 reload_reg_class
[secondary_reload
]))
1052 reload_reg_class
[secondary_reload
] = secondary_class
;
1053 if (MERGE_TO_OTHER (secondary_type
,
1054 reload_when_needed
[secondary_reload
],
1055 opnum
, reload_opnum
[secondary_reload
]))
1056 reload_when_needed
[secondary_reload
] = RELOAD_OTHER
;
1057 reload_opnum
[secondary_reload
]
1058 = MIN (reload_opnum
[secondary_reload
], opnum
);
1059 reload_optional
[secondary_reload
] &= optional
;
1060 reload_secondary_p
[secondary_reload
] = 1;
1063 if (secondary_reload
== n_reloads
)
1065 /* We need to make a new secondary reload for this register
1067 reload_in
[secondary_reload
] = reload_out
[secondary_reload
] = 0;
1068 reload_reg_class
[secondary_reload
] = secondary_class
;
1069 reload_inmode
[secondary_reload
] = secondary_mode
;
1070 reload_outmode
[secondary_reload
] = secondary_out_mode
;
1071 reload_reg_rtx
[secondary_reload
] = 0;
1072 reload_optional
[secondary_reload
] = optional
;
1073 reload_inc
[secondary_reload
] = 0;
1074 /* Maybe we could combine these, but it seems too tricky. */
1075 reload_nocombine
[secondary_reload
] = 1;
1076 reload_in_reg
[secondary_reload
] = 0;
1077 reload_opnum
[secondary_reload
] = opnum
;
1078 reload_when_needed
[secondary_reload
] = secondary_type
;
1079 reload_secondary_reload
[secondary_reload
] = tertiary_reload
;
1080 reload_secondary_icode
[secondary_reload
] = tertiary_icode
;
1081 reload_secondary_p
[secondary_reload
] = 1;
1086 #ifdef SECONDARY_MEMORY_NEEDED
1087 /* If we need a memory location to copy between the two
1088 reload regs, set it up now. */
1090 if (in
!= 0 && secondary_icode
== CODE_FOR_nothing
1091 && SECONDARY_MEMORY_NEEDED (secondary_class
, class, inmode
))
1092 get_secondary_mem (in
, inmode
, opnum
, type
);
1094 if (out
!= 0 && secondary_icode
== CODE_FOR_nothing
1095 && SECONDARY_MEMORY_NEEDED (class, secondary_class
, outmode
))
1096 get_secondary_mem (out
, outmode
, opnum
, type
);
1102 /* We found no existing reload suitable for re-use.
1103 So add an additional reload. */
1106 reload_out
[i
] = out
;
1107 reload_reg_class
[i
] = class;
1108 reload_inmode
[i
] = inmode
;
1109 reload_outmode
[i
] = outmode
;
1110 reload_reg_rtx
[i
] = 0;
1111 reload_optional
[i
] = optional
;
1113 reload_nocombine
[i
] = 0;
1114 reload_in_reg
[i
] = inloc
? *inloc
: 0;
1115 reload_opnum
[i
] = opnum
;
1116 reload_when_needed
[i
] = type
;
1117 reload_secondary_reload
[i
] = secondary_reload
;
1118 reload_secondary_icode
[i
] = secondary_icode
;
1119 reload_secondary_p
[i
] = 0;
1123 #ifdef SECONDARY_MEMORY_NEEDED
1124 /* If a memory location is needed for the copy, make one. */
1125 if (in
!= 0 && GET_CODE (in
) == REG
1126 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1127 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1129 get_secondary_mem (in
, inmode
, opnum
, type
);
1131 if (out
!= 0 && GET_CODE (out
) == REG
1132 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1133 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1135 get_secondary_mem (out
, outmode
, opnum
, type
);
1140 /* We are reusing an existing reload,
1141 but we may have additional information for it.
1142 For example, we may now have both IN and OUT
1143 while the old one may have just one of them. */
1145 if (inmode
!= VOIDmode
)
1146 reload_inmode
[i
] = inmode
;
1147 if (outmode
!= VOIDmode
)
1148 reload_outmode
[i
] = outmode
;
1152 reload_out
[i
] = out
;
1153 if (reg_class_subset_p (class, reload_reg_class
[i
]))
1154 reload_reg_class
[i
] = class;
1155 reload_optional
[i
] &= optional
;
1156 if (MERGE_TO_OTHER (type
, reload_when_needed
[i
],
1157 opnum
, reload_opnum
[i
]))
1158 reload_when_needed
[i
] = RELOAD_OTHER
;
1159 reload_opnum
[i
] = MIN (reload_opnum
[i
], opnum
);
1162 /* If the ostensible rtx being reload differs from the rtx found
1163 in the location to substitute, this reload is not safe to combine
1164 because we cannot reliably tell whether it appears in the insn. */
1166 if (in
!= 0 && in
!= *inloc
)
1167 reload_nocombine
[i
] = 1;
1170 /* This was replaced by changes in find_reloads_address_1 and the new
1171 function inc_for_reload, which go with a new meaning of reload_inc. */
1173 /* If this is an IN/OUT reload in an insn that sets the CC,
1174 it must be for an autoincrement. It doesn't work to store
1175 the incremented value after the insn because that would clobber the CC.
1176 So we must do the increment of the value reloaded from,
1177 increment it, store it back, then decrement again. */
1178 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1182 reload_inc
[i
] = find_inc_amount (PATTERN (this_insn
), in
);
1183 /* If we did not find a nonzero amount-to-increment-by,
1184 that contradicts the belief that IN is being incremented
1185 in an address in this insn. */
1186 if (reload_inc
[i
] == 0)
1191 /* If we will replace IN and OUT with the reload-reg,
1192 record where they are located so that substitution need
1193 not do a tree walk. */
1195 if (replace_reloads
)
1199 register struct replacement
*r
= &replacements
[n_replacements
++];
1201 r
->subreg_loc
= in_subreg_loc
;
1205 if (outloc
!= 0 && outloc
!= inloc
)
1207 register struct replacement
*r
= &replacements
[n_replacements
++];
1210 r
->subreg_loc
= out_subreg_loc
;
1215 /* If this reload is just being introduced and it has both
1216 an incoming quantity and an outgoing quantity that are
1217 supposed to be made to match, see if either one of the two
1218 can serve as the place to reload into.
1220 If one of them is acceptable, set reload_reg_rtx[i]
1223 if (in
!= 0 && out
!= 0 && in
!= out
&& reload_reg_rtx
[i
] == 0)
1225 reload_reg_rtx
[i
] = find_dummy_reload (in
, out
, inloc
, outloc
,
1226 reload_reg_class
[i
], i
);
1228 /* If the outgoing register already contains the same value
1229 as the incoming one, we can dispense with loading it.
1230 The easiest way to tell the caller that is to give a phony
1231 value for the incoming operand (same as outgoing one). */
1232 if (reload_reg_rtx
[i
] == out
1233 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1234 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1235 static_reload_reg_p
, i
, inmode
))
1239 /* If this is an input reload and the operand contains a register that
1240 dies in this insn and is used nowhere else, see if it is the right class
1241 to be used for this reload. Use it if so. (This occurs most commonly
1242 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1243 this if it is also an output reload that mentions the register unless
1244 the output is a SUBREG that clobbers an entire register.
1246 Note that the operand might be one of the spill regs, if it is a
1247 pseudo reg and we are in a block where spilling has not taken place.
1248 But if there is no spilling in this block, that is OK.
1249 An explicitly used hard reg cannot be a spill reg. */
1251 if (reload_reg_rtx
[i
] == 0 && in
!= 0)
1256 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1257 if (REG_NOTE_KIND (note
) == REG_DEAD
1258 && GET_CODE (XEXP (note
, 0)) == REG
1259 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1260 && reg_mentioned_p (XEXP (note
, 0), in
)
1261 && ! refers_to_regno_for_reload_p (regno
,
1263 + HARD_REGNO_NREGS (regno
,
1265 PATTERN (this_insn
), inloc
)
1267 || (GET_CODE (in
) == SUBREG
1268 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1270 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1271 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1272 /* Make sure the operand fits in the reg that dies. */
1273 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1274 && HARD_REGNO_MODE_OK (regno
, inmode
)
1275 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1276 && HARD_REGNO_MODE_OK (regno
, outmode
)
1277 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], regno
)
1278 && !fixed_regs
[regno
])
1280 reload_reg_rtx
[i
] = gen_rtx (REG
, inmode
, regno
);
1286 output_reloadnum
= i
;
1291 /* Record an additional place we must replace a value
1292 for which we have already recorded a reload.
1293 RELOADNUM is the value returned by push_reload
1294 when the reload was recorded.
1295 This is used in insn patterns that use match_dup. */
1298 push_replacement (loc
, reloadnum
, mode
)
1301 enum machine_mode mode
;
1303 if (replace_reloads
)
1305 register struct replacement
*r
= &replacements
[n_replacements
++];
1306 r
->what
= reloadnum
;
1313 /* Transfer all replacements that used to be in reload FROM to be in
1317 transfer_replacements (to
, from
)
1322 for (i
= 0; i
< n_replacements
; i
++)
1323 if (replacements
[i
].what
== from
)
1324 replacements
[i
].what
= to
;
1327 /* If there is only one output reload, and it is not for an earlyclobber
1328 operand, try to combine it with a (logically unrelated) input reload
1329 to reduce the number of reload registers needed.
1331 This is safe if the input reload does not appear in
1332 the value being output-reloaded, because this implies
1333 it is not needed any more once the original insn completes.
1335 If that doesn't work, see we can use any of the registers that
1336 die in this insn as a reload register. We can if it is of the right
1337 class and does not appear in the value being output-reloaded. */
1343 int output_reload
= -1;
1346 /* Find the output reload; return unless there is exactly one
1347 and that one is mandatory. */
1349 for (i
= 0; i
< n_reloads
; i
++)
1350 if (reload_out
[i
] != 0)
1352 if (output_reload
>= 0)
1357 if (output_reload
< 0 || reload_optional
[output_reload
])
1360 /* An input-output reload isn't combinable. */
1362 if (reload_in
[output_reload
] != 0)
1365 /* If this reload is for an earlyclobber operand, we can't do anything. */
1367 for (i
= 0; i
< n_earlyclobbers
; i
++)
1368 if (reload_out
[output_reload
] == reload_earlyclobbers
[i
])
1371 /* Check each input reload; can we combine it? */
1373 for (i
= 0; i
< n_reloads
; i
++)
1374 if (reload_in
[i
] && ! reload_optional
[i
] && ! reload_nocombine
[i
]
1375 /* Life span of this reload must not extend past main insn. */
1376 && reload_when_needed
[i
] != RELOAD_FOR_OUTPUT_ADDRESS
1377 && reload_when_needed
[i
] != RELOAD_OTHER
1378 && (CLASS_MAX_NREGS (reload_reg_class
[i
], reload_inmode
[i
])
1379 == CLASS_MAX_NREGS (reload_reg_class
[output_reload
],
1380 reload_outmode
[output_reload
]))
1381 && reload_inc
[i
] == 0
1382 && reload_reg_rtx
[i
] == 0
1383 /* Don't combine two reloads with different secondary reloads. */
1384 && (reload_secondary_reload
[i
] == reload_secondary_reload
[output_reload
]
1385 || reload_secondary_reload
[i
] == -1
1386 || reload_secondary_reload
[output_reload
] == -1)
1387 #ifdef SECONDARY_MEMORY_NEEDED
1388 /* Likewise for different secondary memory locations. */
1389 && (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]] == 0
1390 || secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] == 0
1391 || rtx_equal_p (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]],
1392 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]]))
1394 #ifdef SMALL_REGISTER_CLASSES
1395 && reload_reg_class
[i
] == reload_reg_class
[output_reload
]
1397 && (reg_class_subset_p (reload_reg_class
[i
],
1398 reload_reg_class
[output_reload
])
1399 || reg_class_subset_p (reload_reg_class
[output_reload
],
1400 reload_reg_class
[i
]))
1402 && (MATCHES (reload_in
[i
], reload_out
[output_reload
])
1403 /* Args reversed because the first arg seems to be
1404 the one that we imagine being modified
1405 while the second is the one that might be affected. */
1406 || (! reg_overlap_mentioned_for_reload_p (reload_out
[output_reload
],
1408 /* However, if the input is a register that appears inside
1409 the output, then we also can't share.
1410 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1411 If the same reload reg is used for both reg 69 and the
1412 result to be stored in memory, then that result
1413 will clobber the address of the memory ref. */
1414 && ! (GET_CODE (reload_in
[i
]) == REG
1415 && reg_overlap_mentioned_for_reload_p (reload_in
[i
],
1416 reload_out
[output_reload
]))))
1417 && (reg_class_size
[(int) reload_reg_class
[i
]]
1418 #ifdef SMALL_REGISTER_CLASSES
1422 /* We will allow making things slightly worse by combining an
1423 input and an output, but no worse than that. */
1424 && (reload_when_needed
[i
] == RELOAD_FOR_INPUT
1425 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT
))
1429 /* We have found a reload to combine with! */
1430 reload_out
[i
] = reload_out
[output_reload
];
1431 reload_outmode
[i
] = reload_outmode
[output_reload
];
1432 /* Mark the old output reload as inoperative. */
1433 reload_out
[output_reload
] = 0;
1434 /* The combined reload is needed for the entire insn. */
1435 reload_when_needed
[i
] = RELOAD_OTHER
;
1436 /* If the output reload had a secondary reload, copy it. */
1437 if (reload_secondary_reload
[output_reload
] != -1)
1438 reload_secondary_reload
[i
] = reload_secondary_reload
[output_reload
];
1439 #ifdef SECONDARY_MEMORY_NEEDED
1440 /* Copy any secondary MEM. */
1441 if (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] != 0)
1442 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]]
1443 = secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]];
1445 /* If required, minimize the register class. */
1446 if (reg_class_subset_p (reload_reg_class
[output_reload
],
1447 reload_reg_class
[i
]))
1448 reload_reg_class
[i
] = reload_reg_class
[output_reload
];
1450 /* Transfer all replacements from the old reload to the combined. */
1451 for (j
= 0; j
< n_replacements
; j
++)
1452 if (replacements
[j
].what
== output_reload
)
1453 replacements
[j
].what
= i
;
1458 /* If this insn has only one operand that is modified or written (assumed
1459 to be the first), it must be the one corresponding to this reload. It
1460 is safe to use anything that dies in this insn for that output provided
1461 that it does not occur in the output (we already know it isn't an
1462 earlyclobber. If this is an asm insn, give up. */
1464 if (INSN_CODE (this_insn
) == -1)
1467 for (i
= 1; i
< insn_n_operands
[INSN_CODE (this_insn
)]; i
++)
1468 if (insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '='
1469 || insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '+')
1472 /* See if some hard register that dies in this insn and is not used in
1473 the output is the right class. Only works if the register we pick
1474 up can fully hold our output reload. */
1475 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1476 if (REG_NOTE_KIND (note
) == REG_DEAD
1477 && GET_CODE (XEXP (note
, 0)) == REG
1478 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1479 reload_out
[output_reload
])
1480 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1481 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1482 && TEST_HARD_REG_BIT (reg_class_contents
[(int) reload_reg_class
[output_reload
]],
1483 REGNO (XEXP (note
, 0)))
1484 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1485 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1486 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1488 reload_reg_rtx
[output_reload
] = gen_rtx (REG
,
1489 reload_outmode
[output_reload
],
1490 REGNO (XEXP (note
, 0)));
1495 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1496 See if one of IN and OUT is a register that may be used;
1497 this is desirable since a spill-register won't be needed.
1498 If so, return the register rtx that proves acceptable.
1500 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1501 CLASS is the register class required for the reload.
1503 If FOR_REAL is >= 0, it is the number of the reload,
1504 and in some cases when it can be discovered that OUT doesn't need
1505 to be computed, clear out reload_out[FOR_REAL].
1507 If FOR_REAL is -1, this should not be done, because this call
1508 is just to see if a register can be found, not to find and install it. */
1511 find_dummy_reload (real_in
, real_out
, inloc
, outloc
, class, for_real
)
1512 rtx real_in
, real_out
;
1513 rtx
*inloc
, *outloc
;
1514 enum reg_class
class;
1523 /* If operands exceed a word, we can't use either of them
1524 unless they have the same size. */
1525 if (GET_MODE_SIZE (GET_MODE (real_out
)) != GET_MODE_SIZE (GET_MODE (real_in
))
1526 && (GET_MODE_SIZE (GET_MODE (real_out
)) > UNITS_PER_WORD
1527 || GET_MODE_SIZE (GET_MODE (real_in
)) > UNITS_PER_WORD
))
1530 /* Find the inside of any subregs. */
1531 while (GET_CODE (out
) == SUBREG
)
1533 out_offset
= SUBREG_WORD (out
);
1534 out
= SUBREG_REG (out
);
1536 while (GET_CODE (in
) == SUBREG
)
1538 in_offset
= SUBREG_WORD (in
);
1539 in
= SUBREG_REG (in
);
1542 /* Narrow down the reg class, the same way push_reload will;
1543 otherwise we might find a dummy now, but push_reload won't. */
1544 class = PREFERRED_RELOAD_CLASS (in
, class);
1546 /* See if OUT will do. */
1547 if (GET_CODE (out
) == REG
1548 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1550 register int regno
= REGNO (out
) + out_offset
;
1551 int nwords
= HARD_REGNO_NREGS (regno
, GET_MODE (real_out
));
1554 /* When we consider whether the insn uses OUT,
1555 ignore references within IN. They don't prevent us
1556 from copying IN into OUT, because those refs would
1557 move into the insn that reloads IN.
1559 However, we only ignore IN in its role as this reload.
1560 If the insn uses IN elsewhere and it contains OUT,
1561 that counts. We can't be sure it's the "same" operand
1562 so it might not go through this reload. */
1564 *inloc
= const0_rtx
;
1566 if (regno
< FIRST_PSEUDO_REGISTER
1567 /* A fixed reg that can overlap other regs better not be used
1568 for reloading in any way. */
1569 #ifdef OVERLAPPING_REGNO_P
1570 && ! (fixed_regs
[regno
] && OVERLAPPING_REGNO_P (regno
))
1572 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1573 PATTERN (this_insn
), outloc
))
1576 for (i
= 0; i
< nwords
; i
++)
1577 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1583 if (GET_CODE (real_out
) == REG
)
1586 value
= gen_rtx (REG
, GET_MODE (real_out
), regno
);
1593 /* Consider using IN if OUT was not acceptable
1594 or if OUT dies in this insn (like the quotient in a divmod insn).
1595 We can't use IN unless it is dies in this insn,
1596 which means we must know accurately which hard regs are live.
1597 Also, the result can't go in IN if IN is used within OUT. */
1598 if (hard_regs_live_known
1599 && GET_CODE (in
) == REG
1600 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1602 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1603 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1604 && !fixed_regs
[REGNO (in
)]
1605 && HARD_REGNO_MODE_OK (REGNO (in
), GET_MODE (out
)))
1607 register int regno
= REGNO (in
) + in_offset
;
1608 int nwords
= HARD_REGNO_NREGS (regno
, GET_MODE (real_in
));
1610 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1611 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1612 PATTERN (this_insn
)))
1615 for (i
= 0; i
< nwords
; i
++)
1616 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1622 /* If we were going to use OUT as the reload reg
1623 and changed our mind, it means OUT is a dummy that
1624 dies here. So don't bother copying value to it. */
1625 if (for_real
>= 0 && value
== real_out
)
1626 reload_out
[for_real
] = 0;
1627 if (GET_CODE (real_in
) == REG
)
1630 value
= gen_rtx (REG
, GET_MODE (real_in
), regno
);
1638 /* This page contains subroutines used mainly for determining
1639 whether the IN or an OUT of a reload can serve as the
1642 /* Return 1 if expression X alters a hard reg in the range
1643 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1644 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1645 X should be the body of an instruction. */
1648 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1649 register int beg_regno
, end_regno
;
1652 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1654 register rtx op0
= SET_DEST (x
);
1655 while (GET_CODE (op0
) == SUBREG
)
1656 op0
= SUBREG_REG (op0
);
1657 if (GET_CODE (op0
) == REG
)
1659 register int r
= REGNO (op0
);
1660 /* See if this reg overlaps range under consideration. */
1662 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1666 else if (GET_CODE (x
) == PARALLEL
)
1668 register int i
= XVECLEN (x
, 0) - 1;
1670 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1677 /* Return 1 if ADDR is a valid memory address for mode MODE,
1678 and check that each pseudo reg has the proper kind of
1682 strict_memory_address_p (mode
, addr
)
1683 enum machine_mode mode
;
1686 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1693 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1694 if they are the same hard reg, and has special hacks for
1695 autoincrement and autodecrement.
1696 This is specifically intended for find_reloads to use
1697 in determining whether two operands match.
1698 X is the operand whose number is the lower of the two.
1700 The value is 2 if Y contains a pre-increment that matches
1701 a non-incrementing address in X. */
1703 /* ??? To be completely correct, we should arrange to pass
1704 for X the output operand and for Y the input operand.
1705 For now, we assume that the output operand has the lower number
1706 because that is natural in (SET output (... input ...)). */
1709 operands_match_p (x
, y
)
1713 register RTX_CODE code
= GET_CODE (x
);
1719 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
1720 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
1721 && GET_CODE (SUBREG_REG (y
)) == REG
)))
1727 i
= REGNO (SUBREG_REG (x
));
1728 if (i
>= FIRST_PSEUDO_REGISTER
)
1730 i
+= SUBREG_WORD (x
);
1735 if (GET_CODE (y
) == SUBREG
)
1737 j
= REGNO (SUBREG_REG (y
));
1738 if (j
>= FIRST_PSEUDO_REGISTER
)
1740 j
+= SUBREG_WORD (y
);
1745 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1746 multiple hard register group, so that for example (reg:DI 0) and
1747 (reg:SI 1) will be considered the same register. */
1748 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
1749 && i
< FIRST_PSEUDO_REGISTER
)
1750 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
1751 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
1752 && j
< FIRST_PSEUDO_REGISTER
)
1753 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
1757 /* If two operands must match, because they are really a single
1758 operand of an assembler insn, then two postincrements are invalid
1759 because the assembler insn would increment only once.
1760 On the other hand, an postincrement matches ordinary indexing
1761 if the postincrement is the output operand. */
1762 if (code
== POST_DEC
|| code
== POST_INC
)
1763 return operands_match_p (XEXP (x
, 0), y
);
1764 /* Two preincrements are invalid
1765 because the assembler insn would increment only once.
1766 On the other hand, an preincrement matches ordinary indexing
1767 if the preincrement is the input operand.
1768 In this case, return 2, since some callers need to do special
1769 things when this happens. */
1770 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
)
1771 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
1775 /* Now we have disposed of all the cases
1776 in which different rtx codes can match. */
1777 if (code
!= GET_CODE (y
))
1779 if (code
== LABEL_REF
)
1780 return XEXP (x
, 0) == XEXP (y
, 0);
1781 if (code
== SYMBOL_REF
)
1782 return XSTR (x
, 0) == XSTR (y
, 0);
1784 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1786 if (GET_MODE (x
) != GET_MODE (y
))
1789 /* Compare the elements. If any pair of corresponding elements
1790 fail to match, return 0 for the whole things. */
1793 fmt
= GET_RTX_FORMAT (code
);
1794 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1800 if (XWINT (x
, i
) != XWINT (y
, i
))
1805 if (XINT (x
, i
) != XINT (y
, i
))
1810 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
1813 /* If any subexpression returns 2,
1814 we should return 2 if we are successful. */
1822 /* It is believed that rtx's at this level will never
1823 contain anything but integers and other rtx's,
1824 except for within LABEL_REFs and SYMBOL_REFs. */
1829 return 1 + success_2
;
1832 /* Return the number of times character C occurs in string S. */
1835 n_occurrences (c
, s
)
1845 /* Describe the range of registers or memory referenced by X.
1846 If X is a register, set REG_FLAG and put the first register
1847 number into START and the last plus one into END.
1848 If X is a memory reference, put a base address into BASE
1849 and a range of integer offsets into START and END.
1850 If X is pushing on the stack, we can assume it causes no trouble,
1851 so we set the SAFE field. */
1853 static struct decomposition
1857 struct decomposition val
;
1862 if (GET_CODE (x
) == MEM
)
1864 rtx base
, offset
= 0;
1865 rtx addr
= XEXP (x
, 0);
1867 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
1868 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
1870 val
.base
= XEXP (addr
, 0);
1871 val
.start
= - GET_MODE_SIZE (GET_MODE (x
));
1872 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
1873 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
1877 if (GET_CODE (addr
) == CONST
)
1879 addr
= XEXP (addr
, 0);
1882 if (GET_CODE (addr
) == PLUS
)
1884 if (CONSTANT_P (XEXP (addr
, 0)))
1886 base
= XEXP (addr
, 1);
1887 offset
= XEXP (addr
, 0);
1889 else if (CONSTANT_P (XEXP (addr
, 1)))
1891 base
= XEXP (addr
, 0);
1892 offset
= XEXP (addr
, 1);
1899 offset
= const0_rtx
;
1901 if (GET_CODE (offset
) == CONST
)
1902 offset
= XEXP (offset
, 0);
1903 if (GET_CODE (offset
) == PLUS
)
1905 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
1907 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 1));
1908 offset
= XEXP (offset
, 0);
1910 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
1912 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 0));
1913 offset
= XEXP (offset
, 1);
1917 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
1918 offset
= const0_rtx
;
1921 else if (GET_CODE (offset
) != CONST_INT
)
1923 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
1924 offset
= const0_rtx
;
1927 if (all_const
&& GET_CODE (base
) == PLUS
)
1928 base
= gen_rtx (CONST
, GET_MODE (base
), base
);
1930 if (GET_CODE (offset
) != CONST_INT
)
1933 val
.start
= INTVAL (offset
);
1934 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
1938 else if (GET_CODE (x
) == REG
)
1941 val
.start
= true_regnum (x
);
1944 /* A pseudo with no hard reg. */
1945 val
.start
= REGNO (x
);
1946 val
.end
= val
.start
+ 1;
1950 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
1952 else if (GET_CODE (x
) == SUBREG
)
1954 if (GET_CODE (SUBREG_REG (x
)) != REG
)
1955 /* This could be more precise, but it's good enough. */
1956 return decompose (SUBREG_REG (x
));
1958 val
.start
= true_regnum (x
);
1960 return decompose (SUBREG_REG (x
));
1963 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
1965 else if (CONSTANT_P (x
)
1966 /* This hasn't been assigned yet, so it can't conflict yet. */
1967 || GET_CODE (x
) == SCRATCH
)
1974 /* Return 1 if altering Y will not modify the value of X.
1975 Y is also described by YDATA, which should be decompose (Y). */
1978 immune_p (x
, y
, ydata
)
1980 struct decomposition ydata
;
1982 struct decomposition xdata
;
1985 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
1989 if (GET_CODE (y
) != MEM
)
1991 /* If Y is memory and X is not, Y can't affect X. */
1992 if (GET_CODE (x
) != MEM
)
1995 xdata
= decompose (x
);
1997 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
1999 /* If bases are distinct symbolic constants, there is no overlap. */
2000 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2002 /* Constants and stack slots never overlap. */
2003 if (CONSTANT_P (xdata
.base
)
2004 && (ydata
.base
== frame_pointer_rtx
2005 || ydata
.base
== stack_pointer_rtx
))
2007 if (CONSTANT_P (ydata
.base
)
2008 && (xdata
.base
== frame_pointer_rtx
2009 || xdata
.base
== stack_pointer_rtx
))
2011 /* If either base is variable, we don't know anything. */
2016 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2019 /* Similar, but calls decompose. */
2022 safe_from_earlyclobber (op
, clobber
)
2025 struct decomposition early_data
;
2027 early_data
= decompose (clobber
);
2028 return immune_p (op
, clobber
, early_data
);
2031 /* Main entry point of this file: search the body of INSN
2032 for values that need reloading and record them with push_reload.
2033 REPLACE nonzero means record also where the values occur
2034 so that subst_reloads can be used.
2036 IND_LEVELS says how many levels of indirection are supported by this
2037 machine; a value of zero means that a memory reference is not a valid
2040 LIVE_KNOWN says we have valid information about which hard
2041 regs are live at each point in the program; this is true when
2042 we are called from global_alloc but false when stupid register
2043 allocation has been done.
2045 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2046 which is nonnegative if the reg has been commandeered for reloading into.
2047 It is copied into STATIC_RELOAD_REG_P and referenced from there
2048 by various subroutines. */
2051 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2053 int replace
, ind_levels
;
2055 short *reload_reg_p
;
2057 #ifdef REGISTER_CONSTRAINTS
2059 register int insn_code_number
;
2062 /* These are the constraints for the insn. We don't change them. */
2063 char *constraints1
[MAX_RECOG_OPERANDS
];
2064 /* These start out as the constraints for the insn
2065 and they are chewed up as we consider alternatives. */
2066 char *constraints
[MAX_RECOG_OPERANDS
];
2067 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2069 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2070 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2071 /* Nonzero for a MEM operand whose entire address needs a reload. */
2072 int address_reloaded
[MAX_RECOG_OPERANDS
];
2073 /* Value of enum reload_type to use for operand. */
2074 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2075 /* Value of enum reload_type to use within address of operand. */
2076 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2077 /* Save the usage of each operand. */
2078 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2079 int no_input_reloads
= 0, no_output_reloads
= 0;
2081 int this_alternative
[MAX_RECOG_OPERANDS
];
2082 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2083 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2084 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2085 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2087 int goal_alternative
[MAX_RECOG_OPERANDS
];
2088 int this_alternative_number
;
2089 int goal_alternative_number
;
2090 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2091 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2092 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2093 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2094 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2095 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2096 int goal_alternative_swapped
;
2099 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2100 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2101 rtx body
= PATTERN (insn
);
2102 rtx set
= single_set (insn
);
2103 int goal_earlyclobber
, this_earlyclobber
;
2104 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2107 this_insn_is_asm
= 0; /* Tentative. */
2111 n_earlyclobbers
= 0;
2112 replace_reloads
= replace
;
2113 hard_regs_live_known
= live_known
;
2114 static_reload_reg_p
= reload_reg_p
;
2116 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2117 neither are insns that SET cc0. Insns that use CC0 are not allowed
2118 to have any input reloads. */
2119 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2120 no_output_reloads
= 1;
2123 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2124 no_input_reloads
= 1;
2125 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2126 no_output_reloads
= 1;
2129 #ifdef SECONDARY_MEMORY_NEEDED
2130 /* The eliminated forms of any secondary memory locations are per-insn, so
2131 clear them out here. */
2133 bzero (secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2136 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2137 Make OPERANDS point to a vector of operand values.
2138 Make OPERAND_LOCS point to a vector of pointers to
2139 where the operands were found.
2140 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2141 constraint-strings for this insn.
2142 Return if the insn needs no reload processing. */
2144 switch (GET_CODE (body
))
2154 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2155 is cheap to move between them. If it is not, there may not be an insn
2156 to do the copy, so we may need a reload. */
2157 if (GET_CODE (SET_DEST (body
)) == REG
2158 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2159 && GET_CODE (SET_SRC (body
)) == REG
2160 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2161 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2162 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2166 reload_n_operands
= noperands
= asm_noperands (body
);
2169 /* This insn is an `asm' with operands. */
2171 insn_code_number
= -1;
2172 this_insn_is_asm
= 1;
2174 /* expand_asm_operands makes sure there aren't too many operands. */
2175 if (noperands
> MAX_RECOG_OPERANDS
)
2178 /* Now get the operand values and constraints out of the insn. */
2180 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
2181 constraints
, operand_mode
);
2184 bcopy (constraints
, constraints1
, noperands
* sizeof (char *));
2185 n_alternatives
= n_occurrences (',', constraints
[0]) + 1;
2186 for (i
= 1; i
< noperands
; i
++)
2187 if (n_alternatives
!= n_occurrences (',', constraints
[i
]) + 1)
2189 error_for_asm (insn
, "operand constraints differ in number of alternatives");
2190 /* Avoid further trouble with this insn. */
2191 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
2200 /* Ordinary insn: recognize it, get the operands via insn_extract
2201 and get the constraints. */
2203 insn_code_number
= recog_memoized (insn
);
2204 if (insn_code_number
< 0)
2205 fatal_insn_not_found (insn
);
2207 reload_n_operands
= noperands
= insn_n_operands
[insn_code_number
];
2208 n_alternatives
= insn_n_alternatives
[insn_code_number
];
2209 /* Just return "no reloads" if insn has no operands with constraints. */
2210 if (n_alternatives
== 0)
2212 insn_extract (insn
);
2213 for (i
= 0; i
< noperands
; i
++)
2215 constraints
[i
] = constraints1
[i
]
2216 = insn_operand_constraint
[insn_code_number
][i
];
2217 operand_mode
[i
] = insn_operand_mode
[insn_code_number
][i
];
2226 /* If we will need to know, later, whether some pair of operands
2227 are the same, we must compare them now and save the result.
2228 Reloading the base and index registers will clobber them
2229 and afterward they will fail to match. */
2231 for (i
= 0; i
< noperands
; i
++)
2236 substed_operand
[i
] = recog_operand
[i
];
2239 modified
[i
] = RELOAD_READ
;
2241 /* Scan this operand's constraint to see if it is an output operand,
2242 an in-out operand, is commutative, or should match another. */
2247 modified
[i
] = RELOAD_WRITE
;
2249 modified
[i
] = RELOAD_READ_WRITE
;
2252 /* The last operand should not be marked commutative. */
2253 if (i
== noperands
- 1)
2255 if (this_insn_is_asm
)
2256 warning_for_asm (this_insn
,
2257 "`%%' constraint used with last operand");
2264 else if (c
>= '0' && c
<= '9')
2267 operands_match
[c
][i
]
2268 = operands_match_p (recog_operand
[c
], recog_operand
[i
]);
2270 /* An operand may not match itself. */
2273 if (this_insn_is_asm
)
2274 warning_for_asm (this_insn
,
2275 "operand %d has constraint %d", i
, c
);
2280 /* If C can be commuted with C+1, and C might need to match I,
2281 then C+1 might also need to match I. */
2282 if (commutative
>= 0)
2284 if (c
== commutative
|| c
== commutative
+ 1)
2286 int other
= c
+ (c
== commutative
? 1 : -1);
2287 operands_match
[other
][i
]
2288 = operands_match_p (recog_operand
[other
], recog_operand
[i
]);
2290 if (i
== commutative
|| i
== commutative
+ 1)
2292 int other
= i
+ (i
== commutative
? 1 : -1);
2293 operands_match
[c
][other
]
2294 = operands_match_p (recog_operand
[c
], recog_operand
[other
]);
2296 /* Note that C is supposed to be less than I.
2297 No need to consider altering both C and I because in
2298 that case we would alter one into the other. */
2304 /* Examine each operand that is a memory reference or memory address
2305 and reload parts of the addresses into index registers.
2306 Also here any references to pseudo regs that didn't get hard regs
2307 but are equivalent to constants get replaced in the insn itself
2308 with those constants. Nobody will ever see them again.
2310 Finally, set up the preferred classes of each operand. */
2312 for (i
= 0; i
< noperands
; i
++)
2314 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
2316 address_reloaded
[i
] = 0;
2317 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2318 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2321 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2322 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2325 if (constraints
[i
][0] == 'p')
2327 find_reloads_address (VOIDmode
, NULL_PTR
,
2328 recog_operand
[i
], recog_operand_loc
[i
],
2329 i
, operand_type
[i
], ind_levels
);
2330 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2332 else if (code
== MEM
)
2334 if (find_reloads_address (GET_MODE (recog_operand
[i
]),
2335 recog_operand_loc
[i
],
2336 XEXP (recog_operand
[i
], 0),
2337 &XEXP (recog_operand
[i
], 0),
2338 i
, address_type
[i
], ind_levels
))
2339 address_reloaded
[i
] = 1;
2340 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2342 else if (code
== SUBREG
)
2343 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2344 = find_reloads_toplev (recog_operand
[i
], i
, address_type
[i
],
2347 && &SET_DEST (set
) == recog_operand_loc
[i
]);
2348 else if (code
== REG
)
2350 /* This is equivalent to calling find_reloads_toplev.
2351 The code is duplicated for speed.
2352 When we find a pseudo always equivalent to a constant,
2353 we replace it by the constant. We must be sure, however,
2354 that we don't try to replace it in the insn in which it
2356 register int regno
= REGNO (recog_operand
[i
]);
2357 if (reg_equiv_constant
[regno
] != 0
2358 && (set
== 0 || &SET_DEST (set
) != recog_operand_loc
[i
]))
2359 substed_operand
[i
] = recog_operand
[i
]
2360 = reg_equiv_constant
[regno
];
2361 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2362 that feeds this insn. */
2363 if (reg_equiv_mem
[regno
] != 0)
2364 substed_operand
[i
] = recog_operand
[i
]
2365 = reg_equiv_mem
[regno
];
2367 if (reg_equiv_address
[regno
] != 0)
2369 /* If reg_equiv_address is not a constant address, copy it,
2370 since it may be shared. */
2371 rtx address
= reg_equiv_address
[regno
];
2373 if (rtx_varies_p (address
))
2374 address
= copy_rtx (address
);
2376 /* If this is an output operand, we must output a CLOBBER
2377 after INSN so find_equiv_reg knows REGNO is being written.
2378 Mark this insn specially, do we can put our output reloads
2381 if (modified
[i
] != RELOAD_READ
)
2382 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER
, VOIDmode
,
2387 *recog_operand_loc
[i
] = recog_operand
[i
]
2388 = gen_rtx (MEM
, GET_MODE (recog_operand
[i
]), address
);
2389 RTX_UNCHANGING_P (recog_operand
[i
])
2390 = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
2391 find_reloads_address (GET_MODE (recog_operand
[i
]),
2392 recog_operand_loc
[i
],
2393 XEXP (recog_operand
[i
], 0),
2394 &XEXP (recog_operand
[i
], 0),
2395 i
, address_type
[i
], ind_levels
);
2396 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2399 /* If the operand is still a register (we didn't replace it with an
2400 equivalent), get the preferred class to reload it into. */
2401 code
= GET_CODE (recog_operand
[i
]);
2403 = ((code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
)
2404 ? reg_preferred_class (REGNO (recog_operand
[i
])) : NO_REGS
);
2406 = (code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
2407 && reg_alternate_class (REGNO (recog_operand
[i
])) == NO_REGS
);
2410 /* If this is simply a copy from operand 1 to operand 0, merge the
2411 preferred classes for the operands. */
2412 if (set
!= 0 && noperands
>= 2 && recog_operand
[0] == SET_DEST (set
)
2413 && recog_operand
[1] == SET_SRC (set
))
2415 preferred_class
[0] = preferred_class
[1]
2416 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2417 pref_or_nothing
[0] |= pref_or_nothing
[1];
2418 pref_or_nothing
[1] |= pref_or_nothing
[0];
2421 /* Now see what we need for pseudo-regs that didn't get hard regs
2422 or got the wrong kind of hard reg. For this, we must consider
2423 all the operands together against the register constraints. */
2425 best
= MAX_RECOG_OPERANDS
+ 300;
2428 goal_alternative_swapped
= 0;
2431 /* The constraints are made of several alternatives.
2432 Each operand's constraint looks like foo,bar,... with commas
2433 separating the alternatives. The first alternatives for all
2434 operands go together, the second alternatives go together, etc.
2436 First loop over alternatives. */
2438 for (this_alternative_number
= 0;
2439 this_alternative_number
< n_alternatives
;
2440 this_alternative_number
++)
2442 /* Loop over operands for one constraint alternative. */
2443 /* LOSERS counts those that don't fit this alternative
2444 and would require loading. */
2446 /* BAD is set to 1 if it some operand can't fit this alternative
2447 even after reloading. */
2449 /* REJECT is a count of how undesirable this alternative says it is
2450 if any reloading is required. If the alternative matches exactly
2451 then REJECT is ignored, but otherwise it gets this much
2452 counted against it in addition to the reloading needed. Each
2453 ? counts three times here since we want the disparaging caused by
2454 a bad register class to only count 1/3 as much. */
2457 this_earlyclobber
= 0;
2459 for (i
= 0; i
< noperands
; i
++)
2461 register char *p
= constraints
[i
];
2462 register int win
= 0;
2463 /* 0 => this operand can be reloaded somehow for this alternative */
2465 /* 0 => this operand can be reloaded if the alternative allows regs. */
2468 register rtx operand
= recog_operand
[i
];
2470 /* Nonzero means this is a MEM that must be reloaded into a reg
2471 regardless of what the constraint says. */
2472 int force_reload
= 0;
2474 int earlyclobber
= 0;
2476 /* If the operand is a SUBREG, extract
2477 the REG or MEM (or maybe even a constant) within.
2478 (Constants can occur as a result of reg_equiv_constant.) */
2480 while (GET_CODE (operand
) == SUBREG
)
2482 offset
+= SUBREG_WORD (operand
);
2483 operand
= SUBREG_REG (operand
);
2484 /* Force reload if this is not a register or if there may may
2485 be a problem accessing the register in the outer mode. */
2486 if (GET_CODE (operand
) != REG
2487 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
2488 /* ??? The comment below clearly does not match the code.
2489 What the code below actually does is set force_reload
2490 for a paradoxical subreg of a pseudo. rms and kenner
2491 can't see the point of doing this. */
2492 /* Nonparadoxical subreg of a pseudoreg.
2493 Don't to load the full width if on this machine
2494 we expected the fetch to extend. */
2495 || ((GET_MODE_SIZE (operand_mode
[i
])
2496 > GET_MODE_SIZE (GET_MODE (operand
)))
2497 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
2499 /* Subreg of a hard reg which can't handle the subreg's mode
2500 or which would handle that mode in the wrong number of
2501 registers for subregging to work. */
2502 || (REGNO (operand
) < FIRST_PSEUDO_REGISTER
2503 && (! HARD_REGNO_MODE_OK (REGNO (operand
),
2505 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2506 && (GET_MODE_SIZE (GET_MODE (operand
))
2508 && ((GET_MODE_SIZE (GET_MODE (operand
))
2510 != HARD_REGNO_NREGS (REGNO (operand
),
2511 GET_MODE (operand
)))))))
2515 this_alternative
[i
] = (int) NO_REGS
;
2516 this_alternative_win
[i
] = 0;
2517 this_alternative_offmemok
[i
] = 0;
2518 this_alternative_earlyclobber
[i
] = 0;
2519 this_alternative_matches
[i
] = -1;
2521 /* An empty constraint or empty alternative
2522 allows anything which matched the pattern. */
2523 if (*p
== 0 || *p
== ',')
2526 /* Scan this alternative's specs for this operand;
2527 set WIN if the operand fits any letter in this alternative.
2528 Otherwise, clear BADOP if this operand could
2529 fit some letter after reloads,
2530 or set WINREG if this operand could fit after reloads
2531 provided the constraint allows some registers. */
2533 while (*p
&& (c
= *p
++) != ',')
2542 /* The last operand should not be marked commutative. */
2543 if (i
!= noperands
- 1)
2556 /* Ignore rest of this alternative as far as
2557 reloading is concerned. */
2558 while (*p
&& *p
!= ',') p
++;
2567 this_alternative_matches
[i
] = c
;
2568 /* We are supposed to match a previous operand.
2569 If we do, we win if that one did.
2570 If we do not, count both of the operands as losers.
2571 (This is too conservative, since most of the time
2572 only a single reload insn will be needed to make
2573 the two operands win. As a result, this alternative
2574 may be rejected when it is actually desirable.) */
2575 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2576 /* If we are matching as if two operands were swapped,
2577 also pretend that operands_match had been computed
2579 But if I is the second of those and C is the first,
2580 don't exchange them, because operands_match is valid
2581 only on one side of its diagonal. */
2583 [(c
== commutative
|| c
== commutative
+ 1)
2584 ? 2*commutative
+ 1 - c
: c
]
2585 [(i
== commutative
|| i
== commutative
+ 1)
2586 ? 2*commutative
+ 1 - i
: i
])
2587 : operands_match
[c
][i
])
2588 win
= this_alternative_win
[c
];
2591 /* Operands don't match. */
2593 /* Retroactively mark the operand we had to match
2594 as a loser, if it wasn't already. */
2595 if (this_alternative_win
[c
])
2597 this_alternative_win
[c
] = 0;
2598 if (this_alternative
[c
] == (int) NO_REGS
)
2600 /* But count the pair only once in the total badness of
2601 this alternative, if the pair can be a dummy reload. */
2603 = find_dummy_reload (recog_operand
[i
], recog_operand
[c
],
2604 recog_operand_loc
[i
], recog_operand_loc
[c
],
2605 this_alternative
[c
], -1);
2610 /* This can be fixed with reloads if the operand
2611 we are supposed to match can be fixed with reloads. */
2613 this_alternative
[i
] = this_alternative
[c
];
2617 /* All necessary reloads for an address_operand
2618 were handled in find_reloads_address. */
2619 this_alternative
[i
] = (int) ALL_REGS
;
2626 if (GET_CODE (operand
) == MEM
2627 || (GET_CODE (operand
) == REG
2628 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2629 && reg_renumber
[REGNO (operand
)] < 0))
2631 if (CONSTANT_P (operand
))
2636 if (GET_CODE (operand
) == MEM
2637 && ! address_reloaded
[i
]
2638 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2639 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2644 if (GET_CODE (operand
) == MEM
2645 && ! address_reloaded
[i
]
2646 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2647 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
2651 /* Memory operand whose address is not offsettable. */
2655 if (GET_CODE (operand
) == MEM
2656 && ! (ind_levels
? offsettable_memref_p (operand
)
2657 : offsettable_nonstrict_memref_p (operand
))
2658 /* Certain mem addresses will become offsettable
2659 after they themselves are reloaded. This is important;
2660 we don't want our own handling of unoffsettables
2661 to override the handling of reg_equiv_address. */
2662 && !(GET_CODE (XEXP (operand
, 0)) == REG
2664 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
2668 /* Memory operand whose address is offsettable. */
2672 if ((GET_CODE (operand
) == MEM
2673 /* If IND_LEVELS, find_reloads_address won't reload a
2674 pseudo that didn't get a hard reg, so we have to
2675 reject that case. */
2676 && (ind_levels
? offsettable_memref_p (operand
)
2677 : offsettable_nonstrict_memref_p (operand
)))
2678 /* Certain mem addresses will become offsettable
2679 after they themselves are reloaded. This is important;
2680 we don't want our own handling of unoffsettables
2681 to override the handling of reg_equiv_address. */
2682 || (GET_CODE (operand
) == MEM
2683 && GET_CODE (XEXP (operand
, 0)) == REG
2685 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0))
2686 || (GET_CODE (operand
) == REG
2687 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2688 && reg_renumber
[REGNO (operand
)] < 0))
2690 if (CONSTANT_P (operand
) || GET_CODE (operand
) == MEM
)
2696 /* Output operand that is stored before the need for the
2697 input operands (and their index registers) is over. */
2698 earlyclobber
= 1, this_earlyclobber
= 1;
2702 /* Match any floating double constant, but only if
2703 we can examine the bits of it reliably. */
2704 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
2705 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
2706 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
2708 if (GET_CODE (operand
) == CONST_DOUBLE
)
2713 if (GET_CODE (operand
) == CONST_DOUBLE
)
2719 if (GET_CODE (operand
) == CONST_DOUBLE
2720 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
2725 if (GET_CODE (operand
) == CONST_INT
2726 || (GET_CODE (operand
) == CONST_DOUBLE
2727 && GET_MODE (operand
) == VOIDmode
))
2730 if (CONSTANT_P (operand
)
2731 #ifdef LEGITIMATE_PIC_OPERAND_P
2732 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
2739 if (GET_CODE (operand
) == CONST_INT
2740 || (GET_CODE (operand
) == CONST_DOUBLE
2741 && GET_MODE (operand
) == VOIDmode
))
2753 if (GET_CODE (operand
) == CONST_INT
2754 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
2764 /* A PLUS is never a valid operand, but reload can make
2765 it from a register when eliminating registers. */
2766 && GET_CODE (operand
) != PLUS
2767 /* A SCRATCH is not a valid operand. */
2768 && GET_CODE (operand
) != SCRATCH
2769 #ifdef LEGITIMATE_PIC_OPERAND_P
2770 && (! CONSTANT_P (operand
)
2772 || LEGITIMATE_PIC_OPERAND_P (operand
))
2774 && (GENERAL_REGS
== ALL_REGS
2775 || GET_CODE (operand
) != REG
2776 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2777 && reg_renumber
[REGNO (operand
)] < 0)))
2779 /* Drop through into 'r' case */
2783 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
2786 #ifdef EXTRA_CONSTRAINT
2792 if (EXTRA_CONSTRAINT (operand
, c
))
2799 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
2802 if (GET_MODE (operand
) == BLKmode
)
2805 if (GET_CODE (operand
) == REG
2806 && reg_fits_class_p (operand
, this_alternative
[i
],
2807 offset
, GET_MODE (recog_operand
[i
])))
2814 /* If this operand could be handled with a reg,
2815 and some reg is allowed, then this operand can be handled. */
2816 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
2819 /* Record which operands fit this alternative. */
2820 this_alternative_earlyclobber
[i
] = earlyclobber
;
2821 if (win
&& ! force_reload
)
2822 this_alternative_win
[i
] = 1;
2825 this_alternative_offmemok
[i
] = offmemok
;
2829 /* Alternative loses if it has no regs for a reg operand. */
2830 if (GET_CODE (operand
) == REG
2831 && this_alternative
[i
] == (int) NO_REGS
2832 && this_alternative_matches
[i
] < 0)
2835 /* Alternative loses if it requires a type of reload not
2836 permitted for this insn. We can always reload SCRATCH
2837 and objects with a REG_UNUSED note. */
2838 if (GET_CODE (operand
) != SCRATCH
2839 && modified
[i
] != RELOAD_READ
&& no_output_reloads
2840 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
2842 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
)
2845 /* We prefer to reload pseudos over reloading other things,
2846 since such reloads may be able to be eliminated later.
2847 If we are reloading a SCRATCH, we won't be generating any
2848 insns, just using a register, so it is also preferred.
2849 So bump REJECT in other cases. */
2850 if (GET_CODE (operand
) != REG
&& GET_CODE (operand
) != SCRATCH
)
2854 /* If this operand is a pseudo register that didn't get a hard
2855 reg and this alternative accepts some register, see if the
2856 class that we want is a subset of the preferred class for this
2857 register. If not, but it intersects that class, use the
2858 preferred class instead. If it does not intersect the preferred
2859 class, show that usage of this alternative should be discouraged;
2860 it will be discouraged more still if the register is `preferred
2861 or nothing'. We do this because it increases the chance of
2862 reusing our spill register in a later insn and avoiding a pair
2863 of memory stores and loads.
2865 Don't bother with this if this alternative will accept this
2868 Don't do this for a multiword operand, if
2869 we have to worry about small classes, because making reg groups
2870 harder to allocate is asking for trouble.
2872 Don't do this if the preferred class has only one register
2873 because we might otherwise exhaust the class. */
2876 if (! win
&& this_alternative
[i
] != (int) NO_REGS
2877 #ifdef SMALL_REGISTER_CLASSES
2878 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2880 && reg_class_size
[(int) preferred_class
[i
]] > 1)
2882 if (! reg_class_subset_p (this_alternative
[i
],
2883 preferred_class
[i
]))
2885 /* Since we don't have a way of forming the intersection,
2886 we just do something special if the preferred class
2887 is a subset of the class we have; that's the most
2888 common case anyway. */
2889 if (reg_class_subset_p (preferred_class
[i
],
2890 this_alternative
[i
]))
2891 this_alternative
[i
] = (int) preferred_class
[i
];
2893 reject
+= (1 + pref_or_nothing
[i
]);
2898 /* Now see if any output operands that are marked "earlyclobber"
2899 in this alternative conflict with any input operands
2900 or any memory addresses. */
2902 for (i
= 0; i
< noperands
; i
++)
2903 if (this_alternative_earlyclobber
[i
]
2904 && this_alternative_win
[i
])
2906 struct decomposition early_data
;
2908 early_data
= decompose (recog_operand
[i
]);
2910 if (modified
[i
] == RELOAD_READ
)
2912 if (this_insn_is_asm
)
2913 warning_for_asm (this_insn
,
2914 "`&' constraint used with input operand");
2920 if (this_alternative
[i
] == NO_REGS
)
2922 this_alternative_earlyclobber
[i
] = 0;
2923 if (this_insn_is_asm
)
2924 error_for_asm (this_insn
,
2925 "`&' constraint used with no register class");
2930 for (j
= 0; j
< noperands
; j
++)
2931 /* Is this an input operand or a memory ref? */
2932 if ((GET_CODE (recog_operand
[j
]) == MEM
2933 || modified
[j
] != RELOAD_WRITE
)
2935 /* Ignore things like match_operator operands. */
2936 && *constraints1
[j
] != 0
2937 /* Don't count an input operand that is constrained to match
2938 the early clobber operand. */
2939 && ! (this_alternative_matches
[j
] == i
2940 && rtx_equal_p (recog_operand
[i
], recog_operand
[j
]))
2941 /* Is it altered by storing the earlyclobber operand? */
2942 && !immune_p (recog_operand
[j
], recog_operand
[i
], early_data
))
2944 /* If the output is in a single-reg class,
2945 it's costly to reload it, so reload the input instead. */
2946 if (reg_class_size
[this_alternative
[i
]] == 1
2947 && (GET_CODE (recog_operand
[j
]) == REG
2948 || GET_CODE (recog_operand
[j
]) == SUBREG
))
2951 this_alternative_win
[j
] = 0;
2956 /* If an earlyclobber operand conflicts with something,
2957 it must be reloaded, so request this and count the cost. */
2961 this_alternative_win
[i
] = 0;
2962 for (j
= 0; j
< noperands
; j
++)
2963 if (this_alternative_matches
[j
] == i
2964 && this_alternative_win
[j
])
2966 this_alternative_win
[j
] = 0;
2972 /* If one alternative accepts all the operands, no reload required,
2973 choose that alternative; don't consider the remaining ones. */
2976 /* Unswap these so that they are never swapped at `finish'. */
2977 if (commutative
>= 0)
2979 recog_operand
[commutative
] = substed_operand
[commutative
];
2980 recog_operand
[commutative
+ 1]
2981 = substed_operand
[commutative
+ 1];
2983 for (i
= 0; i
< noperands
; i
++)
2985 goal_alternative_win
[i
] = 1;
2986 goal_alternative
[i
] = this_alternative
[i
];
2987 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
2988 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
2989 goal_alternative_earlyclobber
[i
]
2990 = this_alternative_earlyclobber
[i
];
2992 goal_alternative_number
= this_alternative_number
;
2993 goal_alternative_swapped
= swapped
;
2994 goal_earlyclobber
= this_earlyclobber
;
2998 /* REJECT, set by the ! and ? constraint characters and when a register
2999 would be reloaded into a non-preferred class, discourages the use of
3000 this alternative for a reload goal. REJECT is incremented by three
3001 for each ? and one for each non-preferred class. */
3002 losers
= losers
* 3 + reject
;
3004 /* If this alternative can be made to work by reloading,
3005 and it needs less reloading than the others checked so far,
3006 record it as the chosen goal for reloading. */
3007 if (! bad
&& best
> losers
)
3009 for (i
= 0; i
< noperands
; i
++)
3011 goal_alternative
[i
] = this_alternative
[i
];
3012 goal_alternative_win
[i
] = this_alternative_win
[i
];
3013 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3014 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3015 goal_alternative_earlyclobber
[i
]
3016 = this_alternative_earlyclobber
[i
];
3018 goal_alternative_swapped
= swapped
;
3020 goal_alternative_number
= this_alternative_number
;
3021 goal_earlyclobber
= this_earlyclobber
;
3025 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3026 then we need to try each alternative twice,
3027 the second time matching those two operands
3028 as if we had exchanged them.
3029 To do this, really exchange them in operands.
3031 If we have just tried the alternatives the second time,
3032 return operands to normal and drop through. */
3034 if (commutative
>= 0)
3039 register enum reg_class tclass
;
3042 recog_operand
[commutative
] = substed_operand
[commutative
+ 1];
3043 recog_operand
[commutative
+ 1] = substed_operand
[commutative
];
3045 tclass
= preferred_class
[commutative
];
3046 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3047 preferred_class
[commutative
+ 1] = tclass
;
3049 t
= pref_or_nothing
[commutative
];
3050 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3051 pref_or_nothing
[commutative
+ 1] = t
;
3053 bcopy (constraints1
, constraints
, noperands
* sizeof (char *));
3058 recog_operand
[commutative
] = substed_operand
[commutative
];
3059 recog_operand
[commutative
+ 1] = substed_operand
[commutative
+ 1];
3063 /* The operands don't meet the constraints.
3064 goal_alternative describes the alternative
3065 that we could reach by reloading the fewest operands.
3066 Reload so as to fit it. */
3068 if (best
== MAX_RECOG_OPERANDS
+ 300)
3070 /* No alternative works with reloads?? */
3071 if (insn_code_number
>= 0)
3073 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3074 /* Avoid further trouble with this insn. */
3075 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3080 /* Jump to `finish' from above if all operands are valid already.
3081 In that case, goal_alternative_win is all 1. */
3084 /* Right now, for any pair of operands I and J that are required to match,
3086 goal_alternative_matches[J] is I.
3087 Set up goal_alternative_matched as the inverse function:
3088 goal_alternative_matched[I] = J. */
3090 for (i
= 0; i
< noperands
; i
++)
3091 goal_alternative_matched
[i
] = -1;
3093 for (i
= 0; i
< noperands
; i
++)
3094 if (! goal_alternative_win
[i
]
3095 && goal_alternative_matches
[i
] >= 0)
3096 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3098 /* If the best alternative is with operands 1 and 2 swapped,
3099 consider them swapped before reporting the reloads. Update the
3100 operand numbers of any reloads already pushed. */
3102 if (goal_alternative_swapped
)
3106 tem
= substed_operand
[commutative
];
3107 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3108 substed_operand
[commutative
+ 1] = tem
;
3109 tem
= recog_operand
[commutative
];
3110 recog_operand
[commutative
] = recog_operand
[commutative
+ 1];
3111 recog_operand
[commutative
+ 1] = tem
;
3113 for (i
= 0; i
< n_reloads
; i
++)
3115 if (reload_opnum
[i
] == commutative
)
3116 reload_opnum
[i
] = commutative
+ 1;
3117 else if (reload_opnum
[i
] == commutative
+ 1)
3118 reload_opnum
[i
] = commutative
;
3122 /* Perform whatever substitutions on the operands we are supposed
3123 to make due to commutativity or replacement of registers
3124 with equivalent constants or memory slots. */
3126 for (i
= 0; i
< noperands
; i
++)
3128 *recog_operand_loc
[i
] = substed_operand
[i
];
3129 /* While we are looping on operands, initialize this. */
3130 operand_reloadnum
[i
] = -1;
3132 /* If this is an earlyclobber operand, we need to widen the scope.
3133 The reload must remain valid from the start of the insn being
3134 reloaded until after the operand is stored into its destination.
3135 We approximate this with RELOAD_OTHER even though we know that we
3136 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3138 One special case that is worth checking is when we have an
3139 output that is earlyclobber but isn't used past the insn (typically
3140 a SCRATCH). In this case, we only need have the reload live
3141 through the insn itself, but not for any of our input or output
3144 In any case, anything needed to address this operand can remain
3145 however they were previously categorized. */
3147 if (goal_alternative_earlyclobber
[i
])
3149 = (find_reg_note (insn
, REG_UNUSED
, recog_operand
[i
])
3150 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3153 /* Any constants that aren't allowed and can't be reloaded
3154 into registers are here changed into memory references. */
3155 for (i
= 0; i
< noperands
; i
++)
3156 if (! goal_alternative_win
[i
]
3157 && CONSTANT_P (recog_operand
[i
])
3158 && (PREFERRED_RELOAD_CLASS (recog_operand
[i
],
3159 (enum reg_class
) goal_alternative
[i
])
3161 && operand_mode
[i
] != VOIDmode
)
3163 *recog_operand_loc
[i
] = recog_operand
[i
]
3164 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3166 i
, address_type
[i
], ind_levels
, 0);
3167 if (alternative_allows_memconst (constraints1
[i
],
3168 goal_alternative_number
))
3169 goal_alternative_win
[i
] = 1;
3172 /* Now record reloads for all the operands that need them. */
3173 for (i
= 0; i
< noperands
; i
++)
3174 if (! goal_alternative_win
[i
])
3176 /* Operands that match previous ones have already been handled. */
3177 if (goal_alternative_matches
[i
] >= 0)
3179 /* Handle an operand with a nonoffsettable address
3180 appearing where an offsettable address will do
3181 by reloading the address into a base register. */
3182 else if (goal_alternative_matched
[i
] == -1
3183 && goal_alternative_offmemok
[i
]
3184 && GET_CODE (recog_operand
[i
]) == MEM
)
3186 operand_reloadnum
[i
]
3187 = push_reload (XEXP (recog_operand
[i
], 0), NULL_RTX
,
3188 &XEXP (recog_operand
[i
], 0), NULL_PTR
,
3189 BASE_REG_CLASS
, GET_MODE (XEXP (recog_operand
[i
], 0)),
3190 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3191 reload_inc
[operand_reloadnum
[i
]]
3192 = GET_MODE_SIZE (GET_MODE (recog_operand
[i
]));
3194 /* If this operand is an output, we will have made any
3195 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3196 now we are treating part of the operand as an input, so
3197 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3199 if (operand_type
[i
] == RELOAD_FOR_OUTPUT
)
3200 for (j
= 0; j
< n_reloads
; j
++)
3201 if (reload_opnum
[j
] == i
3202 && reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3203 reload_when_needed
[j
] = RELOAD_FOR_INPUT_ADDRESS
;
3205 else if (goal_alternative_matched
[i
] == -1)
3206 operand_reloadnum
[i
] =
3207 push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3208 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3209 (modified
[i
] != RELOAD_WRITE
?
3210 recog_operand_loc
[i
] : 0),
3211 modified
[i
] != RELOAD_READ
? recog_operand_loc
[i
] : 0,
3212 (enum reg_class
) goal_alternative
[i
],
3213 (modified
[i
] == RELOAD_WRITE
3214 ? VOIDmode
: operand_mode
[i
]),
3215 (modified
[i
] == RELOAD_READ
3216 ? VOIDmode
: operand_mode
[i
]),
3217 (insn_code_number
< 0 ? 0
3218 : insn_operand_strict_low
[insn_code_number
][i
]),
3219 0, i
, operand_type
[i
]);
3220 /* In a matching pair of operands, one must be input only
3221 and the other must be output only.
3222 Pass the input operand as IN and the other as OUT. */
3223 else if (modified
[i
] == RELOAD_READ
3224 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3226 operand_reloadnum
[i
]
3227 = push_reload (recog_operand
[i
],
3228 recog_operand
[goal_alternative_matched
[i
]],
3229 recog_operand_loc
[i
],
3230 recog_operand_loc
[goal_alternative_matched
[i
]],
3231 (enum reg_class
) goal_alternative
[i
],
3233 operand_mode
[goal_alternative_matched
[i
]],
3234 0, 0, i
, RELOAD_OTHER
);
3235 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3237 else if (modified
[i
] == RELOAD_WRITE
3238 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3240 operand_reloadnum
[goal_alternative_matched
[i
]]
3241 = push_reload (recog_operand
[goal_alternative_matched
[i
]],
3243 recog_operand_loc
[goal_alternative_matched
[i
]],
3244 recog_operand_loc
[i
],
3245 (enum reg_class
) goal_alternative
[i
],
3246 operand_mode
[goal_alternative_matched
[i
]],
3248 0, 0, i
, RELOAD_OTHER
);
3249 operand_reloadnum
[i
] = output_reloadnum
;
3251 else if (insn_code_number
>= 0)
3255 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3256 /* Avoid further trouble with this insn. */
3257 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3262 else if (goal_alternative_matched
[i
] < 0
3263 && goal_alternative_matches
[i
] < 0
3266 /* For each non-matching operand that's a MEM or a pseudo-register
3267 that didn't get a hard register, make an optional reload.
3268 This may get done even if the insn needs no reloads otherwise. */
3270 rtx operand
= recog_operand
[i
];
3272 while (GET_CODE (operand
) == SUBREG
)
3273 operand
= XEXP (operand
, 0);
3274 if ((GET_CODE (operand
) == MEM
3275 || (GET_CODE (operand
) == REG
3276 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3277 && (enum reg_class
) goal_alternative
[i
] != NO_REGS
3278 && ! no_input_reloads
3279 /* Optional output reloads don't do anything and we mustn't
3280 make in-out reloads on insns that are not permitted output
3282 && (modified
[i
] == RELOAD_READ
3283 || (modified
[i
] == RELOAD_READ_WRITE
&& ! no_output_reloads
)))
3284 operand_reloadnum
[i
]
3285 = push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3286 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3287 (modified
[i
] != RELOAD_WRITE
3288 ? recog_operand_loc
[i
] : 0),
3289 (modified
[i
] != RELOAD_READ
3290 ? recog_operand_loc
[i
] : 0),
3291 (enum reg_class
) goal_alternative
[i
],
3292 (modified
[i
] == RELOAD_WRITE
3293 ? VOIDmode
: operand_mode
[i
]),
3294 (modified
[i
] == RELOAD_READ
3295 ? VOIDmode
: operand_mode
[i
]),
3296 (insn_code_number
< 0 ? 0
3297 : insn_operand_strict_low
[insn_code_number
][i
]),
3298 1, i
, operand_type
[i
]);
3300 else if (goal_alternative_matches
[i
] >= 0
3301 && goal_alternative_win
[goal_alternative_matches
[i
]]
3302 && modified
[i
] == RELOAD_READ
3303 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3304 && ! no_input_reloads
&& ! no_output_reloads
3307 /* Similarly, make an optional reload for a pair of matching
3308 objects that are in MEM or a pseudo that didn't get a hard reg. */
3310 rtx operand
= recog_operand
[i
];
3312 while (GET_CODE (operand
) == SUBREG
)
3313 operand
= XEXP (operand
, 0);
3314 if ((GET_CODE (operand
) == MEM
3315 || (GET_CODE (operand
) == REG
3316 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3317 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3319 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3320 = push_reload (recog_operand
[goal_alternative_matches
[i
]],
3322 recog_operand_loc
[goal_alternative_matches
[i
]],
3323 recog_operand_loc
[i
],
3324 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3325 operand_mode
[goal_alternative_matches
[i
]],
3327 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3330 /* Record the values of the earlyclobber operands for the caller. */
3331 if (goal_earlyclobber
)
3332 for (i
= 0; i
< noperands
; i
++)
3333 if (goal_alternative_earlyclobber
[i
])
3334 reload_earlyclobbers
[n_earlyclobbers
++] = recog_operand
[i
];
3336 /* If this insn pattern contains any MATCH_DUP's, make sure that
3337 they will be substituted if the operands they match are substituted.
3338 Also do now any substitutions we already did on the operands.
3340 Don't do this if we aren't making replacements because we might be
3341 propagating things allocated by frame pointer elimination into places
3342 it doesn't expect. */
3344 if (insn_code_number
>= 0 && replace
)
3345 for (i
= insn_n_dups
[insn_code_number
] - 1; i
>= 0; i
--)
3347 int opno
= recog_dup_num
[i
];
3348 *recog_dup_loc
[i
] = *recog_operand_loc
[opno
];
3349 if (operand_reloadnum
[opno
] >= 0)
3350 push_replacement (recog_dup_loc
[i
], operand_reloadnum
[opno
],
3351 insn_operand_mode
[insn_code_number
][opno
]);
3355 /* This loses because reloading of prior insns can invalidate the equivalence
3356 (or at least find_equiv_reg isn't smart enough to find it any more),
3357 causing this insn to need more reload regs than it needed before.
3358 It may be too late to make the reload regs available.
3359 Now this optimization is done safely in choose_reload_regs. */
3361 /* For each reload of a reg into some other class of reg,
3362 search for an existing equivalent reg (same value now) in the right class.
3363 We can use it as long as we don't need to change its contents. */
3364 for (i
= 0; i
< n_reloads
; i
++)
3365 if (reload_reg_rtx
[i
] == 0
3366 && reload_in
[i
] != 0
3367 && GET_CODE (reload_in
[i
]) == REG
3368 && reload_out
[i
] == 0)
3371 = find_equiv_reg (reload_in
[i
], insn
, reload_reg_class
[i
], -1,
3372 static_reload_reg_p
, 0, reload_inmode
[i
]);
3373 /* Prevent generation of insn to load the value
3374 because the one we found already has the value. */
3375 if (reload_reg_rtx
[i
])
3376 reload_in
[i
] = reload_reg_rtx
[i
];
3380 /* Perhaps an output reload can be combined with another
3381 to reduce needs by one. */
3382 if (!goal_earlyclobber
)
3385 /* If we have a pair of reloads for parts of an address, they are reloading
3386 the same object, the operands themselves were not reloaded, and they
3387 are for two operands that are supposed to match, merge the reloads and
3388 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3390 for (i
= 0; i
< n_reloads
; i
++)
3394 for (j
= i
+ 1; j
< n_reloads
; j
++)
3395 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3396 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3397 && (reload_when_needed
[j
] == RELOAD_FOR_INPUT_ADDRESS
3398 || reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3399 && rtx_equal_p (reload_in
[i
], reload_in
[j
])
3400 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3401 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]])
3402 && (operand_reloadnum
[reload_opnum
[j
]] < 0
3403 || reload_optional
[operand_reloadnum
[reload_opnum
[j
]]])
3404 && (goal_alternative_matches
[reload_opnum
[i
]] == reload_opnum
[j
]
3405 || (goal_alternative_matches
[reload_opnum
[j
]]
3406 == reload_opnum
[i
])))
3408 for (k
= 0; k
< n_replacements
; k
++)
3409 if (replacements
[k
].what
== j
)
3410 replacements
[k
].what
= i
;
3412 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3417 /* Scan all the reloads and update their type.
3418 If a reload is for the address of an operand and we didn't reload
3419 that operand, change the type. Similarly, change the operand number
3420 of a reload when two operands match. If a reload is optional, treat it
3421 as though the operand isn't reloaded.
3423 ??? This latter case is somewhat odd because if we do the optional
3424 reload, it means the object is hanging around. Thus we need only
3425 do the address reload if the optional reload was NOT done.
3427 Change secondary reloads to be the address type of their operand, not
3430 If an operand's reload is now RELOAD_OTHER, change any
3431 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3432 RELOAD_FOR_OTHER_ADDRESS. */
3434 for (i
= 0; i
< n_reloads
; i
++)
3436 if (reload_secondary_p
[i
]
3437 && reload_when_needed
[i
] == operand_type
[reload_opnum
[i
]])
3438 reload_when_needed
[i
] = address_type
[reload_opnum
[i
]];
3440 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3441 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3442 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3443 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]]))
3444 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3446 if (reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3447 && operand_reloadnum
[reload_opnum
[i
]] >= 0
3448 && (reload_when_needed
[operand_reloadnum
[reload_opnum
[i
]]]
3450 reload_when_needed
[i
] = RELOAD_FOR_OTHER_ADDRESS
;
3452 if (goal_alternative_matches
[reload_opnum
[i
]] >= 0)
3453 reload_opnum
[i
] = goal_alternative_matches
[reload_opnum
[i
]];
3456 /* See if we have any reloads that are now allowed to be merged
3457 because we've changed when the reload is needed to
3458 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3459 check for the most common cases. */
3461 for (i
= 0; i
< n_reloads
; i
++)
3462 if (reload_in
[i
] != 0 && reload_out
[i
] == 0
3463 && (reload_when_needed
[i
] == RELOAD_FOR_OPERAND_ADDRESS
3464 || reload_when_needed
[i
] == RELOAD_FOR_OTHER_ADDRESS
))
3465 for (j
= 0; j
< n_reloads
; j
++)
3466 if (i
!= j
&& reload_in
[j
] != 0 && reload_out
[j
] == 0
3467 && reload_when_needed
[j
] == reload_when_needed
[i
]
3468 && MATCHES (reload_in
[i
], reload_in
[j
]))
3470 reload_opnum
[i
] = MIN (reload_opnum
[i
], reload_opnum
[j
]);
3471 transfer_replacements (i
, j
);
3475 #else /* no REGISTER_CONSTRAINTS */
3477 int insn_code_number
;
3478 int goal_earlyclobber
= 0; /* Always 0, to make combine_reloads happen. */
3480 rtx body
= PATTERN (insn
);
3484 n_earlyclobbers
= 0;
3485 replace_reloads
= replace
;
3488 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3489 Store the operand values in RECOG_OPERAND and the locations
3490 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3491 Return if the insn needs no reload processing. */
3493 switch (GET_CODE (body
))
3504 noperands
= asm_noperands (body
);
3507 /* This insn is an `asm' with operands.
3508 First, find out how many operands, and allocate space. */
3510 insn_code_number
= -1;
3511 /* ??? This is a bug! ???
3512 Give up and delete this insn if it has too many operands. */
3513 if (noperands
> MAX_RECOG_OPERANDS
)
3516 /* Now get the operand values out of the insn. */
3518 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
3519 NULL_PTR
, NULL_PTR
);
3524 /* Ordinary insn: recognize it, allocate space for operands and
3525 constraints, and get them out via insn_extract. */
3527 insn_code_number
= recog_memoized (insn
);
3528 noperands
= insn_n_operands
[insn_code_number
];
3529 insn_extract (insn
);
3535 for (i
= 0; i
< noperands
; i
++)
3537 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
3538 int is_set_dest
= GET_CODE (body
) == SET
&& (i
== 0);
3540 if (insn_code_number
>= 0)
3541 if (insn_operand_address_p
[insn_code_number
][i
])
3542 find_reloads_address (VOIDmode
, NULL_PTR
,
3543 recog_operand
[i
], recog_operand_loc
[i
],
3544 i
, RELOAD_FOR_INPUT
, ind_levels
);
3546 /* In these cases, we can't tell if the operand is an input
3547 or an output, so be conservative. In practice it won't be
3551 find_reloads_address (GET_MODE (recog_operand
[i
]),
3552 recog_operand_loc
[i
],
3553 XEXP (recog_operand
[i
], 0),
3554 &XEXP (recog_operand
[i
], 0),
3555 i
, RELOAD_OTHER
, ind_levels
);
3557 recog_operand
[i
] = *recog_operand_loc
[i
]
3558 = find_reloads_toplev (recog_operand
[i
], i
, RELOAD_OTHER
,
3559 ind_levels
, is_set_dest
);
3562 register int regno
= REGNO (recog_operand
[i
]);
3563 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3564 recog_operand
[i
] = *recog_operand_loc
[i
]
3565 = reg_equiv_constant
[regno
];
3566 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3567 that feeds this insn. */
3568 if (reg_equiv_mem
[regno
] != 0)
3569 recog_operand
[i
] = *recog_operand_loc
[i
]
3570 = reg_equiv_mem
[regno
];
3575 /* Perhaps an output reload can be combined with another
3576 to reduce needs by one. */
3577 if (!goal_earlyclobber
)
3579 #endif /* no REGISTER_CONSTRAINTS */
3582 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3583 accepts a memory operand with constant address. */
3586 alternative_allows_memconst (constraint
, altnum
)
3591 /* Skip alternatives before the one requested. */
3594 while (*constraint
++ != ',');
3597 /* Scan the requested alternative for 'm' or 'o'.
3598 If one of them is present, this alternative accepts memory constants. */
3599 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
3600 if (c
== 'm' || c
== 'o')
3605 /* Scan X for memory references and scan the addresses for reloading.
3606 Also checks for references to "constant" regs that we want to eliminate
3607 and replaces them with the values they stand for.
3608 We may alter X destructively if it contains a reference to such.
3609 If X is just a constant reg, we return the equivalent value
3612 IND_LEVELS says how many levels of indirect addressing this machine
3615 OPNUM and TYPE identify the purpose of the reload.
3617 IS_SET_DEST is true if X is the destination of a SET, which is not
3618 appropriate to be replaced by a constant. */
3621 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
)
3624 enum reload_type type
;
3628 register RTX_CODE code
= GET_CODE (x
);
3630 register char *fmt
= GET_RTX_FORMAT (code
);
3635 /* This code is duplicated for speed in find_reloads. */
3636 register int regno
= REGNO (x
);
3637 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3638 x
= reg_equiv_constant
[regno
];
3640 /* This creates (subreg (mem...)) which would cause an unnecessary
3641 reload of the mem. */
3642 else if (reg_equiv_mem
[regno
] != 0)
3643 x
= reg_equiv_mem
[regno
];
3645 else if (reg_equiv_address
[regno
] != 0)
3647 /* If reg_equiv_address varies, it may be shared, so copy it. */
3648 rtx addr
= reg_equiv_address
[regno
];
3650 if (rtx_varies_p (addr
))
3651 addr
= copy_rtx (addr
);
3653 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
3654 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3655 find_reloads_address (GET_MODE (x
), NULL_PTR
,
3657 &XEXP (x
, 0), opnum
, type
, ind_levels
);
3664 find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
3665 opnum
, type
, ind_levels
);
3669 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
3671 /* Check for SUBREG containing a REG that's equivalent to a constant.
3672 If the constant has a known value, truncate it right now.
3673 Similarly if we are extracting a single-word of a multi-word
3674 constant. If the constant is symbolic, allow it to be substituted
3675 normally. push_reload will strip the subreg later. If the
3676 constant is VOIDmode, abort because we will lose the mode of
3677 the register (this should never happen because one of the cases
3678 above should handle it). */
3680 register int regno
= REGNO (SUBREG_REG (x
));
3683 if (subreg_lowpart_p (x
)
3684 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3685 && reg_equiv_constant
[regno
] != 0
3686 && (tem
= gen_lowpart_common (GET_MODE (x
),
3687 reg_equiv_constant
[regno
])) != 0)
3690 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
3691 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3692 && reg_equiv_constant
[regno
] != 0
3693 && (tem
= operand_subword (reg_equiv_constant
[regno
],
3695 GET_MODE (SUBREG_REG (x
)))) != 0)
3698 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3699 && reg_equiv_constant
[regno
] != 0
3700 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
3703 /* If the subreg contains a reg that will be converted to a mem,
3704 convert the subreg to a narrower memref now.
3705 Otherwise, we would get (subreg (mem ...) ...),
3706 which would force reload of the mem.
3708 We also need to do this if there is an equivalent MEM that is
3709 not offsettable. In that case, alter_subreg would produce an
3710 invalid address on big-endian machines.
3712 For machines that extend byte loads, we must not reload using
3713 a wider mode if we have a paradoxical SUBREG. find_reloads will
3714 force a reload in that case. So we should not do anything here. */
3716 else if (regno
>= FIRST_PSEUDO_REGISTER
3717 #if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
3718 && (GET_MODE_SIZE (GET_MODE (x
))
3719 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
3721 && (reg_equiv_address
[regno
] != 0
3722 || (reg_equiv_mem
[regno
] != 0
3723 && (! strict_memory_address_p (GET_MODE (x
),
3724 XEXP (reg_equiv_mem
[regno
], 0))
3725 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))))
3727 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
3728 rtx addr
= (reg_equiv_address
[regno
] ? reg_equiv_address
[regno
]
3729 : XEXP (reg_equiv_mem
[regno
], 0));
3730 #if BYTES_BIG_ENDIAN
3732 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
3733 offset
+= MIN (size
, UNITS_PER_WORD
);
3734 size
= GET_MODE_SIZE (GET_MODE (x
));
3735 offset
-= MIN (size
, UNITS_PER_WORD
);
3737 addr
= plus_constant (addr
, offset
);
3738 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
3739 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3740 find_reloads_address (GET_MODE (x
), NULL_PTR
,
3742 &XEXP (x
, 0), opnum
, type
, ind_levels
);
3747 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3750 XEXP (x
, i
) = find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
3751 ind_levels
, is_set_dest
);
3757 make_memloc (ad
, regno
)
3762 rtx tem
= reg_equiv_address
[regno
];
3763 for (i
= 0; i
< n_memlocs
; i
++)
3764 if (rtx_equal_p (tem
, XEXP (memlocs
[i
], 0)))
3767 /* If TEM might contain a pseudo, we must copy it to avoid
3768 modifying it when we do the substitution for the reload. */
3769 if (rtx_varies_p (tem
))
3770 tem
= copy_rtx (tem
);
3772 tem
= gen_rtx (MEM
, GET_MODE (ad
), tem
);
3773 RTX_UNCHANGING_P (tem
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3774 memlocs
[n_memlocs
++] = tem
;
3778 /* Record all reloads needed for handling memory address AD
3779 which appears in *LOC in a memory reference to mode MODE
3780 which itself is found in location *MEMREFLOC.
3781 Note that we take shortcuts assuming that no multi-reg machine mode
3782 occurs as part of an address.
3784 OPNUM and TYPE specify the purpose of this reload.
3786 IND_LEVELS says how many levels of indirect addressing this machine
3789 Value is nonzero if this address is reloaded or replaced as a whole.
3790 This is interesting to the caller if the address is an autoincrement.
3792 Note that there is no verification that the address will be valid after
3793 this routine does its work. Instead, we rely on the fact that the address
3794 was valid when reload started. So we need only undo things that reload
3795 could have broken. These are wrong register types, pseudos not allocated
3796 to a hard register, and frame pointer elimination. */
3799 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
)
3800 enum machine_mode mode
;
3805 enum reload_type type
;
3811 /* If the address is a register, see if it is a legitimate address and
3812 reload if not. We first handle the cases where we need not reload
3813 or where we must reload in a non-standard way. */
3815 if (GET_CODE (ad
) == REG
)
3819 if (reg_equiv_constant
[regno
] != 0
3820 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
3822 *loc
= ad
= reg_equiv_constant
[regno
];
3826 else if (reg_equiv_address
[regno
] != 0)
3828 tem
= make_memloc (ad
, regno
);
3829 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
3830 &XEXP (tem
, 0), opnum
, type
, ind_levels
);
3831 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
3832 GET_MODE (ad
), VOIDmode
, 0, 0,
3837 /* We can avoid a reload if the register's equivalent memory expression
3838 is valid as an indirect memory address. */
3840 else if (reg_equiv_mem
[regno
] != 0 && ind_levels
> 0
3841 && strict_memory_address_p (mode
, reg_equiv_mem
[regno
]))
3844 /* The only remaining case where we can avoid a reload is if this is a
3845 hard register that is valid as a base register and which is not the
3846 subject of a CLOBBER in this insn. */
3848 else if (regno
< FIRST_PSEUDO_REGISTER
&& REGNO_OK_FOR_BASE_P (regno
)
3849 && ! regno_clobbered_p (regno
, this_insn
))
3852 /* If we do not have one of the cases above, we must do the reload. */
3853 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
3854 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
3858 if (strict_memory_address_p (mode
, ad
))
3860 /* The address appears valid, so reloads are not needed.
3861 But the address may contain an eliminable register.
3862 This can happen because a machine with indirect addressing
3863 may consider a pseudo register by itself a valid address even when
3864 it has failed to get a hard reg.
3865 So do a tree-walk to find and eliminate all such regs. */
3867 /* But first quickly dispose of a common case. */
3868 if (GET_CODE (ad
) == PLUS
3869 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
3870 && GET_CODE (XEXP (ad
, 0)) == REG
3871 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
3874 subst_reg_equivs_changed
= 0;
3875 *loc
= subst_reg_equivs (ad
);
3877 if (! subst_reg_equivs_changed
)
3880 /* Check result for validity after substitution. */
3881 if (strict_memory_address_p (mode
, ad
))
3885 /* The address is not valid. We have to figure out why. One possibility
3886 is that it is itself a MEM. This can happen when the frame pointer is
3887 being eliminated, a pseudo is not allocated to a hard register, and the
3888 offset between the frame and stack pointers is not its initial value.
3889 In that case the pseudo will have been replaced by a MEM referring to
3890 the stack pointer. */
3891 if (GET_CODE (ad
) == MEM
)
3893 /* First ensure that the address in this MEM is valid. Then, unless
3894 indirect addresses are valid, reload the MEM into a register. */
3896 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
3897 opnum
, type
, ind_levels
== 0 ? 0 : ind_levels
- 1);
3899 /* If tem was changed, then we must create a new memory reference to
3900 hold it and store it back into memrefloc. */
3901 if (tem
!= ad
&& memrefloc
)
3903 *memrefloc
= copy_rtx (*memrefloc
);
3904 copy_replacements (tem
, XEXP (*memrefloc
, 0));
3905 loc
= &XEXP (*memrefloc
, 0);
3908 /* Check similar cases as for indirect addresses as above except
3909 that we can allow pseudos and a MEM since they should have been
3910 taken care of above. */
3913 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
3914 || GET_CODE (XEXP (tem
, 0)) == MEM
3915 || ! (GET_CODE (XEXP (tem
, 0)) == REG
3916 || (GET_CODE (XEXP (tem
, 0)) == PLUS
3917 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
3918 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
3920 /* Must use TEM here, not AD, since it is the one that will
3921 have any subexpressions reloaded, if needed. */
3922 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
3923 BASE_REG_CLASS
, GET_MODE (tem
), VOIDmode
, 0,
3931 /* If we have address of a stack slot but it's not valid
3932 (displacement is too large), compute the sum in a register. */
3933 else if (GET_CODE (ad
) == PLUS
3934 && (XEXP (ad
, 0) == frame_pointer_rtx
3935 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3936 || XEXP (ad
, 0) == arg_pointer_rtx
3938 || XEXP (ad
, 0) == stack_pointer_rtx
)
3939 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
3941 /* Unshare the MEM rtx so we can safely alter it. */
3944 rtx oldref
= *memrefloc
;
3945 *memrefloc
= copy_rtx (*memrefloc
);
3946 loc
= &XEXP (*memrefloc
, 0);
3948 if (double_reg_address_ok
)
3950 /* Unshare the sum as well. */
3951 *loc
= ad
= copy_rtx (ad
);
3952 /* Reload the displacement into an index reg.
3953 We assume the frame pointer or arg pointer is a base reg. */
3954 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
3955 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
3960 /* If the sum of two regs is not necessarily valid,
3961 reload the sum into a base reg.
3962 That will at least work. */
3963 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
,
3964 opnum
, type
, ind_levels
);
3969 /* If we have an indexed stack slot, there are three possible reasons why
3970 it might be invalid: The index might need to be reloaded, the address
3971 might have been made by frame pointer elimination and hence have a
3972 constant out of range, or both reasons might apply.
3974 We can easily check for an index needing reload, but even if that is the
3975 case, we might also have an invalid constant. To avoid making the
3976 conservative assumption and requiring two reloads, we see if this address
3977 is valid when not interpreted strictly. If it is, the only problem is
3978 that the index needs a reload and find_reloads_address_1 will take care
3981 There is still a case when we might generate an extra reload,
3982 however. In certain cases eliminate_regs will return a MEM for a REG
3983 (see the code there for details). In those cases, memory_address_p
3984 applied to our address will return 0 so we will think that our offset
3985 must be too large. But it might indeed be valid and the only problem
3986 is that a MEM is present where a REG should be. This case should be
3987 very rare and there doesn't seem to be any way to avoid it.
3989 If we decide to do something here, it must be that
3990 `double_reg_address_ok' is true and that this address rtl was made by
3991 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
3992 rework the sum so that the reload register will be added to the index.
3993 This is safe because we know the address isn't shared.
3995 We check for fp/ap/sp as both the first and second operand of the
3998 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
3999 && GET_CODE (XEXP (ad
, 0)) == PLUS
4000 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4001 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4002 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4004 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4005 && ! memory_address_p (mode
, ad
))
4007 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4008 plus_constant (XEXP (XEXP (ad
, 0), 0),
4009 INTVAL (XEXP (ad
, 1))),
4010 XEXP (XEXP (ad
, 0), 1));
4011 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4012 GET_MODE (ad
), opnum
, type
, ind_levels
);
4013 find_reloads_address_1 (XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
, type
, 0);
4018 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4019 && GET_CODE (XEXP (ad
, 0)) == PLUS
4020 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4021 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4022 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4024 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4025 && ! memory_address_p (mode
, ad
))
4027 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4028 plus_constant (XEXP (XEXP (ad
, 0), 1),
4029 INTVAL (XEXP (ad
, 1))),
4030 XEXP (XEXP (ad
, 0), 0));
4031 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4032 GET_MODE (ad
), opnum
, type
, ind_levels
);
4033 find_reloads_address_1 (XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
, type
, 0);
4038 /* See if address becomes valid when an eliminable register
4039 in a sum is replaced. */
4042 if (GET_CODE (ad
) == PLUS
)
4043 tem
= subst_indexed_address (ad
);
4044 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4046 /* Ok, we win that way. Replace any additional eliminable
4049 subst_reg_equivs_changed
= 0;
4050 tem
= subst_reg_equivs (tem
);
4052 /* Make sure that didn't make the address invalid again. */
4054 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4061 /* If constants aren't valid addresses, reload the constant address
4063 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4065 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4066 Unshare it so we can safely alter it. */
4067 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4068 && CONSTANT_POOL_ADDRESS_P (ad
))
4070 rtx oldref
= *memrefloc
;
4071 *memrefloc
= copy_rtx (*memrefloc
);
4072 loc
= &XEXP (*memrefloc
, 0);
4075 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4080 return find_reloads_address_1 (ad
, 0, loc
, opnum
, type
, ind_levels
);
4083 /* Find all pseudo regs appearing in AD
4084 that are eliminable in favor of equivalent values
4085 and do not have hard regs; replace them by their equivalents. */
4088 subst_reg_equivs (ad
)
4091 register RTX_CODE code
= GET_CODE (ad
);
4109 register int regno
= REGNO (ad
);
4111 if (reg_equiv_constant
[regno
] != 0)
4113 subst_reg_equivs_changed
= 1;
4114 return reg_equiv_constant
[regno
];
4120 /* Quickly dispose of a common case. */
4121 if (XEXP (ad
, 0) == frame_pointer_rtx
4122 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4126 fmt
= GET_RTX_FORMAT (code
);
4127 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4129 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
));
4133 /* Compute the sum of X and Y, making canonicalizations assumed in an
4134 address, namely: sum constant integers, surround the sum of two
4135 constants with a CONST, put the constant as the second operand, and
4136 group the constant on the outermost sum.
4138 This routine assumes both inputs are already in canonical form. */
4145 enum machine_mode mode
= GET_MODE (x
);
4147 if (mode
== VOIDmode
)
4148 mode
= GET_MODE (y
);
4150 if (mode
== VOIDmode
)
4153 if (GET_CODE (x
) == CONST_INT
)
4154 return plus_constant (y
, INTVAL (x
));
4155 else if (GET_CODE (y
) == CONST_INT
)
4156 return plus_constant (x
, INTVAL (y
));
4157 else if (CONSTANT_P (x
))
4158 tem
= x
, x
= y
, y
= tem
;
4160 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4161 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4163 /* Note that if the operands of Y are specified in the opposite
4164 order in the recursive calls below, infinite recursion will occur. */
4165 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4166 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4168 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4169 constant will have been placed second. */
4170 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4172 if (GET_CODE (x
) == CONST
)
4174 if (GET_CODE (y
) == CONST
)
4177 return gen_rtx (CONST
, VOIDmode
, gen_rtx (PLUS
, mode
, x
, y
));
4180 return gen_rtx (PLUS
, mode
, x
, y
);
4183 /* If ADDR is a sum containing a pseudo register that should be
4184 replaced with a constant (from reg_equiv_constant),
4185 return the result of doing so, and also apply the associative
4186 law so that the result is more likely to be a valid address.
4187 (But it is not guaranteed to be one.)
4189 Note that at most one register is replaced, even if more are
4190 replaceable. Also, we try to put the result into a canonical form
4191 so it is more likely to be a valid address.
4193 In all other cases, return ADDR. */
4196 subst_indexed_address (addr
)
4199 rtx op0
= 0, op1
= 0, op2
= 0;
4203 if (GET_CODE (addr
) == PLUS
)
4205 /* Try to find a register to replace. */
4206 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4207 if (GET_CODE (op0
) == REG
4208 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4209 && reg_renumber
[regno
] < 0
4210 && reg_equiv_constant
[regno
] != 0)
4211 op0
= reg_equiv_constant
[regno
];
4212 else if (GET_CODE (op1
) == REG
4213 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4214 && reg_renumber
[regno
] < 0
4215 && reg_equiv_constant
[regno
] != 0)
4216 op1
= reg_equiv_constant
[regno
];
4217 else if (GET_CODE (op0
) == PLUS
4218 && (tem
= subst_indexed_address (op0
)) != op0
)
4220 else if (GET_CODE (op1
) == PLUS
4221 && (tem
= subst_indexed_address (op1
)) != op1
)
4226 /* Pick out up to three things to add. */
4227 if (GET_CODE (op1
) == PLUS
)
4228 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4229 else if (GET_CODE (op0
) == PLUS
)
4230 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4232 /* Compute the sum. */
4234 op1
= form_sum (op1
, op2
);
4236 op0
= form_sum (op0
, op1
);
4243 /* Record the pseudo registers we must reload into hard registers
4244 in a subexpression of a would-be memory address, X.
4245 (This function is not called if the address we find is strictly valid.)
4246 CONTEXT = 1 means we are considering regs as index regs,
4247 = 0 means we are considering them as base regs.
4249 OPNUM and TYPE specify the purpose of any reloads made.
4251 IND_LEVELS says how many levels of indirect addressing are
4252 supported at this point in the address.
4254 We return nonzero if X, as a whole, is reloaded or replaced. */
4256 /* Note that we take shortcuts assuming that no multi-reg machine mode
4257 occurs as part of an address.
4258 Also, this is not fully machine-customizable; it works for machines
4259 such as vaxes and 68000's and 32000's, but other possible machines
4260 could have addressing modes that this does not handle right. */
4263 find_reloads_address_1 (x
, context
, loc
, opnum
, type
, ind_levels
)
4268 enum reload_type type
;
4271 register RTX_CODE code
= GET_CODE (x
);
4275 register rtx op0
= XEXP (x
, 0);
4276 register rtx op1
= XEXP (x
, 1);
4277 register RTX_CODE code0
= GET_CODE (op0
);
4278 register RTX_CODE code1
= GET_CODE (op1
);
4279 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code1
== MEM
)
4281 find_reloads_address_1 (op0
, 1, &XEXP (x
, 0), opnum
, type
,
4283 find_reloads_address_1 (op1
, 0, &XEXP (x
, 1), opnum
, type
,
4286 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code0
== MEM
)
4288 find_reloads_address_1 (op0
, 0, &XEXP (x
, 0), opnum
, type
,
4290 find_reloads_address_1 (op1
, 1, &XEXP (x
, 1), opnum
, type
,
4293 else if (code0
== CONST_INT
|| code0
== CONST
4294 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
4295 find_reloads_address_1 (op1
, 0, &XEXP (x
, 1), opnum
, type
, ind_levels
);
4296 else if (code1
== CONST_INT
|| code1
== CONST
4297 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
4298 find_reloads_address_1 (op0
, 0, &XEXP (x
, 0), opnum
, type
, ind_levels
);
4299 else if (code0
== REG
&& code1
== REG
)
4301 if (REG_OK_FOR_INDEX_P (op0
)
4302 && REG_OK_FOR_BASE_P (op1
))
4304 else if (REG_OK_FOR_INDEX_P (op1
)
4305 && REG_OK_FOR_BASE_P (op0
))
4307 else if (REG_OK_FOR_BASE_P (op1
))
4308 find_reloads_address_1 (op0
, 1, &XEXP (x
, 0), opnum
, type
,
4310 else if (REG_OK_FOR_BASE_P (op0
))
4311 find_reloads_address_1 (op1
, 1, &XEXP (x
, 1), opnum
, type
,
4313 else if (REG_OK_FOR_INDEX_P (op1
))
4314 find_reloads_address_1 (op0
, 0, &XEXP (x
, 0), opnum
, type
,
4316 else if (REG_OK_FOR_INDEX_P (op0
))
4317 find_reloads_address_1 (op1
, 0, &XEXP (x
, 1), opnum
, type
,
4321 find_reloads_address_1 (op0
, 1, &XEXP (x
, 0), opnum
, type
,
4323 find_reloads_address_1 (op1
, 0, &XEXP (x
, 1), opnum
, type
,
4327 else if (code0
== REG
)
4329 find_reloads_address_1 (op0
, 1, &XEXP (x
, 0), opnum
, type
,
4331 find_reloads_address_1 (op1
, 0, &XEXP (x
, 1), opnum
, type
,
4334 else if (code1
== REG
)
4336 find_reloads_address_1 (op1
, 1, &XEXP (x
, 1), opnum
, type
,
4338 find_reloads_address_1 (op0
, 0, &XEXP (x
, 0), opnum
, type
,
4342 else if (code
== POST_INC
|| code
== POST_DEC
4343 || code
== PRE_INC
|| code
== PRE_DEC
)
4345 if (GET_CODE (XEXP (x
, 0)) == REG
)
4347 register int regno
= REGNO (XEXP (x
, 0));
4351 /* A register that is incremented cannot be constant! */
4352 if (regno
>= FIRST_PSEUDO_REGISTER
4353 && reg_equiv_constant
[regno
] != 0)
4356 /* Handle a register that is equivalent to a memory location
4357 which cannot be addressed directly. */
4358 if (reg_equiv_address
[regno
] != 0)
4360 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
4361 /* First reload the memory location's address. */
4362 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
4363 &XEXP (tem
, 0), opnum
, type
, ind_levels
);
4364 /* Put this inside a new increment-expression. */
4365 x
= gen_rtx (GET_CODE (x
), GET_MODE (x
), tem
);
4366 /* Proceed to reload that, as if it contained a register. */
4369 /* If we have a hard register that is ok as an index,
4370 don't make a reload. If an autoincrement of a nice register
4371 isn't "valid", it must be that no autoincrement is "valid".
4372 If that is true and something made an autoincrement anyway,
4373 this must be a special context where one is allowed.
4374 (For example, a "push" instruction.)
4375 We can't improve this address, so leave it alone. */
4377 /* Otherwise, reload the autoincrement into a suitable hard reg
4378 and record how much to increment by. */
4380 if (reg_renumber
[regno
] >= 0)
4381 regno
= reg_renumber
[regno
];
4382 if ((regno
>= FIRST_PSEUDO_REGISTER
4383 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4384 : REGNO_OK_FOR_BASE_P (regno
))))
4389 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4390 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4391 GET_MODE (x
), GET_MODE (x
), VOIDmode
, 0,
4393 reload_inc
[reloadnum
]
4394 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
4399 /* Update the REG_INC notes. */
4401 for (link
= REG_NOTES (this_insn
);
4402 link
; link
= XEXP (link
, 1))
4403 if (REG_NOTE_KIND (link
) == REG_INC
4404 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
4405 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4410 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
4412 /* This is probably the result of a substitution, by eliminate_regs,
4413 of an equivalent address for a pseudo that was not allocated to a
4414 hard register. Verify that the specified address is valid and
4415 reload it into a register. */
4416 rtx tem
= XEXP (x
, 0);
4420 /* Since we know we are going to reload this item, don't decrement
4421 for the indirection level.
4423 Note that this is actually conservative: it would be slightly
4424 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4426 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
4427 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
4428 opnum
, type
, ind_levels
);
4430 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4431 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4432 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4433 reload_inc
[reloadnum
]
4434 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
4436 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
4438 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4443 else if (code
== MEM
)
4445 /* This is probably the result of a substitution, by eliminate_regs,
4446 of an equivalent address for a pseudo that was not allocated to a
4447 hard register. Verify that the specified address is valid and reload
4450 Since we know we are going to reload this item, don't decrement
4451 for the indirection level.
4453 Note that this is actually conservative: it would be slightly more
4454 efficient to use the value of SPILL_INDIRECT_LEVELS from
4457 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
4458 opnum
, type
, ind_levels
);
4460 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
4461 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4462 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4465 else if (code
== REG
)
4467 register int regno
= REGNO (x
);
4469 if (reg_equiv_constant
[regno
] != 0)
4471 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
4472 (context
? INDEX_REG_CLASS
4474 GET_MODE (x
), opnum
, type
, ind_levels
);
4478 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4479 that feeds this insn. */
4480 if (reg_equiv_mem
[regno
] != 0)
4482 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
4483 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4484 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4488 if (reg_equiv_address
[regno
] != 0)
4490 x
= make_memloc (x
, regno
);
4491 find_reloads_address (GET_MODE (x
), 0, XEXP (x
, 0), &XEXP (x
, 0),
4492 opnum
, type
, ind_levels
);
4495 if (reg_renumber
[regno
] >= 0)
4496 regno
= reg_renumber
[regno
];
4497 if ((regno
>= FIRST_PSEUDO_REGISTER
4498 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4499 : REGNO_OK_FOR_BASE_P (regno
))))
4501 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4502 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4503 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4507 /* If a register appearing in an address is the subject of a CLOBBER
4508 in this insn, reload it into some other register to be safe.
4509 The CLOBBER is supposed to make the register unavailable
4510 from before this insn to after it. */
4511 if (regno_clobbered_p (regno
, this_insn
))
4513 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4514 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4515 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4521 register char *fmt
= GET_RTX_FORMAT (code
);
4523 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4526 find_reloads_address_1 (XEXP (x
, i
), context
, &XEXP (x
, i
),
4527 opnum
, type
, ind_levels
);
4534 /* X, which is found at *LOC, is a part of an address that needs to be
4535 reloaded into a register of class CLASS. If X is a constant, or if
4536 X is a PLUS that contains a constant, check that the constant is a
4537 legitimate operand and that we are supposed to be able to load
4538 it into the register.
4540 If not, force the constant into memory and reload the MEM instead.
4542 MODE is the mode to use, in case X is an integer constant.
4544 OPNUM and TYPE describe the purpose of any reloads made.
4546 IND_LEVELS says how many levels of indirect addressing this machine
4550 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
4553 enum reg_class
class;
4554 enum machine_mode mode
;
4556 enum reload_type type
;
4560 && (! LEGITIMATE_CONSTANT_P (x
)
4561 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
4563 rtx tem
= x
= force_const_mem (mode
, x
);
4564 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
4565 opnum
, type
, ind_levels
);
4568 else if (GET_CODE (x
) == PLUS
4569 && CONSTANT_P (XEXP (x
, 1))
4570 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
4571 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
4573 rtx tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
4575 x
= gen_rtx (PLUS
, GET_MODE (x
), XEXP (x
, 0), tem
);
4576 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
4577 opnum
, type
, ind_levels
);
4580 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
4581 mode
, VOIDmode
, 0, 0, opnum
, type
);
4584 /* Substitute into the current INSN the registers into which we have reloaded
4585 the things that need reloading. The array `replacements'
4586 says contains the locations of all pointers that must be changed
4587 and says what to replace them with.
4589 Return the rtx that X translates into; usually X, but modified. */
4596 for (i
= 0; i
< n_replacements
; i
++)
4598 register struct replacement
*r
= &replacements
[i
];
4599 register rtx reloadreg
= reload_reg_rtx
[r
->what
];
4602 /* Encapsulate RELOADREG so its machine mode matches what
4603 used to be there. */
4604 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
4605 reloadreg
= gen_lowpart_common (r
->mode
, reloadreg
);
4607 /* If we are putting this into a SUBREG and RELOADREG is a
4608 SUBREG, we would be making nested SUBREGs, so we have to fix
4609 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4611 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
4613 if (GET_MODE (*r
->subreg_loc
)
4614 == GET_MODE (SUBREG_REG (reloadreg
)))
4615 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
4618 *r
->where
= SUBREG_REG (reloadreg
);
4619 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
4623 *r
->where
= reloadreg
;
4625 /* If reload got no reg and isn't optional, something's wrong. */
4626 else if (! reload_optional
[r
->what
])
4631 /* Make a copy of any replacements being done into X and move those copies
4632 to locations in Y, a copy of X. We only look at the highest level of
4636 copy_replacements (x
, y
)
4641 enum rtx_code code
= GET_CODE (x
);
4642 char *fmt
= GET_RTX_FORMAT (code
);
4643 struct replacement
*r
;
4645 /* We can't support X being a SUBREG because we might then need to know its
4646 location if something inside it was replaced. */
4650 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4652 for (j
= 0; j
< n_replacements
; j
++)
4654 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
4656 r
= &replacements
[n_replacements
++];
4657 r
->where
= replacements
[j
].where
;
4658 r
->subreg_loc
= &XEXP (y
, i
);
4659 r
->what
= replacements
[j
].what
;
4660 r
->mode
= replacements
[j
].mode
;
4662 else if (replacements
[j
].where
== &XEXP (x
, i
))
4664 r
= &replacements
[n_replacements
++];
4665 r
->where
= &XEXP (y
, i
);
4667 r
->what
= replacements
[j
].what
;
4668 r
->mode
= replacements
[j
].mode
;
4673 /* If LOC was scheduled to be replaced by something, return the replacement.
4674 Otherwise, return *LOC. */
4677 find_replacement (loc
)
4680 struct replacement
*r
;
4682 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
4684 rtx reloadreg
= reload_reg_rtx
[r
->what
];
4686 if (reloadreg
&& r
->where
== loc
)
4688 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
4689 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
4693 else if (reloadreg
&& r
->subreg_loc
== loc
)
4695 /* RELOADREG must be either a REG or a SUBREG.
4697 ??? Is it actually still ever a SUBREG? If so, why? */
4699 if (GET_CODE (reloadreg
) == REG
)
4700 return gen_rtx (REG
, GET_MODE (*loc
),
4701 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
4702 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
4705 return gen_rtx (SUBREG
, GET_MODE (*loc
), SUBREG_REG (reloadreg
),
4706 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
4713 /* Return nonzero if register in range [REGNO, ENDREGNO)
4714 appears either explicitly or implicitly in X
4715 other than being stored into.
4717 References contained within the substructure at LOC do not count.
4718 LOC may be zero, meaning don't ignore anything.
4720 This is similar to refers_to_regno_p in rtlanal.c except that we
4721 look at equivalences for pseudos that didn't get hard registers. */
4724 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
4725 int regno
, endregno
;
4730 register RTX_CODE code
;
4737 code
= GET_CODE (x
);
4744 /* If this is a pseudo, a hard register must not have been allocated.
4745 X must therefore either be a constant or be in memory. */
4746 if (i
>= FIRST_PSEUDO_REGISTER
)
4748 if (reg_equiv_memory_loc
[i
])
4749 return refers_to_regno_for_reload_p (regno
, endregno
,
4750 reg_equiv_memory_loc
[i
],
4753 if (reg_equiv_constant
[i
])
4759 return (endregno
> i
4760 && regno
< i
+ (i
< FIRST_PSEUDO_REGISTER
4761 ? HARD_REGNO_NREGS (i
, GET_MODE (x
))
4765 /* If this is a SUBREG of a hard reg, we can see exactly which
4766 registers are being modified. Otherwise, handle normally. */
4767 if (GET_CODE (SUBREG_REG (x
)) == REG
4768 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
4770 int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
4772 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
4773 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
4775 return endregno
> inner_regno
&& regno
< inner_endregno
;
4781 if (&SET_DEST (x
) != loc
4782 /* Note setting a SUBREG counts as referring to the REG it is in for
4783 a pseudo but not for hard registers since we can
4784 treat each word individually. */
4785 && ((GET_CODE (SET_DEST (x
)) == SUBREG
4786 && loc
!= &SUBREG_REG (SET_DEST (x
))
4787 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
4788 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
4789 && refers_to_regno_for_reload_p (regno
, endregno
,
4790 SUBREG_REG (SET_DEST (x
)),
4792 || (GET_CODE (SET_DEST (x
)) != REG
4793 && refers_to_regno_for_reload_p (regno
, endregno
,
4794 SET_DEST (x
), loc
))))
4797 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
4803 /* X does not match, so try its subexpressions. */
4805 fmt
= GET_RTX_FORMAT (code
);
4806 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4808 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
4816 if (refers_to_regno_for_reload_p (regno
, endregno
,
4820 else if (fmt
[i
] == 'E')
4823 for (j
= XVECLEN (x
, i
) - 1; j
>=0; j
--)
4824 if (loc
!= &XVECEXP (x
, i
, j
)
4825 && refers_to_regno_for_reload_p (regno
, endregno
,
4826 XVECEXP (x
, i
, j
), loc
))
4833 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
4834 we check if any register number in X conflicts with the relevant register
4835 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
4836 contains a MEM (we don't bother checking for memory addresses that can't
4837 conflict because we expect this to be a rare case.
4839 This function is similar to reg_overlap_mention_p in rtlanal.c except
4840 that we look at equivalences for pseudos that didn't get hard registers. */
4843 reg_overlap_mentioned_for_reload_p (x
, in
)
4846 int regno
, endregno
;
4848 if (GET_CODE (x
) == SUBREG
)
4850 regno
= REGNO (SUBREG_REG (x
));
4851 if (regno
< FIRST_PSEUDO_REGISTER
)
4852 regno
+= SUBREG_WORD (x
);
4854 else if (GET_CODE (x
) == REG
)
4858 /* If this is a pseudo, it must not have been assigned a hard register.
4859 Therefore, it must either be in memory or be a constant. */
4861 if (regno
>= FIRST_PSEUDO_REGISTER
)
4863 if (reg_equiv_memory_loc
[regno
])
4864 return refers_to_mem_for_reload_p (in
);
4865 else if (reg_equiv_constant
[regno
])
4870 else if (CONSTANT_P (x
))
4872 else if (GET_CODE (x
) == MEM
)
4873 return refers_to_mem_for_reload_p (in
);
4874 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
4875 || GET_CODE (x
) == CC0
)
4876 return reg_mentioned_p (x
, in
);
4880 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
4881 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
4883 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
4886 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
4890 refers_to_mem_for_reload_p (x
)
4896 if (GET_CODE (x
) == MEM
)
4899 if (GET_CODE (x
) == REG
)
4900 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
4901 && reg_equiv_memory_loc
[REGNO (x
)]);
4903 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
4904 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
4906 && (GET_CODE (XEXP (x
, i
)) == MEM
4907 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
4913 /* Check the insns before INSN to see if there is a suitable register
4914 containing the same value as GOAL.
4915 If OTHER is -1, look for a register in class CLASS.
4916 Otherwise, just see if register number OTHER shares GOAL's value.
4918 Return an rtx for the register found, or zero if none is found.
4920 If RELOAD_REG_P is (short *)1,
4921 we reject any hard reg that appears in reload_reg_rtx
4922 because such a hard reg is also needed coming into this insn.
4924 If RELOAD_REG_P is any other nonzero value,
4925 it is a vector indexed by hard reg number
4926 and we reject any hard reg whose element in the vector is nonnegative
4927 as well as any that appears in reload_reg_rtx.
4929 If GOAL is zero, then GOALREG is a register number; we look
4930 for an equivalent for that register.
4932 MODE is the machine mode of the value we want an equivalence for.
4933 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
4935 This function is used by jump.c as well as in the reload pass.
4937 If GOAL is the sum of the stack pointer and a constant, we treat it
4938 as if it were a constant except that sp is required to be unchanging. */
4941 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
4944 enum reg_class
class;
4946 short *reload_reg_p
;
4948 enum machine_mode mode
;
4950 register rtx p
= insn
;
4951 rtx goaltry
, valtry
, value
, where
;
4953 register int regno
= -1;
4957 int goal_mem_addr_varies
= 0;
4958 int need_stable_sp
= 0;
4964 else if (GET_CODE (goal
) == REG
)
4965 regno
= REGNO (goal
);
4966 else if (GET_CODE (goal
) == MEM
)
4968 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
4969 if (MEM_VOLATILE_P (goal
))
4971 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
4973 /* An address with side effects must be reexecuted. */
4984 else if (CONSTANT_P (goal
))
4986 else if (GET_CODE (goal
) == PLUS
4987 && XEXP (goal
, 0) == stack_pointer_rtx
4988 && CONSTANT_P (XEXP (goal
, 1)))
4989 goal_const
= need_stable_sp
= 1;
4993 /* On some machines, certain regs must always be rejected
4994 because they don't behave the way ordinary registers do. */
4996 #ifdef OVERLAPPING_REGNO_P
4997 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
4998 && OVERLAPPING_REGNO_P (regno
))
5002 /* Scan insns back from INSN, looking for one that copies
5003 a value into or out of GOAL.
5004 Stop and give up if we reach a label. */
5009 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
5011 if (GET_CODE (p
) == INSN
5012 /* If we don't want spill regs ... */
5013 && (! (reload_reg_p
!= 0
5014 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
5015 /* ... then ignore insns introduced by reload; they aren't useful
5016 and can cause results in reload_as_needed to be different
5017 from what they were when calculating the need for spills.
5018 If we notice an input-reload insn here, we will reject it below,
5019 but it might hide a usable equivalent. That makes bad code.
5020 It may even abort: perhaps no reg was spilled for this insn
5021 because it was assumed we would find that equivalent. */
5022 || INSN_UID (p
) < reload_first_uid
))
5025 pat
= single_set (p
);
5026 /* First check for something that sets some reg equal to GOAL. */
5029 && true_regnum (SET_SRC (pat
)) == regno
5030 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5033 && true_regnum (SET_DEST (pat
)) == regno
5034 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
5036 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
5037 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5039 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
5040 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
5042 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
5043 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
5044 /* If we are looking for a constant,
5045 and something equivalent to that constant was copied
5046 into a reg, we can use that reg. */
5047 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5049 && rtx_equal_p (XEXP (tem
, 0), goal
)
5050 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5051 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5053 && GET_CODE (SET_DEST (pat
)) == REG
5054 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5055 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5056 && GET_CODE (goal
) == CONST_INT
5057 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 0, 0,
5059 && rtx_equal_p (goal
, goaltry
)
5060 && (valtry
= operand_subword (SET_DEST (pat
), 0, 0,
5062 && (valueno
= true_regnum (valtry
)) >= 0)
5063 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5065 && GET_CODE (SET_DEST (pat
)) == REG
5066 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5067 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5068 && GET_CODE (goal
) == CONST_INT
5069 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
5071 && rtx_equal_p (goal
, goaltry
)
5073 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
5074 && (valueno
= true_regnum (valtry
)) >= 0)))
5077 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
5078 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
5088 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5089 (or copying VALUE into GOAL, if GOAL is also a register).
5090 Now verify that VALUE is really valid. */
5092 /* VALUENO is the register number of VALUE; a hard register. */
5094 /* Don't try to re-use something that is killed in this insn. We want
5095 to be able to trust REG_UNUSED notes. */
5096 if (find_reg_note (where
, REG_UNUSED
, value
))
5099 /* If we propose to get the value from the stack pointer or if GOAL is
5100 a MEM based on the stack pointer, we need a stable SP. */
5101 if (valueno
== STACK_POINTER_REGNUM
5102 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
5106 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5107 if (GET_MODE (value
) != mode
)
5110 /* Reject VALUE if it was loaded from GOAL
5111 and is also a register that appears in the address of GOAL. */
5113 if (goal_mem
&& value
== SET_DEST (PATTERN (where
))
5114 && refers_to_regno_for_reload_p (valueno
,
5116 + HARD_REGNO_NREGS (valueno
, mode
)),
5120 /* Reject registers that overlap GOAL. */
5122 if (!goal_mem
&& !goal_const
5123 && regno
+ HARD_REGNO_NREGS (regno
, mode
) > valueno
5124 && regno
< valueno
+ HARD_REGNO_NREGS (valueno
, mode
))
5127 /* Reject VALUE if it is one of the regs reserved for reloads.
5128 Reload1 knows how to reuse them anyway, and it would get
5129 confused if we allocated one without its knowledge.
5130 (Now that insns introduced by reload are ignored above,
5131 this case shouldn't happen, but I'm not positive.) */
5133 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1
5134 && reload_reg_p
[valueno
] >= 0)
5137 /* On some machines, certain regs must always be rejected
5138 because they don't behave the way ordinary registers do. */
5140 #ifdef OVERLAPPING_REGNO_P
5141 if (OVERLAPPING_REGNO_P (valueno
))
5145 nregs
= HARD_REGNO_NREGS (regno
, mode
);
5146 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
5148 /* Reject VALUE if it is a register being used for an input reload
5149 even if it is not one of those reserved. */
5151 if (reload_reg_p
!= 0)
5154 for (i
= 0; i
< n_reloads
; i
++)
5155 if (reload_reg_rtx
[i
] != 0 && reload_in
[i
])
5157 int regno1
= REGNO (reload_reg_rtx
[i
]);
5158 int nregs1
= HARD_REGNO_NREGS (regno1
,
5159 GET_MODE (reload_reg_rtx
[i
]));
5160 if (regno1
< valueno
+ valuenregs
5161 && regno1
+ nregs1
> valueno
)
5167 goal_mem_addr_varies
= rtx_addr_varies_p (goal
);
5169 /* Now verify that the values of GOAL and VALUE remain unaltered
5170 until INSN is reached. */
5179 /* Don't trust the conversion past a function call
5180 if either of the two is in a call-clobbered register, or memory. */
5181 if (GET_CODE (p
) == CALL_INSN
5182 && ((regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5183 && call_used_regs
[regno
])
5185 (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5186 && call_used_regs
[valueno
])
5192 #ifdef INSN_CLOBBERS_REGNO_P
5193 if ((valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5194 && INSN_CLOBBERS_REGNO_P (p
, valueno
))
5195 || (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5196 && INSN_CLOBBERS_REGNO_P (p
, regno
)))
5200 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
5202 /* If this insn P stores in either GOAL or VALUE, return 0.
5203 If GOAL is a memory ref and this insn writes memory, return 0.
5204 If GOAL is a memory ref and its address is not constant,
5205 and this insn P changes a register used in GOAL, return 0. */
5208 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
5210 register rtx dest
= SET_DEST (pat
);
5211 while (GET_CODE (dest
) == SUBREG
5212 || GET_CODE (dest
) == ZERO_EXTRACT
5213 || GET_CODE (dest
) == SIGN_EXTRACT
5214 || GET_CODE (dest
) == STRICT_LOW_PART
)
5215 dest
= XEXP (dest
, 0);
5216 if (GET_CODE (dest
) == REG
)
5218 register int xregno
= REGNO (dest
);
5220 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5221 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5224 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
5226 if (xregno
< valueno
+ valuenregs
5227 && xregno
+ xnregs
> valueno
)
5229 if (goal_mem_addr_varies
5230 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
5233 else if (goal_mem
&& GET_CODE (dest
) == MEM
5234 && ! push_operand (dest
, GET_MODE (dest
)))
5236 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
5239 else if (GET_CODE (pat
) == PARALLEL
)
5242 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
5244 register rtx v1
= XVECEXP (pat
, 0, i
);
5245 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
5247 register rtx dest
= SET_DEST (v1
);
5248 while (GET_CODE (dest
) == SUBREG
5249 || GET_CODE (dest
) == ZERO_EXTRACT
5250 || GET_CODE (dest
) == SIGN_EXTRACT
5251 || GET_CODE (dest
) == STRICT_LOW_PART
)
5252 dest
= XEXP (dest
, 0);
5253 if (GET_CODE (dest
) == REG
)
5255 register int xregno
= REGNO (dest
);
5257 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5258 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5261 if (xregno
< regno
+ nregs
5262 && xregno
+ xnregs
> regno
)
5264 if (xregno
< valueno
+ valuenregs
5265 && xregno
+ xnregs
> valueno
)
5267 if (goal_mem_addr_varies
5268 && reg_overlap_mentioned_for_reload_p (dest
,
5272 else if (goal_mem
&& GET_CODE (dest
) == MEM
5273 && ! push_operand (dest
, GET_MODE (dest
)))
5275 else if (need_stable_sp
5276 && push_operand (dest
, GET_MODE (dest
)))
5283 /* If this insn auto-increments or auto-decrements
5284 either regno or valueno, return 0 now.
5285 If GOAL is a memory ref and its address is not constant,
5286 and this insn P increments a register used in GOAL, return 0. */
5290 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
5291 if (REG_NOTE_KIND (link
) == REG_INC
5292 && GET_CODE (XEXP (link
, 0)) == REG
)
5294 register int incno
= REGNO (XEXP (link
, 0));
5295 if (incno
< regno
+ nregs
&& incno
>= regno
)
5297 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
5299 if (goal_mem_addr_varies
5300 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
5310 /* Find a place where INCED appears in an increment or decrement operator
5311 within X, and return the amount INCED is incremented or decremented by.
5312 The value is always positive. */
5315 find_inc_amount (x
, inced
)
5318 register enum rtx_code code
= GET_CODE (x
);
5324 register rtx addr
= XEXP (x
, 0);
5325 if ((GET_CODE (addr
) == PRE_DEC
5326 || GET_CODE (addr
) == POST_DEC
5327 || GET_CODE (addr
) == PRE_INC
5328 || GET_CODE (addr
) == POST_INC
)
5329 && XEXP (addr
, 0) == inced
)
5330 return GET_MODE_SIZE (GET_MODE (x
));
5333 fmt
= GET_RTX_FORMAT (code
);
5334 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5338 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
5345 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
5347 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
5357 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5360 regno_clobbered_p (regno
, insn
)
5364 if (GET_CODE (PATTERN (insn
)) == CLOBBER
5365 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
5366 return REGNO (XEXP (PATTERN (insn
), 0)) == regno
;
5368 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
5370 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
5374 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
5375 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
5376 && REGNO (XEXP (elt
, 0)) == regno
)