1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
93 #include "insn-config.h"
99 #include "hard-reg-set.h"
103 #include "function.h"
106 #ifndef REGISTER_MOVE_COST
107 #define REGISTER_MOVE_COST(m, x, y) 2
110 #ifndef REGNO_MODE_OK_FOR_BASE_P
111 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
114 #ifndef REG_MODE_OK_FOR_BASE_P
115 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
118 /* All reloads of the current insn are recorded here. See reload.h for
121 struct reload rld
[MAX_RELOADS
];
123 /* All the "earlyclobber" operands of the current insn
124 are recorded here. */
126 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
128 int reload_n_operands
;
130 /* Replacing reloads.
132 If `replace_reloads' is nonzero, then as each reload is recorded
133 an entry is made for it in the table `replacements'.
134 Then later `subst_reloads' can look through that table and
135 perform all the replacements needed. */
137 /* Nonzero means record the places to replace. */
138 static int replace_reloads
;
140 /* Each replacement is recorded with a structure like this. */
143 rtx
*where
; /* Location to store in */
144 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
145 a SUBREG; 0 otherwise. */
146 int what
; /* which reload this is for */
147 enum machine_mode mode
; /* mode it must have */
150 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
152 /* Number of replacements currently recorded. */
153 static int n_replacements
;
155 /* Used to track what is modified by an operand. */
158 int reg_flag
; /* Nonzero if referencing a register. */
159 int safe
; /* Nonzero if this can't conflict with anything. */
160 rtx base
; /* Base address for MEM. */
161 HOST_WIDE_INT start
; /* Starting offset or register number. */
162 HOST_WIDE_INT end
; /* Ending offset or register number. */
165 #ifdef SECONDARY_MEMORY_NEEDED
167 /* Save MEMs needed to copy from one class of registers to another. One MEM
168 is used per mode, but normally only one or two modes are ever used.
170 We keep two versions, before and after register elimination. The one
171 after register elimination is record separately for each operand. This
172 is done in case the address is not valid to be sure that we separately
175 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
176 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
179 /* The instruction we are doing reloads for;
180 so we can test whether a register dies in it. */
181 static rtx this_insn
;
183 /* Nonzero if this instruction is a user-specified asm with operands. */
184 static int this_insn_is_asm
;
186 /* If hard_regs_live_known is nonzero,
187 we can tell which hard regs are currently live,
188 at least enough to succeed in choosing dummy reloads. */
189 static int hard_regs_live_known
;
191 /* Indexed by hard reg number,
192 element is nonnegative if hard reg has been spilled.
193 This vector is passed to `find_reloads' as an argument
194 and is not changed here. */
195 static short *static_reload_reg_p
;
197 /* Set to 1 in subst_reg_equivs if it changes anything. */
198 static int subst_reg_equivs_changed
;
200 /* On return from push_reload, holds the reload-number for the OUT
201 operand, which can be different for that from the input operand. */
202 static int output_reloadnum
;
204 /* Compare two RTX's. */
205 #define MATCHES(x, y) \
206 (x == y || (x != 0 && (GET_CODE (x) == REG \
207 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
208 : rtx_equal_p (x, y) && ! side_effects_p (x))))
210 /* Indicates if two reloads purposes are for similar enough things that we
211 can merge their reloads. */
212 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
213 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
214 || ((when1) == (when2) && (op1) == (op2)) \
215 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
216 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
217 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
218 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
219 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
221 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
222 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
223 ((when1) != (when2) \
224 || ! ((op1) == (op2) \
225 || (when1) == RELOAD_FOR_INPUT \
226 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
227 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
229 /* If we are going to reload an address, compute the reload type to
231 #define ADDR_TYPE(type) \
232 ((type) == RELOAD_FOR_INPUT_ADDRESS \
233 ? RELOAD_FOR_INPADDR_ADDRESS \
234 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
235 ? RELOAD_FOR_OUTADDR_ADDRESS \
238 #ifdef HAVE_SECONDARY_RELOADS
239 static int push_secondary_reload
PARAMS ((int, rtx
, int, int, enum reg_class
,
240 enum machine_mode
, enum reload_type
,
243 static enum reg_class find_valid_class
PARAMS ((enum machine_mode
, int,
245 static int reload_inner_reg_of_subreg
PARAMS ((rtx
, enum machine_mode
));
246 static void push_replacement
PARAMS ((rtx
*, int, enum machine_mode
));
247 static void combine_reloads
PARAMS ((void));
248 static int find_reusable_reload
PARAMS ((rtx
*, rtx
, enum reg_class
,
249 enum reload_type
, int, int));
250 static rtx find_dummy_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*,
251 enum machine_mode
, enum machine_mode
,
252 enum reg_class
, int, int));
253 static int hard_reg_set_here_p
PARAMS ((unsigned int, unsigned int, rtx
));
254 static struct decomposition decompose
PARAMS ((rtx
));
255 static int immune_p
PARAMS ((rtx
, rtx
, struct decomposition
));
256 static int alternative_allows_memconst
PARAMS ((const char *, int));
257 static rtx find_reloads_toplev
PARAMS ((rtx
, int, enum reload_type
, int,
259 static rtx make_memloc
PARAMS ((rtx
, int));
260 static int find_reloads_address
PARAMS ((enum machine_mode
, rtx
*, rtx
, rtx
*,
261 int, enum reload_type
, int, rtx
));
262 static rtx subst_reg_equivs
PARAMS ((rtx
, rtx
));
263 static rtx subst_indexed_address
PARAMS ((rtx
));
264 static void update_auto_inc_notes
PARAMS ((rtx
, int, int));
265 static int find_reloads_address_1
PARAMS ((enum machine_mode
, rtx
, int, rtx
*,
266 int, enum reload_type
,int, rtx
));
267 static void find_reloads_address_part
PARAMS ((rtx
, rtx
*, enum reg_class
,
268 enum machine_mode
, int,
269 enum reload_type
, int));
270 static rtx find_reloads_subreg_address
PARAMS ((rtx
, int, int,
271 enum reload_type
, int, rtx
));
272 static void copy_replacements_1
PARAMS ((rtx
*, rtx
*, int));
273 static int find_inc_amount
PARAMS ((rtx
, rtx
));
275 #ifdef HAVE_SECONDARY_RELOADS
277 /* Determine if any secondary reloads are needed for loading (if IN_P is
278 non-zero) or storing (if IN_P is zero) X to or from a reload register of
279 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
280 are needed, push them.
282 Return the reload number of the secondary reload we made, or -1 if
283 we didn't need one. *PICODE is set to the insn_code to use if we do
284 need a secondary reload. */
287 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
293 enum reg_class reload_class
;
294 enum machine_mode reload_mode
;
295 enum reload_type type
;
296 enum insn_code
*picode
;
298 enum reg_class
class = NO_REGS
;
299 enum machine_mode mode
= reload_mode
;
300 enum insn_code icode
= CODE_FOR_nothing
;
301 enum reg_class t_class
= NO_REGS
;
302 enum machine_mode t_mode
= VOIDmode
;
303 enum insn_code t_icode
= CODE_FOR_nothing
;
304 enum reload_type secondary_type
;
305 int s_reload
, t_reload
= -1;
307 if (type
== RELOAD_FOR_INPUT_ADDRESS
308 || type
== RELOAD_FOR_OUTPUT_ADDRESS
309 || type
== RELOAD_FOR_INPADDR_ADDRESS
310 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
311 secondary_type
= type
;
313 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
315 *picode
= CODE_FOR_nothing
;
317 /* If X is a paradoxical SUBREG, use the inner value to determine both the
318 mode and object being reloaded. */
319 if (GET_CODE (x
) == SUBREG
320 && (GET_MODE_SIZE (GET_MODE (x
))
321 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
324 reload_mode
= GET_MODE (x
);
327 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
328 is still a pseudo-register by now, it *must* have an equivalent MEM
329 but we don't want to assume that), use that equivalent when seeing if
330 a secondary reload is needed since whether or not a reload is needed
331 might be sensitive to the form of the MEM. */
333 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
334 && reg_equiv_mem
[REGNO (x
)] != 0)
335 x
= reg_equiv_mem
[REGNO (x
)];
337 #ifdef SECONDARY_INPUT_RELOAD_CLASS
339 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
342 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
344 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
347 /* If we don't need any secondary registers, done. */
348 if (class == NO_REGS
)
351 /* Get a possible insn to use. If the predicate doesn't accept X, don't
354 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
355 : reload_out_optab
[(int) reload_mode
]);
357 if (icode
!= CODE_FOR_nothing
358 && insn_data
[(int) icode
].operand
[in_p
].predicate
359 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
360 icode
= CODE_FOR_nothing
;
362 /* If we will be using an insn, see if it can directly handle the reload
363 register we will be using. If it can, the secondary reload is for a
364 scratch register. If it can't, we will use the secondary reload for
365 an intermediate register and require a tertiary reload for the scratch
368 if (icode
!= CODE_FOR_nothing
)
370 /* If IN_P is non-zero, the reload register will be the output in
371 operand 0. If IN_P is zero, the reload register will be the input
372 in operand 1. Outputs should have an initial "=", which we must
375 enum reg_class insn_class
;
377 if (insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] == 0)
378 insn_class
= ALL_REGS
;
382 = insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
384 = (insn_letter
== 'r' ? GENERAL_REGS
385 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter
));
387 if (insn_class
== NO_REGS
)
390 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
394 /* The scratch register's constraint must start with "=&". */
395 if (insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
396 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
399 if (reg_class_subset_p (reload_class
, insn_class
))
400 mode
= insn_data
[(int) icode
].operand
[2].mode
;
403 char t_letter
= insn_data
[(int) icode
].operand
[2].constraint
[2];
405 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
406 t_class
= (t_letter
== 'r' ? GENERAL_REGS
407 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter
));
409 icode
= CODE_FOR_nothing
;
413 /* This case isn't valid, so fail. Reload is allowed to use the same
414 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
415 in the case of a secondary register, we actually need two different
416 registers for correct code. We fail here to prevent the possibility of
417 silently generating incorrect code later.
419 The convention is that secondary input reloads are valid only if the
420 secondary_class is different from class. If you have such a case, you
421 can not use secondary reloads, you must work around the problem some
424 Allow this when a reload_in/out pattern is being used. I.e. assume
425 that the generated code handles this case. */
427 if (in_p
&& class == reload_class
&& icode
== CODE_FOR_nothing
428 && t_icode
== CODE_FOR_nothing
)
431 /* If we need a tertiary reload, see if we have one we can reuse or else
434 if (t_class
!= NO_REGS
)
436 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
437 if (rld
[t_reload
].secondary_p
438 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
439 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
440 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
441 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
442 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
443 == CODE_FOR_nothing
))
444 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
445 == CODE_FOR_nothing
)))
446 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
447 && MERGABLE_RELOADS (secondary_type
,
448 rld
[t_reload
].when_needed
,
449 opnum
, rld
[t_reload
].opnum
))
452 rld
[t_reload
].inmode
= t_mode
;
454 rld
[t_reload
].outmode
= t_mode
;
456 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
457 rld
[t_reload
].class = t_class
;
459 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
460 rld
[t_reload
].optional
&= optional
;
461 rld
[t_reload
].secondary_p
= 1;
462 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
463 opnum
, rld
[t_reload
].opnum
))
464 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
467 if (t_reload
== n_reloads
)
469 /* We need to make a new tertiary reload for this register class. */
470 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
471 rld
[t_reload
].class = t_class
;
472 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
473 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
474 rld
[t_reload
].reg_rtx
= 0;
475 rld
[t_reload
].optional
= optional
;
476 rld
[t_reload
].inc
= 0;
477 /* Maybe we could combine these, but it seems too tricky. */
478 rld
[t_reload
].nocombine
= 1;
479 rld
[t_reload
].in_reg
= 0;
480 rld
[t_reload
].out_reg
= 0;
481 rld
[t_reload
].opnum
= opnum
;
482 rld
[t_reload
].when_needed
= secondary_type
;
483 rld
[t_reload
].secondary_in_reload
= -1;
484 rld
[t_reload
].secondary_out_reload
= -1;
485 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
486 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
487 rld
[t_reload
].secondary_p
= 1;
493 /* See if we can reuse an existing secondary reload. */
494 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
495 if (rld
[s_reload
].secondary_p
496 && (reg_class_subset_p (class, rld
[s_reload
].class)
497 || reg_class_subset_p (rld
[s_reload
].class, class))
498 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
499 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
500 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
501 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
502 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
503 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
504 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
505 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
506 opnum
, rld
[s_reload
].opnum
))
509 rld
[s_reload
].inmode
= mode
;
511 rld
[s_reload
].outmode
= mode
;
513 if (reg_class_subset_p (class, rld
[s_reload
].class))
514 rld
[s_reload
].class = class;
516 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
517 rld
[s_reload
].optional
&= optional
;
518 rld
[s_reload
].secondary_p
= 1;
519 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
520 opnum
, rld
[s_reload
].opnum
))
521 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
524 if (s_reload
== n_reloads
)
526 #ifdef SECONDARY_MEMORY_NEEDED
527 /* If we need a memory location to copy between the two reload regs,
528 set it up now. Note that we do the input case before making
529 the reload and the output case after. This is due to the
530 way reloads are output. */
532 if (in_p
&& icode
== CODE_FOR_nothing
533 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
535 get_secondary_mem (x
, reload_mode
, opnum
, type
);
537 /* We may have just added new reloads. Make sure we add
538 the new reload at the end. */
539 s_reload
= n_reloads
;
543 /* We need to make a new secondary reload for this register class. */
544 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
545 rld
[s_reload
].class = class;
547 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
548 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
549 rld
[s_reload
].reg_rtx
= 0;
550 rld
[s_reload
].optional
= optional
;
551 rld
[s_reload
].inc
= 0;
552 /* Maybe we could combine these, but it seems too tricky. */
553 rld
[s_reload
].nocombine
= 1;
554 rld
[s_reload
].in_reg
= 0;
555 rld
[s_reload
].out_reg
= 0;
556 rld
[s_reload
].opnum
= opnum
;
557 rld
[s_reload
].when_needed
= secondary_type
;
558 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
559 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
560 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
561 rld
[s_reload
].secondary_out_icode
562 = ! in_p
? t_icode
: CODE_FOR_nothing
;
563 rld
[s_reload
].secondary_p
= 1;
567 #ifdef SECONDARY_MEMORY_NEEDED
568 if (! in_p
&& icode
== CODE_FOR_nothing
569 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
570 get_secondary_mem (x
, mode
, opnum
, type
);
577 #endif /* HAVE_SECONDARY_RELOADS */
579 #ifdef SECONDARY_MEMORY_NEEDED
581 /* Return a memory location that will be used to copy X in mode MODE.
582 If we haven't already made a location for this mode in this insn,
583 call find_reloads_address on the location being returned. */
586 get_secondary_mem (x
, mode
, opnum
, type
)
587 rtx x ATTRIBUTE_UNUSED
;
588 enum machine_mode mode
;
590 enum reload_type type
;
595 /* By default, if MODE is narrower than a word, widen it to a word.
596 This is required because most machines that require these memory
597 locations do not support short load and stores from all registers
598 (e.g., FP registers). */
600 #ifdef SECONDARY_MEMORY_NEEDED_MODE
601 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
603 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
604 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
607 /* If we already have made a MEM for this operand in MODE, return it. */
608 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
609 return secondary_memlocs_elim
[(int) mode
][opnum
];
611 /* If this is the first time we've tried to get a MEM for this mode,
612 allocate a new one. `something_changed' in reload will get set
613 by noticing that the frame size has changed. */
615 if (secondary_memlocs
[(int) mode
] == 0)
617 #ifdef SECONDARY_MEMORY_NEEDED_RTX
618 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
620 secondary_memlocs
[(int) mode
]
621 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
625 /* Get a version of the address doing any eliminations needed. If that
626 didn't give us a new MEM, make a new one if it isn't valid. */
628 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
629 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
631 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
632 loc
= copy_rtx (loc
);
634 /* The only time the call below will do anything is if the stack
635 offset is too large. In that case IND_LEVELS doesn't matter, so we
636 can just pass a zero. Adjust the type to be the address of the
637 corresponding object. If the address was valid, save the eliminated
638 address. If it wasn't valid, we need to make a reload each time, so
643 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
644 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
647 find_reloads_address (mode
, &loc
, XEXP (loc
, 0), &XEXP (loc
, 0),
651 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
655 /* Clear any secondary memory locations we've made. */
658 clear_secondary_mem ()
660 memset ((char *) secondary_memlocs
, 0, sizeof secondary_memlocs
);
662 #endif /* SECONDARY_MEMORY_NEEDED */
664 /* Find the largest class for which every register number plus N is valid in
665 M1 (if in range) and is cheap to move into REGNO.
666 Abort if no such class exists. */
668 static enum reg_class
669 find_valid_class (m1
, n
, dest_regno
)
670 enum machine_mode m1 ATTRIBUTE_UNUSED
;
672 unsigned int dest_regno
;
677 enum reg_class best_class
= NO_REGS
;
678 enum reg_class dest_class
= REGNO_REG_CLASS (dest_regno
);
679 unsigned int best_size
= 0;
682 for (class = 1; class < N_REG_CLASSES
; class++)
685 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
686 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
687 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
688 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
693 cost
= REGISTER_MOVE_COST (m1
, class, dest_class
);
695 if ((reg_class_size
[class] > best_size
696 && (best_cost
< 0 || best_cost
>= cost
))
700 best_size
= reg_class_size
[class];
701 best_cost
= REGISTER_MOVE_COST (m1
, class, dest_class
);
711 /* Return the number of a previously made reload that can be combined with
712 a new one, or n_reloads if none of the existing reloads can be used.
713 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
714 push_reload, they determine the kind of the new reload that we try to
715 combine. P_IN points to the corresponding value of IN, which can be
716 modified by this function.
717 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
720 find_reusable_reload (p_in
, out
, class, type
, opnum
, dont_share
)
722 enum reg_class
class;
723 enum reload_type type
;
724 int opnum
, dont_share
;
728 /* We can't merge two reloads if the output of either one is
731 if (earlyclobber_operand_p (out
))
734 /* We can use an existing reload if the class is right
735 and at least one of IN and OUT is a match
736 and the other is at worst neutral.
737 (A zero compared against anything is neutral.)
739 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
740 for the same thing since that can cause us to need more reload registers
741 than we otherwise would. */
743 for (i
= 0; i
< n_reloads
; i
++)
744 if ((reg_class_subset_p (class, rld
[i
].class)
745 || reg_class_subset_p (rld
[i
].class, class))
746 /* If the existing reload has a register, it must fit our class. */
747 && (rld
[i
].reg_rtx
== 0
748 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
749 true_regnum (rld
[i
].reg_rtx
)))
750 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
751 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
752 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
753 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
754 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
755 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
756 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
759 /* Reloading a plain reg for input can match a reload to postincrement
760 that reg, since the postincrement's value is the right value.
761 Likewise, it can match a preincrement reload, since we regard
762 the preincrementation as happening before any ref in this insn
764 for (i
= 0; i
< n_reloads
; i
++)
765 if ((reg_class_subset_p (class, rld
[i
].class)
766 || reg_class_subset_p (rld
[i
].class, class))
767 /* If the existing reload has a register, it must fit our
769 && (rld
[i
].reg_rtx
== 0
770 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
771 true_regnum (rld
[i
].reg_rtx
)))
772 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
773 && ((GET_CODE (in
) == REG
774 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == 'a'
775 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
776 || (GET_CODE (rld
[i
].in
) == REG
777 && GET_RTX_CLASS (GET_CODE (in
)) == 'a'
778 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
779 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
780 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
781 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
782 opnum
, rld
[i
].opnum
))
784 /* Make sure reload_in ultimately has the increment,
785 not the plain register. */
786 if (GET_CODE (in
) == REG
)
793 /* Return nonzero if X is a SUBREG which will require reloading of its
794 SUBREG_REG expression. */
797 reload_inner_reg_of_subreg (x
, mode
)
799 enum machine_mode mode
;
803 /* Only SUBREGs are problematical. */
804 if (GET_CODE (x
) != SUBREG
)
807 inner
= SUBREG_REG (x
);
809 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
810 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
813 /* If INNER is not a hard register, then INNER will not need to
815 if (GET_CODE (inner
) != REG
816 || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
819 /* If INNER is not ok for MODE, then INNER will need reloading. */
820 if (! HARD_REGNO_MODE_OK (subreg_regno (x
), mode
))
823 /* If the outer part is a word or smaller, INNER larger than a
824 word and the number of regs for INNER is not the same as the
825 number of words in INNER, then INNER will need reloading. */
826 return (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
827 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
828 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
829 != (int) HARD_REGNO_NREGS (REGNO (inner
), GET_MODE (inner
))));
832 /* Record one reload that needs to be performed.
833 IN is an rtx saying where the data are to be found before this instruction.
834 OUT says where they must be stored after the instruction.
835 (IN is zero for data not read, and OUT is zero for data not written.)
836 INLOC and OUTLOC point to the places in the instructions where
837 IN and OUT were found.
838 If IN and OUT are both non-zero, it means the same register must be used
839 to reload both IN and OUT.
841 CLASS is a register class required for the reloaded data.
842 INMODE is the machine mode that the instruction requires
843 for the reg that replaces IN and OUTMODE is likewise for OUT.
845 If IN is zero, then OUT's location and mode should be passed as
848 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
850 OPTIONAL nonzero means this reload does not need to be performed:
851 it can be discarded if that is more convenient.
853 OPNUM and TYPE say what the purpose of this reload is.
855 The return value is the reload-number for this reload.
857 If both IN and OUT are nonzero, in some rare cases we might
858 want to make two separate reloads. (Actually we never do this now.)
859 Therefore, the reload-number for OUT is stored in
860 output_reloadnum when we return; the return value applies to IN.
861 Usually (presently always), when IN and OUT are nonzero,
862 the two reload-numbers are equal, but the caller should be careful to
866 push_reload (in
, out
, inloc
, outloc
, class,
867 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
870 enum reg_class
class;
871 enum machine_mode inmode
, outmode
;
875 enum reload_type type
;
879 int dont_remove_subreg
= 0;
880 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
881 int secondary_in_reload
= -1, secondary_out_reload
= -1;
882 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
883 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
885 /* INMODE and/or OUTMODE could be VOIDmode if no mode
886 has been specified for the operand. In that case,
887 use the operand's mode as the mode to reload. */
888 if (inmode
== VOIDmode
&& in
!= 0)
889 inmode
= GET_MODE (in
);
890 if (outmode
== VOIDmode
&& out
!= 0)
891 outmode
= GET_MODE (out
);
893 /* If IN is a pseudo register everywhere-equivalent to a constant, and
894 it is not in a hard register, reload straight from the constant,
895 since we want to get rid of such pseudo registers.
896 Often this is done earlier, but not always in find_reloads_address. */
897 if (in
!= 0 && GET_CODE (in
) == REG
)
899 int regno
= REGNO (in
);
901 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
902 && reg_equiv_constant
[regno
] != 0)
903 in
= reg_equiv_constant
[regno
];
906 /* Likewise for OUT. Of course, OUT will never be equivalent to
907 an actual constant, but it might be equivalent to a memory location
908 (in the case of a parameter). */
909 if (out
!= 0 && GET_CODE (out
) == REG
)
911 int regno
= REGNO (out
);
913 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
914 && reg_equiv_constant
[regno
] != 0)
915 out
= reg_equiv_constant
[regno
];
918 /* If we have a read-write operand with an address side-effect,
919 change either IN or OUT so the side-effect happens only once. */
920 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
921 switch (GET_CODE (XEXP (in
, 0)))
923 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
924 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
927 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
928 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
935 /* If we are reloading a (SUBREG constant ...), really reload just the
936 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
937 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
938 a pseudo and hence will become a MEM) with M1 wider than M2 and the
939 register is a pseudo, also reload the inside expression.
940 For machines that extend byte loads, do this for any SUBREG of a pseudo
941 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
942 M2 is an integral mode that gets extended when loaded.
943 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
944 either M1 is not valid for R or M2 is wider than a word but we only
945 need one word to store an M2-sized quantity in R.
946 (However, if OUT is nonzero, we need to reload the reg *and*
947 the subreg, so do nothing here, and let following statement handle it.)
949 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
950 we can't handle it here because CONST_INT does not indicate a mode.
952 Similarly, we must reload the inside expression if we have a
953 STRICT_LOW_PART (presumably, in == out in the cas).
955 Also reload the inner expression if it does not require a secondary
956 reload but the SUBREG does.
958 Finally, reload the inner expression if it is a register that is in
959 the class whose registers cannot be referenced in a different size
960 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
961 cannot reload just the inside since we might end up with the wrong
962 register class. But if it is inside a STRICT_LOW_PART, we have
963 no choice, so we hope we do get the right register class there. */
965 if (in
!= 0 && GET_CODE (in
) == SUBREG
966 && (subreg_lowpart_p (in
) || strict_low
)
967 #ifdef CLASS_CANNOT_CHANGE_MODE
968 && (class != CLASS_CANNOT_CHANGE_MODE
969 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)), inmode
))
971 && (CONSTANT_P (SUBREG_REG (in
))
972 || GET_CODE (SUBREG_REG (in
)) == PLUS
974 || (((GET_CODE (SUBREG_REG (in
)) == REG
975 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
976 || GET_CODE (SUBREG_REG (in
)) == MEM
)
977 && ((GET_MODE_SIZE (inmode
)
978 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
979 #ifdef LOAD_EXTEND_OP
980 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
981 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
983 && (GET_MODE_SIZE (inmode
)
984 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
985 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
986 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
988 #ifdef WORD_REGISTER_OPERATIONS
989 || ((GET_MODE_SIZE (inmode
)
990 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
991 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
992 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
996 || (GET_CODE (SUBREG_REG (in
)) == REG
997 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
998 /* The case where out is nonzero
999 is handled differently in the following statement. */
1000 && (out
== 0 || subreg_lowpart_p (in
))
1001 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1002 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1004 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1006 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
1007 GET_MODE (SUBREG_REG (in
)))))
1008 || ! HARD_REGNO_MODE_OK (subreg_regno (in
), inmode
)))
1009 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1010 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
1011 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1012 GET_MODE (SUBREG_REG (in
)),
1016 #ifdef CLASS_CANNOT_CHANGE_MODE
1017 || (GET_CODE (SUBREG_REG (in
)) == REG
1018 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1019 && (TEST_HARD_REG_BIT
1020 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1021 REGNO (SUBREG_REG (in
))))
1022 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)),
1027 in_subreg_loc
= inloc
;
1028 inloc
= &SUBREG_REG (in
);
1030 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1031 if (GET_CODE (in
) == MEM
)
1032 /* This is supposed to happen only for paradoxical subregs made by
1033 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1034 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
1037 inmode
= GET_MODE (in
);
1040 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1041 either M1 is not valid for R or M2 is wider than a word but we only
1042 need one word to store an M2-sized quantity in R.
1044 However, we must reload the inner reg *as well as* the subreg in
1047 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1048 code above. This can happen if SUBREG_BYTE != 0. */
1050 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
))
1052 enum reg_class in_class
= class;
1054 if (GET_CODE (SUBREG_REG (in
)) == REG
)
1056 = find_valid_class (inmode
,
1057 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1058 GET_MODE (SUBREG_REG (in
)),
1061 REGNO (SUBREG_REG (in
)));
1063 /* This relies on the fact that emit_reload_insns outputs the
1064 instructions for input reloads of type RELOAD_OTHER in the same
1065 order as the reloads. Thus if the outer reload is also of type
1066 RELOAD_OTHER, we are guaranteed that this inner reload will be
1067 output before the outer reload. */
1068 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*) 0,
1069 in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1070 dont_remove_subreg
= 1;
1073 /* Similarly for paradoxical and problematical SUBREGs on the output.
1074 Note that there is no reason we need worry about the previous value
1075 of SUBREG_REG (out); even if wider than out,
1076 storing in a subreg is entitled to clobber it all
1077 (except in the case of STRICT_LOW_PART,
1078 and in that case the constraint should label it input-output.) */
1079 if (out
!= 0 && GET_CODE (out
) == SUBREG
1080 && (subreg_lowpart_p (out
) || strict_low
)
1081 #ifdef CLASS_CANNOT_CHANGE_MODE
1082 && (class != CLASS_CANNOT_CHANGE_MODE
1083 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1086 && (CONSTANT_P (SUBREG_REG (out
))
1088 || (((GET_CODE (SUBREG_REG (out
)) == REG
1089 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1090 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1091 && ((GET_MODE_SIZE (outmode
)
1092 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1093 #ifdef WORD_REGISTER_OPERATIONS
1094 || ((GET_MODE_SIZE (outmode
)
1095 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1096 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1097 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1101 || (GET_CODE (SUBREG_REG (out
)) == REG
1102 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1103 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1104 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1106 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1108 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1109 GET_MODE (SUBREG_REG (out
)))))
1110 || ! HARD_REGNO_MODE_OK (subreg_regno (out
), outmode
)))
1111 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1112 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1113 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1114 GET_MODE (SUBREG_REG (out
)),
1118 #ifdef CLASS_CANNOT_CHANGE_MODE
1119 || (GET_CODE (SUBREG_REG (out
)) == REG
1120 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1121 && (TEST_HARD_REG_BIT
1122 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1123 REGNO (SUBREG_REG (out
))))
1124 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1129 out_subreg_loc
= outloc
;
1130 outloc
= &SUBREG_REG (out
);
1132 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1133 if (GET_CODE (out
) == MEM
1134 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1137 outmode
= GET_MODE (out
);
1140 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1141 either M1 is not valid for R or M2 is wider than a word but we only
1142 need one word to store an M2-sized quantity in R.
1144 However, we must reload the inner reg *as well as* the subreg in
1145 that case. In this case, the inner reg is an in-out reload. */
1147 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
))
1149 /* This relies on the fact that emit_reload_insns outputs the
1150 instructions for output reloads of type RELOAD_OTHER in reverse
1151 order of the reloads. Thus if the outer reload is also of type
1152 RELOAD_OTHER, we are guaranteed that this inner reload will be
1153 output after the outer reload. */
1154 dont_remove_subreg
= 1;
1155 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1157 find_valid_class (outmode
,
1158 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1159 GET_MODE (SUBREG_REG (out
)),
1162 REGNO (SUBREG_REG (out
))),
1163 VOIDmode
, VOIDmode
, 0, 0,
1164 opnum
, RELOAD_OTHER
);
1167 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1168 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1169 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1170 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1173 /* If IN is a SUBREG of a hard register, make a new REG. This
1174 simplifies some of the cases below. */
1176 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1177 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1178 && ! dont_remove_subreg
)
1179 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1181 /* Similarly for OUT. */
1182 if (out
!= 0 && GET_CODE (out
) == SUBREG
1183 && GET_CODE (SUBREG_REG (out
)) == REG
1184 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1185 && ! dont_remove_subreg
)
1186 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1188 /* Narrow down the class of register wanted if that is
1189 desirable on this machine for efficiency. */
1191 class = PREFERRED_RELOAD_CLASS (in
, class);
1193 /* Output reloads may need analogous treatment, different in detail. */
1194 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1196 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1199 /* Make sure we use a class that can handle the actual pseudo
1200 inside any subreg. For example, on the 386, QImode regs
1201 can appear within SImode subregs. Although GENERAL_REGS
1202 can handle SImode, QImode needs a smaller class. */
1203 #ifdef LIMIT_RELOAD_CLASS
1205 class = LIMIT_RELOAD_CLASS (inmode
, class);
1206 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1207 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1210 class = LIMIT_RELOAD_CLASS (outmode
, class);
1211 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1212 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1215 /* Verify that this class is at least possible for the mode that
1217 if (this_insn_is_asm
)
1219 enum machine_mode mode
;
1220 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1224 if (mode
== VOIDmode
)
1226 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1231 outmode
= word_mode
;
1233 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1234 if (HARD_REGNO_MODE_OK (i
, mode
)
1235 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1237 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1240 for (j
= 1; j
< nregs
; j
++)
1241 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1246 if (i
== FIRST_PSEUDO_REGISTER
)
1248 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1253 /* Optional output reloads are always OK even if we have no register class,
1254 since the function of these reloads is only to have spill_reg_store etc.
1255 set, so that the storing insn can be deleted later. */
1256 if (class == NO_REGS
1257 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1260 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1264 /* See if we need a secondary reload register to move between CLASS
1265 and IN or CLASS and OUT. Get the icode and push any required reloads
1266 needed for each of them if so. */
1268 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1271 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1272 &secondary_in_icode
);
1275 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1276 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1277 secondary_out_reload
1278 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1279 type
, &secondary_out_icode
);
1282 /* We found no existing reload suitable for re-use.
1283 So add an additional reload. */
1285 #ifdef SECONDARY_MEMORY_NEEDED
1286 /* If a memory location is needed for the copy, make one. */
1287 if (in
!= 0 && GET_CODE (in
) == REG
1288 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1289 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1291 get_secondary_mem (in
, inmode
, opnum
, type
);
1297 rld
[i
].class = class;
1298 rld
[i
].inmode
= inmode
;
1299 rld
[i
].outmode
= outmode
;
1301 rld
[i
].optional
= optional
;
1303 rld
[i
].nocombine
= 0;
1304 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1305 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1306 rld
[i
].opnum
= opnum
;
1307 rld
[i
].when_needed
= type
;
1308 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1309 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1310 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1311 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1312 rld
[i
].secondary_p
= 0;
1316 #ifdef SECONDARY_MEMORY_NEEDED
1317 if (out
!= 0 && GET_CODE (out
) == REG
1318 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1319 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1321 get_secondary_mem (out
, outmode
, opnum
, type
);
1326 /* We are reusing an existing reload,
1327 but we may have additional information for it.
1328 For example, we may now have both IN and OUT
1329 while the old one may have just one of them. */
1331 /* The modes can be different. If they are, we want to reload in
1332 the larger mode, so that the value is valid for both modes. */
1333 if (inmode
!= VOIDmode
1334 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1335 rld
[i
].inmode
= inmode
;
1336 if (outmode
!= VOIDmode
1337 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1338 rld
[i
].outmode
= outmode
;
1341 rtx in_reg
= inloc
? *inloc
: 0;
1342 /* If we merge reloads for two distinct rtl expressions that
1343 are identical in content, there might be duplicate address
1344 reloads. Remove the extra set now, so that if we later find
1345 that we can inherit this reload, we can get rid of the
1346 address reloads altogether.
1348 Do not do this if both reloads are optional since the result
1349 would be an optional reload which could potentially leave
1350 unresolved address replacements.
1352 It is not sufficient to call transfer_replacements since
1353 choose_reload_regs will remove the replacements for address
1354 reloads of inherited reloads which results in the same
1356 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1357 && ! (rld
[i
].optional
&& optional
))
1359 /* We must keep the address reload with the lower operand
1361 if (opnum
> rld
[i
].opnum
)
1363 remove_address_replacements (in
);
1365 in_reg
= rld
[i
].in_reg
;
1368 remove_address_replacements (rld
[i
].in
);
1371 rld
[i
].in_reg
= in_reg
;
1376 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1378 if (reg_class_subset_p (class, rld
[i
].class))
1379 rld
[i
].class = class;
1380 rld
[i
].optional
&= optional
;
1381 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1382 opnum
, rld
[i
].opnum
))
1383 rld
[i
].when_needed
= RELOAD_OTHER
;
1384 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1387 /* If the ostensible rtx being reloaded differs from the rtx found
1388 in the location to substitute, this reload is not safe to combine
1389 because we cannot reliably tell whether it appears in the insn. */
1391 if (in
!= 0 && in
!= *inloc
)
1392 rld
[i
].nocombine
= 1;
1395 /* This was replaced by changes in find_reloads_address_1 and the new
1396 function inc_for_reload, which go with a new meaning of reload_inc. */
1398 /* If this is an IN/OUT reload in an insn that sets the CC,
1399 it must be for an autoincrement. It doesn't work to store
1400 the incremented value after the insn because that would clobber the CC.
1401 So we must do the increment of the value reloaded from,
1402 increment it, store it back, then decrement again. */
1403 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1407 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1408 /* If we did not find a nonzero amount-to-increment-by,
1409 that contradicts the belief that IN is being incremented
1410 in an address in this insn. */
1411 if (rld
[i
].inc
== 0)
1416 /* If we will replace IN and OUT with the reload-reg,
1417 record where they are located so that substitution need
1418 not do a tree walk. */
1420 if (replace_reloads
)
1424 struct replacement
*r
= &replacements
[n_replacements
++];
1426 r
->subreg_loc
= in_subreg_loc
;
1430 if (outloc
!= 0 && outloc
!= inloc
)
1432 struct replacement
*r
= &replacements
[n_replacements
++];
1435 r
->subreg_loc
= out_subreg_loc
;
1440 /* If this reload is just being introduced and it has both
1441 an incoming quantity and an outgoing quantity that are
1442 supposed to be made to match, see if either one of the two
1443 can serve as the place to reload into.
1445 If one of them is acceptable, set rld[i].reg_rtx
1448 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1450 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1453 earlyclobber_operand_p (out
));
1455 /* If the outgoing register already contains the same value
1456 as the incoming one, we can dispense with loading it.
1457 The easiest way to tell the caller that is to give a phony
1458 value for the incoming operand (same as outgoing one). */
1459 if (rld
[i
].reg_rtx
== out
1460 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1461 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1462 static_reload_reg_p
, i
, inmode
))
1466 /* If this is an input reload and the operand contains a register that
1467 dies in this insn and is used nowhere else, see if it is the right class
1468 to be used for this reload. Use it if so. (This occurs most commonly
1469 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1470 this if it is also an output reload that mentions the register unless
1471 the output is a SUBREG that clobbers an entire register.
1473 Note that the operand might be one of the spill regs, if it is a
1474 pseudo reg and we are in a block where spilling has not taken place.
1475 But if there is no spilling in this block, that is OK.
1476 An explicitly used hard reg cannot be a spill reg. */
1478 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1482 enum machine_mode rel_mode
= inmode
;
1484 if (out
&& GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (inmode
))
1487 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1488 if (REG_NOTE_KIND (note
) == REG_DEAD
1489 && GET_CODE (XEXP (note
, 0)) == REG
1490 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1491 && reg_mentioned_p (XEXP (note
, 0), in
)
1492 && ! refers_to_regno_for_reload_p (regno
,
1494 + HARD_REGNO_NREGS (regno
,
1496 PATTERN (this_insn
), inloc
)
1497 /* If this is also an output reload, IN cannot be used as
1498 the reload register if it is set in this insn unless IN
1500 && (out
== 0 || in
== out
1501 || ! hard_reg_set_here_p (regno
,
1503 + HARD_REGNO_NREGS (regno
,
1505 PATTERN (this_insn
)))
1506 /* ??? Why is this code so different from the previous?
1507 Is there any simple coherent way to describe the two together?
1508 What's going on here. */
1510 || (GET_CODE (in
) == SUBREG
1511 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1513 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1514 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1515 /* Make sure the operand fits in the reg that dies. */
1516 && (GET_MODE_SIZE (rel_mode
)
1517 <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1518 && HARD_REGNO_MODE_OK (regno
, inmode
)
1519 && HARD_REGNO_MODE_OK (regno
, outmode
))
1522 unsigned int nregs
= MAX (HARD_REGNO_NREGS (regno
, inmode
),
1523 HARD_REGNO_NREGS (regno
, outmode
));
1525 for (offs
= 0; offs
< nregs
; offs
++)
1526 if (fixed_regs
[regno
+ offs
]
1527 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1533 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1540 output_reloadnum
= i
;
1545 /* Record an additional place we must replace a value
1546 for which we have already recorded a reload.
1547 RELOADNUM is the value returned by push_reload
1548 when the reload was recorded.
1549 This is used in insn patterns that use match_dup. */
1552 push_replacement (loc
, reloadnum
, mode
)
1555 enum machine_mode mode
;
1557 if (replace_reloads
)
1559 struct replacement
*r
= &replacements
[n_replacements
++];
1560 r
->what
= reloadnum
;
1567 /* Transfer all replacements that used to be in reload FROM to be in
1571 transfer_replacements (to
, from
)
1576 for (i
= 0; i
< n_replacements
; i
++)
1577 if (replacements
[i
].what
== from
)
1578 replacements
[i
].what
= to
;
1581 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1582 or a subpart of it. If we have any replacements registered for IN_RTX,
1583 cancel the reloads that were supposed to load them.
1584 Return non-zero if we canceled any reloads. */
1586 remove_address_replacements (in_rtx
)
1590 char reload_flags
[MAX_RELOADS
];
1591 int something_changed
= 0;
1593 memset (reload_flags
, 0, sizeof reload_flags
);
1594 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1596 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1597 reload_flags
[replacements
[i
].what
] |= 1;
1600 replacements
[j
++] = replacements
[i
];
1601 reload_flags
[replacements
[i
].what
] |= 2;
1604 /* Note that the following store must be done before the recursive calls. */
1607 for (i
= n_reloads
- 1; i
>= 0; i
--)
1609 if (reload_flags
[i
] == 1)
1611 deallocate_reload_reg (i
);
1612 remove_address_replacements (rld
[i
].in
);
1614 something_changed
= 1;
1617 return something_changed
;
1620 /* If there is only one output reload, and it is not for an earlyclobber
1621 operand, try to combine it with a (logically unrelated) input reload
1622 to reduce the number of reload registers needed.
1624 This is safe if the input reload does not appear in
1625 the value being output-reloaded, because this implies
1626 it is not needed any more once the original insn completes.
1628 If that doesn't work, see we can use any of the registers that
1629 die in this insn as a reload register. We can if it is of the right
1630 class and does not appear in the value being output-reloaded. */
1636 int output_reload
= -1;
1637 int secondary_out
= -1;
1640 /* Find the output reload; return unless there is exactly one
1641 and that one is mandatory. */
1643 for (i
= 0; i
< n_reloads
; i
++)
1644 if (rld
[i
].out
!= 0)
1646 if (output_reload
>= 0)
1651 if (output_reload
< 0 || rld
[output_reload
].optional
)
1654 /* An input-output reload isn't combinable. */
1656 if (rld
[output_reload
].in
!= 0)
1659 /* If this reload is for an earlyclobber operand, we can't do anything. */
1660 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1663 /* If there is a reload for part of the address of this operand, we would
1664 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1665 its life to the point where doing this combine would not lower the
1666 number of spill registers needed. */
1667 for (i
= 0; i
< n_reloads
; i
++)
1668 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
1669 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
1670 && rld
[i
].opnum
== rld
[output_reload
].opnum
)
1673 /* Check each input reload; can we combine it? */
1675 for (i
= 0; i
< n_reloads
; i
++)
1676 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1677 /* Life span of this reload must not extend past main insn. */
1678 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1679 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1680 && rld
[i
].when_needed
!= RELOAD_OTHER
1681 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1682 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1683 rld
[output_reload
].outmode
))
1685 && rld
[i
].reg_rtx
== 0
1686 #ifdef SECONDARY_MEMORY_NEEDED
1687 /* Don't combine two reloads with different secondary
1688 memory locations. */
1689 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1690 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1691 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1692 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1694 && (SMALL_REGISTER_CLASSES
1695 ? (rld
[i
].class == rld
[output_reload
].class)
1696 : (reg_class_subset_p (rld
[i
].class,
1697 rld
[output_reload
].class)
1698 || reg_class_subset_p (rld
[output_reload
].class,
1700 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1701 /* Args reversed because the first arg seems to be
1702 the one that we imagine being modified
1703 while the second is the one that might be affected. */
1704 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1706 /* However, if the input is a register that appears inside
1707 the output, then we also can't share.
1708 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1709 If the same reload reg is used for both reg 69 and the
1710 result to be stored in memory, then that result
1711 will clobber the address of the memory ref. */
1712 && ! (GET_CODE (rld
[i
].in
) == REG
1713 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1714 rld
[output_reload
].out
))))
1715 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
)
1716 && (reg_class_size
[(int) rld
[i
].class]
1717 || SMALL_REGISTER_CLASSES
)
1718 /* We will allow making things slightly worse by combining an
1719 input and an output, but no worse than that. */
1720 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1721 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1725 /* We have found a reload to combine with! */
1726 rld
[i
].out
= rld
[output_reload
].out
;
1727 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1728 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1729 /* Mark the old output reload as inoperative. */
1730 rld
[output_reload
].out
= 0;
1731 /* The combined reload is needed for the entire insn. */
1732 rld
[i
].when_needed
= RELOAD_OTHER
;
1733 /* If the output reload had a secondary reload, copy it. */
1734 if (rld
[output_reload
].secondary_out_reload
!= -1)
1736 rld
[i
].secondary_out_reload
1737 = rld
[output_reload
].secondary_out_reload
;
1738 rld
[i
].secondary_out_icode
1739 = rld
[output_reload
].secondary_out_icode
;
1742 #ifdef SECONDARY_MEMORY_NEEDED
1743 /* Copy any secondary MEM. */
1744 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1745 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1746 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1748 /* If required, minimize the register class. */
1749 if (reg_class_subset_p (rld
[output_reload
].class,
1751 rld
[i
].class = rld
[output_reload
].class;
1753 /* Transfer all replacements from the old reload to the combined. */
1754 for (j
= 0; j
< n_replacements
; j
++)
1755 if (replacements
[j
].what
== output_reload
)
1756 replacements
[j
].what
= i
;
1761 /* If this insn has only one operand that is modified or written (assumed
1762 to be the first), it must be the one corresponding to this reload. It
1763 is safe to use anything that dies in this insn for that output provided
1764 that it does not occur in the output (we already know it isn't an
1765 earlyclobber. If this is an asm insn, give up. */
1767 if (INSN_CODE (this_insn
) == -1)
1770 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1771 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1772 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1775 /* See if some hard register that dies in this insn and is not used in
1776 the output is the right class. Only works if the register we pick
1777 up can fully hold our output reload. */
1778 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1779 if (REG_NOTE_KIND (note
) == REG_DEAD
1780 && GET_CODE (XEXP (note
, 0)) == REG
1781 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1782 rld
[output_reload
].out
)
1783 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1784 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1785 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1786 REGNO (XEXP (note
, 0)))
1787 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1788 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1789 /* Ensure that a secondary or tertiary reload for this output
1790 won't want this register. */
1791 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1792 || (! (TEST_HARD_REG_BIT
1793 (reg_class_contents
[(int) rld
[secondary_out
].class],
1794 REGNO (XEXP (note
, 0))))
1795 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1796 || ! (TEST_HARD_REG_BIT
1797 (reg_class_contents
[(int) rld
[secondary_out
].class],
1798 REGNO (XEXP (note
, 0)))))))
1799 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1801 rld
[output_reload
].reg_rtx
1802 = gen_rtx_REG (rld
[output_reload
].outmode
,
1803 REGNO (XEXP (note
, 0)));
1808 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1809 See if one of IN and OUT is a register that may be used;
1810 this is desirable since a spill-register won't be needed.
1811 If so, return the register rtx that proves acceptable.
1813 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1814 CLASS is the register class required for the reload.
1816 If FOR_REAL is >= 0, it is the number of the reload,
1817 and in some cases when it can be discovered that OUT doesn't need
1818 to be computed, clear out rld[FOR_REAL].out.
1820 If FOR_REAL is -1, this should not be done, because this call
1821 is just to see if a register can be found, not to find and install it.
1823 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1824 puts an additional constraint on being able to use IN for OUT since
1825 IN must not appear elsewhere in the insn (it is assumed that IN itself
1826 is safe from the earlyclobber). */
1829 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1830 inmode
, outmode
, class, for_real
, earlyclobber
)
1831 rtx real_in
, real_out
;
1832 rtx
*inloc
, *outloc
;
1833 enum machine_mode inmode
, outmode
;
1834 enum reg_class
class;
1844 /* If operands exceed a word, we can't use either of them
1845 unless they have the same size. */
1846 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1847 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1848 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1851 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1852 respectively refers to a hard register. */
1854 /* Find the inside of any subregs. */
1855 while (GET_CODE (out
) == SUBREG
)
1857 if (GET_CODE (SUBREG_REG (out
)) == REG
1858 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
1859 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1860 GET_MODE (SUBREG_REG (out
)),
1863 out
= SUBREG_REG (out
);
1865 while (GET_CODE (in
) == SUBREG
)
1867 if (GET_CODE (SUBREG_REG (in
)) == REG
1868 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
1869 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1870 GET_MODE (SUBREG_REG (in
)),
1873 in
= SUBREG_REG (in
);
1876 /* Narrow down the reg class, the same way push_reload will;
1877 otherwise we might find a dummy now, but push_reload won't. */
1878 class = PREFERRED_RELOAD_CLASS (in
, class);
1880 /* See if OUT will do. */
1881 if (GET_CODE (out
) == REG
1882 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1884 unsigned int regno
= REGNO (out
) + out_offset
;
1885 unsigned int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1888 /* When we consider whether the insn uses OUT,
1889 ignore references within IN. They don't prevent us
1890 from copying IN into OUT, because those refs would
1891 move into the insn that reloads IN.
1893 However, we only ignore IN in its role as this reload.
1894 If the insn uses IN elsewhere and it contains OUT,
1895 that counts. We can't be sure it's the "same" operand
1896 so it might not go through this reload. */
1898 *inloc
= const0_rtx
;
1900 if (regno
< FIRST_PSEUDO_REGISTER
1901 && HARD_REGNO_MODE_OK (regno
, outmode
)
1902 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1903 PATTERN (this_insn
), outloc
))
1907 for (i
= 0; i
< nwords
; i
++)
1908 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1914 if (GET_CODE (real_out
) == REG
)
1917 value
= gen_rtx_REG (outmode
, regno
);
1924 /* Consider using IN if OUT was not acceptable
1925 or if OUT dies in this insn (like the quotient in a divmod insn).
1926 We can't use IN unless it is dies in this insn,
1927 which means we must know accurately which hard regs are live.
1928 Also, the result can't go in IN if IN is used within OUT,
1929 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1930 if (hard_regs_live_known
1931 && GET_CODE (in
) == REG
1932 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1934 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1935 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1936 && !fixed_regs
[REGNO (in
)]
1937 && HARD_REGNO_MODE_OK (REGNO (in
),
1938 /* The only case where out and real_out might
1939 have different modes is where real_out
1940 is a subreg, and in that case, out
1942 (GET_MODE (out
) != VOIDmode
1943 ? GET_MODE (out
) : outmode
)))
1945 unsigned int regno
= REGNO (in
) + in_offset
;
1946 unsigned int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1948 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*) 0)
1949 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1950 PATTERN (this_insn
))
1952 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1953 PATTERN (this_insn
), inloc
)))
1957 for (i
= 0; i
< nwords
; i
++)
1958 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1964 /* If we were going to use OUT as the reload reg
1965 and changed our mind, it means OUT is a dummy that
1966 dies here. So don't bother copying value to it. */
1967 if (for_real
>= 0 && value
== real_out
)
1968 rld
[for_real
].out
= 0;
1969 if (GET_CODE (real_in
) == REG
)
1972 value
= gen_rtx_REG (inmode
, regno
);
1980 /* This page contains subroutines used mainly for determining
1981 whether the IN or an OUT of a reload can serve as the
1984 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1987 earlyclobber_operand_p (x
)
1992 for (i
= 0; i
< n_earlyclobbers
; i
++)
1993 if (reload_earlyclobbers
[i
] == x
)
1999 /* Return 1 if expression X alters a hard reg in the range
2000 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2001 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2002 X should be the body of an instruction. */
2005 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
2006 unsigned int beg_regno
, end_regno
;
2009 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
2011 rtx op0
= SET_DEST (x
);
2013 while (GET_CODE (op0
) == SUBREG
)
2014 op0
= SUBREG_REG (op0
);
2015 if (GET_CODE (op0
) == REG
)
2017 unsigned int r
= REGNO (op0
);
2019 /* See if this reg overlaps range under consideration. */
2021 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
2025 else if (GET_CODE (x
) == PARALLEL
)
2027 int i
= XVECLEN (x
, 0) - 1;
2030 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
2037 /* Return 1 if ADDR is a valid memory address for mode MODE,
2038 and check that each pseudo reg has the proper kind of
2042 strict_memory_address_p (mode
, addr
)
2043 enum machine_mode mode ATTRIBUTE_UNUSED
;
2046 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2053 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2054 if they are the same hard reg, and has special hacks for
2055 autoincrement and autodecrement.
2056 This is specifically intended for find_reloads to use
2057 in determining whether two operands match.
2058 X is the operand whose number is the lower of the two.
2060 The value is 2 if Y contains a pre-increment that matches
2061 a non-incrementing address in X. */
2063 /* ??? To be completely correct, we should arrange to pass
2064 for X the output operand and for Y the input operand.
2065 For now, we assume that the output operand has the lower number
2066 because that is natural in (SET output (... input ...)). */
2069 operands_match_p (x
, y
)
2073 RTX_CODE code
= GET_CODE (x
);
2079 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
2080 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
2081 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2087 i
= REGNO (SUBREG_REG (x
));
2088 if (i
>= FIRST_PSEUDO_REGISTER
)
2090 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2091 GET_MODE (SUBREG_REG (x
)),
2098 if (GET_CODE (y
) == SUBREG
)
2100 j
= REGNO (SUBREG_REG (y
));
2101 if (j
>= FIRST_PSEUDO_REGISTER
)
2103 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2104 GET_MODE (SUBREG_REG (y
)),
2111 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2112 multiple hard register group, so that for example (reg:DI 0) and
2113 (reg:SI 1) will be considered the same register. */
2114 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2115 && i
< FIRST_PSEUDO_REGISTER
)
2116 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
2117 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2118 && j
< FIRST_PSEUDO_REGISTER
)
2119 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
2123 /* If two operands must match, because they are really a single
2124 operand of an assembler insn, then two postincrements are invalid
2125 because the assembler insn would increment only once.
2126 On the other hand, an postincrement matches ordinary indexing
2127 if the postincrement is the output operand. */
2128 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2129 return operands_match_p (XEXP (x
, 0), y
);
2130 /* Two preincrements are invalid
2131 because the assembler insn would increment only once.
2132 On the other hand, an preincrement matches ordinary indexing
2133 if the preincrement is the input operand.
2134 In this case, return 2, since some callers need to do special
2135 things when this happens. */
2136 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2137 || GET_CODE (y
) == PRE_MODIFY
)
2138 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2142 /* Now we have disposed of all the cases
2143 in which different rtx codes can match. */
2144 if (code
!= GET_CODE (y
))
2146 if (code
== LABEL_REF
)
2147 return XEXP (x
, 0) == XEXP (y
, 0);
2148 if (code
== SYMBOL_REF
)
2149 return XSTR (x
, 0) == XSTR (y
, 0);
2151 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2153 if (GET_MODE (x
) != GET_MODE (y
))
2156 /* Compare the elements. If any pair of corresponding elements
2157 fail to match, return 0 for the whole things. */
2160 fmt
= GET_RTX_FORMAT (code
);
2161 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2167 if (XWINT (x
, i
) != XWINT (y
, i
))
2172 if (XINT (x
, i
) != XINT (y
, i
))
2177 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2180 /* If any subexpression returns 2,
2181 we should return 2 if we are successful. */
2190 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2192 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2194 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2202 /* It is believed that rtx's at this level will never
2203 contain anything but integers and other rtx's,
2204 except for within LABEL_REFs and SYMBOL_REFs. */
2209 return 1 + success_2
;
2212 /* Describe the range of registers or memory referenced by X.
2213 If X is a register, set REG_FLAG and put the first register
2214 number into START and the last plus one into END.
2215 If X is a memory reference, put a base address into BASE
2216 and a range of integer offsets into START and END.
2217 If X is pushing on the stack, we can assume it causes no trouble,
2218 so we set the SAFE field. */
2220 static struct decomposition
2224 struct decomposition val
;
2230 if (GET_CODE (x
) == MEM
)
2232 rtx base
= NULL_RTX
, offset
= 0;
2233 rtx addr
= XEXP (x
, 0);
2235 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2236 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2238 val
.base
= XEXP (addr
, 0);
2239 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2240 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2241 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2245 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2247 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2248 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2249 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2251 val
.base
= XEXP (addr
, 0);
2252 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2253 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2254 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2259 if (GET_CODE (addr
) == CONST
)
2261 addr
= XEXP (addr
, 0);
2264 if (GET_CODE (addr
) == PLUS
)
2266 if (CONSTANT_P (XEXP (addr
, 0)))
2268 base
= XEXP (addr
, 1);
2269 offset
= XEXP (addr
, 0);
2271 else if (CONSTANT_P (XEXP (addr
, 1)))
2273 base
= XEXP (addr
, 0);
2274 offset
= XEXP (addr
, 1);
2281 offset
= const0_rtx
;
2283 if (GET_CODE (offset
) == CONST
)
2284 offset
= XEXP (offset
, 0);
2285 if (GET_CODE (offset
) == PLUS
)
2287 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2289 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2290 offset
= XEXP (offset
, 0);
2292 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2294 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2295 offset
= XEXP (offset
, 1);
2299 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2300 offset
= const0_rtx
;
2303 else if (GET_CODE (offset
) != CONST_INT
)
2305 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2306 offset
= const0_rtx
;
2309 if (all_const
&& GET_CODE (base
) == PLUS
)
2310 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2312 if (GET_CODE (offset
) != CONST_INT
)
2315 val
.start
= INTVAL (offset
);
2316 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2320 else if (GET_CODE (x
) == REG
)
2323 val
.start
= true_regnum (x
);
2326 /* A pseudo with no hard reg. */
2327 val
.start
= REGNO (x
);
2328 val
.end
= val
.start
+ 1;
2332 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2334 else if (GET_CODE (x
) == SUBREG
)
2336 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2337 /* This could be more precise, but it's good enough. */
2338 return decompose (SUBREG_REG (x
));
2340 val
.start
= true_regnum (x
);
2342 return decompose (SUBREG_REG (x
));
2345 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2347 else if (CONSTANT_P (x
)
2348 /* This hasn't been assigned yet, so it can't conflict yet. */
2349 || GET_CODE (x
) == SCRATCH
)
2356 /* Return 1 if altering Y will not modify the value of X.
2357 Y is also described by YDATA, which should be decompose (Y). */
2360 immune_p (x
, y
, ydata
)
2362 struct decomposition ydata
;
2364 struct decomposition xdata
;
2367 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, (rtx
*) 0);
2371 if (GET_CODE (y
) != MEM
)
2373 /* If Y is memory and X is not, Y can't affect X. */
2374 if (GET_CODE (x
) != MEM
)
2377 xdata
= decompose (x
);
2379 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2381 /* If bases are distinct symbolic constants, there is no overlap. */
2382 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2384 /* Constants and stack slots never overlap. */
2385 if (CONSTANT_P (xdata
.base
)
2386 && (ydata
.base
== frame_pointer_rtx
2387 || ydata
.base
== hard_frame_pointer_rtx
2388 || ydata
.base
== stack_pointer_rtx
))
2390 if (CONSTANT_P (ydata
.base
)
2391 && (xdata
.base
== frame_pointer_rtx
2392 || xdata
.base
== hard_frame_pointer_rtx
2393 || xdata
.base
== stack_pointer_rtx
))
2395 /* If either base is variable, we don't know anything. */
2399 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2402 /* Similar, but calls decompose. */
2405 safe_from_earlyclobber (op
, clobber
)
2408 struct decomposition early_data
;
2410 early_data
= decompose (clobber
);
2411 return immune_p (op
, clobber
, early_data
);
2414 /* Main entry point of this file: search the body of INSN
2415 for values that need reloading and record them with push_reload.
2416 REPLACE nonzero means record also where the values occur
2417 so that subst_reloads can be used.
2419 IND_LEVELS says how many levels of indirection are supported by this
2420 machine; a value of zero means that a memory reference is not a valid
2423 LIVE_KNOWN says we have valid information about which hard
2424 regs are live at each point in the program; this is true when
2425 we are called from global_alloc but false when stupid register
2426 allocation has been done.
2428 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2429 which is nonnegative if the reg has been commandeered for reloading into.
2430 It is copied into STATIC_RELOAD_REG_P and referenced from there
2431 by various subroutines.
2433 Return TRUE if some operands need to be changed, because of swapping
2434 commutative operands, reg_equiv_address substitution, or whatever. */
2437 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2439 int replace
, ind_levels
;
2441 short *reload_reg_p
;
2443 int insn_code_number
;
2446 /* These start out as the constraints for the insn
2447 and they are chewed up as we consider alternatives. */
2448 char *constraints
[MAX_RECOG_OPERANDS
];
2449 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2451 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2452 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2453 /* Nonzero for a MEM operand whose entire address needs a reload. */
2454 int address_reloaded
[MAX_RECOG_OPERANDS
];
2455 /* Value of enum reload_type to use for operand. */
2456 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2457 /* Value of enum reload_type to use within address of operand. */
2458 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2459 /* Save the usage of each operand. */
2460 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2461 int no_input_reloads
= 0, no_output_reloads
= 0;
2463 int this_alternative
[MAX_RECOG_OPERANDS
];
2464 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2465 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2466 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2467 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2468 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2470 int goal_alternative
[MAX_RECOG_OPERANDS
];
2471 int this_alternative_number
;
2472 int goal_alternative_number
= 0;
2473 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2474 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2475 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2476 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2477 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2478 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2479 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2480 int goal_alternative_swapped
;
2483 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2484 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2485 rtx body
= PATTERN (insn
);
2486 rtx set
= single_set (insn
);
2487 int goal_earlyclobber
= 0, this_earlyclobber
;
2488 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2494 n_earlyclobbers
= 0;
2495 replace_reloads
= replace
;
2496 hard_regs_live_known
= live_known
;
2497 static_reload_reg_p
= reload_reg_p
;
2499 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2500 neither are insns that SET cc0. Insns that use CC0 are not allowed
2501 to have any input reloads. */
2502 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2503 no_output_reloads
= 1;
2506 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2507 no_input_reloads
= 1;
2508 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2509 no_output_reloads
= 1;
2512 #ifdef SECONDARY_MEMORY_NEEDED
2513 /* The eliminated forms of any secondary memory locations are per-insn, so
2514 clear them out here. */
2516 memset ((char *) secondary_memlocs_elim
, 0, sizeof secondary_memlocs_elim
);
2519 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2520 is cheap to move between them. If it is not, there may not be an insn
2521 to do the copy, so we may need a reload. */
2522 if (GET_CODE (body
) == SET
2523 && GET_CODE (SET_DEST (body
)) == REG
2524 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2525 && GET_CODE (SET_SRC (body
)) == REG
2526 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2527 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body
)),
2528 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2529 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2532 extract_insn (insn
);
2534 noperands
= reload_n_operands
= recog_data
.n_operands
;
2535 n_alternatives
= recog_data
.n_alternatives
;
2537 /* Just return "no reloads" if insn has no operands with constraints. */
2538 if (noperands
== 0 || n_alternatives
== 0)
2541 insn_code_number
= INSN_CODE (insn
);
2542 this_insn_is_asm
= insn_code_number
< 0;
2544 memcpy (operand_mode
, recog_data
.operand_mode
,
2545 noperands
* sizeof (enum machine_mode
));
2546 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2550 /* If we will need to know, later, whether some pair of operands
2551 are the same, we must compare them now and save the result.
2552 Reloading the base and index registers will clobber them
2553 and afterward they will fail to match. */
2555 for (i
= 0; i
< noperands
; i
++)
2560 substed_operand
[i
] = recog_data
.operand
[i
];
2563 modified
[i
] = RELOAD_READ
;
2565 /* Scan this operand's constraint to see if it is an output operand,
2566 an in-out operand, is commutative, or should match another. */
2571 modified
[i
] = RELOAD_WRITE
;
2573 modified
[i
] = RELOAD_READ_WRITE
;
2576 /* The last operand should not be marked commutative. */
2577 if (i
== noperands
- 1)
2582 else if (ISDIGIT (c
))
2584 c
= strtoul (p
- 1, &p
, 10);
2586 operands_match
[c
][i
]
2587 = operands_match_p (recog_data
.operand
[c
],
2588 recog_data
.operand
[i
]);
2590 /* An operand may not match itself. */
2594 /* If C can be commuted with C+1, and C might need to match I,
2595 then C+1 might also need to match I. */
2596 if (commutative
>= 0)
2598 if (c
== commutative
|| c
== commutative
+ 1)
2600 int other
= c
+ (c
== commutative
? 1 : -1);
2601 operands_match
[other
][i
]
2602 = operands_match_p (recog_data
.operand
[other
],
2603 recog_data
.operand
[i
]);
2605 if (i
== commutative
|| i
== commutative
+ 1)
2607 int other
= i
+ (i
== commutative
? 1 : -1);
2608 operands_match
[c
][other
]
2609 = operands_match_p (recog_data
.operand
[c
],
2610 recog_data
.operand
[other
]);
2612 /* Note that C is supposed to be less than I.
2613 No need to consider altering both C and I because in
2614 that case we would alter one into the other. */
2620 /* Examine each operand that is a memory reference or memory address
2621 and reload parts of the addresses into index registers.
2622 Also here any references to pseudo regs that didn't get hard regs
2623 but are equivalent to constants get replaced in the insn itself
2624 with those constants. Nobody will ever see them again.
2626 Finally, set up the preferred classes of each operand. */
2628 for (i
= 0; i
< noperands
; i
++)
2630 RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2632 address_reloaded
[i
] = 0;
2633 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2634 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2637 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2638 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2641 if (*constraints
[i
] == 0)
2642 /* Ignore things like match_operator operands. */
2644 else if (constraints
[i
][0] == 'p'
2645 || EXTRA_ADDRESS_CONSTRAINT (constraints
[i
][0]))
2647 find_reloads_address (VOIDmode
, (rtx
*) 0,
2648 recog_data
.operand
[i
],
2649 recog_data
.operand_loc
[i
],
2650 i
, operand_type
[i
], ind_levels
, insn
);
2652 /* If we now have a simple operand where we used to have a
2653 PLUS or MULT, re-recognize and try again. */
2654 if ((GET_RTX_CLASS (GET_CODE (*recog_data
.operand_loc
[i
])) == 'o'
2655 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2656 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2657 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2659 INSN_CODE (insn
) = -1;
2660 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2665 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2666 substed_operand
[i
] = recog_data
.operand
[i
];
2668 else if (code
== MEM
)
2671 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2672 recog_data
.operand_loc
[i
],
2673 XEXP (recog_data
.operand
[i
], 0),
2674 &XEXP (recog_data
.operand
[i
], 0),
2675 i
, address_type
[i
], ind_levels
, insn
);
2676 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2677 substed_operand
[i
] = recog_data
.operand
[i
];
2679 else if (code
== SUBREG
)
2681 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2683 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2686 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2688 &address_reloaded
[i
]);
2690 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2691 that didn't get a hard register, emit a USE with a REG_EQUAL
2692 note in front so that we might inherit a previous, possibly
2696 && GET_CODE (op
) == MEM
2697 && GET_CODE (reg
) == REG
2698 && (GET_MODE_SIZE (GET_MODE (reg
))
2699 >= GET_MODE_SIZE (GET_MODE (op
))))
2700 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
),
2702 REG_EQUAL
, reg_equiv_memory_loc
[REGNO (reg
)]);
2704 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2706 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2707 /* We can get a PLUS as an "operand" as a result of register
2708 elimination. See eliminate_regs and gen_reload. We handle
2709 a unary operator by reloading the operand. */
2710 substed_operand
[i
] = recog_data
.operand
[i
]
2711 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2712 ind_levels
, 0, insn
,
2713 &address_reloaded
[i
]);
2714 else if (code
== REG
)
2716 /* This is equivalent to calling find_reloads_toplev.
2717 The code is duplicated for speed.
2718 When we find a pseudo always equivalent to a constant,
2719 we replace it by the constant. We must be sure, however,
2720 that we don't try to replace it in the insn in which it
2722 int regno
= REGNO (recog_data
.operand
[i
]);
2723 if (reg_equiv_constant
[regno
] != 0
2724 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2726 /* Record the existing mode so that the check if constants are
2727 allowed will work when operand_mode isn't specified. */
2729 if (operand_mode
[i
] == VOIDmode
)
2730 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2732 substed_operand
[i
] = recog_data
.operand
[i
]
2733 = reg_equiv_constant
[regno
];
2735 if (reg_equiv_memory_loc
[regno
] != 0
2736 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2737 /* We need not give a valid is_set_dest argument since the case
2738 of a constant equivalence was checked above. */
2739 substed_operand
[i
] = recog_data
.operand
[i
]
2740 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2741 ind_levels
, 0, insn
,
2742 &address_reloaded
[i
]);
2744 /* If the operand is still a register (we didn't replace it with an
2745 equivalent), get the preferred class to reload it into. */
2746 code
= GET_CODE (recog_data
.operand
[i
]);
2748 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2749 >= FIRST_PSEUDO_REGISTER
)
2750 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2754 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2755 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2758 /* If this is simply a copy from operand 1 to operand 0, merge the
2759 preferred classes for the operands. */
2760 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2761 && recog_data
.operand
[1] == SET_SRC (set
))
2763 preferred_class
[0] = preferred_class
[1]
2764 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2765 pref_or_nothing
[0] |= pref_or_nothing
[1];
2766 pref_or_nothing
[1] |= pref_or_nothing
[0];
2769 /* Now see what we need for pseudo-regs that didn't get hard regs
2770 or got the wrong kind of hard reg. For this, we must consider
2771 all the operands together against the register constraints. */
2773 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2776 goal_alternative_swapped
= 0;
2779 /* The constraints are made of several alternatives.
2780 Each operand's constraint looks like foo,bar,... with commas
2781 separating the alternatives. The first alternatives for all
2782 operands go together, the second alternatives go together, etc.
2784 First loop over alternatives. */
2786 for (this_alternative_number
= 0;
2787 this_alternative_number
< n_alternatives
;
2788 this_alternative_number
++)
2790 /* Loop over operands for one constraint alternative. */
2791 /* LOSERS counts those that don't fit this alternative
2792 and would require loading. */
2794 /* BAD is set to 1 if it some operand can't fit this alternative
2795 even after reloading. */
2797 /* REJECT is a count of how undesirable this alternative says it is
2798 if any reloading is required. If the alternative matches exactly
2799 then REJECT is ignored, but otherwise it gets this much
2800 counted against it in addition to the reloading needed. Each
2801 ? counts three times here since we want the disparaging caused by
2802 a bad register class to only count 1/3 as much. */
2805 this_earlyclobber
= 0;
2807 for (i
= 0; i
< noperands
; i
++)
2809 char *p
= constraints
[i
];
2812 /* 0 => this operand can be reloaded somehow for this alternative. */
2814 /* 0 => this operand can be reloaded if the alternative allows regs. */
2817 rtx operand
= recog_data
.operand
[i
];
2819 /* Nonzero means this is a MEM that must be reloaded into a reg
2820 regardless of what the constraint says. */
2821 int force_reload
= 0;
2823 /* Nonzero if a constant forced into memory would be OK for this
2826 int earlyclobber
= 0;
2828 /* If the predicate accepts a unary operator, it means that
2829 we need to reload the operand, but do not do this for
2830 match_operator and friends. */
2831 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1' && *p
!= 0)
2832 operand
= XEXP (operand
, 0);
2834 /* If the operand is a SUBREG, extract
2835 the REG or MEM (or maybe even a constant) within.
2836 (Constants can occur as a result of reg_equiv_constant.) */
2838 while (GET_CODE (operand
) == SUBREG
)
2840 /* Offset only matters when operand is a REG and
2841 it is a hard reg. This is because it is passed
2842 to reg_fits_class_p if it is a REG and all pseudos
2843 return 0 from that function. */
2844 if (GET_CODE (SUBREG_REG (operand
)) == REG
2845 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
2847 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
2848 GET_MODE (SUBREG_REG (operand
)),
2849 SUBREG_BYTE (operand
),
2850 GET_MODE (operand
));
2852 operand
= SUBREG_REG (operand
);
2853 /* Force reload if this is a constant or PLUS or if there may
2854 be a problem accessing OPERAND in the outer mode. */
2855 if (CONSTANT_P (operand
)
2856 || GET_CODE (operand
) == PLUS
2857 /* We must force a reload of paradoxical SUBREGs
2858 of a MEM because the alignment of the inner value
2859 may not be enough to do the outer reference. On
2860 big-endian machines, it may also reference outside
2863 On machines that extend byte operations and we have a
2864 SUBREG where both the inner and outer modes are no wider
2865 than a word and the inner mode is narrower, is integral,
2866 and gets extended when loaded from memory, combine.c has
2867 made assumptions about the behavior of the machine in such
2868 register access. If the data is, in fact, in memory we
2869 must always load using the size assumed to be in the
2870 register and let the insn do the different-sized
2873 This is doubly true if WORD_REGISTER_OPERATIONS. In
2874 this case eliminate_regs has left non-paradoxical
2875 subregs for push_reloads to see. Make sure it does
2876 by forcing the reload.
2878 ??? When is it right at this stage to have a subreg
2879 of a mem that is _not_ to be handled specialy? IMO
2880 those should have been reduced to just a mem. */
2881 || ((GET_CODE (operand
) == MEM
2882 || (GET_CODE (operand
)== REG
2883 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2884 #ifndef WORD_REGISTER_OPERATIONS
2885 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2886 < BIGGEST_ALIGNMENT
)
2887 && (GET_MODE_SIZE (operand_mode
[i
])
2888 > GET_MODE_SIZE (GET_MODE (operand
))))
2889 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2890 #ifdef LOAD_EXTEND_OP
2891 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2892 && (GET_MODE_SIZE (GET_MODE (operand
))
2894 && (GET_MODE_SIZE (operand_mode
[i
])
2895 > GET_MODE_SIZE (GET_MODE (operand
)))
2896 && INTEGRAL_MODE_P (GET_MODE (operand
))
2897 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2902 /* This following hunk of code should no longer be
2903 needed at all with SUBREG_BYTE. If you need this
2904 code back, please explain to me why so I can
2905 fix the real problem. -DaveM */
2907 /* Subreg of a hard reg which can't handle the subreg's mode
2908 or which would handle that mode in the wrong number of
2909 registers for subregging to work. */
2910 || (GET_CODE (operand
) == REG
2911 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2912 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2913 && (GET_MODE_SIZE (GET_MODE (operand
))
2915 && ((GET_MODE_SIZE (GET_MODE (operand
))
2917 != HARD_REGNO_NREGS (REGNO (operand
),
2918 GET_MODE (operand
))))
2919 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2926 this_alternative
[i
] = (int) NO_REGS
;
2927 this_alternative_win
[i
] = 0;
2928 this_alternative_match_win
[i
] = 0;
2929 this_alternative_offmemok
[i
] = 0;
2930 this_alternative_earlyclobber
[i
] = 0;
2931 this_alternative_matches
[i
] = -1;
2933 /* An empty constraint or empty alternative
2934 allows anything which matched the pattern. */
2935 if (*p
== 0 || *p
== ',')
2938 /* Scan this alternative's specs for this operand;
2939 set WIN if the operand fits any letter in this alternative.
2940 Otherwise, clear BADOP if this operand could
2941 fit some letter after reloads,
2942 or set WINREG if this operand could fit after reloads
2943 provided the constraint allows some registers. */
2945 while (*p
&& (c
= *p
++) != ',')
2948 case '=': case '+': case '*':
2952 /* The last operand should not be marked commutative. */
2953 if (i
!= noperands
- 1)
2966 /* Ignore rest of this alternative as far as
2967 reloading is concerned. */
2968 while (*p
&& *p
!= ',')
2972 case '0': case '1': case '2': case '3': case '4':
2973 case '5': case '6': case '7': case '8': case '9':
2974 c
= strtoul (p
- 1, &p
, 10);
2976 this_alternative_matches
[i
] = c
;
2977 /* We are supposed to match a previous operand.
2978 If we do, we win if that one did.
2979 If we do not, count both of the operands as losers.
2980 (This is too conservative, since most of the time
2981 only a single reload insn will be needed to make
2982 the two operands win. As a result, this alternative
2983 may be rejected when it is actually desirable.) */
2984 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2985 /* If we are matching as if two operands were swapped,
2986 also pretend that operands_match had been computed
2988 But if I is the second of those and C is the first,
2989 don't exchange them, because operands_match is valid
2990 only on one side of its diagonal. */
2992 [(c
== commutative
|| c
== commutative
+ 1)
2993 ? 2 * commutative
+ 1 - c
: c
]
2994 [(i
== commutative
|| i
== commutative
+ 1)
2995 ? 2 * commutative
+ 1 - i
: i
])
2996 : operands_match
[c
][i
])
2998 /* If we are matching a non-offsettable address where an
2999 offsettable address was expected, then we must reject
3000 this combination, because we can't reload it. */
3001 if (this_alternative_offmemok
[c
]
3002 && GET_CODE (recog_data
.operand
[c
]) == MEM
3003 && this_alternative
[c
] == (int) NO_REGS
3004 && ! this_alternative_win
[c
])
3007 did_match
= this_alternative_win
[c
];
3011 /* Operands don't match. */
3013 /* Retroactively mark the operand we had to match
3014 as a loser, if it wasn't already. */
3015 if (this_alternative_win
[c
])
3017 this_alternative_win
[c
] = 0;
3018 if (this_alternative
[c
] == (int) NO_REGS
)
3020 /* But count the pair only once in the total badness of
3021 this alternative, if the pair can be a dummy reload. */
3023 = find_dummy_reload (recog_data
.operand
[i
],
3024 recog_data
.operand
[c
],
3025 recog_data
.operand_loc
[i
],
3026 recog_data
.operand_loc
[c
],
3027 operand_mode
[i
], operand_mode
[c
],
3028 this_alternative
[c
], -1,
3029 this_alternative_earlyclobber
[c
]);
3034 /* This can be fixed with reloads if the operand
3035 we are supposed to match can be fixed with reloads. */
3037 this_alternative
[i
] = this_alternative
[c
];
3039 /* If we have to reload this operand and some previous
3040 operand also had to match the same thing as this
3041 operand, we don't know how to do that. So reject this
3043 if (! did_match
|| force_reload
)
3044 for (j
= 0; j
< i
; j
++)
3045 if (this_alternative_matches
[j
]
3046 == this_alternative_matches
[i
])
3051 /* All necessary reloads for an address_operand
3052 were handled in find_reloads_address. */
3053 this_alternative
[i
] = (int) MODE_BASE_REG_CLASS (VOIDmode
);
3061 if (GET_CODE (operand
) == MEM
3062 || (GET_CODE (operand
) == REG
3063 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3064 && reg_renumber
[REGNO (operand
)] < 0))
3066 if (CONSTANT_P (operand
)
3067 /* force_const_mem does not accept HIGH. */
3068 && GET_CODE (operand
) != HIGH
)
3074 if (GET_CODE (operand
) == MEM
3075 && ! address_reloaded
[i
]
3076 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3077 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3082 if (GET_CODE (operand
) == MEM
3083 && ! address_reloaded
[i
]
3084 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3085 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3089 /* Memory operand whose address is not offsettable. */
3093 if (GET_CODE (operand
) == MEM
3094 && ! (ind_levels
? offsettable_memref_p (operand
)
3095 : offsettable_nonstrict_memref_p (operand
))
3096 /* Certain mem addresses will become offsettable
3097 after they themselves are reloaded. This is important;
3098 we don't want our own handling of unoffsettables
3099 to override the handling of reg_equiv_address. */
3100 && !(GET_CODE (XEXP (operand
, 0)) == REG
3102 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3106 /* Memory operand whose address is offsettable. */
3110 if ((GET_CODE (operand
) == MEM
3111 /* If IND_LEVELS, find_reloads_address won't reload a
3112 pseudo that didn't get a hard reg, so we have to
3113 reject that case. */
3114 && ((ind_levels
? offsettable_memref_p (operand
)
3115 : offsettable_nonstrict_memref_p (operand
))
3116 /* A reloaded address is offsettable because it is now
3117 just a simple register indirect. */
3118 || address_reloaded
[i
]))
3119 || (GET_CODE (operand
) == REG
3120 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3121 && reg_renumber
[REGNO (operand
)] < 0
3122 /* If reg_equiv_address is nonzero, we will be
3123 loading it into a register; hence it will be
3124 offsettable, but we cannot say that reg_equiv_mem
3125 is offsettable without checking. */
3126 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3127 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3128 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3130 /* force_const_mem does not accept HIGH. */
3131 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3132 || GET_CODE (operand
) == MEM
)
3139 /* Output operand that is stored before the need for the
3140 input operands (and their index registers) is over. */
3141 earlyclobber
= 1, this_earlyclobber
= 1;
3146 if (GET_CODE (operand
) == CONST_DOUBLE
3147 || (GET_CODE (operand
) == CONST_VECTOR
3148 && (GET_MODE_CLASS (GET_MODE (operand
))
3149 == MODE_VECTOR_FLOAT
)))
3155 if (GET_CODE (operand
) == CONST_DOUBLE
3156 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
3161 if (GET_CODE (operand
) == CONST_INT
3162 || (GET_CODE (operand
) == CONST_DOUBLE
3163 && GET_MODE (operand
) == VOIDmode
))
3166 if (CONSTANT_P (operand
)
3167 #ifdef LEGITIMATE_PIC_OPERAND_P
3168 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3175 if (GET_CODE (operand
) == CONST_INT
3176 || (GET_CODE (operand
) == CONST_DOUBLE
3177 && GET_MODE (operand
) == VOIDmode
))
3189 if (GET_CODE (operand
) == CONST_INT
3190 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
3200 /* A PLUS is never a valid operand, but reload can make
3201 it from a register when eliminating registers. */
3202 && GET_CODE (operand
) != PLUS
3203 /* A SCRATCH is not a valid operand. */
3204 && GET_CODE (operand
) != SCRATCH
3205 #ifdef LEGITIMATE_PIC_OPERAND_P
3206 && (! CONSTANT_P (operand
)
3208 || LEGITIMATE_PIC_OPERAND_P (operand
))
3210 && (GENERAL_REGS
== ALL_REGS
3211 || GET_CODE (operand
) != REG
3212 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3213 && reg_renumber
[REGNO (operand
)] < 0)))
3215 /* Drop through into 'r' case. */
3219 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3223 if (REG_CLASS_FROM_LETTER (c
) == NO_REGS
)
3225 #ifdef EXTRA_CONSTRAINT
3226 if (EXTRA_MEMORY_CONSTRAINT (c
))
3230 if (EXTRA_CONSTRAINT (operand
, c
))
3232 /* If the address was already reloaded,
3234 if (GET_CODE (operand
) == MEM
&& address_reloaded
[i
])
3236 /* Likewise if the address will be reloaded because
3237 reg_equiv_address is nonzero. For reg_equiv_mem
3238 we have to check. */
3239 if (GET_CODE (operand
) == REG
3240 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3241 && reg_renumber
[REGNO (operand
)] < 0
3242 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3243 && EXTRA_CONSTRAINT (reg_equiv_mem
[REGNO (operand
)], c
))
3244 || (reg_equiv_address
[REGNO (operand
)] != 0)))
3247 /* If we didn't already win, we can reload
3248 constants via force_const_mem, and other
3249 MEMs by reloading the address like for 'o'. */
3250 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3251 || GET_CODE (operand
) == MEM
)
3257 if (EXTRA_ADDRESS_CONSTRAINT (c
))
3259 if (EXTRA_CONSTRAINT (operand
, c
))
3262 /* If we didn't already win, we can reload
3263 the address into a base register. */
3264 this_alternative
[i
] = (int) MODE_BASE_REG_CLASS (VOIDmode
);
3269 if (EXTRA_CONSTRAINT (operand
, c
))
3276 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
3278 if (GET_MODE (operand
) == BLKmode
)
3281 if (GET_CODE (operand
) == REG
3282 && reg_fits_class_p (operand
, this_alternative
[i
],
3283 offset
, GET_MODE (recog_data
.operand
[i
])))
3290 /* If this operand could be handled with a reg,
3291 and some reg is allowed, then this operand can be handled. */
3292 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3295 /* Record which operands fit this alternative. */
3296 this_alternative_earlyclobber
[i
] = earlyclobber
;
3297 if (win
&& ! force_reload
)
3298 this_alternative_win
[i
] = 1;
3299 else if (did_match
&& ! force_reload
)
3300 this_alternative_match_win
[i
] = 1;
3303 int const_to_mem
= 0;
3305 this_alternative_offmemok
[i
] = offmemok
;
3309 /* Alternative loses if it has no regs for a reg operand. */
3310 if (GET_CODE (operand
) == REG
3311 && this_alternative
[i
] == (int) NO_REGS
3312 && this_alternative_matches
[i
] < 0)
3315 /* If this is a constant that is reloaded into the desired
3316 class by copying it to memory first, count that as another
3317 reload. This is consistent with other code and is
3318 required to avoid choosing another alternative when
3319 the constant is moved into memory by this function on
3320 an early reload pass. Note that the test here is
3321 precisely the same as in the code below that calls
3323 if (CONSTANT_P (operand
)
3324 /* force_const_mem does not accept HIGH. */
3325 && GET_CODE (operand
) != HIGH
3326 && ((PREFERRED_RELOAD_CLASS (operand
,
3327 (enum reg_class
) this_alternative
[i
])
3329 || no_input_reloads
)
3330 && operand_mode
[i
] != VOIDmode
)
3333 if (this_alternative
[i
] != (int) NO_REGS
)
3337 /* If we can't reload this value at all, reject this
3338 alternative. Note that we could also lose due to
3339 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3342 if (! CONSTANT_P (operand
)
3343 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3344 && (PREFERRED_RELOAD_CLASS (operand
,
3345 (enum reg_class
) this_alternative
[i
])
3349 /* Alternative loses if it requires a type of reload not
3350 permitted for this insn. We can always reload SCRATCH
3351 and objects with a REG_UNUSED note. */
3352 else if (GET_CODE (operand
) != SCRATCH
3353 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3354 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3356 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3360 /* We prefer to reload pseudos over reloading other things,
3361 since such reloads may be able to be eliminated later.
3362 If we are reloading a SCRATCH, we won't be generating any
3363 insns, just using a register, so it is also preferred.
3364 So bump REJECT in other cases. Don't do this in the
3365 case where we are forcing a constant into memory and
3366 it will then win since we don't want to have a different
3367 alternative match then. */
3368 if (! (GET_CODE (operand
) == REG
3369 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3370 && GET_CODE (operand
) != SCRATCH
3371 && ! (const_to_mem
&& constmemok
))
3374 /* Input reloads can be inherited more often than output
3375 reloads can be removed, so penalize output reloads. */
3376 if (operand_type
[i
] != RELOAD_FOR_INPUT
3377 && GET_CODE (operand
) != SCRATCH
)
3381 /* If this operand is a pseudo register that didn't get a hard
3382 reg and this alternative accepts some register, see if the
3383 class that we want is a subset of the preferred class for this
3384 register. If not, but it intersects that class, use the
3385 preferred class instead. If it does not intersect the preferred
3386 class, show that usage of this alternative should be discouraged;
3387 it will be discouraged more still if the register is `preferred
3388 or nothing'. We do this because it increases the chance of
3389 reusing our spill register in a later insn and avoiding a pair
3390 of memory stores and loads.
3392 Don't bother with this if this alternative will accept this
3395 Don't do this for a multiword operand, since it is only a
3396 small win and has the risk of requiring more spill registers,
3397 which could cause a large loss.
3399 Don't do this if the preferred class has only one register
3400 because we might otherwise exhaust the class. */
3402 if (! win
&& ! did_match
3403 && this_alternative
[i
] != (int) NO_REGS
3404 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3405 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3407 if (! reg_class_subset_p (this_alternative
[i
],
3408 preferred_class
[i
]))
3410 /* Since we don't have a way of forming the intersection,
3411 we just do something special if the preferred class
3412 is a subset of the class we have; that's the most
3413 common case anyway. */
3414 if (reg_class_subset_p (preferred_class
[i
],
3415 this_alternative
[i
]))
3416 this_alternative
[i
] = (int) preferred_class
[i
];
3418 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3423 /* Now see if any output operands that are marked "earlyclobber"
3424 in this alternative conflict with any input operands
3425 or any memory addresses. */
3427 for (i
= 0; i
< noperands
; i
++)
3428 if (this_alternative_earlyclobber
[i
]
3429 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3431 struct decomposition early_data
;
3433 early_data
= decompose (recog_data
.operand
[i
]);
3435 if (modified
[i
] == RELOAD_READ
)
3438 if (this_alternative
[i
] == NO_REGS
)
3440 this_alternative_earlyclobber
[i
] = 0;
3441 if (this_insn_is_asm
)
3442 error_for_asm (this_insn
,
3443 "`&' constraint used with no register class");
3448 for (j
= 0; j
< noperands
; j
++)
3449 /* Is this an input operand or a memory ref? */
3450 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3451 || modified
[j
] != RELOAD_WRITE
)
3453 /* Ignore things like match_operator operands. */
3454 && *recog_data
.constraints
[j
] != 0
3455 /* Don't count an input operand that is constrained to match
3456 the early clobber operand. */
3457 && ! (this_alternative_matches
[j
] == i
3458 && rtx_equal_p (recog_data
.operand
[i
],
3459 recog_data
.operand
[j
]))
3460 /* Is it altered by storing the earlyclobber operand? */
3461 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3464 /* If the output is in a single-reg class,
3465 it's costly to reload it, so reload the input instead. */
3466 if (reg_class_size
[this_alternative
[i
]] == 1
3467 && (GET_CODE (recog_data
.operand
[j
]) == REG
3468 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3471 this_alternative_win
[j
] = 0;
3472 this_alternative_match_win
[j
] = 0;
3477 /* If an earlyclobber operand conflicts with something,
3478 it must be reloaded, so request this and count the cost. */
3482 this_alternative_win
[i
] = 0;
3483 this_alternative_match_win
[j
] = 0;
3484 for (j
= 0; j
< noperands
; j
++)
3485 if (this_alternative_matches
[j
] == i
3486 && this_alternative_match_win
[j
])
3488 this_alternative_win
[j
] = 0;
3489 this_alternative_match_win
[j
] = 0;
3495 /* If one alternative accepts all the operands, no reload required,
3496 choose that alternative; don't consider the remaining ones. */
3499 /* Unswap these so that they are never swapped at `finish'. */
3500 if (commutative
>= 0)
3502 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3503 recog_data
.operand
[commutative
+ 1]
3504 = substed_operand
[commutative
+ 1];
3506 for (i
= 0; i
< noperands
; i
++)
3508 goal_alternative_win
[i
] = this_alternative_win
[i
];
3509 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3510 goal_alternative
[i
] = this_alternative
[i
];
3511 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3512 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3513 goal_alternative_earlyclobber
[i
]
3514 = this_alternative_earlyclobber
[i
];
3516 goal_alternative_number
= this_alternative_number
;
3517 goal_alternative_swapped
= swapped
;
3518 goal_earlyclobber
= this_earlyclobber
;
3522 /* REJECT, set by the ! and ? constraint characters and when a register
3523 would be reloaded into a non-preferred class, discourages the use of
3524 this alternative for a reload goal. REJECT is incremented by six
3525 for each ? and two for each non-preferred class. */
3526 losers
= losers
* 6 + reject
;
3528 /* If this alternative can be made to work by reloading,
3529 and it needs less reloading than the others checked so far,
3530 record it as the chosen goal for reloading. */
3531 if (! bad
&& best
> losers
)
3533 for (i
= 0; i
< noperands
; i
++)
3535 goal_alternative
[i
] = this_alternative
[i
];
3536 goal_alternative_win
[i
] = this_alternative_win
[i
];
3537 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3538 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3539 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3540 goal_alternative_earlyclobber
[i
]
3541 = this_alternative_earlyclobber
[i
];
3543 goal_alternative_swapped
= swapped
;
3545 goal_alternative_number
= this_alternative_number
;
3546 goal_earlyclobber
= this_earlyclobber
;
3550 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3551 then we need to try each alternative twice,
3552 the second time matching those two operands
3553 as if we had exchanged them.
3554 To do this, really exchange them in operands.
3556 If we have just tried the alternatives the second time,
3557 return operands to normal and drop through. */
3559 if (commutative
>= 0)
3564 enum reg_class tclass
;
3567 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3568 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3569 /* Swap the duplicates too. */
3570 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3571 if (recog_data
.dup_num
[i
] == commutative
3572 || recog_data
.dup_num
[i
] == commutative
+ 1)
3573 *recog_data
.dup_loc
[i
]
3574 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3576 tclass
= preferred_class
[commutative
];
3577 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3578 preferred_class
[commutative
+ 1] = tclass
;
3580 t
= pref_or_nothing
[commutative
];
3581 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3582 pref_or_nothing
[commutative
+ 1] = t
;
3584 memcpy (constraints
, recog_data
.constraints
,
3585 noperands
* sizeof (char *));
3590 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3591 recog_data
.operand
[commutative
+ 1]
3592 = substed_operand
[commutative
+ 1];
3593 /* Unswap the duplicates too. */
3594 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3595 if (recog_data
.dup_num
[i
] == commutative
3596 || recog_data
.dup_num
[i
] == commutative
+ 1)
3597 *recog_data
.dup_loc
[i
]
3598 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3602 /* The operands don't meet the constraints.
3603 goal_alternative describes the alternative
3604 that we could reach by reloading the fewest operands.
3605 Reload so as to fit it. */
3607 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3609 /* No alternative works with reloads?? */
3610 if (insn_code_number
>= 0)
3611 fatal_insn ("unable to generate reloads for:", insn
);
3612 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3613 /* Avoid further trouble with this insn. */
3614 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3619 /* Jump to `finish' from above if all operands are valid already.
3620 In that case, goal_alternative_win is all 1. */
3623 /* Right now, for any pair of operands I and J that are required to match,
3625 goal_alternative_matches[J] is I.
3626 Set up goal_alternative_matched as the inverse function:
3627 goal_alternative_matched[I] = J. */
3629 for (i
= 0; i
< noperands
; i
++)
3630 goal_alternative_matched
[i
] = -1;
3632 for (i
= 0; i
< noperands
; i
++)
3633 if (! goal_alternative_win
[i
]
3634 && goal_alternative_matches
[i
] >= 0)
3635 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3637 for (i
= 0; i
< noperands
; i
++)
3638 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3640 /* If the best alternative is with operands 1 and 2 swapped,
3641 consider them swapped before reporting the reloads. Update the
3642 operand numbers of any reloads already pushed. */
3644 if (goal_alternative_swapped
)
3648 tem
= substed_operand
[commutative
];
3649 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3650 substed_operand
[commutative
+ 1] = tem
;
3651 tem
= recog_data
.operand
[commutative
];
3652 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3653 recog_data
.operand
[commutative
+ 1] = tem
;
3654 tem
= *recog_data
.operand_loc
[commutative
];
3655 *recog_data
.operand_loc
[commutative
]
3656 = *recog_data
.operand_loc
[commutative
+ 1];
3657 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3659 for (i
= 0; i
< n_reloads
; i
++)
3661 if (rld
[i
].opnum
== commutative
)
3662 rld
[i
].opnum
= commutative
+ 1;
3663 else if (rld
[i
].opnum
== commutative
+ 1)
3664 rld
[i
].opnum
= commutative
;
3668 for (i
= 0; i
< noperands
; i
++)
3670 operand_reloadnum
[i
] = -1;
3672 /* If this is an earlyclobber operand, we need to widen the scope.
3673 The reload must remain valid from the start of the insn being
3674 reloaded until after the operand is stored into its destination.
3675 We approximate this with RELOAD_OTHER even though we know that we
3676 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3678 One special case that is worth checking is when we have an
3679 output that is earlyclobber but isn't used past the insn (typically
3680 a SCRATCH). In this case, we only need have the reload live
3681 through the insn itself, but not for any of our input or output
3683 But we must not accidentally narrow the scope of an existing
3684 RELOAD_OTHER reload - leave these alone.
3686 In any case, anything needed to address this operand can remain
3687 however they were previously categorized. */
3689 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3691 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3692 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3695 /* Any constants that aren't allowed and can't be reloaded
3696 into registers are here changed into memory references. */
3697 for (i
= 0; i
< noperands
; i
++)
3698 if (! goal_alternative_win
[i
]
3699 && CONSTANT_P (recog_data
.operand
[i
])
3700 /* force_const_mem does not accept HIGH. */
3701 && GET_CODE (recog_data
.operand
[i
]) != HIGH
3702 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3703 (enum reg_class
) goal_alternative
[i
])
3705 || no_input_reloads
)
3706 && operand_mode
[i
] != VOIDmode
)
3708 substed_operand
[i
] = recog_data
.operand
[i
]
3709 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3710 recog_data
.operand
[i
]),
3711 i
, address_type
[i
], ind_levels
, 0, insn
,
3713 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3714 goal_alternative_number
))
3715 goal_alternative_win
[i
] = 1;
3718 /* Record the values of the earlyclobber operands for the caller. */
3719 if (goal_earlyclobber
)
3720 for (i
= 0; i
< noperands
; i
++)
3721 if (goal_alternative_earlyclobber
[i
])
3722 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3724 /* Now record reloads for all the operands that need them. */
3725 for (i
= 0; i
< noperands
; i
++)
3726 if (! goal_alternative_win
[i
])
3728 /* Operands that match previous ones have already been handled. */
3729 if (goal_alternative_matches
[i
] >= 0)
3731 /* Handle an operand with a nonoffsettable address
3732 appearing where an offsettable address will do
3733 by reloading the address into a base register.
3735 ??? We can also do this when the operand is a register and
3736 reg_equiv_mem is not offsettable, but this is a bit tricky,
3737 so we don't bother with it. It may not be worth doing. */
3738 else if (goal_alternative_matched
[i
] == -1
3739 && goal_alternative_offmemok
[i
]
3740 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3742 operand_reloadnum
[i
]
3743 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3744 &XEXP (recog_data
.operand
[i
], 0), (rtx
*) 0,
3745 MODE_BASE_REG_CLASS (VOIDmode
),
3746 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3747 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3748 rld
[operand_reloadnum
[i
]].inc
3749 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3751 /* If this operand is an output, we will have made any
3752 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3753 now we are treating part of the operand as an input, so
3754 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3756 if (modified
[i
] == RELOAD_WRITE
)
3758 for (j
= 0; j
< n_reloads
; j
++)
3760 if (rld
[j
].opnum
== i
)
3762 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3763 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3764 else if (rld
[j
].when_needed
3765 == RELOAD_FOR_OUTADDR_ADDRESS
)
3766 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3771 else if (goal_alternative_matched
[i
] == -1)
3773 operand_reloadnum
[i
]
3774 = push_reload ((modified
[i
] != RELOAD_WRITE
3775 ? recog_data
.operand
[i
] : 0),
3776 (modified
[i
] != RELOAD_READ
3777 ? recog_data
.operand
[i
] : 0),
3778 (modified
[i
] != RELOAD_WRITE
3779 ? recog_data
.operand_loc
[i
] : 0),
3780 (modified
[i
] != RELOAD_READ
3781 ? recog_data
.operand_loc
[i
] : 0),
3782 (enum reg_class
) goal_alternative
[i
],
3783 (modified
[i
] == RELOAD_WRITE
3784 ? VOIDmode
: operand_mode
[i
]),
3785 (modified
[i
] == RELOAD_READ
3786 ? VOIDmode
: operand_mode
[i
]),
3787 (insn_code_number
< 0 ? 0
3788 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3789 0, i
, operand_type
[i
]);
3791 /* In a matching pair of operands, one must be input only
3792 and the other must be output only.
3793 Pass the input operand as IN and the other as OUT. */
3794 else if (modified
[i
] == RELOAD_READ
3795 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3797 operand_reloadnum
[i
]
3798 = push_reload (recog_data
.operand
[i
],
3799 recog_data
.operand
[goal_alternative_matched
[i
]],
3800 recog_data
.operand_loc
[i
],
3801 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3802 (enum reg_class
) goal_alternative
[i
],
3804 operand_mode
[goal_alternative_matched
[i
]],
3805 0, 0, i
, RELOAD_OTHER
);
3806 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3808 else if (modified
[i
] == RELOAD_WRITE
3809 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3811 operand_reloadnum
[goal_alternative_matched
[i
]]
3812 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3813 recog_data
.operand
[i
],
3814 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3815 recog_data
.operand_loc
[i
],
3816 (enum reg_class
) goal_alternative
[i
],
3817 operand_mode
[goal_alternative_matched
[i
]],
3819 0, 0, i
, RELOAD_OTHER
);
3820 operand_reloadnum
[i
] = output_reloadnum
;
3822 else if (insn_code_number
>= 0)
3826 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3827 /* Avoid further trouble with this insn. */
3828 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3833 else if (goal_alternative_matched
[i
] < 0
3834 && goal_alternative_matches
[i
] < 0
3837 /* For each non-matching operand that's a MEM or a pseudo-register
3838 that didn't get a hard register, make an optional reload.
3839 This may get done even if the insn needs no reloads otherwise. */
3841 rtx operand
= recog_data
.operand
[i
];
3843 while (GET_CODE (operand
) == SUBREG
)
3844 operand
= SUBREG_REG (operand
);
3845 if ((GET_CODE (operand
) == MEM
3846 || (GET_CODE (operand
) == REG
3847 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3848 /* If this is only for an output, the optional reload would not
3849 actually cause us to use a register now, just note that
3850 something is stored here. */
3851 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3852 || modified
[i
] == RELOAD_WRITE
)
3853 && ! no_input_reloads
3854 /* An optional output reload might allow to delete INSN later.
3855 We mustn't make in-out reloads on insns that are not permitted
3857 If this is an asm, we can't delete it; we must not even call
3858 push_reload for an optional output reload in this case,
3859 because we can't be sure that the constraint allows a register,
3860 and push_reload verifies the constraints for asms. */
3861 && (modified
[i
] == RELOAD_READ
3862 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3863 operand_reloadnum
[i
]
3864 = push_reload ((modified
[i
] != RELOAD_WRITE
3865 ? recog_data
.operand
[i
] : 0),
3866 (modified
[i
] != RELOAD_READ
3867 ? recog_data
.operand
[i
] : 0),
3868 (modified
[i
] != RELOAD_WRITE
3869 ? recog_data
.operand_loc
[i
] : 0),
3870 (modified
[i
] != RELOAD_READ
3871 ? recog_data
.operand_loc
[i
] : 0),
3872 (enum reg_class
) goal_alternative
[i
],
3873 (modified
[i
] == RELOAD_WRITE
3874 ? VOIDmode
: operand_mode
[i
]),
3875 (modified
[i
] == RELOAD_READ
3876 ? VOIDmode
: operand_mode
[i
]),
3877 (insn_code_number
< 0 ? 0
3878 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3879 1, i
, operand_type
[i
]);
3880 /* If a memory reference remains (either as a MEM or a pseudo that
3881 did not get a hard register), yet we can't make an optional
3882 reload, check if this is actually a pseudo register reference;
3883 we then need to emit a USE and/or a CLOBBER so that reload
3884 inheritance will do the right thing. */
3886 && (GET_CODE (operand
) == MEM
3887 || (GET_CODE (operand
) == REG
3888 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3889 && reg_renumber
[REGNO (operand
)] < 0)))
3891 operand
= *recog_data
.operand_loc
[i
];
3893 while (GET_CODE (operand
) == SUBREG
)
3894 operand
= SUBREG_REG (operand
);
3895 if (GET_CODE (operand
) == REG
)
3897 if (modified
[i
] != RELOAD_WRITE
)
3898 /* We mark the USE with QImode so that we recognize
3899 it as one that can be safely deleted at the end
3901 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, operand
),
3903 if (modified
[i
] != RELOAD_READ
)
3904 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3908 else if (goal_alternative_matches
[i
] >= 0
3909 && goal_alternative_win
[goal_alternative_matches
[i
]]
3910 && modified
[i
] == RELOAD_READ
3911 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3912 && ! no_input_reloads
&& ! no_output_reloads
3915 /* Similarly, make an optional reload for a pair of matching
3916 objects that are in MEM or a pseudo that didn't get a hard reg. */
3918 rtx operand
= recog_data
.operand
[i
];
3920 while (GET_CODE (operand
) == SUBREG
)
3921 operand
= SUBREG_REG (operand
);
3922 if ((GET_CODE (operand
) == MEM
3923 || (GET_CODE (operand
) == REG
3924 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3925 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3927 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3928 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
3929 recog_data
.operand
[i
],
3930 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
3931 recog_data
.operand_loc
[i
],
3932 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3933 operand_mode
[goal_alternative_matches
[i
]],
3935 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3938 /* Perform whatever substitutions on the operands we are supposed
3939 to make due to commutativity or replacement of registers
3940 with equivalent constants or memory slots. */
3942 for (i
= 0; i
< noperands
; i
++)
3944 /* We only do this on the last pass through reload, because it is
3945 possible for some data (like reg_equiv_address) to be changed during
3946 later passes. Moreover, we loose the opportunity to get a useful
3947 reload_{in,out}_reg when we do these replacements. */
3951 rtx substitution
= substed_operand
[i
];
3953 *recog_data
.operand_loc
[i
] = substitution
;
3955 /* If we're replacing an operand with a LABEL_REF, we need
3956 to make sure that there's a REG_LABEL note attached to
3957 this instruction. */
3958 if (GET_CODE (insn
) != JUMP_INSN
3959 && GET_CODE (substitution
) == LABEL_REF
3960 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
3961 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
,
3962 XEXP (substitution
, 0),
3966 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
3969 /* If this insn pattern contains any MATCH_DUP's, make sure that
3970 they will be substituted if the operands they match are substituted.
3971 Also do now any substitutions we already did on the operands.
3973 Don't do this if we aren't making replacements because we might be
3974 propagating things allocated by frame pointer elimination into places
3975 it doesn't expect. */
3977 if (insn_code_number
>= 0 && replace
)
3978 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
3980 int opno
= recog_data
.dup_num
[i
];
3981 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
3982 if (operand_reloadnum
[opno
] >= 0)
3983 push_replacement (recog_data
.dup_loc
[i
], operand_reloadnum
[opno
],
3984 insn_data
[insn_code_number
].operand
[opno
].mode
);
3988 /* This loses because reloading of prior insns can invalidate the equivalence
3989 (or at least find_equiv_reg isn't smart enough to find it any more),
3990 causing this insn to need more reload regs than it needed before.
3991 It may be too late to make the reload regs available.
3992 Now this optimization is done safely in choose_reload_regs. */
3994 /* For each reload of a reg into some other class of reg,
3995 search for an existing equivalent reg (same value now) in the right class.
3996 We can use it as long as we don't need to change its contents. */
3997 for (i
= 0; i
< n_reloads
; i
++)
3998 if (rld
[i
].reg_rtx
== 0
4000 && GET_CODE (rld
[i
].in
) == REG
4004 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
4005 static_reload_reg_p
, 0, rld
[i
].inmode
);
4006 /* Prevent generation of insn to load the value
4007 because the one we found already has the value. */
4009 rld
[i
].in
= rld
[i
].reg_rtx
;
4013 /* Perhaps an output reload can be combined with another
4014 to reduce needs by one. */
4015 if (!goal_earlyclobber
)
4018 /* If we have a pair of reloads for parts of an address, they are reloading
4019 the same object, the operands themselves were not reloaded, and they
4020 are for two operands that are supposed to match, merge the reloads and
4021 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4023 for (i
= 0; i
< n_reloads
; i
++)
4027 for (j
= i
+ 1; j
< n_reloads
; j
++)
4028 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4029 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4030 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4031 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4032 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4033 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4034 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4035 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4036 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
4037 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4038 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
4039 && (operand_reloadnum
[rld
[j
].opnum
] < 0
4040 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
4041 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
4042 || (goal_alternative_matches
[rld
[j
].opnum
]
4045 for (k
= 0; k
< n_replacements
; k
++)
4046 if (replacements
[k
].what
== j
)
4047 replacements
[k
].what
= i
;
4049 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4050 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4051 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4053 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4058 /* Scan all the reloads and update their type.
4059 If a reload is for the address of an operand and we didn't reload
4060 that operand, change the type. Similarly, change the operand number
4061 of a reload when two operands match. If a reload is optional, treat it
4062 as though the operand isn't reloaded.
4064 ??? This latter case is somewhat odd because if we do the optional
4065 reload, it means the object is hanging around. Thus we need only
4066 do the address reload if the optional reload was NOT done.
4068 Change secondary reloads to be the address type of their operand, not
4071 If an operand's reload is now RELOAD_OTHER, change any
4072 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4073 RELOAD_FOR_OTHER_ADDRESS. */
4075 for (i
= 0; i
< n_reloads
; i
++)
4077 if (rld
[i
].secondary_p
4078 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
4079 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
4081 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4082 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4083 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4084 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4085 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4086 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
4088 /* If we have a secondary reload to go along with this reload,
4089 change its type to RELOAD_FOR_OPADDR_ADDR. */
4091 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4092 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4093 && rld
[i
].secondary_in_reload
!= -1)
4095 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4097 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4099 /* If there's a tertiary reload we have to change it also. */
4100 if (secondary_in_reload
> 0
4101 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4102 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4103 = RELOAD_FOR_OPADDR_ADDR
;
4106 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4107 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4108 && rld
[i
].secondary_out_reload
!= -1)
4110 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4112 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4114 /* If there's a tertiary reload we have to change it also. */
4115 if (secondary_out_reload
4116 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4117 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4118 = RELOAD_FOR_OPADDR_ADDR
;
4121 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4122 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4123 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4125 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4128 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4129 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4130 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4131 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4133 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4135 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4136 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4139 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4140 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4141 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4143 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4144 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4145 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4146 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4147 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4148 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4149 This is complicated by the fact that a single operand can have more
4150 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4151 choose_reload_regs without affecting code quality, and cases that
4152 actually fail are extremely rare, so it turns out to be better to fix
4153 the problem here by not generating cases that choose_reload_regs will
4155 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4156 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4158 We can reduce the register pressure by exploiting that a
4159 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4160 does not conflict with any of them, if it is only used for the first of
4161 the RELOAD_FOR_X_ADDRESS reloads. */
4163 int first_op_addr_num
= -2;
4164 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4165 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4166 int need_change
= 0;
4167 /* We use last_op_addr_reload and the contents of the above arrays
4168 first as flags - -2 means no instance encountered, -1 means exactly
4169 one instance encountered.
4170 If more than one instance has been encountered, we store the reload
4171 number of the first reload of the kind in question; reload numbers
4172 are known to be non-negative. */
4173 for (i
= 0; i
< noperands
; i
++)
4174 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4175 for (i
= n_reloads
- 1; i
>= 0; i
--)
4177 switch (rld
[i
].when_needed
)
4179 case RELOAD_FOR_OPERAND_ADDRESS
:
4180 if (++first_op_addr_num
>= 0)
4182 first_op_addr_num
= i
;
4186 case RELOAD_FOR_INPUT_ADDRESS
:
4187 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4189 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4193 case RELOAD_FOR_OUTPUT_ADDRESS
:
4194 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4196 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4207 for (i
= 0; i
< n_reloads
; i
++)
4210 enum reload_type type
;
4212 switch (rld
[i
].when_needed
)
4214 case RELOAD_FOR_OPADDR_ADDR
:
4215 first_num
= first_op_addr_num
;
4216 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4218 case RELOAD_FOR_INPADDR_ADDRESS
:
4219 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4220 type
= RELOAD_FOR_INPUT_ADDRESS
;
4222 case RELOAD_FOR_OUTADDR_ADDRESS
:
4223 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4224 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4231 else if (i
> first_num
)
4232 rld
[i
].when_needed
= type
;
4235 /* Check if the only TYPE reload that uses reload I is
4236 reload FIRST_NUM. */
4237 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4239 if (rld
[j
].when_needed
== type
4240 && (rld
[i
].secondary_p
4241 ? rld
[j
].secondary_in_reload
== i
4242 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4244 rld
[i
].when_needed
= type
;
4253 /* See if we have any reloads that are now allowed to be merged
4254 because we've changed when the reload is needed to
4255 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4256 check for the most common cases. */
4258 for (i
= 0; i
< n_reloads
; i
++)
4259 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4260 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4261 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4262 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4263 for (j
= 0; j
< n_reloads
; j
++)
4264 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4265 && rld
[j
].when_needed
== rld
[i
].when_needed
4266 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4267 && rld
[i
].class == rld
[j
].class
4268 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4269 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4271 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4272 transfer_replacements (i
, j
);
4277 /* If we made any reloads for addresses, see if they violate a
4278 "no input reloads" requirement for this insn. But loads that we
4279 do after the insn (such as for output addresses) are fine. */
4280 if (no_input_reloads
)
4281 for (i
= 0; i
< n_reloads
; i
++)
4283 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
4284 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
)
4288 /* Compute reload_mode and reload_nregs. */
4289 for (i
= 0; i
< n_reloads
; i
++)
4292 = (rld
[i
].inmode
== VOIDmode
4293 || (GET_MODE_SIZE (rld
[i
].outmode
)
4294 > GET_MODE_SIZE (rld
[i
].inmode
)))
4295 ? rld
[i
].outmode
: rld
[i
].inmode
;
4297 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4300 /* Special case a simple move with an input reload and a
4301 destination of a hard reg, if the hard reg is ok, use it. */
4302 for (i
= 0; i
< n_reloads
; i
++)
4303 if (rld
[i
].when_needed
== RELOAD_FOR_INPUT
4304 && GET_CODE (PATTERN (insn
)) == SET
4305 && GET_CODE (SET_DEST (PATTERN (insn
))) == REG
4306 && SET_SRC (PATTERN (insn
)) == rld
[i
].in
)
4308 rtx dest
= SET_DEST (PATTERN (insn
));
4309 unsigned int regno
= REGNO (dest
);
4311 if (regno
< FIRST_PSEUDO_REGISTER
4312 && TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].class], regno
)
4313 && HARD_REGNO_MODE_OK (regno
, rld
[i
].mode
))
4314 rld
[i
].reg_rtx
= dest
;
4320 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4321 accepts a memory operand with constant address. */
4324 alternative_allows_memconst (constraint
, altnum
)
4325 const char *constraint
;
4329 /* Skip alternatives before the one requested. */
4332 while (*constraint
++ != ',');
4335 /* Scan the requested alternative for 'm' or 'o'.
4336 If one of them is present, this alternative accepts memory constants. */
4337 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
4338 if (c
== 'm' || c
== 'o' || EXTRA_MEMORY_CONSTRAINT (c
))
4343 /* Scan X for memory references and scan the addresses for reloading.
4344 Also checks for references to "constant" regs that we want to eliminate
4345 and replaces them with the values they stand for.
4346 We may alter X destructively if it contains a reference to such.
4347 If X is just a constant reg, we return the equivalent value
4350 IND_LEVELS says how many levels of indirect addressing this machine
4353 OPNUM and TYPE identify the purpose of the reload.
4355 IS_SET_DEST is true if X is the destination of a SET, which is not
4356 appropriate to be replaced by a constant.
4358 INSN, if nonzero, is the insn in which we do the reload. It is used
4359 to determine if we may generate output reloads, and where to put USEs
4360 for pseudos that we have to replace with stack slots.
4362 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4363 result of find_reloads_address. */
4366 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
, insn
,
4370 enum reload_type type
;
4374 int *address_reloaded
;
4376 RTX_CODE code
= GET_CODE (x
);
4378 const char *fmt
= GET_RTX_FORMAT (code
);
4384 /* This code is duplicated for speed in find_reloads. */
4385 int regno
= REGNO (x
);
4386 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4387 x
= reg_equiv_constant
[regno
];
4389 /* This creates (subreg (mem...)) which would cause an unnecessary
4390 reload of the mem. */
4391 else if (reg_equiv_mem
[regno
] != 0)
4392 x
= reg_equiv_mem
[regno
];
4394 else if (reg_equiv_memory_loc
[regno
]
4395 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4397 rtx mem
= make_memloc (x
, regno
);
4398 if (reg_equiv_address
[regno
]
4399 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4401 /* If this is not a toplevel operand, find_reloads doesn't see
4402 this substitution. We have to emit a USE of the pseudo so
4403 that delete_output_reload can see it. */
4404 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4405 /* We mark the USE with QImode so that we recognize it
4406 as one that can be safely deleted at the end of
4408 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
),
4411 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4412 opnum
, type
, ind_levels
, insn
);
4413 if (address_reloaded
)
4414 *address_reloaded
= i
;
4423 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4424 opnum
, type
, ind_levels
, insn
);
4425 if (address_reloaded
)
4426 *address_reloaded
= i
;
4431 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4433 /* Check for SUBREG containing a REG that's equivalent to a constant.
4434 If the constant has a known value, truncate it right now.
4435 Similarly if we are extracting a single-word of a multi-word
4436 constant. If the constant is symbolic, allow it to be substituted
4437 normally. push_reload will strip the subreg later. If the
4438 constant is VOIDmode, abort because we will lose the mode of
4439 the register (this should never happen because one of the cases
4440 above should handle it). */
4442 int regno
= REGNO (SUBREG_REG (x
));
4445 if (subreg_lowpart_p (x
)
4446 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4447 && reg_equiv_constant
[regno
] != 0
4448 && (tem
= gen_lowpart_common (GET_MODE (x
),
4449 reg_equiv_constant
[regno
])) != 0)
4452 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
4453 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4454 && reg_equiv_constant
[regno
] != 0)
4457 simplify_gen_subreg (GET_MODE (x
), reg_equiv_constant
[regno
],
4458 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
4464 /* If the subreg contains a reg that will be converted to a mem,
4465 convert the subreg to a narrower memref now.
4466 Otherwise, we would get (subreg (mem ...) ...),
4467 which would force reload of the mem.
4469 We also need to do this if there is an equivalent MEM that is
4470 not offsettable. In that case, alter_subreg would produce an
4471 invalid address on big-endian machines.
4473 For machines that extend byte loads, we must not reload using
4474 a wider mode if we have a paradoxical SUBREG. find_reloads will
4475 force a reload in that case. So we should not do anything here. */
4477 else if (regno
>= FIRST_PSEUDO_REGISTER
4478 #ifdef LOAD_EXTEND_OP
4479 && (GET_MODE_SIZE (GET_MODE (x
))
4480 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4482 && (reg_equiv_address
[regno
] != 0
4483 || (reg_equiv_mem
[regno
] != 0
4484 && (! strict_memory_address_p (GET_MODE (x
),
4485 XEXP (reg_equiv_mem
[regno
], 0))
4486 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4487 || num_not_at_initial_offset
))))
4488 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4492 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4496 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4497 ind_levels
, is_set_dest
, insn
,
4499 /* If we have replaced a reg with it's equivalent memory loc -
4500 that can still be handled here e.g. if it's in a paradoxical
4501 subreg - we must make the change in a copy, rather than using
4502 a destructive change. This way, find_reloads can still elect
4503 not to do the change. */
4504 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4506 x
= shallow_copy_rtx (x
);
4509 XEXP (x
, i
) = new_part
;
4515 /* Return a mem ref for the memory equivalent of reg REGNO.
4516 This mem ref is not shared with anything. */
4519 make_memloc (ad
, regno
)
4523 /* We must rerun eliminate_regs, in case the elimination
4524 offsets have changed. */
4526 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4528 /* If TEM might contain a pseudo, we must copy it to avoid
4529 modifying it when we do the substitution for the reload. */
4530 if (rtx_varies_p (tem
, 0))
4531 tem
= copy_rtx (tem
);
4533 tem
= replace_equiv_address_nv (reg_equiv_memory_loc
[regno
], tem
);
4534 tem
= adjust_address_nv (tem
, GET_MODE (ad
), 0);
4536 /* Copy the result if it's still the same as the equivalence, to avoid
4537 modifying it when we do the substitution for the reload. */
4538 if (tem
== reg_equiv_memory_loc
[regno
])
4539 tem
= copy_rtx (tem
);
4543 /* Record all reloads needed for handling memory address AD
4544 which appears in *LOC in a memory reference to mode MODE
4545 which itself is found in location *MEMREFLOC.
4546 Note that we take shortcuts assuming that no multi-reg machine mode
4547 occurs as part of an address.
4549 OPNUM and TYPE specify the purpose of this reload.
4551 IND_LEVELS says how many levels of indirect addressing this machine
4554 INSN, if nonzero, is the insn in which we do the reload. It is used
4555 to determine if we may generate output reloads, and where to put USEs
4556 for pseudos that we have to replace with stack slots.
4558 Value is nonzero if this address is reloaded or replaced as a whole.
4559 This is interesting to the caller if the address is an autoincrement.
4561 Note that there is no verification that the address will be valid after
4562 this routine does its work. Instead, we rely on the fact that the address
4563 was valid when reload started. So we need only undo things that reload
4564 could have broken. These are wrong register types, pseudos not allocated
4565 to a hard register, and frame pointer elimination. */
4568 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4569 enum machine_mode mode
;
4574 enum reload_type type
;
4579 int removed_and
= 0;
4582 /* If the address is a register, see if it is a legitimate address and
4583 reload if not. We first handle the cases where we need not reload
4584 or where we must reload in a non-standard way. */
4586 if (GET_CODE (ad
) == REG
)
4590 /* If the register is equivalent to an invariant expression, substitute
4591 the invariant, and eliminate any eliminable register references. */
4592 tem
= reg_equiv_constant
[regno
];
4594 && (tem
= eliminate_regs (tem
, mode
, insn
))
4595 && strict_memory_address_p (mode
, tem
))
4601 tem
= reg_equiv_memory_loc
[regno
];
4604 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4606 tem
= make_memloc (ad
, regno
);
4607 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4609 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4610 &XEXP (tem
, 0), opnum
,
4611 ADDR_TYPE (type
), ind_levels
, insn
);
4613 /* We can avoid a reload if the register's equivalent memory
4614 expression is valid as an indirect memory address.
4615 But not all addresses are valid in a mem used as an indirect
4616 address: only reg or reg+constant. */
4619 && strict_memory_address_p (mode
, tem
)
4620 && (GET_CODE (XEXP (tem
, 0)) == REG
4621 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4622 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4623 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4625 /* TEM is not the same as what we'll be replacing the
4626 pseudo with after reload, put a USE in front of INSN
4627 in the final reload pass. */
4629 && num_not_at_initial_offset
4630 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4633 /* We mark the USE with QImode so that we
4634 recognize it as one that can be safely
4635 deleted at the end of reload. */
4636 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
),
4639 /* This doesn't really count as replacing the address
4640 as a whole, since it is still a memory access. */
4648 /* The only remaining case where we can avoid a reload is if this is a
4649 hard register that is valid as a base register and which is not the
4650 subject of a CLOBBER in this insn. */
4652 else if (regno
< FIRST_PSEUDO_REGISTER
4653 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4654 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4657 /* If we do not have one of the cases above, we must do the reload. */
4658 push_reload (ad
, NULL_RTX
, loc
, (rtx
*) 0, MODE_BASE_REG_CLASS (mode
),
4659 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4663 if (strict_memory_address_p (mode
, ad
))
4665 /* The address appears valid, so reloads are not needed.
4666 But the address may contain an eliminable register.
4667 This can happen because a machine with indirect addressing
4668 may consider a pseudo register by itself a valid address even when
4669 it has failed to get a hard reg.
4670 So do a tree-walk to find and eliminate all such regs. */
4672 /* But first quickly dispose of a common case. */
4673 if (GET_CODE (ad
) == PLUS
4674 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4675 && GET_CODE (XEXP (ad
, 0)) == REG
4676 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4679 subst_reg_equivs_changed
= 0;
4680 *loc
= subst_reg_equivs (ad
, insn
);
4682 if (! subst_reg_equivs_changed
)
4685 /* Check result for validity after substitution. */
4686 if (strict_memory_address_p (mode
, ad
))
4690 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4695 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4700 *memrefloc
= copy_rtx (*memrefloc
);
4701 XEXP (*memrefloc
, 0) = ad
;
4702 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4708 /* The address is not valid. We have to figure out why. First see if
4709 we have an outer AND and remove it if so. Then analyze what's inside. */
4711 if (GET_CODE (ad
) == AND
)
4714 loc
= &XEXP (ad
, 0);
4718 /* One possibility for why the address is invalid is that it is itself
4719 a MEM. This can happen when the frame pointer is being eliminated, a
4720 pseudo is not allocated to a hard register, and the offset between the
4721 frame and stack pointers is not its initial value. In that case the
4722 pseudo will have been replaced by a MEM referring to the
4724 if (GET_CODE (ad
) == MEM
)
4726 /* First ensure that the address in this MEM is valid. Then, unless
4727 indirect addresses are valid, reload the MEM into a register. */
4729 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4730 opnum
, ADDR_TYPE (type
),
4731 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4733 /* If tem was changed, then we must create a new memory reference to
4734 hold it and store it back into memrefloc. */
4735 if (tem
!= ad
&& memrefloc
)
4737 *memrefloc
= copy_rtx (*memrefloc
);
4738 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4739 loc
= &XEXP (*memrefloc
, 0);
4741 loc
= &XEXP (*loc
, 0);
4744 /* Check similar cases as for indirect addresses as above except
4745 that we can allow pseudos and a MEM since they should have been
4746 taken care of above. */
4749 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4750 || GET_CODE (XEXP (tem
, 0)) == MEM
4751 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4752 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4753 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4754 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4756 /* Must use TEM here, not AD, since it is the one that will
4757 have any subexpressions reloaded, if needed. */
4758 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0,
4759 MODE_BASE_REG_CLASS (mode
), GET_MODE (tem
),
4762 return ! removed_and
;
4768 /* If we have address of a stack slot but it's not valid because the
4769 displacement is too large, compute the sum in a register.
4770 Handle all base registers here, not just fp/ap/sp, because on some
4771 targets (namely SH) we can also get too large displacements from
4772 big-endian corrections. */
4773 else if (GET_CODE (ad
) == PLUS
4774 && GET_CODE (XEXP (ad
, 0)) == REG
4775 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4776 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4777 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4779 /* Unshare the MEM rtx so we can safely alter it. */
4782 *memrefloc
= copy_rtx (*memrefloc
);
4783 loc
= &XEXP (*memrefloc
, 0);
4785 loc
= &XEXP (*loc
, 0);
4788 if (double_reg_address_ok
)
4790 /* Unshare the sum as well. */
4791 *loc
= ad
= copy_rtx (ad
);
4793 /* Reload the displacement into an index reg.
4794 We assume the frame pointer or arg pointer is a base reg. */
4795 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4796 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4802 /* If the sum of two regs is not necessarily valid,
4803 reload the sum into a base reg.
4804 That will at least work. */
4805 find_reloads_address_part (ad
, loc
, MODE_BASE_REG_CLASS (mode
),
4806 Pmode
, opnum
, type
, ind_levels
);
4808 return ! removed_and
;
4811 /* If we have an indexed stack slot, there are three possible reasons why
4812 it might be invalid: The index might need to be reloaded, the address
4813 might have been made by frame pointer elimination and hence have a
4814 constant out of range, or both reasons might apply.
4816 We can easily check for an index needing reload, but even if that is the
4817 case, we might also have an invalid constant. To avoid making the
4818 conservative assumption and requiring two reloads, we see if this address
4819 is valid when not interpreted strictly. If it is, the only problem is
4820 that the index needs a reload and find_reloads_address_1 will take care
4823 If we decide to do something here, it must be that
4824 `double_reg_address_ok' is true and that this address rtl was made by
4825 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4826 rework the sum so that the reload register will be added to the index.
4827 This is safe because we know the address isn't shared.
4829 We check for fp/ap/sp as both the first and second operand of the
4832 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4833 && GET_CODE (XEXP (ad
, 0)) == PLUS
4834 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4835 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4836 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4838 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4839 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4841 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4842 && ! memory_address_p (mode
, ad
))
4844 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4845 plus_constant (XEXP (XEXP (ad
, 0), 0),
4846 INTVAL (XEXP (ad
, 1))),
4847 XEXP (XEXP (ad
, 0), 1));
4848 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0),
4849 MODE_BASE_REG_CLASS (mode
),
4850 GET_MODE (ad
), opnum
, type
, ind_levels
);
4851 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4857 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4858 && GET_CODE (XEXP (ad
, 0)) == PLUS
4859 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4860 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4861 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4863 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4864 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4866 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4867 && ! memory_address_p (mode
, ad
))
4869 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4870 XEXP (XEXP (ad
, 0), 0),
4871 plus_constant (XEXP (XEXP (ad
, 0), 1),
4872 INTVAL (XEXP (ad
, 1))));
4873 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4874 MODE_BASE_REG_CLASS (mode
),
4875 GET_MODE (ad
), opnum
, type
, ind_levels
);
4876 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4882 /* See if address becomes valid when an eliminable register
4883 in a sum is replaced. */
4886 if (GET_CODE (ad
) == PLUS
)
4887 tem
= subst_indexed_address (ad
);
4888 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4890 /* Ok, we win that way. Replace any additional eliminable
4893 subst_reg_equivs_changed
= 0;
4894 tem
= subst_reg_equivs (tem
, insn
);
4896 /* Make sure that didn't make the address invalid again. */
4898 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4905 /* If constants aren't valid addresses, reload the constant address
4907 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4909 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4910 Unshare it so we can safely alter it. */
4911 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4912 && CONSTANT_POOL_ADDRESS_P (ad
))
4914 *memrefloc
= copy_rtx (*memrefloc
);
4915 loc
= &XEXP (*memrefloc
, 0);
4917 loc
= &XEXP (*loc
, 0);
4920 find_reloads_address_part (ad
, loc
, MODE_BASE_REG_CLASS (mode
),
4921 Pmode
, opnum
, type
, ind_levels
);
4922 return ! removed_and
;
4925 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
4929 /* Find all pseudo regs appearing in AD
4930 that are eliminable in favor of equivalent values
4931 and do not have hard regs; replace them by their equivalents.
4932 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4933 front of it for pseudos that we have to replace with stack slots. */
4936 subst_reg_equivs (ad
, insn
)
4940 RTX_CODE code
= GET_CODE (ad
);
4959 int regno
= REGNO (ad
);
4961 if (reg_equiv_constant
[regno
] != 0)
4963 subst_reg_equivs_changed
= 1;
4964 return reg_equiv_constant
[regno
];
4966 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
4968 rtx mem
= make_memloc (ad
, regno
);
4969 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4971 subst_reg_equivs_changed
= 1;
4972 /* We mark the USE with QImode so that we recognize it
4973 as one that can be safely deleted at the end of
4975 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
),
4984 /* Quickly dispose of a common case. */
4985 if (XEXP (ad
, 0) == frame_pointer_rtx
4986 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4994 fmt
= GET_RTX_FORMAT (code
);
4995 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4997 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
5001 /* Compute the sum of X and Y, making canonicalizations assumed in an
5002 address, namely: sum constant integers, surround the sum of two
5003 constants with a CONST, put the constant as the second operand, and
5004 group the constant on the outermost sum.
5006 This routine assumes both inputs are already in canonical form. */
5013 enum machine_mode mode
= GET_MODE (x
);
5015 if (mode
== VOIDmode
)
5016 mode
= GET_MODE (y
);
5018 if (mode
== VOIDmode
)
5021 if (GET_CODE (x
) == CONST_INT
)
5022 return plus_constant (y
, INTVAL (x
));
5023 else if (GET_CODE (y
) == CONST_INT
)
5024 return plus_constant (x
, INTVAL (y
));
5025 else if (CONSTANT_P (x
))
5026 tem
= x
, x
= y
, y
= tem
;
5028 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
5029 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
5031 /* Note that if the operands of Y are specified in the opposite
5032 order in the recursive calls below, infinite recursion will occur. */
5033 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
5034 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
5036 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5037 constant will have been placed second. */
5038 if (CONSTANT_P (x
) && CONSTANT_P (y
))
5040 if (GET_CODE (x
) == CONST
)
5042 if (GET_CODE (y
) == CONST
)
5045 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
5048 return gen_rtx_PLUS (mode
, x
, y
);
5051 /* If ADDR is a sum containing a pseudo register that should be
5052 replaced with a constant (from reg_equiv_constant),
5053 return the result of doing so, and also apply the associative
5054 law so that the result is more likely to be a valid address.
5055 (But it is not guaranteed to be one.)
5057 Note that at most one register is replaced, even if more are
5058 replaceable. Also, we try to put the result into a canonical form
5059 so it is more likely to be a valid address.
5061 In all other cases, return ADDR. */
5064 subst_indexed_address (addr
)
5067 rtx op0
= 0, op1
= 0, op2
= 0;
5071 if (GET_CODE (addr
) == PLUS
)
5073 /* Try to find a register to replace. */
5074 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5075 if (GET_CODE (op0
) == REG
5076 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5077 && reg_renumber
[regno
] < 0
5078 && reg_equiv_constant
[regno
] != 0)
5079 op0
= reg_equiv_constant
[regno
];
5080 else if (GET_CODE (op1
) == REG
5081 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5082 && reg_renumber
[regno
] < 0
5083 && reg_equiv_constant
[regno
] != 0)
5084 op1
= reg_equiv_constant
[regno
];
5085 else if (GET_CODE (op0
) == PLUS
5086 && (tem
= subst_indexed_address (op0
)) != op0
)
5088 else if (GET_CODE (op1
) == PLUS
5089 && (tem
= subst_indexed_address (op1
)) != op1
)
5094 /* Pick out up to three things to add. */
5095 if (GET_CODE (op1
) == PLUS
)
5096 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5097 else if (GET_CODE (op0
) == PLUS
)
5098 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5100 /* Compute the sum. */
5102 op1
= form_sum (op1
, op2
);
5104 op0
= form_sum (op0
, op1
);
5111 /* Update the REG_INC notes for an insn. It updates all REG_INC
5112 notes for the instruction which refer to REGNO the to refer
5113 to the reload number.
5115 INSN is the insn for which any REG_INC notes need updating.
5117 REGNO is the register number which has been reloaded.
5119 RELOADNUM is the reload number. */
5122 update_auto_inc_notes (insn
, regno
, reloadnum
)
5123 rtx insn ATTRIBUTE_UNUSED
;
5124 int regno ATTRIBUTE_UNUSED
;
5125 int reloadnum ATTRIBUTE_UNUSED
;
5130 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5131 if (REG_NOTE_KIND (link
) == REG_INC
5132 && REGNO (XEXP (link
, 0)) == regno
)
5133 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5137 /* Record the pseudo registers we must reload into hard registers in a
5138 subexpression of a would-be memory address, X referring to a value
5139 in mode MODE. (This function is not called if the address we find
5142 CONTEXT = 1 means we are considering regs as index regs,
5143 = 0 means we are considering them as base regs.
5145 OPNUM and TYPE specify the purpose of any reloads made.
5147 IND_LEVELS says how many levels of indirect addressing are
5148 supported at this point in the address.
5150 INSN, if nonzero, is the insn in which we do the reload. It is used
5151 to determine if we may generate output reloads.
5153 We return nonzero if X, as a whole, is reloaded or replaced. */
5155 /* Note that we take shortcuts assuming that no multi-reg machine mode
5156 occurs as part of an address.
5157 Also, this is not fully machine-customizable; it works for machines
5158 such as VAXen and 68000's and 32000's, but other possible machines
5159 could have addressing modes that this does not handle right. */
5162 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
5163 enum machine_mode mode
;
5168 enum reload_type type
;
5172 RTX_CODE code
= GET_CODE (x
);
5178 rtx orig_op0
= XEXP (x
, 0);
5179 rtx orig_op1
= XEXP (x
, 1);
5180 RTX_CODE code0
= GET_CODE (orig_op0
);
5181 RTX_CODE code1
= GET_CODE (orig_op1
);
5185 if (GET_CODE (op0
) == SUBREG
)
5187 op0
= SUBREG_REG (op0
);
5188 code0
= GET_CODE (op0
);
5189 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5190 op0
= gen_rtx_REG (word_mode
,
5192 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5193 GET_MODE (SUBREG_REG (orig_op0
)),
5194 SUBREG_BYTE (orig_op0
),
5195 GET_MODE (orig_op0
))));
5198 if (GET_CODE (op1
) == SUBREG
)
5200 op1
= SUBREG_REG (op1
);
5201 code1
= GET_CODE (op1
);
5202 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5203 /* ??? Why is this given op1's mode and above for
5204 ??? op0 SUBREGs we use word_mode? */
5205 op1
= gen_rtx_REG (GET_MODE (op1
),
5207 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5208 GET_MODE (SUBREG_REG (orig_op1
)),
5209 SUBREG_BYTE (orig_op1
),
5210 GET_MODE (orig_op1
))));
5213 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5214 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5216 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5217 type
, ind_levels
, insn
);
5218 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5219 type
, ind_levels
, insn
);
5222 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5223 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5225 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5226 type
, ind_levels
, insn
);
5227 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5228 type
, ind_levels
, insn
);
5231 else if (code0
== CONST_INT
|| code0
== CONST
5232 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5233 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5234 type
, ind_levels
, insn
);
5236 else if (code1
== CONST_INT
|| code1
== CONST
5237 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5238 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5239 type
, ind_levels
, insn
);
5241 else if (code0
== REG
&& code1
== REG
)
5243 if (REG_OK_FOR_INDEX_P (op0
)
5244 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5246 else if (REG_OK_FOR_INDEX_P (op1
)
5247 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5249 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5250 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5251 type
, ind_levels
, insn
);
5252 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5253 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5254 type
, ind_levels
, insn
);
5255 else if (REG_OK_FOR_INDEX_P (op1
))
5256 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5257 type
, ind_levels
, insn
);
5258 else if (REG_OK_FOR_INDEX_P (op0
))
5259 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5260 type
, ind_levels
, insn
);
5263 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5264 type
, ind_levels
, insn
);
5265 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5266 type
, ind_levels
, insn
);
5270 else if (code0
== REG
)
5272 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5273 type
, ind_levels
, insn
);
5274 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5275 type
, ind_levels
, insn
);
5278 else if (code1
== REG
)
5280 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5281 type
, ind_levels
, insn
);
5282 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5283 type
, ind_levels
, insn
);
5292 rtx op0
= XEXP (x
, 0);
5293 rtx op1
= XEXP (x
, 1);
5295 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5298 /* Currently, we only support {PRE,POST}_MODIFY constructs
5299 where a base register is {inc,dec}remented by the contents
5300 of another register or by a constant value. Thus, these
5301 operands must match. */
5302 if (op0
!= XEXP (op1
, 0))
5305 /* Require index register (or constant). Let's just handle the
5306 register case in the meantime... If the target allows
5307 auto-modify by a constant then we could try replacing a pseudo
5308 register with its equivalent constant where applicable. */
5309 if (REG_P (XEXP (op1
, 1)))
5310 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5311 find_reloads_address_1 (mode
, XEXP (op1
, 1), 1, &XEXP (op1
, 1),
5312 opnum
, type
, ind_levels
, insn
);
5314 if (REG_P (XEXP (op1
, 0)))
5316 int regno
= REGNO (XEXP (op1
, 0));
5319 /* A register that is incremented cannot be constant! */
5320 if (regno
>= FIRST_PSEUDO_REGISTER
5321 && reg_equiv_constant
[regno
] != 0)
5324 /* Handle a register that is equivalent to a memory location
5325 which cannot be addressed directly. */
5326 if (reg_equiv_memory_loc
[regno
] != 0
5327 && (reg_equiv_address
[regno
] != 0
5328 || num_not_at_initial_offset
))
5330 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5332 if (reg_equiv_address
[regno
]
5333 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5335 /* First reload the memory location's address.
5336 We can't use ADDR_TYPE (type) here, because we need to
5337 write back the value after reading it, hence we actually
5338 need two registers. */
5339 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5340 &XEXP (tem
, 0), opnum
,
5344 /* Then reload the memory location into a base
5346 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5348 MODE_BASE_REG_CLASS (mode
),
5349 GET_MODE (x
), GET_MODE (x
), 0,
5350 0, opnum
, RELOAD_OTHER
);
5352 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5357 if (reg_renumber
[regno
] >= 0)
5358 regno
= reg_renumber
[regno
];
5360 /* We require a base register here... */
5361 if (!REGNO_MODE_OK_FOR_BASE_P (regno
, GET_MODE (x
)))
5363 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5364 &XEXP (op1
, 0), &XEXP (x
, 0),
5365 MODE_BASE_REG_CLASS (mode
),
5366 GET_MODE (x
), GET_MODE (x
), 0, 0,
5367 opnum
, RELOAD_OTHER
);
5369 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5382 if (GET_CODE (XEXP (x
, 0)) == REG
)
5384 int regno
= REGNO (XEXP (x
, 0));
5388 /* A register that is incremented cannot be constant! */
5389 if (regno
>= FIRST_PSEUDO_REGISTER
5390 && reg_equiv_constant
[regno
] != 0)
5393 /* Handle a register that is equivalent to a memory location
5394 which cannot be addressed directly. */
5395 if (reg_equiv_memory_loc
[regno
] != 0
5396 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5398 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5399 if (reg_equiv_address
[regno
]
5400 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5402 /* First reload the memory location's address.
5403 We can't use ADDR_TYPE (type) here, because we need to
5404 write back the value after reading it, hence we actually
5405 need two registers. */
5406 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5407 &XEXP (tem
, 0), opnum
, type
,
5409 /* Put this inside a new increment-expression. */
5410 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5411 /* Proceed to reload that, as if it contained a register. */
5415 /* If we have a hard register that is ok as an index,
5416 don't make a reload. If an autoincrement of a nice register
5417 isn't "valid", it must be that no autoincrement is "valid".
5418 If that is true and something made an autoincrement anyway,
5419 this must be a special context where one is allowed.
5420 (For example, a "push" instruction.)
5421 We can't improve this address, so leave it alone. */
5423 /* Otherwise, reload the autoincrement into a suitable hard reg
5424 and record how much to increment by. */
5426 if (reg_renumber
[regno
] >= 0)
5427 regno
= reg_renumber
[regno
];
5428 if ((regno
>= FIRST_PSEUDO_REGISTER
5429 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5430 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5434 /* If we can output the register afterwards, do so, this
5435 saves the extra update.
5436 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5437 CALL_INSN - and it does not set CC0.
5438 But don't do this if we cannot directly address the
5439 memory location, since this will make it harder to
5440 reuse address reloads, and increases register pressure.
5441 Also don't do this if we can probably update x directly. */
5442 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5444 : reg_equiv_mem
[regno
]);
5445 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5446 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5447 && memory_operand (equiv
, GET_MODE (equiv
))
5449 && ! sets_cc0_p (PATTERN (insn
))
5451 && ! (icode
!= CODE_FOR_nothing
5452 && ((*insn_data
[icode
].operand
[0].predicate
)
5454 && ((*insn_data
[icode
].operand
[1].predicate
)
5457 /* We use the original pseudo for loc, so that
5458 emit_reload_insns() knows which pseudo this
5459 reload refers to and updates the pseudo rtx, not
5460 its equivalent memory location, as well as the
5461 corresponding entry in reg_last_reload_reg. */
5462 loc
= &XEXP (x_orig
, 0);
5465 = push_reload (x
, x
, loc
, loc
,
5466 (context
? INDEX_REG_CLASS
:
5467 MODE_BASE_REG_CLASS (mode
)),
5468 GET_MODE (x
), GET_MODE (x
), 0, 0,
5469 opnum
, RELOAD_OTHER
);
5474 = push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5475 (context
? INDEX_REG_CLASS
:
5476 MODE_BASE_REG_CLASS (mode
)),
5477 GET_MODE (x
), GET_MODE (x
), 0, 0,
5480 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5485 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5491 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5493 /* This is probably the result of a substitution, by eliminate_regs,
5494 of an equivalent address for a pseudo that was not allocated to a
5495 hard register. Verify that the specified address is valid and
5496 reload it into a register. */
5497 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5498 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5502 /* Since we know we are going to reload this item, don't decrement
5503 for the indirection level.
5505 Note that this is actually conservative: it would be slightly
5506 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5508 /* We can't use ADDR_TYPE (type) here, because we need to
5509 write back the value after reading it, hence we actually
5510 need two registers. */
5511 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5512 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5513 opnum
, type
, ind_levels
, insn
);
5515 reloadnum
= push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5516 (context
? INDEX_REG_CLASS
:
5517 MODE_BASE_REG_CLASS (mode
)),
5518 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5520 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5522 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5524 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5531 /* This is probably the result of a substitution, by eliminate_regs, of
5532 an equivalent address for a pseudo that was not allocated to a hard
5533 register. Verify that the specified address is valid and reload it
5536 Since we know we are going to reload this item, don't decrement for
5537 the indirection level.
5539 Note that this is actually conservative: it would be slightly more
5540 efficient to use the value of SPILL_INDIRECT_LEVELS from
5543 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5544 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5545 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5546 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5547 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5552 int regno
= REGNO (x
);
5554 if (reg_equiv_constant
[regno
] != 0)
5556 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5557 (context
? INDEX_REG_CLASS
:
5558 MODE_BASE_REG_CLASS (mode
)),
5559 GET_MODE (x
), opnum
, type
, ind_levels
);
5563 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5564 that feeds this insn. */
5565 if (reg_equiv_mem
[regno
] != 0)
5567 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, (rtx
*) 0,
5568 (context
? INDEX_REG_CLASS
:
5569 MODE_BASE_REG_CLASS (mode
)),
5570 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5575 if (reg_equiv_memory_loc
[regno
]
5576 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5578 rtx tem
= make_memloc (x
, regno
);
5579 if (reg_equiv_address
[regno
] != 0
5580 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5583 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5584 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5589 if (reg_renumber
[regno
] >= 0)
5590 regno
= reg_renumber
[regno
];
5592 if ((regno
>= FIRST_PSEUDO_REGISTER
5593 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5594 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5596 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5597 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5598 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5602 /* If a register appearing in an address is the subject of a CLOBBER
5603 in this insn, reload it into some other register to be safe.
5604 The CLOBBER is supposed to make the register unavailable
5605 from before this insn to after it. */
5606 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
5608 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5609 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5610 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5617 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5619 /* If this is a SUBREG of a hard register and the resulting register
5620 is of the wrong class, reload the whole SUBREG. This avoids
5621 needless copies if SUBREG_REG is multi-word. */
5622 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5624 int regno
= subreg_regno (x
);
5626 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5627 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5629 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5630 (context
? INDEX_REG_CLASS
:
5631 MODE_BASE_REG_CLASS (mode
)),
5632 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5636 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5637 is larger than the class size, then reload the whole SUBREG. */
5640 enum reg_class
class = (context
? INDEX_REG_CLASS
5641 : MODE_BASE_REG_CLASS (mode
));
5642 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5643 > reg_class_size
[class])
5645 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5647 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, class,
5648 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5660 const char *fmt
= GET_RTX_FORMAT (code
);
5663 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5666 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5667 opnum
, type
, ind_levels
, insn
);
5674 /* X, which is found at *LOC, is a part of an address that needs to be
5675 reloaded into a register of class CLASS. If X is a constant, or if
5676 X is a PLUS that contains a constant, check that the constant is a
5677 legitimate operand and that we are supposed to be able to load
5678 it into the register.
5680 If not, force the constant into memory and reload the MEM instead.
5682 MODE is the mode to use, in case X is an integer constant.
5684 OPNUM and TYPE describe the purpose of any reloads made.
5686 IND_LEVELS says how many levels of indirect addressing this machine
5690 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5693 enum reg_class
class;
5694 enum machine_mode mode
;
5696 enum reload_type type
;
5700 && (! LEGITIMATE_CONSTANT_P (x
)
5701 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5705 tem
= x
= force_const_mem (mode
, x
);
5706 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5707 opnum
, type
, ind_levels
, 0);
5710 else if (GET_CODE (x
) == PLUS
5711 && CONSTANT_P (XEXP (x
, 1))
5712 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5713 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5717 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5718 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5719 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5720 opnum
, type
, ind_levels
, 0);
5723 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, class,
5724 mode
, VOIDmode
, 0, 0, opnum
, type
);
5727 /* X, a subreg of a pseudo, is a part of an address that needs to be
5730 If the pseudo is equivalent to a memory location that cannot be directly
5731 addressed, make the necessary address reloads.
5733 If address reloads have been necessary, or if the address is changed
5734 by register elimination, return the rtx of the memory location;
5735 otherwise, return X.
5737 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5740 OPNUM and TYPE identify the purpose of the reload.
5742 IND_LEVELS says how many levels of indirect addressing are
5743 supported at this point in the address.
5745 INSN, if nonzero, is the insn in which we do the reload. It is used
5746 to determine where to put USEs for pseudos that we have to replace with
5750 find_reloads_subreg_address (x
, force_replace
, opnum
, type
,
5755 enum reload_type type
;
5759 int regno
= REGNO (SUBREG_REG (x
));
5761 if (reg_equiv_memory_loc
[regno
])
5763 /* If the address is not directly addressable, or if the address is not
5764 offsettable, then it must be replaced. */
5766 && (reg_equiv_address
[regno
]
5767 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5770 if (force_replace
|| num_not_at_initial_offset
)
5772 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5774 /* If the address changes because of register elimination, then
5775 it must be replaced. */
5777 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5779 int offset
= SUBREG_BYTE (x
);
5780 unsigned outer_size
= GET_MODE_SIZE (GET_MODE (x
));
5781 unsigned inner_size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5783 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5784 PUT_MODE (tem
, GET_MODE (x
));
5786 /* If this was a paradoxical subreg that we replaced, the
5787 resulting memory must be sufficiently aligned to allow
5788 us to widen the mode of the memory. */
5789 if (outer_size
> inner_size
&& STRICT_ALIGNMENT
)
5793 base
= XEXP (tem
, 0);
5794 if (GET_CODE (base
) == PLUS
)
5796 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
5797 && INTVAL (XEXP (base
, 1)) % outer_size
!= 0)
5799 base
= XEXP (base
, 0);
5801 if (GET_CODE (base
) != REG
5802 || (REGNO_POINTER_ALIGN (REGNO (base
))
5803 < outer_size
* BITS_PER_UNIT
))
5807 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5808 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5811 /* If this is not a toplevel operand, find_reloads doesn't see
5812 this substitution. We have to emit a USE of the pseudo so
5813 that delete_output_reload can see it. */
5814 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5815 /* We mark the USE with QImode so that we recognize it
5816 as one that can be safely deleted at the end of
5818 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
,
5828 /* Substitute into the current INSN the registers into which we have reloaded
5829 the things that need reloading. The array `replacements'
5830 contains the locations of all pointers that must be changed
5831 and says what to replace them with.
5833 Return the rtx that X translates into; usually X, but modified. */
5836 subst_reloads (insn
)
5841 for (i
= 0; i
< n_replacements
; i
++)
5843 struct replacement
*r
= &replacements
[i
];
5844 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5847 #ifdef ENABLE_CHECKING
5848 /* Internal consistency test. Check that we don't modify
5849 anything in the equivalence arrays. Whenever something from
5850 those arrays needs to be reloaded, it must be unshared before
5851 being substituted into; the equivalence must not be modified.
5852 Otherwise, if the equivalence is used after that, it will
5853 have been modified, and the thing substituted (probably a
5854 register) is likely overwritten and not a usable equivalence. */
5857 for (check_regno
= 0; check_regno
< max_regno
; check_regno
++)
5859 #define CHECK_MODF(ARRAY) \
5860 if (ARRAY[check_regno] \
5861 && loc_mentioned_in_p (r->where, \
5862 ARRAY[check_regno])) \
5865 CHECK_MODF (reg_equiv_constant
);
5866 CHECK_MODF (reg_equiv_memory_loc
);
5867 CHECK_MODF (reg_equiv_address
);
5868 CHECK_MODF (reg_equiv_mem
);
5871 #endif /* ENABLE_CHECKING */
5873 /* If we're replacing a LABEL_REF with a register, add a
5874 REG_LABEL note to indicate to flow which label this
5875 register refers to. */
5876 if (GET_CODE (*r
->where
) == LABEL_REF
5877 && GET_CODE (insn
) == JUMP_INSN
)
5878 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
,
5879 XEXP (*r
->where
, 0),
5882 /* Encapsulate RELOADREG so its machine mode matches what
5883 used to be there. Note that gen_lowpart_common will
5884 do the wrong thing if RELOADREG is multi-word. RELOADREG
5885 will always be a REG here. */
5886 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5887 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5889 /* If we are putting this into a SUBREG and RELOADREG is a
5890 SUBREG, we would be making nested SUBREGs, so we have to fix
5891 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5893 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5895 if (GET_MODE (*r
->subreg_loc
)
5896 == GET_MODE (SUBREG_REG (reloadreg
)))
5897 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5901 SUBREG_BYTE (*r
->subreg_loc
) + SUBREG_BYTE (reloadreg
);
5903 /* When working with SUBREGs the rule is that the byte
5904 offset must be a multiple of the SUBREG's mode. */
5905 final_offset
= (final_offset
/
5906 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
5907 final_offset
= (final_offset
*
5908 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
5910 *r
->where
= SUBREG_REG (reloadreg
);
5911 SUBREG_BYTE (*r
->subreg_loc
) = final_offset
;
5915 *r
->where
= reloadreg
;
5917 /* If reload got no reg and isn't optional, something's wrong. */
5918 else if (! rld
[r
->what
].optional
)
5923 /* Make a copy of any replacements being done into X and move those
5924 copies to locations in Y, a copy of X. */
5927 copy_replacements (x
, y
)
5930 /* We can't support X being a SUBREG because we might then need to know its
5931 location if something inside it was replaced. */
5932 if (GET_CODE (x
) == SUBREG
)
5935 copy_replacements_1 (&x
, &y
, n_replacements
);
5939 copy_replacements_1 (px
, py
, orig_replacements
)
5942 int orig_replacements
;
5946 struct replacement
*r
;
5950 for (j
= 0; j
< orig_replacements
; j
++)
5952 if (replacements
[j
].subreg_loc
== px
)
5954 r
= &replacements
[n_replacements
++];
5955 r
->where
= replacements
[j
].where
;
5957 r
->what
= replacements
[j
].what
;
5958 r
->mode
= replacements
[j
].mode
;
5960 else if (replacements
[j
].where
== px
)
5962 r
= &replacements
[n_replacements
++];
5965 r
->what
= replacements
[j
].what
;
5966 r
->mode
= replacements
[j
].mode
;
5972 code
= GET_CODE (x
);
5973 fmt
= GET_RTX_FORMAT (code
);
5975 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5978 copy_replacements_1 (&XEXP (x
, i
), &XEXP (y
, i
), orig_replacements
);
5979 else if (fmt
[i
] == 'E')
5980 for (j
= XVECLEN (x
, i
); --j
>= 0; )
5981 copy_replacements_1 (&XVECEXP (x
, i
, j
), &XVECEXP (y
, i
, j
),
5986 /* Change any replacements being done to *X to be done to *Y */
5989 move_replacements (x
, y
)
5995 for (i
= 0; i
< n_replacements
; i
++)
5996 if (replacements
[i
].subreg_loc
== x
)
5997 replacements
[i
].subreg_loc
= y
;
5998 else if (replacements
[i
].where
== x
)
6000 replacements
[i
].where
= y
;
6001 replacements
[i
].subreg_loc
= 0;
6005 /* If LOC was scheduled to be replaced by something, return the replacement.
6006 Otherwise, return *LOC. */
6009 find_replacement (loc
)
6012 struct replacement
*r
;
6014 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
6016 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6018 if (reloadreg
&& r
->where
== loc
)
6020 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6021 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
6025 else if (reloadreg
&& r
->subreg_loc
== loc
)
6027 /* RELOADREG must be either a REG or a SUBREG.
6029 ??? Is it actually still ever a SUBREG? If so, why? */
6031 if (GET_CODE (reloadreg
) == REG
)
6032 return gen_rtx_REG (GET_MODE (*loc
),
6033 (REGNO (reloadreg
) +
6034 subreg_regno_offset (REGNO (SUBREG_REG (*loc
)),
6035 GET_MODE (SUBREG_REG (*loc
)),
6038 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
6042 int final_offset
= SUBREG_BYTE (reloadreg
) + SUBREG_BYTE (*loc
);
6044 /* When working with SUBREGs the rule is that the byte
6045 offset must be a multiple of the SUBREG's mode. */
6046 final_offset
= (final_offset
/ GET_MODE_SIZE (GET_MODE (*loc
)));
6047 final_offset
= (final_offset
* GET_MODE_SIZE (GET_MODE (*loc
)));
6048 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
6054 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6055 what's inside and make a new rtl if so. */
6056 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
6057 || GET_CODE (*loc
) == MULT
)
6059 rtx x
= find_replacement (&XEXP (*loc
, 0));
6060 rtx y
= find_replacement (&XEXP (*loc
, 1));
6062 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
6063 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
6069 /* Return nonzero if register in range [REGNO, ENDREGNO)
6070 appears either explicitly or implicitly in X
6071 other than being stored into (except for earlyclobber operands).
6073 References contained within the substructure at LOC do not count.
6074 LOC may be zero, meaning don't ignore anything.
6076 This is similar to refers_to_regno_p in rtlanal.c except that we
6077 look at equivalences for pseudos that didn't get hard registers. */
6080 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
6081 unsigned int regno
, endregno
;
6094 code
= GET_CODE (x
);
6101 /* If this is a pseudo, a hard register must not have been allocated.
6102 X must therefore either be a constant or be in memory. */
6103 if (r
>= FIRST_PSEUDO_REGISTER
)
6105 if (reg_equiv_memory_loc
[r
])
6106 return refers_to_regno_for_reload_p (regno
, endregno
,
6107 reg_equiv_memory_loc
[r
],
6110 if (reg_equiv_constant
[r
])
6116 return (endregno
> r
6117 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
6118 ? HARD_REGNO_NREGS (r
, GET_MODE (x
))
6122 /* If this is a SUBREG of a hard reg, we can see exactly which
6123 registers are being modified. Otherwise, handle normally. */
6124 if (GET_CODE (SUBREG_REG (x
)) == REG
6125 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6127 unsigned int inner_regno
= subreg_regno (x
);
6128 unsigned int inner_endregno
6129 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6130 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6132 return endregno
> inner_regno
&& regno
< inner_endregno
;
6138 if (&SET_DEST (x
) != loc
6139 /* Note setting a SUBREG counts as referring to the REG it is in for
6140 a pseudo but not for hard registers since we can
6141 treat each word individually. */
6142 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6143 && loc
!= &SUBREG_REG (SET_DEST (x
))
6144 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
6145 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6146 && refers_to_regno_for_reload_p (regno
, endregno
,
6147 SUBREG_REG (SET_DEST (x
)),
6149 /* If the output is an earlyclobber operand, this is
6151 || ((GET_CODE (SET_DEST (x
)) != REG
6152 || earlyclobber_operand_p (SET_DEST (x
)))
6153 && refers_to_regno_for_reload_p (regno
, endregno
,
6154 SET_DEST (x
), loc
))))
6157 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6166 /* X does not match, so try its subexpressions. */
6168 fmt
= GET_RTX_FORMAT (code
);
6169 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6171 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6179 if (refers_to_regno_for_reload_p (regno
, endregno
,
6183 else if (fmt
[i
] == 'E')
6186 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6187 if (loc
!= &XVECEXP (x
, i
, j
)
6188 && refers_to_regno_for_reload_p (regno
, endregno
,
6189 XVECEXP (x
, i
, j
), loc
))
6196 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6197 we check if any register number in X conflicts with the relevant register
6198 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6199 contains a MEM (we don't bother checking for memory addresses that can't
6200 conflict because we expect this to be a rare case.
6202 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6203 that we look at equivalences for pseudos that didn't get hard registers. */
6206 reg_overlap_mentioned_for_reload_p (x
, in
)
6209 int regno
, endregno
;
6211 /* Overly conservative. */
6212 if (GET_CODE (x
) == STRICT_LOW_PART
6213 || GET_RTX_CLASS (GET_CODE (x
)) == 'a')
6216 /* If either argument is a constant, then modifying X can not affect IN. */
6217 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6219 else if (GET_CODE (x
) == SUBREG
)
6221 regno
= REGNO (SUBREG_REG (x
));
6222 if (regno
< FIRST_PSEUDO_REGISTER
)
6223 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6224 GET_MODE (SUBREG_REG (x
)),
6228 else if (GET_CODE (x
) == REG
)
6232 /* If this is a pseudo, it must not have been assigned a hard register.
6233 Therefore, it must either be in memory or be a constant. */
6235 if (regno
>= FIRST_PSEUDO_REGISTER
)
6237 if (reg_equiv_memory_loc
[regno
])
6238 return refers_to_mem_for_reload_p (in
);
6239 else if (reg_equiv_constant
[regno
])
6244 else if (GET_CODE (x
) == MEM
)
6245 return refers_to_mem_for_reload_p (in
);
6246 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6247 || GET_CODE (x
) == CC0
)
6248 return reg_mentioned_p (x
, in
);
6249 else if (GET_CODE (x
) == PLUS
)
6250 return (reg_overlap_mentioned_for_reload_p (XEXP (x
, 0), in
)
6251 || reg_overlap_mentioned_for_reload_p (XEXP (x
, 1), in
));
6255 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6256 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6258 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6261 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6265 refers_to_mem_for_reload_p (x
)
6271 if (GET_CODE (x
) == MEM
)
6274 if (GET_CODE (x
) == REG
)
6275 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6276 && reg_equiv_memory_loc
[REGNO (x
)]);
6278 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6279 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6281 && (GET_CODE (XEXP (x
, i
)) == MEM
6282 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6288 /* Check the insns before INSN to see if there is a suitable register
6289 containing the same value as GOAL.
6290 If OTHER is -1, look for a register in class CLASS.
6291 Otherwise, just see if register number OTHER shares GOAL's value.
6293 Return an rtx for the register found, or zero if none is found.
6295 If RELOAD_REG_P is (short *)1,
6296 we reject any hard reg that appears in reload_reg_rtx
6297 because such a hard reg is also needed coming into this insn.
6299 If RELOAD_REG_P is any other nonzero value,
6300 it is a vector indexed by hard reg number
6301 and we reject any hard reg whose element in the vector is nonnegative
6302 as well as any that appears in reload_reg_rtx.
6304 If GOAL is zero, then GOALREG is a register number; we look
6305 for an equivalent for that register.
6307 MODE is the machine mode of the value we want an equivalence for.
6308 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6310 This function is used by jump.c as well as in the reload pass.
6312 If GOAL is the sum of the stack pointer and a constant, we treat it
6313 as if it were a constant except that sp is required to be unchanging. */
6316 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
6319 enum reg_class
class;
6321 short *reload_reg_p
;
6323 enum machine_mode mode
;
6326 rtx goaltry
, valtry
, value
, where
;
6332 int goal_mem_addr_varies
= 0;
6333 int need_stable_sp
= 0;
6339 else if (GET_CODE (goal
) == REG
)
6340 regno
= REGNO (goal
);
6341 else if (GET_CODE (goal
) == MEM
)
6343 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6344 if (MEM_VOLATILE_P (goal
))
6346 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
6348 /* An address with side effects must be reexecuted. */
6363 else if (CONSTANT_P (goal
))
6365 else if (GET_CODE (goal
) == PLUS
6366 && XEXP (goal
, 0) == stack_pointer_rtx
6367 && CONSTANT_P (XEXP (goal
, 1)))
6368 goal_const
= need_stable_sp
= 1;
6369 else if (GET_CODE (goal
) == PLUS
6370 && XEXP (goal
, 0) == frame_pointer_rtx
6371 && CONSTANT_P (XEXP (goal
, 1)))
6376 /* Scan insns back from INSN, looking for one that copies
6377 a value into or out of GOAL.
6378 Stop and give up if we reach a label. */
6383 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
6386 if (GET_CODE (p
) == INSN
6387 /* If we don't want spill regs ... */
6388 && (! (reload_reg_p
!= 0
6389 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6390 /* ... then ignore insns introduced by reload; they aren't
6391 useful and can cause results in reload_as_needed to be
6392 different from what they were when calculating the need for
6393 spills. If we notice an input-reload insn here, we will
6394 reject it below, but it might hide a usable equivalent.
6395 That makes bad code. It may even abort: perhaps no reg was
6396 spilled for this insn because it was assumed we would find
6398 || INSN_UID (p
) < reload_first_uid
))
6401 pat
= single_set (p
);
6403 /* First check for something that sets some reg equal to GOAL. */
6406 && true_regnum (SET_SRC (pat
)) == regno
6407 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6410 && true_regnum (SET_DEST (pat
)) == regno
6411 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6413 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6414 /* When looking for stack pointer + const,
6415 make sure we don't use a stack adjust. */
6416 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6417 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6419 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6420 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6422 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6423 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6424 /* If we are looking for a constant,
6425 and something equivalent to that constant was copied
6426 into a reg, we can use that reg. */
6427 || (goal_const
&& REG_NOTES (p
) != 0
6428 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6429 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6431 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6432 || (GET_CODE (SET_DEST (pat
)) == REG
6433 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6434 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6436 && GET_CODE (goal
) == CONST_INT
6438 = operand_subword (XEXP (tem
, 0), 0, 0,
6440 && rtx_equal_p (goal
, goaltry
)
6442 = operand_subword (SET_DEST (pat
), 0, 0,
6444 && (valueno
= true_regnum (valtry
)) >= 0)))
6445 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6447 && GET_CODE (SET_DEST (pat
)) == REG
6448 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6449 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6451 && GET_CODE (goal
) == CONST_INT
6452 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6454 && rtx_equal_p (goal
, goaltry
)
6456 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6457 && (valueno
= true_regnum (valtry
)) >= 0)))
6461 if (valueno
!= other
)
6464 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6470 for (i
= HARD_REGNO_NREGS (valueno
, mode
) - 1; i
>= 0; i
--)
6471 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6484 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6485 (or copying VALUE into GOAL, if GOAL is also a register).
6486 Now verify that VALUE is really valid. */
6488 /* VALUENO is the register number of VALUE; a hard register. */
6490 /* Don't try to re-use something that is killed in this insn. We want
6491 to be able to trust REG_UNUSED notes. */
6492 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6495 /* If we propose to get the value from the stack pointer or if GOAL is
6496 a MEM based on the stack pointer, we need a stable SP. */
6497 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6498 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6502 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6503 if (GET_MODE (value
) != mode
)
6506 /* Reject VALUE if it was loaded from GOAL
6507 and is also a register that appears in the address of GOAL. */
6509 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6510 && refers_to_regno_for_reload_p (valueno
,
6512 + HARD_REGNO_NREGS (valueno
, mode
)),
6516 /* Reject registers that overlap GOAL. */
6518 if (!goal_mem
&& !goal_const
6519 && regno
+ (int) HARD_REGNO_NREGS (regno
, mode
) > valueno
6520 && regno
< valueno
+ (int) HARD_REGNO_NREGS (valueno
, mode
))
6523 nregs
= HARD_REGNO_NREGS (regno
, mode
);
6524 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
6526 /* Reject VALUE if it is one of the regs reserved for reloads.
6527 Reload1 knows how to reuse them anyway, and it would get
6528 confused if we allocated one without its knowledge.
6529 (Now that insns introduced by reload are ignored above,
6530 this case shouldn't happen, but I'm not positive.) */
6532 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6535 for (i
= 0; i
< valuenregs
; ++i
)
6536 if (reload_reg_p
[valueno
+ i
] >= 0)
6540 /* Reject VALUE if it is a register being used for an input reload
6541 even if it is not one of those reserved. */
6543 if (reload_reg_p
!= 0)
6546 for (i
= 0; i
< n_reloads
; i
++)
6547 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6549 int regno1
= REGNO (rld
[i
].reg_rtx
);
6550 int nregs1
= HARD_REGNO_NREGS (regno1
,
6551 GET_MODE (rld
[i
].reg_rtx
));
6552 if (regno1
< valueno
+ valuenregs
6553 && regno1
+ nregs1
> valueno
)
6559 /* We must treat frame pointer as varying here,
6560 since it can vary--in a nonlocal goto as generated by expand_goto. */
6561 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6563 /* Now verify that the values of GOAL and VALUE remain unaltered
6564 until INSN is reached. */
6573 /* Don't trust the conversion past a function call
6574 if either of the two is in a call-clobbered register, or memory. */
6575 if (GET_CODE (p
) == CALL_INSN
)
6579 if (goal_mem
|| need_stable_sp
)
6582 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6583 for (i
= 0; i
< nregs
; ++i
)
6584 if (call_used_regs
[regno
+ i
])
6587 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6588 for (i
= 0; i
< valuenregs
; ++i
)
6589 if (call_used_regs
[valueno
+ i
])
6591 #ifdef NON_SAVING_SETJMP
6592 if (NON_SAVING_SETJMP
&& find_reg_note (p
, REG_SETJMP
, NULL
))
6601 /* Watch out for unspec_volatile, and volatile asms. */
6602 if (volatile_insn_p (pat
))
6605 /* If this insn P stores in either GOAL or VALUE, return 0.
6606 If GOAL is a memory ref and this insn writes memory, return 0.
6607 If GOAL is a memory ref and its address is not constant,
6608 and this insn P changes a register used in GOAL, return 0. */
6610 if (GET_CODE (pat
) == COND_EXEC
)
6611 pat
= COND_EXEC_CODE (pat
);
6612 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6614 rtx dest
= SET_DEST (pat
);
6615 while (GET_CODE (dest
) == SUBREG
6616 || GET_CODE (dest
) == ZERO_EXTRACT
6617 || GET_CODE (dest
) == SIGN_EXTRACT
6618 || GET_CODE (dest
) == STRICT_LOW_PART
)
6619 dest
= XEXP (dest
, 0);
6620 if (GET_CODE (dest
) == REG
)
6622 int xregno
= REGNO (dest
);
6624 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6625 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6628 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6630 if (xregno
< valueno
+ valuenregs
6631 && xregno
+ xnregs
> valueno
)
6633 if (goal_mem_addr_varies
6634 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6636 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6639 else if (goal_mem
&& GET_CODE (dest
) == MEM
6640 && ! push_operand (dest
, GET_MODE (dest
)))
6642 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6643 && reg_equiv_memory_loc
[regno
] != 0)
6645 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6648 else if (GET_CODE (pat
) == PARALLEL
)
6651 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6653 rtx v1
= XVECEXP (pat
, 0, i
);
6654 if (GET_CODE (v1
) == COND_EXEC
)
6655 v1
= COND_EXEC_CODE (v1
);
6656 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6658 rtx dest
= SET_DEST (v1
);
6659 while (GET_CODE (dest
) == SUBREG
6660 || GET_CODE (dest
) == ZERO_EXTRACT
6661 || GET_CODE (dest
) == SIGN_EXTRACT
6662 || GET_CODE (dest
) == STRICT_LOW_PART
)
6663 dest
= XEXP (dest
, 0);
6664 if (GET_CODE (dest
) == REG
)
6666 int xregno
= REGNO (dest
);
6668 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6669 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6672 if (xregno
< regno
+ nregs
6673 && xregno
+ xnregs
> regno
)
6675 if (xregno
< valueno
+ valuenregs
6676 && xregno
+ xnregs
> valueno
)
6678 if (goal_mem_addr_varies
6679 && reg_overlap_mentioned_for_reload_p (dest
,
6682 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6685 else if (goal_mem
&& GET_CODE (dest
) == MEM
6686 && ! push_operand (dest
, GET_MODE (dest
)))
6688 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6689 && reg_equiv_memory_loc
[regno
] != 0)
6691 else if (need_stable_sp
6692 && push_operand (dest
, GET_MODE (dest
)))
6698 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6702 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6703 link
= XEXP (link
, 1))
6705 pat
= XEXP (link
, 0);
6706 if (GET_CODE (pat
) == CLOBBER
)
6708 rtx dest
= SET_DEST (pat
);
6710 if (GET_CODE (dest
) == REG
)
6712 int xregno
= REGNO (dest
);
6714 = HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6716 if (xregno
< regno
+ nregs
6717 && xregno
+ xnregs
> regno
)
6719 else if (xregno
< valueno
+ valuenregs
6720 && xregno
+ xnregs
> valueno
)
6722 else if (goal_mem_addr_varies
6723 && reg_overlap_mentioned_for_reload_p (dest
,
6728 else if (goal_mem
&& GET_CODE (dest
) == MEM
6729 && ! push_operand (dest
, GET_MODE (dest
)))
6731 else if (need_stable_sp
6732 && push_operand (dest
, GET_MODE (dest
)))
6739 /* If this insn auto-increments or auto-decrements
6740 either regno or valueno, return 0 now.
6741 If GOAL is a memory ref and its address is not constant,
6742 and this insn P increments a register used in GOAL, return 0. */
6746 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6747 if (REG_NOTE_KIND (link
) == REG_INC
6748 && GET_CODE (XEXP (link
, 0)) == REG
)
6750 int incno
= REGNO (XEXP (link
, 0));
6751 if (incno
< regno
+ nregs
&& incno
>= regno
)
6753 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6755 if (goal_mem_addr_varies
6756 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6766 /* Find a place where INCED appears in an increment or decrement operator
6767 within X, and return the amount INCED is incremented or decremented by.
6768 The value is always positive. */
6771 find_inc_amount (x
, inced
)
6774 enum rtx_code code
= GET_CODE (x
);
6780 rtx addr
= XEXP (x
, 0);
6781 if ((GET_CODE (addr
) == PRE_DEC
6782 || GET_CODE (addr
) == POST_DEC
6783 || GET_CODE (addr
) == PRE_INC
6784 || GET_CODE (addr
) == POST_INC
)
6785 && XEXP (addr
, 0) == inced
)
6786 return GET_MODE_SIZE (GET_MODE (x
));
6787 else if ((GET_CODE (addr
) == PRE_MODIFY
6788 || GET_CODE (addr
) == POST_MODIFY
)
6789 && GET_CODE (XEXP (addr
, 1)) == PLUS
6790 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
6791 && XEXP (addr
, 0) == inced
6792 && GET_CODE (XEXP (XEXP (addr
, 1), 1)) == CONST_INT
)
6794 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
6795 return i
< 0 ? -i
: i
;
6799 fmt
= GET_RTX_FORMAT (code
);
6800 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6804 int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6811 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6813 int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6823 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6824 If SETS is nonzero, also consider SETs. */
6827 regno_clobbered_p (regno
, insn
, mode
, sets
)
6830 enum machine_mode mode
;
6833 unsigned int nregs
= HARD_REGNO_NREGS (regno
, mode
);
6834 unsigned int endregno
= regno
+ nregs
;
6836 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
6837 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6838 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6840 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
6842 return test
>= regno
&& test
< endregno
;
6845 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6847 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6851 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6852 if ((GET_CODE (elt
) == CLOBBER
6853 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6854 && GET_CODE (XEXP (elt
, 0)) == REG
)
6856 unsigned int test
= REGNO (XEXP (elt
, 0));
6858 if (test
>= regno
&& test
< endregno
)
6867 static const char *const reload_when_needed_name
[] =
6870 "RELOAD_FOR_OUTPUT",
6872 "RELOAD_FOR_INPUT_ADDRESS",
6873 "RELOAD_FOR_INPADDR_ADDRESS",
6874 "RELOAD_FOR_OUTPUT_ADDRESS",
6875 "RELOAD_FOR_OUTADDR_ADDRESS",
6876 "RELOAD_FOR_OPERAND_ADDRESS",
6877 "RELOAD_FOR_OPADDR_ADDR",
6879 "RELOAD_FOR_OTHER_ADDRESS"
6882 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
6884 /* These functions are used to print the variables set by 'find_reloads' */
6887 debug_reload_to_stream (f
)
6895 for (r
= 0; r
< n_reloads
; r
++)
6897 fprintf (f
, "Reload %d: ", r
);
6901 fprintf (f
, "reload_in (%s) = ",
6902 GET_MODE_NAME (rld
[r
].inmode
));
6903 print_inline_rtx (f
, rld
[r
].in
, 24);
6904 fprintf (f
, "\n\t");
6907 if (rld
[r
].out
!= 0)
6909 fprintf (f
, "reload_out (%s) = ",
6910 GET_MODE_NAME (rld
[r
].outmode
));
6911 print_inline_rtx (f
, rld
[r
].out
, 24);
6912 fprintf (f
, "\n\t");
6915 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
6917 fprintf (f
, "%s (opnum = %d)",
6918 reload_when_needed_name
[(int) rld
[r
].when_needed
],
6921 if (rld
[r
].optional
)
6922 fprintf (f
, ", optional");
6924 if (rld
[r
].nongroup
)
6925 fprintf (f
, ", nongroup");
6927 if (rld
[r
].inc
!= 0)
6928 fprintf (f
, ", inc by %d", rld
[r
].inc
);
6930 if (rld
[r
].nocombine
)
6931 fprintf (f
, ", can't combine");
6933 if (rld
[r
].secondary_p
)
6934 fprintf (f
, ", secondary_reload_p");
6936 if (rld
[r
].in_reg
!= 0)
6938 fprintf (f
, "\n\treload_in_reg: ");
6939 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
6942 if (rld
[r
].out_reg
!= 0)
6944 fprintf (f
, "\n\treload_out_reg: ");
6945 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
6948 if (rld
[r
].reg_rtx
!= 0)
6950 fprintf (f
, "\n\treload_reg_rtx: ");
6951 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
6955 if (rld
[r
].secondary_in_reload
!= -1)
6957 fprintf (f
, "%ssecondary_in_reload = %d",
6958 prefix
, rld
[r
].secondary_in_reload
);
6962 if (rld
[r
].secondary_out_reload
!= -1)
6963 fprintf (f
, "%ssecondary_out_reload = %d\n",
6964 prefix
, rld
[r
].secondary_out_reload
);
6967 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
6969 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
6970 insn_data
[rld
[r
].secondary_in_icode
].name
);
6974 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
6975 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
6976 insn_data
[rld
[r
].secondary_out_icode
].name
);
6985 debug_reload_to_stream (stderr
);