IA MCU psABI support: changes to libraries
[gcc.git] / gcc / reorg.c
1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992-2015 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
4 Hacked by Michael Tiemann (tiemann@cygnus.com).
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 /* Instruction reorganization pass.
23
24 This pass runs after register allocation and final jump
25 optimization. It should be the last pass to run before peephole.
26 It serves primarily to fill delay slots of insns, typically branch
27 and call insns. Other insns typically involve more complicated
28 interactions of data dependencies and resource constraints, and
29 are better handled by scheduling before register allocation (by the
30 function `schedule_insns').
31
32 The Branch Penalty is the number of extra cycles that are needed to
33 execute a branch insn. On an ideal machine, branches take a single
34 cycle, and the Branch Penalty is 0. Several RISC machines approach
35 branch delays differently:
36
37 The MIPS has a single branch delay slot. Most insns
38 (except other branches) can be used to fill this slot. When the
39 slot is filled, two insns execute in two cycles, reducing the
40 branch penalty to zero.
41
42 The SPARC always has a branch delay slot, but its effects can be
43 annulled when the branch is not taken. This means that failing to
44 find other sources of insns, we can hoist an insn from the branch
45 target that would only be safe to execute knowing that the branch
46 is taken.
47
48 The HP-PA always has a branch delay slot. For unconditional branches
49 its effects can be annulled when the branch is taken. The effects
50 of the delay slot in a conditional branch can be nullified for forward
51 taken branches, or for untaken backward branches. This means
52 we can hoist insns from the fall-through path for forward branches or
53 steal insns from the target of backward branches.
54
55 The TMS320C3x and C4x have three branch delay slots. When the three
56 slots are filled, the branch penalty is zero. Most insns can fill the
57 delay slots except jump insns.
58
59 Three techniques for filling delay slots have been implemented so far:
60
61 (1) `fill_simple_delay_slots' is the simplest, most efficient way
62 to fill delay slots. This pass first looks for insns which come
63 from before the branch and which are safe to execute after the
64 branch. Then it searches after the insn requiring delay slots or,
65 in the case of a branch, for insns that are after the point at
66 which the branch merges into the fallthrough code, if such a point
67 exists. When such insns are found, the branch penalty decreases
68 and no code expansion takes place.
69
70 (2) `fill_eager_delay_slots' is more complicated: it is used for
71 scheduling conditional jumps, or for scheduling jumps which cannot
72 be filled using (1). A machine need not have annulled jumps to use
73 this strategy, but it helps (by keeping more options open).
74 `fill_eager_delay_slots' tries to guess the direction the branch
75 will go; if it guesses right 100% of the time, it can reduce the
76 branch penalty as much as `fill_simple_delay_slots' does. If it
77 guesses wrong 100% of the time, it might as well schedule nops. When
78 `fill_eager_delay_slots' takes insns from the fall-through path of
79 the jump, usually there is no code expansion; when it takes insns
80 from the branch target, there is code expansion if it is not the
81 only way to reach that target.
82
83 (3) `relax_delay_slots' uses a set of rules to simplify code that
84 has been reorganized by (1) and (2). It finds cases where
85 conditional test can be eliminated, jumps can be threaded, extra
86 insns can be eliminated, etc. It is the job of (1) and (2) to do a
87 good job of scheduling locally; `relax_delay_slots' takes care of
88 making the various individual schedules work well together. It is
89 especially tuned to handle the control flow interactions of branch
90 insns. It does nothing for insns with delay slots that do not
91 branch.
92
93 On machines that use CC0, we are very conservative. We will not make
94 a copy of an insn involving CC0 since we want to maintain a 1-1
95 correspondence between the insn that sets and uses CC0. The insns are
96 allowed to be separated by placing an insn that sets CC0 (but not an insn
97 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
98 delay slot. In that case, we point each insn at the other with REG_CC_USER
99 and REG_CC_SETTER notes. Note that these restrictions affect very few
100 machines because most RISC machines with delay slots will not use CC0
101 (the RT is the only known exception at this point). */
102
103 #include "config.h"
104 #include "system.h"
105 #include "coretypes.h"
106 #include "tm.h"
107 #include "diagnostic-core.h"
108 #include "rtl.h"
109 #include "tm_p.h"
110 #include "symtab.h"
111 #include "hard-reg-set.h"
112 #include "function.h"
113 #include "flags.h"
114 #include "alias.h"
115 #include "tree.h"
116 #include "insn-config.h"
117 #include "expmed.h"
118 #include "dojump.h"
119 #include "explow.h"
120 #include "calls.h"
121 #include "emit-rtl.h"
122 #include "varasm.h"
123 #include "stmt.h"
124 #include "expr.h"
125 #include "conditions.h"
126 #include "predict.h"
127 #include "dominance.h"
128 #include "cfg.h"
129 #include "basic-block.h"
130 #include "regs.h"
131 #include "recog.h"
132 #include "obstack.h"
133 #include "insn-attr.h"
134 #include "resource.h"
135 #include "except.h"
136 #include "params.h"
137 #include "target.h"
138 #include "tree-pass.h"
139
140 #ifdef DELAY_SLOTS
141
142 #ifndef ANNUL_IFTRUE_SLOTS
143 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
144 #endif
145 #ifndef ANNUL_IFFALSE_SLOTS
146 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
147 #endif
148
149 \f
150 /* First, some functions that were used before GCC got a control flow graph.
151 These functions are now only used here in reorg.c, and have therefore
152 been moved here to avoid inadvertent misuse elsewhere in the compiler. */
153
154 /* Return the last label to mark the same position as LABEL. Return LABEL
155 itself if it is null or any return rtx. */
156
157 static rtx
158 skip_consecutive_labels (rtx label_or_return)
159 {
160 rtx_insn *insn;
161
162 if (label_or_return && ANY_RETURN_P (label_or_return))
163 return label_or_return;
164
165 rtx_insn *label = as_a <rtx_insn *> (label_or_return);
166
167 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
168 if (LABEL_P (insn))
169 label = insn;
170
171 return label;
172 }
173
174 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
175 and REG_CC_USER notes so we can find it. */
176
177 static void
178 link_cc0_insns (rtx_insn *insn)
179 {
180 rtx user = next_nonnote_insn (insn);
181
182 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
183 user = XVECEXP (PATTERN (user), 0, 0);
184
185 add_reg_note (user, REG_CC_SETTER, insn);
186 add_reg_note (insn, REG_CC_USER, user);
187 }
188 \f
189 /* Insns which have delay slots that have not yet been filled. */
190
191 static struct obstack unfilled_slots_obstack;
192 static rtx *unfilled_firstobj;
193
194 /* Define macros to refer to the first and last slot containing unfilled
195 insns. These are used because the list may move and its address
196 should be recomputed at each use. */
197
198 #define unfilled_slots_base \
199 ((rtx_insn **) obstack_base (&unfilled_slots_obstack))
200
201 #define unfilled_slots_next \
202 ((rtx_insn **) obstack_next_free (&unfilled_slots_obstack))
203
204 /* Points to the label before the end of the function, or before a
205 return insn. */
206 static rtx_code_label *function_return_label;
207 /* Likewise for a simple_return. */
208 static rtx_code_label *function_simple_return_label;
209
210 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
211 not always monotonically increase. */
212 static int *uid_to_ruid;
213
214 /* Highest valid index in `uid_to_ruid'. */
215 static int max_uid;
216
217 static int stop_search_p (rtx_insn *, int);
218 static int resource_conflicts_p (struct resources *, struct resources *);
219 static int insn_references_resource_p (rtx, struct resources *, bool);
220 static int insn_sets_resource_p (rtx, struct resources *, bool);
221 static rtx_code_label *find_end_label (rtx);
222 static rtx_insn *emit_delay_sequence (rtx_insn *, rtx_insn_list *, int);
223 static rtx_insn_list *add_to_delay_list (rtx_insn *, rtx_insn_list *);
224 static rtx_insn *delete_from_delay_slot (rtx_insn *);
225 static void delete_scheduled_jump (rtx_insn *);
226 static void note_delay_statistics (int, int);
227 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
228 static rtx_insn_list *optimize_skip (rtx_jump_insn *);
229 #endif
230 static int get_jump_flags (const rtx_insn *, rtx);
231 static int mostly_true_jump (rtx);
232 static rtx get_branch_condition (const rtx_insn *, rtx);
233 static int condition_dominates_p (rtx, const rtx_insn *);
234 static int redirect_with_delay_slots_safe_p (rtx_insn *, rtx, rtx);
235 static int redirect_with_delay_list_safe_p (rtx_insn *, rtx, rtx_insn_list *);
236 static int check_annul_list_true_false (int, rtx);
237 static rtx_insn_list *steal_delay_list_from_target (rtx_insn *, rtx,
238 rtx_sequence *,
239 rtx_insn_list *,
240 struct resources *,
241 struct resources *,
242 struct resources *,
243 int, int *, int *,
244 rtx *);
245 static rtx_insn_list *steal_delay_list_from_fallthrough (rtx_insn *, rtx,
246 rtx_sequence *,
247 rtx_insn_list *,
248 struct resources *,
249 struct resources *,
250 struct resources *,
251 int, int *, int *);
252 static void try_merge_delay_insns (rtx_insn *, rtx_insn *);
253 static rtx redundant_insn (rtx, rtx_insn *, rtx);
254 static int own_thread_p (rtx, rtx, int);
255 static void update_block (rtx_insn *, rtx);
256 static int reorg_redirect_jump (rtx_jump_insn *, rtx);
257 static void update_reg_dead_notes (rtx_insn *, rtx_insn *);
258 static void fix_reg_dead_note (rtx, rtx);
259 static void update_reg_unused_notes (rtx, rtx);
260 static void fill_simple_delay_slots (int);
261 static rtx_insn_list *fill_slots_from_thread (rtx_jump_insn *, rtx, rtx, rtx,
262 int, int, int, int,
263 int *, rtx_insn_list *);
264 static void fill_eager_delay_slots (void);
265 static void relax_delay_slots (rtx_insn *);
266 static void make_return_insns (rtx_insn *);
267 \f
268 /* A wrapper around next_active_insn which takes care to return ret_rtx
269 unchanged. */
270
271 static rtx
272 first_active_target_insn (rtx insn)
273 {
274 if (ANY_RETURN_P (insn))
275 return insn;
276 return next_active_insn (as_a <rtx_insn *> (insn));
277 }
278 \f
279 /* Return true iff INSN is a simplejump, or any kind of return insn. */
280
281 static bool
282 simplejump_or_return_p (rtx insn)
283 {
284 return (JUMP_P (insn)
285 && (simplejump_p (as_a <rtx_insn *> (insn))
286 || ANY_RETURN_P (PATTERN (insn))));
287 }
288 \f
289 /* Return TRUE if this insn should stop the search for insn to fill delay
290 slots. LABELS_P indicates that labels should terminate the search.
291 In all cases, jumps terminate the search. */
292
293 static int
294 stop_search_p (rtx_insn *insn, int labels_p)
295 {
296 if (insn == 0)
297 return 1;
298
299 /* If the insn can throw an exception that is caught within the function,
300 it may effectively perform a jump from the viewpoint of the function.
301 Therefore act like for a jump. */
302 if (can_throw_internal (insn))
303 return 1;
304
305 switch (GET_CODE (insn))
306 {
307 case NOTE:
308 case CALL_INSN:
309 return 0;
310
311 case CODE_LABEL:
312 return labels_p;
313
314 case JUMP_INSN:
315 case BARRIER:
316 return 1;
317
318 case INSN:
319 /* OK unless it contains a delay slot or is an `asm' insn of some type.
320 We don't know anything about these. */
321 return (GET_CODE (PATTERN (insn)) == SEQUENCE
322 || GET_CODE (PATTERN (insn)) == ASM_INPUT
323 || asm_noperands (PATTERN (insn)) >= 0);
324
325 default:
326 gcc_unreachable ();
327 }
328 }
329 \f
330 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
331 resource set contains a volatile memory reference. Otherwise, return FALSE. */
332
333 static int
334 resource_conflicts_p (struct resources *res1, struct resources *res2)
335 {
336 if ((res1->cc && res2->cc) || (res1->memory && res2->memory)
337 || res1->volatil || res2->volatil)
338 return 1;
339
340 return hard_reg_set_intersect_p (res1->regs, res2->regs);
341 }
342
343 /* Return TRUE if any resource marked in RES, a `struct resources', is
344 referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called
345 routine is using those resources.
346
347 We compute this by computing all the resources referenced by INSN and
348 seeing if this conflicts with RES. It might be faster to directly check
349 ourselves, and this is the way it used to work, but it means duplicating
350 a large block of complex code. */
351
352 static int
353 insn_references_resource_p (rtx insn, struct resources *res,
354 bool include_delayed_effects)
355 {
356 struct resources insn_res;
357
358 CLEAR_RESOURCE (&insn_res);
359 mark_referenced_resources (insn, &insn_res, include_delayed_effects);
360 return resource_conflicts_p (&insn_res, res);
361 }
362
363 /* Return TRUE if INSN modifies resources that are marked in RES.
364 INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be
365 included. CC0 is only modified if it is explicitly set; see comments
366 in front of mark_set_resources for details. */
367
368 static int
369 insn_sets_resource_p (rtx insn, struct resources *res,
370 bool include_delayed_effects)
371 {
372 struct resources insn_sets;
373
374 CLEAR_RESOURCE (&insn_sets);
375 mark_set_resources (insn, &insn_sets, 0,
376 (include_delayed_effects
377 ? MARK_SRC_DEST_CALL
378 : MARK_SRC_DEST));
379 return resource_conflicts_p (&insn_sets, res);
380 }
381 \f
382 /* Find a label at the end of the function or before a RETURN. If there
383 is none, try to make one. If that fails, returns 0.
384
385 The property of such a label is that it is placed just before the
386 epilogue or a bare RETURN insn, so that another bare RETURN can be
387 turned into a jump to the label unconditionally. In particular, the
388 label cannot be placed before a RETURN insn with a filled delay slot.
389
390 ??? There may be a problem with the current implementation. Suppose
391 we start with a bare RETURN insn and call find_end_label. It may set
392 function_return_label just before the RETURN. Suppose the machinery
393 is able to fill the delay slot of the RETURN insn afterwards. Then
394 function_return_label is no longer valid according to the property
395 described above and find_end_label will still return it unmodified.
396 Note that this is probably mitigated by the following observation:
397 once function_return_label is made, it is very likely the target of
398 a jump, so filling the delay slot of the RETURN will be much more
399 difficult.
400 KIND is either simple_return_rtx or ret_rtx, indicating which type of
401 return we're looking for. */
402
403 static rtx_code_label *
404 find_end_label (rtx kind)
405 {
406 rtx_insn *insn;
407 rtx_code_label **plabel;
408
409 if (kind == ret_rtx)
410 plabel = &function_return_label;
411 else
412 {
413 gcc_assert (kind == simple_return_rtx);
414 plabel = &function_simple_return_label;
415 }
416
417 /* If we found one previously, return it. */
418 if (*plabel)
419 return *plabel;
420
421 /* Otherwise, see if there is a label at the end of the function. If there
422 is, it must be that RETURN insns aren't needed, so that is our return
423 label and we don't have to do anything else. */
424
425 insn = get_last_insn ();
426 while (NOTE_P (insn)
427 || (NONJUMP_INSN_P (insn)
428 && (GET_CODE (PATTERN (insn)) == USE
429 || GET_CODE (PATTERN (insn)) == CLOBBER)))
430 insn = PREV_INSN (insn);
431
432 /* When a target threads its epilogue we might already have a
433 suitable return insn. If so put a label before it for the
434 function_return_label. */
435 if (BARRIER_P (insn)
436 && JUMP_P (PREV_INSN (insn))
437 && PATTERN (PREV_INSN (insn)) == kind)
438 {
439 rtx_insn *temp = PREV_INSN (PREV_INSN (insn));
440 rtx_code_label *label = gen_label_rtx ();
441 LABEL_NUSES (label) = 0;
442
443 /* Put the label before any USE insns that may precede the RETURN
444 insn. */
445 while (GET_CODE (temp) == USE)
446 temp = PREV_INSN (temp);
447
448 emit_label_after (label, temp);
449 *plabel = label;
450 }
451
452 else if (LABEL_P (insn))
453 *plabel = as_a <rtx_code_label *> (insn);
454 else
455 {
456 rtx_code_label *label = gen_label_rtx ();
457 LABEL_NUSES (label) = 0;
458 /* If the basic block reorder pass moves the return insn to
459 some other place try to locate it again and put our
460 function_return_label there. */
461 while (insn && ! (JUMP_P (insn) && (PATTERN (insn) == kind)))
462 insn = PREV_INSN (insn);
463 if (insn)
464 {
465 insn = PREV_INSN (insn);
466
467 /* Put the label before any USE insns that may precede the
468 RETURN insn. */
469 while (GET_CODE (insn) == USE)
470 insn = PREV_INSN (insn);
471
472 emit_label_after (label, insn);
473 }
474 else
475 {
476 if (HAVE_epilogue && ! targetm.have_return ())
477 /* The RETURN insn has its delay slot filled so we cannot
478 emit the label just before it. Since we already have
479 an epilogue and cannot emit a new RETURN, we cannot
480 emit the label at all. */
481 return NULL;
482
483 /* Otherwise, make a new label and emit a RETURN and BARRIER,
484 if needed. */
485 emit_label (label);
486 if (targetm.have_return ())
487 {
488 /* The return we make may have delay slots too. */
489 rtx_insn *pat = targetm.gen_return ();
490 rtx_insn *insn = emit_jump_insn (pat);
491 set_return_jump_label (insn);
492 emit_barrier ();
493 if (num_delay_slots (insn) > 0)
494 obstack_ptr_grow (&unfilled_slots_obstack, insn);
495 }
496 }
497 *plabel = label;
498 }
499
500 /* Show one additional use for this label so it won't go away until
501 we are done. */
502 ++LABEL_NUSES (*plabel);
503
504 return *plabel;
505 }
506 \f
507 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
508 the pattern of INSN with the SEQUENCE.
509
510 Returns the insn containing the SEQUENCE that replaces INSN. */
511
512 static rtx_insn *
513 emit_delay_sequence (rtx_insn *insn, rtx_insn_list *list, int length)
514 {
515 /* Allocate the rtvec to hold the insns and the SEQUENCE. */
516 rtvec seqv = rtvec_alloc (length + 1);
517 rtx seq = gen_rtx_SEQUENCE (VOIDmode, seqv);
518 rtx_insn *seq_insn = make_insn_raw (seq);
519
520 /* If DELAY_INSN has a location, use it for SEQ_INSN. If DELAY_INSN does
521 not have a location, but one of the delayed insns does, we pick up a
522 location from there later. */
523 INSN_LOCATION (seq_insn) = INSN_LOCATION (insn);
524
525 /* Unlink INSN from the insn chain, so that we can put it into
526 the SEQUENCE. Remember where we want to emit SEQUENCE in AFTER. */
527 rtx_insn *after = PREV_INSN (insn);
528 remove_insn (insn);
529 SET_NEXT_INSN (insn) = SET_PREV_INSN (insn) = NULL;
530
531 /* Build our SEQUENCE and rebuild the insn chain. */
532 int i = 1;
533 start_sequence ();
534 XVECEXP (seq, 0, 0) = emit_insn (insn);
535 for (rtx_insn_list *li = list; li; li = li->next (), i++)
536 {
537 rtx_insn *tem = li->insn ();
538 rtx note, next;
539
540 /* Show that this copy of the insn isn't deleted. */
541 tem->set_undeleted ();
542
543 /* Unlink insn from its original place, and re-emit it into
544 the sequence. */
545 SET_NEXT_INSN (tem) = SET_PREV_INSN (tem) = NULL;
546 XVECEXP (seq, 0, i) = emit_insn (tem);
547
548 /* SPARC assembler, for instance, emit warning when debug info is output
549 into the delay slot. */
550 if (INSN_LOCATION (tem) && !INSN_LOCATION (seq_insn))
551 INSN_LOCATION (seq_insn) = INSN_LOCATION (tem);
552 INSN_LOCATION (tem) = 0;
553
554 for (note = REG_NOTES (tem); note; note = next)
555 {
556 next = XEXP (note, 1);
557 switch (REG_NOTE_KIND (note))
558 {
559 case REG_DEAD:
560 /* Remove any REG_DEAD notes because we can't rely on them now
561 that the insn has been moved. */
562 remove_note (tem, note);
563 break;
564
565 case REG_LABEL_OPERAND:
566 case REG_LABEL_TARGET:
567 /* Keep the label reference count up to date. */
568 if (LABEL_P (XEXP (note, 0)))
569 LABEL_NUSES (XEXP (note, 0)) ++;
570 break;
571
572 default:
573 break;
574 }
575 }
576 }
577 end_sequence ();
578 gcc_assert (i == length + 1);
579
580 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
581 add_insn_after (seq_insn, after, NULL);
582
583 return seq_insn;
584 }
585
586 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
587 be in the order in which the insns are to be executed. */
588
589 static rtx_insn_list *
590 add_to_delay_list (rtx_insn *insn, rtx_insn_list *delay_list)
591 {
592 /* If we have an empty list, just make a new list element. If
593 INSN has its block number recorded, clear it since we may
594 be moving the insn to a new block. */
595
596 if (delay_list == 0)
597 {
598 clear_hashed_info_for_insn (insn);
599 return gen_rtx_INSN_LIST (VOIDmode, insn, NULL_RTX);
600 }
601
602 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
603 list. */
604 XEXP (delay_list, 1) = add_to_delay_list (insn, delay_list->next ());
605
606 return delay_list;
607 }
608 \f
609 /* Delete INSN from the delay slot of the insn that it is in, which may
610 produce an insn with no delay slots. Return the new insn. */
611
612 static rtx_insn *
613 delete_from_delay_slot (rtx_insn *insn)
614 {
615 rtx_insn *trial, *seq_insn, *prev;
616 rtx_sequence *seq;
617 rtx_insn_list *delay_list = 0;
618 int i;
619 int had_barrier = 0;
620
621 /* We first must find the insn containing the SEQUENCE with INSN in its
622 delay slot. Do this by finding an insn, TRIAL, where
623 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
624
625 for (trial = insn;
626 PREV_INSN (NEXT_INSN (trial)) == trial;
627 trial = NEXT_INSN (trial))
628 ;
629
630 seq_insn = PREV_INSN (NEXT_INSN (trial));
631 seq = as_a <rtx_sequence *> (PATTERN (seq_insn));
632
633 if (NEXT_INSN (seq_insn) && BARRIER_P (NEXT_INSN (seq_insn)))
634 had_barrier = 1;
635
636 /* Create a delay list consisting of all the insns other than the one
637 we are deleting (unless we were the only one). */
638 if (seq->len () > 2)
639 for (i = 1; i < seq->len (); i++)
640 if (seq->insn (i) != insn)
641 delay_list = add_to_delay_list (seq->insn (i), delay_list);
642
643 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
644 list, and rebuild the delay list if non-empty. */
645 prev = PREV_INSN (seq_insn);
646 trial = seq->insn (0);
647 delete_related_insns (seq_insn);
648 add_insn_after (trial, prev, NULL);
649
650 /* If there was a barrier after the old SEQUENCE, remit it. */
651 if (had_barrier)
652 emit_barrier_after (trial);
653
654 /* If there are any delay insns, remit them. Otherwise clear the
655 annul flag. */
656 if (delay_list)
657 trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2);
658 else if (JUMP_P (trial))
659 INSN_ANNULLED_BRANCH_P (trial) = 0;
660
661 INSN_FROM_TARGET_P (insn) = 0;
662
663 /* Show we need to fill this insn again. */
664 obstack_ptr_grow (&unfilled_slots_obstack, trial);
665
666 return trial;
667 }
668 \f
669 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
670 the insn that sets CC0 for it and delete it too. */
671
672 static void
673 delete_scheduled_jump (rtx_insn *insn)
674 {
675 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
676 delete the insn that sets the condition code, but it is hard to find it.
677 Since this case is rare anyway, don't bother trying; there would likely
678 be other insns that became dead anyway, which we wouldn't know to
679 delete. */
680
681 if (HAVE_cc0 && reg_mentioned_p (cc0_rtx, insn))
682 {
683 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
684
685 /* If a reg-note was found, it points to an insn to set CC0. This
686 insn is in the delay list of some other insn. So delete it from
687 the delay list it was in. */
688 if (note)
689 {
690 if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
691 && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
692 delete_from_delay_slot (as_a <rtx_insn *> (XEXP (note, 0)));
693 }
694 else
695 {
696 /* The insn setting CC0 is our previous insn, but it may be in
697 a delay slot. It will be the last insn in the delay slot, if
698 it is. */
699 rtx_insn *trial = previous_insn (insn);
700 if (NOTE_P (trial))
701 trial = prev_nonnote_insn (trial);
702 if (sets_cc0_p (PATTERN (trial)) != 1
703 || FIND_REG_INC_NOTE (trial, NULL_RTX))
704 return;
705 if (PREV_INSN (NEXT_INSN (trial)) == trial)
706 delete_related_insns (trial);
707 else
708 delete_from_delay_slot (trial);
709 }
710 }
711
712 delete_related_insns (insn);
713 }
714 \f
715 /* Counters for delay-slot filling. */
716
717 #define NUM_REORG_FUNCTIONS 2
718 #define MAX_DELAY_HISTOGRAM 3
719 #define MAX_REORG_PASSES 2
720
721 static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES];
722
723 static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES];
724
725 static int reorg_pass_number;
726
727 static void
728 note_delay_statistics (int slots_filled, int index)
729 {
730 num_insns_needing_delays[index][reorg_pass_number]++;
731 if (slots_filled > MAX_DELAY_HISTOGRAM)
732 slots_filled = MAX_DELAY_HISTOGRAM;
733 num_filled_delays[index][slots_filled][reorg_pass_number]++;
734 }
735 \f
736 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
737
738 /* Optimize the following cases:
739
740 1. When a conditional branch skips over only one instruction,
741 use an annulling branch and put that insn in the delay slot.
742 Use either a branch that annuls when the condition if true or
743 invert the test with a branch that annuls when the condition is
744 false. This saves insns, since otherwise we must copy an insn
745 from the L1 target.
746
747 (orig) (skip) (otherwise)
748 Bcc.n L1 Bcc',a L1 Bcc,a L1'
749 insn insn insn2
750 L1: L1: L1:
751 insn2 insn2 insn2
752 insn3 insn3 L1':
753 insn3
754
755 2. When a conditional branch skips over only one instruction,
756 and after that, it unconditionally branches somewhere else,
757 perform the similar optimization. This saves executing the
758 second branch in the case where the inverted condition is true.
759
760 Bcc.n L1 Bcc',a L2
761 insn insn
762 L1: L1:
763 Bra L2 Bra L2
764
765 INSN is a JUMP_INSN.
766
767 This should be expanded to skip over N insns, where N is the number
768 of delay slots required. */
769
770 static rtx_insn_list *
771 optimize_skip (rtx_jump_insn *insn)
772 {
773 rtx_insn *trial = next_nonnote_insn (insn);
774 rtx_insn *next_trial = next_active_insn (trial);
775 rtx_insn_list *delay_list = 0;
776 int flags;
777
778 flags = get_jump_flags (insn, JUMP_LABEL (insn));
779
780 if (trial == 0
781 || !NONJUMP_INSN_P (trial)
782 || GET_CODE (PATTERN (trial)) == SEQUENCE
783 || recog_memoized (trial) < 0
784 || (! eligible_for_annul_false (insn, 0, trial, flags)
785 && ! eligible_for_annul_true (insn, 0, trial, flags))
786 || can_throw_internal (trial))
787 return 0;
788
789 /* There are two cases where we are just executing one insn (we assume
790 here that a branch requires only one insn; this should be generalized
791 at some point): Where the branch goes around a single insn or where
792 we have one insn followed by a branch to the same label we branch to.
793 In both of these cases, inverting the jump and annulling the delay
794 slot give the same effect in fewer insns. */
795 if (next_trial == next_active_insn (JUMP_LABEL (insn))
796 || (next_trial != 0
797 && simplejump_or_return_p (next_trial)
798 && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)))
799 {
800 if (eligible_for_annul_false (insn, 0, trial, flags))
801 {
802 if (invert_jump (insn, JUMP_LABEL (insn), 1))
803 INSN_FROM_TARGET_P (trial) = 1;
804 else if (! eligible_for_annul_true (insn, 0, trial, flags))
805 return 0;
806 }
807
808 delay_list = add_to_delay_list (trial, NULL);
809 next_trial = next_active_insn (trial);
810 update_block (trial, trial);
811 delete_related_insns (trial);
812
813 /* Also, if we are targeting an unconditional
814 branch, thread our jump to the target of that branch. Don't
815 change this into a RETURN here, because it may not accept what
816 we have in the delay slot. We'll fix this up later. */
817 if (next_trial && simplejump_or_return_p (next_trial))
818 {
819 rtx target_label = JUMP_LABEL (next_trial);
820 if (ANY_RETURN_P (target_label))
821 target_label = find_end_label (target_label);
822
823 if (target_label)
824 {
825 /* Recompute the flags based on TARGET_LABEL since threading
826 the jump to TARGET_LABEL may change the direction of the
827 jump (which may change the circumstances in which the
828 delay slot is nullified). */
829 flags = get_jump_flags (insn, target_label);
830 if (eligible_for_annul_true (insn, 0, trial, flags))
831 reorg_redirect_jump (insn, target_label);
832 }
833 }
834
835 INSN_ANNULLED_BRANCH_P (insn) = 1;
836 }
837
838 return delay_list;
839 }
840 #endif
841 \f
842 /* Encode and return branch direction and prediction information for
843 INSN assuming it will jump to LABEL.
844
845 Non conditional branches return no direction information and
846 are predicted as very likely taken. */
847
848 static int
849 get_jump_flags (const rtx_insn *insn, rtx label)
850 {
851 int flags;
852
853 /* get_jump_flags can be passed any insn with delay slots, these may
854 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
855 direction information, and only if they are conditional jumps.
856
857 If LABEL is a return, then there is no way to determine the branch
858 direction. */
859 if (JUMP_P (insn)
860 && (condjump_p (insn) || condjump_in_parallel_p (insn))
861 && !ANY_RETURN_P (label)
862 && INSN_UID (insn) <= max_uid
863 && INSN_UID (label) <= max_uid)
864 flags
865 = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
866 ? ATTR_FLAG_forward : ATTR_FLAG_backward;
867 /* No valid direction information. */
868 else
869 flags = 0;
870
871 return flags;
872 }
873
874 /* Return truth value of the statement that this branch
875 is mostly taken. If we think that the branch is extremely likely
876 to be taken, we return 2. If the branch is slightly more likely to be
877 taken, return 1. If the branch is slightly less likely to be taken,
878 return 0 and if the branch is highly unlikely to be taken, return -1. */
879
880 static int
881 mostly_true_jump (rtx jump_insn)
882 {
883 /* If branch probabilities are available, then use that number since it
884 always gives a correct answer. */
885 rtx note = find_reg_note (jump_insn, REG_BR_PROB, 0);
886 if (note)
887 {
888 int prob = XINT (note, 0);
889
890 if (prob >= REG_BR_PROB_BASE * 9 / 10)
891 return 2;
892 else if (prob >= REG_BR_PROB_BASE / 2)
893 return 1;
894 else if (prob >= REG_BR_PROB_BASE / 10)
895 return 0;
896 else
897 return -1;
898 }
899
900 /* If there is no note, assume branches are not taken.
901 This should be rare. */
902 return 0;
903 }
904
905 /* Return the condition under which INSN will branch to TARGET. If TARGET
906 is zero, return the condition under which INSN will return. If INSN is
907 an unconditional branch, return const_true_rtx. If INSN isn't a simple
908 type of jump, or it doesn't go to TARGET, return 0. */
909
910 static rtx
911 get_branch_condition (const rtx_insn *insn, rtx target)
912 {
913 rtx pat = PATTERN (insn);
914 rtx src;
915
916 if (condjump_in_parallel_p (insn))
917 pat = XVECEXP (pat, 0, 0);
918
919 if (ANY_RETURN_P (pat) && pat == target)
920 return const_true_rtx;
921
922 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
923 return 0;
924
925 src = SET_SRC (pat);
926 if (GET_CODE (src) == LABEL_REF && LABEL_REF_LABEL (src) == target)
927 return const_true_rtx;
928
929 else if (GET_CODE (src) == IF_THEN_ELSE
930 && XEXP (src, 2) == pc_rtx
931 && ((GET_CODE (XEXP (src, 1)) == LABEL_REF
932 && LABEL_REF_LABEL (XEXP (src, 1)) == target)
933 || (ANY_RETURN_P (XEXP (src, 1)) && XEXP (src, 1) == target)))
934 return XEXP (src, 0);
935
936 else if (GET_CODE (src) == IF_THEN_ELSE
937 && XEXP (src, 1) == pc_rtx
938 && ((GET_CODE (XEXP (src, 2)) == LABEL_REF
939 && LABEL_REF_LABEL (XEXP (src, 2)) == target)
940 || (ANY_RETURN_P (XEXP (src, 2)) && XEXP (src, 2) == target)))
941 {
942 enum rtx_code rev;
943 rev = reversed_comparison_code (XEXP (src, 0), insn);
944 if (rev != UNKNOWN)
945 return gen_rtx_fmt_ee (rev, GET_MODE (XEXP (src, 0)),
946 XEXP (XEXP (src, 0), 0),
947 XEXP (XEXP (src, 0), 1));
948 }
949
950 return 0;
951 }
952
953 /* Return nonzero if CONDITION is more strict than the condition of
954 INSN, i.e., if INSN will always branch if CONDITION is true. */
955
956 static int
957 condition_dominates_p (rtx condition, const rtx_insn *insn)
958 {
959 rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn));
960 enum rtx_code code = GET_CODE (condition);
961 enum rtx_code other_code;
962
963 if (rtx_equal_p (condition, other_condition)
964 || other_condition == const_true_rtx)
965 return 1;
966
967 else if (condition == const_true_rtx || other_condition == 0)
968 return 0;
969
970 other_code = GET_CODE (other_condition);
971 if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2
972 || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0))
973 || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1)))
974 return 0;
975
976 return comparison_dominates_p (code, other_code);
977 }
978
979 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
980 any insns already in the delay slot of JUMP. */
981
982 static int
983 redirect_with_delay_slots_safe_p (rtx_insn *jump, rtx newlabel, rtx seq)
984 {
985 int flags, i;
986 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (seq));
987
988 /* Make sure all the delay slots of this jump would still
989 be valid after threading the jump. If they are still
990 valid, then return nonzero. */
991
992 flags = get_jump_flags (jump, newlabel);
993 for (i = 1; i < pat->len (); i++)
994 if (! (
995 #ifdef ANNUL_IFFALSE_SLOTS
996 (INSN_ANNULLED_BRANCH_P (jump)
997 && INSN_FROM_TARGET_P (pat->insn (i)))
998 ? eligible_for_annul_false (jump, i - 1, pat->insn (i), flags) :
999 #endif
1000 #ifdef ANNUL_IFTRUE_SLOTS
1001 (INSN_ANNULLED_BRANCH_P (jump)
1002 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
1003 ? eligible_for_annul_true (jump, i - 1, pat->insn (i), flags) :
1004 #endif
1005 eligible_for_delay (jump, i - 1, pat->insn (i), flags)))
1006 break;
1007
1008 return (i == pat->len ());
1009 }
1010
1011 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
1012 any insns we wish to place in the delay slot of JUMP. */
1013
1014 static int
1015 redirect_with_delay_list_safe_p (rtx_insn *jump, rtx newlabel,
1016 rtx_insn_list *delay_list)
1017 {
1018 int flags, i;
1019 rtx_insn_list *li;
1020
1021 /* Make sure all the insns in DELAY_LIST would still be
1022 valid after threading the jump. If they are still
1023 valid, then return nonzero. */
1024
1025 flags = get_jump_flags (jump, newlabel);
1026 for (li = delay_list, i = 0; li; li = li->next (), i++)
1027 if (! (
1028 #ifdef ANNUL_IFFALSE_SLOTS
1029 (INSN_ANNULLED_BRANCH_P (jump)
1030 && INSN_FROM_TARGET_P (li->insn ()))
1031 ? eligible_for_annul_false (jump, i, li->insn (), flags) :
1032 #endif
1033 #ifdef ANNUL_IFTRUE_SLOTS
1034 (INSN_ANNULLED_BRANCH_P (jump)
1035 && ! INSN_FROM_TARGET_P (XEXP (li, 0)))
1036 ? eligible_for_annul_true (jump, i, li->insn (), flags) :
1037 #endif
1038 eligible_for_delay (jump, i, li->insn (), flags)))
1039 break;
1040
1041 return (li == NULL);
1042 }
1043
1044 /* DELAY_LIST is a list of insns that have already been placed into delay
1045 slots. See if all of them have the same annulling status as ANNUL_TRUE_P.
1046 If not, return 0; otherwise return 1. */
1047
1048 static int
1049 check_annul_list_true_false (int annul_true_p, rtx delay_list)
1050 {
1051 rtx temp;
1052
1053 if (delay_list)
1054 {
1055 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1056 {
1057 rtx trial = XEXP (temp, 0);
1058
1059 if ((annul_true_p && INSN_FROM_TARGET_P (trial))
1060 || (!annul_true_p && !INSN_FROM_TARGET_P (trial)))
1061 return 0;
1062 }
1063 }
1064
1065 return 1;
1066 }
1067 \f
1068 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1069 the condition tested by INSN is CONDITION and the resources shown in
1070 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1071 from SEQ's delay list, in addition to whatever insns it may execute
1072 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1073 needed while searching for delay slot insns. Return the concatenated
1074 delay list if possible, otherwise, return 0.
1075
1076 SLOTS_TO_FILL is the total number of slots required by INSN, and
1077 PSLOTS_FILLED points to the number filled so far (also the number of
1078 insns in DELAY_LIST). It is updated with the number that have been
1079 filled from the SEQUENCE, if any.
1080
1081 PANNUL_P points to a nonzero value if we already know that we need
1082 to annul INSN. If this routine determines that annulling is needed,
1083 it may set that value nonzero.
1084
1085 PNEW_THREAD points to a location that is to receive the place at which
1086 execution should continue. */
1087
1088 static rtx_insn_list *
1089 steal_delay_list_from_target (rtx_insn *insn, rtx condition, rtx_sequence *seq,
1090 rtx_insn_list *delay_list, struct resources *sets,
1091 struct resources *needed,
1092 struct resources *other_needed,
1093 int slots_to_fill, int *pslots_filled,
1094 int *pannul_p, rtx *pnew_thread)
1095 {
1096 int slots_remaining = slots_to_fill - *pslots_filled;
1097 int total_slots_filled = *pslots_filled;
1098 rtx_insn_list *new_delay_list = 0;
1099 int must_annul = *pannul_p;
1100 int used_annul = 0;
1101 int i;
1102 struct resources cc_set;
1103 bool *redundant;
1104
1105 /* We can't do anything if there are more delay slots in SEQ than we
1106 can handle, or if we don't know that it will be a taken branch.
1107 We know that it will be a taken branch if it is either an unconditional
1108 branch or a conditional branch with a stricter branch condition.
1109
1110 Also, exit if the branch has more than one set, since then it is computing
1111 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1112 ??? It may be possible to move other sets into INSN in addition to
1113 moving the instructions in the delay slots.
1114
1115 We can not steal the delay list if one of the instructions in the
1116 current delay_list modifies the condition codes and the jump in the
1117 sequence is a conditional jump. We can not do this because we can
1118 not change the direction of the jump because the condition codes
1119 will effect the direction of the jump in the sequence. */
1120
1121 CLEAR_RESOURCE (&cc_set);
1122 for (rtx_insn_list *temp = delay_list; temp; temp = temp->next ())
1123 {
1124 rtx_insn *trial = temp->insn ();
1125
1126 mark_set_resources (trial, &cc_set, 0, MARK_SRC_DEST_CALL);
1127 if (insn_references_resource_p (seq->insn (0), &cc_set, false))
1128 return delay_list;
1129 }
1130
1131 if (XVECLEN (seq, 0) - 1 > slots_remaining
1132 || ! condition_dominates_p (condition, seq->insn (0))
1133 || ! single_set (seq->insn (0)))
1134 return delay_list;
1135
1136 /* On some targets, branches with delay slots can have a limited
1137 displacement. Give the back end a chance to tell us we can't do
1138 this. */
1139 if (! targetm.can_follow_jump (insn, seq->insn (0)))
1140 return delay_list;
1141
1142 redundant = XALLOCAVEC (bool, XVECLEN (seq, 0));
1143 for (i = 1; i < seq->len (); i++)
1144 {
1145 rtx_insn *trial = seq->insn (i);
1146 int flags;
1147
1148 if (insn_references_resource_p (trial, sets, false)
1149 || insn_sets_resource_p (trial, needed, false)
1150 || insn_sets_resource_p (trial, sets, false)
1151 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1152 delay list. */
1153 || (HAVE_cc0 && find_reg_note (trial, REG_CC_USER, NULL_RTX))
1154 /* If TRIAL is from the fallthrough code of an annulled branch insn
1155 in SEQ, we cannot use it. */
1156 || (INSN_ANNULLED_BRANCH_P (seq->insn (0))
1157 && ! INSN_FROM_TARGET_P (trial)))
1158 return delay_list;
1159
1160 /* If this insn was already done (usually in a previous delay slot),
1161 pretend we put it in our delay slot. */
1162 redundant[i] = redundant_insn (trial, insn, new_delay_list);
1163 if (redundant[i])
1164 continue;
1165
1166 /* We will end up re-vectoring this branch, so compute flags
1167 based on jumping to the new label. */
1168 flags = get_jump_flags (insn, JUMP_LABEL (seq->insn (0)));
1169
1170 if (! must_annul
1171 && ((condition == const_true_rtx
1172 || (! insn_sets_resource_p (trial, other_needed, false)
1173 && ! may_trap_or_fault_p (PATTERN (trial)))))
1174 ? eligible_for_delay (insn, total_slots_filled, trial, flags)
1175 : (must_annul || (delay_list == NULL && new_delay_list == NULL))
1176 && (must_annul = 1,
1177 check_annul_list_true_false (0, delay_list)
1178 && check_annul_list_true_false (0, new_delay_list)
1179 && eligible_for_annul_false (insn, total_slots_filled,
1180 trial, flags)))
1181 {
1182 if (must_annul)
1183 used_annul = 1;
1184 rtx_insn *temp = copy_delay_slot_insn (trial);
1185 INSN_FROM_TARGET_P (temp) = 1;
1186 new_delay_list = add_to_delay_list (temp, new_delay_list);
1187 total_slots_filled++;
1188
1189 if (--slots_remaining == 0)
1190 break;
1191 }
1192 else
1193 return delay_list;
1194 }
1195
1196 /* Record the effect of the instructions that were redundant and which
1197 we therefore decided not to copy. */
1198 for (i = 1; i < seq->len (); i++)
1199 if (redundant[i])
1200 update_block (seq->insn (i), insn);
1201
1202 /* Show the place to which we will be branching. */
1203 *pnew_thread = first_active_target_insn (JUMP_LABEL (seq->insn (0)));
1204
1205 /* Add any new insns to the delay list and update the count of the
1206 number of slots filled. */
1207 *pslots_filled = total_slots_filled;
1208 if (used_annul)
1209 *pannul_p = 1;
1210
1211 if (delay_list == 0)
1212 return new_delay_list;
1213
1214 for (rtx_insn_list *temp = new_delay_list; temp; temp = temp->next ())
1215 delay_list = add_to_delay_list (temp->insn (), delay_list);
1216
1217 return delay_list;
1218 }
1219 \f
1220 /* Similar to steal_delay_list_from_target except that SEQ is on the
1221 fallthrough path of INSN. Here we only do something if the delay insn
1222 of SEQ is an unconditional branch. In that case we steal its delay slot
1223 for INSN since unconditional branches are much easier to fill. */
1224
1225 static rtx_insn_list *
1226 steal_delay_list_from_fallthrough (rtx_insn *insn, rtx condition,
1227 rtx_sequence *seq,
1228 rtx_insn_list *delay_list,
1229 struct resources *sets,
1230 struct resources *needed,
1231 struct resources *other_needed,
1232 int slots_to_fill, int *pslots_filled,
1233 int *pannul_p)
1234 {
1235 int i;
1236 int flags;
1237 int must_annul = *pannul_p;
1238 int used_annul = 0;
1239
1240 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1241
1242 /* We can't do anything if SEQ's delay insn isn't an
1243 unconditional branch. */
1244
1245 if (! simplejump_or_return_p (seq->insn (0)))
1246 return delay_list;
1247
1248 for (i = 1; i < seq->len (); i++)
1249 {
1250 rtx_insn *trial = seq->insn (i);
1251
1252 /* If TRIAL sets CC0, stealing it will move it too far from the use
1253 of CC0. */
1254 if (insn_references_resource_p (trial, sets, false)
1255 || insn_sets_resource_p (trial, needed, false)
1256 || insn_sets_resource_p (trial, sets, false)
1257 || (HAVE_cc0 && sets_cc0_p (PATTERN (trial))))
1258
1259 break;
1260
1261 /* If this insn was already done, we don't need it. */
1262 if (redundant_insn (trial, insn, delay_list))
1263 {
1264 update_block (trial, insn);
1265 delete_from_delay_slot (trial);
1266 continue;
1267 }
1268
1269 if (! must_annul
1270 && ((condition == const_true_rtx
1271 || (! insn_sets_resource_p (trial, other_needed, false)
1272 && ! may_trap_or_fault_p (PATTERN (trial)))))
1273 ? eligible_for_delay (insn, *pslots_filled, trial, flags)
1274 : (must_annul || delay_list == NULL) && (must_annul = 1,
1275 check_annul_list_true_false (1, delay_list)
1276 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
1277 {
1278 if (must_annul)
1279 used_annul = 1;
1280 delete_from_delay_slot (trial);
1281 delay_list = add_to_delay_list (trial, delay_list);
1282
1283 if (++(*pslots_filled) == slots_to_fill)
1284 break;
1285 }
1286 else
1287 break;
1288 }
1289
1290 if (used_annul)
1291 *pannul_p = 1;
1292 return delay_list;
1293 }
1294 \f
1295 /* Try merging insns starting at THREAD which match exactly the insns in
1296 INSN's delay list.
1297
1298 If all insns were matched and the insn was previously annulling, the
1299 annul bit will be cleared.
1300
1301 For each insn that is merged, if the branch is or will be non-annulling,
1302 we delete the merged insn. */
1303
1304 static void
1305 try_merge_delay_insns (rtx_insn *insn, rtx_insn *thread)
1306 {
1307 rtx_insn *trial, *next_trial;
1308 rtx_insn *delay_insn = as_a <rtx_insn *> (XVECEXP (PATTERN (insn), 0, 0));
1309 int annul_p = JUMP_P (delay_insn) && INSN_ANNULLED_BRANCH_P (delay_insn);
1310 int slot_number = 1;
1311 int num_slots = XVECLEN (PATTERN (insn), 0);
1312 rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1313 struct resources set, needed, modified;
1314 rtx_insn_list *merged_insns = 0;
1315 int i, j;
1316 int flags;
1317
1318 flags = get_jump_flags (delay_insn, JUMP_LABEL (delay_insn));
1319
1320 CLEAR_RESOURCE (&needed);
1321 CLEAR_RESOURCE (&set);
1322
1323 /* If this is not an annulling branch, take into account anything needed in
1324 INSN's delay slot. This prevents two increments from being incorrectly
1325 folded into one. If we are annulling, this would be the correct
1326 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1327 will essentially disable this optimization. This method is somewhat of
1328 a kludge, but I don't see a better way.) */
1329 if (! annul_p)
1330 for (i = 1 ; i < num_slots; i++)
1331 if (XVECEXP (PATTERN (insn), 0, i))
1332 mark_referenced_resources (XVECEXP (PATTERN (insn), 0, i), &needed,
1333 true);
1334
1335 for (trial = thread; !stop_search_p (trial, 1); trial = next_trial)
1336 {
1337 rtx pat = PATTERN (trial);
1338 rtx oldtrial = trial;
1339
1340 next_trial = next_nonnote_insn (trial);
1341
1342 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1343 if (NONJUMP_INSN_P (trial)
1344 && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER))
1345 continue;
1346
1347 if (GET_CODE (next_to_match) == GET_CODE (trial)
1348 /* We can't share an insn that sets cc0. */
1349 && (!HAVE_cc0 || ! sets_cc0_p (pat))
1350 && ! insn_references_resource_p (trial, &set, true)
1351 && ! insn_sets_resource_p (trial, &set, true)
1352 && ! insn_sets_resource_p (trial, &needed, true)
1353 && (trial = try_split (pat, trial, 0)) != 0
1354 /* Update next_trial, in case try_split succeeded. */
1355 && (next_trial = next_nonnote_insn (trial))
1356 /* Likewise THREAD. */
1357 && (thread = oldtrial == thread ? trial : thread)
1358 && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial))
1359 /* Have to test this condition if annul condition is different
1360 from (and less restrictive than) non-annulling one. */
1361 && eligible_for_delay (delay_insn, slot_number - 1, trial, flags))
1362 {
1363
1364 if (! annul_p)
1365 {
1366 update_block (trial, thread);
1367 if (trial == thread)
1368 thread = next_active_insn (thread);
1369
1370 delete_related_insns (trial);
1371 INSN_FROM_TARGET_P (next_to_match) = 0;
1372 }
1373 else
1374 merged_insns = gen_rtx_INSN_LIST (VOIDmode, trial, merged_insns);
1375
1376 if (++slot_number == num_slots)
1377 break;
1378
1379 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1380 }
1381
1382 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
1383 mark_referenced_resources (trial, &needed, true);
1384 }
1385
1386 /* See if we stopped on a filled insn. If we did, try to see if its
1387 delay slots match. */
1388 if (slot_number != num_slots
1389 && trial && NONJUMP_INSN_P (trial)
1390 && GET_CODE (PATTERN (trial)) == SEQUENCE
1391 && !(JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
1392 && INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0))))
1393 {
1394 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (trial));
1395 rtx filled_insn = XVECEXP (pat, 0, 0);
1396
1397 /* Account for resources set/needed by the filled insn. */
1398 mark_set_resources (filled_insn, &set, 0, MARK_SRC_DEST_CALL);
1399 mark_referenced_resources (filled_insn, &needed, true);
1400
1401 for (i = 1; i < pat->len (); i++)
1402 {
1403 rtx_insn *dtrial = pat->insn (i);
1404
1405 CLEAR_RESOURCE (&modified);
1406 /* Account for resources set by the the insn following NEXT_TO_MATCH
1407 inside INSN's delay list. */
1408 for (j = 1; slot_number + j < num_slots; j++)
1409 mark_set_resources (XVECEXP (PATTERN (insn), 0, slot_number + j),
1410 &modified, 0, MARK_SRC_DEST_CALL);
1411 /* Account for resources set by the the insn before DTRIAL and inside
1412 TRIAL's delay list. */
1413 for (j = 1; j < i; j++)
1414 mark_set_resources (XVECEXP (pat, 0, j),
1415 &modified, 0, MARK_SRC_DEST_CALL);
1416 if (! insn_references_resource_p (dtrial, &set, true)
1417 && ! insn_sets_resource_p (dtrial, &set, true)
1418 && ! insn_sets_resource_p (dtrial, &needed, true)
1419 && (!HAVE_cc0 || ! sets_cc0_p (PATTERN (dtrial)))
1420 && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial))
1421 /* Check that DTRIAL and NEXT_TO_MATCH does not reference a
1422 resource modified between them (only dtrial is checked because
1423 next_to_match and dtrial shall to be equal in order to hit
1424 this line) */
1425 && ! insn_references_resource_p (dtrial, &modified, true)
1426 && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags))
1427 {
1428 if (! annul_p)
1429 {
1430 rtx_insn *new_rtx;
1431
1432 update_block (dtrial, thread);
1433 new_rtx = delete_from_delay_slot (dtrial);
1434 if (thread->deleted ())
1435 thread = new_rtx;
1436 INSN_FROM_TARGET_P (next_to_match) = 0;
1437 }
1438 else
1439 merged_insns = gen_rtx_INSN_LIST (SImode, dtrial,
1440 merged_insns);
1441
1442 if (++slot_number == num_slots)
1443 break;
1444
1445 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1446 }
1447 else
1448 {
1449 /* Keep track of the set/referenced resources for the delay
1450 slots of any trial insns we encounter. */
1451 mark_set_resources (dtrial, &set, 0, MARK_SRC_DEST_CALL);
1452 mark_referenced_resources (dtrial, &needed, true);
1453 }
1454 }
1455 }
1456
1457 /* If all insns in the delay slot have been matched and we were previously
1458 annulling the branch, we need not any more. In that case delete all the
1459 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
1460 the delay list so that we know that it isn't only being used at the
1461 target. */
1462 if (slot_number == num_slots && annul_p)
1463 {
1464 for (; merged_insns; merged_insns = merged_insns->next ())
1465 {
1466 if (GET_MODE (merged_insns) == SImode)
1467 {
1468 rtx_insn *new_rtx;
1469
1470 update_block (merged_insns->insn (), thread);
1471 new_rtx = delete_from_delay_slot (merged_insns->insn ());
1472 if (thread->deleted ())
1473 thread = new_rtx;
1474 }
1475 else
1476 {
1477 update_block (merged_insns->insn (), thread);
1478 delete_related_insns (merged_insns->insn ());
1479 }
1480 }
1481
1482 INSN_ANNULLED_BRANCH_P (delay_insn) = 0;
1483
1484 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1485 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0;
1486 }
1487 }
1488 \f
1489 /* See if INSN is redundant with an insn in front of TARGET. Often this
1490 is called when INSN is a candidate for a delay slot of TARGET.
1491 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1492 of INSN. Often INSN will be redundant with an insn in a delay slot of
1493 some previous insn. This happens when we have a series of branches to the
1494 same label; in that case the first insn at the target might want to go
1495 into each of the delay slots.
1496
1497 If we are not careful, this routine can take up a significant fraction
1498 of the total compilation time (4%), but only wins rarely. Hence we
1499 speed this routine up by making two passes. The first pass goes back
1500 until it hits a label and sees if it finds an insn with an identical
1501 pattern. Only in this (relatively rare) event does it check for
1502 data conflicts.
1503
1504 We do not split insns we encounter. This could cause us not to find a
1505 redundant insn, but the cost of splitting seems greater than the possible
1506 gain in rare cases. */
1507
1508 static rtx
1509 redundant_insn (rtx insn, rtx_insn *target, rtx delay_list)
1510 {
1511 rtx target_main = target;
1512 rtx ipat = PATTERN (insn);
1513 rtx_insn *trial;
1514 rtx pat;
1515 struct resources needed, set;
1516 int i;
1517 unsigned insns_to_search;
1518
1519 /* If INSN has any REG_UNUSED notes, it can't match anything since we
1520 are allowed to not actually assign to such a register. */
1521 if (find_reg_note (insn, REG_UNUSED, NULL_RTX) != 0)
1522 return 0;
1523
1524 /* Scan backwards looking for a match. */
1525 for (trial = PREV_INSN (target),
1526 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1527 trial && insns_to_search > 0;
1528 trial = PREV_INSN (trial))
1529 {
1530 /* (use (insn))s can come immediately after a barrier if the
1531 label that used to precede them has been deleted as dead.
1532 See delete_related_insns. */
1533 if (LABEL_P (trial) || BARRIER_P (trial))
1534 return 0;
1535
1536 if (!INSN_P (trial))
1537 continue;
1538 --insns_to_search;
1539
1540 pat = PATTERN (trial);
1541 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1542 continue;
1543
1544 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (pat))
1545 {
1546 /* Stop for a CALL and its delay slots because it is difficult to
1547 track its resource needs correctly. */
1548 if (CALL_P (seq->element (0)))
1549 return 0;
1550
1551 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1552 slots because it is difficult to track its resource needs
1553 correctly. */
1554
1555 if (INSN_SETS_ARE_DELAYED (seq->insn (0)))
1556 return 0;
1557
1558 if (INSN_REFERENCES_ARE_DELAYED (seq->insn (0)))
1559 return 0;
1560
1561 /* See if any of the insns in the delay slot match, updating
1562 resource requirements as we go. */
1563 for (i = seq->len () - 1; i > 0; i--)
1564 if (GET_CODE (seq->element (i)) == GET_CODE (insn)
1565 && rtx_equal_p (PATTERN (seq->element (i)), ipat)
1566 && ! find_reg_note (seq->element (i), REG_UNUSED, NULL_RTX))
1567 break;
1568
1569 /* If found a match, exit this loop early. */
1570 if (i > 0)
1571 break;
1572 }
1573
1574 else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat)
1575 && ! find_reg_note (trial, REG_UNUSED, NULL_RTX))
1576 break;
1577 }
1578
1579 /* If we didn't find an insn that matches, return 0. */
1580 if (trial == 0)
1581 return 0;
1582
1583 /* See what resources this insn sets and needs. If they overlap, or
1584 if this insn references CC0, it can't be redundant. */
1585
1586 CLEAR_RESOURCE (&needed);
1587 CLEAR_RESOURCE (&set);
1588 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1589 mark_referenced_resources (insn, &needed, true);
1590
1591 /* If TARGET is a SEQUENCE, get the main insn. */
1592 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1593 target_main = XVECEXP (PATTERN (target), 0, 0);
1594
1595 if (resource_conflicts_p (&needed, &set)
1596 || (HAVE_cc0 && reg_mentioned_p (cc0_rtx, ipat))
1597 /* The insn requiring the delay may not set anything needed or set by
1598 INSN. */
1599 || insn_sets_resource_p (target_main, &needed, true)
1600 || insn_sets_resource_p (target_main, &set, true))
1601 return 0;
1602
1603 /* Insns we pass may not set either NEEDED or SET, so merge them for
1604 simpler tests. */
1605 needed.memory |= set.memory;
1606 IOR_HARD_REG_SET (needed.regs, set.regs);
1607
1608 /* This insn isn't redundant if it conflicts with an insn that either is
1609 or will be in a delay slot of TARGET. */
1610
1611 while (delay_list)
1612 {
1613 if (insn_sets_resource_p (XEXP (delay_list, 0), &needed, true))
1614 return 0;
1615 delay_list = XEXP (delay_list, 1);
1616 }
1617
1618 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1619 for (i = 1; i < XVECLEN (PATTERN (target), 0); i++)
1620 if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed,
1621 true))
1622 return 0;
1623
1624 /* Scan backwards until we reach a label or an insn that uses something
1625 INSN sets or sets something insn uses or sets. */
1626
1627 for (trial = PREV_INSN (target),
1628 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1629 trial && !LABEL_P (trial) && insns_to_search > 0;
1630 trial = PREV_INSN (trial))
1631 {
1632 if (!INSN_P (trial))
1633 continue;
1634 --insns_to_search;
1635
1636 pat = PATTERN (trial);
1637 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1638 continue;
1639
1640 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (pat))
1641 {
1642 bool annul_p = false;
1643 rtx_insn *control = seq->insn (0);
1644
1645 /* If this is a CALL_INSN and its delay slots, it is hard to track
1646 the resource needs properly, so give up. */
1647 if (CALL_P (control))
1648 return 0;
1649
1650 /* If this is an INSN or JUMP_INSN with delayed effects, it
1651 is hard to track the resource needs properly, so give up. */
1652
1653 if (INSN_SETS_ARE_DELAYED (control))
1654 return 0;
1655
1656 if (INSN_REFERENCES_ARE_DELAYED (control))
1657 return 0;
1658
1659 if (JUMP_P (control))
1660 annul_p = INSN_ANNULLED_BRANCH_P (control);
1661
1662 /* See if any of the insns in the delay slot match, updating
1663 resource requirements as we go. */
1664 for (i = seq->len () - 1; i > 0; i--)
1665 {
1666 rtx candidate = seq->element (i);
1667
1668 /* If an insn will be annulled if the branch is false, it isn't
1669 considered as a possible duplicate insn. */
1670 if (rtx_equal_p (PATTERN (candidate), ipat)
1671 && ! (annul_p && INSN_FROM_TARGET_P (candidate)))
1672 {
1673 /* Show that this insn will be used in the sequel. */
1674 INSN_FROM_TARGET_P (candidate) = 0;
1675 return candidate;
1676 }
1677
1678 /* Unless this is an annulled insn from the target of a branch,
1679 we must stop if it sets anything needed or set by INSN. */
1680 if ((!annul_p || !INSN_FROM_TARGET_P (candidate))
1681 && insn_sets_resource_p (candidate, &needed, true))
1682 return 0;
1683 }
1684
1685 /* If the insn requiring the delay slot conflicts with INSN, we
1686 must stop. */
1687 if (insn_sets_resource_p (control, &needed, true))
1688 return 0;
1689 }
1690 else
1691 {
1692 /* See if TRIAL is the same as INSN. */
1693 pat = PATTERN (trial);
1694 if (rtx_equal_p (pat, ipat))
1695 return trial;
1696
1697 /* Can't go any further if TRIAL conflicts with INSN. */
1698 if (insn_sets_resource_p (trial, &needed, true))
1699 return 0;
1700 }
1701 }
1702
1703 return 0;
1704 }
1705 \f
1706 /* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero,
1707 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1708 is nonzero, we are allowed to fall into this thread; otherwise, we are
1709 not.
1710
1711 If LABEL is used more than one or we pass a label other than LABEL before
1712 finding an active insn, we do not own this thread. */
1713
1714 static int
1715 own_thread_p (rtx thread, rtx label, int allow_fallthrough)
1716 {
1717 rtx_insn *active_insn;
1718 rtx_insn *insn;
1719
1720 /* We don't own the function end. */
1721 if (thread == 0 || ANY_RETURN_P (thread))
1722 return 0;
1723
1724 /* We have a non-NULL insn. */
1725 rtx_insn *thread_insn = as_a <rtx_insn *> (thread);
1726
1727 /* Get the first active insn, or THREAD_INSN, if it is an active insn. */
1728 active_insn = next_active_insn (PREV_INSN (thread_insn));
1729
1730 for (insn = thread_insn; insn != active_insn; insn = NEXT_INSN (insn))
1731 if (LABEL_P (insn)
1732 && (insn != label || LABEL_NUSES (insn) != 1))
1733 return 0;
1734
1735 if (allow_fallthrough)
1736 return 1;
1737
1738 /* Ensure that we reach a BARRIER before any insn or label. */
1739 for (insn = prev_nonnote_insn (thread_insn);
1740 insn == 0 || !BARRIER_P (insn);
1741 insn = prev_nonnote_insn (insn))
1742 if (insn == 0
1743 || LABEL_P (insn)
1744 || (NONJUMP_INSN_P (insn)
1745 && GET_CODE (PATTERN (insn)) != USE
1746 && GET_CODE (PATTERN (insn)) != CLOBBER))
1747 return 0;
1748
1749 return 1;
1750 }
1751 \f
1752 /* Called when INSN is being moved from a location near the target of a jump.
1753 We leave a marker of the form (use (INSN)) immediately in front
1754 of WHERE for mark_target_live_regs. These markers will be deleted when
1755 reorg finishes.
1756
1757 We used to try to update the live status of registers if WHERE is at
1758 the start of a basic block, but that can't work since we may remove a
1759 BARRIER in relax_delay_slots. */
1760
1761 static void
1762 update_block (rtx_insn *insn, rtx where)
1763 {
1764 /* Ignore if this was in a delay slot and it came from the target of
1765 a branch. */
1766 if (INSN_FROM_TARGET_P (insn))
1767 return;
1768
1769 emit_insn_before (gen_rtx_USE (VOIDmode, insn), where);
1770
1771 /* INSN might be making a value live in a block where it didn't use to
1772 be. So recompute liveness information for this block. */
1773
1774 incr_ticks_for_insn (insn);
1775 }
1776
1777 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
1778 the basic block containing the jump. */
1779
1780 static int
1781 reorg_redirect_jump (rtx_jump_insn *jump, rtx nlabel)
1782 {
1783 incr_ticks_for_insn (jump);
1784 return redirect_jump (jump, nlabel, 1);
1785 }
1786
1787 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
1788 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
1789 that reference values used in INSN. If we find one, then we move the
1790 REG_DEAD note to INSN.
1791
1792 This is needed to handle the case where a later insn (after INSN) has a
1793 REG_DEAD note for a register used by INSN, and this later insn subsequently
1794 gets moved before a CODE_LABEL because it is a redundant insn. In this
1795 case, mark_target_live_regs may be confused into thinking the register
1796 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
1797
1798 static void
1799 update_reg_dead_notes (rtx_insn *insn, rtx_insn *delayed_insn)
1800 {
1801 rtx link, next;
1802 rtx_insn *p;
1803
1804 for (p = next_nonnote_insn (insn); p != delayed_insn;
1805 p = next_nonnote_insn (p))
1806 for (link = REG_NOTES (p); link; link = next)
1807 {
1808 next = XEXP (link, 1);
1809
1810 if (REG_NOTE_KIND (link) != REG_DEAD
1811 || !REG_P (XEXP (link, 0)))
1812 continue;
1813
1814 if (reg_referenced_p (XEXP (link, 0), PATTERN (insn)))
1815 {
1816 /* Move the REG_DEAD note from P to INSN. */
1817 remove_note (p, link);
1818 XEXP (link, 1) = REG_NOTES (insn);
1819 REG_NOTES (insn) = link;
1820 }
1821 }
1822 }
1823
1824 /* Called when an insn redundant with start_insn is deleted. If there
1825 is a REG_DEAD note for the target of start_insn between start_insn
1826 and stop_insn, then the REG_DEAD note needs to be deleted since the
1827 value no longer dies there.
1828
1829 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
1830 confused into thinking the register is dead. */
1831
1832 static void
1833 fix_reg_dead_note (rtx start_insn, rtx stop_insn)
1834 {
1835 rtx link, next;
1836 rtx_insn *p;
1837
1838 for (p = next_nonnote_insn (start_insn); p != stop_insn;
1839 p = next_nonnote_insn (p))
1840 for (link = REG_NOTES (p); link; link = next)
1841 {
1842 next = XEXP (link, 1);
1843
1844 if (REG_NOTE_KIND (link) != REG_DEAD
1845 || !REG_P (XEXP (link, 0)))
1846 continue;
1847
1848 if (reg_set_p (XEXP (link, 0), PATTERN (start_insn)))
1849 {
1850 remove_note (p, link);
1851 return;
1852 }
1853 }
1854 }
1855
1856 /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN.
1857
1858 This handles the case of udivmodXi4 instructions which optimize their
1859 output depending on whether any REG_UNUSED notes are present.
1860 we must make sure that INSN calculates as many results as REDUNDANT_INSN
1861 does. */
1862
1863 static void
1864 update_reg_unused_notes (rtx insn, rtx redundant_insn)
1865 {
1866 rtx link, next;
1867
1868 for (link = REG_NOTES (insn); link; link = next)
1869 {
1870 next = XEXP (link, 1);
1871
1872 if (REG_NOTE_KIND (link) != REG_UNUSED
1873 || !REG_P (XEXP (link, 0)))
1874 continue;
1875
1876 if (! find_regno_note (redundant_insn, REG_UNUSED,
1877 REGNO (XEXP (link, 0))))
1878 remove_note (insn, link);
1879 }
1880 }
1881 \f
1882 static vec <rtx> sibling_labels;
1883
1884 /* Return the label before INSN, or put a new label there. If SIBLING is
1885 non-zero, it is another label associated with the new label (if any),
1886 typically the former target of the jump that will be redirected to
1887 the new label. */
1888
1889 static rtx_insn *
1890 get_label_before (rtx_insn *insn, rtx sibling)
1891 {
1892 rtx_insn *label;
1893
1894 /* Find an existing label at this point
1895 or make a new one if there is none. */
1896 label = prev_nonnote_insn (insn);
1897
1898 if (label == 0 || !LABEL_P (label))
1899 {
1900 rtx_insn *prev = PREV_INSN (insn);
1901
1902 label = gen_label_rtx ();
1903 emit_label_after (label, prev);
1904 LABEL_NUSES (label) = 0;
1905 if (sibling)
1906 {
1907 sibling_labels.safe_push (label);
1908 sibling_labels.safe_push (sibling);
1909 }
1910 }
1911 return label;
1912 }
1913
1914 /* Scan a function looking for insns that need a delay slot and find insns to
1915 put into the delay slot.
1916
1917 NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such
1918 as calls). We do these first since we don't want jump insns (that are
1919 easier to fill) to get the only insns that could be used for non-jump insns.
1920 When it is zero, only try to fill JUMP_INSNs.
1921
1922 When slots are filled in this manner, the insns (including the
1923 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
1924 it is possible to tell whether a delay slot has really been filled
1925 or not. `final' knows how to deal with this, by communicating
1926 through FINAL_SEQUENCE. */
1927
1928 static void
1929 fill_simple_delay_slots (int non_jumps_p)
1930 {
1931 rtx_insn *insn, *trial, *next_trial;
1932 rtx pat;
1933 int i;
1934 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
1935 struct resources needed, set;
1936 int slots_to_fill, slots_filled;
1937 rtx_insn_list *delay_list;
1938
1939 for (i = 0; i < num_unfilled_slots; i++)
1940 {
1941 int flags;
1942 /* Get the next insn to fill. If it has already had any slots assigned,
1943 we can't do anything with it. Maybe we'll improve this later. */
1944
1945 insn = unfilled_slots_base[i];
1946 if (insn == 0
1947 || insn->deleted ()
1948 || (NONJUMP_INSN_P (insn)
1949 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1950 || (JUMP_P (insn) && non_jumps_p)
1951 || (!JUMP_P (insn) && ! non_jumps_p))
1952 continue;
1953
1954 /* It may have been that this insn used to need delay slots, but
1955 now doesn't; ignore in that case. This can happen, for example,
1956 on the HP PA RISC, where the number of delay slots depends on
1957 what insns are nearby. */
1958 slots_to_fill = num_delay_slots (insn);
1959
1960 /* Some machine description have defined instructions to have
1961 delay slots only in certain circumstances which may depend on
1962 nearby insns (which change due to reorg's actions).
1963
1964 For example, the PA port normally has delay slots for unconditional
1965 jumps.
1966
1967 However, the PA port claims such jumps do not have a delay slot
1968 if they are immediate successors of certain CALL_INSNs. This
1969 allows the port to favor filling the delay slot of the call with
1970 the unconditional jump. */
1971 if (slots_to_fill == 0)
1972 continue;
1973
1974 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
1975 says how many. After initialization, first try optimizing
1976
1977 call _foo call _foo
1978 nop add %o7,.-L1,%o7
1979 b,a L1
1980 nop
1981
1982 If this case applies, the delay slot of the call is filled with
1983 the unconditional jump. This is done first to avoid having the
1984 delay slot of the call filled in the backward scan. Also, since
1985 the unconditional jump is likely to also have a delay slot, that
1986 insn must exist when it is subsequently scanned.
1987
1988 This is tried on each insn with delay slots as some machines
1989 have insns which perform calls, but are not represented as
1990 CALL_INSNs. */
1991
1992 slots_filled = 0;
1993 delay_list = 0;
1994
1995 if (JUMP_P (insn))
1996 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1997 else
1998 flags = get_jump_flags (insn, NULL_RTX);
1999
2000 if ((trial = next_active_insn (insn))
2001 && JUMP_P (trial)
2002 && simplejump_p (trial)
2003 && eligible_for_delay (insn, slots_filled, trial, flags)
2004 && no_labels_between_p (insn, trial)
2005 && ! can_throw_internal (trial))
2006 {
2007 rtx_insn **tmp;
2008 slots_filled++;
2009 delay_list = add_to_delay_list (trial, delay_list);
2010
2011 /* TRIAL may have had its delay slot filled, then unfilled. When
2012 the delay slot is unfilled, TRIAL is placed back on the unfilled
2013 slots obstack. Unfortunately, it is placed on the end of the
2014 obstack, not in its original location. Therefore, we must search
2015 from entry i + 1 to the end of the unfilled slots obstack to
2016 try and find TRIAL. */
2017 tmp = &unfilled_slots_base[i + 1];
2018 while (*tmp != trial && tmp != unfilled_slots_next)
2019 tmp++;
2020
2021 /* Remove the unconditional jump from consideration for delay slot
2022 filling and unthread it. */
2023 if (*tmp == trial)
2024 *tmp = 0;
2025 {
2026 rtx_insn *next = NEXT_INSN (trial);
2027 rtx_insn *prev = PREV_INSN (trial);
2028 if (prev)
2029 SET_NEXT_INSN (prev) = next;
2030 if (next)
2031 SET_PREV_INSN (next) = prev;
2032 }
2033 }
2034
2035 /* Now, scan backwards from the insn to search for a potential
2036 delay-slot candidate. Stop searching when a label or jump is hit.
2037
2038 For each candidate, if it is to go into the delay slot (moved
2039 forward in execution sequence), it must not need or set any resources
2040 that were set by later insns and must not set any resources that
2041 are needed for those insns.
2042
2043 The delay slot insn itself sets resources unless it is a call
2044 (in which case the called routine, not the insn itself, is doing
2045 the setting). */
2046
2047 if (slots_filled < slots_to_fill)
2048 {
2049 /* If the flags register is dead after the insn, then we want to be
2050 able to accept a candidate that clobbers it. For this purpose,
2051 we need to filter the flags register during life analysis, so
2052 that it doesn't create RAW and WAW dependencies, while still
2053 creating the necessary WAR dependencies. */
2054 bool filter_flags
2055 = (slots_to_fill == 1
2056 && targetm.flags_regnum != INVALID_REGNUM
2057 && find_regno_note (insn, REG_DEAD, targetm.flags_regnum));
2058 struct resources fset;
2059 CLEAR_RESOURCE (&needed);
2060 CLEAR_RESOURCE (&set);
2061 mark_set_resources (insn, &set, 0, MARK_SRC_DEST);
2062 if (filter_flags)
2063 {
2064 CLEAR_RESOURCE (&fset);
2065 mark_set_resources (insn, &fset, 0, MARK_SRC_DEST);
2066 }
2067 mark_referenced_resources (insn, &needed, false);
2068
2069 for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1);
2070 trial = next_trial)
2071 {
2072 next_trial = prev_nonnote_insn (trial);
2073
2074 /* This must be an INSN or CALL_INSN. */
2075 pat = PATTERN (trial);
2076
2077 /* Stand-alone USE and CLOBBER are just for flow. */
2078 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2079 continue;
2080
2081 /* Check for resource conflict first, to avoid unnecessary
2082 splitting. */
2083 if (! insn_references_resource_p (trial, &set, true)
2084 && ! insn_sets_resource_p (trial,
2085 filter_flags ? &fset : &set,
2086 true)
2087 && ! insn_sets_resource_p (trial, &needed, true)
2088 /* Can't separate set of cc0 from its use. */
2089 && (!HAVE_cc0 || ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat)))
2090 && ! can_throw_internal (trial))
2091 {
2092 trial = try_split (pat, trial, 1);
2093 next_trial = prev_nonnote_insn (trial);
2094 if (eligible_for_delay (insn, slots_filled, trial, flags))
2095 {
2096 /* In this case, we are searching backward, so if we
2097 find insns to put on the delay list, we want
2098 to put them at the head, rather than the
2099 tail, of the list. */
2100
2101 update_reg_dead_notes (trial, insn);
2102 delay_list = gen_rtx_INSN_LIST (VOIDmode,
2103 trial, delay_list);
2104 update_block (trial, trial);
2105 delete_related_insns (trial);
2106 if (slots_to_fill == ++slots_filled)
2107 break;
2108 continue;
2109 }
2110 }
2111
2112 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2113 if (filter_flags)
2114 {
2115 mark_set_resources (trial, &fset, 0, MARK_SRC_DEST_CALL);
2116 /* If the flags register is set, then it doesn't create RAW
2117 dependencies any longer and it also doesn't create WAW
2118 dependencies since it's dead after the original insn. */
2119 if (TEST_HARD_REG_BIT (fset.regs, targetm.flags_regnum))
2120 {
2121 CLEAR_HARD_REG_BIT (needed.regs, targetm.flags_regnum);
2122 CLEAR_HARD_REG_BIT (fset.regs, targetm.flags_regnum);
2123 }
2124 }
2125 mark_referenced_resources (trial, &needed, true);
2126 }
2127 }
2128
2129 /* If all needed slots haven't been filled, we come here. */
2130
2131 /* Try to optimize case of jumping around a single insn. */
2132 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2133 if (slots_filled != slots_to_fill
2134 && delay_list == 0
2135 && JUMP_P (insn)
2136 && (condjump_p (insn) || condjump_in_parallel_p (insn))
2137 && !ANY_RETURN_P (JUMP_LABEL (insn)))
2138 {
2139 delay_list = optimize_skip (as_a <rtx_jump_insn *> (insn));
2140 if (delay_list)
2141 slots_filled += 1;
2142 }
2143 #endif
2144
2145 /* Try to get insns from beyond the insn needing the delay slot.
2146 These insns can neither set or reference resources set in insns being
2147 skipped, cannot set resources in the insn being skipped, and, if this
2148 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2149 call might not return).
2150
2151 There used to be code which continued past the target label if
2152 we saw all uses of the target label. This code did not work,
2153 because it failed to account for some instructions which were
2154 both annulled and marked as from the target. This can happen as a
2155 result of optimize_skip. Since this code was redundant with
2156 fill_eager_delay_slots anyways, it was just deleted. */
2157
2158 if (slots_filled != slots_to_fill
2159 /* If this instruction could throw an exception which is
2160 caught in the same function, then it's not safe to fill
2161 the delay slot with an instruction from beyond this
2162 point. For example, consider:
2163
2164 int i = 2;
2165
2166 try {
2167 f();
2168 i = 3;
2169 } catch (...) {}
2170
2171 return i;
2172
2173 Even though `i' is a local variable, we must be sure not
2174 to put `i = 3' in the delay slot if `f' might throw an
2175 exception.
2176
2177 Presumably, we should also check to see if we could get
2178 back to this function via `setjmp'. */
2179 && ! can_throw_internal (insn)
2180 && !JUMP_P (insn))
2181 {
2182 int maybe_never = 0;
2183 rtx pat, trial_delay;
2184
2185 CLEAR_RESOURCE (&needed);
2186 CLEAR_RESOURCE (&set);
2187 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
2188 mark_referenced_resources (insn, &needed, true);
2189
2190 if (CALL_P (insn))
2191 maybe_never = 1;
2192
2193 for (trial = next_nonnote_insn (insn); !stop_search_p (trial, 1);
2194 trial = next_trial)
2195 {
2196 next_trial = next_nonnote_insn (trial);
2197
2198 /* This must be an INSN or CALL_INSN. */
2199 pat = PATTERN (trial);
2200
2201 /* Stand-alone USE and CLOBBER are just for flow. */
2202 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2203 continue;
2204
2205 /* If this already has filled delay slots, get the insn needing
2206 the delay slots. */
2207 if (GET_CODE (pat) == SEQUENCE)
2208 trial_delay = XVECEXP (pat, 0, 0);
2209 else
2210 trial_delay = trial;
2211
2212 /* Stop our search when seeing a jump. */
2213 if (JUMP_P (trial_delay))
2214 break;
2215
2216 /* See if we have a resource problem before we try to split. */
2217 if (GET_CODE (pat) != SEQUENCE
2218 && ! insn_references_resource_p (trial, &set, true)
2219 && ! insn_sets_resource_p (trial, &set, true)
2220 && ! insn_sets_resource_p (trial, &needed, true)
2221 && (!HAVE_cc0 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat)))
2222 && ! (maybe_never && may_trap_or_fault_p (pat))
2223 && (trial = try_split (pat, trial, 0))
2224 && eligible_for_delay (insn, slots_filled, trial, flags)
2225 && ! can_throw_internal (trial))
2226 {
2227 next_trial = next_nonnote_insn (trial);
2228 delay_list = add_to_delay_list (trial, delay_list);
2229 if (HAVE_cc0 && reg_mentioned_p (cc0_rtx, pat))
2230 link_cc0_insns (trial);
2231
2232 delete_related_insns (trial);
2233 if (slots_to_fill == ++slots_filled)
2234 break;
2235 continue;
2236 }
2237
2238 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2239 mark_referenced_resources (trial, &needed, true);
2240
2241 /* Ensure we don't put insns between the setting of cc and the
2242 comparison by moving a setting of cc into an earlier delay
2243 slot since these insns could clobber the condition code. */
2244 set.cc = 1;
2245
2246 /* If this is a call, we might not get here. */
2247 if (CALL_P (trial_delay))
2248 maybe_never = 1;
2249 }
2250
2251 /* If there are slots left to fill and our search was stopped by an
2252 unconditional branch, try the insn at the branch target. We can
2253 redirect the branch if it works.
2254
2255 Don't do this if the insn at the branch target is a branch. */
2256 if (slots_to_fill != slots_filled
2257 && trial
2258 && jump_to_label_p (trial)
2259 && simplejump_p (trial)
2260 && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0
2261 && ! (NONJUMP_INSN_P (next_trial)
2262 && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
2263 && !JUMP_P (next_trial)
2264 && ! insn_references_resource_p (next_trial, &set, true)
2265 && ! insn_sets_resource_p (next_trial, &set, true)
2266 && ! insn_sets_resource_p (next_trial, &needed, true)
2267 && (!HAVE_cc0 || ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial)))
2268 && ! (maybe_never && may_trap_or_fault_p (PATTERN (next_trial)))
2269 && (next_trial = try_split (PATTERN (next_trial), next_trial, 0))
2270 && eligible_for_delay (insn, slots_filled, next_trial, flags)
2271 && ! can_throw_internal (trial))
2272 {
2273 /* See comment in relax_delay_slots about necessity of using
2274 next_real_insn here. */
2275 rtx_insn *new_label = next_real_insn (next_trial);
2276
2277 if (new_label != 0)
2278 new_label = get_label_before (new_label, JUMP_LABEL (trial));
2279 else
2280 new_label = find_end_label (simple_return_rtx);
2281
2282 if (new_label)
2283 {
2284 delay_list
2285 = add_to_delay_list (copy_delay_slot_insn (next_trial),
2286 delay_list);
2287 slots_filled++;
2288 reorg_redirect_jump (as_a <rtx_jump_insn *> (trial),
2289 new_label);
2290 }
2291 }
2292 }
2293
2294 /* If this is an unconditional jump, then try to get insns from the
2295 target of the jump. */
2296 rtx_jump_insn *jump_insn;
2297 if ((jump_insn = dyn_cast <rtx_jump_insn *> (insn))
2298 && simplejump_p (jump_insn)
2299 && slots_filled != slots_to_fill)
2300 delay_list
2301 = fill_slots_from_thread (jump_insn, const_true_rtx,
2302 next_active_insn (JUMP_LABEL (insn)),
2303 NULL, 1, 1,
2304 own_thread_p (JUMP_LABEL (insn),
2305 JUMP_LABEL (insn), 0),
2306 slots_to_fill, &slots_filled,
2307 delay_list);
2308
2309 if (delay_list)
2310 unfilled_slots_base[i]
2311 = emit_delay_sequence (insn, delay_list, slots_filled);
2312
2313 if (slots_to_fill == slots_filled)
2314 unfilled_slots_base[i] = 0;
2315
2316 note_delay_statistics (slots_filled, 0);
2317 }
2318 }
2319 \f
2320 /* Follow any unconditional jump at LABEL, for the purpose of redirecting JUMP;
2321 return the ultimate label reached by any such chain of jumps.
2322 Return a suitable return rtx if the chain ultimately leads to a
2323 return instruction.
2324 If LABEL is not followed by a jump, return LABEL.
2325 If the chain loops or we can't find end, return LABEL,
2326 since that tells caller to avoid changing the insn.
2327 If the returned label is obtained by following a crossing jump,
2328 set *CROSSING to true, otherwise set it to false. */
2329
2330 static rtx
2331 follow_jumps (rtx label, rtx_insn *jump, bool *crossing)
2332 {
2333 rtx_insn *insn;
2334 rtx_insn *next;
2335 int depth;
2336
2337 *crossing = false;
2338 if (ANY_RETURN_P (label))
2339 return label;
2340
2341 rtx_insn *value = as_a <rtx_insn *> (label);
2342
2343 for (depth = 0;
2344 (depth < 10
2345 && (insn = next_active_insn (value)) != 0
2346 && JUMP_P (insn)
2347 && JUMP_LABEL (insn) != NULL_RTX
2348 && ((any_uncondjump_p (insn) && onlyjump_p (insn))
2349 || ANY_RETURN_P (PATTERN (insn)))
2350 && (next = NEXT_INSN (insn))
2351 && BARRIER_P (next));
2352 depth++)
2353 {
2354 rtx this_label_or_return = JUMP_LABEL (insn);
2355
2356 /* If we have found a cycle, make the insn jump to itself. */
2357 if (this_label_or_return == label)
2358 return label;
2359
2360 /* Cannot follow returns and cannot look through tablejumps. */
2361 if (ANY_RETURN_P (this_label_or_return))
2362 return this_label_or_return;
2363
2364 rtx_insn *this_label = as_a <rtx_insn *> (this_label_or_return);
2365 if (NEXT_INSN (this_label)
2366 && JUMP_TABLE_DATA_P (NEXT_INSN (this_label)))
2367 break;
2368
2369 if (!targetm.can_follow_jump (jump, insn))
2370 break;
2371 if (!*crossing)
2372 *crossing = CROSSING_JUMP_P (jump);
2373 value = this_label;
2374 }
2375 if (depth == 10)
2376 return label;
2377 return value;
2378 }
2379
2380 /* Try to find insns to place in delay slots.
2381
2382 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2383 or is an unconditional branch if CONDITION is const_true_rtx.
2384 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2385
2386 THREAD is a flow-of-control, either the insns to be executed if the
2387 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2388
2389 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2390 to see if any potential delay slot insns set things needed there.
2391
2392 LIKELY is nonzero if it is extremely likely that the branch will be
2393 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2394 end of a loop back up to the top.
2395
2396 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
2397 thread. I.e., it is the fallthrough code of our jump or the target of the
2398 jump when we are the only jump going there.
2399
2400 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2401 case, we can only take insns from the head of the thread for our delay
2402 slot. We then adjust the jump to point after the insns we have taken. */
2403
2404 static rtx_insn_list *
2405 fill_slots_from_thread (rtx_jump_insn *insn, rtx condition,
2406 rtx thread_or_return, rtx opposite_thread, int likely,
2407 int thread_if_true, int own_thread, int slots_to_fill,
2408 int *pslots_filled, rtx_insn_list *delay_list)
2409 {
2410 rtx new_thread;
2411 struct resources opposite_needed, set, needed;
2412 rtx_insn *trial;
2413 int lose = 0;
2414 int must_annul = 0;
2415 int flags;
2416
2417 /* Validate our arguments. */
2418 gcc_assert (condition != const_true_rtx || thread_if_true);
2419 gcc_assert (own_thread || thread_if_true);
2420
2421 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2422
2423 /* If our thread is the end of subroutine, we can't get any delay
2424 insns from that. */
2425 if (thread_or_return == NULL_RTX || ANY_RETURN_P (thread_or_return))
2426 return delay_list;
2427
2428 rtx_insn *thread = as_a <rtx_insn *> (thread_or_return);
2429
2430 /* If this is an unconditional branch, nothing is needed at the
2431 opposite thread. Otherwise, compute what is needed there. */
2432 if (condition == const_true_rtx)
2433 CLEAR_RESOURCE (&opposite_needed);
2434 else
2435 mark_target_live_regs (get_insns (), opposite_thread, &opposite_needed);
2436
2437 /* If the insn at THREAD can be split, do it here to avoid having to
2438 update THREAD and NEW_THREAD if it is done in the loop below. Also
2439 initialize NEW_THREAD. */
2440
2441 new_thread = thread = try_split (PATTERN (thread), thread, 0);
2442
2443 /* Scan insns at THREAD. We are looking for an insn that can be removed
2444 from THREAD (it neither sets nor references resources that were set
2445 ahead of it and it doesn't set anything needs by the insns ahead of
2446 it) and that either can be placed in an annulling insn or aren't
2447 needed at OPPOSITE_THREAD. */
2448
2449 CLEAR_RESOURCE (&needed);
2450 CLEAR_RESOURCE (&set);
2451
2452 /* If we do not own this thread, we must stop as soon as we find
2453 something that we can't put in a delay slot, since all we can do
2454 is branch into THREAD at a later point. Therefore, labels stop
2455 the search if this is not the `true' thread. */
2456
2457 for (trial = thread;
2458 ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread);
2459 trial = next_nonnote_insn (trial))
2460 {
2461 rtx pat, old_trial;
2462
2463 /* If we have passed a label, we no longer own this thread. */
2464 if (LABEL_P (trial))
2465 {
2466 own_thread = 0;
2467 continue;
2468 }
2469
2470 pat = PATTERN (trial);
2471 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2472 continue;
2473
2474 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
2475 don't separate or copy insns that set and use CC0. */
2476 if (! insn_references_resource_p (trial, &set, true)
2477 && ! insn_sets_resource_p (trial, &set, true)
2478 && ! insn_sets_resource_p (trial, &needed, true)
2479 && (!HAVE_cc0 || (! (reg_mentioned_p (cc0_rtx, pat)
2480 && (! own_thread || ! sets_cc0_p (pat)))))
2481 && ! can_throw_internal (trial))
2482 {
2483 rtx prior_insn;
2484
2485 /* If TRIAL is redundant with some insn before INSN, we don't
2486 actually need to add it to the delay list; we can merely pretend
2487 we did. */
2488 if ((prior_insn = redundant_insn (trial, insn, delay_list)))
2489 {
2490 fix_reg_dead_note (prior_insn, insn);
2491 if (own_thread)
2492 {
2493 update_block (trial, thread);
2494 if (trial == thread)
2495 {
2496 thread = next_active_insn (thread);
2497 if (new_thread == trial)
2498 new_thread = thread;
2499 }
2500
2501 delete_related_insns (trial);
2502 }
2503 else
2504 {
2505 update_reg_unused_notes (prior_insn, trial);
2506 new_thread = next_active_insn (trial);
2507 }
2508
2509 continue;
2510 }
2511
2512 /* There are two ways we can win: If TRIAL doesn't set anything
2513 needed at the opposite thread and can't trap, or if it can
2514 go into an annulled delay slot. But we want neither to copy
2515 nor to speculate frame-related insns. */
2516 if (!must_annul
2517 && ((condition == const_true_rtx
2518 && (own_thread || !RTX_FRAME_RELATED_P (trial)))
2519 || (! insn_sets_resource_p (trial, &opposite_needed, true)
2520 && ! may_trap_or_fault_p (pat)
2521 && ! RTX_FRAME_RELATED_P (trial))))
2522 {
2523 old_trial = trial;
2524 trial = try_split (pat, trial, 0);
2525 if (new_thread == old_trial)
2526 new_thread = trial;
2527 if (thread == old_trial)
2528 thread = trial;
2529 pat = PATTERN (trial);
2530 if (eligible_for_delay (insn, *pslots_filled, trial, flags))
2531 goto winner;
2532 }
2533 else if (0
2534 #ifdef ANNUL_IFTRUE_SLOTS
2535 || ! thread_if_true
2536 #endif
2537 #ifdef ANNUL_IFFALSE_SLOTS
2538 || thread_if_true
2539 #endif
2540 )
2541 {
2542 old_trial = trial;
2543 trial = try_split (pat, trial, 0);
2544 if (new_thread == old_trial)
2545 new_thread = trial;
2546 if (thread == old_trial)
2547 thread = trial;
2548 pat = PATTERN (trial);
2549 if ((must_annul || delay_list == NULL) && (thread_if_true
2550 ? check_annul_list_true_false (0, delay_list)
2551 && eligible_for_annul_false (insn, *pslots_filled, trial, flags)
2552 : check_annul_list_true_false (1, delay_list)
2553 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
2554 {
2555 rtx_insn *temp;
2556
2557 must_annul = 1;
2558 winner:
2559
2560 if (HAVE_cc0 && reg_mentioned_p (cc0_rtx, pat))
2561 link_cc0_insns (trial);
2562
2563 /* If we own this thread, delete the insn. If this is the
2564 destination of a branch, show that a basic block status
2565 may have been updated. In any case, mark the new
2566 starting point of this thread. */
2567 if (own_thread)
2568 {
2569 rtx note;
2570
2571 update_block (trial, thread);
2572 if (trial == thread)
2573 {
2574 thread = next_active_insn (thread);
2575 if (new_thread == trial)
2576 new_thread = thread;
2577 }
2578
2579 /* We are moving this insn, not deleting it. We must
2580 temporarily increment the use count on any referenced
2581 label lest it be deleted by delete_related_insns. */
2582 for (note = REG_NOTES (trial);
2583 note != NULL_RTX;
2584 note = XEXP (note, 1))
2585 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2586 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2587 {
2588 /* REG_LABEL_OPERAND could be
2589 NOTE_INSN_DELETED_LABEL too. */
2590 if (LABEL_P (XEXP (note, 0)))
2591 LABEL_NUSES (XEXP (note, 0))++;
2592 else
2593 gcc_assert (REG_NOTE_KIND (note)
2594 == REG_LABEL_OPERAND);
2595 }
2596 if (jump_to_label_p (trial))
2597 LABEL_NUSES (JUMP_LABEL (trial))++;
2598
2599 delete_related_insns (trial);
2600
2601 for (note = REG_NOTES (trial);
2602 note != NULL_RTX;
2603 note = XEXP (note, 1))
2604 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2605 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2606 {
2607 /* REG_LABEL_OPERAND could be
2608 NOTE_INSN_DELETED_LABEL too. */
2609 if (LABEL_P (XEXP (note, 0)))
2610 LABEL_NUSES (XEXP (note, 0))--;
2611 else
2612 gcc_assert (REG_NOTE_KIND (note)
2613 == REG_LABEL_OPERAND);
2614 }
2615 if (jump_to_label_p (trial))
2616 LABEL_NUSES (JUMP_LABEL (trial))--;
2617 }
2618 else
2619 new_thread = next_active_insn (trial);
2620
2621 temp = own_thread ? trial : copy_delay_slot_insn (trial);
2622 if (thread_if_true)
2623 INSN_FROM_TARGET_P (temp) = 1;
2624
2625 delay_list = add_to_delay_list (temp, delay_list);
2626
2627 if (slots_to_fill == ++(*pslots_filled))
2628 {
2629 /* Even though we have filled all the slots, we
2630 may be branching to a location that has a
2631 redundant insn. Skip any if so. */
2632 while (new_thread && ! own_thread
2633 && ! insn_sets_resource_p (new_thread, &set, true)
2634 && ! insn_sets_resource_p (new_thread, &needed,
2635 true)
2636 && ! insn_references_resource_p (new_thread,
2637 &set, true)
2638 && (prior_insn
2639 = redundant_insn (new_thread, insn,
2640 delay_list)))
2641 {
2642 /* We know we do not own the thread, so no need
2643 to call update_block and delete_insn. */
2644 fix_reg_dead_note (prior_insn, insn);
2645 update_reg_unused_notes (prior_insn, new_thread);
2646 new_thread = next_active_insn (new_thread);
2647 }
2648 break;
2649 }
2650
2651 continue;
2652 }
2653 }
2654 }
2655
2656 /* This insn can't go into a delay slot. */
2657 lose = 1;
2658 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2659 mark_referenced_resources (trial, &needed, true);
2660
2661 /* Ensure we don't put insns between the setting of cc and the comparison
2662 by moving a setting of cc into an earlier delay slot since these insns
2663 could clobber the condition code. */
2664 set.cc = 1;
2665
2666 /* If this insn is a register-register copy and the next insn has
2667 a use of our destination, change it to use our source. That way,
2668 it will become a candidate for our delay slot the next time
2669 through this loop. This case occurs commonly in loops that
2670 scan a list.
2671
2672 We could check for more complex cases than those tested below,
2673 but it doesn't seem worth it. It might also be a good idea to try
2674 to swap the two insns. That might do better.
2675
2676 We can't do this if the next insn modifies our destination, because
2677 that would make the replacement into the insn invalid. We also can't
2678 do this if it modifies our source, because it might be an earlyclobber
2679 operand. This latter test also prevents updating the contents of
2680 a PRE_INC. We also can't do this if there's overlap of source and
2681 destination. Overlap may happen for larger-than-register-size modes. */
2682
2683 if (NONJUMP_INSN_P (trial) && GET_CODE (pat) == SET
2684 && REG_P (SET_SRC (pat))
2685 && REG_P (SET_DEST (pat))
2686 && !reg_overlap_mentioned_p (SET_DEST (pat), SET_SRC (pat)))
2687 {
2688 rtx_insn *next = next_nonnote_insn (trial);
2689
2690 if (next && NONJUMP_INSN_P (next)
2691 && GET_CODE (PATTERN (next)) != USE
2692 && ! reg_set_p (SET_DEST (pat), next)
2693 && ! reg_set_p (SET_SRC (pat), next)
2694 && reg_referenced_p (SET_DEST (pat), PATTERN (next))
2695 && ! modified_in_p (SET_DEST (pat), next))
2696 validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next);
2697 }
2698 }
2699
2700 /* If we stopped on a branch insn that has delay slots, see if we can
2701 steal some of the insns in those slots. */
2702 if (trial && NONJUMP_INSN_P (trial)
2703 && GET_CODE (PATTERN (trial)) == SEQUENCE
2704 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0)))
2705 {
2706 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (trial));
2707 /* If this is the `true' thread, we will want to follow the jump,
2708 so we can only do this if we have taken everything up to here. */
2709 if (thread_if_true && trial == new_thread)
2710 {
2711 delay_list
2712 = steal_delay_list_from_target (insn, condition, sequence,
2713 delay_list, &set, &needed,
2714 &opposite_needed, slots_to_fill,
2715 pslots_filled, &must_annul,
2716 &new_thread);
2717 /* If we owned the thread and are told that it branched
2718 elsewhere, make sure we own the thread at the new location. */
2719 if (own_thread && trial != new_thread)
2720 own_thread = own_thread_p (new_thread, new_thread, 0);
2721 }
2722 else if (! thread_if_true)
2723 delay_list
2724 = steal_delay_list_from_fallthrough (insn, condition,
2725 sequence,
2726 delay_list, &set, &needed,
2727 &opposite_needed, slots_to_fill,
2728 pslots_filled, &must_annul);
2729 }
2730
2731 /* If we haven't found anything for this delay slot and it is very
2732 likely that the branch will be taken, see if the insn at our target
2733 increments or decrements a register with an increment that does not
2734 depend on the destination register. If so, try to place the opposite
2735 arithmetic insn after the jump insn and put the arithmetic insn in the
2736 delay slot. If we can't do this, return. */
2737 if (delay_list == 0 && likely
2738 && new_thread && !ANY_RETURN_P (new_thread)
2739 && NONJUMP_INSN_P (new_thread)
2740 && !RTX_FRAME_RELATED_P (new_thread)
2741 && GET_CODE (PATTERN (new_thread)) != ASM_INPUT
2742 && asm_noperands (PATTERN (new_thread)) < 0)
2743 {
2744 rtx pat = PATTERN (new_thread);
2745 rtx dest;
2746 rtx src;
2747
2748 /* We know "new_thread" is an insn due to NONJUMP_INSN_P (new_thread)
2749 above. */
2750 trial = as_a <rtx_insn *> (new_thread);
2751 pat = PATTERN (trial);
2752
2753 if (!NONJUMP_INSN_P (trial)
2754 || GET_CODE (pat) != SET
2755 || ! eligible_for_delay (insn, 0, trial, flags)
2756 || can_throw_internal (trial))
2757 return 0;
2758
2759 dest = SET_DEST (pat), src = SET_SRC (pat);
2760 if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS)
2761 && rtx_equal_p (XEXP (src, 0), dest)
2762 && (!FLOAT_MODE_P (GET_MODE (src))
2763 || flag_unsafe_math_optimizations)
2764 && ! reg_overlap_mentioned_p (dest, XEXP (src, 1))
2765 && ! side_effects_p (pat))
2766 {
2767 rtx other = XEXP (src, 1);
2768 rtx new_arith;
2769 rtx_insn *ninsn;
2770
2771 /* If this is a constant adjustment, use the same code with
2772 the negated constant. Otherwise, reverse the sense of the
2773 arithmetic. */
2774 if (CONST_INT_P (other))
2775 new_arith = gen_rtx_fmt_ee (GET_CODE (src), GET_MODE (src), dest,
2776 negate_rtx (GET_MODE (src), other));
2777 else
2778 new_arith = gen_rtx_fmt_ee (GET_CODE (src) == PLUS ? MINUS : PLUS,
2779 GET_MODE (src), dest, other);
2780
2781 ninsn = emit_insn_after (gen_rtx_SET (dest, new_arith), insn);
2782
2783 if (recog_memoized (ninsn) < 0
2784 || (extract_insn (ninsn),
2785 !constrain_operands (1, get_preferred_alternatives (ninsn))))
2786 {
2787 delete_related_insns (ninsn);
2788 return 0;
2789 }
2790
2791 if (own_thread)
2792 {
2793 update_block (trial, thread);
2794 if (trial == thread)
2795 {
2796 thread = next_active_insn (thread);
2797 if (new_thread == trial)
2798 new_thread = thread;
2799 }
2800 delete_related_insns (trial);
2801 }
2802 else
2803 new_thread = next_active_insn (trial);
2804
2805 ninsn = own_thread ? trial : copy_delay_slot_insn (trial);
2806 if (thread_if_true)
2807 INSN_FROM_TARGET_P (ninsn) = 1;
2808
2809 delay_list = add_to_delay_list (ninsn, NULL);
2810 (*pslots_filled)++;
2811 }
2812 }
2813
2814 if (delay_list && must_annul)
2815 INSN_ANNULLED_BRANCH_P (insn) = 1;
2816
2817 /* If we are to branch into the middle of this thread, find an appropriate
2818 label or make a new one if none, and redirect INSN to it. If we hit the
2819 end of the function, use the end-of-function label. */
2820 if (new_thread != thread)
2821 {
2822 rtx label;
2823 bool crossing = false;
2824
2825 gcc_assert (thread_if_true);
2826
2827 if (new_thread && simplejump_or_return_p (new_thread)
2828 && redirect_with_delay_list_safe_p (insn,
2829 JUMP_LABEL (new_thread),
2830 delay_list))
2831 new_thread = follow_jumps (JUMP_LABEL (new_thread), insn,
2832 &crossing);
2833
2834 if (ANY_RETURN_P (new_thread))
2835 label = find_end_label (new_thread);
2836 else if (LABEL_P (new_thread))
2837 label = new_thread;
2838 else
2839 label = get_label_before (as_a <rtx_insn *> (new_thread),
2840 JUMP_LABEL (insn));
2841
2842 if (label)
2843 {
2844 reorg_redirect_jump (insn, label);
2845 if (crossing)
2846 CROSSING_JUMP_P (insn) = 1;
2847 }
2848 }
2849
2850 return delay_list;
2851 }
2852 \f
2853 /* Make another attempt to find insns to place in delay slots.
2854
2855 We previously looked for insns located in front of the delay insn
2856 and, for non-jump delay insns, located behind the delay insn.
2857
2858 Here only try to schedule jump insns and try to move insns from either
2859 the target or the following insns into the delay slot. If annulling is
2860 supported, we will be likely to do this. Otherwise, we can do this only
2861 if safe. */
2862
2863 static void
2864 fill_eager_delay_slots (void)
2865 {
2866 rtx_insn *insn;
2867 int i;
2868 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2869
2870 for (i = 0; i < num_unfilled_slots; i++)
2871 {
2872 rtx condition;
2873 rtx target_label, insn_at_target;
2874 rtx_insn *fallthrough_insn;
2875 rtx_insn_list *delay_list = 0;
2876 rtx_jump_insn *jump_insn;
2877 int own_target;
2878 int own_fallthrough;
2879 int prediction, slots_to_fill, slots_filled;
2880
2881 insn = unfilled_slots_base[i];
2882 if (insn == 0
2883 || insn->deleted ()
2884 || ! (jump_insn = dyn_cast <rtx_jump_insn *> (insn))
2885 || ! (condjump_p (jump_insn) || condjump_in_parallel_p (jump_insn)))
2886 continue;
2887
2888 slots_to_fill = num_delay_slots (jump_insn);
2889 /* Some machine description have defined instructions to have
2890 delay slots only in certain circumstances which may depend on
2891 nearby insns (which change due to reorg's actions).
2892
2893 For example, the PA port normally has delay slots for unconditional
2894 jumps.
2895
2896 However, the PA port claims such jumps do not have a delay slot
2897 if they are immediate successors of certain CALL_INSNs. This
2898 allows the port to favor filling the delay slot of the call with
2899 the unconditional jump. */
2900 if (slots_to_fill == 0)
2901 continue;
2902
2903 slots_filled = 0;
2904 target_label = JUMP_LABEL (jump_insn);
2905 condition = get_branch_condition (jump_insn, target_label);
2906
2907 if (condition == 0)
2908 continue;
2909
2910 /* Get the next active fallthrough and target insns and see if we own
2911 them. Then see whether the branch is likely true. We don't need
2912 to do a lot of this for unconditional branches. */
2913
2914 insn_at_target = first_active_target_insn (target_label);
2915 own_target = own_thread_p (target_label, target_label, 0);
2916
2917 if (condition == const_true_rtx)
2918 {
2919 own_fallthrough = 0;
2920 fallthrough_insn = 0;
2921 prediction = 2;
2922 }
2923 else
2924 {
2925 fallthrough_insn = next_active_insn (jump_insn);
2926 own_fallthrough = own_thread_p (NEXT_INSN (jump_insn), NULL_RTX, 1);
2927 prediction = mostly_true_jump (jump_insn);
2928 }
2929
2930 /* If this insn is expected to branch, first try to get insns from our
2931 target, then our fallthrough insns. If it is not expected to branch,
2932 try the other order. */
2933
2934 if (prediction > 0)
2935 {
2936 delay_list
2937 = fill_slots_from_thread (jump_insn, condition, insn_at_target,
2938 fallthrough_insn, prediction == 2, 1,
2939 own_target,
2940 slots_to_fill, &slots_filled, delay_list);
2941
2942 if (delay_list == 0 && own_fallthrough)
2943 {
2944 /* Even though we didn't find anything for delay slots,
2945 we might have found a redundant insn which we deleted
2946 from the thread that was filled. So we have to recompute
2947 the next insn at the target. */
2948 target_label = JUMP_LABEL (jump_insn);
2949 insn_at_target = first_active_target_insn (target_label);
2950
2951 delay_list
2952 = fill_slots_from_thread (jump_insn, condition,
2953 fallthrough_insn,
2954 insn_at_target, 0, 0,
2955 own_fallthrough,
2956 slots_to_fill, &slots_filled,
2957 delay_list);
2958 }
2959 }
2960 else
2961 {
2962 if (own_fallthrough)
2963 delay_list
2964 = fill_slots_from_thread (jump_insn, condition, fallthrough_insn,
2965 insn_at_target, 0, 0,
2966 own_fallthrough,
2967 slots_to_fill, &slots_filled,
2968 delay_list);
2969
2970 if (delay_list == 0)
2971 delay_list
2972 = fill_slots_from_thread (jump_insn, condition, insn_at_target,
2973 next_active_insn (insn), 0, 1,
2974 own_target,
2975 slots_to_fill, &slots_filled,
2976 delay_list);
2977 }
2978
2979 if (delay_list)
2980 unfilled_slots_base[i]
2981 = emit_delay_sequence (jump_insn, delay_list, slots_filled);
2982
2983 if (slots_to_fill == slots_filled)
2984 unfilled_slots_base[i] = 0;
2985
2986 note_delay_statistics (slots_filled, 1);
2987 }
2988 }
2989 \f
2990 static void delete_computation (rtx insn);
2991
2992 /* Recursively delete prior insns that compute the value (used only by INSN
2993 which the caller is deleting) stored in the register mentioned by NOTE
2994 which is a REG_DEAD note associated with INSN. */
2995
2996 static void
2997 delete_prior_computation (rtx note, rtx insn)
2998 {
2999 rtx our_prev;
3000 rtx reg = XEXP (note, 0);
3001
3002 for (our_prev = prev_nonnote_insn (insn);
3003 our_prev && (NONJUMP_INSN_P (our_prev)
3004 || CALL_P (our_prev));
3005 our_prev = prev_nonnote_insn (our_prev))
3006 {
3007 rtx pat = PATTERN (our_prev);
3008
3009 /* If we reach a CALL which is not calling a const function
3010 or the callee pops the arguments, then give up. */
3011 if (CALL_P (our_prev)
3012 && (! RTL_CONST_CALL_P (our_prev)
3013 || GET_CODE (pat) != SET || GET_CODE (SET_SRC (pat)) != CALL))
3014 break;
3015
3016 /* If we reach a SEQUENCE, it is too complex to try to
3017 do anything with it, so give up. We can be run during
3018 and after reorg, so SEQUENCE rtl can legitimately show
3019 up here. */
3020 if (GET_CODE (pat) == SEQUENCE)
3021 break;
3022
3023 if (GET_CODE (pat) == USE
3024 && NONJUMP_INSN_P (XEXP (pat, 0)))
3025 /* reorg creates USEs that look like this. We leave them
3026 alone because reorg needs them for its own purposes. */
3027 break;
3028
3029 if (reg_set_p (reg, pat))
3030 {
3031 if (side_effects_p (pat) && !CALL_P (our_prev))
3032 break;
3033
3034 if (GET_CODE (pat) == PARALLEL)
3035 {
3036 /* If we find a SET of something else, we can't
3037 delete the insn. */
3038
3039 int i;
3040
3041 for (i = 0; i < XVECLEN (pat, 0); i++)
3042 {
3043 rtx part = XVECEXP (pat, 0, i);
3044
3045 if (GET_CODE (part) == SET
3046 && SET_DEST (part) != reg)
3047 break;
3048 }
3049
3050 if (i == XVECLEN (pat, 0))
3051 delete_computation (our_prev);
3052 }
3053 else if (GET_CODE (pat) == SET
3054 && REG_P (SET_DEST (pat)))
3055 {
3056 int dest_regno = REGNO (SET_DEST (pat));
3057 int dest_endregno = END_REGNO (SET_DEST (pat));
3058 int regno = REGNO (reg);
3059 int endregno = END_REGNO (reg);
3060
3061 if (dest_regno >= regno
3062 && dest_endregno <= endregno)
3063 delete_computation (our_prev);
3064
3065 /* We may have a multi-word hard register and some, but not
3066 all, of the words of the register are needed in subsequent
3067 insns. Write REG_UNUSED notes for those parts that were not
3068 needed. */
3069 else if (dest_regno <= regno
3070 && dest_endregno >= endregno)
3071 {
3072 int i;
3073
3074 add_reg_note (our_prev, REG_UNUSED, reg);
3075
3076 for (i = dest_regno; i < dest_endregno; i++)
3077 if (! find_regno_note (our_prev, REG_UNUSED, i))
3078 break;
3079
3080 if (i == dest_endregno)
3081 delete_computation (our_prev);
3082 }
3083 }
3084
3085 break;
3086 }
3087
3088 /* If PAT references the register that dies here, it is an
3089 additional use. Hence any prior SET isn't dead. However, this
3090 insn becomes the new place for the REG_DEAD note. */
3091 if (reg_overlap_mentioned_p (reg, pat))
3092 {
3093 XEXP (note, 1) = REG_NOTES (our_prev);
3094 REG_NOTES (our_prev) = note;
3095 break;
3096 }
3097 }
3098 }
3099
3100 /* Delete INSN and recursively delete insns that compute values used only
3101 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3102
3103 Look at all our REG_DEAD notes. If a previous insn does nothing other
3104 than set a register that dies in this insn, we can delete that insn
3105 as well.
3106
3107 On machines with CC0, if CC0 is used in this insn, we may be able to
3108 delete the insn that set it. */
3109
3110 static void
3111 delete_computation (rtx insn)
3112 {
3113 rtx note, next;
3114
3115 if (HAVE_cc0 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
3116 {
3117 rtx_insn *prev = prev_nonnote_insn (insn);
3118 /* We assume that at this stage
3119 CC's are always set explicitly
3120 and always immediately before the jump that
3121 will use them. So if the previous insn
3122 exists to set the CC's, delete it
3123 (unless it performs auto-increments, etc.). */
3124 if (prev && NONJUMP_INSN_P (prev)
3125 && sets_cc0_p (PATTERN (prev)))
3126 {
3127 if (sets_cc0_p (PATTERN (prev)) > 0
3128 && ! side_effects_p (PATTERN (prev)))
3129 delete_computation (prev);
3130 else
3131 /* Otherwise, show that cc0 won't be used. */
3132 add_reg_note (prev, REG_UNUSED, cc0_rtx);
3133 }
3134 }
3135
3136 for (note = REG_NOTES (insn); note; note = next)
3137 {
3138 next = XEXP (note, 1);
3139
3140 if (REG_NOTE_KIND (note) != REG_DEAD
3141 /* Verify that the REG_NOTE is legitimate. */
3142 || !REG_P (XEXP (note, 0)))
3143 continue;
3144
3145 delete_prior_computation (note, insn);
3146 }
3147
3148 delete_related_insns (insn);
3149 }
3150
3151 /* If all INSN does is set the pc, delete it,
3152 and delete the insn that set the condition codes for it
3153 if that's what the previous thing was. */
3154
3155 static void
3156 delete_jump (rtx_insn *insn)
3157 {
3158 rtx set = single_set (insn);
3159
3160 if (set && GET_CODE (SET_DEST (set)) == PC)
3161 delete_computation (insn);
3162 }
3163
3164 static rtx_insn *
3165 label_before_next_insn (rtx x, rtx scan_limit)
3166 {
3167 rtx_insn *insn = next_active_insn (x);
3168 while (insn)
3169 {
3170 insn = PREV_INSN (insn);
3171 if (insn == scan_limit || insn == NULL_RTX)
3172 return NULL;
3173 if (LABEL_P (insn))
3174 break;
3175 }
3176 return insn;
3177 }
3178
3179 /* Return TRUE if there is a NOTE_INSN_SWITCH_TEXT_SECTIONS note in between
3180 BEG and END. */
3181
3182 static bool
3183 switch_text_sections_between_p (const rtx_insn *beg, const rtx_insn *end)
3184 {
3185 const rtx_insn *p;
3186 for (p = beg; p != end; p = NEXT_INSN (p))
3187 if (NOTE_P (p) && NOTE_KIND (p) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
3188 return true;
3189 return false;
3190 }
3191
3192 \f
3193 /* Once we have tried two ways to fill a delay slot, make a pass over the
3194 code to try to improve the results and to do such things as more jump
3195 threading. */
3196
3197 static void
3198 relax_delay_slots (rtx_insn *first)
3199 {
3200 rtx_insn *insn, *next;
3201 rtx_sequence *pat;
3202 rtx trial;
3203 rtx_insn *delay_insn;
3204 rtx target_label;
3205
3206 /* Look at every JUMP_INSN and see if we can improve it. */
3207 for (insn = first; insn; insn = next)
3208 {
3209 rtx_insn *other;
3210 bool crossing;
3211
3212 next = next_active_insn (insn);
3213
3214 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3215 the next insn, or jumps to a label that is not the last of a
3216 group of consecutive labels. */
3217 if (is_a <rtx_jump_insn *> (insn)
3218 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3219 && !ANY_RETURN_P (target_label = JUMP_LABEL (insn)))
3220 {
3221 rtx_jump_insn *jump_insn = as_a <rtx_jump_insn *> (insn);
3222 target_label
3223 = skip_consecutive_labels (follow_jumps (target_label, jump_insn,
3224 &crossing));
3225 if (ANY_RETURN_P (target_label))
3226 target_label = find_end_label (target_label);
3227
3228 if (target_label && next_active_insn (target_label) == next
3229 && ! condjump_in_parallel_p (jump_insn)
3230 && ! (next && switch_text_sections_between_p (jump_insn, next)))
3231 {
3232 delete_jump (jump_insn);
3233 continue;
3234 }
3235
3236 if (target_label && target_label != JUMP_LABEL (jump_insn))
3237 {
3238 reorg_redirect_jump (jump_insn, target_label);
3239 if (crossing)
3240 CROSSING_JUMP_P (jump_insn) = 1;
3241 }
3242
3243 /* See if this jump conditionally branches around an unconditional
3244 jump. If so, invert this jump and point it to the target of the
3245 second jump. Check if it's possible on the target. */
3246 if (next && simplejump_or_return_p (next)
3247 && any_condjump_p (jump_insn)
3248 && target_label
3249 && next_active_insn (target_label) == next_active_insn (next)
3250 && no_labels_between_p (jump_insn, next)
3251 && targetm.can_follow_jump (jump_insn, next))
3252 {
3253 rtx label = JUMP_LABEL (next);
3254
3255 /* Be careful how we do this to avoid deleting code or
3256 labels that are momentarily dead. See similar optimization
3257 in jump.c.
3258
3259 We also need to ensure we properly handle the case when
3260 invert_jump fails. */
3261
3262 ++LABEL_NUSES (target_label);
3263 if (!ANY_RETURN_P (label))
3264 ++LABEL_NUSES (label);
3265
3266 if (invert_jump (jump_insn, label, 1))
3267 {
3268 delete_related_insns (next);
3269 next = jump_insn;
3270 }
3271
3272 if (!ANY_RETURN_P (label))
3273 --LABEL_NUSES (label);
3274
3275 if (--LABEL_NUSES (target_label) == 0)
3276 delete_related_insns (target_label);
3277
3278 continue;
3279 }
3280 }
3281
3282 /* If this is an unconditional jump and the previous insn is a
3283 conditional jump, try reversing the condition of the previous
3284 insn and swapping our targets. The next pass might be able to
3285 fill the slots.
3286
3287 Don't do this if we expect the conditional branch to be true, because
3288 we would then be making the more common case longer. */
3289
3290 if (simplejump_or_return_p (insn)
3291 && (other = prev_active_insn (insn)) != 0
3292 && any_condjump_p (other)
3293 && no_labels_between_p (other, insn)
3294 && 0 > mostly_true_jump (other))
3295 {
3296 rtx other_target = JUMP_LABEL (other);
3297 target_label = JUMP_LABEL (insn);
3298
3299 if (invert_jump (as_a <rtx_jump_insn *> (other), target_label, 0))
3300 reorg_redirect_jump (as_a <rtx_jump_insn *> (insn), other_target);
3301 }
3302
3303 /* Now look only at cases where we have a filled delay slot. */
3304 if (!NONJUMP_INSN_P (insn) || GET_CODE (PATTERN (insn)) != SEQUENCE)
3305 continue;
3306
3307 pat = as_a <rtx_sequence *> (PATTERN (insn));
3308 delay_insn = pat->insn (0);
3309
3310 /* See if the first insn in the delay slot is redundant with some
3311 previous insn. Remove it from the delay slot if so; then set up
3312 to reprocess this insn. */
3313 if (redundant_insn (pat->insn (1), delay_insn, 0))
3314 {
3315 update_block (pat->insn (1), insn);
3316 delete_from_delay_slot (pat->insn (1));
3317 next = prev_active_insn (next);
3318 continue;
3319 }
3320
3321 /* See if we have a RETURN insn with a filled delay slot followed
3322 by a RETURN insn with an unfilled a delay slot. If so, we can delete
3323 the first RETURN (but not its delay insn). This gives the same
3324 effect in fewer instructions.
3325
3326 Only do so if optimizing for size since this results in slower, but
3327 smaller code. */
3328 if (optimize_function_for_size_p (cfun)
3329 && ANY_RETURN_P (PATTERN (delay_insn))
3330 && next
3331 && JUMP_P (next)
3332 && PATTERN (next) == PATTERN (delay_insn))
3333 {
3334 rtx_insn *after;
3335 int i;
3336
3337 /* Delete the RETURN and just execute the delay list insns.
3338
3339 We do this by deleting the INSN containing the SEQUENCE, then
3340 re-emitting the insns separately, and then deleting the RETURN.
3341 This allows the count of the jump target to be properly
3342 decremented.
3343
3344 Note that we need to change the INSN_UID of the re-emitted insns
3345 since it is used to hash the insns for mark_target_live_regs and
3346 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3347
3348 Clear the from target bit, since these insns are no longer
3349 in delay slots. */
3350 for (i = 0; i < XVECLEN (pat, 0); i++)
3351 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3352
3353 trial = PREV_INSN (insn);
3354 delete_related_insns (insn);
3355 gcc_assert (GET_CODE (pat) == SEQUENCE);
3356 add_insn_after (delay_insn, trial, NULL);
3357 after = delay_insn;
3358 for (i = 1; i < pat->len (); i++)
3359 after = emit_copy_of_insn_after (pat->insn (i), after);
3360 delete_scheduled_jump (delay_insn);
3361 continue;
3362 }
3363
3364 /* Now look only at the cases where we have a filled JUMP_INSN. */
3365 rtx_jump_insn *delay_jump_insn =
3366 dyn_cast <rtx_jump_insn *> (delay_insn);
3367 if (! delay_jump_insn || !(condjump_p (delay_jump_insn)
3368 || condjump_in_parallel_p (delay_jump_insn)))
3369 continue;
3370
3371 target_label = JUMP_LABEL (delay_jump_insn);
3372 if (target_label && ANY_RETURN_P (target_label))
3373 continue;
3374
3375 /* If this jump goes to another unconditional jump, thread it, but
3376 don't convert a jump into a RETURN here. */
3377 trial = skip_consecutive_labels (follow_jumps (target_label,
3378 delay_jump_insn,
3379 &crossing));
3380 if (ANY_RETURN_P (trial))
3381 trial = find_end_label (trial);
3382
3383 if (trial && trial != target_label
3384 && redirect_with_delay_slots_safe_p (delay_jump_insn, trial, insn))
3385 {
3386 reorg_redirect_jump (delay_jump_insn, trial);
3387 target_label = trial;
3388 if (crossing)
3389 CROSSING_JUMP_P (insn) = 1;
3390 }
3391
3392 /* If the first insn at TARGET_LABEL is redundant with a previous
3393 insn, redirect the jump to the following insn and process again.
3394 We use next_real_insn instead of next_active_insn so we
3395 don't skip USE-markers, or we'll end up with incorrect
3396 liveness info. */
3397 trial = next_real_insn (target_label);
3398 if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE
3399 && redundant_insn (trial, insn, 0)
3400 && ! can_throw_internal (trial))
3401 {
3402 /* Figure out where to emit the special USE insn so we don't
3403 later incorrectly compute register live/death info. */
3404 rtx_insn *tmp = next_active_insn (trial);
3405 if (tmp == 0)
3406 tmp = find_end_label (simple_return_rtx);
3407
3408 if (tmp)
3409 {
3410 /* Insert the special USE insn and update dataflow info.
3411 We know "trial" is an insn here as it is the output of
3412 next_real_insn () above. */
3413 update_block (as_a <rtx_insn *> (trial), tmp);
3414
3415 /* Now emit a label before the special USE insn, and
3416 redirect our jump to the new label. */
3417 target_label = get_label_before (PREV_INSN (tmp), target_label);
3418 reorg_redirect_jump (delay_jump_insn, target_label);
3419 next = insn;
3420 continue;
3421 }
3422 }
3423
3424 /* Similarly, if it is an unconditional jump with one insn in its
3425 delay list and that insn is redundant, thread the jump. */
3426 rtx_sequence *trial_seq =
3427 trial ? dyn_cast <rtx_sequence *> (PATTERN (trial)) : NULL;
3428 if (trial_seq
3429 && trial_seq->len () == 2
3430 && JUMP_P (trial_seq->insn (0))
3431 && simplejump_or_return_p (trial_seq->insn (0))
3432 && redundant_insn (trial_seq->insn (1), insn, 0))
3433 {
3434 target_label = JUMP_LABEL (trial_seq->insn (0));
3435 if (ANY_RETURN_P (target_label))
3436 target_label = find_end_label (target_label);
3437
3438 if (target_label
3439 && redirect_with_delay_slots_safe_p (delay_jump_insn,
3440 target_label, insn))
3441 {
3442 update_block (trial_seq->insn (1), insn);
3443 reorg_redirect_jump (delay_jump_insn, target_label);
3444 next = insn;
3445 continue;
3446 }
3447 }
3448
3449 /* See if we have a simple (conditional) jump that is useless. */
3450 if (! INSN_ANNULLED_BRANCH_P (delay_jump_insn)
3451 && ! condjump_in_parallel_p (delay_jump_insn)
3452 && prev_active_insn (target_label) == insn
3453 && ! BARRIER_P (prev_nonnote_insn (target_label))
3454 #if HAVE_cc0
3455 /* If the last insn in the delay slot sets CC0 for some insn,
3456 various code assumes that it is in a delay slot. We could
3457 put it back where it belonged and delete the register notes,
3458 but it doesn't seem worthwhile in this uncommon case. */
3459 && ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1),
3460 REG_CC_USER, NULL_RTX)
3461 #endif
3462 )
3463 {
3464 rtx_insn *after;
3465 int i;
3466
3467 /* All this insn does is execute its delay list and jump to the
3468 following insn. So delete the jump and just execute the delay
3469 list insns.
3470
3471 We do this by deleting the INSN containing the SEQUENCE, then
3472 re-emitting the insns separately, and then deleting the jump.
3473 This allows the count of the jump target to be properly
3474 decremented.
3475
3476 Note that we need to change the INSN_UID of the re-emitted insns
3477 since it is used to hash the insns for mark_target_live_regs and
3478 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3479
3480 Clear the from target bit, since these insns are no longer
3481 in delay slots. */
3482 for (i = 0; i < XVECLEN (pat, 0); i++)
3483 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3484
3485 trial = PREV_INSN (insn);
3486 delete_related_insns (insn);
3487 gcc_assert (GET_CODE (pat) == SEQUENCE);
3488 add_insn_after (delay_jump_insn, trial, NULL);
3489 after = delay_jump_insn;
3490 for (i = 1; i < pat->len (); i++)
3491 after = emit_copy_of_insn_after (pat->insn (i), after);
3492 delete_scheduled_jump (delay_jump_insn);
3493 continue;
3494 }
3495
3496 /* See if this is an unconditional jump around a single insn which is
3497 identical to the one in its delay slot. In this case, we can just
3498 delete the branch and the insn in its delay slot. */
3499 if (next && NONJUMP_INSN_P (next)
3500 && label_before_next_insn (next, insn) == target_label
3501 && simplejump_p (insn)
3502 && XVECLEN (pat, 0) == 2
3503 && rtx_equal_p (PATTERN (next), PATTERN (pat->insn (1))))
3504 {
3505 delete_related_insns (insn);
3506 continue;
3507 }
3508
3509 /* See if this jump (with its delay slots) conditionally branches
3510 around an unconditional jump (without delay slots). If so, invert
3511 this jump and point it to the target of the second jump. We cannot
3512 do this for annulled jumps, though. Again, don't convert a jump to
3513 a RETURN here. */
3514 if (! INSN_ANNULLED_BRANCH_P (delay_jump_insn)
3515 && any_condjump_p (delay_jump_insn)
3516 && next && simplejump_or_return_p (next)
3517 && next_active_insn (target_label) == next_active_insn (next)
3518 && no_labels_between_p (insn, next))
3519 {
3520 rtx label = JUMP_LABEL (next);
3521 rtx old_label = JUMP_LABEL (delay_jump_insn);
3522
3523 if (ANY_RETURN_P (label))
3524 label = find_end_label (label);
3525
3526 /* find_end_label can generate a new label. Check this first. */
3527 if (label
3528 && no_labels_between_p (insn, next)
3529 && redirect_with_delay_slots_safe_p (delay_jump_insn,
3530 label, insn))
3531 {
3532 /* Be careful how we do this to avoid deleting code or labels
3533 that are momentarily dead. See similar optimization in
3534 jump.c */
3535 if (old_label)
3536 ++LABEL_NUSES (old_label);
3537
3538 if (invert_jump (delay_jump_insn, label, 1))
3539 {
3540 int i;
3541
3542 /* Must update the INSN_FROM_TARGET_P bits now that
3543 the branch is reversed, so that mark_target_live_regs
3544 will handle the delay slot insn correctly. */
3545 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
3546 {
3547 rtx slot = XVECEXP (PATTERN (insn), 0, i);
3548 INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot);
3549 }
3550
3551 delete_related_insns (next);
3552 next = insn;
3553 }
3554
3555 if (old_label && --LABEL_NUSES (old_label) == 0)
3556 delete_related_insns (old_label);
3557 continue;
3558 }
3559 }
3560
3561 /* If we own the thread opposite the way this insn branches, see if we
3562 can merge its delay slots with following insns. */
3563 if (INSN_FROM_TARGET_P (pat->insn (1))
3564 && own_thread_p (NEXT_INSN (insn), 0, 1))
3565 try_merge_delay_insns (insn, next);
3566 else if (! INSN_FROM_TARGET_P (pat->insn (1))
3567 && own_thread_p (target_label, target_label, 0))
3568 try_merge_delay_insns (insn, next_active_insn (target_label));
3569
3570 /* If we get here, we haven't deleted INSN. But we may have deleted
3571 NEXT, so recompute it. */
3572 next = next_active_insn (insn);
3573 }
3574 }
3575 \f
3576
3577 /* Look for filled jumps to the end of function label. We can try to convert
3578 them into RETURN insns if the insns in the delay slot are valid for the
3579 RETURN as well. */
3580
3581 static void
3582 make_return_insns (rtx_insn *first)
3583 {
3584 rtx_insn *insn;
3585 rtx_jump_insn *jump_insn;
3586 rtx real_return_label = function_return_label;
3587 rtx real_simple_return_label = function_simple_return_label;
3588 int slots, i;
3589
3590 /* See if there is a RETURN insn in the function other than the one we
3591 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3592 into a RETURN to jump to it. */
3593 for (insn = first; insn; insn = NEXT_INSN (insn))
3594 if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn)))
3595 {
3596 rtx t = get_label_before (insn, NULL_RTX);
3597 if (PATTERN (insn) == ret_rtx)
3598 real_return_label = t;
3599 else
3600 real_simple_return_label = t;
3601 break;
3602 }
3603
3604 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3605 was equal to END_OF_FUNCTION_LABEL. */
3606 if (real_return_label)
3607 LABEL_NUSES (real_return_label)++;
3608 if (real_simple_return_label)
3609 LABEL_NUSES (real_simple_return_label)++;
3610
3611 /* Clear the list of insns to fill so we can use it. */
3612 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3613
3614 for (insn = first; insn; insn = NEXT_INSN (insn))
3615 {
3616 int flags;
3617 rtx kind, real_label;
3618
3619 /* Only look at filled JUMP_INSNs that go to the end of function
3620 label. */
3621 if (!NONJUMP_INSN_P (insn))
3622 continue;
3623
3624 if (GET_CODE (PATTERN (insn)) != SEQUENCE)
3625 continue;
3626
3627 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (insn));
3628
3629 if (!jump_to_label_p (pat->insn (0)))
3630 continue;
3631
3632 if (JUMP_LABEL (pat->insn (0)) == function_return_label)
3633 {
3634 kind = ret_rtx;
3635 real_label = real_return_label;
3636 }
3637 else if (JUMP_LABEL (pat->insn (0)) == function_simple_return_label)
3638 {
3639 kind = simple_return_rtx;
3640 real_label = real_simple_return_label;
3641 }
3642 else
3643 continue;
3644
3645 jump_insn = as_a <rtx_jump_insn *> (pat->insn (0));
3646
3647 /* If we can't make the jump into a RETURN, try to redirect it to the best
3648 RETURN and go on to the next insn. */
3649 if (!reorg_redirect_jump (jump_insn, kind))
3650 {
3651 /* Make sure redirecting the jump will not invalidate the delay
3652 slot insns. */
3653 if (redirect_with_delay_slots_safe_p (jump_insn, real_label, insn))
3654 reorg_redirect_jump (jump_insn, real_label);
3655 continue;
3656 }
3657
3658 /* See if this RETURN can accept the insns current in its delay slot.
3659 It can if it has more or an equal number of slots and the contents
3660 of each is valid. */
3661
3662 flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn));
3663 slots = num_delay_slots (jump_insn);
3664 if (slots >= XVECLEN (pat, 0) - 1)
3665 {
3666 for (i = 1; i < XVECLEN (pat, 0); i++)
3667 if (! (
3668 #ifdef ANNUL_IFFALSE_SLOTS
3669 (INSN_ANNULLED_BRANCH_P (jump_insn)
3670 && INSN_FROM_TARGET_P (pat->insn (i)))
3671 ? eligible_for_annul_false (jump_insn, i - 1,
3672 pat->insn (i), flags) :
3673 #endif
3674 #ifdef ANNUL_IFTRUE_SLOTS
3675 (INSN_ANNULLED_BRANCH_P (jump_insn)
3676 && ! INSN_FROM_TARGET_P (pat->insn (i)))
3677 ? eligible_for_annul_true (jump_insn, i - 1,
3678 pat->insn (i), flags) :
3679 #endif
3680 eligible_for_delay (jump_insn, i - 1,
3681 pat->insn (i), flags)))
3682 break;
3683 }
3684 else
3685 i = 0;
3686
3687 if (i == XVECLEN (pat, 0))
3688 continue;
3689
3690 /* We have to do something with this insn. If it is an unconditional
3691 RETURN, delete the SEQUENCE and output the individual insns,
3692 followed by the RETURN. Then set things up so we try to find
3693 insns for its delay slots, if it needs some. */
3694 if (ANY_RETURN_P (PATTERN (jump_insn)))
3695 {
3696 rtx_insn *prev = PREV_INSN (insn);
3697
3698 delete_related_insns (insn);
3699 for (i = 1; i < XVECLEN (pat, 0); i++)
3700 prev = emit_insn_after (PATTERN (XVECEXP (pat, 0, i)), prev);
3701
3702 insn = emit_jump_insn_after (PATTERN (jump_insn), prev);
3703 emit_barrier_after (insn);
3704
3705 if (slots)
3706 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3707 }
3708 else
3709 /* It is probably more efficient to keep this with its current
3710 delay slot as a branch to a RETURN. */
3711 reorg_redirect_jump (jump_insn, real_label);
3712 }
3713
3714 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3715 new delay slots we have created. */
3716 if (real_return_label != NULL_RTX && --LABEL_NUSES (real_return_label) == 0)
3717 delete_related_insns (real_return_label);
3718 if (real_simple_return_label != NULL_RTX
3719 && --LABEL_NUSES (real_simple_return_label) == 0)
3720 delete_related_insns (real_simple_return_label);
3721
3722 fill_simple_delay_slots (1);
3723 fill_simple_delay_slots (0);
3724 }
3725 \f
3726 /* Try to find insns to place in delay slots. */
3727
3728 static void
3729 dbr_schedule (rtx_insn *first)
3730 {
3731 rtx_insn *insn, *next, *epilogue_insn = 0;
3732 int i;
3733 bool need_return_insns;
3734
3735 /* If the current function has no insns other than the prologue and
3736 epilogue, then do not try to fill any delay slots. */
3737 if (n_basic_blocks_for_fn (cfun) == NUM_FIXED_BLOCKS)
3738 return;
3739
3740 /* Find the highest INSN_UID and allocate and initialize our map from
3741 INSN_UID's to position in code. */
3742 for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn))
3743 {
3744 if (INSN_UID (insn) > max_uid)
3745 max_uid = INSN_UID (insn);
3746 if (NOTE_P (insn)
3747 && NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG)
3748 epilogue_insn = insn;
3749 }
3750
3751 uid_to_ruid = XNEWVEC (int, max_uid + 1);
3752 for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn))
3753 uid_to_ruid[INSN_UID (insn)] = i;
3754
3755 /* Initialize the list of insns that need filling. */
3756 if (unfilled_firstobj == 0)
3757 {
3758 gcc_obstack_init (&unfilled_slots_obstack);
3759 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3760 }
3761
3762 for (insn = next_active_insn (first); insn; insn = next_active_insn (insn))
3763 {
3764 rtx target;
3765
3766 /* Skip vector tables. We can't get attributes for them. */
3767 if (JUMP_TABLE_DATA_P (insn))
3768 continue;
3769
3770 if (JUMP_P (insn))
3771 INSN_ANNULLED_BRANCH_P (insn) = 0;
3772 INSN_FROM_TARGET_P (insn) = 0;
3773
3774 if (num_delay_slots (insn) > 0)
3775 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3776
3777 /* Ensure all jumps go to the last of a set of consecutive labels. */
3778 if (JUMP_P (insn)
3779 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3780 && !ANY_RETURN_P (JUMP_LABEL (insn))
3781 && ((target = skip_consecutive_labels (JUMP_LABEL (insn)))
3782 != JUMP_LABEL (insn)))
3783 redirect_jump (as_a <rtx_jump_insn *> (insn), target, 1);
3784 }
3785
3786 init_resource_info (epilogue_insn);
3787
3788 /* Show we haven't computed an end-of-function label yet. */
3789 function_return_label = function_simple_return_label = NULL;
3790
3791 /* Initialize the statistics for this function. */
3792 memset (num_insns_needing_delays, 0, sizeof num_insns_needing_delays);
3793 memset (num_filled_delays, 0, sizeof num_filled_delays);
3794
3795 /* Now do the delay slot filling. Try everything twice in case earlier
3796 changes make more slots fillable. */
3797
3798 for (reorg_pass_number = 0;
3799 reorg_pass_number < MAX_REORG_PASSES;
3800 reorg_pass_number++)
3801 {
3802 fill_simple_delay_slots (1);
3803 fill_simple_delay_slots (0);
3804 fill_eager_delay_slots ();
3805 relax_delay_slots (first);
3806 }
3807
3808 /* If we made an end of function label, indicate that it is now
3809 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
3810 If it is now unused, delete it. */
3811 if (function_return_label && --LABEL_NUSES (function_return_label) == 0)
3812 delete_related_insns (function_return_label);
3813 if (function_simple_return_label
3814 && --LABEL_NUSES (function_simple_return_label) == 0)
3815 delete_related_insns (function_simple_return_label);
3816
3817 need_return_insns = false;
3818 need_return_insns |= targetm.have_return () && function_return_label != 0;
3819 need_return_insns |= (targetm.have_simple_return ()
3820 && function_simple_return_label != 0);
3821 if (need_return_insns)
3822 make_return_insns (first);
3823
3824 /* Delete any USE insns made by update_block; subsequent passes don't need
3825 them or know how to deal with them. */
3826 for (insn = first; insn; insn = next)
3827 {
3828 next = NEXT_INSN (insn);
3829
3830 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
3831 && INSN_P (XEXP (PATTERN (insn), 0)))
3832 next = delete_related_insns (insn);
3833 }
3834
3835 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3836
3837 /* It is not clear why the line below is needed, but it does seem to be. */
3838 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3839
3840 if (dump_file)
3841 {
3842 int i, j, need_comma;
3843 int total_delay_slots[MAX_DELAY_HISTOGRAM + 1];
3844 int total_annul_slots[MAX_DELAY_HISTOGRAM + 1];
3845
3846 for (reorg_pass_number = 0;
3847 reorg_pass_number < MAX_REORG_PASSES;
3848 reorg_pass_number++)
3849 {
3850 fprintf (dump_file, ";; Reorg pass #%d:\n", reorg_pass_number + 1);
3851 for (i = 0; i < NUM_REORG_FUNCTIONS; i++)
3852 {
3853 need_comma = 0;
3854 fprintf (dump_file, ";; Reorg function #%d\n", i);
3855
3856 fprintf (dump_file, ";; %d insns needing delay slots\n;; ",
3857 num_insns_needing_delays[i][reorg_pass_number]);
3858
3859 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3860 if (num_filled_delays[i][j][reorg_pass_number])
3861 {
3862 if (need_comma)
3863 fprintf (dump_file, ", ");
3864 need_comma = 1;
3865 fprintf (dump_file, "%d got %d delays",
3866 num_filled_delays[i][j][reorg_pass_number], j);
3867 }
3868 fprintf (dump_file, "\n");
3869 }
3870 }
3871 memset (total_delay_slots, 0, sizeof total_delay_slots);
3872 memset (total_annul_slots, 0, sizeof total_annul_slots);
3873 for (insn = first; insn; insn = NEXT_INSN (insn))
3874 {
3875 if (! insn->deleted ()
3876 && NONJUMP_INSN_P (insn)
3877 && GET_CODE (PATTERN (insn)) != USE
3878 && GET_CODE (PATTERN (insn)) != CLOBBER)
3879 {
3880 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
3881 {
3882 rtx control;
3883 j = XVECLEN (PATTERN (insn), 0) - 1;
3884 if (j > MAX_DELAY_HISTOGRAM)
3885 j = MAX_DELAY_HISTOGRAM;
3886 control = XVECEXP (PATTERN (insn), 0, 0);
3887 if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control))
3888 total_annul_slots[j]++;
3889 else
3890 total_delay_slots[j]++;
3891 }
3892 else if (num_delay_slots (insn) > 0)
3893 total_delay_slots[0]++;
3894 }
3895 }
3896 fprintf (dump_file, ";; Reorg totals: ");
3897 need_comma = 0;
3898 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3899 {
3900 if (total_delay_slots[j])
3901 {
3902 if (need_comma)
3903 fprintf (dump_file, ", ");
3904 need_comma = 1;
3905 fprintf (dump_file, "%d got %d delays", total_delay_slots[j], j);
3906 }
3907 }
3908 fprintf (dump_file, "\n");
3909 #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
3910 fprintf (dump_file, ";; Reorg annuls: ");
3911 need_comma = 0;
3912 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3913 {
3914 if (total_annul_slots[j])
3915 {
3916 if (need_comma)
3917 fprintf (dump_file, ", ");
3918 need_comma = 1;
3919 fprintf (dump_file, "%d got %d delays", total_annul_slots[j], j);
3920 }
3921 }
3922 fprintf (dump_file, "\n");
3923 #endif
3924 fprintf (dump_file, "\n");
3925 }
3926
3927 if (!sibling_labels.is_empty ())
3928 {
3929 update_alignments (sibling_labels);
3930 sibling_labels.release ();
3931 }
3932
3933 free_resource_info ();
3934 free (uid_to_ruid);
3935 crtl->dbr_scheduled_p = true;
3936 }
3937 #endif /* DELAY_SLOTS */
3938 \f
3939 /* Run delay slot optimization. */
3940 static unsigned int
3941 rest_of_handle_delay_slots (void)
3942 {
3943 #ifdef DELAY_SLOTS
3944 dbr_schedule (get_insns ());
3945 #endif
3946 return 0;
3947 }
3948
3949 namespace {
3950
3951 const pass_data pass_data_delay_slots =
3952 {
3953 RTL_PASS, /* type */
3954 "dbr", /* name */
3955 OPTGROUP_NONE, /* optinfo_flags */
3956 TV_DBR_SCHED, /* tv_id */
3957 0, /* properties_required */
3958 0, /* properties_provided */
3959 0, /* properties_destroyed */
3960 0, /* todo_flags_start */
3961 0, /* todo_flags_finish */
3962 };
3963
3964 class pass_delay_slots : public rtl_opt_pass
3965 {
3966 public:
3967 pass_delay_slots (gcc::context *ctxt)
3968 : rtl_opt_pass (pass_data_delay_slots, ctxt)
3969 {}
3970
3971 /* opt_pass methods: */
3972 virtual bool gate (function *);
3973 virtual unsigned int execute (function *)
3974 {
3975 return rest_of_handle_delay_slots ();
3976 }
3977
3978 }; // class pass_delay_slots
3979
3980 bool
3981 pass_delay_slots::gate (function *)
3982 {
3983 #ifdef DELAY_SLOTS
3984 /* At -O0 dataflow info isn't updated after RA. */
3985 return optimize > 0 && flag_delayed_branch && !crtl->dbr_scheduled_p;
3986 #else
3987 return 0;
3988 #endif
3989 }
3990
3991 } // anon namespace
3992
3993 rtl_opt_pass *
3994 make_pass_delay_slots (gcc::context *ctxt)
3995 {
3996 return new pass_delay_slots (ctxt);
3997 }
3998
3999 /* Machine dependent reorg pass. */
4000
4001 namespace {
4002
4003 const pass_data pass_data_machine_reorg =
4004 {
4005 RTL_PASS, /* type */
4006 "mach", /* name */
4007 OPTGROUP_NONE, /* optinfo_flags */
4008 TV_MACH_DEP, /* tv_id */
4009 0, /* properties_required */
4010 0, /* properties_provided */
4011 0, /* properties_destroyed */
4012 0, /* todo_flags_start */
4013 0, /* todo_flags_finish */
4014 };
4015
4016 class pass_machine_reorg : public rtl_opt_pass
4017 {
4018 public:
4019 pass_machine_reorg (gcc::context *ctxt)
4020 : rtl_opt_pass (pass_data_machine_reorg, ctxt)
4021 {}
4022
4023 /* opt_pass methods: */
4024 virtual bool gate (function *)
4025 {
4026 return targetm.machine_dependent_reorg != 0;
4027 }
4028
4029 virtual unsigned int execute (function *)
4030 {
4031 targetm.machine_dependent_reorg ();
4032 return 0;
4033 }
4034
4035 }; // class pass_machine_reorg
4036
4037 } // anon namespace
4038
4039 rtl_opt_pass *
4040 make_pass_machine_reorg (gcc::context *ctxt)
4041 {
4042 return new pass_machine_reorg (ctxt);
4043 }