re PR c++/66243 (enum class value is allowed to be initialized by value from other...
[gcc.git] / gcc / reorg.c
1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992-2015 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
4 Hacked by Michael Tiemann (tiemann@cygnus.com).
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 /* Instruction reorganization pass.
23
24 This pass runs after register allocation and final jump
25 optimization. It should be the last pass to run before peephole.
26 It serves primarily to fill delay slots of insns, typically branch
27 and call insns. Other insns typically involve more complicated
28 interactions of data dependencies and resource constraints, and
29 are better handled by scheduling before register allocation (by the
30 function `schedule_insns').
31
32 The Branch Penalty is the number of extra cycles that are needed to
33 execute a branch insn. On an ideal machine, branches take a single
34 cycle, and the Branch Penalty is 0. Several RISC machines approach
35 branch delays differently:
36
37 The MIPS has a single branch delay slot. Most insns
38 (except other branches) can be used to fill this slot. When the
39 slot is filled, two insns execute in two cycles, reducing the
40 branch penalty to zero.
41
42 The SPARC always has a branch delay slot, but its effects can be
43 annulled when the branch is not taken. This means that failing to
44 find other sources of insns, we can hoist an insn from the branch
45 target that would only be safe to execute knowing that the branch
46 is taken.
47
48 The HP-PA always has a branch delay slot. For unconditional branches
49 its effects can be annulled when the branch is taken. The effects
50 of the delay slot in a conditional branch can be nullified for forward
51 taken branches, or for untaken backward branches. This means
52 we can hoist insns from the fall-through path for forward branches or
53 steal insns from the target of backward branches.
54
55 The TMS320C3x and C4x have three branch delay slots. When the three
56 slots are filled, the branch penalty is zero. Most insns can fill the
57 delay slots except jump insns.
58
59 Three techniques for filling delay slots have been implemented so far:
60
61 (1) `fill_simple_delay_slots' is the simplest, most efficient way
62 to fill delay slots. This pass first looks for insns which come
63 from before the branch and which are safe to execute after the
64 branch. Then it searches after the insn requiring delay slots or,
65 in the case of a branch, for insns that are after the point at
66 which the branch merges into the fallthrough code, if such a point
67 exists. When such insns are found, the branch penalty decreases
68 and no code expansion takes place.
69
70 (2) `fill_eager_delay_slots' is more complicated: it is used for
71 scheduling conditional jumps, or for scheduling jumps which cannot
72 be filled using (1). A machine need not have annulled jumps to use
73 this strategy, but it helps (by keeping more options open).
74 `fill_eager_delay_slots' tries to guess the direction the branch
75 will go; if it guesses right 100% of the time, it can reduce the
76 branch penalty as much as `fill_simple_delay_slots' does. If it
77 guesses wrong 100% of the time, it might as well schedule nops. When
78 `fill_eager_delay_slots' takes insns from the fall-through path of
79 the jump, usually there is no code expansion; when it takes insns
80 from the branch target, there is code expansion if it is not the
81 only way to reach that target.
82
83 (3) `relax_delay_slots' uses a set of rules to simplify code that
84 has been reorganized by (1) and (2). It finds cases where
85 conditional test can be eliminated, jumps can be threaded, extra
86 insns can be eliminated, etc. It is the job of (1) and (2) to do a
87 good job of scheduling locally; `relax_delay_slots' takes care of
88 making the various individual schedules work well together. It is
89 especially tuned to handle the control flow interactions of branch
90 insns. It does nothing for insns with delay slots that do not
91 branch.
92
93 On machines that use CC0, we are very conservative. We will not make
94 a copy of an insn involving CC0 since we want to maintain a 1-1
95 correspondence between the insn that sets and uses CC0. The insns are
96 allowed to be separated by placing an insn that sets CC0 (but not an insn
97 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
98 delay slot. In that case, we point each insn at the other with REG_CC_USER
99 and REG_CC_SETTER notes. Note that these restrictions affect very few
100 machines because most RISC machines with delay slots will not use CC0
101 (the RT is the only known exception at this point). */
102
103 #include "config.h"
104 #include "system.h"
105 #include "coretypes.h"
106 #include "tm.h"
107 #include "diagnostic-core.h"
108 #include "rtl.h"
109 #include "tm_p.h"
110 #include "symtab.h"
111 #include "hashtab.h"
112 #include "hash-set.h"
113 #include "vec.h"
114 #include "machmode.h"
115 #include "hard-reg-set.h"
116 #include "input.h"
117 #include "function.h"
118 #include "flags.h"
119 #include "statistics.h"
120 #include "double-int.h"
121 #include "real.h"
122 #include "fixed-value.h"
123 #include "alias.h"
124 #include "wide-int.h"
125 #include "inchash.h"
126 #include "tree.h"
127 #include "insn-config.h"
128 #include "expmed.h"
129 #include "dojump.h"
130 #include "explow.h"
131 #include "calls.h"
132 #include "emit-rtl.h"
133 #include "varasm.h"
134 #include "stmt.h"
135 #include "expr.h"
136 #include "conditions.h"
137 #include "predict.h"
138 #include "dominance.h"
139 #include "cfg.h"
140 #include "basic-block.h"
141 #include "regs.h"
142 #include "recog.h"
143 #include "obstack.h"
144 #include "insn-attr.h"
145 #include "resource.h"
146 #include "except.h"
147 #include "params.h"
148 #include "target.h"
149 #include "tree-pass.h"
150
151 #ifdef DELAY_SLOTS
152
153 #ifndef ANNUL_IFTRUE_SLOTS
154 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
155 #endif
156 #ifndef ANNUL_IFFALSE_SLOTS
157 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
158 #endif
159
160 \f
161 /* First, some functions that were used before GCC got a control flow graph.
162 These functions are now only used here in reorg.c, and have therefore
163 been moved here to avoid inadvertent misuse elsewhere in the compiler. */
164
165 /* Return the last label to mark the same position as LABEL. Return LABEL
166 itself if it is null or any return rtx. */
167
168 static rtx
169 skip_consecutive_labels (rtx label_or_return)
170 {
171 rtx_insn *insn;
172
173 if (label_or_return && ANY_RETURN_P (label_or_return))
174 return label_or_return;
175
176 rtx_insn *label = as_a <rtx_insn *> (label_or_return);
177
178 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
179 if (LABEL_P (insn))
180 label = insn;
181
182 return label;
183 }
184
185 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
186 and REG_CC_USER notes so we can find it. */
187
188 static void
189 link_cc0_insns (rtx_insn *insn)
190 {
191 rtx user = next_nonnote_insn (insn);
192
193 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
194 user = XVECEXP (PATTERN (user), 0, 0);
195
196 add_reg_note (user, REG_CC_SETTER, insn);
197 add_reg_note (insn, REG_CC_USER, user);
198 }
199 \f
200 /* Insns which have delay slots that have not yet been filled. */
201
202 static struct obstack unfilled_slots_obstack;
203 static rtx *unfilled_firstobj;
204
205 /* Define macros to refer to the first and last slot containing unfilled
206 insns. These are used because the list may move and its address
207 should be recomputed at each use. */
208
209 #define unfilled_slots_base \
210 ((rtx_insn **) obstack_base (&unfilled_slots_obstack))
211
212 #define unfilled_slots_next \
213 ((rtx_insn **) obstack_next_free (&unfilled_slots_obstack))
214
215 /* Points to the label before the end of the function, or before a
216 return insn. */
217 static rtx_code_label *function_return_label;
218 /* Likewise for a simple_return. */
219 static rtx_code_label *function_simple_return_label;
220
221 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
222 not always monotonically increase. */
223 static int *uid_to_ruid;
224
225 /* Highest valid index in `uid_to_ruid'. */
226 static int max_uid;
227
228 static int stop_search_p (rtx_insn *, int);
229 static int resource_conflicts_p (struct resources *, struct resources *);
230 static int insn_references_resource_p (rtx, struct resources *, bool);
231 static int insn_sets_resource_p (rtx, struct resources *, bool);
232 static rtx_code_label *find_end_label (rtx);
233 static rtx_insn *emit_delay_sequence (rtx_insn *, rtx_insn_list *, int);
234 static rtx_insn_list *add_to_delay_list (rtx_insn *, rtx_insn_list *);
235 static rtx_insn *delete_from_delay_slot (rtx_insn *);
236 static void delete_scheduled_jump (rtx_insn *);
237 static void note_delay_statistics (int, int);
238 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
239 static rtx_insn_list *optimize_skip (rtx_jump_insn *);
240 #endif
241 static int get_jump_flags (const rtx_insn *, rtx);
242 static int mostly_true_jump (rtx);
243 static rtx get_branch_condition (const rtx_insn *, rtx);
244 static int condition_dominates_p (rtx, const rtx_insn *);
245 static int redirect_with_delay_slots_safe_p (rtx_insn *, rtx, rtx);
246 static int redirect_with_delay_list_safe_p (rtx_insn *, rtx, rtx_insn_list *);
247 static int check_annul_list_true_false (int, rtx);
248 static rtx_insn_list *steal_delay_list_from_target (rtx_insn *, rtx,
249 rtx_sequence *,
250 rtx_insn_list *,
251 struct resources *,
252 struct resources *,
253 struct resources *,
254 int, int *, int *,
255 rtx *);
256 static rtx_insn_list *steal_delay_list_from_fallthrough (rtx_insn *, rtx,
257 rtx_sequence *,
258 rtx_insn_list *,
259 struct resources *,
260 struct resources *,
261 struct resources *,
262 int, int *, int *);
263 static void try_merge_delay_insns (rtx_insn *, rtx_insn *);
264 static rtx redundant_insn (rtx, rtx_insn *, rtx);
265 static int own_thread_p (rtx, rtx, int);
266 static void update_block (rtx_insn *, rtx);
267 static int reorg_redirect_jump (rtx_jump_insn *, rtx);
268 static void update_reg_dead_notes (rtx_insn *, rtx_insn *);
269 static void fix_reg_dead_note (rtx, rtx);
270 static void update_reg_unused_notes (rtx, rtx);
271 static void fill_simple_delay_slots (int);
272 static rtx_insn_list *fill_slots_from_thread (rtx_jump_insn *, rtx, rtx, rtx,
273 int, int, int, int,
274 int *, rtx_insn_list *);
275 static void fill_eager_delay_slots (void);
276 static void relax_delay_slots (rtx_insn *);
277 static void make_return_insns (rtx_insn *);
278 \f
279 /* A wrapper around next_active_insn which takes care to return ret_rtx
280 unchanged. */
281
282 static rtx
283 first_active_target_insn (rtx insn)
284 {
285 if (ANY_RETURN_P (insn))
286 return insn;
287 return next_active_insn (as_a <rtx_insn *> (insn));
288 }
289 \f
290 /* Return true iff INSN is a simplejump, or any kind of return insn. */
291
292 static bool
293 simplejump_or_return_p (rtx insn)
294 {
295 return (JUMP_P (insn)
296 && (simplejump_p (as_a <rtx_insn *> (insn))
297 || ANY_RETURN_P (PATTERN (insn))));
298 }
299 \f
300 /* Return TRUE if this insn should stop the search for insn to fill delay
301 slots. LABELS_P indicates that labels should terminate the search.
302 In all cases, jumps terminate the search. */
303
304 static int
305 stop_search_p (rtx_insn *insn, int labels_p)
306 {
307 if (insn == 0)
308 return 1;
309
310 /* If the insn can throw an exception that is caught within the function,
311 it may effectively perform a jump from the viewpoint of the function.
312 Therefore act like for a jump. */
313 if (can_throw_internal (insn))
314 return 1;
315
316 switch (GET_CODE (insn))
317 {
318 case NOTE:
319 case CALL_INSN:
320 return 0;
321
322 case CODE_LABEL:
323 return labels_p;
324
325 case JUMP_INSN:
326 case BARRIER:
327 return 1;
328
329 case INSN:
330 /* OK unless it contains a delay slot or is an `asm' insn of some type.
331 We don't know anything about these. */
332 return (GET_CODE (PATTERN (insn)) == SEQUENCE
333 || GET_CODE (PATTERN (insn)) == ASM_INPUT
334 || asm_noperands (PATTERN (insn)) >= 0);
335
336 default:
337 gcc_unreachable ();
338 }
339 }
340 \f
341 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
342 resource set contains a volatile memory reference. Otherwise, return FALSE. */
343
344 static int
345 resource_conflicts_p (struct resources *res1, struct resources *res2)
346 {
347 if ((res1->cc && res2->cc) || (res1->memory && res2->memory)
348 || res1->volatil || res2->volatil)
349 return 1;
350
351 return hard_reg_set_intersect_p (res1->regs, res2->regs);
352 }
353
354 /* Return TRUE if any resource marked in RES, a `struct resources', is
355 referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called
356 routine is using those resources.
357
358 We compute this by computing all the resources referenced by INSN and
359 seeing if this conflicts with RES. It might be faster to directly check
360 ourselves, and this is the way it used to work, but it means duplicating
361 a large block of complex code. */
362
363 static int
364 insn_references_resource_p (rtx insn, struct resources *res,
365 bool include_delayed_effects)
366 {
367 struct resources insn_res;
368
369 CLEAR_RESOURCE (&insn_res);
370 mark_referenced_resources (insn, &insn_res, include_delayed_effects);
371 return resource_conflicts_p (&insn_res, res);
372 }
373
374 /* Return TRUE if INSN modifies resources that are marked in RES.
375 INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be
376 included. CC0 is only modified if it is explicitly set; see comments
377 in front of mark_set_resources for details. */
378
379 static int
380 insn_sets_resource_p (rtx insn, struct resources *res,
381 bool include_delayed_effects)
382 {
383 struct resources insn_sets;
384
385 CLEAR_RESOURCE (&insn_sets);
386 mark_set_resources (insn, &insn_sets, 0,
387 (include_delayed_effects
388 ? MARK_SRC_DEST_CALL
389 : MARK_SRC_DEST));
390 return resource_conflicts_p (&insn_sets, res);
391 }
392 \f
393 /* Find a label at the end of the function or before a RETURN. If there
394 is none, try to make one. If that fails, returns 0.
395
396 The property of such a label is that it is placed just before the
397 epilogue or a bare RETURN insn, so that another bare RETURN can be
398 turned into a jump to the label unconditionally. In particular, the
399 label cannot be placed before a RETURN insn with a filled delay slot.
400
401 ??? There may be a problem with the current implementation. Suppose
402 we start with a bare RETURN insn and call find_end_label. It may set
403 function_return_label just before the RETURN. Suppose the machinery
404 is able to fill the delay slot of the RETURN insn afterwards. Then
405 function_return_label is no longer valid according to the property
406 described above and find_end_label will still return it unmodified.
407 Note that this is probably mitigated by the following observation:
408 once function_return_label is made, it is very likely the target of
409 a jump, so filling the delay slot of the RETURN will be much more
410 difficult.
411 KIND is either simple_return_rtx or ret_rtx, indicating which type of
412 return we're looking for. */
413
414 static rtx_code_label *
415 find_end_label (rtx kind)
416 {
417 rtx_insn *insn;
418 rtx_code_label **plabel;
419
420 if (kind == ret_rtx)
421 plabel = &function_return_label;
422 else
423 {
424 gcc_assert (kind == simple_return_rtx);
425 plabel = &function_simple_return_label;
426 }
427
428 /* If we found one previously, return it. */
429 if (*plabel)
430 return *plabel;
431
432 /* Otherwise, see if there is a label at the end of the function. If there
433 is, it must be that RETURN insns aren't needed, so that is our return
434 label and we don't have to do anything else. */
435
436 insn = get_last_insn ();
437 while (NOTE_P (insn)
438 || (NONJUMP_INSN_P (insn)
439 && (GET_CODE (PATTERN (insn)) == USE
440 || GET_CODE (PATTERN (insn)) == CLOBBER)))
441 insn = PREV_INSN (insn);
442
443 /* When a target threads its epilogue we might already have a
444 suitable return insn. If so put a label before it for the
445 function_return_label. */
446 if (BARRIER_P (insn)
447 && JUMP_P (PREV_INSN (insn))
448 && PATTERN (PREV_INSN (insn)) == kind)
449 {
450 rtx_insn *temp = PREV_INSN (PREV_INSN (insn));
451 rtx_code_label *label = gen_label_rtx ();
452 LABEL_NUSES (label) = 0;
453
454 /* Put the label before any USE insns that may precede the RETURN
455 insn. */
456 while (GET_CODE (temp) == USE)
457 temp = PREV_INSN (temp);
458
459 emit_label_after (label, temp);
460 *plabel = label;
461 }
462
463 else if (LABEL_P (insn))
464 *plabel = as_a <rtx_code_label *> (insn);
465 else
466 {
467 rtx_code_label *label = gen_label_rtx ();
468 LABEL_NUSES (label) = 0;
469 /* If the basic block reorder pass moves the return insn to
470 some other place try to locate it again and put our
471 function_return_label there. */
472 while (insn && ! (JUMP_P (insn) && (PATTERN (insn) == kind)))
473 insn = PREV_INSN (insn);
474 if (insn)
475 {
476 insn = PREV_INSN (insn);
477
478 /* Put the label before any USE insns that may precede the
479 RETURN insn. */
480 while (GET_CODE (insn) == USE)
481 insn = PREV_INSN (insn);
482
483 emit_label_after (label, insn);
484 }
485 else
486 {
487 if (HAVE_epilogue && ! HAVE_return)
488 /* The RETURN insn has its delay slot filled so we cannot
489 emit the label just before it. Since we already have
490 an epilogue and cannot emit a new RETURN, we cannot
491 emit the label at all. */
492 return NULL;
493
494 /* Otherwise, make a new label and emit a RETURN and BARRIER,
495 if needed. */
496 emit_label (label);
497 if (HAVE_return)
498 {
499 /* The return we make may have delay slots too. */
500 rtx pat = gen_return ();
501 rtx_insn *insn = emit_jump_insn (pat);
502 set_return_jump_label (insn);
503 emit_barrier ();
504 if (num_delay_slots (insn) > 0)
505 obstack_ptr_grow (&unfilled_slots_obstack, insn);
506 }
507 }
508 *plabel = label;
509 }
510
511 /* Show one additional use for this label so it won't go away until
512 we are done. */
513 ++LABEL_NUSES (*plabel);
514
515 return *plabel;
516 }
517 \f
518 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
519 the pattern of INSN with the SEQUENCE.
520
521 Returns the insn containing the SEQUENCE that replaces INSN. */
522
523 static rtx_insn *
524 emit_delay_sequence (rtx_insn *insn, rtx_insn_list *list, int length)
525 {
526 /* Allocate the rtvec to hold the insns and the SEQUENCE. */
527 rtvec seqv = rtvec_alloc (length + 1);
528 rtx seq = gen_rtx_SEQUENCE (VOIDmode, seqv);
529 rtx_insn *seq_insn = make_insn_raw (seq);
530
531 /* If DELAY_INSN has a location, use it for SEQ_INSN. If DELAY_INSN does
532 not have a location, but one of the delayed insns does, we pick up a
533 location from there later. */
534 INSN_LOCATION (seq_insn) = INSN_LOCATION (insn);
535
536 /* Unlink INSN from the insn chain, so that we can put it into
537 the SEQUENCE. Remember where we want to emit SEQUENCE in AFTER. */
538 rtx_insn *after = PREV_INSN (insn);
539 remove_insn (insn);
540 SET_NEXT_INSN (insn) = SET_PREV_INSN (insn) = NULL;
541
542 /* Build our SEQUENCE and rebuild the insn chain. */
543 int i = 1;
544 start_sequence ();
545 XVECEXP (seq, 0, 0) = emit_insn (insn);
546 for (rtx_insn_list *li = list; li; li = li->next (), i++)
547 {
548 rtx_insn *tem = li->insn ();
549 rtx note, next;
550
551 /* Show that this copy of the insn isn't deleted. */
552 tem->set_undeleted ();
553
554 /* Unlink insn from its original place, and re-emit it into
555 the sequence. */
556 SET_NEXT_INSN (tem) = SET_PREV_INSN (tem) = NULL;
557 XVECEXP (seq, 0, i) = emit_insn (tem);
558
559 /* SPARC assembler, for instance, emit warning when debug info is output
560 into the delay slot. */
561 if (INSN_LOCATION (tem) && !INSN_LOCATION (seq_insn))
562 INSN_LOCATION (seq_insn) = INSN_LOCATION (tem);
563 INSN_LOCATION (tem) = 0;
564
565 for (note = REG_NOTES (tem); note; note = next)
566 {
567 next = XEXP (note, 1);
568 switch (REG_NOTE_KIND (note))
569 {
570 case REG_DEAD:
571 /* Remove any REG_DEAD notes because we can't rely on them now
572 that the insn has been moved. */
573 remove_note (tem, note);
574 break;
575
576 case REG_LABEL_OPERAND:
577 case REG_LABEL_TARGET:
578 /* Keep the label reference count up to date. */
579 if (LABEL_P (XEXP (note, 0)))
580 LABEL_NUSES (XEXP (note, 0)) ++;
581 break;
582
583 default:
584 break;
585 }
586 }
587 }
588 end_sequence ();
589 gcc_assert (i == length + 1);
590
591 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
592 add_insn_after (seq_insn, after, NULL);
593
594 return seq_insn;
595 }
596
597 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
598 be in the order in which the insns are to be executed. */
599
600 static rtx_insn_list *
601 add_to_delay_list (rtx_insn *insn, rtx_insn_list *delay_list)
602 {
603 /* If we have an empty list, just make a new list element. If
604 INSN has its block number recorded, clear it since we may
605 be moving the insn to a new block. */
606
607 if (delay_list == 0)
608 {
609 clear_hashed_info_for_insn (insn);
610 return gen_rtx_INSN_LIST (VOIDmode, insn, NULL_RTX);
611 }
612
613 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
614 list. */
615 XEXP (delay_list, 1) = add_to_delay_list (insn, delay_list->next ());
616
617 return delay_list;
618 }
619 \f
620 /* Delete INSN from the delay slot of the insn that it is in, which may
621 produce an insn with no delay slots. Return the new insn. */
622
623 static rtx_insn *
624 delete_from_delay_slot (rtx_insn *insn)
625 {
626 rtx_insn *trial, *seq_insn, *prev;
627 rtx_sequence *seq;
628 rtx_insn_list *delay_list = 0;
629 int i;
630 int had_barrier = 0;
631
632 /* We first must find the insn containing the SEQUENCE with INSN in its
633 delay slot. Do this by finding an insn, TRIAL, where
634 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
635
636 for (trial = insn;
637 PREV_INSN (NEXT_INSN (trial)) == trial;
638 trial = NEXT_INSN (trial))
639 ;
640
641 seq_insn = PREV_INSN (NEXT_INSN (trial));
642 seq = as_a <rtx_sequence *> (PATTERN (seq_insn));
643
644 if (NEXT_INSN (seq_insn) && BARRIER_P (NEXT_INSN (seq_insn)))
645 had_barrier = 1;
646
647 /* Create a delay list consisting of all the insns other than the one
648 we are deleting (unless we were the only one). */
649 if (seq->len () > 2)
650 for (i = 1; i < seq->len (); i++)
651 if (seq->insn (i) != insn)
652 delay_list = add_to_delay_list (seq->insn (i), delay_list);
653
654 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
655 list, and rebuild the delay list if non-empty. */
656 prev = PREV_INSN (seq_insn);
657 trial = seq->insn (0);
658 delete_related_insns (seq_insn);
659 add_insn_after (trial, prev, NULL);
660
661 /* If there was a barrier after the old SEQUENCE, remit it. */
662 if (had_barrier)
663 emit_barrier_after (trial);
664
665 /* If there are any delay insns, remit them. Otherwise clear the
666 annul flag. */
667 if (delay_list)
668 trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2);
669 else if (JUMP_P (trial))
670 INSN_ANNULLED_BRANCH_P (trial) = 0;
671
672 INSN_FROM_TARGET_P (insn) = 0;
673
674 /* Show we need to fill this insn again. */
675 obstack_ptr_grow (&unfilled_slots_obstack, trial);
676
677 return trial;
678 }
679 \f
680 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
681 the insn that sets CC0 for it and delete it too. */
682
683 static void
684 delete_scheduled_jump (rtx_insn *insn)
685 {
686 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
687 delete the insn that sets the condition code, but it is hard to find it.
688 Since this case is rare anyway, don't bother trying; there would likely
689 be other insns that became dead anyway, which we wouldn't know to
690 delete. */
691
692 if (HAVE_cc0 && reg_mentioned_p (cc0_rtx, insn))
693 {
694 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
695
696 /* If a reg-note was found, it points to an insn to set CC0. This
697 insn is in the delay list of some other insn. So delete it from
698 the delay list it was in. */
699 if (note)
700 {
701 if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
702 && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
703 delete_from_delay_slot (as_a <rtx_insn *> (XEXP (note, 0)));
704 }
705 else
706 {
707 /* The insn setting CC0 is our previous insn, but it may be in
708 a delay slot. It will be the last insn in the delay slot, if
709 it is. */
710 rtx_insn *trial = previous_insn (insn);
711 if (NOTE_P (trial))
712 trial = prev_nonnote_insn (trial);
713 if (sets_cc0_p (PATTERN (trial)) != 1
714 || FIND_REG_INC_NOTE (trial, NULL_RTX))
715 return;
716 if (PREV_INSN (NEXT_INSN (trial)) == trial)
717 delete_related_insns (trial);
718 else
719 delete_from_delay_slot (trial);
720 }
721 }
722
723 delete_related_insns (insn);
724 }
725 \f
726 /* Counters for delay-slot filling. */
727
728 #define NUM_REORG_FUNCTIONS 2
729 #define MAX_DELAY_HISTOGRAM 3
730 #define MAX_REORG_PASSES 2
731
732 static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES];
733
734 static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES];
735
736 static int reorg_pass_number;
737
738 static void
739 note_delay_statistics (int slots_filled, int index)
740 {
741 num_insns_needing_delays[index][reorg_pass_number]++;
742 if (slots_filled > MAX_DELAY_HISTOGRAM)
743 slots_filled = MAX_DELAY_HISTOGRAM;
744 num_filled_delays[index][slots_filled][reorg_pass_number]++;
745 }
746 \f
747 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
748
749 /* Optimize the following cases:
750
751 1. When a conditional branch skips over only one instruction,
752 use an annulling branch and put that insn in the delay slot.
753 Use either a branch that annuls when the condition if true or
754 invert the test with a branch that annuls when the condition is
755 false. This saves insns, since otherwise we must copy an insn
756 from the L1 target.
757
758 (orig) (skip) (otherwise)
759 Bcc.n L1 Bcc',a L1 Bcc,a L1'
760 insn insn insn2
761 L1: L1: L1:
762 insn2 insn2 insn2
763 insn3 insn3 L1':
764 insn3
765
766 2. When a conditional branch skips over only one instruction,
767 and after that, it unconditionally branches somewhere else,
768 perform the similar optimization. This saves executing the
769 second branch in the case where the inverted condition is true.
770
771 Bcc.n L1 Bcc',a L2
772 insn insn
773 L1: L1:
774 Bra L2 Bra L2
775
776 INSN is a JUMP_INSN.
777
778 This should be expanded to skip over N insns, where N is the number
779 of delay slots required. */
780
781 static rtx_insn_list *
782 optimize_skip (rtx_jump_insn *insn)
783 {
784 rtx_insn *trial = next_nonnote_insn (insn);
785 rtx_insn *next_trial = next_active_insn (trial);
786 rtx_insn_list *delay_list = 0;
787 int flags;
788
789 flags = get_jump_flags (insn, JUMP_LABEL (insn));
790
791 if (trial == 0
792 || !NONJUMP_INSN_P (trial)
793 || GET_CODE (PATTERN (trial)) == SEQUENCE
794 || recog_memoized (trial) < 0
795 || (! eligible_for_annul_false (insn, 0, trial, flags)
796 && ! eligible_for_annul_true (insn, 0, trial, flags))
797 || can_throw_internal (trial))
798 return 0;
799
800 /* There are two cases where we are just executing one insn (we assume
801 here that a branch requires only one insn; this should be generalized
802 at some point): Where the branch goes around a single insn or where
803 we have one insn followed by a branch to the same label we branch to.
804 In both of these cases, inverting the jump and annulling the delay
805 slot give the same effect in fewer insns. */
806 if (next_trial == next_active_insn (JUMP_LABEL (insn))
807 || (next_trial != 0
808 && simplejump_or_return_p (next_trial)
809 && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)))
810 {
811 if (eligible_for_annul_false (insn, 0, trial, flags))
812 {
813 if (invert_jump (insn, JUMP_LABEL (insn), 1))
814 INSN_FROM_TARGET_P (trial) = 1;
815 else if (! eligible_for_annul_true (insn, 0, trial, flags))
816 return 0;
817 }
818
819 delay_list = add_to_delay_list (trial, NULL);
820 next_trial = next_active_insn (trial);
821 update_block (trial, trial);
822 delete_related_insns (trial);
823
824 /* Also, if we are targeting an unconditional
825 branch, thread our jump to the target of that branch. Don't
826 change this into a RETURN here, because it may not accept what
827 we have in the delay slot. We'll fix this up later. */
828 if (next_trial && simplejump_or_return_p (next_trial))
829 {
830 rtx target_label = JUMP_LABEL (next_trial);
831 if (ANY_RETURN_P (target_label))
832 target_label = find_end_label (target_label);
833
834 if (target_label)
835 {
836 /* Recompute the flags based on TARGET_LABEL since threading
837 the jump to TARGET_LABEL may change the direction of the
838 jump (which may change the circumstances in which the
839 delay slot is nullified). */
840 flags = get_jump_flags (insn, target_label);
841 if (eligible_for_annul_true (insn, 0, trial, flags))
842 reorg_redirect_jump (insn, target_label);
843 }
844 }
845
846 INSN_ANNULLED_BRANCH_P (insn) = 1;
847 }
848
849 return delay_list;
850 }
851 #endif
852 \f
853 /* Encode and return branch direction and prediction information for
854 INSN assuming it will jump to LABEL.
855
856 Non conditional branches return no direction information and
857 are predicted as very likely taken. */
858
859 static int
860 get_jump_flags (const rtx_insn *insn, rtx label)
861 {
862 int flags;
863
864 /* get_jump_flags can be passed any insn with delay slots, these may
865 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
866 direction information, and only if they are conditional jumps.
867
868 If LABEL is a return, then there is no way to determine the branch
869 direction. */
870 if (JUMP_P (insn)
871 && (condjump_p (insn) || condjump_in_parallel_p (insn))
872 && !ANY_RETURN_P (label)
873 && INSN_UID (insn) <= max_uid
874 && INSN_UID (label) <= max_uid)
875 flags
876 = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
877 ? ATTR_FLAG_forward : ATTR_FLAG_backward;
878 /* No valid direction information. */
879 else
880 flags = 0;
881
882 return flags;
883 }
884
885 /* Return truth value of the statement that this branch
886 is mostly taken. If we think that the branch is extremely likely
887 to be taken, we return 2. If the branch is slightly more likely to be
888 taken, return 1. If the branch is slightly less likely to be taken,
889 return 0 and if the branch is highly unlikely to be taken, return -1. */
890
891 static int
892 mostly_true_jump (rtx jump_insn)
893 {
894 /* If branch probabilities are available, then use that number since it
895 always gives a correct answer. */
896 rtx note = find_reg_note (jump_insn, REG_BR_PROB, 0);
897 if (note)
898 {
899 int prob = XINT (note, 0);
900
901 if (prob >= REG_BR_PROB_BASE * 9 / 10)
902 return 2;
903 else if (prob >= REG_BR_PROB_BASE / 2)
904 return 1;
905 else if (prob >= REG_BR_PROB_BASE / 10)
906 return 0;
907 else
908 return -1;
909 }
910
911 /* If there is no note, assume branches are not taken.
912 This should be rare. */
913 return 0;
914 }
915
916 /* Return the condition under which INSN will branch to TARGET. If TARGET
917 is zero, return the condition under which INSN will return. If INSN is
918 an unconditional branch, return const_true_rtx. If INSN isn't a simple
919 type of jump, or it doesn't go to TARGET, return 0. */
920
921 static rtx
922 get_branch_condition (const rtx_insn *insn, rtx target)
923 {
924 rtx pat = PATTERN (insn);
925 rtx src;
926
927 if (condjump_in_parallel_p (insn))
928 pat = XVECEXP (pat, 0, 0);
929
930 if (ANY_RETURN_P (pat) && pat == target)
931 return const_true_rtx;
932
933 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
934 return 0;
935
936 src = SET_SRC (pat);
937 if (GET_CODE (src) == LABEL_REF && LABEL_REF_LABEL (src) == target)
938 return const_true_rtx;
939
940 else if (GET_CODE (src) == IF_THEN_ELSE
941 && XEXP (src, 2) == pc_rtx
942 && ((GET_CODE (XEXP (src, 1)) == LABEL_REF
943 && LABEL_REF_LABEL (XEXP (src, 1)) == target)
944 || (ANY_RETURN_P (XEXP (src, 1)) && XEXP (src, 1) == target)))
945 return XEXP (src, 0);
946
947 else if (GET_CODE (src) == IF_THEN_ELSE
948 && XEXP (src, 1) == pc_rtx
949 && ((GET_CODE (XEXP (src, 2)) == LABEL_REF
950 && LABEL_REF_LABEL (XEXP (src, 2)) == target)
951 || (ANY_RETURN_P (XEXP (src, 2)) && XEXP (src, 2) == target)))
952 {
953 enum rtx_code rev;
954 rev = reversed_comparison_code (XEXP (src, 0), insn);
955 if (rev != UNKNOWN)
956 return gen_rtx_fmt_ee (rev, GET_MODE (XEXP (src, 0)),
957 XEXP (XEXP (src, 0), 0),
958 XEXP (XEXP (src, 0), 1));
959 }
960
961 return 0;
962 }
963
964 /* Return nonzero if CONDITION is more strict than the condition of
965 INSN, i.e., if INSN will always branch if CONDITION is true. */
966
967 static int
968 condition_dominates_p (rtx condition, const rtx_insn *insn)
969 {
970 rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn));
971 enum rtx_code code = GET_CODE (condition);
972 enum rtx_code other_code;
973
974 if (rtx_equal_p (condition, other_condition)
975 || other_condition == const_true_rtx)
976 return 1;
977
978 else if (condition == const_true_rtx || other_condition == 0)
979 return 0;
980
981 other_code = GET_CODE (other_condition);
982 if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2
983 || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0))
984 || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1)))
985 return 0;
986
987 return comparison_dominates_p (code, other_code);
988 }
989
990 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
991 any insns already in the delay slot of JUMP. */
992
993 static int
994 redirect_with_delay_slots_safe_p (rtx_insn *jump, rtx newlabel, rtx seq)
995 {
996 int flags, i;
997 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (seq));
998
999 /* Make sure all the delay slots of this jump would still
1000 be valid after threading the jump. If they are still
1001 valid, then return nonzero. */
1002
1003 flags = get_jump_flags (jump, newlabel);
1004 for (i = 1; i < pat->len (); i++)
1005 if (! (
1006 #ifdef ANNUL_IFFALSE_SLOTS
1007 (INSN_ANNULLED_BRANCH_P (jump)
1008 && INSN_FROM_TARGET_P (pat->insn (i)))
1009 ? eligible_for_annul_false (jump, i - 1, pat->insn (i), flags) :
1010 #endif
1011 #ifdef ANNUL_IFTRUE_SLOTS
1012 (INSN_ANNULLED_BRANCH_P (jump)
1013 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
1014 ? eligible_for_annul_true (jump, i - 1, pat->insn (i), flags) :
1015 #endif
1016 eligible_for_delay (jump, i - 1, pat->insn (i), flags)))
1017 break;
1018
1019 return (i == pat->len ());
1020 }
1021
1022 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
1023 any insns we wish to place in the delay slot of JUMP. */
1024
1025 static int
1026 redirect_with_delay_list_safe_p (rtx_insn *jump, rtx newlabel,
1027 rtx_insn_list *delay_list)
1028 {
1029 int flags, i;
1030 rtx_insn_list *li;
1031
1032 /* Make sure all the insns in DELAY_LIST would still be
1033 valid after threading the jump. If they are still
1034 valid, then return nonzero. */
1035
1036 flags = get_jump_flags (jump, newlabel);
1037 for (li = delay_list, i = 0; li; li = li->next (), i++)
1038 if (! (
1039 #ifdef ANNUL_IFFALSE_SLOTS
1040 (INSN_ANNULLED_BRANCH_P (jump)
1041 && INSN_FROM_TARGET_P (li->insn ()))
1042 ? eligible_for_annul_false (jump, i, li->insn (), flags) :
1043 #endif
1044 #ifdef ANNUL_IFTRUE_SLOTS
1045 (INSN_ANNULLED_BRANCH_P (jump)
1046 && ! INSN_FROM_TARGET_P (XEXP (li, 0)))
1047 ? eligible_for_annul_true (jump, i, li->insn (), flags) :
1048 #endif
1049 eligible_for_delay (jump, i, li->insn (), flags)))
1050 break;
1051
1052 return (li == NULL);
1053 }
1054
1055 /* DELAY_LIST is a list of insns that have already been placed into delay
1056 slots. See if all of them have the same annulling status as ANNUL_TRUE_P.
1057 If not, return 0; otherwise return 1. */
1058
1059 static int
1060 check_annul_list_true_false (int annul_true_p, rtx delay_list)
1061 {
1062 rtx temp;
1063
1064 if (delay_list)
1065 {
1066 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1067 {
1068 rtx trial = XEXP (temp, 0);
1069
1070 if ((annul_true_p && INSN_FROM_TARGET_P (trial))
1071 || (!annul_true_p && !INSN_FROM_TARGET_P (trial)))
1072 return 0;
1073 }
1074 }
1075
1076 return 1;
1077 }
1078 \f
1079 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1080 the condition tested by INSN is CONDITION and the resources shown in
1081 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1082 from SEQ's delay list, in addition to whatever insns it may execute
1083 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1084 needed while searching for delay slot insns. Return the concatenated
1085 delay list if possible, otherwise, return 0.
1086
1087 SLOTS_TO_FILL is the total number of slots required by INSN, and
1088 PSLOTS_FILLED points to the number filled so far (also the number of
1089 insns in DELAY_LIST). It is updated with the number that have been
1090 filled from the SEQUENCE, if any.
1091
1092 PANNUL_P points to a nonzero value if we already know that we need
1093 to annul INSN. If this routine determines that annulling is needed,
1094 it may set that value nonzero.
1095
1096 PNEW_THREAD points to a location that is to receive the place at which
1097 execution should continue. */
1098
1099 static rtx_insn_list *
1100 steal_delay_list_from_target (rtx_insn *insn, rtx condition, rtx_sequence *seq,
1101 rtx_insn_list *delay_list, struct resources *sets,
1102 struct resources *needed,
1103 struct resources *other_needed,
1104 int slots_to_fill, int *pslots_filled,
1105 int *pannul_p, rtx *pnew_thread)
1106 {
1107 int slots_remaining = slots_to_fill - *pslots_filled;
1108 int total_slots_filled = *pslots_filled;
1109 rtx_insn_list *new_delay_list = 0;
1110 int must_annul = *pannul_p;
1111 int used_annul = 0;
1112 int i;
1113 struct resources cc_set;
1114 bool *redundant;
1115
1116 /* We can't do anything if there are more delay slots in SEQ than we
1117 can handle, or if we don't know that it will be a taken branch.
1118 We know that it will be a taken branch if it is either an unconditional
1119 branch or a conditional branch with a stricter branch condition.
1120
1121 Also, exit if the branch has more than one set, since then it is computing
1122 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1123 ??? It may be possible to move other sets into INSN in addition to
1124 moving the instructions in the delay slots.
1125
1126 We can not steal the delay list if one of the instructions in the
1127 current delay_list modifies the condition codes and the jump in the
1128 sequence is a conditional jump. We can not do this because we can
1129 not change the direction of the jump because the condition codes
1130 will effect the direction of the jump in the sequence. */
1131
1132 CLEAR_RESOURCE (&cc_set);
1133 for (rtx_insn_list *temp = delay_list; temp; temp = temp->next ())
1134 {
1135 rtx_insn *trial = temp->insn ();
1136
1137 mark_set_resources (trial, &cc_set, 0, MARK_SRC_DEST_CALL);
1138 if (insn_references_resource_p (seq->insn (0), &cc_set, false))
1139 return delay_list;
1140 }
1141
1142 if (XVECLEN (seq, 0) - 1 > slots_remaining
1143 || ! condition_dominates_p (condition, seq->insn (0))
1144 || ! single_set (seq->insn (0)))
1145 return delay_list;
1146
1147 /* On some targets, branches with delay slots can have a limited
1148 displacement. Give the back end a chance to tell us we can't do
1149 this. */
1150 if (! targetm.can_follow_jump (insn, seq->insn (0)))
1151 return delay_list;
1152
1153 redundant = XALLOCAVEC (bool, XVECLEN (seq, 0));
1154 for (i = 1; i < seq->len (); i++)
1155 {
1156 rtx_insn *trial = seq->insn (i);
1157 int flags;
1158
1159 if (insn_references_resource_p (trial, sets, false)
1160 || insn_sets_resource_p (trial, needed, false)
1161 || insn_sets_resource_p (trial, sets, false)
1162 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1163 delay list. */
1164 || (HAVE_cc0 && find_reg_note (trial, REG_CC_USER, NULL_RTX))
1165 /* If TRIAL is from the fallthrough code of an annulled branch insn
1166 in SEQ, we cannot use it. */
1167 || (INSN_ANNULLED_BRANCH_P (seq->insn (0))
1168 && ! INSN_FROM_TARGET_P (trial)))
1169 return delay_list;
1170
1171 /* If this insn was already done (usually in a previous delay slot),
1172 pretend we put it in our delay slot. */
1173 redundant[i] = redundant_insn (trial, insn, new_delay_list);
1174 if (redundant[i])
1175 continue;
1176
1177 /* We will end up re-vectoring this branch, so compute flags
1178 based on jumping to the new label. */
1179 flags = get_jump_flags (insn, JUMP_LABEL (seq->insn (0)));
1180
1181 if (! must_annul
1182 && ((condition == const_true_rtx
1183 || (! insn_sets_resource_p (trial, other_needed, false)
1184 && ! may_trap_or_fault_p (PATTERN (trial)))))
1185 ? eligible_for_delay (insn, total_slots_filled, trial, flags)
1186 : (must_annul || (delay_list == NULL && new_delay_list == NULL))
1187 && (must_annul = 1,
1188 check_annul_list_true_false (0, delay_list)
1189 && check_annul_list_true_false (0, new_delay_list)
1190 && eligible_for_annul_false (insn, total_slots_filled,
1191 trial, flags)))
1192 {
1193 if (must_annul)
1194 used_annul = 1;
1195 rtx_insn *temp = copy_delay_slot_insn (trial);
1196 INSN_FROM_TARGET_P (temp) = 1;
1197 new_delay_list = add_to_delay_list (temp, new_delay_list);
1198 total_slots_filled++;
1199
1200 if (--slots_remaining == 0)
1201 break;
1202 }
1203 else
1204 return delay_list;
1205 }
1206
1207 /* Record the effect of the instructions that were redundant and which
1208 we therefore decided not to copy. */
1209 for (i = 1; i < seq->len (); i++)
1210 if (redundant[i])
1211 update_block (seq->insn (i), insn);
1212
1213 /* Show the place to which we will be branching. */
1214 *pnew_thread = first_active_target_insn (JUMP_LABEL (seq->insn (0)));
1215
1216 /* Add any new insns to the delay list and update the count of the
1217 number of slots filled. */
1218 *pslots_filled = total_slots_filled;
1219 if (used_annul)
1220 *pannul_p = 1;
1221
1222 if (delay_list == 0)
1223 return new_delay_list;
1224
1225 for (rtx_insn_list *temp = new_delay_list; temp; temp = temp->next ())
1226 delay_list = add_to_delay_list (temp->insn (), delay_list);
1227
1228 return delay_list;
1229 }
1230 \f
1231 /* Similar to steal_delay_list_from_target except that SEQ is on the
1232 fallthrough path of INSN. Here we only do something if the delay insn
1233 of SEQ is an unconditional branch. In that case we steal its delay slot
1234 for INSN since unconditional branches are much easier to fill. */
1235
1236 static rtx_insn_list *
1237 steal_delay_list_from_fallthrough (rtx_insn *insn, rtx condition,
1238 rtx_sequence *seq,
1239 rtx_insn_list *delay_list,
1240 struct resources *sets,
1241 struct resources *needed,
1242 struct resources *other_needed,
1243 int slots_to_fill, int *pslots_filled,
1244 int *pannul_p)
1245 {
1246 int i;
1247 int flags;
1248 int must_annul = *pannul_p;
1249 int used_annul = 0;
1250
1251 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1252
1253 /* We can't do anything if SEQ's delay insn isn't an
1254 unconditional branch. */
1255
1256 if (! simplejump_or_return_p (seq->insn (0)))
1257 return delay_list;
1258
1259 for (i = 1; i < seq->len (); i++)
1260 {
1261 rtx_insn *trial = seq->insn (i);
1262
1263 /* If TRIAL sets CC0, stealing it will move it too far from the use
1264 of CC0. */
1265 if (insn_references_resource_p (trial, sets, false)
1266 || insn_sets_resource_p (trial, needed, false)
1267 || insn_sets_resource_p (trial, sets, false)
1268 || (HAVE_cc0 && sets_cc0_p (PATTERN (trial))))
1269
1270 break;
1271
1272 /* If this insn was already done, we don't need it. */
1273 if (redundant_insn (trial, insn, delay_list))
1274 {
1275 update_block (trial, insn);
1276 delete_from_delay_slot (trial);
1277 continue;
1278 }
1279
1280 if (! must_annul
1281 && ((condition == const_true_rtx
1282 || (! insn_sets_resource_p (trial, other_needed, false)
1283 && ! may_trap_or_fault_p (PATTERN (trial)))))
1284 ? eligible_for_delay (insn, *pslots_filled, trial, flags)
1285 : (must_annul || delay_list == NULL) && (must_annul = 1,
1286 check_annul_list_true_false (1, delay_list)
1287 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
1288 {
1289 if (must_annul)
1290 used_annul = 1;
1291 delete_from_delay_slot (trial);
1292 delay_list = add_to_delay_list (trial, delay_list);
1293
1294 if (++(*pslots_filled) == slots_to_fill)
1295 break;
1296 }
1297 else
1298 break;
1299 }
1300
1301 if (used_annul)
1302 *pannul_p = 1;
1303 return delay_list;
1304 }
1305 \f
1306 /* Try merging insns starting at THREAD which match exactly the insns in
1307 INSN's delay list.
1308
1309 If all insns were matched and the insn was previously annulling, the
1310 annul bit will be cleared.
1311
1312 For each insn that is merged, if the branch is or will be non-annulling,
1313 we delete the merged insn. */
1314
1315 static void
1316 try_merge_delay_insns (rtx_insn *insn, rtx_insn *thread)
1317 {
1318 rtx_insn *trial, *next_trial;
1319 rtx_insn *delay_insn = as_a <rtx_insn *> (XVECEXP (PATTERN (insn), 0, 0));
1320 int annul_p = JUMP_P (delay_insn) && INSN_ANNULLED_BRANCH_P (delay_insn);
1321 int slot_number = 1;
1322 int num_slots = XVECLEN (PATTERN (insn), 0);
1323 rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1324 struct resources set, needed, modified;
1325 rtx_insn_list *merged_insns = 0;
1326 int i, j;
1327 int flags;
1328
1329 flags = get_jump_flags (delay_insn, JUMP_LABEL (delay_insn));
1330
1331 CLEAR_RESOURCE (&needed);
1332 CLEAR_RESOURCE (&set);
1333
1334 /* If this is not an annulling branch, take into account anything needed in
1335 INSN's delay slot. This prevents two increments from being incorrectly
1336 folded into one. If we are annulling, this would be the correct
1337 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1338 will essentially disable this optimization. This method is somewhat of
1339 a kludge, but I don't see a better way.) */
1340 if (! annul_p)
1341 for (i = 1 ; i < num_slots; i++)
1342 if (XVECEXP (PATTERN (insn), 0, i))
1343 mark_referenced_resources (XVECEXP (PATTERN (insn), 0, i), &needed,
1344 true);
1345
1346 for (trial = thread; !stop_search_p (trial, 1); trial = next_trial)
1347 {
1348 rtx pat = PATTERN (trial);
1349 rtx oldtrial = trial;
1350
1351 next_trial = next_nonnote_insn (trial);
1352
1353 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1354 if (NONJUMP_INSN_P (trial)
1355 && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER))
1356 continue;
1357
1358 if (GET_CODE (next_to_match) == GET_CODE (trial)
1359 /* We can't share an insn that sets cc0. */
1360 && (!HAVE_cc0 || ! sets_cc0_p (pat))
1361 && ! insn_references_resource_p (trial, &set, true)
1362 && ! insn_sets_resource_p (trial, &set, true)
1363 && ! insn_sets_resource_p (trial, &needed, true)
1364 && (trial = try_split (pat, trial, 0)) != 0
1365 /* Update next_trial, in case try_split succeeded. */
1366 && (next_trial = next_nonnote_insn (trial))
1367 /* Likewise THREAD. */
1368 && (thread = oldtrial == thread ? trial : thread)
1369 && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial))
1370 /* Have to test this condition if annul condition is different
1371 from (and less restrictive than) non-annulling one. */
1372 && eligible_for_delay (delay_insn, slot_number - 1, trial, flags))
1373 {
1374
1375 if (! annul_p)
1376 {
1377 update_block (trial, thread);
1378 if (trial == thread)
1379 thread = next_active_insn (thread);
1380
1381 delete_related_insns (trial);
1382 INSN_FROM_TARGET_P (next_to_match) = 0;
1383 }
1384 else
1385 merged_insns = gen_rtx_INSN_LIST (VOIDmode, trial, merged_insns);
1386
1387 if (++slot_number == num_slots)
1388 break;
1389
1390 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1391 }
1392
1393 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
1394 mark_referenced_resources (trial, &needed, true);
1395 }
1396
1397 /* See if we stopped on a filled insn. If we did, try to see if its
1398 delay slots match. */
1399 if (slot_number != num_slots
1400 && trial && NONJUMP_INSN_P (trial)
1401 && GET_CODE (PATTERN (trial)) == SEQUENCE
1402 && !(JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
1403 && INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0))))
1404 {
1405 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (trial));
1406 rtx filled_insn = XVECEXP (pat, 0, 0);
1407
1408 /* Account for resources set/needed by the filled insn. */
1409 mark_set_resources (filled_insn, &set, 0, MARK_SRC_DEST_CALL);
1410 mark_referenced_resources (filled_insn, &needed, true);
1411
1412 for (i = 1; i < pat->len (); i++)
1413 {
1414 rtx_insn *dtrial = pat->insn (i);
1415
1416 CLEAR_RESOURCE (&modified);
1417 /* Account for resources set by the the insn following NEXT_TO_MATCH
1418 inside INSN's delay list. */
1419 for (j = 1; slot_number + j < num_slots; j++)
1420 mark_set_resources (XVECEXP (PATTERN (insn), 0, slot_number + j),
1421 &modified, 0, MARK_SRC_DEST_CALL);
1422 /* Account for resources set by the the insn before DTRIAL and inside
1423 TRIAL's delay list. */
1424 for (j = 1; j < i; j++)
1425 mark_set_resources (XVECEXP (pat, 0, j),
1426 &modified, 0, MARK_SRC_DEST_CALL);
1427 if (! insn_references_resource_p (dtrial, &set, true)
1428 && ! insn_sets_resource_p (dtrial, &set, true)
1429 && ! insn_sets_resource_p (dtrial, &needed, true)
1430 && (!HAVE_cc0 || ! sets_cc0_p (PATTERN (dtrial)))
1431 && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial))
1432 /* Check that DTRIAL and NEXT_TO_MATCH does not reference a
1433 resource modified between them (only dtrial is checked because
1434 next_to_match and dtrial shall to be equal in order to hit
1435 this line) */
1436 && ! insn_references_resource_p (dtrial, &modified, true)
1437 && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags))
1438 {
1439 if (! annul_p)
1440 {
1441 rtx_insn *new_rtx;
1442
1443 update_block (dtrial, thread);
1444 new_rtx = delete_from_delay_slot (dtrial);
1445 if (thread->deleted ())
1446 thread = new_rtx;
1447 INSN_FROM_TARGET_P (next_to_match) = 0;
1448 }
1449 else
1450 merged_insns = gen_rtx_INSN_LIST (SImode, dtrial,
1451 merged_insns);
1452
1453 if (++slot_number == num_slots)
1454 break;
1455
1456 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1457 }
1458 else
1459 {
1460 /* Keep track of the set/referenced resources for the delay
1461 slots of any trial insns we encounter. */
1462 mark_set_resources (dtrial, &set, 0, MARK_SRC_DEST_CALL);
1463 mark_referenced_resources (dtrial, &needed, true);
1464 }
1465 }
1466 }
1467
1468 /* If all insns in the delay slot have been matched and we were previously
1469 annulling the branch, we need not any more. In that case delete all the
1470 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
1471 the delay list so that we know that it isn't only being used at the
1472 target. */
1473 if (slot_number == num_slots && annul_p)
1474 {
1475 for (; merged_insns; merged_insns = merged_insns->next ())
1476 {
1477 if (GET_MODE (merged_insns) == SImode)
1478 {
1479 rtx_insn *new_rtx;
1480
1481 update_block (merged_insns->insn (), thread);
1482 new_rtx = delete_from_delay_slot (merged_insns->insn ());
1483 if (thread->deleted ())
1484 thread = new_rtx;
1485 }
1486 else
1487 {
1488 update_block (merged_insns->insn (), thread);
1489 delete_related_insns (merged_insns->insn ());
1490 }
1491 }
1492
1493 INSN_ANNULLED_BRANCH_P (delay_insn) = 0;
1494
1495 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1496 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0;
1497 }
1498 }
1499 \f
1500 /* See if INSN is redundant with an insn in front of TARGET. Often this
1501 is called when INSN is a candidate for a delay slot of TARGET.
1502 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1503 of INSN. Often INSN will be redundant with an insn in a delay slot of
1504 some previous insn. This happens when we have a series of branches to the
1505 same label; in that case the first insn at the target might want to go
1506 into each of the delay slots.
1507
1508 If we are not careful, this routine can take up a significant fraction
1509 of the total compilation time (4%), but only wins rarely. Hence we
1510 speed this routine up by making two passes. The first pass goes back
1511 until it hits a label and sees if it finds an insn with an identical
1512 pattern. Only in this (relatively rare) event does it check for
1513 data conflicts.
1514
1515 We do not split insns we encounter. This could cause us not to find a
1516 redundant insn, but the cost of splitting seems greater than the possible
1517 gain in rare cases. */
1518
1519 static rtx
1520 redundant_insn (rtx insn, rtx_insn *target, rtx delay_list)
1521 {
1522 rtx target_main = target;
1523 rtx ipat = PATTERN (insn);
1524 rtx_insn *trial;
1525 rtx pat;
1526 struct resources needed, set;
1527 int i;
1528 unsigned insns_to_search;
1529
1530 /* If INSN has any REG_UNUSED notes, it can't match anything since we
1531 are allowed to not actually assign to such a register. */
1532 if (find_reg_note (insn, REG_UNUSED, NULL_RTX) != 0)
1533 return 0;
1534
1535 /* Scan backwards looking for a match. */
1536 for (trial = PREV_INSN (target),
1537 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1538 trial && insns_to_search > 0;
1539 trial = PREV_INSN (trial))
1540 {
1541 /* (use (insn))s can come immediately after a barrier if the
1542 label that used to precede them has been deleted as dead.
1543 See delete_related_insns. */
1544 if (LABEL_P (trial) || BARRIER_P (trial))
1545 return 0;
1546
1547 if (!INSN_P (trial))
1548 continue;
1549 --insns_to_search;
1550
1551 pat = PATTERN (trial);
1552 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1553 continue;
1554
1555 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (pat))
1556 {
1557 /* Stop for a CALL and its delay slots because it is difficult to
1558 track its resource needs correctly. */
1559 if (CALL_P (seq->element (0)))
1560 return 0;
1561
1562 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1563 slots because it is difficult to track its resource needs
1564 correctly. */
1565
1566 if (INSN_SETS_ARE_DELAYED (seq->insn (0)))
1567 return 0;
1568
1569 if (INSN_REFERENCES_ARE_DELAYED (seq->insn (0)))
1570 return 0;
1571
1572 /* See if any of the insns in the delay slot match, updating
1573 resource requirements as we go. */
1574 for (i = seq->len () - 1; i > 0; i--)
1575 if (GET_CODE (seq->element (i)) == GET_CODE (insn)
1576 && rtx_equal_p (PATTERN (seq->element (i)), ipat)
1577 && ! find_reg_note (seq->element (i), REG_UNUSED, NULL_RTX))
1578 break;
1579
1580 /* If found a match, exit this loop early. */
1581 if (i > 0)
1582 break;
1583 }
1584
1585 else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat)
1586 && ! find_reg_note (trial, REG_UNUSED, NULL_RTX))
1587 break;
1588 }
1589
1590 /* If we didn't find an insn that matches, return 0. */
1591 if (trial == 0)
1592 return 0;
1593
1594 /* See what resources this insn sets and needs. If they overlap, or
1595 if this insn references CC0, it can't be redundant. */
1596
1597 CLEAR_RESOURCE (&needed);
1598 CLEAR_RESOURCE (&set);
1599 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1600 mark_referenced_resources (insn, &needed, true);
1601
1602 /* If TARGET is a SEQUENCE, get the main insn. */
1603 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1604 target_main = XVECEXP (PATTERN (target), 0, 0);
1605
1606 if (resource_conflicts_p (&needed, &set)
1607 || (HAVE_cc0 && reg_mentioned_p (cc0_rtx, ipat))
1608 /* The insn requiring the delay may not set anything needed or set by
1609 INSN. */
1610 || insn_sets_resource_p (target_main, &needed, true)
1611 || insn_sets_resource_p (target_main, &set, true))
1612 return 0;
1613
1614 /* Insns we pass may not set either NEEDED or SET, so merge them for
1615 simpler tests. */
1616 needed.memory |= set.memory;
1617 IOR_HARD_REG_SET (needed.regs, set.regs);
1618
1619 /* This insn isn't redundant if it conflicts with an insn that either is
1620 or will be in a delay slot of TARGET. */
1621
1622 while (delay_list)
1623 {
1624 if (insn_sets_resource_p (XEXP (delay_list, 0), &needed, true))
1625 return 0;
1626 delay_list = XEXP (delay_list, 1);
1627 }
1628
1629 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1630 for (i = 1; i < XVECLEN (PATTERN (target), 0); i++)
1631 if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed,
1632 true))
1633 return 0;
1634
1635 /* Scan backwards until we reach a label or an insn that uses something
1636 INSN sets or sets something insn uses or sets. */
1637
1638 for (trial = PREV_INSN (target),
1639 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1640 trial && !LABEL_P (trial) && insns_to_search > 0;
1641 trial = PREV_INSN (trial))
1642 {
1643 if (!INSN_P (trial))
1644 continue;
1645 --insns_to_search;
1646
1647 pat = PATTERN (trial);
1648 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1649 continue;
1650
1651 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (pat))
1652 {
1653 bool annul_p = false;
1654 rtx_insn *control = seq->insn (0);
1655
1656 /* If this is a CALL_INSN and its delay slots, it is hard to track
1657 the resource needs properly, so give up. */
1658 if (CALL_P (control))
1659 return 0;
1660
1661 /* If this is an INSN or JUMP_INSN with delayed effects, it
1662 is hard to track the resource needs properly, so give up. */
1663
1664 if (INSN_SETS_ARE_DELAYED (control))
1665 return 0;
1666
1667 if (INSN_REFERENCES_ARE_DELAYED (control))
1668 return 0;
1669
1670 if (JUMP_P (control))
1671 annul_p = INSN_ANNULLED_BRANCH_P (control);
1672
1673 /* See if any of the insns in the delay slot match, updating
1674 resource requirements as we go. */
1675 for (i = seq->len () - 1; i > 0; i--)
1676 {
1677 rtx candidate = seq->element (i);
1678
1679 /* If an insn will be annulled if the branch is false, it isn't
1680 considered as a possible duplicate insn. */
1681 if (rtx_equal_p (PATTERN (candidate), ipat)
1682 && ! (annul_p && INSN_FROM_TARGET_P (candidate)))
1683 {
1684 /* Show that this insn will be used in the sequel. */
1685 INSN_FROM_TARGET_P (candidate) = 0;
1686 return candidate;
1687 }
1688
1689 /* Unless this is an annulled insn from the target of a branch,
1690 we must stop if it sets anything needed or set by INSN. */
1691 if ((!annul_p || !INSN_FROM_TARGET_P (candidate))
1692 && insn_sets_resource_p (candidate, &needed, true))
1693 return 0;
1694 }
1695
1696 /* If the insn requiring the delay slot conflicts with INSN, we
1697 must stop. */
1698 if (insn_sets_resource_p (control, &needed, true))
1699 return 0;
1700 }
1701 else
1702 {
1703 /* See if TRIAL is the same as INSN. */
1704 pat = PATTERN (trial);
1705 if (rtx_equal_p (pat, ipat))
1706 return trial;
1707
1708 /* Can't go any further if TRIAL conflicts with INSN. */
1709 if (insn_sets_resource_p (trial, &needed, true))
1710 return 0;
1711 }
1712 }
1713
1714 return 0;
1715 }
1716 \f
1717 /* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero,
1718 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1719 is nonzero, we are allowed to fall into this thread; otherwise, we are
1720 not.
1721
1722 If LABEL is used more than one or we pass a label other than LABEL before
1723 finding an active insn, we do not own this thread. */
1724
1725 static int
1726 own_thread_p (rtx thread, rtx label, int allow_fallthrough)
1727 {
1728 rtx_insn *active_insn;
1729 rtx_insn *insn;
1730
1731 /* We don't own the function end. */
1732 if (thread == 0 || ANY_RETURN_P (thread))
1733 return 0;
1734
1735 /* We have a non-NULL insn. */
1736 rtx_insn *thread_insn = as_a <rtx_insn *> (thread);
1737
1738 /* Get the first active insn, or THREAD_INSN, if it is an active insn. */
1739 active_insn = next_active_insn (PREV_INSN (thread_insn));
1740
1741 for (insn = thread_insn; insn != active_insn; insn = NEXT_INSN (insn))
1742 if (LABEL_P (insn)
1743 && (insn != label || LABEL_NUSES (insn) != 1))
1744 return 0;
1745
1746 if (allow_fallthrough)
1747 return 1;
1748
1749 /* Ensure that we reach a BARRIER before any insn or label. */
1750 for (insn = prev_nonnote_insn (thread_insn);
1751 insn == 0 || !BARRIER_P (insn);
1752 insn = prev_nonnote_insn (insn))
1753 if (insn == 0
1754 || LABEL_P (insn)
1755 || (NONJUMP_INSN_P (insn)
1756 && GET_CODE (PATTERN (insn)) != USE
1757 && GET_CODE (PATTERN (insn)) != CLOBBER))
1758 return 0;
1759
1760 return 1;
1761 }
1762 \f
1763 /* Called when INSN is being moved from a location near the target of a jump.
1764 We leave a marker of the form (use (INSN)) immediately in front
1765 of WHERE for mark_target_live_regs. These markers will be deleted when
1766 reorg finishes.
1767
1768 We used to try to update the live status of registers if WHERE is at
1769 the start of a basic block, but that can't work since we may remove a
1770 BARRIER in relax_delay_slots. */
1771
1772 static void
1773 update_block (rtx_insn *insn, rtx where)
1774 {
1775 /* Ignore if this was in a delay slot and it came from the target of
1776 a branch. */
1777 if (INSN_FROM_TARGET_P (insn))
1778 return;
1779
1780 emit_insn_before (gen_rtx_USE (VOIDmode, insn), where);
1781
1782 /* INSN might be making a value live in a block where it didn't use to
1783 be. So recompute liveness information for this block. */
1784
1785 incr_ticks_for_insn (insn);
1786 }
1787
1788 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
1789 the basic block containing the jump. */
1790
1791 static int
1792 reorg_redirect_jump (rtx_jump_insn *jump, rtx nlabel)
1793 {
1794 incr_ticks_for_insn (jump);
1795 return redirect_jump (jump, nlabel, 1);
1796 }
1797
1798 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
1799 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
1800 that reference values used in INSN. If we find one, then we move the
1801 REG_DEAD note to INSN.
1802
1803 This is needed to handle the case where a later insn (after INSN) has a
1804 REG_DEAD note for a register used by INSN, and this later insn subsequently
1805 gets moved before a CODE_LABEL because it is a redundant insn. In this
1806 case, mark_target_live_regs may be confused into thinking the register
1807 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
1808
1809 static void
1810 update_reg_dead_notes (rtx_insn *insn, rtx_insn *delayed_insn)
1811 {
1812 rtx link, next;
1813 rtx_insn *p;
1814
1815 for (p = next_nonnote_insn (insn); p != delayed_insn;
1816 p = next_nonnote_insn (p))
1817 for (link = REG_NOTES (p); link; link = next)
1818 {
1819 next = XEXP (link, 1);
1820
1821 if (REG_NOTE_KIND (link) != REG_DEAD
1822 || !REG_P (XEXP (link, 0)))
1823 continue;
1824
1825 if (reg_referenced_p (XEXP (link, 0), PATTERN (insn)))
1826 {
1827 /* Move the REG_DEAD note from P to INSN. */
1828 remove_note (p, link);
1829 XEXP (link, 1) = REG_NOTES (insn);
1830 REG_NOTES (insn) = link;
1831 }
1832 }
1833 }
1834
1835 /* Called when an insn redundant with start_insn is deleted. If there
1836 is a REG_DEAD note for the target of start_insn between start_insn
1837 and stop_insn, then the REG_DEAD note needs to be deleted since the
1838 value no longer dies there.
1839
1840 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
1841 confused into thinking the register is dead. */
1842
1843 static void
1844 fix_reg_dead_note (rtx start_insn, rtx stop_insn)
1845 {
1846 rtx link, next;
1847 rtx_insn *p;
1848
1849 for (p = next_nonnote_insn (start_insn); p != stop_insn;
1850 p = next_nonnote_insn (p))
1851 for (link = REG_NOTES (p); link; link = next)
1852 {
1853 next = XEXP (link, 1);
1854
1855 if (REG_NOTE_KIND (link) != REG_DEAD
1856 || !REG_P (XEXP (link, 0)))
1857 continue;
1858
1859 if (reg_set_p (XEXP (link, 0), PATTERN (start_insn)))
1860 {
1861 remove_note (p, link);
1862 return;
1863 }
1864 }
1865 }
1866
1867 /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN.
1868
1869 This handles the case of udivmodXi4 instructions which optimize their
1870 output depending on whether any REG_UNUSED notes are present.
1871 we must make sure that INSN calculates as many results as REDUNDANT_INSN
1872 does. */
1873
1874 static void
1875 update_reg_unused_notes (rtx insn, rtx redundant_insn)
1876 {
1877 rtx link, next;
1878
1879 for (link = REG_NOTES (insn); link; link = next)
1880 {
1881 next = XEXP (link, 1);
1882
1883 if (REG_NOTE_KIND (link) != REG_UNUSED
1884 || !REG_P (XEXP (link, 0)))
1885 continue;
1886
1887 if (! find_regno_note (redundant_insn, REG_UNUSED,
1888 REGNO (XEXP (link, 0))))
1889 remove_note (insn, link);
1890 }
1891 }
1892 \f
1893 static vec <rtx> sibling_labels;
1894
1895 /* Return the label before INSN, or put a new label there. If SIBLING is
1896 non-zero, it is another label associated with the new label (if any),
1897 typically the former target of the jump that will be redirected to
1898 the new label. */
1899
1900 static rtx_insn *
1901 get_label_before (rtx_insn *insn, rtx sibling)
1902 {
1903 rtx_insn *label;
1904
1905 /* Find an existing label at this point
1906 or make a new one if there is none. */
1907 label = prev_nonnote_insn (insn);
1908
1909 if (label == 0 || !LABEL_P (label))
1910 {
1911 rtx_insn *prev = PREV_INSN (insn);
1912
1913 label = gen_label_rtx ();
1914 emit_label_after (label, prev);
1915 LABEL_NUSES (label) = 0;
1916 if (sibling)
1917 {
1918 sibling_labels.safe_push (label);
1919 sibling_labels.safe_push (sibling);
1920 }
1921 }
1922 return label;
1923 }
1924
1925 /* Scan a function looking for insns that need a delay slot and find insns to
1926 put into the delay slot.
1927
1928 NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such
1929 as calls). We do these first since we don't want jump insns (that are
1930 easier to fill) to get the only insns that could be used for non-jump insns.
1931 When it is zero, only try to fill JUMP_INSNs.
1932
1933 When slots are filled in this manner, the insns (including the
1934 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
1935 it is possible to tell whether a delay slot has really been filled
1936 or not. `final' knows how to deal with this, by communicating
1937 through FINAL_SEQUENCE. */
1938
1939 static void
1940 fill_simple_delay_slots (int non_jumps_p)
1941 {
1942 rtx_insn *insn, *trial, *next_trial;
1943 rtx pat;
1944 int i;
1945 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
1946 struct resources needed, set;
1947 int slots_to_fill, slots_filled;
1948 rtx_insn_list *delay_list;
1949
1950 for (i = 0; i < num_unfilled_slots; i++)
1951 {
1952 int flags;
1953 /* Get the next insn to fill. If it has already had any slots assigned,
1954 we can't do anything with it. Maybe we'll improve this later. */
1955
1956 insn = unfilled_slots_base[i];
1957 if (insn == 0
1958 || insn->deleted ()
1959 || (NONJUMP_INSN_P (insn)
1960 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1961 || (JUMP_P (insn) && non_jumps_p)
1962 || (!JUMP_P (insn) && ! non_jumps_p))
1963 continue;
1964
1965 /* It may have been that this insn used to need delay slots, but
1966 now doesn't; ignore in that case. This can happen, for example,
1967 on the HP PA RISC, where the number of delay slots depends on
1968 what insns are nearby. */
1969 slots_to_fill = num_delay_slots (insn);
1970
1971 /* Some machine description have defined instructions to have
1972 delay slots only in certain circumstances which may depend on
1973 nearby insns (which change due to reorg's actions).
1974
1975 For example, the PA port normally has delay slots for unconditional
1976 jumps.
1977
1978 However, the PA port claims such jumps do not have a delay slot
1979 if they are immediate successors of certain CALL_INSNs. This
1980 allows the port to favor filling the delay slot of the call with
1981 the unconditional jump. */
1982 if (slots_to_fill == 0)
1983 continue;
1984
1985 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
1986 says how many. After initialization, first try optimizing
1987
1988 call _foo call _foo
1989 nop add %o7,.-L1,%o7
1990 b,a L1
1991 nop
1992
1993 If this case applies, the delay slot of the call is filled with
1994 the unconditional jump. This is done first to avoid having the
1995 delay slot of the call filled in the backward scan. Also, since
1996 the unconditional jump is likely to also have a delay slot, that
1997 insn must exist when it is subsequently scanned.
1998
1999 This is tried on each insn with delay slots as some machines
2000 have insns which perform calls, but are not represented as
2001 CALL_INSNs. */
2002
2003 slots_filled = 0;
2004 delay_list = 0;
2005
2006 if (JUMP_P (insn))
2007 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2008 else
2009 flags = get_jump_flags (insn, NULL_RTX);
2010
2011 if ((trial = next_active_insn (insn))
2012 && JUMP_P (trial)
2013 && simplejump_p (trial)
2014 && eligible_for_delay (insn, slots_filled, trial, flags)
2015 && no_labels_between_p (insn, trial)
2016 && ! can_throw_internal (trial))
2017 {
2018 rtx_insn **tmp;
2019 slots_filled++;
2020 delay_list = add_to_delay_list (trial, delay_list);
2021
2022 /* TRIAL may have had its delay slot filled, then unfilled. When
2023 the delay slot is unfilled, TRIAL is placed back on the unfilled
2024 slots obstack. Unfortunately, it is placed on the end of the
2025 obstack, not in its original location. Therefore, we must search
2026 from entry i + 1 to the end of the unfilled slots obstack to
2027 try and find TRIAL. */
2028 tmp = &unfilled_slots_base[i + 1];
2029 while (*tmp != trial && tmp != unfilled_slots_next)
2030 tmp++;
2031
2032 /* Remove the unconditional jump from consideration for delay slot
2033 filling and unthread it. */
2034 if (*tmp == trial)
2035 *tmp = 0;
2036 {
2037 rtx_insn *next = NEXT_INSN (trial);
2038 rtx_insn *prev = PREV_INSN (trial);
2039 if (prev)
2040 SET_NEXT_INSN (prev) = next;
2041 if (next)
2042 SET_PREV_INSN (next) = prev;
2043 }
2044 }
2045
2046 /* Now, scan backwards from the insn to search for a potential
2047 delay-slot candidate. Stop searching when a label or jump is hit.
2048
2049 For each candidate, if it is to go into the delay slot (moved
2050 forward in execution sequence), it must not need or set any resources
2051 that were set by later insns and must not set any resources that
2052 are needed for those insns.
2053
2054 The delay slot insn itself sets resources unless it is a call
2055 (in which case the called routine, not the insn itself, is doing
2056 the setting). */
2057
2058 if (slots_filled < slots_to_fill)
2059 {
2060 /* If the flags register is dead after the insn, then we want to be
2061 able to accept a candidate that clobbers it. For this purpose,
2062 we need to filter the flags register during life analysis, so
2063 that it doesn't create RAW and WAW dependencies, while still
2064 creating the necessary WAR dependencies. */
2065 bool filter_flags
2066 = (slots_to_fill == 1
2067 && targetm.flags_regnum != INVALID_REGNUM
2068 && find_regno_note (insn, REG_DEAD, targetm.flags_regnum));
2069 struct resources fset;
2070 CLEAR_RESOURCE (&needed);
2071 CLEAR_RESOURCE (&set);
2072 mark_set_resources (insn, &set, 0, MARK_SRC_DEST);
2073 if (filter_flags)
2074 {
2075 CLEAR_RESOURCE (&fset);
2076 mark_set_resources (insn, &fset, 0, MARK_SRC_DEST);
2077 }
2078 mark_referenced_resources (insn, &needed, false);
2079
2080 for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1);
2081 trial = next_trial)
2082 {
2083 next_trial = prev_nonnote_insn (trial);
2084
2085 /* This must be an INSN or CALL_INSN. */
2086 pat = PATTERN (trial);
2087
2088 /* Stand-alone USE and CLOBBER are just for flow. */
2089 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2090 continue;
2091
2092 /* Check for resource conflict first, to avoid unnecessary
2093 splitting. */
2094 if (! insn_references_resource_p (trial, &set, true)
2095 && ! insn_sets_resource_p (trial,
2096 filter_flags ? &fset : &set,
2097 true)
2098 && ! insn_sets_resource_p (trial, &needed, true)
2099 /* Can't separate set of cc0 from its use. */
2100 && (!HAVE_cc0 || ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat)))
2101 && ! can_throw_internal (trial))
2102 {
2103 trial = try_split (pat, trial, 1);
2104 next_trial = prev_nonnote_insn (trial);
2105 if (eligible_for_delay (insn, slots_filled, trial, flags))
2106 {
2107 /* In this case, we are searching backward, so if we
2108 find insns to put on the delay list, we want
2109 to put them at the head, rather than the
2110 tail, of the list. */
2111
2112 update_reg_dead_notes (trial, insn);
2113 delay_list = gen_rtx_INSN_LIST (VOIDmode,
2114 trial, delay_list);
2115 update_block (trial, trial);
2116 delete_related_insns (trial);
2117 if (slots_to_fill == ++slots_filled)
2118 break;
2119 continue;
2120 }
2121 }
2122
2123 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2124 if (filter_flags)
2125 {
2126 mark_set_resources (trial, &fset, 0, MARK_SRC_DEST_CALL);
2127 /* If the flags register is set, then it doesn't create RAW
2128 dependencies any longer and it also doesn't create WAW
2129 dependencies since it's dead after the original insn. */
2130 if (TEST_HARD_REG_BIT (fset.regs, targetm.flags_regnum))
2131 {
2132 CLEAR_HARD_REG_BIT (needed.regs, targetm.flags_regnum);
2133 CLEAR_HARD_REG_BIT (fset.regs, targetm.flags_regnum);
2134 }
2135 }
2136 mark_referenced_resources (trial, &needed, true);
2137 }
2138 }
2139
2140 /* If all needed slots haven't been filled, we come here. */
2141
2142 /* Try to optimize case of jumping around a single insn. */
2143 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2144 if (slots_filled != slots_to_fill
2145 && delay_list == 0
2146 && JUMP_P (insn)
2147 && (condjump_p (insn) || condjump_in_parallel_p (insn))
2148 && !ANY_RETURN_P (JUMP_LABEL (insn)))
2149 {
2150 delay_list = optimize_skip (as_a <rtx_jump_insn *> (insn));
2151 if (delay_list)
2152 slots_filled += 1;
2153 }
2154 #endif
2155
2156 /* Try to get insns from beyond the insn needing the delay slot.
2157 These insns can neither set or reference resources set in insns being
2158 skipped, cannot set resources in the insn being skipped, and, if this
2159 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2160 call might not return).
2161
2162 There used to be code which continued past the target label if
2163 we saw all uses of the target label. This code did not work,
2164 because it failed to account for some instructions which were
2165 both annulled and marked as from the target. This can happen as a
2166 result of optimize_skip. Since this code was redundant with
2167 fill_eager_delay_slots anyways, it was just deleted. */
2168
2169 if (slots_filled != slots_to_fill
2170 /* If this instruction could throw an exception which is
2171 caught in the same function, then it's not safe to fill
2172 the delay slot with an instruction from beyond this
2173 point. For example, consider:
2174
2175 int i = 2;
2176
2177 try {
2178 f();
2179 i = 3;
2180 } catch (...) {}
2181
2182 return i;
2183
2184 Even though `i' is a local variable, we must be sure not
2185 to put `i = 3' in the delay slot if `f' might throw an
2186 exception.
2187
2188 Presumably, we should also check to see if we could get
2189 back to this function via `setjmp'. */
2190 && ! can_throw_internal (insn)
2191 && !JUMP_P (insn))
2192 {
2193 int maybe_never = 0;
2194 rtx pat, trial_delay;
2195
2196 CLEAR_RESOURCE (&needed);
2197 CLEAR_RESOURCE (&set);
2198 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
2199 mark_referenced_resources (insn, &needed, true);
2200
2201 if (CALL_P (insn))
2202 maybe_never = 1;
2203
2204 for (trial = next_nonnote_insn (insn); !stop_search_p (trial, 1);
2205 trial = next_trial)
2206 {
2207 next_trial = next_nonnote_insn (trial);
2208
2209 /* This must be an INSN or CALL_INSN. */
2210 pat = PATTERN (trial);
2211
2212 /* Stand-alone USE and CLOBBER are just for flow. */
2213 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2214 continue;
2215
2216 /* If this already has filled delay slots, get the insn needing
2217 the delay slots. */
2218 if (GET_CODE (pat) == SEQUENCE)
2219 trial_delay = XVECEXP (pat, 0, 0);
2220 else
2221 trial_delay = trial;
2222
2223 /* Stop our search when seeing a jump. */
2224 if (JUMP_P (trial_delay))
2225 break;
2226
2227 /* See if we have a resource problem before we try to split. */
2228 if (GET_CODE (pat) != SEQUENCE
2229 && ! insn_references_resource_p (trial, &set, true)
2230 && ! insn_sets_resource_p (trial, &set, true)
2231 && ! insn_sets_resource_p (trial, &needed, true)
2232 && (!HAVE_cc0 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat)))
2233 && ! (maybe_never && may_trap_or_fault_p (pat))
2234 && (trial = try_split (pat, trial, 0))
2235 && eligible_for_delay (insn, slots_filled, trial, flags)
2236 && ! can_throw_internal (trial))
2237 {
2238 next_trial = next_nonnote_insn (trial);
2239 delay_list = add_to_delay_list (trial, delay_list);
2240 if (HAVE_cc0 && reg_mentioned_p (cc0_rtx, pat))
2241 link_cc0_insns (trial);
2242
2243 delete_related_insns (trial);
2244 if (slots_to_fill == ++slots_filled)
2245 break;
2246 continue;
2247 }
2248
2249 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2250 mark_referenced_resources (trial, &needed, true);
2251
2252 /* Ensure we don't put insns between the setting of cc and the
2253 comparison by moving a setting of cc into an earlier delay
2254 slot since these insns could clobber the condition code. */
2255 set.cc = 1;
2256
2257 /* If this is a call, we might not get here. */
2258 if (CALL_P (trial_delay))
2259 maybe_never = 1;
2260 }
2261
2262 /* If there are slots left to fill and our search was stopped by an
2263 unconditional branch, try the insn at the branch target. We can
2264 redirect the branch if it works.
2265
2266 Don't do this if the insn at the branch target is a branch. */
2267 if (slots_to_fill != slots_filled
2268 && trial
2269 && jump_to_label_p (trial)
2270 && simplejump_p (trial)
2271 && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0
2272 && ! (NONJUMP_INSN_P (next_trial)
2273 && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
2274 && !JUMP_P (next_trial)
2275 && ! insn_references_resource_p (next_trial, &set, true)
2276 && ! insn_sets_resource_p (next_trial, &set, true)
2277 && ! insn_sets_resource_p (next_trial, &needed, true)
2278 && (!HAVE_cc0 || ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial)))
2279 && ! (maybe_never && may_trap_or_fault_p (PATTERN (next_trial)))
2280 && (next_trial = try_split (PATTERN (next_trial), next_trial, 0))
2281 && eligible_for_delay (insn, slots_filled, next_trial, flags)
2282 && ! can_throw_internal (trial))
2283 {
2284 /* See comment in relax_delay_slots about necessity of using
2285 next_real_insn here. */
2286 rtx_insn *new_label = next_real_insn (next_trial);
2287
2288 if (new_label != 0)
2289 new_label = get_label_before (new_label, JUMP_LABEL (trial));
2290 else
2291 new_label = find_end_label (simple_return_rtx);
2292
2293 if (new_label)
2294 {
2295 delay_list
2296 = add_to_delay_list (copy_delay_slot_insn (next_trial),
2297 delay_list);
2298 slots_filled++;
2299 reorg_redirect_jump (as_a <rtx_jump_insn *> (trial),
2300 new_label);
2301 }
2302 }
2303 }
2304
2305 /* If this is an unconditional jump, then try to get insns from the
2306 target of the jump. */
2307 rtx_jump_insn *jump_insn;
2308 if ((jump_insn = dyn_cast <rtx_jump_insn *> (insn))
2309 && simplejump_p (jump_insn)
2310 && slots_filled != slots_to_fill)
2311 delay_list
2312 = fill_slots_from_thread (jump_insn, const_true_rtx,
2313 next_active_insn (JUMP_LABEL (insn)),
2314 NULL, 1, 1,
2315 own_thread_p (JUMP_LABEL (insn),
2316 JUMP_LABEL (insn), 0),
2317 slots_to_fill, &slots_filled,
2318 delay_list);
2319
2320 if (delay_list)
2321 unfilled_slots_base[i]
2322 = emit_delay_sequence (insn, delay_list, slots_filled);
2323
2324 if (slots_to_fill == slots_filled)
2325 unfilled_slots_base[i] = 0;
2326
2327 note_delay_statistics (slots_filled, 0);
2328 }
2329 }
2330 \f
2331 /* Follow any unconditional jump at LABEL, for the purpose of redirecting JUMP;
2332 return the ultimate label reached by any such chain of jumps.
2333 Return a suitable return rtx if the chain ultimately leads to a
2334 return instruction.
2335 If LABEL is not followed by a jump, return LABEL.
2336 If the chain loops or we can't find end, return LABEL,
2337 since that tells caller to avoid changing the insn.
2338 If the returned label is obtained by following a crossing jump,
2339 set *CROSSING to true, otherwise set it to false. */
2340
2341 static rtx
2342 follow_jumps (rtx label, rtx_insn *jump, bool *crossing)
2343 {
2344 rtx_insn *insn;
2345 rtx_insn *next;
2346 int depth;
2347
2348 *crossing = false;
2349 if (ANY_RETURN_P (label))
2350 return label;
2351
2352 rtx_insn *value = as_a <rtx_insn *> (label);
2353
2354 for (depth = 0;
2355 (depth < 10
2356 && (insn = next_active_insn (value)) != 0
2357 && JUMP_P (insn)
2358 && JUMP_LABEL (insn) != NULL_RTX
2359 && ((any_uncondjump_p (insn) && onlyjump_p (insn))
2360 || ANY_RETURN_P (PATTERN (insn)))
2361 && (next = NEXT_INSN (insn))
2362 && BARRIER_P (next));
2363 depth++)
2364 {
2365 rtx this_label_or_return = JUMP_LABEL (insn);
2366
2367 /* If we have found a cycle, make the insn jump to itself. */
2368 if (this_label_or_return == label)
2369 return label;
2370
2371 /* Cannot follow returns and cannot look through tablejumps. */
2372 if (ANY_RETURN_P (this_label_or_return))
2373 return this_label_or_return;
2374
2375 rtx_insn *this_label = as_a <rtx_insn *> (this_label_or_return);
2376 if (NEXT_INSN (this_label)
2377 && JUMP_TABLE_DATA_P (NEXT_INSN (this_label)))
2378 break;
2379
2380 if (!targetm.can_follow_jump (jump, insn))
2381 break;
2382 if (!*crossing)
2383 *crossing = CROSSING_JUMP_P (jump);
2384 value = this_label;
2385 }
2386 if (depth == 10)
2387 return label;
2388 return value;
2389 }
2390
2391 /* Try to find insns to place in delay slots.
2392
2393 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2394 or is an unconditional branch if CONDITION is const_true_rtx.
2395 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2396
2397 THREAD is a flow-of-control, either the insns to be executed if the
2398 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2399
2400 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2401 to see if any potential delay slot insns set things needed there.
2402
2403 LIKELY is nonzero if it is extremely likely that the branch will be
2404 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2405 end of a loop back up to the top.
2406
2407 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
2408 thread. I.e., it is the fallthrough code of our jump or the target of the
2409 jump when we are the only jump going there.
2410
2411 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2412 case, we can only take insns from the head of the thread for our delay
2413 slot. We then adjust the jump to point after the insns we have taken. */
2414
2415 static rtx_insn_list *
2416 fill_slots_from_thread (rtx_jump_insn *insn, rtx condition,
2417 rtx thread_or_return, rtx opposite_thread, int likely,
2418 int thread_if_true, int own_thread, int slots_to_fill,
2419 int *pslots_filled, rtx_insn_list *delay_list)
2420 {
2421 rtx new_thread;
2422 struct resources opposite_needed, set, needed;
2423 rtx_insn *trial;
2424 int lose = 0;
2425 int must_annul = 0;
2426 int flags;
2427
2428 /* Validate our arguments. */
2429 gcc_assert (condition != const_true_rtx || thread_if_true);
2430 gcc_assert (own_thread || thread_if_true);
2431
2432 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2433
2434 /* If our thread is the end of subroutine, we can't get any delay
2435 insns from that. */
2436 if (thread_or_return == NULL_RTX || ANY_RETURN_P (thread_or_return))
2437 return delay_list;
2438
2439 rtx_insn *thread = as_a <rtx_insn *> (thread_or_return);
2440
2441 /* If this is an unconditional branch, nothing is needed at the
2442 opposite thread. Otherwise, compute what is needed there. */
2443 if (condition == const_true_rtx)
2444 CLEAR_RESOURCE (&opposite_needed);
2445 else
2446 mark_target_live_regs (get_insns (), opposite_thread, &opposite_needed);
2447
2448 /* If the insn at THREAD can be split, do it here to avoid having to
2449 update THREAD and NEW_THREAD if it is done in the loop below. Also
2450 initialize NEW_THREAD. */
2451
2452 new_thread = thread = try_split (PATTERN (thread), thread, 0);
2453
2454 /* Scan insns at THREAD. We are looking for an insn that can be removed
2455 from THREAD (it neither sets nor references resources that were set
2456 ahead of it and it doesn't set anything needs by the insns ahead of
2457 it) and that either can be placed in an annulling insn or aren't
2458 needed at OPPOSITE_THREAD. */
2459
2460 CLEAR_RESOURCE (&needed);
2461 CLEAR_RESOURCE (&set);
2462
2463 /* If we do not own this thread, we must stop as soon as we find
2464 something that we can't put in a delay slot, since all we can do
2465 is branch into THREAD at a later point. Therefore, labels stop
2466 the search if this is not the `true' thread. */
2467
2468 for (trial = thread;
2469 ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread);
2470 trial = next_nonnote_insn (trial))
2471 {
2472 rtx pat, old_trial;
2473
2474 /* If we have passed a label, we no longer own this thread. */
2475 if (LABEL_P (trial))
2476 {
2477 own_thread = 0;
2478 continue;
2479 }
2480
2481 pat = PATTERN (trial);
2482 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2483 continue;
2484
2485 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
2486 don't separate or copy insns that set and use CC0. */
2487 if (! insn_references_resource_p (trial, &set, true)
2488 && ! insn_sets_resource_p (trial, &set, true)
2489 && ! insn_sets_resource_p (trial, &needed, true)
2490 && (!HAVE_cc0 || (! (reg_mentioned_p (cc0_rtx, pat)
2491 && (! own_thread || ! sets_cc0_p (pat)))))
2492 && ! can_throw_internal (trial))
2493 {
2494 rtx prior_insn;
2495
2496 /* If TRIAL is redundant with some insn before INSN, we don't
2497 actually need to add it to the delay list; we can merely pretend
2498 we did. */
2499 if ((prior_insn = redundant_insn (trial, insn, delay_list)))
2500 {
2501 fix_reg_dead_note (prior_insn, insn);
2502 if (own_thread)
2503 {
2504 update_block (trial, thread);
2505 if (trial == thread)
2506 {
2507 thread = next_active_insn (thread);
2508 if (new_thread == trial)
2509 new_thread = thread;
2510 }
2511
2512 delete_related_insns (trial);
2513 }
2514 else
2515 {
2516 update_reg_unused_notes (prior_insn, trial);
2517 new_thread = next_active_insn (trial);
2518 }
2519
2520 continue;
2521 }
2522
2523 /* There are two ways we can win: If TRIAL doesn't set anything
2524 needed at the opposite thread and can't trap, or if it can
2525 go into an annulled delay slot. But we want neither to copy
2526 nor to speculate frame-related insns. */
2527 if (!must_annul
2528 && ((condition == const_true_rtx
2529 && (own_thread || !RTX_FRAME_RELATED_P (trial)))
2530 || (! insn_sets_resource_p (trial, &opposite_needed, true)
2531 && ! may_trap_or_fault_p (pat)
2532 && ! RTX_FRAME_RELATED_P (trial))))
2533 {
2534 old_trial = trial;
2535 trial = try_split (pat, trial, 0);
2536 if (new_thread == old_trial)
2537 new_thread = trial;
2538 if (thread == old_trial)
2539 thread = trial;
2540 pat = PATTERN (trial);
2541 if (eligible_for_delay (insn, *pslots_filled, trial, flags))
2542 goto winner;
2543 }
2544 else if (0
2545 #ifdef ANNUL_IFTRUE_SLOTS
2546 || ! thread_if_true
2547 #endif
2548 #ifdef ANNUL_IFFALSE_SLOTS
2549 || thread_if_true
2550 #endif
2551 )
2552 {
2553 old_trial = trial;
2554 trial = try_split (pat, trial, 0);
2555 if (new_thread == old_trial)
2556 new_thread = trial;
2557 if (thread == old_trial)
2558 thread = trial;
2559 pat = PATTERN (trial);
2560 if ((must_annul || delay_list == NULL) && (thread_if_true
2561 ? check_annul_list_true_false (0, delay_list)
2562 && eligible_for_annul_false (insn, *pslots_filled, trial, flags)
2563 : check_annul_list_true_false (1, delay_list)
2564 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
2565 {
2566 rtx_insn *temp;
2567
2568 must_annul = 1;
2569 winner:
2570
2571 if (HAVE_cc0 && reg_mentioned_p (cc0_rtx, pat))
2572 link_cc0_insns (trial);
2573
2574 /* If we own this thread, delete the insn. If this is the
2575 destination of a branch, show that a basic block status
2576 may have been updated. In any case, mark the new
2577 starting point of this thread. */
2578 if (own_thread)
2579 {
2580 rtx note;
2581
2582 update_block (trial, thread);
2583 if (trial == thread)
2584 {
2585 thread = next_active_insn (thread);
2586 if (new_thread == trial)
2587 new_thread = thread;
2588 }
2589
2590 /* We are moving this insn, not deleting it. We must
2591 temporarily increment the use count on any referenced
2592 label lest it be deleted by delete_related_insns. */
2593 for (note = REG_NOTES (trial);
2594 note != NULL_RTX;
2595 note = XEXP (note, 1))
2596 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2597 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2598 {
2599 /* REG_LABEL_OPERAND could be
2600 NOTE_INSN_DELETED_LABEL too. */
2601 if (LABEL_P (XEXP (note, 0)))
2602 LABEL_NUSES (XEXP (note, 0))++;
2603 else
2604 gcc_assert (REG_NOTE_KIND (note)
2605 == REG_LABEL_OPERAND);
2606 }
2607 if (jump_to_label_p (trial))
2608 LABEL_NUSES (JUMP_LABEL (trial))++;
2609
2610 delete_related_insns (trial);
2611
2612 for (note = REG_NOTES (trial);
2613 note != NULL_RTX;
2614 note = XEXP (note, 1))
2615 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2616 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2617 {
2618 /* REG_LABEL_OPERAND could be
2619 NOTE_INSN_DELETED_LABEL too. */
2620 if (LABEL_P (XEXP (note, 0)))
2621 LABEL_NUSES (XEXP (note, 0))--;
2622 else
2623 gcc_assert (REG_NOTE_KIND (note)
2624 == REG_LABEL_OPERAND);
2625 }
2626 if (jump_to_label_p (trial))
2627 LABEL_NUSES (JUMP_LABEL (trial))--;
2628 }
2629 else
2630 new_thread = next_active_insn (trial);
2631
2632 temp = own_thread ? trial : copy_delay_slot_insn (trial);
2633 if (thread_if_true)
2634 INSN_FROM_TARGET_P (temp) = 1;
2635
2636 delay_list = add_to_delay_list (temp, delay_list);
2637
2638 if (slots_to_fill == ++(*pslots_filled))
2639 {
2640 /* Even though we have filled all the slots, we
2641 may be branching to a location that has a
2642 redundant insn. Skip any if so. */
2643 while (new_thread && ! own_thread
2644 && ! insn_sets_resource_p (new_thread, &set, true)
2645 && ! insn_sets_resource_p (new_thread, &needed,
2646 true)
2647 && ! insn_references_resource_p (new_thread,
2648 &set, true)
2649 && (prior_insn
2650 = redundant_insn (new_thread, insn,
2651 delay_list)))
2652 {
2653 /* We know we do not own the thread, so no need
2654 to call update_block and delete_insn. */
2655 fix_reg_dead_note (prior_insn, insn);
2656 update_reg_unused_notes (prior_insn, new_thread);
2657 new_thread = next_active_insn (new_thread);
2658 }
2659 break;
2660 }
2661
2662 continue;
2663 }
2664 }
2665 }
2666
2667 /* This insn can't go into a delay slot. */
2668 lose = 1;
2669 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2670 mark_referenced_resources (trial, &needed, true);
2671
2672 /* Ensure we don't put insns between the setting of cc and the comparison
2673 by moving a setting of cc into an earlier delay slot since these insns
2674 could clobber the condition code. */
2675 set.cc = 1;
2676
2677 /* If this insn is a register-register copy and the next insn has
2678 a use of our destination, change it to use our source. That way,
2679 it will become a candidate for our delay slot the next time
2680 through this loop. This case occurs commonly in loops that
2681 scan a list.
2682
2683 We could check for more complex cases than those tested below,
2684 but it doesn't seem worth it. It might also be a good idea to try
2685 to swap the two insns. That might do better.
2686
2687 We can't do this if the next insn modifies our destination, because
2688 that would make the replacement into the insn invalid. We also can't
2689 do this if it modifies our source, because it might be an earlyclobber
2690 operand. This latter test also prevents updating the contents of
2691 a PRE_INC. We also can't do this if there's overlap of source and
2692 destination. Overlap may happen for larger-than-register-size modes. */
2693
2694 if (NONJUMP_INSN_P (trial) && GET_CODE (pat) == SET
2695 && REG_P (SET_SRC (pat))
2696 && REG_P (SET_DEST (pat))
2697 && !reg_overlap_mentioned_p (SET_DEST (pat), SET_SRC (pat)))
2698 {
2699 rtx_insn *next = next_nonnote_insn (trial);
2700
2701 if (next && NONJUMP_INSN_P (next)
2702 && GET_CODE (PATTERN (next)) != USE
2703 && ! reg_set_p (SET_DEST (pat), next)
2704 && ! reg_set_p (SET_SRC (pat), next)
2705 && reg_referenced_p (SET_DEST (pat), PATTERN (next))
2706 && ! modified_in_p (SET_DEST (pat), next))
2707 validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next);
2708 }
2709 }
2710
2711 /* If we stopped on a branch insn that has delay slots, see if we can
2712 steal some of the insns in those slots. */
2713 if (trial && NONJUMP_INSN_P (trial)
2714 && GET_CODE (PATTERN (trial)) == SEQUENCE
2715 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0)))
2716 {
2717 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (trial));
2718 /* If this is the `true' thread, we will want to follow the jump,
2719 so we can only do this if we have taken everything up to here. */
2720 if (thread_if_true && trial == new_thread)
2721 {
2722 delay_list
2723 = steal_delay_list_from_target (insn, condition, sequence,
2724 delay_list, &set, &needed,
2725 &opposite_needed, slots_to_fill,
2726 pslots_filled, &must_annul,
2727 &new_thread);
2728 /* If we owned the thread and are told that it branched
2729 elsewhere, make sure we own the thread at the new location. */
2730 if (own_thread && trial != new_thread)
2731 own_thread = own_thread_p (new_thread, new_thread, 0);
2732 }
2733 else if (! thread_if_true)
2734 delay_list
2735 = steal_delay_list_from_fallthrough (insn, condition,
2736 sequence,
2737 delay_list, &set, &needed,
2738 &opposite_needed, slots_to_fill,
2739 pslots_filled, &must_annul);
2740 }
2741
2742 /* If we haven't found anything for this delay slot and it is very
2743 likely that the branch will be taken, see if the insn at our target
2744 increments or decrements a register with an increment that does not
2745 depend on the destination register. If so, try to place the opposite
2746 arithmetic insn after the jump insn and put the arithmetic insn in the
2747 delay slot. If we can't do this, return. */
2748 if (delay_list == 0 && likely
2749 && new_thread && !ANY_RETURN_P (new_thread)
2750 && NONJUMP_INSN_P (new_thread)
2751 && !RTX_FRAME_RELATED_P (new_thread)
2752 && GET_CODE (PATTERN (new_thread)) != ASM_INPUT
2753 && asm_noperands (PATTERN (new_thread)) < 0)
2754 {
2755 rtx pat = PATTERN (new_thread);
2756 rtx dest;
2757 rtx src;
2758
2759 /* We know "new_thread" is an insn due to NONJUMP_INSN_P (new_thread)
2760 above. */
2761 trial = as_a <rtx_insn *> (new_thread);
2762 pat = PATTERN (trial);
2763
2764 if (!NONJUMP_INSN_P (trial)
2765 || GET_CODE (pat) != SET
2766 || ! eligible_for_delay (insn, 0, trial, flags)
2767 || can_throw_internal (trial))
2768 return 0;
2769
2770 dest = SET_DEST (pat), src = SET_SRC (pat);
2771 if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS)
2772 && rtx_equal_p (XEXP (src, 0), dest)
2773 && (!FLOAT_MODE_P (GET_MODE (src))
2774 || flag_unsafe_math_optimizations)
2775 && ! reg_overlap_mentioned_p (dest, XEXP (src, 1))
2776 && ! side_effects_p (pat))
2777 {
2778 rtx other = XEXP (src, 1);
2779 rtx new_arith;
2780 rtx_insn *ninsn;
2781
2782 /* If this is a constant adjustment, use the same code with
2783 the negated constant. Otherwise, reverse the sense of the
2784 arithmetic. */
2785 if (CONST_INT_P (other))
2786 new_arith = gen_rtx_fmt_ee (GET_CODE (src), GET_MODE (src), dest,
2787 negate_rtx (GET_MODE (src), other));
2788 else
2789 new_arith = gen_rtx_fmt_ee (GET_CODE (src) == PLUS ? MINUS : PLUS,
2790 GET_MODE (src), dest, other);
2791
2792 ninsn = emit_insn_after (gen_rtx_SET (dest, new_arith), insn);
2793
2794 if (recog_memoized (ninsn) < 0
2795 || (extract_insn (ninsn),
2796 !constrain_operands (1, get_preferred_alternatives (ninsn))))
2797 {
2798 delete_related_insns (ninsn);
2799 return 0;
2800 }
2801
2802 if (own_thread)
2803 {
2804 update_block (trial, thread);
2805 if (trial == thread)
2806 {
2807 thread = next_active_insn (thread);
2808 if (new_thread == trial)
2809 new_thread = thread;
2810 }
2811 delete_related_insns (trial);
2812 }
2813 else
2814 new_thread = next_active_insn (trial);
2815
2816 ninsn = own_thread ? trial : copy_delay_slot_insn (trial);
2817 if (thread_if_true)
2818 INSN_FROM_TARGET_P (ninsn) = 1;
2819
2820 delay_list = add_to_delay_list (ninsn, NULL);
2821 (*pslots_filled)++;
2822 }
2823 }
2824
2825 if (delay_list && must_annul)
2826 INSN_ANNULLED_BRANCH_P (insn) = 1;
2827
2828 /* If we are to branch into the middle of this thread, find an appropriate
2829 label or make a new one if none, and redirect INSN to it. If we hit the
2830 end of the function, use the end-of-function label. */
2831 if (new_thread != thread)
2832 {
2833 rtx label;
2834 bool crossing = false;
2835
2836 gcc_assert (thread_if_true);
2837
2838 if (new_thread && simplejump_or_return_p (new_thread)
2839 && redirect_with_delay_list_safe_p (insn,
2840 JUMP_LABEL (new_thread),
2841 delay_list))
2842 new_thread = follow_jumps (JUMP_LABEL (new_thread), insn,
2843 &crossing);
2844
2845 if (ANY_RETURN_P (new_thread))
2846 label = find_end_label (new_thread);
2847 else if (LABEL_P (new_thread))
2848 label = new_thread;
2849 else
2850 label = get_label_before (as_a <rtx_insn *> (new_thread),
2851 JUMP_LABEL (insn));
2852
2853 if (label)
2854 {
2855 reorg_redirect_jump (insn, label);
2856 if (crossing)
2857 CROSSING_JUMP_P (insn) = 1;
2858 }
2859 }
2860
2861 return delay_list;
2862 }
2863 \f
2864 /* Make another attempt to find insns to place in delay slots.
2865
2866 We previously looked for insns located in front of the delay insn
2867 and, for non-jump delay insns, located behind the delay insn.
2868
2869 Here only try to schedule jump insns and try to move insns from either
2870 the target or the following insns into the delay slot. If annulling is
2871 supported, we will be likely to do this. Otherwise, we can do this only
2872 if safe. */
2873
2874 static void
2875 fill_eager_delay_slots (void)
2876 {
2877 rtx_insn *insn;
2878 int i;
2879 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2880
2881 for (i = 0; i < num_unfilled_slots; i++)
2882 {
2883 rtx condition;
2884 rtx target_label, insn_at_target;
2885 rtx_insn *fallthrough_insn;
2886 rtx_insn_list *delay_list = 0;
2887 rtx_jump_insn *jump_insn;
2888 int own_target;
2889 int own_fallthrough;
2890 int prediction, slots_to_fill, slots_filled;
2891
2892 insn = unfilled_slots_base[i];
2893 if (insn == 0
2894 || insn->deleted ()
2895 || ! (jump_insn = dyn_cast <rtx_jump_insn *> (insn))
2896 || ! (condjump_p (jump_insn) || condjump_in_parallel_p (jump_insn)))
2897 continue;
2898
2899 slots_to_fill = num_delay_slots (jump_insn);
2900 /* Some machine description have defined instructions to have
2901 delay slots only in certain circumstances which may depend on
2902 nearby insns (which change due to reorg's actions).
2903
2904 For example, the PA port normally has delay slots for unconditional
2905 jumps.
2906
2907 However, the PA port claims such jumps do not have a delay slot
2908 if they are immediate successors of certain CALL_INSNs. This
2909 allows the port to favor filling the delay slot of the call with
2910 the unconditional jump. */
2911 if (slots_to_fill == 0)
2912 continue;
2913
2914 slots_filled = 0;
2915 target_label = JUMP_LABEL (jump_insn);
2916 condition = get_branch_condition (jump_insn, target_label);
2917
2918 if (condition == 0)
2919 continue;
2920
2921 /* Get the next active fallthrough and target insns and see if we own
2922 them. Then see whether the branch is likely true. We don't need
2923 to do a lot of this for unconditional branches. */
2924
2925 insn_at_target = first_active_target_insn (target_label);
2926 own_target = own_thread_p (target_label, target_label, 0);
2927
2928 if (condition == const_true_rtx)
2929 {
2930 own_fallthrough = 0;
2931 fallthrough_insn = 0;
2932 prediction = 2;
2933 }
2934 else
2935 {
2936 fallthrough_insn = next_active_insn (jump_insn);
2937 own_fallthrough = own_thread_p (NEXT_INSN (jump_insn), NULL_RTX, 1);
2938 prediction = mostly_true_jump (jump_insn);
2939 }
2940
2941 /* If this insn is expected to branch, first try to get insns from our
2942 target, then our fallthrough insns. If it is not expected to branch,
2943 try the other order. */
2944
2945 if (prediction > 0)
2946 {
2947 delay_list
2948 = fill_slots_from_thread (jump_insn, condition, insn_at_target,
2949 fallthrough_insn, prediction == 2, 1,
2950 own_target,
2951 slots_to_fill, &slots_filled, delay_list);
2952
2953 if (delay_list == 0 && own_fallthrough)
2954 {
2955 /* Even though we didn't find anything for delay slots,
2956 we might have found a redundant insn which we deleted
2957 from the thread that was filled. So we have to recompute
2958 the next insn at the target. */
2959 target_label = JUMP_LABEL (jump_insn);
2960 insn_at_target = first_active_target_insn (target_label);
2961
2962 delay_list
2963 = fill_slots_from_thread (jump_insn, condition,
2964 fallthrough_insn,
2965 insn_at_target, 0, 0,
2966 own_fallthrough,
2967 slots_to_fill, &slots_filled,
2968 delay_list);
2969 }
2970 }
2971 else
2972 {
2973 if (own_fallthrough)
2974 delay_list
2975 = fill_slots_from_thread (jump_insn, condition, fallthrough_insn,
2976 insn_at_target, 0, 0,
2977 own_fallthrough,
2978 slots_to_fill, &slots_filled,
2979 delay_list);
2980
2981 if (delay_list == 0)
2982 delay_list
2983 = fill_slots_from_thread (jump_insn, condition, insn_at_target,
2984 next_active_insn (insn), 0, 1,
2985 own_target,
2986 slots_to_fill, &slots_filled,
2987 delay_list);
2988 }
2989
2990 if (delay_list)
2991 unfilled_slots_base[i]
2992 = emit_delay_sequence (jump_insn, delay_list, slots_filled);
2993
2994 if (slots_to_fill == slots_filled)
2995 unfilled_slots_base[i] = 0;
2996
2997 note_delay_statistics (slots_filled, 1);
2998 }
2999 }
3000 \f
3001 static void delete_computation (rtx insn);
3002
3003 /* Recursively delete prior insns that compute the value (used only by INSN
3004 which the caller is deleting) stored in the register mentioned by NOTE
3005 which is a REG_DEAD note associated with INSN. */
3006
3007 static void
3008 delete_prior_computation (rtx note, rtx insn)
3009 {
3010 rtx our_prev;
3011 rtx reg = XEXP (note, 0);
3012
3013 for (our_prev = prev_nonnote_insn (insn);
3014 our_prev && (NONJUMP_INSN_P (our_prev)
3015 || CALL_P (our_prev));
3016 our_prev = prev_nonnote_insn (our_prev))
3017 {
3018 rtx pat = PATTERN (our_prev);
3019
3020 /* If we reach a CALL which is not calling a const function
3021 or the callee pops the arguments, then give up. */
3022 if (CALL_P (our_prev)
3023 && (! RTL_CONST_CALL_P (our_prev)
3024 || GET_CODE (pat) != SET || GET_CODE (SET_SRC (pat)) != CALL))
3025 break;
3026
3027 /* If we reach a SEQUENCE, it is too complex to try to
3028 do anything with it, so give up. We can be run during
3029 and after reorg, so SEQUENCE rtl can legitimately show
3030 up here. */
3031 if (GET_CODE (pat) == SEQUENCE)
3032 break;
3033
3034 if (GET_CODE (pat) == USE
3035 && NONJUMP_INSN_P (XEXP (pat, 0)))
3036 /* reorg creates USEs that look like this. We leave them
3037 alone because reorg needs them for its own purposes. */
3038 break;
3039
3040 if (reg_set_p (reg, pat))
3041 {
3042 if (side_effects_p (pat) && !CALL_P (our_prev))
3043 break;
3044
3045 if (GET_CODE (pat) == PARALLEL)
3046 {
3047 /* If we find a SET of something else, we can't
3048 delete the insn. */
3049
3050 int i;
3051
3052 for (i = 0; i < XVECLEN (pat, 0); i++)
3053 {
3054 rtx part = XVECEXP (pat, 0, i);
3055
3056 if (GET_CODE (part) == SET
3057 && SET_DEST (part) != reg)
3058 break;
3059 }
3060
3061 if (i == XVECLEN (pat, 0))
3062 delete_computation (our_prev);
3063 }
3064 else if (GET_CODE (pat) == SET
3065 && REG_P (SET_DEST (pat)))
3066 {
3067 int dest_regno = REGNO (SET_DEST (pat));
3068 int dest_endregno = END_REGNO (SET_DEST (pat));
3069 int regno = REGNO (reg);
3070 int endregno = END_REGNO (reg);
3071
3072 if (dest_regno >= regno
3073 && dest_endregno <= endregno)
3074 delete_computation (our_prev);
3075
3076 /* We may have a multi-word hard register and some, but not
3077 all, of the words of the register are needed in subsequent
3078 insns. Write REG_UNUSED notes for those parts that were not
3079 needed. */
3080 else if (dest_regno <= regno
3081 && dest_endregno >= endregno)
3082 {
3083 int i;
3084
3085 add_reg_note (our_prev, REG_UNUSED, reg);
3086
3087 for (i = dest_regno; i < dest_endregno; i++)
3088 if (! find_regno_note (our_prev, REG_UNUSED, i))
3089 break;
3090
3091 if (i == dest_endregno)
3092 delete_computation (our_prev);
3093 }
3094 }
3095
3096 break;
3097 }
3098
3099 /* If PAT references the register that dies here, it is an
3100 additional use. Hence any prior SET isn't dead. However, this
3101 insn becomes the new place for the REG_DEAD note. */
3102 if (reg_overlap_mentioned_p (reg, pat))
3103 {
3104 XEXP (note, 1) = REG_NOTES (our_prev);
3105 REG_NOTES (our_prev) = note;
3106 break;
3107 }
3108 }
3109 }
3110
3111 /* Delete INSN and recursively delete insns that compute values used only
3112 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3113
3114 Look at all our REG_DEAD notes. If a previous insn does nothing other
3115 than set a register that dies in this insn, we can delete that insn
3116 as well.
3117
3118 On machines with CC0, if CC0 is used in this insn, we may be able to
3119 delete the insn that set it. */
3120
3121 static void
3122 delete_computation (rtx insn)
3123 {
3124 rtx note, next;
3125
3126 if (HAVE_cc0 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
3127 {
3128 rtx_insn *prev = prev_nonnote_insn (insn);
3129 /* We assume that at this stage
3130 CC's are always set explicitly
3131 and always immediately before the jump that
3132 will use them. So if the previous insn
3133 exists to set the CC's, delete it
3134 (unless it performs auto-increments, etc.). */
3135 if (prev && NONJUMP_INSN_P (prev)
3136 && sets_cc0_p (PATTERN (prev)))
3137 {
3138 if (sets_cc0_p (PATTERN (prev)) > 0
3139 && ! side_effects_p (PATTERN (prev)))
3140 delete_computation (prev);
3141 else
3142 /* Otherwise, show that cc0 won't be used. */
3143 add_reg_note (prev, REG_UNUSED, cc0_rtx);
3144 }
3145 }
3146
3147 for (note = REG_NOTES (insn); note; note = next)
3148 {
3149 next = XEXP (note, 1);
3150
3151 if (REG_NOTE_KIND (note) != REG_DEAD
3152 /* Verify that the REG_NOTE is legitimate. */
3153 || !REG_P (XEXP (note, 0)))
3154 continue;
3155
3156 delete_prior_computation (note, insn);
3157 }
3158
3159 delete_related_insns (insn);
3160 }
3161
3162 /* If all INSN does is set the pc, delete it,
3163 and delete the insn that set the condition codes for it
3164 if that's what the previous thing was. */
3165
3166 static void
3167 delete_jump (rtx_insn *insn)
3168 {
3169 rtx set = single_set (insn);
3170
3171 if (set && GET_CODE (SET_DEST (set)) == PC)
3172 delete_computation (insn);
3173 }
3174
3175 static rtx_insn *
3176 label_before_next_insn (rtx x, rtx scan_limit)
3177 {
3178 rtx_insn *insn = next_active_insn (x);
3179 while (insn)
3180 {
3181 insn = PREV_INSN (insn);
3182 if (insn == scan_limit || insn == NULL_RTX)
3183 return NULL;
3184 if (LABEL_P (insn))
3185 break;
3186 }
3187 return insn;
3188 }
3189
3190 /* Return TRUE if there is a NOTE_INSN_SWITCH_TEXT_SECTIONS note in between
3191 BEG and END. */
3192
3193 static bool
3194 switch_text_sections_between_p (const rtx_insn *beg, const rtx_insn *end)
3195 {
3196 const rtx_insn *p;
3197 for (p = beg; p != end; p = NEXT_INSN (p))
3198 if (NOTE_P (p) && NOTE_KIND (p) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
3199 return true;
3200 return false;
3201 }
3202
3203 \f
3204 /* Once we have tried two ways to fill a delay slot, make a pass over the
3205 code to try to improve the results and to do such things as more jump
3206 threading. */
3207
3208 static void
3209 relax_delay_slots (rtx_insn *first)
3210 {
3211 rtx_insn *insn, *next;
3212 rtx_sequence *pat;
3213 rtx trial;
3214 rtx_insn *delay_insn;
3215 rtx target_label;
3216
3217 /* Look at every JUMP_INSN and see if we can improve it. */
3218 for (insn = first; insn; insn = next)
3219 {
3220 rtx_insn *other;
3221 bool crossing;
3222
3223 next = next_active_insn (insn);
3224
3225 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3226 the next insn, or jumps to a label that is not the last of a
3227 group of consecutive labels. */
3228 if (is_a <rtx_jump_insn *> (insn)
3229 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3230 && !ANY_RETURN_P (target_label = JUMP_LABEL (insn)))
3231 {
3232 rtx_jump_insn *jump_insn = as_a <rtx_jump_insn *> (insn);
3233 target_label
3234 = skip_consecutive_labels (follow_jumps (target_label, jump_insn,
3235 &crossing));
3236 if (ANY_RETURN_P (target_label))
3237 target_label = find_end_label (target_label);
3238
3239 if (target_label && next_active_insn (target_label) == next
3240 && ! condjump_in_parallel_p (jump_insn)
3241 && ! (next && switch_text_sections_between_p (jump_insn, next)))
3242 {
3243 delete_jump (jump_insn);
3244 continue;
3245 }
3246
3247 if (target_label && target_label != JUMP_LABEL (jump_insn))
3248 {
3249 reorg_redirect_jump (jump_insn, target_label);
3250 if (crossing)
3251 CROSSING_JUMP_P (jump_insn) = 1;
3252 }
3253
3254 /* See if this jump conditionally branches around an unconditional
3255 jump. If so, invert this jump and point it to the target of the
3256 second jump. Check if it's possible on the target. */
3257 if (next && simplejump_or_return_p (next)
3258 && any_condjump_p (jump_insn)
3259 && target_label
3260 && next_active_insn (target_label) == next_active_insn (next)
3261 && no_labels_between_p (jump_insn, next)
3262 && targetm.can_follow_jump (jump_insn, next))
3263 {
3264 rtx label = JUMP_LABEL (next);
3265
3266 /* Be careful how we do this to avoid deleting code or
3267 labels that are momentarily dead. See similar optimization
3268 in jump.c.
3269
3270 We also need to ensure we properly handle the case when
3271 invert_jump fails. */
3272
3273 ++LABEL_NUSES (target_label);
3274 if (!ANY_RETURN_P (label))
3275 ++LABEL_NUSES (label);
3276
3277 if (invert_jump (jump_insn, label, 1))
3278 {
3279 delete_related_insns (next);
3280 next = jump_insn;
3281 }
3282
3283 if (!ANY_RETURN_P (label))
3284 --LABEL_NUSES (label);
3285
3286 if (--LABEL_NUSES (target_label) == 0)
3287 delete_related_insns (target_label);
3288
3289 continue;
3290 }
3291 }
3292
3293 /* If this is an unconditional jump and the previous insn is a
3294 conditional jump, try reversing the condition of the previous
3295 insn and swapping our targets. The next pass might be able to
3296 fill the slots.
3297
3298 Don't do this if we expect the conditional branch to be true, because
3299 we would then be making the more common case longer. */
3300
3301 if (simplejump_or_return_p (insn)
3302 && (other = prev_active_insn (insn)) != 0
3303 && any_condjump_p (other)
3304 && no_labels_between_p (other, insn)
3305 && 0 > mostly_true_jump (other))
3306 {
3307 rtx other_target = JUMP_LABEL (other);
3308 target_label = JUMP_LABEL (insn);
3309
3310 if (invert_jump (as_a <rtx_jump_insn *> (other), target_label, 0))
3311 reorg_redirect_jump (as_a <rtx_jump_insn *> (insn), other_target);
3312 }
3313
3314 /* Now look only at cases where we have a filled delay slot. */
3315 if (!NONJUMP_INSN_P (insn) || GET_CODE (PATTERN (insn)) != SEQUENCE)
3316 continue;
3317
3318 pat = as_a <rtx_sequence *> (PATTERN (insn));
3319 delay_insn = pat->insn (0);
3320
3321 /* See if the first insn in the delay slot is redundant with some
3322 previous insn. Remove it from the delay slot if so; then set up
3323 to reprocess this insn. */
3324 if (redundant_insn (pat->insn (1), delay_insn, 0))
3325 {
3326 update_block (pat->insn (1), insn);
3327 delete_from_delay_slot (pat->insn (1));
3328 next = prev_active_insn (next);
3329 continue;
3330 }
3331
3332 /* See if we have a RETURN insn with a filled delay slot followed
3333 by a RETURN insn with an unfilled a delay slot. If so, we can delete
3334 the first RETURN (but not its delay insn). This gives the same
3335 effect in fewer instructions.
3336
3337 Only do so if optimizing for size since this results in slower, but
3338 smaller code. */
3339 if (optimize_function_for_size_p (cfun)
3340 && ANY_RETURN_P (PATTERN (delay_insn))
3341 && next
3342 && JUMP_P (next)
3343 && PATTERN (next) == PATTERN (delay_insn))
3344 {
3345 rtx_insn *after;
3346 int i;
3347
3348 /* Delete the RETURN and just execute the delay list insns.
3349
3350 We do this by deleting the INSN containing the SEQUENCE, then
3351 re-emitting the insns separately, and then deleting the RETURN.
3352 This allows the count of the jump target to be properly
3353 decremented.
3354
3355 Note that we need to change the INSN_UID of the re-emitted insns
3356 since it is used to hash the insns for mark_target_live_regs and
3357 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3358
3359 Clear the from target bit, since these insns are no longer
3360 in delay slots. */
3361 for (i = 0; i < XVECLEN (pat, 0); i++)
3362 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3363
3364 trial = PREV_INSN (insn);
3365 delete_related_insns (insn);
3366 gcc_assert (GET_CODE (pat) == SEQUENCE);
3367 add_insn_after (delay_insn, trial, NULL);
3368 after = delay_insn;
3369 for (i = 1; i < pat->len (); i++)
3370 after = emit_copy_of_insn_after (pat->insn (i), after);
3371 delete_scheduled_jump (delay_insn);
3372 continue;
3373 }
3374
3375 /* Now look only at the cases where we have a filled JUMP_INSN. */
3376 rtx_jump_insn *delay_jump_insn =
3377 dyn_cast <rtx_jump_insn *> (delay_insn);
3378 if (! delay_jump_insn || !(condjump_p (delay_jump_insn)
3379 || condjump_in_parallel_p (delay_jump_insn)))
3380 continue;
3381
3382 target_label = JUMP_LABEL (delay_jump_insn);
3383 if (target_label && ANY_RETURN_P (target_label))
3384 continue;
3385
3386 /* If this jump goes to another unconditional jump, thread it, but
3387 don't convert a jump into a RETURN here. */
3388 trial = skip_consecutive_labels (follow_jumps (target_label,
3389 delay_jump_insn,
3390 &crossing));
3391 if (ANY_RETURN_P (trial))
3392 trial = find_end_label (trial);
3393
3394 if (trial && trial != target_label
3395 && redirect_with_delay_slots_safe_p (delay_jump_insn, trial, insn))
3396 {
3397 reorg_redirect_jump (delay_jump_insn, trial);
3398 target_label = trial;
3399 if (crossing)
3400 CROSSING_JUMP_P (insn) = 1;
3401 }
3402
3403 /* If the first insn at TARGET_LABEL is redundant with a previous
3404 insn, redirect the jump to the following insn and process again.
3405 We use next_real_insn instead of next_active_insn so we
3406 don't skip USE-markers, or we'll end up with incorrect
3407 liveness info. */
3408 trial = next_real_insn (target_label);
3409 if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE
3410 && redundant_insn (trial, insn, 0)
3411 && ! can_throw_internal (trial))
3412 {
3413 /* Figure out where to emit the special USE insn so we don't
3414 later incorrectly compute register live/death info. */
3415 rtx_insn *tmp = next_active_insn (trial);
3416 if (tmp == 0)
3417 tmp = find_end_label (simple_return_rtx);
3418
3419 if (tmp)
3420 {
3421 /* Insert the special USE insn and update dataflow info.
3422 We know "trial" is an insn here as it is the output of
3423 next_real_insn () above. */
3424 update_block (as_a <rtx_insn *> (trial), tmp);
3425
3426 /* Now emit a label before the special USE insn, and
3427 redirect our jump to the new label. */
3428 target_label = get_label_before (PREV_INSN (tmp), target_label);
3429 reorg_redirect_jump (delay_jump_insn, target_label);
3430 next = insn;
3431 continue;
3432 }
3433 }
3434
3435 /* Similarly, if it is an unconditional jump with one insn in its
3436 delay list and that insn is redundant, thread the jump. */
3437 rtx_sequence *trial_seq =
3438 trial ? dyn_cast <rtx_sequence *> (PATTERN (trial)) : NULL;
3439 if (trial_seq
3440 && trial_seq->len () == 2
3441 && JUMP_P (trial_seq->insn (0))
3442 && simplejump_or_return_p (trial_seq->insn (0))
3443 && redundant_insn (trial_seq->insn (1), insn, 0))
3444 {
3445 target_label = JUMP_LABEL (trial_seq->insn (0));
3446 if (ANY_RETURN_P (target_label))
3447 target_label = find_end_label (target_label);
3448
3449 if (target_label
3450 && redirect_with_delay_slots_safe_p (delay_jump_insn,
3451 target_label, insn))
3452 {
3453 update_block (trial_seq->insn (1), insn);
3454 reorg_redirect_jump (delay_jump_insn, target_label);
3455 next = insn;
3456 continue;
3457 }
3458 }
3459
3460 /* See if we have a simple (conditional) jump that is useless. */
3461 if (! INSN_ANNULLED_BRANCH_P (delay_jump_insn)
3462 && ! condjump_in_parallel_p (delay_jump_insn)
3463 && prev_active_insn (target_label) == insn
3464 && ! BARRIER_P (prev_nonnote_insn (target_label))
3465 #if HAVE_cc0
3466 /* If the last insn in the delay slot sets CC0 for some insn,
3467 various code assumes that it is in a delay slot. We could
3468 put it back where it belonged and delete the register notes,
3469 but it doesn't seem worthwhile in this uncommon case. */
3470 && ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1),
3471 REG_CC_USER, NULL_RTX)
3472 #endif
3473 )
3474 {
3475 rtx_insn *after;
3476 int i;
3477
3478 /* All this insn does is execute its delay list and jump to the
3479 following insn. So delete the jump and just execute the delay
3480 list insns.
3481
3482 We do this by deleting the INSN containing the SEQUENCE, then
3483 re-emitting the insns separately, and then deleting the jump.
3484 This allows the count of the jump target to be properly
3485 decremented.
3486
3487 Note that we need to change the INSN_UID of the re-emitted insns
3488 since it is used to hash the insns for mark_target_live_regs and
3489 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3490
3491 Clear the from target bit, since these insns are no longer
3492 in delay slots. */
3493 for (i = 0; i < XVECLEN (pat, 0); i++)
3494 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3495
3496 trial = PREV_INSN (insn);
3497 delete_related_insns (insn);
3498 gcc_assert (GET_CODE (pat) == SEQUENCE);
3499 add_insn_after (delay_jump_insn, trial, NULL);
3500 after = delay_jump_insn;
3501 for (i = 1; i < pat->len (); i++)
3502 after = emit_copy_of_insn_after (pat->insn (i), after);
3503 delete_scheduled_jump (delay_jump_insn);
3504 continue;
3505 }
3506
3507 /* See if this is an unconditional jump around a single insn which is
3508 identical to the one in its delay slot. In this case, we can just
3509 delete the branch and the insn in its delay slot. */
3510 if (next && NONJUMP_INSN_P (next)
3511 && label_before_next_insn (next, insn) == target_label
3512 && simplejump_p (insn)
3513 && XVECLEN (pat, 0) == 2
3514 && rtx_equal_p (PATTERN (next), PATTERN (pat->insn (1))))
3515 {
3516 delete_related_insns (insn);
3517 continue;
3518 }
3519
3520 /* See if this jump (with its delay slots) conditionally branches
3521 around an unconditional jump (without delay slots). If so, invert
3522 this jump and point it to the target of the second jump. We cannot
3523 do this for annulled jumps, though. Again, don't convert a jump to
3524 a RETURN here. */
3525 if (! INSN_ANNULLED_BRANCH_P (delay_jump_insn)
3526 && any_condjump_p (delay_jump_insn)
3527 && next && simplejump_or_return_p (next)
3528 && next_active_insn (target_label) == next_active_insn (next)
3529 && no_labels_between_p (insn, next))
3530 {
3531 rtx label = JUMP_LABEL (next);
3532 rtx old_label = JUMP_LABEL (delay_jump_insn);
3533
3534 if (ANY_RETURN_P (label))
3535 label = find_end_label (label);
3536
3537 /* find_end_label can generate a new label. Check this first. */
3538 if (label
3539 && no_labels_between_p (insn, next)
3540 && redirect_with_delay_slots_safe_p (delay_jump_insn,
3541 label, insn))
3542 {
3543 /* Be careful how we do this to avoid deleting code or labels
3544 that are momentarily dead. See similar optimization in
3545 jump.c */
3546 if (old_label)
3547 ++LABEL_NUSES (old_label);
3548
3549 if (invert_jump (delay_jump_insn, label, 1))
3550 {
3551 int i;
3552
3553 /* Must update the INSN_FROM_TARGET_P bits now that
3554 the branch is reversed, so that mark_target_live_regs
3555 will handle the delay slot insn correctly. */
3556 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
3557 {
3558 rtx slot = XVECEXP (PATTERN (insn), 0, i);
3559 INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot);
3560 }
3561
3562 delete_related_insns (next);
3563 next = insn;
3564 }
3565
3566 if (old_label && --LABEL_NUSES (old_label) == 0)
3567 delete_related_insns (old_label);
3568 continue;
3569 }
3570 }
3571
3572 /* If we own the thread opposite the way this insn branches, see if we
3573 can merge its delay slots with following insns. */
3574 if (INSN_FROM_TARGET_P (pat->insn (1))
3575 && own_thread_p (NEXT_INSN (insn), 0, 1))
3576 try_merge_delay_insns (insn, next);
3577 else if (! INSN_FROM_TARGET_P (pat->insn (1))
3578 && own_thread_p (target_label, target_label, 0))
3579 try_merge_delay_insns (insn, next_active_insn (target_label));
3580
3581 /* If we get here, we haven't deleted INSN. But we may have deleted
3582 NEXT, so recompute it. */
3583 next = next_active_insn (insn);
3584 }
3585 }
3586 \f
3587
3588 /* Look for filled jumps to the end of function label. We can try to convert
3589 them into RETURN insns if the insns in the delay slot are valid for the
3590 RETURN as well. */
3591
3592 static void
3593 make_return_insns (rtx_insn *first)
3594 {
3595 rtx_insn *insn;
3596 rtx_jump_insn *jump_insn;
3597 rtx real_return_label = function_return_label;
3598 rtx real_simple_return_label = function_simple_return_label;
3599 int slots, i;
3600
3601 /* See if there is a RETURN insn in the function other than the one we
3602 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3603 into a RETURN to jump to it. */
3604 for (insn = first; insn; insn = NEXT_INSN (insn))
3605 if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn)))
3606 {
3607 rtx t = get_label_before (insn, NULL_RTX);
3608 if (PATTERN (insn) == ret_rtx)
3609 real_return_label = t;
3610 else
3611 real_simple_return_label = t;
3612 break;
3613 }
3614
3615 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3616 was equal to END_OF_FUNCTION_LABEL. */
3617 if (real_return_label)
3618 LABEL_NUSES (real_return_label)++;
3619 if (real_simple_return_label)
3620 LABEL_NUSES (real_simple_return_label)++;
3621
3622 /* Clear the list of insns to fill so we can use it. */
3623 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3624
3625 for (insn = first; insn; insn = NEXT_INSN (insn))
3626 {
3627 int flags;
3628 rtx kind, real_label;
3629
3630 /* Only look at filled JUMP_INSNs that go to the end of function
3631 label. */
3632 if (!NONJUMP_INSN_P (insn))
3633 continue;
3634
3635 if (GET_CODE (PATTERN (insn)) != SEQUENCE)
3636 continue;
3637
3638 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (insn));
3639
3640 if (!jump_to_label_p (pat->insn (0)))
3641 continue;
3642
3643 if (JUMP_LABEL (pat->insn (0)) == function_return_label)
3644 {
3645 kind = ret_rtx;
3646 real_label = real_return_label;
3647 }
3648 else if (JUMP_LABEL (pat->insn (0)) == function_simple_return_label)
3649 {
3650 kind = simple_return_rtx;
3651 real_label = real_simple_return_label;
3652 }
3653 else
3654 continue;
3655
3656 jump_insn = as_a <rtx_jump_insn *> (pat->insn (0));
3657
3658 /* If we can't make the jump into a RETURN, try to redirect it to the best
3659 RETURN and go on to the next insn. */
3660 if (!reorg_redirect_jump (jump_insn, kind))
3661 {
3662 /* Make sure redirecting the jump will not invalidate the delay
3663 slot insns. */
3664 if (redirect_with_delay_slots_safe_p (jump_insn, real_label, insn))
3665 reorg_redirect_jump (jump_insn, real_label);
3666 continue;
3667 }
3668
3669 /* See if this RETURN can accept the insns current in its delay slot.
3670 It can if it has more or an equal number of slots and the contents
3671 of each is valid. */
3672
3673 flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn));
3674 slots = num_delay_slots (jump_insn);
3675 if (slots >= XVECLEN (pat, 0) - 1)
3676 {
3677 for (i = 1; i < XVECLEN (pat, 0); i++)
3678 if (! (
3679 #ifdef ANNUL_IFFALSE_SLOTS
3680 (INSN_ANNULLED_BRANCH_P (jump_insn)
3681 && INSN_FROM_TARGET_P (pat->insn (i)))
3682 ? eligible_for_annul_false (jump_insn, i - 1,
3683 pat->insn (i), flags) :
3684 #endif
3685 #ifdef ANNUL_IFTRUE_SLOTS
3686 (INSN_ANNULLED_BRANCH_P (jump_insn)
3687 && ! INSN_FROM_TARGET_P (pat->insn (i)))
3688 ? eligible_for_annul_true (jump_insn, i - 1,
3689 pat->insn (i), flags) :
3690 #endif
3691 eligible_for_delay (jump_insn, i - 1,
3692 pat->insn (i), flags)))
3693 break;
3694 }
3695 else
3696 i = 0;
3697
3698 if (i == XVECLEN (pat, 0))
3699 continue;
3700
3701 /* We have to do something with this insn. If it is an unconditional
3702 RETURN, delete the SEQUENCE and output the individual insns,
3703 followed by the RETURN. Then set things up so we try to find
3704 insns for its delay slots, if it needs some. */
3705 if (ANY_RETURN_P (PATTERN (jump_insn)))
3706 {
3707 rtx_insn *prev = PREV_INSN (insn);
3708
3709 delete_related_insns (insn);
3710 for (i = 1; i < XVECLEN (pat, 0); i++)
3711 prev = emit_insn_after (PATTERN (XVECEXP (pat, 0, i)), prev);
3712
3713 insn = emit_jump_insn_after (PATTERN (jump_insn), prev);
3714 emit_barrier_after (insn);
3715
3716 if (slots)
3717 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3718 }
3719 else
3720 /* It is probably more efficient to keep this with its current
3721 delay slot as a branch to a RETURN. */
3722 reorg_redirect_jump (jump_insn, real_label);
3723 }
3724
3725 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3726 new delay slots we have created. */
3727 if (real_return_label != NULL_RTX && --LABEL_NUSES (real_return_label) == 0)
3728 delete_related_insns (real_return_label);
3729 if (real_simple_return_label != NULL_RTX
3730 && --LABEL_NUSES (real_simple_return_label) == 0)
3731 delete_related_insns (real_simple_return_label);
3732
3733 fill_simple_delay_slots (1);
3734 fill_simple_delay_slots (0);
3735 }
3736 \f
3737 /* Try to find insns to place in delay slots. */
3738
3739 static void
3740 dbr_schedule (rtx_insn *first)
3741 {
3742 rtx_insn *insn, *next, *epilogue_insn = 0;
3743 int i;
3744 bool need_return_insns;
3745
3746 /* If the current function has no insns other than the prologue and
3747 epilogue, then do not try to fill any delay slots. */
3748 if (n_basic_blocks_for_fn (cfun) == NUM_FIXED_BLOCKS)
3749 return;
3750
3751 /* Find the highest INSN_UID and allocate and initialize our map from
3752 INSN_UID's to position in code. */
3753 for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn))
3754 {
3755 if (INSN_UID (insn) > max_uid)
3756 max_uid = INSN_UID (insn);
3757 if (NOTE_P (insn)
3758 && NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG)
3759 epilogue_insn = insn;
3760 }
3761
3762 uid_to_ruid = XNEWVEC (int, max_uid + 1);
3763 for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn))
3764 uid_to_ruid[INSN_UID (insn)] = i;
3765
3766 /* Initialize the list of insns that need filling. */
3767 if (unfilled_firstobj == 0)
3768 {
3769 gcc_obstack_init (&unfilled_slots_obstack);
3770 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3771 }
3772
3773 for (insn = next_active_insn (first); insn; insn = next_active_insn (insn))
3774 {
3775 rtx target;
3776
3777 /* Skip vector tables. We can't get attributes for them. */
3778 if (JUMP_TABLE_DATA_P (insn))
3779 continue;
3780
3781 if (JUMP_P (insn))
3782 INSN_ANNULLED_BRANCH_P (insn) = 0;
3783 INSN_FROM_TARGET_P (insn) = 0;
3784
3785 if (num_delay_slots (insn) > 0)
3786 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3787
3788 /* Ensure all jumps go to the last of a set of consecutive labels. */
3789 if (JUMP_P (insn)
3790 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3791 && !ANY_RETURN_P (JUMP_LABEL (insn))
3792 && ((target = skip_consecutive_labels (JUMP_LABEL (insn)))
3793 != JUMP_LABEL (insn)))
3794 redirect_jump (as_a <rtx_jump_insn *> (insn), target, 1);
3795 }
3796
3797 init_resource_info (epilogue_insn);
3798
3799 /* Show we haven't computed an end-of-function label yet. */
3800 function_return_label = function_simple_return_label = NULL;
3801
3802 /* Initialize the statistics for this function. */
3803 memset (num_insns_needing_delays, 0, sizeof num_insns_needing_delays);
3804 memset (num_filled_delays, 0, sizeof num_filled_delays);
3805
3806 /* Now do the delay slot filling. Try everything twice in case earlier
3807 changes make more slots fillable. */
3808
3809 for (reorg_pass_number = 0;
3810 reorg_pass_number < MAX_REORG_PASSES;
3811 reorg_pass_number++)
3812 {
3813 fill_simple_delay_slots (1);
3814 fill_simple_delay_slots (0);
3815 fill_eager_delay_slots ();
3816 relax_delay_slots (first);
3817 }
3818
3819 /* If we made an end of function label, indicate that it is now
3820 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
3821 If it is now unused, delete it. */
3822 if (function_return_label && --LABEL_NUSES (function_return_label) == 0)
3823 delete_related_insns (function_return_label);
3824 if (function_simple_return_label
3825 && --LABEL_NUSES (function_simple_return_label) == 0)
3826 delete_related_insns (function_simple_return_label);
3827
3828 need_return_insns = false;
3829 need_return_insns |= HAVE_return && function_return_label != 0;
3830 need_return_insns |= HAVE_simple_return && function_simple_return_label != 0;
3831 if (need_return_insns)
3832 make_return_insns (first);
3833
3834 /* Delete any USE insns made by update_block; subsequent passes don't need
3835 them or know how to deal with them. */
3836 for (insn = first; insn; insn = next)
3837 {
3838 next = NEXT_INSN (insn);
3839
3840 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
3841 && INSN_P (XEXP (PATTERN (insn), 0)))
3842 next = delete_related_insns (insn);
3843 }
3844
3845 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3846
3847 /* It is not clear why the line below is needed, but it does seem to be. */
3848 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3849
3850 if (dump_file)
3851 {
3852 int i, j, need_comma;
3853 int total_delay_slots[MAX_DELAY_HISTOGRAM + 1];
3854 int total_annul_slots[MAX_DELAY_HISTOGRAM + 1];
3855
3856 for (reorg_pass_number = 0;
3857 reorg_pass_number < MAX_REORG_PASSES;
3858 reorg_pass_number++)
3859 {
3860 fprintf (dump_file, ";; Reorg pass #%d:\n", reorg_pass_number + 1);
3861 for (i = 0; i < NUM_REORG_FUNCTIONS; i++)
3862 {
3863 need_comma = 0;
3864 fprintf (dump_file, ";; Reorg function #%d\n", i);
3865
3866 fprintf (dump_file, ";; %d insns needing delay slots\n;; ",
3867 num_insns_needing_delays[i][reorg_pass_number]);
3868
3869 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3870 if (num_filled_delays[i][j][reorg_pass_number])
3871 {
3872 if (need_comma)
3873 fprintf (dump_file, ", ");
3874 need_comma = 1;
3875 fprintf (dump_file, "%d got %d delays",
3876 num_filled_delays[i][j][reorg_pass_number], j);
3877 }
3878 fprintf (dump_file, "\n");
3879 }
3880 }
3881 memset (total_delay_slots, 0, sizeof total_delay_slots);
3882 memset (total_annul_slots, 0, sizeof total_annul_slots);
3883 for (insn = first; insn; insn = NEXT_INSN (insn))
3884 {
3885 if (! insn->deleted ()
3886 && NONJUMP_INSN_P (insn)
3887 && GET_CODE (PATTERN (insn)) != USE
3888 && GET_CODE (PATTERN (insn)) != CLOBBER)
3889 {
3890 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
3891 {
3892 rtx control;
3893 j = XVECLEN (PATTERN (insn), 0) - 1;
3894 if (j > MAX_DELAY_HISTOGRAM)
3895 j = MAX_DELAY_HISTOGRAM;
3896 control = XVECEXP (PATTERN (insn), 0, 0);
3897 if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control))
3898 total_annul_slots[j]++;
3899 else
3900 total_delay_slots[j]++;
3901 }
3902 else if (num_delay_slots (insn) > 0)
3903 total_delay_slots[0]++;
3904 }
3905 }
3906 fprintf (dump_file, ";; Reorg totals: ");
3907 need_comma = 0;
3908 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3909 {
3910 if (total_delay_slots[j])
3911 {
3912 if (need_comma)
3913 fprintf (dump_file, ", ");
3914 need_comma = 1;
3915 fprintf (dump_file, "%d got %d delays", total_delay_slots[j], j);
3916 }
3917 }
3918 fprintf (dump_file, "\n");
3919 #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
3920 fprintf (dump_file, ";; Reorg annuls: ");
3921 need_comma = 0;
3922 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3923 {
3924 if (total_annul_slots[j])
3925 {
3926 if (need_comma)
3927 fprintf (dump_file, ", ");
3928 need_comma = 1;
3929 fprintf (dump_file, "%d got %d delays", total_annul_slots[j], j);
3930 }
3931 }
3932 fprintf (dump_file, "\n");
3933 #endif
3934 fprintf (dump_file, "\n");
3935 }
3936
3937 if (!sibling_labels.is_empty ())
3938 {
3939 update_alignments (sibling_labels);
3940 sibling_labels.release ();
3941 }
3942
3943 free_resource_info ();
3944 free (uid_to_ruid);
3945 crtl->dbr_scheduled_p = true;
3946 }
3947 #endif /* DELAY_SLOTS */
3948 \f
3949 /* Run delay slot optimization. */
3950 static unsigned int
3951 rest_of_handle_delay_slots (void)
3952 {
3953 #ifdef DELAY_SLOTS
3954 dbr_schedule (get_insns ());
3955 #endif
3956 return 0;
3957 }
3958
3959 namespace {
3960
3961 const pass_data pass_data_delay_slots =
3962 {
3963 RTL_PASS, /* type */
3964 "dbr", /* name */
3965 OPTGROUP_NONE, /* optinfo_flags */
3966 TV_DBR_SCHED, /* tv_id */
3967 0, /* properties_required */
3968 0, /* properties_provided */
3969 0, /* properties_destroyed */
3970 0, /* todo_flags_start */
3971 0, /* todo_flags_finish */
3972 };
3973
3974 class pass_delay_slots : public rtl_opt_pass
3975 {
3976 public:
3977 pass_delay_slots (gcc::context *ctxt)
3978 : rtl_opt_pass (pass_data_delay_slots, ctxt)
3979 {}
3980
3981 /* opt_pass methods: */
3982 virtual bool gate (function *);
3983 virtual unsigned int execute (function *)
3984 {
3985 return rest_of_handle_delay_slots ();
3986 }
3987
3988 }; // class pass_delay_slots
3989
3990 bool
3991 pass_delay_slots::gate (function *)
3992 {
3993 #ifdef DELAY_SLOTS
3994 /* At -O0 dataflow info isn't updated after RA. */
3995 return optimize > 0 && flag_delayed_branch && !crtl->dbr_scheduled_p;
3996 #else
3997 return 0;
3998 #endif
3999 }
4000
4001 } // anon namespace
4002
4003 rtl_opt_pass *
4004 make_pass_delay_slots (gcc::context *ctxt)
4005 {
4006 return new pass_delay_slots (ctxt);
4007 }
4008
4009 /* Machine dependent reorg pass. */
4010
4011 namespace {
4012
4013 const pass_data pass_data_machine_reorg =
4014 {
4015 RTL_PASS, /* type */
4016 "mach", /* name */
4017 OPTGROUP_NONE, /* optinfo_flags */
4018 TV_MACH_DEP, /* tv_id */
4019 0, /* properties_required */
4020 0, /* properties_provided */
4021 0, /* properties_destroyed */
4022 0, /* todo_flags_start */
4023 0, /* todo_flags_finish */
4024 };
4025
4026 class pass_machine_reorg : public rtl_opt_pass
4027 {
4028 public:
4029 pass_machine_reorg (gcc::context *ctxt)
4030 : rtl_opt_pass (pass_data_machine_reorg, ctxt)
4031 {}
4032
4033 /* opt_pass methods: */
4034 virtual bool gate (function *)
4035 {
4036 return targetm.machine_dependent_reorg != 0;
4037 }
4038
4039 virtual unsigned int execute (function *)
4040 {
4041 targetm.machine_dependent_reorg ();
4042 return 0;
4043 }
4044
4045 }; // class pass_machine_reorg
4046
4047 } // anon namespace
4048
4049 rtl_opt_pass *
4050 make_pass_machine_reorg (gcc::context *ctxt)
4051 {
4052 return new pass_machine_reorg (ctxt);
4053 }