add default for INSN_REFERENCES_ARE_DELAYED
[gcc.git] / gcc / reorg.c
1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992-2015 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
4 Hacked by Michael Tiemann (tiemann@cygnus.com).
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 /* Instruction reorganization pass.
23
24 This pass runs after register allocation and final jump
25 optimization. It should be the last pass to run before peephole.
26 It serves primarily to fill delay slots of insns, typically branch
27 and call insns. Other insns typically involve more complicated
28 interactions of data dependencies and resource constraints, and
29 are better handled by scheduling before register allocation (by the
30 function `schedule_insns').
31
32 The Branch Penalty is the number of extra cycles that are needed to
33 execute a branch insn. On an ideal machine, branches take a single
34 cycle, and the Branch Penalty is 0. Several RISC machines approach
35 branch delays differently:
36
37 The MIPS has a single branch delay slot. Most insns
38 (except other branches) can be used to fill this slot. When the
39 slot is filled, two insns execute in two cycles, reducing the
40 branch penalty to zero.
41
42 The SPARC always has a branch delay slot, but its effects can be
43 annulled when the branch is not taken. This means that failing to
44 find other sources of insns, we can hoist an insn from the branch
45 target that would only be safe to execute knowing that the branch
46 is taken.
47
48 The HP-PA always has a branch delay slot. For unconditional branches
49 its effects can be annulled when the branch is taken. The effects
50 of the delay slot in a conditional branch can be nullified for forward
51 taken branches, or for untaken backward branches. This means
52 we can hoist insns from the fall-through path for forward branches or
53 steal insns from the target of backward branches.
54
55 The TMS320C3x and C4x have three branch delay slots. When the three
56 slots are filled, the branch penalty is zero. Most insns can fill the
57 delay slots except jump insns.
58
59 Three techniques for filling delay slots have been implemented so far:
60
61 (1) `fill_simple_delay_slots' is the simplest, most efficient way
62 to fill delay slots. This pass first looks for insns which come
63 from before the branch and which are safe to execute after the
64 branch. Then it searches after the insn requiring delay slots or,
65 in the case of a branch, for insns that are after the point at
66 which the branch merges into the fallthrough code, if such a point
67 exists. When such insns are found, the branch penalty decreases
68 and no code expansion takes place.
69
70 (2) `fill_eager_delay_slots' is more complicated: it is used for
71 scheduling conditional jumps, or for scheduling jumps which cannot
72 be filled using (1). A machine need not have annulled jumps to use
73 this strategy, but it helps (by keeping more options open).
74 `fill_eager_delay_slots' tries to guess the direction the branch
75 will go; if it guesses right 100% of the time, it can reduce the
76 branch penalty as much as `fill_simple_delay_slots' does. If it
77 guesses wrong 100% of the time, it might as well schedule nops. When
78 `fill_eager_delay_slots' takes insns from the fall-through path of
79 the jump, usually there is no code expansion; when it takes insns
80 from the branch target, there is code expansion if it is not the
81 only way to reach that target.
82
83 (3) `relax_delay_slots' uses a set of rules to simplify code that
84 has been reorganized by (1) and (2). It finds cases where
85 conditional test can be eliminated, jumps can be threaded, extra
86 insns can be eliminated, etc. It is the job of (1) and (2) to do a
87 good job of scheduling locally; `relax_delay_slots' takes care of
88 making the various individual schedules work well together. It is
89 especially tuned to handle the control flow interactions of branch
90 insns. It does nothing for insns with delay slots that do not
91 branch.
92
93 On machines that use CC0, we are very conservative. We will not make
94 a copy of an insn involving CC0 since we want to maintain a 1-1
95 correspondence between the insn that sets and uses CC0. The insns are
96 allowed to be separated by placing an insn that sets CC0 (but not an insn
97 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
98 delay slot. In that case, we point each insn at the other with REG_CC_USER
99 and REG_CC_SETTER notes. Note that these restrictions affect very few
100 machines because most RISC machines with delay slots will not use CC0
101 (the RT is the only known exception at this point). */
102
103 #include "config.h"
104 #include "system.h"
105 #include "coretypes.h"
106 #include "tm.h"
107 #include "diagnostic-core.h"
108 #include "rtl.h"
109 #include "tm_p.h"
110 #include "symtab.h"
111 #include "hashtab.h"
112 #include "hash-set.h"
113 #include "vec.h"
114 #include "machmode.h"
115 #include "hard-reg-set.h"
116 #include "input.h"
117 #include "function.h"
118 #include "flags.h"
119 #include "statistics.h"
120 #include "double-int.h"
121 #include "real.h"
122 #include "fixed-value.h"
123 #include "alias.h"
124 #include "wide-int.h"
125 #include "inchash.h"
126 #include "tree.h"
127 #include "insn-config.h"
128 #include "expmed.h"
129 #include "dojump.h"
130 #include "explow.h"
131 #include "calls.h"
132 #include "emit-rtl.h"
133 #include "varasm.h"
134 #include "stmt.h"
135 #include "expr.h"
136 #include "conditions.h"
137 #include "predict.h"
138 #include "dominance.h"
139 #include "cfg.h"
140 #include "basic-block.h"
141 #include "regs.h"
142 #include "recog.h"
143 #include "obstack.h"
144 #include "insn-attr.h"
145 #include "resource.h"
146 #include "except.h"
147 #include "params.h"
148 #include "target.h"
149 #include "tree-pass.h"
150
151 #ifdef DELAY_SLOTS
152
153 #ifndef ANNUL_IFTRUE_SLOTS
154 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
155 #endif
156 #ifndef ANNUL_IFFALSE_SLOTS
157 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
158 #endif
159
160 \f
161 /* First, some functions that were used before GCC got a control flow graph.
162 These functions are now only used here in reorg.c, and have therefore
163 been moved here to avoid inadvertent misuse elsewhere in the compiler. */
164
165 /* Return the last label to mark the same position as LABEL. Return LABEL
166 itself if it is null or any return rtx. */
167
168 static rtx
169 skip_consecutive_labels (rtx label_or_return)
170 {
171 rtx_insn *insn;
172
173 if (label_or_return && ANY_RETURN_P (label_or_return))
174 return label_or_return;
175
176 rtx_insn *label = as_a <rtx_insn *> (label_or_return);
177
178 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
179 if (LABEL_P (insn))
180 label = insn;
181
182 return label;
183 }
184
185 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
186 and REG_CC_USER notes so we can find it. */
187
188 static void
189 link_cc0_insns (rtx insn)
190 {
191 rtx user = next_nonnote_insn (insn);
192
193 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
194 user = XVECEXP (PATTERN (user), 0, 0);
195
196 add_reg_note (user, REG_CC_SETTER, insn);
197 add_reg_note (insn, REG_CC_USER, user);
198 }
199 \f
200 /* Insns which have delay slots that have not yet been filled. */
201
202 static struct obstack unfilled_slots_obstack;
203 static rtx *unfilled_firstobj;
204
205 /* Define macros to refer to the first and last slot containing unfilled
206 insns. These are used because the list may move and its address
207 should be recomputed at each use. */
208
209 #define unfilled_slots_base \
210 ((rtx_insn **) obstack_base (&unfilled_slots_obstack))
211
212 #define unfilled_slots_next \
213 ((rtx_insn **) obstack_next_free (&unfilled_slots_obstack))
214
215 /* Points to the label before the end of the function, or before a
216 return insn. */
217 static rtx_code_label *function_return_label;
218 /* Likewise for a simple_return. */
219 static rtx_code_label *function_simple_return_label;
220
221 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
222 not always monotonically increase. */
223 static int *uid_to_ruid;
224
225 /* Highest valid index in `uid_to_ruid'. */
226 static int max_uid;
227
228 static int stop_search_p (rtx, int);
229 static int resource_conflicts_p (struct resources *, struct resources *);
230 static int insn_references_resource_p (rtx, struct resources *, bool);
231 static int insn_sets_resource_p (rtx, struct resources *, bool);
232 static rtx_code_label *find_end_label (rtx);
233 static rtx_insn *emit_delay_sequence (rtx_insn *, rtx_insn_list *, int);
234 static rtx_insn_list *add_to_delay_list (rtx_insn *, rtx_insn_list *);
235 static rtx_insn *delete_from_delay_slot (rtx_insn *);
236 static void delete_scheduled_jump (rtx_insn *);
237 static void note_delay_statistics (int, int);
238 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
239 static rtx_insn_list *optimize_skip (rtx_insn *);
240 #endif
241 static int get_jump_flags (const rtx_insn *, rtx);
242 static int mostly_true_jump (rtx);
243 static rtx get_branch_condition (const rtx_insn *, rtx);
244 static int condition_dominates_p (rtx, const rtx_insn *);
245 static int redirect_with_delay_slots_safe_p (rtx_insn *, rtx, rtx);
246 static int redirect_with_delay_list_safe_p (rtx_insn *, rtx, rtx_insn_list *);
247 static int check_annul_list_true_false (int, rtx);
248 static rtx_insn_list *steal_delay_list_from_target (rtx_insn *, rtx,
249 rtx_sequence *,
250 rtx_insn_list *,
251 struct resources *,
252 struct resources *,
253 struct resources *,
254 int, int *, int *,
255 rtx *);
256 static rtx_insn_list *steal_delay_list_from_fallthrough (rtx_insn *, rtx,
257 rtx_sequence *,
258 rtx_insn_list *,
259 struct resources *,
260 struct resources *,
261 struct resources *,
262 int, int *, int *);
263 static void try_merge_delay_insns (rtx, rtx_insn *);
264 static rtx redundant_insn (rtx, rtx_insn *, rtx);
265 static int own_thread_p (rtx, rtx, int);
266 static void update_block (rtx_insn *, rtx);
267 static int reorg_redirect_jump (rtx_insn *, rtx);
268 static void update_reg_dead_notes (rtx, rtx);
269 static void fix_reg_dead_note (rtx, rtx);
270 static void update_reg_unused_notes (rtx, rtx);
271 static void fill_simple_delay_slots (int);
272 static rtx_insn_list *fill_slots_from_thread (rtx_insn *, rtx, rtx, rtx,
273 int, int, int, int,
274 int *, rtx_insn_list *);
275 static void fill_eager_delay_slots (void);
276 static void relax_delay_slots (rtx_insn *);
277 static void make_return_insns (rtx_insn *);
278 \f
279 /* A wrapper around next_active_insn which takes care to return ret_rtx
280 unchanged. */
281
282 static rtx
283 first_active_target_insn (rtx insn)
284 {
285 if (ANY_RETURN_P (insn))
286 return insn;
287 return next_active_insn (as_a <rtx_insn *> (insn));
288 }
289 \f
290 /* Return true iff INSN is a simplejump, or any kind of return insn. */
291
292 static bool
293 simplejump_or_return_p (rtx insn)
294 {
295 return (JUMP_P (insn)
296 && (simplejump_p (as_a <rtx_insn *> (insn))
297 || ANY_RETURN_P (PATTERN (insn))));
298 }
299 \f
300 /* Return TRUE if this insn should stop the search for insn to fill delay
301 slots. LABELS_P indicates that labels should terminate the search.
302 In all cases, jumps terminate the search. */
303
304 static int
305 stop_search_p (rtx insn, int labels_p)
306 {
307 if (insn == 0)
308 return 1;
309
310 /* If the insn can throw an exception that is caught within the function,
311 it may effectively perform a jump from the viewpoint of the function.
312 Therefore act like for a jump. */
313 if (can_throw_internal (insn))
314 return 1;
315
316 switch (GET_CODE (insn))
317 {
318 case NOTE:
319 case CALL_INSN:
320 return 0;
321
322 case CODE_LABEL:
323 return labels_p;
324
325 case JUMP_INSN:
326 case BARRIER:
327 return 1;
328
329 case INSN:
330 /* OK unless it contains a delay slot or is an `asm' insn of some type.
331 We don't know anything about these. */
332 return (GET_CODE (PATTERN (insn)) == SEQUENCE
333 || GET_CODE (PATTERN (insn)) == ASM_INPUT
334 || asm_noperands (PATTERN (insn)) >= 0);
335
336 default:
337 gcc_unreachable ();
338 }
339 }
340 \f
341 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
342 resource set contains a volatile memory reference. Otherwise, return FALSE. */
343
344 static int
345 resource_conflicts_p (struct resources *res1, struct resources *res2)
346 {
347 if ((res1->cc && res2->cc) || (res1->memory && res2->memory)
348 || res1->volatil || res2->volatil)
349 return 1;
350
351 return hard_reg_set_intersect_p (res1->regs, res2->regs);
352 }
353
354 /* Return TRUE if any resource marked in RES, a `struct resources', is
355 referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called
356 routine is using those resources.
357
358 We compute this by computing all the resources referenced by INSN and
359 seeing if this conflicts with RES. It might be faster to directly check
360 ourselves, and this is the way it used to work, but it means duplicating
361 a large block of complex code. */
362
363 static int
364 insn_references_resource_p (rtx insn, struct resources *res,
365 bool include_delayed_effects)
366 {
367 struct resources insn_res;
368
369 CLEAR_RESOURCE (&insn_res);
370 mark_referenced_resources (insn, &insn_res, include_delayed_effects);
371 return resource_conflicts_p (&insn_res, res);
372 }
373
374 /* Return TRUE if INSN modifies resources that are marked in RES.
375 INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be
376 included. CC0 is only modified if it is explicitly set; see comments
377 in front of mark_set_resources for details. */
378
379 static int
380 insn_sets_resource_p (rtx insn, struct resources *res,
381 bool include_delayed_effects)
382 {
383 struct resources insn_sets;
384
385 CLEAR_RESOURCE (&insn_sets);
386 mark_set_resources (insn, &insn_sets, 0,
387 (include_delayed_effects
388 ? MARK_SRC_DEST_CALL
389 : MARK_SRC_DEST));
390 return resource_conflicts_p (&insn_sets, res);
391 }
392 \f
393 /* Find a label at the end of the function or before a RETURN. If there
394 is none, try to make one. If that fails, returns 0.
395
396 The property of such a label is that it is placed just before the
397 epilogue or a bare RETURN insn, so that another bare RETURN can be
398 turned into a jump to the label unconditionally. In particular, the
399 label cannot be placed before a RETURN insn with a filled delay slot.
400
401 ??? There may be a problem with the current implementation. Suppose
402 we start with a bare RETURN insn and call find_end_label. It may set
403 function_return_label just before the RETURN. Suppose the machinery
404 is able to fill the delay slot of the RETURN insn afterwards. Then
405 function_return_label is no longer valid according to the property
406 described above and find_end_label will still return it unmodified.
407 Note that this is probably mitigated by the following observation:
408 once function_return_label is made, it is very likely the target of
409 a jump, so filling the delay slot of the RETURN will be much more
410 difficult.
411 KIND is either simple_return_rtx or ret_rtx, indicating which type of
412 return we're looking for. */
413
414 static rtx_code_label *
415 find_end_label (rtx kind)
416 {
417 rtx_insn *insn;
418 rtx_code_label **plabel;
419
420 if (kind == ret_rtx)
421 plabel = &function_return_label;
422 else
423 {
424 gcc_assert (kind == simple_return_rtx);
425 plabel = &function_simple_return_label;
426 }
427
428 /* If we found one previously, return it. */
429 if (*plabel)
430 return *plabel;
431
432 /* Otherwise, see if there is a label at the end of the function. If there
433 is, it must be that RETURN insns aren't needed, so that is our return
434 label and we don't have to do anything else. */
435
436 insn = get_last_insn ();
437 while (NOTE_P (insn)
438 || (NONJUMP_INSN_P (insn)
439 && (GET_CODE (PATTERN (insn)) == USE
440 || GET_CODE (PATTERN (insn)) == CLOBBER)))
441 insn = PREV_INSN (insn);
442
443 /* When a target threads its epilogue we might already have a
444 suitable return insn. If so put a label before it for the
445 function_return_label. */
446 if (BARRIER_P (insn)
447 && JUMP_P (PREV_INSN (insn))
448 && PATTERN (PREV_INSN (insn)) == kind)
449 {
450 rtx_insn *temp = PREV_INSN (PREV_INSN (insn));
451 rtx_code_label *label = gen_label_rtx ();
452 LABEL_NUSES (label) = 0;
453
454 /* Put the label before any USE insns that may precede the RETURN
455 insn. */
456 while (GET_CODE (temp) == USE)
457 temp = PREV_INSN (temp);
458
459 emit_label_after (label, temp);
460 *plabel = label;
461 }
462
463 else if (LABEL_P (insn))
464 *plabel = as_a <rtx_code_label *> (insn);
465 else
466 {
467 rtx_code_label *label = gen_label_rtx ();
468 LABEL_NUSES (label) = 0;
469 /* If the basic block reorder pass moves the return insn to
470 some other place try to locate it again and put our
471 function_return_label there. */
472 while (insn && ! (JUMP_P (insn) && (PATTERN (insn) == kind)))
473 insn = PREV_INSN (insn);
474 if (insn)
475 {
476 insn = PREV_INSN (insn);
477
478 /* Put the label before any USE insns that may precede the
479 RETURN insn. */
480 while (GET_CODE (insn) == USE)
481 insn = PREV_INSN (insn);
482
483 emit_label_after (label, insn);
484 }
485 else
486 {
487 #ifdef HAVE_epilogue
488 if (HAVE_epilogue
489 #ifdef HAVE_return
490 && ! HAVE_return
491 #endif
492 )
493 /* The RETURN insn has its delay slot filled so we cannot
494 emit the label just before it. Since we already have
495 an epilogue and cannot emit a new RETURN, we cannot
496 emit the label at all. */
497 return NULL;
498 #endif /* HAVE_epilogue */
499
500 /* Otherwise, make a new label and emit a RETURN and BARRIER,
501 if needed. */
502 emit_label (label);
503 #ifdef HAVE_return
504 if (HAVE_return)
505 {
506 /* The return we make may have delay slots too. */
507 rtx pat = gen_return ();
508 rtx_insn *insn = emit_jump_insn (pat);
509 set_return_jump_label (insn);
510 emit_barrier ();
511 if (num_delay_slots (insn) > 0)
512 obstack_ptr_grow (&unfilled_slots_obstack, insn);
513 }
514 #endif
515 }
516 *plabel = label;
517 }
518
519 /* Show one additional use for this label so it won't go away until
520 we are done. */
521 ++LABEL_NUSES (*plabel);
522
523 return *plabel;
524 }
525 \f
526 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
527 the pattern of INSN with the SEQUENCE.
528
529 Returns the insn containing the SEQUENCE that replaces INSN. */
530
531 static rtx_insn *
532 emit_delay_sequence (rtx_insn *insn, rtx_insn_list *list, int length)
533 {
534 /* Allocate the rtvec to hold the insns and the SEQUENCE. */
535 rtvec seqv = rtvec_alloc (length + 1);
536 rtx seq = gen_rtx_SEQUENCE (VOIDmode, seqv);
537 rtx_insn *seq_insn = make_insn_raw (seq);
538
539 /* If DELAY_INSN has a location, use it for SEQ_INSN. If DELAY_INSN does
540 not have a location, but one of the delayed insns does, we pick up a
541 location from there later. */
542 INSN_LOCATION (seq_insn) = INSN_LOCATION (insn);
543
544 /* Unlink INSN from the insn chain, so that we can put it into
545 the SEQUENCE. Remember where we want to emit SEQUENCE in AFTER. */
546 rtx after = PREV_INSN (insn);
547 remove_insn (insn);
548 SET_NEXT_INSN (insn) = SET_PREV_INSN (insn) = NULL;
549
550 /* Build our SEQUENCE and rebuild the insn chain. */
551 int i = 1;
552 start_sequence ();
553 XVECEXP (seq, 0, 0) = emit_insn (insn);
554 for (rtx_insn_list *li = list; li; li = li->next (), i++)
555 {
556 rtx_insn *tem = li->insn ();
557 rtx note, next;
558
559 /* Show that this copy of the insn isn't deleted. */
560 tem->set_undeleted ();
561
562 /* Unlink insn from its original place, and re-emit it into
563 the sequence. */
564 SET_NEXT_INSN (tem) = SET_PREV_INSN (tem) = NULL;
565 XVECEXP (seq, 0, i) = emit_insn (tem);
566
567 /* SPARC assembler, for instance, emit warning when debug info is output
568 into the delay slot. */
569 if (INSN_LOCATION (tem) && !INSN_LOCATION (seq_insn))
570 INSN_LOCATION (seq_insn) = INSN_LOCATION (tem);
571 INSN_LOCATION (tem) = 0;
572
573 for (note = REG_NOTES (tem); note; note = next)
574 {
575 next = XEXP (note, 1);
576 switch (REG_NOTE_KIND (note))
577 {
578 case REG_DEAD:
579 /* Remove any REG_DEAD notes because we can't rely on them now
580 that the insn has been moved. */
581 remove_note (tem, note);
582 break;
583
584 case REG_LABEL_OPERAND:
585 case REG_LABEL_TARGET:
586 /* Keep the label reference count up to date. */
587 if (LABEL_P (XEXP (note, 0)))
588 LABEL_NUSES (XEXP (note, 0)) ++;
589 break;
590
591 default:
592 break;
593 }
594 }
595 }
596 end_sequence ();
597 gcc_assert (i == length + 1);
598
599 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
600 add_insn_after (seq_insn, after, NULL);
601
602 return seq_insn;
603 }
604
605 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
606 be in the order in which the insns are to be executed. */
607
608 static rtx_insn_list *
609 add_to_delay_list (rtx_insn *insn, rtx_insn_list *delay_list)
610 {
611 /* If we have an empty list, just make a new list element. If
612 INSN has its block number recorded, clear it since we may
613 be moving the insn to a new block. */
614
615 if (delay_list == 0)
616 {
617 clear_hashed_info_for_insn (insn);
618 return gen_rtx_INSN_LIST (VOIDmode, insn, NULL_RTX);
619 }
620
621 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
622 list. */
623 XEXP (delay_list, 1) = add_to_delay_list (insn, delay_list->next ());
624
625 return delay_list;
626 }
627 \f
628 /* Delete INSN from the delay slot of the insn that it is in, which may
629 produce an insn with no delay slots. Return the new insn. */
630
631 static rtx_insn *
632 delete_from_delay_slot (rtx_insn *insn)
633 {
634 rtx_insn *trial, *seq_insn, *prev;
635 rtx_sequence *seq;
636 rtx_insn_list *delay_list = 0;
637 int i;
638 int had_barrier = 0;
639
640 /* We first must find the insn containing the SEQUENCE with INSN in its
641 delay slot. Do this by finding an insn, TRIAL, where
642 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
643
644 for (trial = insn;
645 PREV_INSN (NEXT_INSN (trial)) == trial;
646 trial = NEXT_INSN (trial))
647 ;
648
649 seq_insn = PREV_INSN (NEXT_INSN (trial));
650 seq = as_a <rtx_sequence *> (PATTERN (seq_insn));
651
652 if (NEXT_INSN (seq_insn) && BARRIER_P (NEXT_INSN (seq_insn)))
653 had_barrier = 1;
654
655 /* Create a delay list consisting of all the insns other than the one
656 we are deleting (unless we were the only one). */
657 if (seq->len () > 2)
658 for (i = 1; i < seq->len (); i++)
659 if (seq->insn (i) != insn)
660 delay_list = add_to_delay_list (seq->insn (i), delay_list);
661
662 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
663 list, and rebuild the delay list if non-empty. */
664 prev = PREV_INSN (seq_insn);
665 trial = seq->insn (0);
666 delete_related_insns (seq_insn);
667 add_insn_after (trial, prev, NULL);
668
669 /* If there was a barrier after the old SEQUENCE, remit it. */
670 if (had_barrier)
671 emit_barrier_after (trial);
672
673 /* If there are any delay insns, remit them. Otherwise clear the
674 annul flag. */
675 if (delay_list)
676 trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2);
677 else if (JUMP_P (trial))
678 INSN_ANNULLED_BRANCH_P (trial) = 0;
679
680 INSN_FROM_TARGET_P (insn) = 0;
681
682 /* Show we need to fill this insn again. */
683 obstack_ptr_grow (&unfilled_slots_obstack, trial);
684
685 return trial;
686 }
687 \f
688 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
689 the insn that sets CC0 for it and delete it too. */
690
691 static void
692 delete_scheduled_jump (rtx_insn *insn)
693 {
694 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
695 delete the insn that sets the condition code, but it is hard to find it.
696 Since this case is rare anyway, don't bother trying; there would likely
697 be other insns that became dead anyway, which we wouldn't know to
698 delete. */
699
700 if (HAVE_cc0 && reg_mentioned_p (cc0_rtx, insn))
701 {
702 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
703
704 /* If a reg-note was found, it points to an insn to set CC0. This
705 insn is in the delay list of some other insn. So delete it from
706 the delay list it was in. */
707 if (note)
708 {
709 if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
710 && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
711 delete_from_delay_slot (as_a <rtx_insn *> (XEXP (note, 0)));
712 }
713 else
714 {
715 /* The insn setting CC0 is our previous insn, but it may be in
716 a delay slot. It will be the last insn in the delay slot, if
717 it is. */
718 rtx_insn *trial = previous_insn (insn);
719 if (NOTE_P (trial))
720 trial = prev_nonnote_insn (trial);
721 if (sets_cc0_p (PATTERN (trial)) != 1
722 || FIND_REG_INC_NOTE (trial, NULL_RTX))
723 return;
724 if (PREV_INSN (NEXT_INSN (trial)) == trial)
725 delete_related_insns (trial);
726 else
727 delete_from_delay_slot (trial);
728 }
729 }
730
731 delete_related_insns (insn);
732 }
733 \f
734 /* Counters for delay-slot filling. */
735
736 #define NUM_REORG_FUNCTIONS 2
737 #define MAX_DELAY_HISTOGRAM 3
738 #define MAX_REORG_PASSES 2
739
740 static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES];
741
742 static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES];
743
744 static int reorg_pass_number;
745
746 static void
747 note_delay_statistics (int slots_filled, int index)
748 {
749 num_insns_needing_delays[index][reorg_pass_number]++;
750 if (slots_filled > MAX_DELAY_HISTOGRAM)
751 slots_filled = MAX_DELAY_HISTOGRAM;
752 num_filled_delays[index][slots_filled][reorg_pass_number]++;
753 }
754 \f
755 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
756
757 /* Optimize the following cases:
758
759 1. When a conditional branch skips over only one instruction,
760 use an annulling branch and put that insn in the delay slot.
761 Use either a branch that annuls when the condition if true or
762 invert the test with a branch that annuls when the condition is
763 false. This saves insns, since otherwise we must copy an insn
764 from the L1 target.
765
766 (orig) (skip) (otherwise)
767 Bcc.n L1 Bcc',a L1 Bcc,a L1'
768 insn insn insn2
769 L1: L1: L1:
770 insn2 insn2 insn2
771 insn3 insn3 L1':
772 insn3
773
774 2. When a conditional branch skips over only one instruction,
775 and after that, it unconditionally branches somewhere else,
776 perform the similar optimization. This saves executing the
777 second branch in the case where the inverted condition is true.
778
779 Bcc.n L1 Bcc',a L2
780 insn insn
781 L1: L1:
782 Bra L2 Bra L2
783
784 INSN is a JUMP_INSN.
785
786 This should be expanded to skip over N insns, where N is the number
787 of delay slots required. */
788
789 static rtx_insn_list *
790 optimize_skip (rtx_insn *insn)
791 {
792 rtx_insn *trial = next_nonnote_insn (insn);
793 rtx_insn *next_trial = next_active_insn (trial);
794 rtx_insn_list *delay_list = 0;
795 int flags;
796
797 flags = get_jump_flags (insn, JUMP_LABEL (insn));
798
799 if (trial == 0
800 || !NONJUMP_INSN_P (trial)
801 || GET_CODE (PATTERN (trial)) == SEQUENCE
802 || recog_memoized (trial) < 0
803 || (! eligible_for_annul_false (insn, 0, trial, flags)
804 && ! eligible_for_annul_true (insn, 0, trial, flags))
805 || can_throw_internal (trial))
806 return 0;
807
808 /* There are two cases where we are just executing one insn (we assume
809 here that a branch requires only one insn; this should be generalized
810 at some point): Where the branch goes around a single insn or where
811 we have one insn followed by a branch to the same label we branch to.
812 In both of these cases, inverting the jump and annulling the delay
813 slot give the same effect in fewer insns. */
814 if (next_trial == next_active_insn (JUMP_LABEL (insn))
815 || (next_trial != 0
816 && simplejump_or_return_p (next_trial)
817 && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)))
818 {
819 if (eligible_for_annul_false (insn, 0, trial, flags))
820 {
821 if (invert_jump (insn, JUMP_LABEL (insn), 1))
822 INSN_FROM_TARGET_P (trial) = 1;
823 else if (! eligible_for_annul_true (insn, 0, trial, flags))
824 return 0;
825 }
826
827 delay_list = add_to_delay_list (trial, NULL);
828 next_trial = next_active_insn (trial);
829 update_block (trial, trial);
830 delete_related_insns (trial);
831
832 /* Also, if we are targeting an unconditional
833 branch, thread our jump to the target of that branch. Don't
834 change this into a RETURN here, because it may not accept what
835 we have in the delay slot. We'll fix this up later. */
836 if (next_trial && simplejump_or_return_p (next_trial))
837 {
838 rtx target_label = JUMP_LABEL (next_trial);
839 if (ANY_RETURN_P (target_label))
840 target_label = find_end_label (target_label);
841
842 if (target_label)
843 {
844 /* Recompute the flags based on TARGET_LABEL since threading
845 the jump to TARGET_LABEL may change the direction of the
846 jump (which may change the circumstances in which the
847 delay slot is nullified). */
848 flags = get_jump_flags (insn, target_label);
849 if (eligible_for_annul_true (insn, 0, trial, flags))
850 reorg_redirect_jump (insn, target_label);
851 }
852 }
853
854 INSN_ANNULLED_BRANCH_P (insn) = 1;
855 }
856
857 return delay_list;
858 }
859 #endif
860 \f
861 /* Encode and return branch direction and prediction information for
862 INSN assuming it will jump to LABEL.
863
864 Non conditional branches return no direction information and
865 are predicted as very likely taken. */
866
867 static int
868 get_jump_flags (const rtx_insn *insn, rtx label)
869 {
870 int flags;
871
872 /* get_jump_flags can be passed any insn with delay slots, these may
873 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
874 direction information, and only if they are conditional jumps.
875
876 If LABEL is a return, then there is no way to determine the branch
877 direction. */
878 if (JUMP_P (insn)
879 && (condjump_p (insn) || condjump_in_parallel_p (insn))
880 && !ANY_RETURN_P (label)
881 && INSN_UID (insn) <= max_uid
882 && INSN_UID (label) <= max_uid)
883 flags
884 = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
885 ? ATTR_FLAG_forward : ATTR_FLAG_backward;
886 /* No valid direction information. */
887 else
888 flags = 0;
889
890 return flags;
891 }
892
893 /* Return truth value of the statement that this branch
894 is mostly taken. If we think that the branch is extremely likely
895 to be taken, we return 2. If the branch is slightly more likely to be
896 taken, return 1. If the branch is slightly less likely to be taken,
897 return 0 and if the branch is highly unlikely to be taken, return -1. */
898
899 static int
900 mostly_true_jump (rtx jump_insn)
901 {
902 /* If branch probabilities are available, then use that number since it
903 always gives a correct answer. */
904 rtx note = find_reg_note (jump_insn, REG_BR_PROB, 0);
905 if (note)
906 {
907 int prob = XINT (note, 0);
908
909 if (prob >= REG_BR_PROB_BASE * 9 / 10)
910 return 2;
911 else if (prob >= REG_BR_PROB_BASE / 2)
912 return 1;
913 else if (prob >= REG_BR_PROB_BASE / 10)
914 return 0;
915 else
916 return -1;
917 }
918
919 /* If there is no note, assume branches are not taken.
920 This should be rare. */
921 return 0;
922 }
923
924 /* Return the condition under which INSN will branch to TARGET. If TARGET
925 is zero, return the condition under which INSN will return. If INSN is
926 an unconditional branch, return const_true_rtx. If INSN isn't a simple
927 type of jump, or it doesn't go to TARGET, return 0. */
928
929 static rtx
930 get_branch_condition (const rtx_insn *insn, rtx target)
931 {
932 rtx pat = PATTERN (insn);
933 rtx src;
934
935 if (condjump_in_parallel_p (insn))
936 pat = XVECEXP (pat, 0, 0);
937
938 if (ANY_RETURN_P (pat) && pat == target)
939 return const_true_rtx;
940
941 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
942 return 0;
943
944 src = SET_SRC (pat);
945 if (GET_CODE (src) == LABEL_REF && LABEL_REF_LABEL (src) == target)
946 return const_true_rtx;
947
948 else if (GET_CODE (src) == IF_THEN_ELSE
949 && XEXP (src, 2) == pc_rtx
950 && ((GET_CODE (XEXP (src, 1)) == LABEL_REF
951 && LABEL_REF_LABEL (XEXP (src, 1)) == target)
952 || (ANY_RETURN_P (XEXP (src, 1)) && XEXP (src, 1) == target)))
953 return XEXP (src, 0);
954
955 else if (GET_CODE (src) == IF_THEN_ELSE
956 && XEXP (src, 1) == pc_rtx
957 && ((GET_CODE (XEXP (src, 2)) == LABEL_REF
958 && LABEL_REF_LABEL (XEXP (src, 2)) == target)
959 || (ANY_RETURN_P (XEXP (src, 2)) && XEXP (src, 2) == target)))
960 {
961 enum rtx_code rev;
962 rev = reversed_comparison_code (XEXP (src, 0), insn);
963 if (rev != UNKNOWN)
964 return gen_rtx_fmt_ee (rev, GET_MODE (XEXP (src, 0)),
965 XEXP (XEXP (src, 0), 0),
966 XEXP (XEXP (src, 0), 1));
967 }
968
969 return 0;
970 }
971
972 /* Return nonzero if CONDITION is more strict than the condition of
973 INSN, i.e., if INSN will always branch if CONDITION is true. */
974
975 static int
976 condition_dominates_p (rtx condition, const rtx_insn *insn)
977 {
978 rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn));
979 enum rtx_code code = GET_CODE (condition);
980 enum rtx_code other_code;
981
982 if (rtx_equal_p (condition, other_condition)
983 || other_condition == const_true_rtx)
984 return 1;
985
986 else if (condition == const_true_rtx || other_condition == 0)
987 return 0;
988
989 other_code = GET_CODE (other_condition);
990 if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2
991 || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0))
992 || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1)))
993 return 0;
994
995 return comparison_dominates_p (code, other_code);
996 }
997
998 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
999 any insns already in the delay slot of JUMP. */
1000
1001 static int
1002 redirect_with_delay_slots_safe_p (rtx_insn *jump, rtx newlabel, rtx seq)
1003 {
1004 int flags, i;
1005 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (seq));
1006
1007 /* Make sure all the delay slots of this jump would still
1008 be valid after threading the jump. If they are still
1009 valid, then return nonzero. */
1010
1011 flags = get_jump_flags (jump, newlabel);
1012 for (i = 1; i < pat->len (); i++)
1013 if (! (
1014 #ifdef ANNUL_IFFALSE_SLOTS
1015 (INSN_ANNULLED_BRANCH_P (jump)
1016 && INSN_FROM_TARGET_P (pat->insn (i)))
1017 ? eligible_for_annul_false (jump, i - 1, pat->insn (i), flags) :
1018 #endif
1019 #ifdef ANNUL_IFTRUE_SLOTS
1020 (INSN_ANNULLED_BRANCH_P (jump)
1021 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
1022 ? eligible_for_annul_true (jump, i - 1, pat->insn (i), flags) :
1023 #endif
1024 eligible_for_delay (jump, i - 1, pat->insn (i), flags)))
1025 break;
1026
1027 return (i == pat->len ());
1028 }
1029
1030 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
1031 any insns we wish to place in the delay slot of JUMP. */
1032
1033 static int
1034 redirect_with_delay_list_safe_p (rtx_insn *jump, rtx newlabel,
1035 rtx_insn_list *delay_list)
1036 {
1037 int flags, i;
1038 rtx_insn_list *li;
1039
1040 /* Make sure all the insns in DELAY_LIST would still be
1041 valid after threading the jump. If they are still
1042 valid, then return nonzero. */
1043
1044 flags = get_jump_flags (jump, newlabel);
1045 for (li = delay_list, i = 0; li; li = li->next (), i++)
1046 if (! (
1047 #ifdef ANNUL_IFFALSE_SLOTS
1048 (INSN_ANNULLED_BRANCH_P (jump)
1049 && INSN_FROM_TARGET_P (li->insn ()))
1050 ? eligible_for_annul_false (jump, i, li->insn (), flags) :
1051 #endif
1052 #ifdef ANNUL_IFTRUE_SLOTS
1053 (INSN_ANNULLED_BRANCH_P (jump)
1054 && ! INSN_FROM_TARGET_P (XEXP (li, 0)))
1055 ? eligible_for_annul_true (jump, i, li->insn (), flags) :
1056 #endif
1057 eligible_for_delay (jump, i, li->insn (), flags)))
1058 break;
1059
1060 return (li == NULL);
1061 }
1062
1063 /* DELAY_LIST is a list of insns that have already been placed into delay
1064 slots. See if all of them have the same annulling status as ANNUL_TRUE_P.
1065 If not, return 0; otherwise return 1. */
1066
1067 static int
1068 check_annul_list_true_false (int annul_true_p, rtx delay_list)
1069 {
1070 rtx temp;
1071
1072 if (delay_list)
1073 {
1074 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1075 {
1076 rtx trial = XEXP (temp, 0);
1077
1078 if ((annul_true_p && INSN_FROM_TARGET_P (trial))
1079 || (!annul_true_p && !INSN_FROM_TARGET_P (trial)))
1080 return 0;
1081 }
1082 }
1083
1084 return 1;
1085 }
1086 \f
1087 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1088 the condition tested by INSN is CONDITION and the resources shown in
1089 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1090 from SEQ's delay list, in addition to whatever insns it may execute
1091 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1092 needed while searching for delay slot insns. Return the concatenated
1093 delay list if possible, otherwise, return 0.
1094
1095 SLOTS_TO_FILL is the total number of slots required by INSN, and
1096 PSLOTS_FILLED points to the number filled so far (also the number of
1097 insns in DELAY_LIST). It is updated with the number that have been
1098 filled from the SEQUENCE, if any.
1099
1100 PANNUL_P points to a nonzero value if we already know that we need
1101 to annul INSN. If this routine determines that annulling is needed,
1102 it may set that value nonzero.
1103
1104 PNEW_THREAD points to a location that is to receive the place at which
1105 execution should continue. */
1106
1107 static rtx_insn_list *
1108 steal_delay_list_from_target (rtx_insn *insn, rtx condition, rtx_sequence *seq,
1109 rtx_insn_list *delay_list, struct resources *sets,
1110 struct resources *needed,
1111 struct resources *other_needed,
1112 int slots_to_fill, int *pslots_filled,
1113 int *pannul_p, rtx *pnew_thread)
1114 {
1115 int slots_remaining = slots_to_fill - *pslots_filled;
1116 int total_slots_filled = *pslots_filled;
1117 rtx_insn_list *new_delay_list = 0;
1118 int must_annul = *pannul_p;
1119 int used_annul = 0;
1120 int i;
1121 struct resources cc_set;
1122 bool *redundant;
1123
1124 /* We can't do anything if there are more delay slots in SEQ than we
1125 can handle, or if we don't know that it will be a taken branch.
1126 We know that it will be a taken branch if it is either an unconditional
1127 branch or a conditional branch with a stricter branch condition.
1128
1129 Also, exit if the branch has more than one set, since then it is computing
1130 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1131 ??? It may be possible to move other sets into INSN in addition to
1132 moving the instructions in the delay slots.
1133
1134 We can not steal the delay list if one of the instructions in the
1135 current delay_list modifies the condition codes and the jump in the
1136 sequence is a conditional jump. We can not do this because we can
1137 not change the direction of the jump because the condition codes
1138 will effect the direction of the jump in the sequence. */
1139
1140 CLEAR_RESOURCE (&cc_set);
1141 for (rtx_insn_list *temp = delay_list; temp; temp = temp->next ())
1142 {
1143 rtx_insn *trial = temp->insn ();
1144
1145 mark_set_resources (trial, &cc_set, 0, MARK_SRC_DEST_CALL);
1146 if (insn_references_resource_p (seq->insn (0), &cc_set, false))
1147 return delay_list;
1148 }
1149
1150 if (XVECLEN (seq, 0) - 1 > slots_remaining
1151 || ! condition_dominates_p (condition, seq->insn (0))
1152 || ! single_set (seq->insn (0)))
1153 return delay_list;
1154
1155 /* On some targets, branches with delay slots can have a limited
1156 displacement. Give the back end a chance to tell us we can't do
1157 this. */
1158 if (! targetm.can_follow_jump (insn, seq->insn (0)))
1159 return delay_list;
1160
1161 redundant = XALLOCAVEC (bool, XVECLEN (seq, 0));
1162 for (i = 1; i < seq->len (); i++)
1163 {
1164 rtx_insn *trial = seq->insn (i);
1165 int flags;
1166
1167 if (insn_references_resource_p (trial, sets, false)
1168 || insn_sets_resource_p (trial, needed, false)
1169 || insn_sets_resource_p (trial, sets, false)
1170 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1171 delay list. */
1172 || (HAVE_cc0 && find_reg_note (trial, REG_CC_USER, NULL_RTX))
1173 /* If TRIAL is from the fallthrough code of an annulled branch insn
1174 in SEQ, we cannot use it. */
1175 || (INSN_ANNULLED_BRANCH_P (seq->insn (0))
1176 && ! INSN_FROM_TARGET_P (trial)))
1177 return delay_list;
1178
1179 /* If this insn was already done (usually in a previous delay slot),
1180 pretend we put it in our delay slot. */
1181 redundant[i] = redundant_insn (trial, insn, new_delay_list);
1182 if (redundant[i])
1183 continue;
1184
1185 /* We will end up re-vectoring this branch, so compute flags
1186 based on jumping to the new label. */
1187 flags = get_jump_flags (insn, JUMP_LABEL (seq->insn (0)));
1188
1189 if (! must_annul
1190 && ((condition == const_true_rtx
1191 || (! insn_sets_resource_p (trial, other_needed, false)
1192 && ! may_trap_or_fault_p (PATTERN (trial)))))
1193 ? eligible_for_delay (insn, total_slots_filled, trial, flags)
1194 : (must_annul || (delay_list == NULL && new_delay_list == NULL))
1195 && (must_annul = 1,
1196 check_annul_list_true_false (0, delay_list)
1197 && check_annul_list_true_false (0, new_delay_list)
1198 && eligible_for_annul_false (insn, total_slots_filled,
1199 trial, flags)))
1200 {
1201 if (must_annul)
1202 used_annul = 1;
1203 rtx_insn *temp = copy_delay_slot_insn (trial);
1204 INSN_FROM_TARGET_P (temp) = 1;
1205 new_delay_list = add_to_delay_list (temp, new_delay_list);
1206 total_slots_filled++;
1207
1208 if (--slots_remaining == 0)
1209 break;
1210 }
1211 else
1212 return delay_list;
1213 }
1214
1215 /* Record the effect of the instructions that were redundant and which
1216 we therefore decided not to copy. */
1217 for (i = 1; i < seq->len (); i++)
1218 if (redundant[i])
1219 update_block (seq->insn (i), insn);
1220
1221 /* Show the place to which we will be branching. */
1222 *pnew_thread = first_active_target_insn (JUMP_LABEL (seq->insn (0)));
1223
1224 /* Add any new insns to the delay list and update the count of the
1225 number of slots filled. */
1226 *pslots_filled = total_slots_filled;
1227 if (used_annul)
1228 *pannul_p = 1;
1229
1230 if (delay_list == 0)
1231 return new_delay_list;
1232
1233 for (rtx_insn_list *temp = new_delay_list; temp; temp = temp->next ())
1234 delay_list = add_to_delay_list (temp->insn (), delay_list);
1235
1236 return delay_list;
1237 }
1238 \f
1239 /* Similar to steal_delay_list_from_target except that SEQ is on the
1240 fallthrough path of INSN. Here we only do something if the delay insn
1241 of SEQ is an unconditional branch. In that case we steal its delay slot
1242 for INSN since unconditional branches are much easier to fill. */
1243
1244 static rtx_insn_list *
1245 steal_delay_list_from_fallthrough (rtx_insn *insn, rtx condition,
1246 rtx_sequence *seq,
1247 rtx_insn_list *delay_list,
1248 struct resources *sets,
1249 struct resources *needed,
1250 struct resources *other_needed,
1251 int slots_to_fill, int *pslots_filled,
1252 int *pannul_p)
1253 {
1254 int i;
1255 int flags;
1256 int must_annul = *pannul_p;
1257 int used_annul = 0;
1258
1259 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1260
1261 /* We can't do anything if SEQ's delay insn isn't an
1262 unconditional branch. */
1263
1264 if (! simplejump_or_return_p (seq->insn (0)))
1265 return delay_list;
1266
1267 for (i = 1; i < seq->len (); i++)
1268 {
1269 rtx_insn *trial = seq->insn (i);
1270
1271 /* If TRIAL sets CC0, stealing it will move it too far from the use
1272 of CC0. */
1273 if (insn_references_resource_p (trial, sets, false)
1274 || insn_sets_resource_p (trial, needed, false)
1275 || insn_sets_resource_p (trial, sets, false)
1276 || (HAVE_cc0 && sets_cc0_p (PATTERN (trial))))
1277
1278 break;
1279
1280 /* If this insn was already done, we don't need it. */
1281 if (redundant_insn (trial, insn, delay_list))
1282 {
1283 update_block (trial, insn);
1284 delete_from_delay_slot (trial);
1285 continue;
1286 }
1287
1288 if (! must_annul
1289 && ((condition == const_true_rtx
1290 || (! insn_sets_resource_p (trial, other_needed, false)
1291 && ! may_trap_or_fault_p (PATTERN (trial)))))
1292 ? eligible_for_delay (insn, *pslots_filled, trial, flags)
1293 : (must_annul || delay_list == NULL) && (must_annul = 1,
1294 check_annul_list_true_false (1, delay_list)
1295 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
1296 {
1297 if (must_annul)
1298 used_annul = 1;
1299 delete_from_delay_slot (trial);
1300 delay_list = add_to_delay_list (trial, delay_list);
1301
1302 if (++(*pslots_filled) == slots_to_fill)
1303 break;
1304 }
1305 else
1306 break;
1307 }
1308
1309 if (used_annul)
1310 *pannul_p = 1;
1311 return delay_list;
1312 }
1313 \f
1314 /* Try merging insns starting at THREAD which match exactly the insns in
1315 INSN's delay list.
1316
1317 If all insns were matched and the insn was previously annulling, the
1318 annul bit will be cleared.
1319
1320 For each insn that is merged, if the branch is or will be non-annulling,
1321 we delete the merged insn. */
1322
1323 static void
1324 try_merge_delay_insns (rtx insn, rtx_insn *thread)
1325 {
1326 rtx_insn *trial, *next_trial;
1327 rtx_insn *delay_insn = as_a <rtx_insn *> (XVECEXP (PATTERN (insn), 0, 0));
1328 int annul_p = JUMP_P (delay_insn) && INSN_ANNULLED_BRANCH_P (delay_insn);
1329 int slot_number = 1;
1330 int num_slots = XVECLEN (PATTERN (insn), 0);
1331 rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1332 struct resources set, needed, modified;
1333 rtx_insn_list *merged_insns = 0;
1334 int i, j;
1335 int flags;
1336
1337 flags = get_jump_flags (delay_insn, JUMP_LABEL (delay_insn));
1338
1339 CLEAR_RESOURCE (&needed);
1340 CLEAR_RESOURCE (&set);
1341
1342 /* If this is not an annulling branch, take into account anything needed in
1343 INSN's delay slot. This prevents two increments from being incorrectly
1344 folded into one. If we are annulling, this would be the correct
1345 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1346 will essentially disable this optimization. This method is somewhat of
1347 a kludge, but I don't see a better way.) */
1348 if (! annul_p)
1349 for (i = 1 ; i < num_slots; i++)
1350 if (XVECEXP (PATTERN (insn), 0, i))
1351 mark_referenced_resources (XVECEXP (PATTERN (insn), 0, i), &needed,
1352 true);
1353
1354 for (trial = thread; !stop_search_p (trial, 1); trial = next_trial)
1355 {
1356 rtx pat = PATTERN (trial);
1357 rtx oldtrial = trial;
1358
1359 next_trial = next_nonnote_insn (trial);
1360
1361 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1362 if (NONJUMP_INSN_P (trial)
1363 && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER))
1364 continue;
1365
1366 if (GET_CODE (next_to_match) == GET_CODE (trial)
1367 /* We can't share an insn that sets cc0. */
1368 && (!HAVE_cc0 || ! sets_cc0_p (pat))
1369 && ! insn_references_resource_p (trial, &set, true)
1370 && ! insn_sets_resource_p (trial, &set, true)
1371 && ! insn_sets_resource_p (trial, &needed, true)
1372 && (trial = try_split (pat, trial, 0)) != 0
1373 /* Update next_trial, in case try_split succeeded. */
1374 && (next_trial = next_nonnote_insn (trial))
1375 /* Likewise THREAD. */
1376 && (thread = oldtrial == thread ? trial : thread)
1377 && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial))
1378 /* Have to test this condition if annul condition is different
1379 from (and less restrictive than) non-annulling one. */
1380 && eligible_for_delay (delay_insn, slot_number - 1, trial, flags))
1381 {
1382
1383 if (! annul_p)
1384 {
1385 update_block (trial, thread);
1386 if (trial == thread)
1387 thread = next_active_insn (thread);
1388
1389 delete_related_insns (trial);
1390 INSN_FROM_TARGET_P (next_to_match) = 0;
1391 }
1392 else
1393 merged_insns = gen_rtx_INSN_LIST (VOIDmode, trial, merged_insns);
1394
1395 if (++slot_number == num_slots)
1396 break;
1397
1398 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1399 }
1400
1401 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
1402 mark_referenced_resources (trial, &needed, true);
1403 }
1404
1405 /* See if we stopped on a filled insn. If we did, try to see if its
1406 delay slots match. */
1407 if (slot_number != num_slots
1408 && trial && NONJUMP_INSN_P (trial)
1409 && GET_CODE (PATTERN (trial)) == SEQUENCE
1410 && !(JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
1411 && INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0))))
1412 {
1413 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (trial));
1414 rtx filled_insn = XVECEXP (pat, 0, 0);
1415
1416 /* Account for resources set/needed by the filled insn. */
1417 mark_set_resources (filled_insn, &set, 0, MARK_SRC_DEST_CALL);
1418 mark_referenced_resources (filled_insn, &needed, true);
1419
1420 for (i = 1; i < pat->len (); i++)
1421 {
1422 rtx_insn *dtrial = pat->insn (i);
1423
1424 CLEAR_RESOURCE (&modified);
1425 /* Account for resources set by the the insn following NEXT_TO_MATCH
1426 inside INSN's delay list. */
1427 for (j = 1; slot_number + j < num_slots; j++)
1428 mark_set_resources (XVECEXP (PATTERN (insn), 0, slot_number + j),
1429 &modified, 0, MARK_SRC_DEST_CALL);
1430 /* Account for resources set by the the insn before DTRIAL and inside
1431 TRIAL's delay list. */
1432 for (j = 1; j < i; j++)
1433 mark_set_resources (XVECEXP (pat, 0, j),
1434 &modified, 0, MARK_SRC_DEST_CALL);
1435 if (! insn_references_resource_p (dtrial, &set, true)
1436 && ! insn_sets_resource_p (dtrial, &set, true)
1437 && ! insn_sets_resource_p (dtrial, &needed, true)
1438 && (!HAVE_cc0 || ! sets_cc0_p (PATTERN (dtrial)))
1439 && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial))
1440 /* Check that DTRIAL and NEXT_TO_MATCH does not reference a
1441 resource modified between them (only dtrial is checked because
1442 next_to_match and dtrial shall to be equal in order to hit
1443 this line) */
1444 && ! insn_references_resource_p (dtrial, &modified, true)
1445 && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags))
1446 {
1447 if (! annul_p)
1448 {
1449 rtx_insn *new_rtx;
1450
1451 update_block (dtrial, thread);
1452 new_rtx = delete_from_delay_slot (dtrial);
1453 if (thread->deleted ())
1454 thread = new_rtx;
1455 INSN_FROM_TARGET_P (next_to_match) = 0;
1456 }
1457 else
1458 merged_insns = gen_rtx_INSN_LIST (SImode, dtrial,
1459 merged_insns);
1460
1461 if (++slot_number == num_slots)
1462 break;
1463
1464 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1465 }
1466 else
1467 {
1468 /* Keep track of the set/referenced resources for the delay
1469 slots of any trial insns we encounter. */
1470 mark_set_resources (dtrial, &set, 0, MARK_SRC_DEST_CALL);
1471 mark_referenced_resources (dtrial, &needed, true);
1472 }
1473 }
1474 }
1475
1476 /* If all insns in the delay slot have been matched and we were previously
1477 annulling the branch, we need not any more. In that case delete all the
1478 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
1479 the delay list so that we know that it isn't only being used at the
1480 target. */
1481 if (slot_number == num_slots && annul_p)
1482 {
1483 for (; merged_insns; merged_insns = merged_insns->next ())
1484 {
1485 if (GET_MODE (merged_insns) == SImode)
1486 {
1487 rtx_insn *new_rtx;
1488
1489 update_block (merged_insns->insn (), thread);
1490 new_rtx = delete_from_delay_slot (merged_insns->insn ());
1491 if (thread->deleted ())
1492 thread = new_rtx;
1493 }
1494 else
1495 {
1496 update_block (merged_insns->insn (), thread);
1497 delete_related_insns (merged_insns->insn ());
1498 }
1499 }
1500
1501 INSN_ANNULLED_BRANCH_P (delay_insn) = 0;
1502
1503 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1504 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0;
1505 }
1506 }
1507 \f
1508 /* See if INSN is redundant with an insn in front of TARGET. Often this
1509 is called when INSN is a candidate for a delay slot of TARGET.
1510 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1511 of INSN. Often INSN will be redundant with an insn in a delay slot of
1512 some previous insn. This happens when we have a series of branches to the
1513 same label; in that case the first insn at the target might want to go
1514 into each of the delay slots.
1515
1516 If we are not careful, this routine can take up a significant fraction
1517 of the total compilation time (4%), but only wins rarely. Hence we
1518 speed this routine up by making two passes. The first pass goes back
1519 until it hits a label and sees if it finds an insn with an identical
1520 pattern. Only in this (relatively rare) event does it check for
1521 data conflicts.
1522
1523 We do not split insns we encounter. This could cause us not to find a
1524 redundant insn, but the cost of splitting seems greater than the possible
1525 gain in rare cases. */
1526
1527 static rtx
1528 redundant_insn (rtx insn, rtx_insn *target, rtx delay_list)
1529 {
1530 rtx target_main = target;
1531 rtx ipat = PATTERN (insn);
1532 rtx_insn *trial;
1533 rtx pat;
1534 struct resources needed, set;
1535 int i;
1536 unsigned insns_to_search;
1537
1538 /* If INSN has any REG_UNUSED notes, it can't match anything since we
1539 are allowed to not actually assign to such a register. */
1540 if (find_reg_note (insn, REG_UNUSED, NULL_RTX) != 0)
1541 return 0;
1542
1543 /* Scan backwards looking for a match. */
1544 for (trial = PREV_INSN (target),
1545 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1546 trial && insns_to_search > 0;
1547 trial = PREV_INSN (trial))
1548 {
1549 /* (use (insn))s can come immediately after a barrier if the
1550 label that used to precede them has been deleted as dead.
1551 See delete_related_insns. */
1552 if (LABEL_P (trial) || BARRIER_P (trial))
1553 return 0;
1554
1555 if (!INSN_P (trial))
1556 continue;
1557 --insns_to_search;
1558
1559 pat = PATTERN (trial);
1560 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1561 continue;
1562
1563 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (pat))
1564 {
1565 /* Stop for a CALL and its delay slots because it is difficult to
1566 track its resource needs correctly. */
1567 if (CALL_P (seq->element (0)))
1568 return 0;
1569
1570 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1571 slots because it is difficult to track its resource needs
1572 correctly. */
1573
1574 if (INSN_SETS_ARE_DELAYED (seq->insn (0)))
1575 return 0;
1576
1577 if (INSN_REFERENCES_ARE_DELAYED (seq->insn (0)))
1578 return 0;
1579
1580 /* See if any of the insns in the delay slot match, updating
1581 resource requirements as we go. */
1582 for (i = seq->len () - 1; i > 0; i--)
1583 if (GET_CODE (seq->element (i)) == GET_CODE (insn)
1584 && rtx_equal_p (PATTERN (seq->element (i)), ipat)
1585 && ! find_reg_note (seq->element (i), REG_UNUSED, NULL_RTX))
1586 break;
1587
1588 /* If found a match, exit this loop early. */
1589 if (i > 0)
1590 break;
1591 }
1592
1593 else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat)
1594 && ! find_reg_note (trial, REG_UNUSED, NULL_RTX))
1595 break;
1596 }
1597
1598 /* If we didn't find an insn that matches, return 0. */
1599 if (trial == 0)
1600 return 0;
1601
1602 /* See what resources this insn sets and needs. If they overlap, or
1603 if this insn references CC0, it can't be redundant. */
1604
1605 CLEAR_RESOURCE (&needed);
1606 CLEAR_RESOURCE (&set);
1607 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1608 mark_referenced_resources (insn, &needed, true);
1609
1610 /* If TARGET is a SEQUENCE, get the main insn. */
1611 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1612 target_main = XVECEXP (PATTERN (target), 0, 0);
1613
1614 if (resource_conflicts_p (&needed, &set)
1615 || (HAVE_cc0 && reg_mentioned_p (cc0_rtx, ipat))
1616 /* The insn requiring the delay may not set anything needed or set by
1617 INSN. */
1618 || insn_sets_resource_p (target_main, &needed, true)
1619 || insn_sets_resource_p (target_main, &set, true))
1620 return 0;
1621
1622 /* Insns we pass may not set either NEEDED or SET, so merge them for
1623 simpler tests. */
1624 needed.memory |= set.memory;
1625 IOR_HARD_REG_SET (needed.regs, set.regs);
1626
1627 /* This insn isn't redundant if it conflicts with an insn that either is
1628 or will be in a delay slot of TARGET. */
1629
1630 while (delay_list)
1631 {
1632 if (insn_sets_resource_p (XEXP (delay_list, 0), &needed, true))
1633 return 0;
1634 delay_list = XEXP (delay_list, 1);
1635 }
1636
1637 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1638 for (i = 1; i < XVECLEN (PATTERN (target), 0); i++)
1639 if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed,
1640 true))
1641 return 0;
1642
1643 /* Scan backwards until we reach a label or an insn that uses something
1644 INSN sets or sets something insn uses or sets. */
1645
1646 for (trial = PREV_INSN (target),
1647 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1648 trial && !LABEL_P (trial) && insns_to_search > 0;
1649 trial = PREV_INSN (trial))
1650 {
1651 if (!INSN_P (trial))
1652 continue;
1653 --insns_to_search;
1654
1655 pat = PATTERN (trial);
1656 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1657 continue;
1658
1659 if (rtx_sequence *seq = dyn_cast <rtx_sequence *> (pat))
1660 {
1661 bool annul_p = false;
1662 rtx_insn *control = seq->insn (0);
1663
1664 /* If this is a CALL_INSN and its delay slots, it is hard to track
1665 the resource needs properly, so give up. */
1666 if (CALL_P (control))
1667 return 0;
1668
1669 /* If this is an INSN or JUMP_INSN with delayed effects, it
1670 is hard to track the resource needs properly, so give up. */
1671
1672 if (INSN_SETS_ARE_DELAYED (control))
1673 return 0;
1674
1675 if (INSN_REFERENCES_ARE_DELAYED (control))
1676 return 0;
1677
1678 if (JUMP_P (control))
1679 annul_p = INSN_ANNULLED_BRANCH_P (control);
1680
1681 /* See if any of the insns in the delay slot match, updating
1682 resource requirements as we go. */
1683 for (i = seq->len () - 1; i > 0; i--)
1684 {
1685 rtx candidate = seq->element (i);
1686
1687 /* If an insn will be annulled if the branch is false, it isn't
1688 considered as a possible duplicate insn. */
1689 if (rtx_equal_p (PATTERN (candidate), ipat)
1690 && ! (annul_p && INSN_FROM_TARGET_P (candidate)))
1691 {
1692 /* Show that this insn will be used in the sequel. */
1693 INSN_FROM_TARGET_P (candidate) = 0;
1694 return candidate;
1695 }
1696
1697 /* Unless this is an annulled insn from the target of a branch,
1698 we must stop if it sets anything needed or set by INSN. */
1699 if ((!annul_p || !INSN_FROM_TARGET_P (candidate))
1700 && insn_sets_resource_p (candidate, &needed, true))
1701 return 0;
1702 }
1703
1704 /* If the insn requiring the delay slot conflicts with INSN, we
1705 must stop. */
1706 if (insn_sets_resource_p (control, &needed, true))
1707 return 0;
1708 }
1709 else
1710 {
1711 /* See if TRIAL is the same as INSN. */
1712 pat = PATTERN (trial);
1713 if (rtx_equal_p (pat, ipat))
1714 return trial;
1715
1716 /* Can't go any further if TRIAL conflicts with INSN. */
1717 if (insn_sets_resource_p (trial, &needed, true))
1718 return 0;
1719 }
1720 }
1721
1722 return 0;
1723 }
1724 \f
1725 /* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero,
1726 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1727 is nonzero, we are allowed to fall into this thread; otherwise, we are
1728 not.
1729
1730 If LABEL is used more than one or we pass a label other than LABEL before
1731 finding an active insn, we do not own this thread. */
1732
1733 static int
1734 own_thread_p (rtx thread, rtx label, int allow_fallthrough)
1735 {
1736 rtx_insn *active_insn;
1737 rtx_insn *insn;
1738
1739 /* We don't own the function end. */
1740 if (thread == 0 || ANY_RETURN_P (thread))
1741 return 0;
1742
1743 /* We have a non-NULL insn. */
1744 rtx_insn *thread_insn = as_a <rtx_insn *> (thread);
1745
1746 /* Get the first active insn, or THREAD_INSN, if it is an active insn. */
1747 active_insn = next_active_insn (PREV_INSN (thread_insn));
1748
1749 for (insn = thread_insn; insn != active_insn; insn = NEXT_INSN (insn))
1750 if (LABEL_P (insn)
1751 && (insn != label || LABEL_NUSES (insn) != 1))
1752 return 0;
1753
1754 if (allow_fallthrough)
1755 return 1;
1756
1757 /* Ensure that we reach a BARRIER before any insn or label. */
1758 for (insn = prev_nonnote_insn (thread_insn);
1759 insn == 0 || !BARRIER_P (insn);
1760 insn = prev_nonnote_insn (insn))
1761 if (insn == 0
1762 || LABEL_P (insn)
1763 || (NONJUMP_INSN_P (insn)
1764 && GET_CODE (PATTERN (insn)) != USE
1765 && GET_CODE (PATTERN (insn)) != CLOBBER))
1766 return 0;
1767
1768 return 1;
1769 }
1770 \f
1771 /* Called when INSN is being moved from a location near the target of a jump.
1772 We leave a marker of the form (use (INSN)) immediately in front
1773 of WHERE for mark_target_live_regs. These markers will be deleted when
1774 reorg finishes.
1775
1776 We used to try to update the live status of registers if WHERE is at
1777 the start of a basic block, but that can't work since we may remove a
1778 BARRIER in relax_delay_slots. */
1779
1780 static void
1781 update_block (rtx_insn *insn, rtx where)
1782 {
1783 /* Ignore if this was in a delay slot and it came from the target of
1784 a branch. */
1785 if (INSN_FROM_TARGET_P (insn))
1786 return;
1787
1788 emit_insn_before (gen_rtx_USE (VOIDmode, insn), where);
1789
1790 /* INSN might be making a value live in a block where it didn't use to
1791 be. So recompute liveness information for this block. */
1792
1793 incr_ticks_for_insn (insn);
1794 }
1795
1796 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
1797 the basic block containing the jump. */
1798
1799 static int
1800 reorg_redirect_jump (rtx_insn *jump, rtx nlabel)
1801 {
1802 incr_ticks_for_insn (jump);
1803 return redirect_jump (jump, nlabel, 1);
1804 }
1805
1806 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
1807 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
1808 that reference values used in INSN. If we find one, then we move the
1809 REG_DEAD note to INSN.
1810
1811 This is needed to handle the case where a later insn (after INSN) has a
1812 REG_DEAD note for a register used by INSN, and this later insn subsequently
1813 gets moved before a CODE_LABEL because it is a redundant insn. In this
1814 case, mark_target_live_regs may be confused into thinking the register
1815 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
1816
1817 static void
1818 update_reg_dead_notes (rtx insn, rtx delayed_insn)
1819 {
1820 rtx p, link, next;
1821
1822 for (p = next_nonnote_insn (insn); p != delayed_insn;
1823 p = next_nonnote_insn (p))
1824 for (link = REG_NOTES (p); link; link = next)
1825 {
1826 next = XEXP (link, 1);
1827
1828 if (REG_NOTE_KIND (link) != REG_DEAD
1829 || !REG_P (XEXP (link, 0)))
1830 continue;
1831
1832 if (reg_referenced_p (XEXP (link, 0), PATTERN (insn)))
1833 {
1834 /* Move the REG_DEAD note from P to INSN. */
1835 remove_note (p, link);
1836 XEXP (link, 1) = REG_NOTES (insn);
1837 REG_NOTES (insn) = link;
1838 }
1839 }
1840 }
1841
1842 /* Called when an insn redundant with start_insn is deleted. If there
1843 is a REG_DEAD note for the target of start_insn between start_insn
1844 and stop_insn, then the REG_DEAD note needs to be deleted since the
1845 value no longer dies there.
1846
1847 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
1848 confused into thinking the register is dead. */
1849
1850 static void
1851 fix_reg_dead_note (rtx start_insn, rtx stop_insn)
1852 {
1853 rtx p, link, next;
1854
1855 for (p = next_nonnote_insn (start_insn); p != stop_insn;
1856 p = next_nonnote_insn (p))
1857 for (link = REG_NOTES (p); link; link = next)
1858 {
1859 next = XEXP (link, 1);
1860
1861 if (REG_NOTE_KIND (link) != REG_DEAD
1862 || !REG_P (XEXP (link, 0)))
1863 continue;
1864
1865 if (reg_set_p (XEXP (link, 0), PATTERN (start_insn)))
1866 {
1867 remove_note (p, link);
1868 return;
1869 }
1870 }
1871 }
1872
1873 /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN.
1874
1875 This handles the case of udivmodXi4 instructions which optimize their
1876 output depending on whether any REG_UNUSED notes are present.
1877 we must make sure that INSN calculates as many results as REDUNDANT_INSN
1878 does. */
1879
1880 static void
1881 update_reg_unused_notes (rtx insn, rtx redundant_insn)
1882 {
1883 rtx link, next;
1884
1885 for (link = REG_NOTES (insn); link; link = next)
1886 {
1887 next = XEXP (link, 1);
1888
1889 if (REG_NOTE_KIND (link) != REG_UNUSED
1890 || !REG_P (XEXP (link, 0)))
1891 continue;
1892
1893 if (! find_regno_note (redundant_insn, REG_UNUSED,
1894 REGNO (XEXP (link, 0))))
1895 remove_note (insn, link);
1896 }
1897 }
1898 \f
1899 static vec <rtx> sibling_labels;
1900
1901 /* Return the label before INSN, or put a new label there. If SIBLING is
1902 non-zero, it is another label associated with the new label (if any),
1903 typically the former target of the jump that will be redirected to
1904 the new label. */
1905
1906 static rtx_insn *
1907 get_label_before (rtx_insn *insn, rtx sibling)
1908 {
1909 rtx_insn *label;
1910
1911 /* Find an existing label at this point
1912 or make a new one if there is none. */
1913 label = prev_nonnote_insn (insn);
1914
1915 if (label == 0 || !LABEL_P (label))
1916 {
1917 rtx_insn *prev = PREV_INSN (insn);
1918
1919 label = gen_label_rtx ();
1920 emit_label_after (label, prev);
1921 LABEL_NUSES (label) = 0;
1922 if (sibling)
1923 {
1924 sibling_labels.safe_push (label);
1925 sibling_labels.safe_push (sibling);
1926 }
1927 }
1928 return label;
1929 }
1930
1931 /* Scan a function looking for insns that need a delay slot and find insns to
1932 put into the delay slot.
1933
1934 NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such
1935 as calls). We do these first since we don't want jump insns (that are
1936 easier to fill) to get the only insns that could be used for non-jump insns.
1937 When it is zero, only try to fill JUMP_INSNs.
1938
1939 When slots are filled in this manner, the insns (including the
1940 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
1941 it is possible to tell whether a delay slot has really been filled
1942 or not. `final' knows how to deal with this, by communicating
1943 through FINAL_SEQUENCE. */
1944
1945 static void
1946 fill_simple_delay_slots (int non_jumps_p)
1947 {
1948 rtx_insn *insn, *trial, *next_trial;
1949 rtx pat;
1950 int i;
1951 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
1952 struct resources needed, set;
1953 int slots_to_fill, slots_filled;
1954 rtx_insn_list *delay_list;
1955
1956 for (i = 0; i < num_unfilled_slots; i++)
1957 {
1958 int flags;
1959 /* Get the next insn to fill. If it has already had any slots assigned,
1960 we can't do anything with it. Maybe we'll improve this later. */
1961
1962 insn = unfilled_slots_base[i];
1963 if (insn == 0
1964 || insn->deleted ()
1965 || (NONJUMP_INSN_P (insn)
1966 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1967 || (JUMP_P (insn) && non_jumps_p)
1968 || (!JUMP_P (insn) && ! non_jumps_p))
1969 continue;
1970
1971 /* It may have been that this insn used to need delay slots, but
1972 now doesn't; ignore in that case. This can happen, for example,
1973 on the HP PA RISC, where the number of delay slots depends on
1974 what insns are nearby. */
1975 slots_to_fill = num_delay_slots (insn);
1976
1977 /* Some machine description have defined instructions to have
1978 delay slots only in certain circumstances which may depend on
1979 nearby insns (which change due to reorg's actions).
1980
1981 For example, the PA port normally has delay slots for unconditional
1982 jumps.
1983
1984 However, the PA port claims such jumps do not have a delay slot
1985 if they are immediate successors of certain CALL_INSNs. This
1986 allows the port to favor filling the delay slot of the call with
1987 the unconditional jump. */
1988 if (slots_to_fill == 0)
1989 continue;
1990
1991 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
1992 says how many. After initialization, first try optimizing
1993
1994 call _foo call _foo
1995 nop add %o7,.-L1,%o7
1996 b,a L1
1997 nop
1998
1999 If this case applies, the delay slot of the call is filled with
2000 the unconditional jump. This is done first to avoid having the
2001 delay slot of the call filled in the backward scan. Also, since
2002 the unconditional jump is likely to also have a delay slot, that
2003 insn must exist when it is subsequently scanned.
2004
2005 This is tried on each insn with delay slots as some machines
2006 have insns which perform calls, but are not represented as
2007 CALL_INSNs. */
2008
2009 slots_filled = 0;
2010 delay_list = 0;
2011
2012 if (JUMP_P (insn))
2013 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2014 else
2015 flags = get_jump_flags (insn, NULL_RTX);
2016
2017 if ((trial = next_active_insn (insn))
2018 && JUMP_P (trial)
2019 && simplejump_p (trial)
2020 && eligible_for_delay (insn, slots_filled, trial, flags)
2021 && no_labels_between_p (insn, trial)
2022 && ! can_throw_internal (trial))
2023 {
2024 rtx_insn **tmp;
2025 slots_filled++;
2026 delay_list = add_to_delay_list (trial, delay_list);
2027
2028 /* TRIAL may have had its delay slot filled, then unfilled. When
2029 the delay slot is unfilled, TRIAL is placed back on the unfilled
2030 slots obstack. Unfortunately, it is placed on the end of the
2031 obstack, not in its original location. Therefore, we must search
2032 from entry i + 1 to the end of the unfilled slots obstack to
2033 try and find TRIAL. */
2034 tmp = &unfilled_slots_base[i + 1];
2035 while (*tmp != trial && tmp != unfilled_slots_next)
2036 tmp++;
2037
2038 /* Remove the unconditional jump from consideration for delay slot
2039 filling and unthread it. */
2040 if (*tmp == trial)
2041 *tmp = 0;
2042 {
2043 rtx_insn *next = NEXT_INSN (trial);
2044 rtx_insn *prev = PREV_INSN (trial);
2045 if (prev)
2046 SET_NEXT_INSN (prev) = next;
2047 if (next)
2048 SET_PREV_INSN (next) = prev;
2049 }
2050 }
2051
2052 /* Now, scan backwards from the insn to search for a potential
2053 delay-slot candidate. Stop searching when a label or jump is hit.
2054
2055 For each candidate, if it is to go into the delay slot (moved
2056 forward in execution sequence), it must not need or set any resources
2057 that were set by later insns and must not set any resources that
2058 are needed for those insns.
2059
2060 The delay slot insn itself sets resources unless it is a call
2061 (in which case the called routine, not the insn itself, is doing
2062 the setting). */
2063
2064 if (slots_filled < slots_to_fill)
2065 {
2066 /* If the flags register is dead after the insn, then we want to be
2067 able to accept a candidate that clobbers it. For this purpose,
2068 we need to filter the flags register during life analysis, so
2069 that it doesn't create RAW and WAW dependencies, while still
2070 creating the necessary WAR dependencies. */
2071 bool filter_flags
2072 = (slots_to_fill == 1
2073 && targetm.flags_regnum != INVALID_REGNUM
2074 && find_regno_note (insn, REG_DEAD, targetm.flags_regnum));
2075 struct resources fset;
2076 CLEAR_RESOURCE (&needed);
2077 CLEAR_RESOURCE (&set);
2078 mark_set_resources (insn, &set, 0, MARK_SRC_DEST);
2079 if (filter_flags)
2080 {
2081 CLEAR_RESOURCE (&fset);
2082 mark_set_resources (insn, &fset, 0, MARK_SRC_DEST);
2083 }
2084 mark_referenced_resources (insn, &needed, false);
2085
2086 for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1);
2087 trial = next_trial)
2088 {
2089 next_trial = prev_nonnote_insn (trial);
2090
2091 /* This must be an INSN or CALL_INSN. */
2092 pat = PATTERN (trial);
2093
2094 /* Stand-alone USE and CLOBBER are just for flow. */
2095 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2096 continue;
2097
2098 /* Check for resource conflict first, to avoid unnecessary
2099 splitting. */
2100 if (! insn_references_resource_p (trial, &set, true)
2101 && ! insn_sets_resource_p (trial,
2102 filter_flags ? &fset : &set,
2103 true)
2104 && ! insn_sets_resource_p (trial, &needed, true)
2105 /* Can't separate set of cc0 from its use. */
2106 && (!HAVE_cc0 || ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat)))
2107 && ! can_throw_internal (trial))
2108 {
2109 trial = try_split (pat, trial, 1);
2110 next_trial = prev_nonnote_insn (trial);
2111 if (eligible_for_delay (insn, slots_filled, trial, flags))
2112 {
2113 /* In this case, we are searching backward, so if we
2114 find insns to put on the delay list, we want
2115 to put them at the head, rather than the
2116 tail, of the list. */
2117
2118 update_reg_dead_notes (trial, insn);
2119 delay_list = gen_rtx_INSN_LIST (VOIDmode,
2120 trial, delay_list);
2121 update_block (trial, trial);
2122 delete_related_insns (trial);
2123 if (slots_to_fill == ++slots_filled)
2124 break;
2125 continue;
2126 }
2127 }
2128
2129 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2130 if (filter_flags)
2131 {
2132 mark_set_resources (trial, &fset, 0, MARK_SRC_DEST_CALL);
2133 /* If the flags register is set, then it doesn't create RAW
2134 dependencies any longer and it also doesn't create WAW
2135 dependencies since it's dead after the original insn. */
2136 if (TEST_HARD_REG_BIT (fset.regs, targetm.flags_regnum))
2137 {
2138 CLEAR_HARD_REG_BIT (needed.regs, targetm.flags_regnum);
2139 CLEAR_HARD_REG_BIT (fset.regs, targetm.flags_regnum);
2140 }
2141 }
2142 mark_referenced_resources (trial, &needed, true);
2143 }
2144 }
2145
2146 /* If all needed slots haven't been filled, we come here. */
2147
2148 /* Try to optimize case of jumping around a single insn. */
2149 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2150 if (slots_filled != slots_to_fill
2151 && delay_list == 0
2152 && JUMP_P (insn)
2153 && (condjump_p (insn) || condjump_in_parallel_p (insn))
2154 && !ANY_RETURN_P (JUMP_LABEL (insn)))
2155 {
2156 delay_list = optimize_skip (insn);
2157 if (delay_list)
2158 slots_filled += 1;
2159 }
2160 #endif
2161
2162 /* Try to get insns from beyond the insn needing the delay slot.
2163 These insns can neither set or reference resources set in insns being
2164 skipped, cannot set resources in the insn being skipped, and, if this
2165 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2166 call might not return).
2167
2168 There used to be code which continued past the target label if
2169 we saw all uses of the target label. This code did not work,
2170 because it failed to account for some instructions which were
2171 both annulled and marked as from the target. This can happen as a
2172 result of optimize_skip. Since this code was redundant with
2173 fill_eager_delay_slots anyways, it was just deleted. */
2174
2175 if (slots_filled != slots_to_fill
2176 /* If this instruction could throw an exception which is
2177 caught in the same function, then it's not safe to fill
2178 the delay slot with an instruction from beyond this
2179 point. For example, consider:
2180
2181 int i = 2;
2182
2183 try {
2184 f();
2185 i = 3;
2186 } catch (...) {}
2187
2188 return i;
2189
2190 Even though `i' is a local variable, we must be sure not
2191 to put `i = 3' in the delay slot if `f' might throw an
2192 exception.
2193
2194 Presumably, we should also check to see if we could get
2195 back to this function via `setjmp'. */
2196 && ! can_throw_internal (insn)
2197 && !JUMP_P (insn))
2198 {
2199 int maybe_never = 0;
2200 rtx pat, trial_delay;
2201
2202 CLEAR_RESOURCE (&needed);
2203 CLEAR_RESOURCE (&set);
2204 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
2205 mark_referenced_resources (insn, &needed, true);
2206
2207 if (CALL_P (insn))
2208 maybe_never = 1;
2209
2210 for (trial = next_nonnote_insn (insn); !stop_search_p (trial, 1);
2211 trial = next_trial)
2212 {
2213 next_trial = next_nonnote_insn (trial);
2214
2215 /* This must be an INSN or CALL_INSN. */
2216 pat = PATTERN (trial);
2217
2218 /* Stand-alone USE and CLOBBER are just for flow. */
2219 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2220 continue;
2221
2222 /* If this already has filled delay slots, get the insn needing
2223 the delay slots. */
2224 if (GET_CODE (pat) == SEQUENCE)
2225 trial_delay = XVECEXP (pat, 0, 0);
2226 else
2227 trial_delay = trial;
2228
2229 /* Stop our search when seeing a jump. */
2230 if (JUMP_P (trial_delay))
2231 break;
2232
2233 /* See if we have a resource problem before we try to split. */
2234 if (GET_CODE (pat) != SEQUENCE
2235 && ! insn_references_resource_p (trial, &set, true)
2236 && ! insn_sets_resource_p (trial, &set, true)
2237 && ! insn_sets_resource_p (trial, &needed, true)
2238 && (!HAVE_cc0 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat)))
2239 && ! (maybe_never && may_trap_or_fault_p (pat))
2240 && (trial = try_split (pat, trial, 0))
2241 && eligible_for_delay (insn, slots_filled, trial, flags)
2242 && ! can_throw_internal (trial))
2243 {
2244 next_trial = next_nonnote_insn (trial);
2245 delay_list = add_to_delay_list (trial, delay_list);
2246 if (HAVE_cc0 && reg_mentioned_p (cc0_rtx, pat))
2247 link_cc0_insns (trial);
2248
2249 delete_related_insns (trial);
2250 if (slots_to_fill == ++slots_filled)
2251 break;
2252 continue;
2253 }
2254
2255 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2256 mark_referenced_resources (trial, &needed, true);
2257
2258 /* Ensure we don't put insns between the setting of cc and the
2259 comparison by moving a setting of cc into an earlier delay
2260 slot since these insns could clobber the condition code. */
2261 set.cc = 1;
2262
2263 /* If this is a call, we might not get here. */
2264 if (CALL_P (trial_delay))
2265 maybe_never = 1;
2266 }
2267
2268 /* If there are slots left to fill and our search was stopped by an
2269 unconditional branch, try the insn at the branch target. We can
2270 redirect the branch if it works.
2271
2272 Don't do this if the insn at the branch target is a branch. */
2273 if (slots_to_fill != slots_filled
2274 && trial
2275 && jump_to_label_p (trial)
2276 && simplejump_p (trial)
2277 && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0
2278 && ! (NONJUMP_INSN_P (next_trial)
2279 && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
2280 && !JUMP_P (next_trial)
2281 && ! insn_references_resource_p (next_trial, &set, true)
2282 && ! insn_sets_resource_p (next_trial, &set, true)
2283 && ! insn_sets_resource_p (next_trial, &needed, true)
2284 && (!HAVE_cc0 || ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial)))
2285 && ! (maybe_never && may_trap_or_fault_p (PATTERN (next_trial)))
2286 && (next_trial = try_split (PATTERN (next_trial), next_trial, 0))
2287 && eligible_for_delay (insn, slots_filled, next_trial, flags)
2288 && ! can_throw_internal (trial))
2289 {
2290 /* See comment in relax_delay_slots about necessity of using
2291 next_real_insn here. */
2292 rtx_insn *new_label = next_real_insn (next_trial);
2293
2294 if (new_label != 0)
2295 new_label = get_label_before (new_label, JUMP_LABEL (trial));
2296 else
2297 new_label = find_end_label (simple_return_rtx);
2298
2299 if (new_label)
2300 {
2301 delay_list
2302 = add_to_delay_list (copy_delay_slot_insn (next_trial),
2303 delay_list);
2304 slots_filled++;
2305 reorg_redirect_jump (trial, new_label);
2306 }
2307 }
2308 }
2309
2310 /* If this is an unconditional jump, then try to get insns from the
2311 target of the jump. */
2312 if (JUMP_P (insn)
2313 && simplejump_p (insn)
2314 && slots_filled != slots_to_fill)
2315 delay_list
2316 = fill_slots_from_thread (insn, const_true_rtx,
2317 next_active_insn (JUMP_LABEL (insn)),
2318 NULL, 1, 1,
2319 own_thread_p (JUMP_LABEL (insn),
2320 JUMP_LABEL (insn), 0),
2321 slots_to_fill, &slots_filled,
2322 delay_list);
2323
2324 if (delay_list)
2325 unfilled_slots_base[i]
2326 = emit_delay_sequence (insn, delay_list, slots_filled);
2327
2328 if (slots_to_fill == slots_filled)
2329 unfilled_slots_base[i] = 0;
2330
2331 note_delay_statistics (slots_filled, 0);
2332 }
2333 }
2334 \f
2335 /* Follow any unconditional jump at LABEL, for the purpose of redirecting JUMP;
2336 return the ultimate label reached by any such chain of jumps.
2337 Return a suitable return rtx if the chain ultimately leads to a
2338 return instruction.
2339 If LABEL is not followed by a jump, return LABEL.
2340 If the chain loops or we can't find end, return LABEL,
2341 since that tells caller to avoid changing the insn.
2342 If the returned label is obtained by following a crossing jump,
2343 set *CROSSING to true, otherwise set it to false. */
2344
2345 static rtx
2346 follow_jumps (rtx label, rtx_insn *jump, bool *crossing)
2347 {
2348 rtx_insn *insn;
2349 rtx_insn *next;
2350 int depth;
2351
2352 *crossing = false;
2353 if (ANY_RETURN_P (label))
2354 return label;
2355
2356 rtx_insn *value = as_a <rtx_insn *> (label);
2357
2358 for (depth = 0;
2359 (depth < 10
2360 && (insn = next_active_insn (value)) != 0
2361 && JUMP_P (insn)
2362 && JUMP_LABEL (insn) != NULL_RTX
2363 && ((any_uncondjump_p (insn) && onlyjump_p (insn))
2364 || ANY_RETURN_P (PATTERN (insn)))
2365 && (next = NEXT_INSN (insn))
2366 && BARRIER_P (next));
2367 depth++)
2368 {
2369 rtx this_label_or_return = JUMP_LABEL (insn);
2370
2371 /* If we have found a cycle, make the insn jump to itself. */
2372 if (this_label_or_return == label)
2373 return label;
2374
2375 /* Cannot follow returns and cannot look through tablejumps. */
2376 if (ANY_RETURN_P (this_label_or_return))
2377 return this_label_or_return;
2378
2379 rtx_insn *this_label = as_a <rtx_insn *> (this_label_or_return);
2380 if (NEXT_INSN (this_label)
2381 && JUMP_TABLE_DATA_P (NEXT_INSN (this_label)))
2382 break;
2383
2384 if (!targetm.can_follow_jump (jump, insn))
2385 break;
2386 if (!*crossing)
2387 *crossing = CROSSING_JUMP_P (jump);
2388 value = this_label;
2389 }
2390 if (depth == 10)
2391 return label;
2392 return value;
2393 }
2394
2395 /* Try to find insns to place in delay slots.
2396
2397 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2398 or is an unconditional branch if CONDITION is const_true_rtx.
2399 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2400
2401 THREAD is a flow-of-control, either the insns to be executed if the
2402 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2403
2404 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2405 to see if any potential delay slot insns set things needed there.
2406
2407 LIKELY is nonzero if it is extremely likely that the branch will be
2408 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2409 end of a loop back up to the top.
2410
2411 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
2412 thread. I.e., it is the fallthrough code of our jump or the target of the
2413 jump when we are the only jump going there.
2414
2415 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2416 case, we can only take insns from the head of the thread for our delay
2417 slot. We then adjust the jump to point after the insns we have taken. */
2418
2419 static rtx_insn_list *
2420 fill_slots_from_thread (rtx_insn *insn, rtx condition, rtx thread_or_return,
2421 rtx opposite_thread, int likely,
2422 int thread_if_true,
2423 int own_thread, int slots_to_fill,
2424 int *pslots_filled, rtx_insn_list *delay_list)
2425 {
2426 rtx new_thread;
2427 struct resources opposite_needed, set, needed;
2428 rtx_insn *trial;
2429 int lose = 0;
2430 int must_annul = 0;
2431 int flags;
2432
2433 /* Validate our arguments. */
2434 gcc_assert (condition != const_true_rtx || thread_if_true);
2435 gcc_assert (own_thread || thread_if_true);
2436
2437 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2438
2439 /* If our thread is the end of subroutine, we can't get any delay
2440 insns from that. */
2441 if (thread_or_return == NULL_RTX || ANY_RETURN_P (thread_or_return))
2442 return delay_list;
2443
2444 rtx_insn *thread = as_a <rtx_insn *> (thread_or_return);
2445
2446 /* If this is an unconditional branch, nothing is needed at the
2447 opposite thread. Otherwise, compute what is needed there. */
2448 if (condition == const_true_rtx)
2449 CLEAR_RESOURCE (&opposite_needed);
2450 else
2451 mark_target_live_regs (get_insns (), opposite_thread, &opposite_needed);
2452
2453 /* If the insn at THREAD can be split, do it here to avoid having to
2454 update THREAD and NEW_THREAD if it is done in the loop below. Also
2455 initialize NEW_THREAD. */
2456
2457 new_thread = thread = try_split (PATTERN (thread), thread, 0);
2458
2459 /* Scan insns at THREAD. We are looking for an insn that can be removed
2460 from THREAD (it neither sets nor references resources that were set
2461 ahead of it and it doesn't set anything needs by the insns ahead of
2462 it) and that either can be placed in an annulling insn or aren't
2463 needed at OPPOSITE_THREAD. */
2464
2465 CLEAR_RESOURCE (&needed);
2466 CLEAR_RESOURCE (&set);
2467
2468 /* If we do not own this thread, we must stop as soon as we find
2469 something that we can't put in a delay slot, since all we can do
2470 is branch into THREAD at a later point. Therefore, labels stop
2471 the search if this is not the `true' thread. */
2472
2473 for (trial = thread;
2474 ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread);
2475 trial = next_nonnote_insn (trial))
2476 {
2477 rtx pat, old_trial;
2478
2479 /* If we have passed a label, we no longer own this thread. */
2480 if (LABEL_P (trial))
2481 {
2482 own_thread = 0;
2483 continue;
2484 }
2485
2486 pat = PATTERN (trial);
2487 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2488 continue;
2489
2490 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
2491 don't separate or copy insns that set and use CC0. */
2492 if (! insn_references_resource_p (trial, &set, true)
2493 && ! insn_sets_resource_p (trial, &set, true)
2494 && ! insn_sets_resource_p (trial, &needed, true)
2495 && (!HAVE_cc0 || (! (reg_mentioned_p (cc0_rtx, pat)
2496 && (! own_thread || ! sets_cc0_p (pat)))))
2497 && ! can_throw_internal (trial))
2498 {
2499 rtx prior_insn;
2500
2501 /* If TRIAL is redundant with some insn before INSN, we don't
2502 actually need to add it to the delay list; we can merely pretend
2503 we did. */
2504 if ((prior_insn = redundant_insn (trial, insn, delay_list)))
2505 {
2506 fix_reg_dead_note (prior_insn, insn);
2507 if (own_thread)
2508 {
2509 update_block (trial, thread);
2510 if (trial == thread)
2511 {
2512 thread = next_active_insn (thread);
2513 if (new_thread == trial)
2514 new_thread = thread;
2515 }
2516
2517 delete_related_insns (trial);
2518 }
2519 else
2520 {
2521 update_reg_unused_notes (prior_insn, trial);
2522 new_thread = next_active_insn (trial);
2523 }
2524
2525 continue;
2526 }
2527
2528 /* There are two ways we can win: If TRIAL doesn't set anything
2529 needed at the opposite thread and can't trap, or if it can
2530 go into an annulled delay slot. But we want neither to copy
2531 nor to speculate frame-related insns. */
2532 if (!must_annul
2533 && ((condition == const_true_rtx
2534 && (own_thread || !RTX_FRAME_RELATED_P (trial)))
2535 || (! insn_sets_resource_p (trial, &opposite_needed, true)
2536 && ! may_trap_or_fault_p (pat)
2537 && ! RTX_FRAME_RELATED_P (trial))))
2538 {
2539 old_trial = trial;
2540 trial = try_split (pat, trial, 0);
2541 if (new_thread == old_trial)
2542 new_thread = trial;
2543 if (thread == old_trial)
2544 thread = trial;
2545 pat = PATTERN (trial);
2546 if (eligible_for_delay (insn, *pslots_filled, trial, flags))
2547 goto winner;
2548 }
2549 else if (0
2550 #ifdef ANNUL_IFTRUE_SLOTS
2551 || ! thread_if_true
2552 #endif
2553 #ifdef ANNUL_IFFALSE_SLOTS
2554 || thread_if_true
2555 #endif
2556 )
2557 {
2558 old_trial = trial;
2559 trial = try_split (pat, trial, 0);
2560 if (new_thread == old_trial)
2561 new_thread = trial;
2562 if (thread == old_trial)
2563 thread = trial;
2564 pat = PATTERN (trial);
2565 if ((must_annul || delay_list == NULL) && (thread_if_true
2566 ? check_annul_list_true_false (0, delay_list)
2567 && eligible_for_annul_false (insn, *pslots_filled, trial, flags)
2568 : check_annul_list_true_false (1, delay_list)
2569 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
2570 {
2571 rtx_insn *temp;
2572
2573 must_annul = 1;
2574 winner:
2575
2576 if (HAVE_cc0 && reg_mentioned_p (cc0_rtx, pat))
2577 link_cc0_insns (trial);
2578
2579 /* If we own this thread, delete the insn. If this is the
2580 destination of a branch, show that a basic block status
2581 may have been updated. In any case, mark the new
2582 starting point of this thread. */
2583 if (own_thread)
2584 {
2585 rtx note;
2586
2587 update_block (trial, thread);
2588 if (trial == thread)
2589 {
2590 thread = next_active_insn (thread);
2591 if (new_thread == trial)
2592 new_thread = thread;
2593 }
2594
2595 /* We are moving this insn, not deleting it. We must
2596 temporarily increment the use count on any referenced
2597 label lest it be deleted by delete_related_insns. */
2598 for (note = REG_NOTES (trial);
2599 note != NULL_RTX;
2600 note = XEXP (note, 1))
2601 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2602 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2603 {
2604 /* REG_LABEL_OPERAND could be
2605 NOTE_INSN_DELETED_LABEL too. */
2606 if (LABEL_P (XEXP (note, 0)))
2607 LABEL_NUSES (XEXP (note, 0))++;
2608 else
2609 gcc_assert (REG_NOTE_KIND (note)
2610 == REG_LABEL_OPERAND);
2611 }
2612 if (jump_to_label_p (trial))
2613 LABEL_NUSES (JUMP_LABEL (trial))++;
2614
2615 delete_related_insns (trial);
2616
2617 for (note = REG_NOTES (trial);
2618 note != NULL_RTX;
2619 note = XEXP (note, 1))
2620 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2621 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2622 {
2623 /* REG_LABEL_OPERAND could be
2624 NOTE_INSN_DELETED_LABEL too. */
2625 if (LABEL_P (XEXP (note, 0)))
2626 LABEL_NUSES (XEXP (note, 0))--;
2627 else
2628 gcc_assert (REG_NOTE_KIND (note)
2629 == REG_LABEL_OPERAND);
2630 }
2631 if (jump_to_label_p (trial))
2632 LABEL_NUSES (JUMP_LABEL (trial))--;
2633 }
2634 else
2635 new_thread = next_active_insn (trial);
2636
2637 temp = own_thread ? trial : copy_delay_slot_insn (trial);
2638 if (thread_if_true)
2639 INSN_FROM_TARGET_P (temp) = 1;
2640
2641 delay_list = add_to_delay_list (temp, delay_list);
2642
2643 if (slots_to_fill == ++(*pslots_filled))
2644 {
2645 /* Even though we have filled all the slots, we
2646 may be branching to a location that has a
2647 redundant insn. Skip any if so. */
2648 while (new_thread && ! own_thread
2649 && ! insn_sets_resource_p (new_thread, &set, true)
2650 && ! insn_sets_resource_p (new_thread, &needed,
2651 true)
2652 && ! insn_references_resource_p (new_thread,
2653 &set, true)
2654 && (prior_insn
2655 = redundant_insn (new_thread, insn,
2656 delay_list)))
2657 {
2658 /* We know we do not own the thread, so no need
2659 to call update_block and delete_insn. */
2660 fix_reg_dead_note (prior_insn, insn);
2661 update_reg_unused_notes (prior_insn, new_thread);
2662 new_thread = next_active_insn (new_thread);
2663 }
2664 break;
2665 }
2666
2667 continue;
2668 }
2669 }
2670 }
2671
2672 /* This insn can't go into a delay slot. */
2673 lose = 1;
2674 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2675 mark_referenced_resources (trial, &needed, true);
2676
2677 /* Ensure we don't put insns between the setting of cc and the comparison
2678 by moving a setting of cc into an earlier delay slot since these insns
2679 could clobber the condition code. */
2680 set.cc = 1;
2681
2682 /* If this insn is a register-register copy and the next insn has
2683 a use of our destination, change it to use our source. That way,
2684 it will become a candidate for our delay slot the next time
2685 through this loop. This case occurs commonly in loops that
2686 scan a list.
2687
2688 We could check for more complex cases than those tested below,
2689 but it doesn't seem worth it. It might also be a good idea to try
2690 to swap the two insns. That might do better.
2691
2692 We can't do this if the next insn modifies our destination, because
2693 that would make the replacement into the insn invalid. We also can't
2694 do this if it modifies our source, because it might be an earlyclobber
2695 operand. This latter test also prevents updating the contents of
2696 a PRE_INC. We also can't do this if there's overlap of source and
2697 destination. Overlap may happen for larger-than-register-size modes. */
2698
2699 if (NONJUMP_INSN_P (trial) && GET_CODE (pat) == SET
2700 && REG_P (SET_SRC (pat))
2701 && REG_P (SET_DEST (pat))
2702 && !reg_overlap_mentioned_p (SET_DEST (pat), SET_SRC (pat)))
2703 {
2704 rtx next = next_nonnote_insn (trial);
2705
2706 if (next && NONJUMP_INSN_P (next)
2707 && GET_CODE (PATTERN (next)) != USE
2708 && ! reg_set_p (SET_DEST (pat), next)
2709 && ! reg_set_p (SET_SRC (pat), next)
2710 && reg_referenced_p (SET_DEST (pat), PATTERN (next))
2711 && ! modified_in_p (SET_DEST (pat), next))
2712 validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next);
2713 }
2714 }
2715
2716 /* If we stopped on a branch insn that has delay slots, see if we can
2717 steal some of the insns in those slots. */
2718 if (trial && NONJUMP_INSN_P (trial)
2719 && GET_CODE (PATTERN (trial)) == SEQUENCE
2720 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0)))
2721 {
2722 rtx_sequence *sequence = as_a <rtx_sequence *> (PATTERN (trial));
2723 /* If this is the `true' thread, we will want to follow the jump,
2724 so we can only do this if we have taken everything up to here. */
2725 if (thread_if_true && trial == new_thread)
2726 {
2727 delay_list
2728 = steal_delay_list_from_target (insn, condition, sequence,
2729 delay_list, &set, &needed,
2730 &opposite_needed, slots_to_fill,
2731 pslots_filled, &must_annul,
2732 &new_thread);
2733 /* If we owned the thread and are told that it branched
2734 elsewhere, make sure we own the thread at the new location. */
2735 if (own_thread && trial != new_thread)
2736 own_thread = own_thread_p (new_thread, new_thread, 0);
2737 }
2738 else if (! thread_if_true)
2739 delay_list
2740 = steal_delay_list_from_fallthrough (insn, condition,
2741 sequence,
2742 delay_list, &set, &needed,
2743 &opposite_needed, slots_to_fill,
2744 pslots_filled, &must_annul);
2745 }
2746
2747 /* If we haven't found anything for this delay slot and it is very
2748 likely that the branch will be taken, see if the insn at our target
2749 increments or decrements a register with an increment that does not
2750 depend on the destination register. If so, try to place the opposite
2751 arithmetic insn after the jump insn and put the arithmetic insn in the
2752 delay slot. If we can't do this, return. */
2753 if (delay_list == 0 && likely
2754 && new_thread && !ANY_RETURN_P (new_thread)
2755 && NONJUMP_INSN_P (new_thread)
2756 && !RTX_FRAME_RELATED_P (new_thread)
2757 && GET_CODE (PATTERN (new_thread)) != ASM_INPUT
2758 && asm_noperands (PATTERN (new_thread)) < 0)
2759 {
2760 rtx pat = PATTERN (new_thread);
2761 rtx dest;
2762 rtx src;
2763
2764 /* We know "new_thread" is an insn due to NONJUMP_INSN_P (new_thread)
2765 above. */
2766 trial = as_a <rtx_insn *> (new_thread);
2767 pat = PATTERN (trial);
2768
2769 if (!NONJUMP_INSN_P (trial)
2770 || GET_CODE (pat) != SET
2771 || ! eligible_for_delay (insn, 0, trial, flags)
2772 || can_throw_internal (trial))
2773 return 0;
2774
2775 dest = SET_DEST (pat), src = SET_SRC (pat);
2776 if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS)
2777 && rtx_equal_p (XEXP (src, 0), dest)
2778 && (!FLOAT_MODE_P (GET_MODE (src))
2779 || flag_unsafe_math_optimizations)
2780 && ! reg_overlap_mentioned_p (dest, XEXP (src, 1))
2781 && ! side_effects_p (pat))
2782 {
2783 rtx other = XEXP (src, 1);
2784 rtx new_arith;
2785 rtx_insn *ninsn;
2786
2787 /* If this is a constant adjustment, use the same code with
2788 the negated constant. Otherwise, reverse the sense of the
2789 arithmetic. */
2790 if (CONST_INT_P (other))
2791 new_arith = gen_rtx_fmt_ee (GET_CODE (src), GET_MODE (src), dest,
2792 negate_rtx (GET_MODE (src), other));
2793 else
2794 new_arith = gen_rtx_fmt_ee (GET_CODE (src) == PLUS ? MINUS : PLUS,
2795 GET_MODE (src), dest, other);
2796
2797 ninsn = emit_insn_after (gen_rtx_SET (VOIDmode, dest, new_arith),
2798 insn);
2799
2800 if (recog_memoized (ninsn) < 0
2801 || (extract_insn (ninsn),
2802 !constrain_operands (1, get_preferred_alternatives (ninsn))))
2803 {
2804 delete_related_insns (ninsn);
2805 return 0;
2806 }
2807
2808 if (own_thread)
2809 {
2810 update_block (trial, thread);
2811 if (trial == thread)
2812 {
2813 thread = next_active_insn (thread);
2814 if (new_thread == trial)
2815 new_thread = thread;
2816 }
2817 delete_related_insns (trial);
2818 }
2819 else
2820 new_thread = next_active_insn (trial);
2821
2822 ninsn = own_thread ? trial : copy_delay_slot_insn (trial);
2823 if (thread_if_true)
2824 INSN_FROM_TARGET_P (ninsn) = 1;
2825
2826 delay_list = add_to_delay_list (ninsn, NULL);
2827 (*pslots_filled)++;
2828 }
2829 }
2830
2831 if (delay_list && must_annul)
2832 INSN_ANNULLED_BRANCH_P (insn) = 1;
2833
2834 /* If we are to branch into the middle of this thread, find an appropriate
2835 label or make a new one if none, and redirect INSN to it. If we hit the
2836 end of the function, use the end-of-function label. */
2837 if (new_thread != thread)
2838 {
2839 rtx label;
2840 bool crossing = false;
2841
2842 gcc_assert (thread_if_true);
2843
2844 if (new_thread && simplejump_or_return_p (new_thread)
2845 && redirect_with_delay_list_safe_p (insn,
2846 JUMP_LABEL (new_thread),
2847 delay_list))
2848 new_thread = follow_jumps (JUMP_LABEL (new_thread), insn,
2849 &crossing);
2850
2851 if (ANY_RETURN_P (new_thread))
2852 label = find_end_label (new_thread);
2853 else if (LABEL_P (new_thread))
2854 label = new_thread;
2855 else
2856 label = get_label_before (as_a <rtx_insn *> (new_thread),
2857 JUMP_LABEL (insn));
2858
2859 if (label)
2860 {
2861 reorg_redirect_jump (insn, label);
2862 if (crossing)
2863 CROSSING_JUMP_P (insn) = 1;
2864 }
2865 }
2866
2867 return delay_list;
2868 }
2869 \f
2870 /* Make another attempt to find insns to place in delay slots.
2871
2872 We previously looked for insns located in front of the delay insn
2873 and, for non-jump delay insns, located behind the delay insn.
2874
2875 Here only try to schedule jump insns and try to move insns from either
2876 the target or the following insns into the delay slot. If annulling is
2877 supported, we will be likely to do this. Otherwise, we can do this only
2878 if safe. */
2879
2880 static void
2881 fill_eager_delay_slots (void)
2882 {
2883 rtx_insn *insn;
2884 int i;
2885 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2886
2887 for (i = 0; i < num_unfilled_slots; i++)
2888 {
2889 rtx condition;
2890 rtx target_label, insn_at_target;
2891 rtx_insn *fallthrough_insn;
2892 rtx_insn_list *delay_list = 0;
2893 int own_target;
2894 int own_fallthrough;
2895 int prediction, slots_to_fill, slots_filled;
2896
2897 insn = unfilled_slots_base[i];
2898 if (insn == 0
2899 || insn->deleted ()
2900 || !JUMP_P (insn)
2901 || ! (condjump_p (insn) || condjump_in_parallel_p (insn)))
2902 continue;
2903
2904 slots_to_fill = num_delay_slots (insn);
2905 /* Some machine description have defined instructions to have
2906 delay slots only in certain circumstances which may depend on
2907 nearby insns (which change due to reorg's actions).
2908
2909 For example, the PA port normally has delay slots for unconditional
2910 jumps.
2911
2912 However, the PA port claims such jumps do not have a delay slot
2913 if they are immediate successors of certain CALL_INSNs. This
2914 allows the port to favor filling the delay slot of the call with
2915 the unconditional jump. */
2916 if (slots_to_fill == 0)
2917 continue;
2918
2919 slots_filled = 0;
2920 target_label = JUMP_LABEL (insn);
2921 condition = get_branch_condition (insn, target_label);
2922
2923 if (condition == 0)
2924 continue;
2925
2926 /* Get the next active fallthrough and target insns and see if we own
2927 them. Then see whether the branch is likely true. We don't need
2928 to do a lot of this for unconditional branches. */
2929
2930 insn_at_target = first_active_target_insn (target_label);
2931 own_target = own_thread_p (target_label, target_label, 0);
2932
2933 if (condition == const_true_rtx)
2934 {
2935 own_fallthrough = 0;
2936 fallthrough_insn = 0;
2937 prediction = 2;
2938 }
2939 else
2940 {
2941 fallthrough_insn = next_active_insn (insn);
2942 own_fallthrough = own_thread_p (NEXT_INSN (insn), NULL_RTX, 1);
2943 prediction = mostly_true_jump (insn);
2944 }
2945
2946 /* If this insn is expected to branch, first try to get insns from our
2947 target, then our fallthrough insns. If it is not expected to branch,
2948 try the other order. */
2949
2950 if (prediction > 0)
2951 {
2952 delay_list
2953 = fill_slots_from_thread (insn, condition, insn_at_target,
2954 fallthrough_insn, prediction == 2, 1,
2955 own_target,
2956 slots_to_fill, &slots_filled, delay_list);
2957
2958 if (delay_list == 0 && own_fallthrough)
2959 {
2960 /* Even though we didn't find anything for delay slots,
2961 we might have found a redundant insn which we deleted
2962 from the thread that was filled. So we have to recompute
2963 the next insn at the target. */
2964 target_label = JUMP_LABEL (insn);
2965 insn_at_target = first_active_target_insn (target_label);
2966
2967 delay_list
2968 = fill_slots_from_thread (insn, condition, fallthrough_insn,
2969 insn_at_target, 0, 0,
2970 own_fallthrough,
2971 slots_to_fill, &slots_filled,
2972 delay_list);
2973 }
2974 }
2975 else
2976 {
2977 if (own_fallthrough)
2978 delay_list
2979 = fill_slots_from_thread (insn, condition, fallthrough_insn,
2980 insn_at_target, 0, 0,
2981 own_fallthrough,
2982 slots_to_fill, &slots_filled,
2983 delay_list);
2984
2985 if (delay_list == 0)
2986 delay_list
2987 = fill_slots_from_thread (insn, condition, insn_at_target,
2988 next_active_insn (insn), 0, 1,
2989 own_target,
2990 slots_to_fill, &slots_filled,
2991 delay_list);
2992 }
2993
2994 if (delay_list)
2995 unfilled_slots_base[i]
2996 = emit_delay_sequence (insn, delay_list, slots_filled);
2997
2998 if (slots_to_fill == slots_filled)
2999 unfilled_slots_base[i] = 0;
3000
3001 note_delay_statistics (slots_filled, 1);
3002 }
3003 }
3004 \f
3005 static void delete_computation (rtx insn);
3006
3007 /* Recursively delete prior insns that compute the value (used only by INSN
3008 which the caller is deleting) stored in the register mentioned by NOTE
3009 which is a REG_DEAD note associated with INSN. */
3010
3011 static void
3012 delete_prior_computation (rtx note, rtx insn)
3013 {
3014 rtx our_prev;
3015 rtx reg = XEXP (note, 0);
3016
3017 for (our_prev = prev_nonnote_insn (insn);
3018 our_prev && (NONJUMP_INSN_P (our_prev)
3019 || CALL_P (our_prev));
3020 our_prev = prev_nonnote_insn (our_prev))
3021 {
3022 rtx pat = PATTERN (our_prev);
3023
3024 /* If we reach a CALL which is not calling a const function
3025 or the callee pops the arguments, then give up. */
3026 if (CALL_P (our_prev)
3027 && (! RTL_CONST_CALL_P (our_prev)
3028 || GET_CODE (pat) != SET || GET_CODE (SET_SRC (pat)) != CALL))
3029 break;
3030
3031 /* If we reach a SEQUENCE, it is too complex to try to
3032 do anything with it, so give up. We can be run during
3033 and after reorg, so SEQUENCE rtl can legitimately show
3034 up here. */
3035 if (GET_CODE (pat) == SEQUENCE)
3036 break;
3037
3038 if (GET_CODE (pat) == USE
3039 && NONJUMP_INSN_P (XEXP (pat, 0)))
3040 /* reorg creates USEs that look like this. We leave them
3041 alone because reorg needs them for its own purposes. */
3042 break;
3043
3044 if (reg_set_p (reg, pat))
3045 {
3046 if (side_effects_p (pat) && !CALL_P (our_prev))
3047 break;
3048
3049 if (GET_CODE (pat) == PARALLEL)
3050 {
3051 /* If we find a SET of something else, we can't
3052 delete the insn. */
3053
3054 int i;
3055
3056 for (i = 0; i < XVECLEN (pat, 0); i++)
3057 {
3058 rtx part = XVECEXP (pat, 0, i);
3059
3060 if (GET_CODE (part) == SET
3061 && SET_DEST (part) != reg)
3062 break;
3063 }
3064
3065 if (i == XVECLEN (pat, 0))
3066 delete_computation (our_prev);
3067 }
3068 else if (GET_CODE (pat) == SET
3069 && REG_P (SET_DEST (pat)))
3070 {
3071 int dest_regno = REGNO (SET_DEST (pat));
3072 int dest_endregno = END_REGNO (SET_DEST (pat));
3073 int regno = REGNO (reg);
3074 int endregno = END_REGNO (reg);
3075
3076 if (dest_regno >= regno
3077 && dest_endregno <= endregno)
3078 delete_computation (our_prev);
3079
3080 /* We may have a multi-word hard register and some, but not
3081 all, of the words of the register are needed in subsequent
3082 insns. Write REG_UNUSED notes for those parts that were not
3083 needed. */
3084 else if (dest_regno <= regno
3085 && dest_endregno >= endregno)
3086 {
3087 int i;
3088
3089 add_reg_note (our_prev, REG_UNUSED, reg);
3090
3091 for (i = dest_regno; i < dest_endregno; i++)
3092 if (! find_regno_note (our_prev, REG_UNUSED, i))
3093 break;
3094
3095 if (i == dest_endregno)
3096 delete_computation (our_prev);
3097 }
3098 }
3099
3100 break;
3101 }
3102
3103 /* If PAT references the register that dies here, it is an
3104 additional use. Hence any prior SET isn't dead. However, this
3105 insn becomes the new place for the REG_DEAD note. */
3106 if (reg_overlap_mentioned_p (reg, pat))
3107 {
3108 XEXP (note, 1) = REG_NOTES (our_prev);
3109 REG_NOTES (our_prev) = note;
3110 break;
3111 }
3112 }
3113 }
3114
3115 /* Delete INSN and recursively delete insns that compute values used only
3116 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3117
3118 Look at all our REG_DEAD notes. If a previous insn does nothing other
3119 than set a register that dies in this insn, we can delete that insn
3120 as well.
3121
3122 On machines with CC0, if CC0 is used in this insn, we may be able to
3123 delete the insn that set it. */
3124
3125 static void
3126 delete_computation (rtx insn)
3127 {
3128 rtx note, next;
3129
3130 if (HAVE_cc0 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
3131 {
3132 rtx prev = prev_nonnote_insn (insn);
3133 /* We assume that at this stage
3134 CC's are always set explicitly
3135 and always immediately before the jump that
3136 will use them. So if the previous insn
3137 exists to set the CC's, delete it
3138 (unless it performs auto-increments, etc.). */
3139 if (prev && NONJUMP_INSN_P (prev)
3140 && sets_cc0_p (PATTERN (prev)))
3141 {
3142 if (sets_cc0_p (PATTERN (prev)) > 0
3143 && ! side_effects_p (PATTERN (prev)))
3144 delete_computation (prev);
3145 else
3146 /* Otherwise, show that cc0 won't be used. */
3147 add_reg_note (prev, REG_UNUSED, cc0_rtx);
3148 }
3149 }
3150
3151 for (note = REG_NOTES (insn); note; note = next)
3152 {
3153 next = XEXP (note, 1);
3154
3155 if (REG_NOTE_KIND (note) != REG_DEAD
3156 /* Verify that the REG_NOTE is legitimate. */
3157 || !REG_P (XEXP (note, 0)))
3158 continue;
3159
3160 delete_prior_computation (note, insn);
3161 }
3162
3163 delete_related_insns (insn);
3164 }
3165
3166 /* If all INSN does is set the pc, delete it,
3167 and delete the insn that set the condition codes for it
3168 if that's what the previous thing was. */
3169
3170 static void
3171 delete_jump (rtx_insn *insn)
3172 {
3173 rtx set = single_set (insn);
3174
3175 if (set && GET_CODE (SET_DEST (set)) == PC)
3176 delete_computation (insn);
3177 }
3178
3179 static rtx_insn *
3180 label_before_next_insn (rtx x, rtx scan_limit)
3181 {
3182 rtx_insn *insn = next_active_insn (x);
3183 while (insn)
3184 {
3185 insn = PREV_INSN (insn);
3186 if (insn == scan_limit || insn == NULL_RTX)
3187 return NULL;
3188 if (LABEL_P (insn))
3189 break;
3190 }
3191 return insn;
3192 }
3193
3194 /* Return TRUE if there is a NOTE_INSN_SWITCH_TEXT_SECTIONS note in between
3195 BEG and END. */
3196
3197 static bool
3198 switch_text_sections_between_p (const rtx_insn *beg, const rtx_insn *end)
3199 {
3200 const rtx_insn *p;
3201 for (p = beg; p != end; p = NEXT_INSN (p))
3202 if (NOTE_P (p) && NOTE_KIND (p) == NOTE_INSN_SWITCH_TEXT_SECTIONS)
3203 return true;
3204 return false;
3205 }
3206
3207 \f
3208 /* Once we have tried two ways to fill a delay slot, make a pass over the
3209 code to try to improve the results and to do such things as more jump
3210 threading. */
3211
3212 static void
3213 relax_delay_slots (rtx_insn *first)
3214 {
3215 rtx_insn *insn, *next;
3216 rtx_sequence *pat;
3217 rtx trial;
3218 rtx_insn *delay_insn;
3219 rtx target_label;
3220
3221 /* Look at every JUMP_INSN and see if we can improve it. */
3222 for (insn = first; insn; insn = next)
3223 {
3224 rtx_insn *other;
3225 bool crossing;
3226
3227 next = next_active_insn (insn);
3228
3229 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3230 the next insn, or jumps to a label that is not the last of a
3231 group of consecutive labels. */
3232 if (JUMP_P (insn)
3233 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3234 && !ANY_RETURN_P (target_label = JUMP_LABEL (insn)))
3235 {
3236 target_label
3237 = skip_consecutive_labels (follow_jumps (target_label, insn,
3238 &crossing));
3239 if (ANY_RETURN_P (target_label))
3240 target_label = find_end_label (target_label);
3241
3242 if (target_label && next_active_insn (target_label) == next
3243 && ! condjump_in_parallel_p (insn)
3244 && ! (next && switch_text_sections_between_p (insn, next)))
3245 {
3246 delete_jump (insn);
3247 continue;
3248 }
3249
3250 if (target_label && target_label != JUMP_LABEL (insn))
3251 {
3252 reorg_redirect_jump (insn, target_label);
3253 if (crossing)
3254 CROSSING_JUMP_P (insn) = 1;
3255 }
3256
3257 /* See if this jump conditionally branches around an unconditional
3258 jump. If so, invert this jump and point it to the target of the
3259 second jump. Check if it's possible on the target. */
3260 if (next && simplejump_or_return_p (next)
3261 && any_condjump_p (insn)
3262 && target_label
3263 && next_active_insn (target_label) == next_active_insn (next)
3264 && no_labels_between_p (insn, next)
3265 && targetm.can_follow_jump (insn, next))
3266 {
3267 rtx label = JUMP_LABEL (next);
3268
3269 /* Be careful how we do this to avoid deleting code or
3270 labels that are momentarily dead. See similar optimization
3271 in jump.c.
3272
3273 We also need to ensure we properly handle the case when
3274 invert_jump fails. */
3275
3276 ++LABEL_NUSES (target_label);
3277 if (!ANY_RETURN_P (label))
3278 ++LABEL_NUSES (label);
3279
3280 if (invert_jump (insn, label, 1))
3281 {
3282 delete_related_insns (next);
3283 next = insn;
3284 }
3285
3286 if (!ANY_RETURN_P (label))
3287 --LABEL_NUSES (label);
3288
3289 if (--LABEL_NUSES (target_label) == 0)
3290 delete_related_insns (target_label);
3291
3292 continue;
3293 }
3294 }
3295
3296 /* If this is an unconditional jump and the previous insn is a
3297 conditional jump, try reversing the condition of the previous
3298 insn and swapping our targets. The next pass might be able to
3299 fill the slots.
3300
3301 Don't do this if we expect the conditional branch to be true, because
3302 we would then be making the more common case longer. */
3303
3304 if (simplejump_or_return_p (insn)
3305 && (other = prev_active_insn (insn)) != 0
3306 && any_condjump_p (other)
3307 && no_labels_between_p (other, insn)
3308 && 0 > mostly_true_jump (other))
3309 {
3310 rtx other_target = JUMP_LABEL (other);
3311 target_label = JUMP_LABEL (insn);
3312
3313 if (invert_jump (other, target_label, 0))
3314 reorg_redirect_jump (insn, other_target);
3315 }
3316
3317 /* Now look only at cases where we have a filled delay slot. */
3318 if (!NONJUMP_INSN_P (insn) || GET_CODE (PATTERN (insn)) != SEQUENCE)
3319 continue;
3320
3321 pat = as_a <rtx_sequence *> (PATTERN (insn));
3322 delay_insn = pat->insn (0);
3323
3324 /* See if the first insn in the delay slot is redundant with some
3325 previous insn. Remove it from the delay slot if so; then set up
3326 to reprocess this insn. */
3327 if (redundant_insn (pat->insn (1), delay_insn, 0))
3328 {
3329 update_block (pat->insn (1), insn);
3330 delete_from_delay_slot (pat->insn (1));
3331 next = prev_active_insn (next);
3332 continue;
3333 }
3334
3335 /* See if we have a RETURN insn with a filled delay slot followed
3336 by a RETURN insn with an unfilled a delay slot. If so, we can delete
3337 the first RETURN (but not its delay insn). This gives the same
3338 effect in fewer instructions.
3339
3340 Only do so if optimizing for size since this results in slower, but
3341 smaller code. */
3342 if (optimize_function_for_size_p (cfun)
3343 && ANY_RETURN_P (PATTERN (delay_insn))
3344 && next
3345 && JUMP_P (next)
3346 && PATTERN (next) == PATTERN (delay_insn))
3347 {
3348 rtx_insn *after;
3349 int i;
3350
3351 /* Delete the RETURN and just execute the delay list insns.
3352
3353 We do this by deleting the INSN containing the SEQUENCE, then
3354 re-emitting the insns separately, and then deleting the RETURN.
3355 This allows the count of the jump target to be properly
3356 decremented.
3357
3358 Note that we need to change the INSN_UID of the re-emitted insns
3359 since it is used to hash the insns for mark_target_live_regs and
3360 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3361
3362 Clear the from target bit, since these insns are no longer
3363 in delay slots. */
3364 for (i = 0; i < XVECLEN (pat, 0); i++)
3365 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3366
3367 trial = PREV_INSN (insn);
3368 delete_related_insns (insn);
3369 gcc_assert (GET_CODE (pat) == SEQUENCE);
3370 add_insn_after (delay_insn, trial, NULL);
3371 after = delay_insn;
3372 for (i = 1; i < pat->len (); i++)
3373 after = emit_copy_of_insn_after (pat->insn (i), after);
3374 delete_scheduled_jump (delay_insn);
3375 continue;
3376 }
3377
3378 /* Now look only at the cases where we have a filled JUMP_INSN. */
3379 if (!JUMP_P (delay_insn)
3380 || !(condjump_p (delay_insn) || condjump_in_parallel_p (delay_insn)))
3381 continue;
3382
3383 target_label = JUMP_LABEL (delay_insn);
3384 if (target_label && ANY_RETURN_P (target_label))
3385 continue;
3386
3387 /* If this jump goes to another unconditional jump, thread it, but
3388 don't convert a jump into a RETURN here. */
3389 trial = skip_consecutive_labels (follow_jumps (target_label, delay_insn,
3390 &crossing));
3391 if (ANY_RETURN_P (trial))
3392 trial = find_end_label (trial);
3393
3394 if (trial && trial != target_label
3395 && redirect_with_delay_slots_safe_p (delay_insn, trial, insn))
3396 {
3397 reorg_redirect_jump (delay_insn, trial);
3398 target_label = trial;
3399 if (crossing)
3400 CROSSING_JUMP_P (insn) = 1;
3401 }
3402
3403 /* If the first insn at TARGET_LABEL is redundant with a previous
3404 insn, redirect the jump to the following insn and process again.
3405 We use next_real_insn instead of next_active_insn so we
3406 don't skip USE-markers, or we'll end up with incorrect
3407 liveness info. */
3408 trial = next_real_insn (target_label);
3409 if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE
3410 && redundant_insn (trial, insn, 0)
3411 && ! can_throw_internal (trial))
3412 {
3413 /* Figure out where to emit the special USE insn so we don't
3414 later incorrectly compute register live/death info. */
3415 rtx_insn *tmp = next_active_insn (trial);
3416 if (tmp == 0)
3417 tmp = find_end_label (simple_return_rtx);
3418
3419 if (tmp)
3420 {
3421 /* Insert the special USE insn and update dataflow info.
3422 We know "trial" is an insn here as it is the output of
3423 next_real_insn () above. */
3424 update_block (as_a <rtx_insn *> (trial), tmp);
3425
3426 /* Now emit a label before the special USE insn, and
3427 redirect our jump to the new label. */
3428 target_label = get_label_before (PREV_INSN (tmp), target_label);
3429 reorg_redirect_jump (delay_insn, target_label);
3430 next = insn;
3431 continue;
3432 }
3433 }
3434
3435 /* Similarly, if it is an unconditional jump with one insn in its
3436 delay list and that insn is redundant, thread the jump. */
3437 rtx_sequence *trial_seq =
3438 trial ? dyn_cast <rtx_sequence *> (PATTERN (trial)) : NULL;
3439 if (trial_seq
3440 && trial_seq->len () == 2
3441 && JUMP_P (trial_seq->insn (0))
3442 && simplejump_or_return_p (trial_seq->insn (0))
3443 && redundant_insn (trial_seq->insn (1), insn, 0))
3444 {
3445 target_label = JUMP_LABEL (trial_seq->insn (0));
3446 if (ANY_RETURN_P (target_label))
3447 target_label = find_end_label (target_label);
3448
3449 if (target_label
3450 && redirect_with_delay_slots_safe_p (delay_insn, target_label,
3451 insn))
3452 {
3453 update_block (trial_seq->insn (1), insn);
3454 reorg_redirect_jump (delay_insn, target_label);
3455 next = insn;
3456 continue;
3457 }
3458 }
3459
3460 /* See if we have a simple (conditional) jump that is useless. */
3461 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3462 && ! condjump_in_parallel_p (delay_insn)
3463 && prev_active_insn (target_label) == insn
3464 && ! BARRIER_P (prev_nonnote_insn (target_label))
3465 #if HAVE_cc0
3466 /* If the last insn in the delay slot sets CC0 for some insn,
3467 various code assumes that it is in a delay slot. We could
3468 put it back where it belonged and delete the register notes,
3469 but it doesn't seem worthwhile in this uncommon case. */
3470 && ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1),
3471 REG_CC_USER, NULL_RTX)
3472 #endif
3473 )
3474 {
3475 rtx_insn *after;
3476 int i;
3477
3478 /* All this insn does is execute its delay list and jump to the
3479 following insn. So delete the jump and just execute the delay
3480 list insns.
3481
3482 We do this by deleting the INSN containing the SEQUENCE, then
3483 re-emitting the insns separately, and then deleting the jump.
3484 This allows the count of the jump target to be properly
3485 decremented.
3486
3487 Note that we need to change the INSN_UID of the re-emitted insns
3488 since it is used to hash the insns for mark_target_live_regs and
3489 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3490
3491 Clear the from target bit, since these insns are no longer
3492 in delay slots. */
3493 for (i = 0; i < XVECLEN (pat, 0); i++)
3494 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3495
3496 trial = PREV_INSN (insn);
3497 delete_related_insns (insn);
3498 gcc_assert (GET_CODE (pat) == SEQUENCE);
3499 add_insn_after (delay_insn, trial, NULL);
3500 after = delay_insn;
3501 for (i = 1; i < pat->len (); i++)
3502 after = emit_copy_of_insn_after (pat->insn (i), after);
3503 delete_scheduled_jump (delay_insn);
3504 continue;
3505 }
3506
3507 /* See if this is an unconditional jump around a single insn which is
3508 identical to the one in its delay slot. In this case, we can just
3509 delete the branch and the insn in its delay slot. */
3510 if (next && NONJUMP_INSN_P (next)
3511 && label_before_next_insn (next, insn) == target_label
3512 && simplejump_p (insn)
3513 && XVECLEN (pat, 0) == 2
3514 && rtx_equal_p (PATTERN (next), PATTERN (pat->insn (1))))
3515 {
3516 delete_related_insns (insn);
3517 continue;
3518 }
3519
3520 /* See if this jump (with its delay slots) conditionally branches
3521 around an unconditional jump (without delay slots). If so, invert
3522 this jump and point it to the target of the second jump. We cannot
3523 do this for annulled jumps, though. Again, don't convert a jump to
3524 a RETURN here. */
3525 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3526 && any_condjump_p (delay_insn)
3527 && next && simplejump_or_return_p (next)
3528 && next_active_insn (target_label) == next_active_insn (next)
3529 && no_labels_between_p (insn, next))
3530 {
3531 rtx label = JUMP_LABEL (next);
3532 rtx old_label = JUMP_LABEL (delay_insn);
3533
3534 if (ANY_RETURN_P (label))
3535 label = find_end_label (label);
3536
3537 /* find_end_label can generate a new label. Check this first. */
3538 if (label
3539 && no_labels_between_p (insn, next)
3540 && redirect_with_delay_slots_safe_p (delay_insn, label, insn))
3541 {
3542 /* Be careful how we do this to avoid deleting code or labels
3543 that are momentarily dead. See similar optimization in
3544 jump.c */
3545 if (old_label)
3546 ++LABEL_NUSES (old_label);
3547
3548 if (invert_jump (delay_insn, label, 1))
3549 {
3550 int i;
3551
3552 /* Must update the INSN_FROM_TARGET_P bits now that
3553 the branch is reversed, so that mark_target_live_regs
3554 will handle the delay slot insn correctly. */
3555 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
3556 {
3557 rtx slot = XVECEXP (PATTERN (insn), 0, i);
3558 INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot);
3559 }
3560
3561 delete_related_insns (next);
3562 next = insn;
3563 }
3564
3565 if (old_label && --LABEL_NUSES (old_label) == 0)
3566 delete_related_insns (old_label);
3567 continue;
3568 }
3569 }
3570
3571 /* If we own the thread opposite the way this insn branches, see if we
3572 can merge its delay slots with following insns. */
3573 if (INSN_FROM_TARGET_P (pat->insn (1))
3574 && own_thread_p (NEXT_INSN (insn), 0, 1))
3575 try_merge_delay_insns (insn, next);
3576 else if (! INSN_FROM_TARGET_P (pat->insn (1))
3577 && own_thread_p (target_label, target_label, 0))
3578 try_merge_delay_insns (insn, next_active_insn (target_label));
3579
3580 /* If we get here, we haven't deleted INSN. But we may have deleted
3581 NEXT, so recompute it. */
3582 next = next_active_insn (insn);
3583 }
3584 }
3585 \f
3586
3587 /* Look for filled jumps to the end of function label. We can try to convert
3588 them into RETURN insns if the insns in the delay slot are valid for the
3589 RETURN as well. */
3590
3591 static void
3592 make_return_insns (rtx_insn *first)
3593 {
3594 rtx_insn *insn;
3595 rtx_insn *jump_insn;
3596 rtx real_return_label = function_return_label;
3597 rtx real_simple_return_label = function_simple_return_label;
3598 int slots, i;
3599
3600 /* See if there is a RETURN insn in the function other than the one we
3601 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3602 into a RETURN to jump to it. */
3603 for (insn = first; insn; insn = NEXT_INSN (insn))
3604 if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn)))
3605 {
3606 rtx t = get_label_before (insn, NULL_RTX);
3607 if (PATTERN (insn) == ret_rtx)
3608 real_return_label = t;
3609 else
3610 real_simple_return_label = t;
3611 break;
3612 }
3613
3614 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3615 was equal to END_OF_FUNCTION_LABEL. */
3616 if (real_return_label)
3617 LABEL_NUSES (real_return_label)++;
3618 if (real_simple_return_label)
3619 LABEL_NUSES (real_simple_return_label)++;
3620
3621 /* Clear the list of insns to fill so we can use it. */
3622 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3623
3624 for (insn = first; insn; insn = NEXT_INSN (insn))
3625 {
3626 int flags;
3627 rtx kind, real_label;
3628
3629 /* Only look at filled JUMP_INSNs that go to the end of function
3630 label. */
3631 if (!NONJUMP_INSN_P (insn))
3632 continue;
3633
3634 if (GET_CODE (PATTERN (insn)) != SEQUENCE)
3635 continue;
3636
3637 rtx_sequence *pat = as_a <rtx_sequence *> (PATTERN (insn));
3638
3639 if (!jump_to_label_p (pat->insn (0)))
3640 continue;
3641
3642 if (JUMP_LABEL (pat->insn (0)) == function_return_label)
3643 {
3644 kind = ret_rtx;
3645 real_label = real_return_label;
3646 }
3647 else if (JUMP_LABEL (pat->insn (0)) == function_simple_return_label)
3648 {
3649 kind = simple_return_rtx;
3650 real_label = real_simple_return_label;
3651 }
3652 else
3653 continue;
3654
3655 jump_insn = pat->insn (0);
3656
3657 /* If we can't make the jump into a RETURN, try to redirect it to the best
3658 RETURN and go on to the next insn. */
3659 if (!reorg_redirect_jump (jump_insn, kind))
3660 {
3661 /* Make sure redirecting the jump will not invalidate the delay
3662 slot insns. */
3663 if (redirect_with_delay_slots_safe_p (jump_insn, real_label, insn))
3664 reorg_redirect_jump (jump_insn, real_label);
3665 continue;
3666 }
3667
3668 /* See if this RETURN can accept the insns current in its delay slot.
3669 It can if it has more or an equal number of slots and the contents
3670 of each is valid. */
3671
3672 flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn));
3673 slots = num_delay_slots (jump_insn);
3674 if (slots >= XVECLEN (pat, 0) - 1)
3675 {
3676 for (i = 1; i < XVECLEN (pat, 0); i++)
3677 if (! (
3678 #ifdef ANNUL_IFFALSE_SLOTS
3679 (INSN_ANNULLED_BRANCH_P (jump_insn)
3680 && INSN_FROM_TARGET_P (pat->insn (i)))
3681 ? eligible_for_annul_false (jump_insn, i - 1,
3682 pat->insn (i), flags) :
3683 #endif
3684 #ifdef ANNUL_IFTRUE_SLOTS
3685 (INSN_ANNULLED_BRANCH_P (jump_insn)
3686 && ! INSN_FROM_TARGET_P (pat->insn (i)))
3687 ? eligible_for_annul_true (jump_insn, i - 1,
3688 pat->insn (i), flags) :
3689 #endif
3690 eligible_for_delay (jump_insn, i - 1,
3691 pat->insn (i), flags)))
3692 break;
3693 }
3694 else
3695 i = 0;
3696
3697 if (i == XVECLEN (pat, 0))
3698 continue;
3699
3700 /* We have to do something with this insn. If it is an unconditional
3701 RETURN, delete the SEQUENCE and output the individual insns,
3702 followed by the RETURN. Then set things up so we try to find
3703 insns for its delay slots, if it needs some. */
3704 if (ANY_RETURN_P (PATTERN (jump_insn)))
3705 {
3706 rtx_insn *prev = PREV_INSN (insn);
3707
3708 delete_related_insns (insn);
3709 for (i = 1; i < XVECLEN (pat, 0); i++)
3710 prev = emit_insn_after (PATTERN (XVECEXP (pat, 0, i)), prev);
3711
3712 insn = emit_jump_insn_after (PATTERN (jump_insn), prev);
3713 emit_barrier_after (insn);
3714
3715 if (slots)
3716 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3717 }
3718 else
3719 /* It is probably more efficient to keep this with its current
3720 delay slot as a branch to a RETURN. */
3721 reorg_redirect_jump (jump_insn, real_label);
3722 }
3723
3724 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3725 new delay slots we have created. */
3726 if (real_return_label != NULL_RTX && --LABEL_NUSES (real_return_label) == 0)
3727 delete_related_insns (real_return_label);
3728 if (real_simple_return_label != NULL_RTX
3729 && --LABEL_NUSES (real_simple_return_label) == 0)
3730 delete_related_insns (real_simple_return_label);
3731
3732 fill_simple_delay_slots (1);
3733 fill_simple_delay_slots (0);
3734 }
3735 \f
3736 /* Try to find insns to place in delay slots. */
3737
3738 static void
3739 dbr_schedule (rtx_insn *first)
3740 {
3741 rtx_insn *insn, *next, *epilogue_insn = 0;
3742 int i;
3743 bool need_return_insns;
3744
3745 /* If the current function has no insns other than the prologue and
3746 epilogue, then do not try to fill any delay slots. */
3747 if (n_basic_blocks_for_fn (cfun) == NUM_FIXED_BLOCKS)
3748 return;
3749
3750 /* Find the highest INSN_UID and allocate and initialize our map from
3751 INSN_UID's to position in code. */
3752 for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn))
3753 {
3754 if (INSN_UID (insn) > max_uid)
3755 max_uid = INSN_UID (insn);
3756 if (NOTE_P (insn)
3757 && NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG)
3758 epilogue_insn = insn;
3759 }
3760
3761 uid_to_ruid = XNEWVEC (int, max_uid + 1);
3762 for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn))
3763 uid_to_ruid[INSN_UID (insn)] = i;
3764
3765 /* Initialize the list of insns that need filling. */
3766 if (unfilled_firstobj == 0)
3767 {
3768 gcc_obstack_init (&unfilled_slots_obstack);
3769 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3770 }
3771
3772 for (insn = next_active_insn (first); insn; insn = next_active_insn (insn))
3773 {
3774 rtx target;
3775
3776 /* Skip vector tables. We can't get attributes for them. */
3777 if (JUMP_TABLE_DATA_P (insn))
3778 continue;
3779
3780 if (JUMP_P (insn))
3781 INSN_ANNULLED_BRANCH_P (insn) = 0;
3782 INSN_FROM_TARGET_P (insn) = 0;
3783
3784 if (num_delay_slots (insn) > 0)
3785 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3786
3787 /* Ensure all jumps go to the last of a set of consecutive labels. */
3788 if (JUMP_P (insn)
3789 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3790 && !ANY_RETURN_P (JUMP_LABEL (insn))
3791 && ((target = skip_consecutive_labels (JUMP_LABEL (insn)))
3792 != JUMP_LABEL (insn)))
3793 redirect_jump (insn, target, 1);
3794 }
3795
3796 init_resource_info (epilogue_insn);
3797
3798 /* Show we haven't computed an end-of-function label yet. */
3799 function_return_label = function_simple_return_label = NULL;
3800
3801 /* Initialize the statistics for this function. */
3802 memset (num_insns_needing_delays, 0, sizeof num_insns_needing_delays);
3803 memset (num_filled_delays, 0, sizeof num_filled_delays);
3804
3805 /* Now do the delay slot filling. Try everything twice in case earlier
3806 changes make more slots fillable. */
3807
3808 for (reorg_pass_number = 0;
3809 reorg_pass_number < MAX_REORG_PASSES;
3810 reorg_pass_number++)
3811 {
3812 fill_simple_delay_slots (1);
3813 fill_simple_delay_slots (0);
3814 fill_eager_delay_slots ();
3815 relax_delay_slots (first);
3816 }
3817
3818 /* If we made an end of function label, indicate that it is now
3819 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
3820 If it is now unused, delete it. */
3821 if (function_return_label && --LABEL_NUSES (function_return_label) == 0)
3822 delete_related_insns (function_return_label);
3823 if (function_simple_return_label
3824 && --LABEL_NUSES (function_simple_return_label) == 0)
3825 delete_related_insns (function_simple_return_label);
3826
3827 need_return_insns = false;
3828 #ifdef HAVE_return
3829 need_return_insns |= HAVE_return && function_return_label != 0;
3830 #endif
3831 #ifdef HAVE_simple_return
3832 need_return_insns |= HAVE_simple_return && function_simple_return_label != 0;
3833 #endif
3834 if (need_return_insns)
3835 make_return_insns (first);
3836
3837 /* Delete any USE insns made by update_block; subsequent passes don't need
3838 them or know how to deal with them. */
3839 for (insn = first; insn; insn = next)
3840 {
3841 next = NEXT_INSN (insn);
3842
3843 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
3844 && INSN_P (XEXP (PATTERN (insn), 0)))
3845 next = delete_related_insns (insn);
3846 }
3847
3848 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3849
3850 /* It is not clear why the line below is needed, but it does seem to be. */
3851 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3852
3853 if (dump_file)
3854 {
3855 int i, j, need_comma;
3856 int total_delay_slots[MAX_DELAY_HISTOGRAM + 1];
3857 int total_annul_slots[MAX_DELAY_HISTOGRAM + 1];
3858
3859 for (reorg_pass_number = 0;
3860 reorg_pass_number < MAX_REORG_PASSES;
3861 reorg_pass_number++)
3862 {
3863 fprintf (dump_file, ";; Reorg pass #%d:\n", reorg_pass_number + 1);
3864 for (i = 0; i < NUM_REORG_FUNCTIONS; i++)
3865 {
3866 need_comma = 0;
3867 fprintf (dump_file, ";; Reorg function #%d\n", i);
3868
3869 fprintf (dump_file, ";; %d insns needing delay slots\n;; ",
3870 num_insns_needing_delays[i][reorg_pass_number]);
3871
3872 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3873 if (num_filled_delays[i][j][reorg_pass_number])
3874 {
3875 if (need_comma)
3876 fprintf (dump_file, ", ");
3877 need_comma = 1;
3878 fprintf (dump_file, "%d got %d delays",
3879 num_filled_delays[i][j][reorg_pass_number], j);
3880 }
3881 fprintf (dump_file, "\n");
3882 }
3883 }
3884 memset (total_delay_slots, 0, sizeof total_delay_slots);
3885 memset (total_annul_slots, 0, sizeof total_annul_slots);
3886 for (insn = first; insn; insn = NEXT_INSN (insn))
3887 {
3888 if (! insn->deleted ()
3889 && NONJUMP_INSN_P (insn)
3890 && GET_CODE (PATTERN (insn)) != USE
3891 && GET_CODE (PATTERN (insn)) != CLOBBER)
3892 {
3893 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
3894 {
3895 rtx control;
3896 j = XVECLEN (PATTERN (insn), 0) - 1;
3897 if (j > MAX_DELAY_HISTOGRAM)
3898 j = MAX_DELAY_HISTOGRAM;
3899 control = XVECEXP (PATTERN (insn), 0, 0);
3900 if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control))
3901 total_annul_slots[j]++;
3902 else
3903 total_delay_slots[j]++;
3904 }
3905 else if (num_delay_slots (insn) > 0)
3906 total_delay_slots[0]++;
3907 }
3908 }
3909 fprintf (dump_file, ";; Reorg totals: ");
3910 need_comma = 0;
3911 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3912 {
3913 if (total_delay_slots[j])
3914 {
3915 if (need_comma)
3916 fprintf (dump_file, ", ");
3917 need_comma = 1;
3918 fprintf (dump_file, "%d got %d delays", total_delay_slots[j], j);
3919 }
3920 }
3921 fprintf (dump_file, "\n");
3922 #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
3923 fprintf (dump_file, ";; Reorg annuls: ");
3924 need_comma = 0;
3925 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3926 {
3927 if (total_annul_slots[j])
3928 {
3929 if (need_comma)
3930 fprintf (dump_file, ", ");
3931 need_comma = 1;
3932 fprintf (dump_file, "%d got %d delays", total_annul_slots[j], j);
3933 }
3934 }
3935 fprintf (dump_file, "\n");
3936 #endif
3937 fprintf (dump_file, "\n");
3938 }
3939
3940 if (!sibling_labels.is_empty ())
3941 {
3942 update_alignments (sibling_labels);
3943 sibling_labels.release ();
3944 }
3945
3946 free_resource_info ();
3947 free (uid_to_ruid);
3948 crtl->dbr_scheduled_p = true;
3949 }
3950 #endif /* DELAY_SLOTS */
3951 \f
3952 /* Run delay slot optimization. */
3953 static unsigned int
3954 rest_of_handle_delay_slots (void)
3955 {
3956 #ifdef DELAY_SLOTS
3957 dbr_schedule (get_insns ());
3958 #endif
3959 return 0;
3960 }
3961
3962 namespace {
3963
3964 const pass_data pass_data_delay_slots =
3965 {
3966 RTL_PASS, /* type */
3967 "dbr", /* name */
3968 OPTGROUP_NONE, /* optinfo_flags */
3969 TV_DBR_SCHED, /* tv_id */
3970 0, /* properties_required */
3971 0, /* properties_provided */
3972 0, /* properties_destroyed */
3973 0, /* todo_flags_start */
3974 0, /* todo_flags_finish */
3975 };
3976
3977 class pass_delay_slots : public rtl_opt_pass
3978 {
3979 public:
3980 pass_delay_slots (gcc::context *ctxt)
3981 : rtl_opt_pass (pass_data_delay_slots, ctxt)
3982 {}
3983
3984 /* opt_pass methods: */
3985 virtual bool gate (function *);
3986 virtual unsigned int execute (function *)
3987 {
3988 return rest_of_handle_delay_slots ();
3989 }
3990
3991 }; // class pass_delay_slots
3992
3993 bool
3994 pass_delay_slots::gate (function *)
3995 {
3996 #ifdef DELAY_SLOTS
3997 /* At -O0 dataflow info isn't updated after RA. */
3998 return optimize > 0 && flag_delayed_branch && !crtl->dbr_scheduled_p;
3999 #else
4000 return 0;
4001 #endif
4002 }
4003
4004 } // anon namespace
4005
4006 rtl_opt_pass *
4007 make_pass_delay_slots (gcc::context *ctxt)
4008 {
4009 return new pass_delay_slots (ctxt);
4010 }
4011
4012 /* Machine dependent reorg pass. */
4013
4014 namespace {
4015
4016 const pass_data pass_data_machine_reorg =
4017 {
4018 RTL_PASS, /* type */
4019 "mach", /* name */
4020 OPTGROUP_NONE, /* optinfo_flags */
4021 TV_MACH_DEP, /* tv_id */
4022 0, /* properties_required */
4023 0, /* properties_provided */
4024 0, /* properties_destroyed */
4025 0, /* todo_flags_start */
4026 0, /* todo_flags_finish */
4027 };
4028
4029 class pass_machine_reorg : public rtl_opt_pass
4030 {
4031 public:
4032 pass_machine_reorg (gcc::context *ctxt)
4033 : rtl_opt_pass (pass_data_machine_reorg, ctxt)
4034 {}
4035
4036 /* opt_pass methods: */
4037 virtual bool gate (function *)
4038 {
4039 return targetm.machine_dependent_reorg != 0;
4040 }
4041
4042 virtual unsigned int execute (function *)
4043 {
4044 targetm.machine_dependent_reorg ();
4045 return 0;
4046 }
4047
4048 }; // class pass_machine_reorg
4049
4050 } // anon namespace
4051
4052 rtl_opt_pass *
4053 make_pass_machine_reorg (gcc::context *ctxt)
4054 {
4055 return new pass_machine_reorg (ctxt);
4056 }