s-carun8.adb, [...] (Compare_Array_?8): modify so that last full word is no longer...
[gcc.git] / gcc / resource.c
1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
20 02110-1301, USA. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "toplev.h"
27 #include "rtl.h"
28 #include "tm_p.h"
29 #include "hard-reg-set.h"
30 #include "function.h"
31 #include "regs.h"
32 #include "flags.h"
33 #include "output.h"
34 #include "resource.h"
35 #include "except.h"
36 #include "insn-attr.h"
37 #include "params.h"
38
39 /* This structure is used to record liveness information at the targets or
40 fallthrough insns of branches. We will most likely need the information
41 at targets again, so save them in a hash table rather than recomputing them
42 each time. */
43
44 struct target_info
45 {
46 int uid; /* INSN_UID of target. */
47 struct target_info *next; /* Next info for same hash bucket. */
48 HARD_REG_SET live_regs; /* Registers live at target. */
49 int block; /* Basic block number containing target. */
50 int bb_tick; /* Generation count of basic block info. */
51 };
52
53 #define TARGET_HASH_PRIME 257
54
55 /* Indicates what resources are required at the beginning of the epilogue. */
56 static struct resources start_of_epilogue_needs;
57
58 /* Indicates what resources are required at function end. */
59 static struct resources end_of_function_needs;
60
61 /* Define the hash table itself. */
62 static struct target_info **target_hash_table = NULL;
63
64 /* For each basic block, we maintain a generation number of its basic
65 block info, which is updated each time we move an insn from the
66 target of a jump. This is the generation number indexed by block
67 number. */
68
69 static int *bb_ticks;
70
71 /* Marks registers possibly live at the current place being scanned by
72 mark_target_live_regs. Also used by update_live_status. */
73
74 static HARD_REG_SET current_live_regs;
75
76 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
77 Also only used by the next two functions. */
78
79 static HARD_REG_SET pending_dead_regs;
80 \f
81 static void update_live_status (rtx, rtx, void *);
82 static int find_basic_block (rtx, int);
83 static rtx next_insn_no_annul (rtx);
84 static rtx find_dead_or_set_registers (rtx, struct resources*,
85 rtx*, int, struct resources,
86 struct resources);
87 \f
88 /* Utility function called from mark_target_live_regs via note_stores.
89 It deadens any CLOBBERed registers and livens any SET registers. */
90
91 static void
92 update_live_status (rtx dest, rtx x, void *data ATTRIBUTE_UNUSED)
93 {
94 int first_regno, last_regno;
95 int i;
96
97 if (!REG_P (dest)
98 && (GET_CODE (dest) != SUBREG || !REG_P (SUBREG_REG (dest))))
99 return;
100
101 if (GET_CODE (dest) == SUBREG)
102 {
103 first_regno = subreg_regno (dest);
104 last_regno = first_regno + subreg_nregs (dest);
105
106 }
107 else
108 {
109 first_regno = REGNO (dest);
110 last_regno
111 = first_regno + hard_regno_nregs[first_regno][GET_MODE (dest)];
112 }
113
114 if (GET_CODE (x) == CLOBBER)
115 for (i = first_regno; i < last_regno; i++)
116 CLEAR_HARD_REG_BIT (current_live_regs, i);
117 else
118 for (i = first_regno; i < last_regno; i++)
119 {
120 SET_HARD_REG_BIT (current_live_regs, i);
121 CLEAR_HARD_REG_BIT (pending_dead_regs, i);
122 }
123 }
124
125 /* Find the number of the basic block with correct live register
126 information that starts closest to INSN. Return -1 if we couldn't
127 find such a basic block or the beginning is more than
128 SEARCH_LIMIT instructions before INSN. Use SEARCH_LIMIT = -1 for
129 an unlimited search.
130
131 The delay slot filling code destroys the control-flow graph so,
132 instead of finding the basic block containing INSN, we search
133 backwards toward a BARRIER where the live register information is
134 correct. */
135
136 static int
137 find_basic_block (rtx insn, int search_limit)
138 {
139 basic_block bb;
140
141 /* Scan backwards to the previous BARRIER. Then see if we can find a
142 label that starts a basic block. Return the basic block number. */
143 for (insn = prev_nonnote_insn (insn);
144 insn && !BARRIER_P (insn) && search_limit != 0;
145 insn = prev_nonnote_insn (insn), --search_limit)
146 ;
147
148 /* The closest BARRIER is too far away. */
149 if (search_limit == 0)
150 return -1;
151
152 /* The start of the function. */
153 else if (insn == 0)
154 return ENTRY_BLOCK_PTR->next_bb->index;
155
156 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
157 anything other than a CODE_LABEL or note, we can't find this code. */
158 for (insn = next_nonnote_insn (insn);
159 insn && LABEL_P (insn);
160 insn = next_nonnote_insn (insn))
161 {
162 FOR_EACH_BB (bb)
163 if (insn == BB_HEAD (bb))
164 return bb->index;
165 }
166
167 return -1;
168 }
169 \f
170 /* Similar to next_insn, but ignores insns in the delay slots of
171 an annulled branch. */
172
173 static rtx
174 next_insn_no_annul (rtx insn)
175 {
176 if (insn)
177 {
178 /* If INSN is an annulled branch, skip any insns from the target
179 of the branch. */
180 if (INSN_P (insn)
181 && INSN_ANNULLED_BRANCH_P (insn)
182 && NEXT_INSN (PREV_INSN (insn)) != insn)
183 {
184 rtx next = NEXT_INSN (insn);
185 enum rtx_code code = GET_CODE (next);
186
187 while ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
188 && INSN_FROM_TARGET_P (next))
189 {
190 insn = next;
191 next = NEXT_INSN (insn);
192 code = GET_CODE (next);
193 }
194 }
195
196 insn = NEXT_INSN (insn);
197 if (insn && NONJUMP_INSN_P (insn)
198 && GET_CODE (PATTERN (insn)) == SEQUENCE)
199 insn = XVECEXP (PATTERN (insn), 0, 0);
200 }
201
202 return insn;
203 }
204 \f
205 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
206 which resources are referenced by the insn. If INCLUDE_DELAYED_EFFECTS
207 is TRUE, resources used by the called routine will be included for
208 CALL_INSNs. */
209
210 void
211 mark_referenced_resources (rtx x, struct resources *res,
212 int include_delayed_effects)
213 {
214 enum rtx_code code = GET_CODE (x);
215 int i, j;
216 unsigned int r;
217 const char *format_ptr;
218
219 /* Handle leaf items for which we set resource flags. Also, special-case
220 CALL, SET and CLOBBER operators. */
221 switch (code)
222 {
223 case CONST:
224 case CONST_INT:
225 case CONST_DOUBLE:
226 case CONST_VECTOR:
227 case PC:
228 case SYMBOL_REF:
229 case LABEL_REF:
230 return;
231
232 case SUBREG:
233 if (!REG_P (SUBREG_REG (x)))
234 mark_referenced_resources (SUBREG_REG (x), res, 0);
235 else
236 {
237 unsigned int regno = subreg_regno (x);
238 unsigned int last_regno = regno + subreg_nregs (x);
239
240 gcc_assert (last_regno <= FIRST_PSEUDO_REGISTER);
241 for (r = regno; r < last_regno; r++)
242 SET_HARD_REG_BIT (res->regs, r);
243 }
244 return;
245
246 case REG:
247 {
248 unsigned int regno = REGNO (x);
249 unsigned int last_regno
250 = regno + hard_regno_nregs[regno][GET_MODE (x)];
251
252 gcc_assert (last_regno <= FIRST_PSEUDO_REGISTER);
253 for (r = regno; r < last_regno; r++)
254 SET_HARD_REG_BIT (res->regs, r);
255 }
256 return;
257
258 case MEM:
259 /* If this memory shouldn't change, it really isn't referencing
260 memory. */
261 if (MEM_READONLY_P (x))
262 res->unch_memory = 1;
263 else
264 res->memory = 1;
265 res->volatil |= MEM_VOLATILE_P (x);
266
267 /* Mark registers used to access memory. */
268 mark_referenced_resources (XEXP (x, 0), res, 0);
269 return;
270
271 case CC0:
272 res->cc = 1;
273 return;
274
275 case UNSPEC_VOLATILE:
276 case ASM_INPUT:
277 /* Traditional asm's are always volatile. */
278 res->volatil = 1;
279 return;
280
281 case TRAP_IF:
282 res->volatil = 1;
283 break;
284
285 case ASM_OPERANDS:
286 res->volatil |= MEM_VOLATILE_P (x);
287
288 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
289 We can not just fall through here since then we would be confused
290 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
291 traditional asms unlike their normal usage. */
292
293 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
294 mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, 0);
295 return;
296
297 case CALL:
298 /* The first operand will be a (MEM (xxx)) but doesn't really reference
299 memory. The second operand may be referenced, though. */
300 mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, 0);
301 mark_referenced_resources (XEXP (x, 1), res, 0);
302 return;
303
304 case SET:
305 /* Usually, the first operand of SET is set, not referenced. But
306 registers used to access memory are referenced. SET_DEST is
307 also referenced if it is a ZERO_EXTRACT. */
308
309 mark_referenced_resources (SET_SRC (x), res, 0);
310
311 x = SET_DEST (x);
312 if (GET_CODE (x) == ZERO_EXTRACT
313 || GET_CODE (x) == STRICT_LOW_PART)
314 mark_referenced_resources (x, res, 0);
315 else if (GET_CODE (x) == SUBREG)
316 x = SUBREG_REG (x);
317 if (MEM_P (x))
318 mark_referenced_resources (XEXP (x, 0), res, 0);
319 return;
320
321 case CLOBBER:
322 return;
323
324 case CALL_INSN:
325 if (include_delayed_effects)
326 {
327 /* A CALL references memory, the frame pointer if it exists, the
328 stack pointer, any global registers and any registers given in
329 USE insns immediately in front of the CALL.
330
331 However, we may have moved some of the parameter loading insns
332 into the delay slot of this CALL. If so, the USE's for them
333 don't count and should be skipped. */
334 rtx insn = PREV_INSN (x);
335 rtx sequence = 0;
336 int seq_size = 0;
337 int i;
338
339 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
340 if (NEXT_INSN (insn) != x)
341 {
342 sequence = PATTERN (NEXT_INSN (insn));
343 seq_size = XVECLEN (sequence, 0);
344 gcc_assert (GET_CODE (sequence) == SEQUENCE);
345 }
346
347 res->memory = 1;
348 SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM);
349 if (frame_pointer_needed)
350 {
351 SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM);
352 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
353 SET_HARD_REG_BIT (res->regs, HARD_FRAME_POINTER_REGNUM);
354 #endif
355 }
356
357 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
358 if (global_regs[i])
359 SET_HARD_REG_BIT (res->regs, i);
360
361 /* Check for a REG_SETJMP. If it exists, then we must
362 assume that this call can need any register.
363
364 This is done to be more conservative about how we handle setjmp.
365 We assume that they both use and set all registers. Using all
366 registers ensures that a register will not be considered dead
367 just because it crosses a setjmp call. A register should be
368 considered dead only if the setjmp call returns nonzero. */
369 if (find_reg_note (x, REG_SETJMP, NULL))
370 SET_HARD_REG_SET (res->regs);
371
372 {
373 rtx link;
374
375 for (link = CALL_INSN_FUNCTION_USAGE (x);
376 link;
377 link = XEXP (link, 1))
378 if (GET_CODE (XEXP (link, 0)) == USE)
379 {
380 for (i = 1; i < seq_size; i++)
381 {
382 rtx slot_pat = PATTERN (XVECEXP (sequence, 0, i));
383 if (GET_CODE (slot_pat) == SET
384 && rtx_equal_p (SET_DEST (slot_pat),
385 XEXP (XEXP (link, 0), 0)))
386 break;
387 }
388 if (i >= seq_size)
389 mark_referenced_resources (XEXP (XEXP (link, 0), 0),
390 res, 0);
391 }
392 }
393 }
394
395 /* ... fall through to other INSN processing ... */
396
397 case INSN:
398 case JUMP_INSN:
399
400 #ifdef INSN_REFERENCES_ARE_DELAYED
401 if (! include_delayed_effects
402 && INSN_REFERENCES_ARE_DELAYED (x))
403 return;
404 #endif
405
406 /* No special processing, just speed up. */
407 mark_referenced_resources (PATTERN (x), res, include_delayed_effects);
408 return;
409
410 default:
411 break;
412 }
413
414 /* Process each sub-expression and flag what it needs. */
415 format_ptr = GET_RTX_FORMAT (code);
416 for (i = 0; i < GET_RTX_LENGTH (code); i++)
417 switch (*format_ptr++)
418 {
419 case 'e':
420 mark_referenced_resources (XEXP (x, i), res, include_delayed_effects);
421 break;
422
423 case 'E':
424 for (j = 0; j < XVECLEN (x, i); j++)
425 mark_referenced_resources (XVECEXP (x, i, j), res,
426 include_delayed_effects);
427 break;
428 }
429 }
430 \f
431 /* A subroutine of mark_target_live_regs. Search forward from TARGET
432 looking for registers that are set before they are used. These are dead.
433 Stop after passing a few conditional jumps, and/or a small
434 number of unconditional branches. */
435
436 static rtx
437 find_dead_or_set_registers (rtx target, struct resources *res,
438 rtx *jump_target, int jump_count,
439 struct resources set, struct resources needed)
440 {
441 HARD_REG_SET scratch;
442 rtx insn, next;
443 rtx jump_insn = 0;
444 int i;
445
446 for (insn = target; insn; insn = next)
447 {
448 rtx this_jump_insn = insn;
449
450 next = NEXT_INSN (insn);
451
452 /* If this instruction can throw an exception, then we don't
453 know where we might end up next. That means that we have to
454 assume that whatever we have already marked as live really is
455 live. */
456 if (can_throw_internal (insn))
457 break;
458
459 switch (GET_CODE (insn))
460 {
461 case CODE_LABEL:
462 /* After a label, any pending dead registers that weren't yet
463 used can be made dead. */
464 AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs);
465 AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs);
466 CLEAR_HARD_REG_SET (pending_dead_regs);
467
468 continue;
469
470 case BARRIER:
471 case NOTE:
472 continue;
473
474 case INSN:
475 if (GET_CODE (PATTERN (insn)) == USE)
476 {
477 /* If INSN is a USE made by update_block, we care about the
478 underlying insn. Any registers set by the underlying insn
479 are live since the insn is being done somewhere else. */
480 if (INSN_P (XEXP (PATTERN (insn), 0)))
481 mark_set_resources (XEXP (PATTERN (insn), 0), res, 0,
482 MARK_SRC_DEST_CALL);
483
484 /* All other USE insns are to be ignored. */
485 continue;
486 }
487 else if (GET_CODE (PATTERN (insn)) == CLOBBER)
488 continue;
489 else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
490 {
491 /* An unconditional jump can be used to fill the delay slot
492 of a call, so search for a JUMP_INSN in any position. */
493 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
494 {
495 this_jump_insn = XVECEXP (PATTERN (insn), 0, i);
496 if (JUMP_P (this_jump_insn))
497 break;
498 }
499 }
500
501 default:
502 break;
503 }
504
505 if (JUMP_P (this_jump_insn))
506 {
507 if (jump_count++ < 10)
508 {
509 if (any_uncondjump_p (this_jump_insn)
510 || GET_CODE (PATTERN (this_jump_insn)) == RETURN)
511 {
512 next = JUMP_LABEL (this_jump_insn);
513 if (jump_insn == 0)
514 {
515 jump_insn = insn;
516 if (jump_target)
517 *jump_target = JUMP_LABEL (this_jump_insn);
518 }
519 }
520 else if (any_condjump_p (this_jump_insn))
521 {
522 struct resources target_set, target_res;
523 struct resources fallthrough_res;
524
525 /* We can handle conditional branches here by following
526 both paths, and then IOR the results of the two paths
527 together, which will give us registers that are dead
528 on both paths. Since this is expensive, we give it
529 a much higher cost than unconditional branches. The
530 cost was chosen so that we will follow at most 1
531 conditional branch. */
532
533 jump_count += 4;
534 if (jump_count >= 10)
535 break;
536
537 mark_referenced_resources (insn, &needed, 1);
538
539 /* For an annulled branch, mark_set_resources ignores slots
540 filled by instructions from the target. This is correct
541 if the branch is not taken. Since we are following both
542 paths from the branch, we must also compute correct info
543 if the branch is taken. We do this by inverting all of
544 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
545 and then inverting the INSN_FROM_TARGET_P bits again. */
546
547 if (GET_CODE (PATTERN (insn)) == SEQUENCE
548 && INSN_ANNULLED_BRANCH_P (this_jump_insn))
549 {
550 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
551 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
552 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
553
554 target_set = set;
555 mark_set_resources (insn, &target_set, 0,
556 MARK_SRC_DEST_CALL);
557
558 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
559 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
560 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
561
562 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
563 }
564 else
565 {
566 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
567 target_set = set;
568 }
569
570 target_res = *res;
571 COPY_HARD_REG_SET (scratch, target_set.regs);
572 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
573 AND_COMPL_HARD_REG_SET (target_res.regs, scratch);
574
575 fallthrough_res = *res;
576 COPY_HARD_REG_SET (scratch, set.regs);
577 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
578 AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
579
580 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn),
581 &target_res, 0, jump_count,
582 target_set, needed);
583 find_dead_or_set_registers (next,
584 &fallthrough_res, 0, jump_count,
585 set, needed);
586 IOR_HARD_REG_SET (fallthrough_res.regs, target_res.regs);
587 AND_HARD_REG_SET (res->regs, fallthrough_res.regs);
588 break;
589 }
590 else
591 break;
592 }
593 else
594 {
595 /* Don't try this optimization if we expired our jump count
596 above, since that would mean there may be an infinite loop
597 in the function being compiled. */
598 jump_insn = 0;
599 break;
600 }
601 }
602
603 mark_referenced_resources (insn, &needed, 1);
604 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
605
606 COPY_HARD_REG_SET (scratch, set.regs);
607 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
608 AND_COMPL_HARD_REG_SET (res->regs, scratch);
609 }
610
611 return jump_insn;
612 }
613 \f
614 /* Given X, a part of an insn, and a pointer to a `struct resource',
615 RES, indicate which resources are modified by the insn. If
616 MARK_TYPE is MARK_SRC_DEST_CALL, also mark resources potentially
617 set by the called routine.
618
619 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
620 objects are being referenced instead of set.
621
622 We never mark the insn as modifying the condition code unless it explicitly
623 SETs CC0 even though this is not totally correct. The reason for this is
624 that we require a SET of CC0 to immediately precede the reference to CC0.
625 So if some other insn sets CC0 as a side-effect, we know it cannot affect
626 our computation and thus may be placed in a delay slot. */
627
628 void
629 mark_set_resources (rtx x, struct resources *res, int in_dest,
630 enum mark_resource_type mark_type)
631 {
632 enum rtx_code code;
633 int i, j;
634 unsigned int r;
635 const char *format_ptr;
636
637 restart:
638
639 code = GET_CODE (x);
640
641 switch (code)
642 {
643 case NOTE:
644 case BARRIER:
645 case CODE_LABEL:
646 case USE:
647 case CONST_INT:
648 case CONST_DOUBLE:
649 case CONST_VECTOR:
650 case LABEL_REF:
651 case SYMBOL_REF:
652 case CONST:
653 case PC:
654 /* These don't set any resources. */
655 return;
656
657 case CC0:
658 if (in_dest)
659 res->cc = 1;
660 return;
661
662 case CALL_INSN:
663 /* Called routine modifies the condition code, memory, any registers
664 that aren't saved across calls, global registers and anything
665 explicitly CLOBBERed immediately after the CALL_INSN. */
666
667 if (mark_type == MARK_SRC_DEST_CALL)
668 {
669 rtx link;
670
671 res->cc = res->memory = 1;
672 for (r = 0; r < FIRST_PSEUDO_REGISTER; r++)
673 if (call_used_regs[r] || global_regs[r])
674 SET_HARD_REG_BIT (res->regs, r);
675
676 for (link = CALL_INSN_FUNCTION_USAGE (x);
677 link; link = XEXP (link, 1))
678 if (GET_CODE (XEXP (link, 0)) == CLOBBER)
679 mark_set_resources (SET_DEST (XEXP (link, 0)), res, 1,
680 MARK_SRC_DEST);
681
682 /* Check for a REG_SETJMP. If it exists, then we must
683 assume that this call can clobber any register. */
684 if (find_reg_note (x, REG_SETJMP, NULL))
685 SET_HARD_REG_SET (res->regs);
686 }
687
688 /* ... and also what its RTL says it modifies, if anything. */
689
690 case JUMP_INSN:
691 case INSN:
692
693 /* An insn consisting of just a CLOBBER (or USE) is just for flow
694 and doesn't actually do anything, so we ignore it. */
695
696 #ifdef INSN_SETS_ARE_DELAYED
697 if (mark_type != MARK_SRC_DEST_CALL
698 && INSN_SETS_ARE_DELAYED (x))
699 return;
700 #endif
701
702 x = PATTERN (x);
703 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
704 goto restart;
705 return;
706
707 case SET:
708 /* If the source of a SET is a CALL, this is actually done by
709 the called routine. So only include it if we are to include the
710 effects of the calling routine. */
711
712 mark_set_resources (SET_DEST (x), res,
713 (mark_type == MARK_SRC_DEST_CALL
714 || GET_CODE (SET_SRC (x)) != CALL),
715 mark_type);
716
717 mark_set_resources (SET_SRC (x), res, 0, MARK_SRC_DEST);
718 return;
719
720 case CLOBBER:
721 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
722 return;
723
724 case SEQUENCE:
725 for (i = 0; i < XVECLEN (x, 0); i++)
726 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x, 0, 0))
727 && INSN_FROM_TARGET_P (XVECEXP (x, 0, i))))
728 mark_set_resources (XVECEXP (x, 0, i), res, 0, mark_type);
729 return;
730
731 case POST_INC:
732 case PRE_INC:
733 case POST_DEC:
734 case PRE_DEC:
735 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
736 return;
737
738 case PRE_MODIFY:
739 case POST_MODIFY:
740 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
741 mark_set_resources (XEXP (XEXP (x, 1), 0), res, 0, MARK_SRC_DEST);
742 mark_set_resources (XEXP (XEXP (x, 1), 1), res, 0, MARK_SRC_DEST);
743 return;
744
745 case SIGN_EXTRACT:
746 case ZERO_EXTRACT:
747 mark_set_resources (XEXP (x, 0), res, in_dest, MARK_SRC_DEST);
748 mark_set_resources (XEXP (x, 1), res, 0, MARK_SRC_DEST);
749 mark_set_resources (XEXP (x, 2), res, 0, MARK_SRC_DEST);
750 return;
751
752 case MEM:
753 if (in_dest)
754 {
755 res->memory = 1;
756 res->unch_memory |= MEM_READONLY_P (x);
757 res->volatil |= MEM_VOLATILE_P (x);
758 }
759
760 mark_set_resources (XEXP (x, 0), res, 0, MARK_SRC_DEST);
761 return;
762
763 case SUBREG:
764 if (in_dest)
765 {
766 if (!REG_P (SUBREG_REG (x)))
767 mark_set_resources (SUBREG_REG (x), res, in_dest, mark_type);
768 else
769 {
770 unsigned int regno = subreg_regno (x);
771 unsigned int last_regno = regno + subreg_nregs (x);
772
773 gcc_assert (last_regno <= FIRST_PSEUDO_REGISTER);
774 for (r = regno; r < last_regno; r++)
775 SET_HARD_REG_BIT (res->regs, r);
776 }
777 }
778 return;
779
780 case REG:
781 if (in_dest)
782 {
783 unsigned int regno = REGNO (x);
784 unsigned int last_regno
785 = regno + hard_regno_nregs[regno][GET_MODE (x)];
786
787 gcc_assert (last_regno <= FIRST_PSEUDO_REGISTER);
788 for (r = regno; r < last_regno; r++)
789 SET_HARD_REG_BIT (res->regs, r);
790 }
791 return;
792
793 case UNSPEC_VOLATILE:
794 case ASM_INPUT:
795 /* Traditional asm's are always volatile. */
796 res->volatil = 1;
797 return;
798
799 case TRAP_IF:
800 res->volatil = 1;
801 break;
802
803 case ASM_OPERANDS:
804 res->volatil |= MEM_VOLATILE_P (x);
805
806 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
807 We can not just fall through here since then we would be confused
808 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
809 traditional asms unlike their normal usage. */
810
811 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
812 mark_set_resources (ASM_OPERANDS_INPUT (x, i), res, in_dest,
813 MARK_SRC_DEST);
814 return;
815
816 default:
817 break;
818 }
819
820 /* Process each sub-expression and flag what it needs. */
821 format_ptr = GET_RTX_FORMAT (code);
822 for (i = 0; i < GET_RTX_LENGTH (code); i++)
823 switch (*format_ptr++)
824 {
825 case 'e':
826 mark_set_resources (XEXP (x, i), res, in_dest, mark_type);
827 break;
828
829 case 'E':
830 for (j = 0; j < XVECLEN (x, i); j++)
831 mark_set_resources (XVECEXP (x, i, j), res, in_dest, mark_type);
832 break;
833 }
834 }
835 \f
836 /* Return TRUE if INSN is a return, possibly with a filled delay slot. */
837
838 static bool
839 return_insn_p (rtx insn)
840 {
841 if (JUMP_P (insn) && GET_CODE (PATTERN (insn)) == RETURN)
842 return true;
843
844 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
845 return return_insn_p (XVECEXP (PATTERN (insn), 0, 0));
846
847 return false;
848 }
849
850 /* Set the resources that are live at TARGET.
851
852 If TARGET is zero, we refer to the end of the current function and can
853 return our precomputed value.
854
855 Otherwise, we try to find out what is live by consulting the basic block
856 information. This is tricky, because we must consider the actions of
857 reload and jump optimization, which occur after the basic block information
858 has been computed.
859
860 Accordingly, we proceed as follows::
861
862 We find the previous BARRIER and look at all immediately following labels
863 (with no intervening active insns) to see if any of them start a basic
864 block. If we hit the start of the function first, we use block 0.
865
866 Once we have found a basic block and a corresponding first insns, we can
867 accurately compute the live status from basic_block_live_regs and
868 reg_renumber. (By starting at a label following a BARRIER, we are immune
869 to actions taken by reload and jump.) Then we scan all insns between
870 that point and our target. For each CLOBBER (or for call-clobbered regs
871 when we pass a CALL_INSN), mark the appropriate registers are dead. For
872 a SET, mark them as live.
873
874 We have to be careful when using REG_DEAD notes because they are not
875 updated by such things as find_equiv_reg. So keep track of registers
876 marked as dead that haven't been assigned to, and mark them dead at the
877 next CODE_LABEL since reload and jump won't propagate values across labels.
878
879 If we cannot find the start of a basic block (should be a very rare
880 case, if it can happen at all), mark everything as potentially live.
881
882 Next, scan forward from TARGET looking for things set or clobbered
883 before they are used. These are not live.
884
885 Because we can be called many times on the same target, save our results
886 in a hash table indexed by INSN_UID. This is only done if the function
887 init_resource_info () was invoked before we are called. */
888
889 void
890 mark_target_live_regs (rtx insns, rtx target, struct resources *res)
891 {
892 int b = -1;
893 unsigned int i;
894 struct target_info *tinfo = NULL;
895 rtx insn;
896 rtx jump_insn = 0;
897 rtx jump_target;
898 HARD_REG_SET scratch;
899 struct resources set, needed;
900
901 /* Handle end of function. */
902 if (target == 0)
903 {
904 *res = end_of_function_needs;
905 return;
906 }
907
908 /* Handle return insn. */
909 else if (return_insn_p (target))
910 {
911 *res = end_of_function_needs;
912 mark_referenced_resources (target, res, 0);
913 return;
914 }
915
916 /* We have to assume memory is needed, but the CC isn't. */
917 res->memory = 1;
918 res->volatil = res->unch_memory = 0;
919 res->cc = 0;
920
921 /* See if we have computed this value already. */
922 if (target_hash_table != NULL)
923 {
924 for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
925 tinfo; tinfo = tinfo->next)
926 if (tinfo->uid == INSN_UID (target))
927 break;
928
929 /* Start by getting the basic block number. If we have saved
930 information, we can get it from there unless the insn at the
931 start of the basic block has been deleted. */
932 if (tinfo && tinfo->block != -1
933 && ! INSN_DELETED_P (BB_HEAD (BASIC_BLOCK (tinfo->block))))
934 b = tinfo->block;
935 }
936
937 if (b == -1)
938 b = find_basic_block (target, MAX_DELAY_SLOT_LIVE_SEARCH);
939
940 if (target_hash_table != NULL)
941 {
942 if (tinfo)
943 {
944 /* If the information is up-to-date, use it. Otherwise, we will
945 update it below. */
946 if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b])
947 {
948 COPY_HARD_REG_SET (res->regs, tinfo->live_regs);
949 return;
950 }
951 }
952 else
953 {
954 /* Allocate a place to put our results and chain it into the
955 hash table. */
956 tinfo = XNEW (struct target_info);
957 tinfo->uid = INSN_UID (target);
958 tinfo->block = b;
959 tinfo->next
960 = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
961 target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo;
962 }
963 }
964
965 CLEAR_HARD_REG_SET (pending_dead_regs);
966
967 /* If we found a basic block, get the live registers from it and update
968 them with anything set or killed between its start and the insn before
969 TARGET. Otherwise, we must assume everything is live. */
970 if (b != -1)
971 {
972 regset regs_live = BASIC_BLOCK (b)->il.rtl->global_live_at_start;
973 unsigned int j;
974 unsigned int regno;
975 rtx start_insn, stop_insn;
976 reg_set_iterator rsi;
977
978 /* Compute hard regs live at start of block -- this is the real hard regs
979 marked live, plus live pseudo regs that have been renumbered to
980 hard regs. */
981
982 REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live);
983
984 EXECUTE_IF_SET_IN_REG_SET (regs_live, FIRST_PSEUDO_REGISTER, i, rsi)
985 {
986 if (reg_renumber[i] >= 0)
987 {
988 regno = reg_renumber[i];
989 for (j = regno;
990 j < regno + hard_regno_nregs[regno][PSEUDO_REGNO_MODE (i)];
991 j++)
992 SET_HARD_REG_BIT (current_live_regs, j);
993 }
994 }
995
996 /* Get starting and ending insn, handling the case where each might
997 be a SEQUENCE. */
998 start_insn = (b == 0 ? insns : BB_HEAD (BASIC_BLOCK (b)));
999 stop_insn = target;
1000
1001 if (NONJUMP_INSN_P (start_insn)
1002 && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
1003 start_insn = XVECEXP (PATTERN (start_insn), 0, 0);
1004
1005 if (NONJUMP_INSN_P (stop_insn)
1006 && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
1007 stop_insn = next_insn (PREV_INSN (stop_insn));
1008
1009 for (insn = start_insn; insn != stop_insn;
1010 insn = next_insn_no_annul (insn))
1011 {
1012 rtx link;
1013 rtx real_insn = insn;
1014 enum rtx_code code = GET_CODE (insn);
1015
1016 /* If this insn is from the target of a branch, it isn't going to
1017 be used in the sequel. If it is used in both cases, this
1018 test will not be true. */
1019 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
1020 && INSN_FROM_TARGET_P (insn))
1021 continue;
1022
1023 /* If this insn is a USE made by update_block, we care about the
1024 underlying insn. */
1025 if (code == INSN && GET_CODE (PATTERN (insn)) == USE
1026 && INSN_P (XEXP (PATTERN (insn), 0)))
1027 real_insn = XEXP (PATTERN (insn), 0);
1028
1029 if (CALL_P (real_insn))
1030 {
1031 /* CALL clobbers all call-used regs that aren't fixed except
1032 sp, ap, and fp. Do this before setting the result of the
1033 call live. */
1034 AND_COMPL_HARD_REG_SET (current_live_regs,
1035 regs_invalidated_by_call);
1036
1037 /* A CALL_INSN sets any global register live, since it may
1038 have been modified by the call. */
1039 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1040 if (global_regs[i])
1041 SET_HARD_REG_BIT (current_live_regs, i);
1042 }
1043
1044 /* Mark anything killed in an insn to be deadened at the next
1045 label. Ignore USE insns; the only REG_DEAD notes will be for
1046 parameters. But they might be early. A CALL_INSN will usually
1047 clobber registers used for parameters. It isn't worth bothering
1048 with the unlikely case when it won't. */
1049 if ((NONJUMP_INSN_P (real_insn)
1050 && GET_CODE (PATTERN (real_insn)) != USE
1051 && GET_CODE (PATTERN (real_insn)) != CLOBBER)
1052 || JUMP_P (real_insn)
1053 || CALL_P (real_insn))
1054 {
1055 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1056 if (REG_NOTE_KIND (link) == REG_DEAD
1057 && REG_P (XEXP (link, 0))
1058 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1059 {
1060 unsigned int first_regno = REGNO (XEXP (link, 0));
1061 unsigned int last_regno
1062 = (first_regno
1063 + hard_regno_nregs[first_regno]
1064 [GET_MODE (XEXP (link, 0))]);
1065
1066 for (i = first_regno; i < last_regno; i++)
1067 SET_HARD_REG_BIT (pending_dead_regs, i);
1068 }
1069
1070 note_stores (PATTERN (real_insn), update_live_status, NULL);
1071
1072 /* If any registers were unused after this insn, kill them.
1073 These notes will always be accurate. */
1074 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1075 if (REG_NOTE_KIND (link) == REG_UNUSED
1076 && REG_P (XEXP (link, 0))
1077 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1078 {
1079 unsigned int first_regno = REGNO (XEXP (link, 0));
1080 unsigned int last_regno
1081 = (first_regno
1082 + hard_regno_nregs[first_regno]
1083 [GET_MODE (XEXP (link, 0))]);
1084
1085 for (i = first_regno; i < last_regno; i++)
1086 CLEAR_HARD_REG_BIT (current_live_regs, i);
1087 }
1088 }
1089
1090 else if (LABEL_P (real_insn))
1091 {
1092 /* A label clobbers the pending dead registers since neither
1093 reload nor jump will propagate a value across a label. */
1094 AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs);
1095 CLEAR_HARD_REG_SET (pending_dead_regs);
1096 }
1097
1098 /* The beginning of the epilogue corresponds to the end of the
1099 RTL chain when there are no epilogue insns. Certain resources
1100 are implicitly required at that point. */
1101 else if (NOTE_P (real_insn)
1102 && NOTE_LINE_NUMBER (real_insn) == NOTE_INSN_EPILOGUE_BEG)
1103 IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
1104 }
1105
1106 COPY_HARD_REG_SET (res->regs, current_live_regs);
1107 if (tinfo != NULL)
1108 {
1109 tinfo->block = b;
1110 tinfo->bb_tick = bb_ticks[b];
1111 }
1112 }
1113 else
1114 /* We didn't find the start of a basic block. Assume everything
1115 in use. This should happen only extremely rarely. */
1116 SET_HARD_REG_SET (res->regs);
1117
1118 CLEAR_RESOURCE (&set);
1119 CLEAR_RESOURCE (&needed);
1120
1121 jump_insn = find_dead_or_set_registers (target, res, &jump_target, 0,
1122 set, needed);
1123
1124 /* If we hit an unconditional branch, we have another way of finding out
1125 what is live: we can see what is live at the branch target and include
1126 anything used but not set before the branch. We add the live
1127 resources found using the test below to those found until now. */
1128
1129 if (jump_insn)
1130 {
1131 struct resources new_resources;
1132 rtx stop_insn = next_active_insn (jump_insn);
1133
1134 mark_target_live_regs (insns, next_active_insn (jump_target),
1135 &new_resources);
1136 CLEAR_RESOURCE (&set);
1137 CLEAR_RESOURCE (&needed);
1138
1139 /* Include JUMP_INSN in the needed registers. */
1140 for (insn = target; insn != stop_insn; insn = next_active_insn (insn))
1141 {
1142 mark_referenced_resources (insn, &needed, 1);
1143
1144 COPY_HARD_REG_SET (scratch, needed.regs);
1145 AND_COMPL_HARD_REG_SET (scratch, set.regs);
1146 IOR_HARD_REG_SET (new_resources.regs, scratch);
1147
1148 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1149 }
1150
1151 IOR_HARD_REG_SET (res->regs, new_resources.regs);
1152 }
1153
1154 if (tinfo != NULL)
1155 {
1156 COPY_HARD_REG_SET (tinfo->live_regs, res->regs);
1157 }
1158 }
1159 \f
1160 /* Initialize the resources required by mark_target_live_regs ().
1161 This should be invoked before the first call to mark_target_live_regs. */
1162
1163 void
1164 init_resource_info (rtx epilogue_insn)
1165 {
1166 int i;
1167
1168 /* Indicate what resources are required to be valid at the end of the current
1169 function. The condition code never is and memory always is. If the
1170 frame pointer is needed, it is and so is the stack pointer unless
1171 EXIT_IGNORE_STACK is nonzero. If the frame pointer is not needed, the
1172 stack pointer is. Registers used to return the function value are
1173 needed. Registers holding global variables are needed. */
1174
1175 end_of_function_needs.cc = 0;
1176 end_of_function_needs.memory = 1;
1177 end_of_function_needs.unch_memory = 0;
1178 CLEAR_HARD_REG_SET (end_of_function_needs.regs);
1179
1180 if (frame_pointer_needed)
1181 {
1182 SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM);
1183 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1184 SET_HARD_REG_BIT (end_of_function_needs.regs, HARD_FRAME_POINTER_REGNUM);
1185 #endif
1186 if (! EXIT_IGNORE_STACK
1187 || current_function_sp_is_unchanging)
1188 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1189 }
1190 else
1191 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1192
1193 if (current_function_return_rtx != 0)
1194 mark_referenced_resources (current_function_return_rtx,
1195 &end_of_function_needs, 1);
1196
1197 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1198 if (global_regs[i]
1199 #ifdef EPILOGUE_USES
1200 || EPILOGUE_USES (i)
1201 #endif
1202 )
1203 SET_HARD_REG_BIT (end_of_function_needs.regs, i);
1204
1205 /* The registers required to be live at the end of the function are
1206 represented in the flow information as being dead just prior to
1207 reaching the end of the function. For example, the return of a value
1208 might be represented by a USE of the return register immediately
1209 followed by an unconditional jump to the return label where the
1210 return label is the end of the RTL chain. The end of the RTL chain
1211 is then taken to mean that the return register is live.
1212
1213 This sequence is no longer maintained when epilogue instructions are
1214 added to the RTL chain. To reconstruct the original meaning, the
1215 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1216 point where these registers become live (start_of_epilogue_needs).
1217 If epilogue instructions are present, the registers set by those
1218 instructions won't have been processed by flow. Thus, those
1219 registers are additionally required at the end of the RTL chain
1220 (end_of_function_needs). */
1221
1222 start_of_epilogue_needs = end_of_function_needs;
1223
1224 while ((epilogue_insn = next_nonnote_insn (epilogue_insn)))
1225 {
1226 mark_set_resources (epilogue_insn, &end_of_function_needs, 0,
1227 MARK_SRC_DEST_CALL);
1228 if (return_insn_p (epilogue_insn))
1229 break;
1230 }
1231
1232 /* Allocate and initialize the tables used by mark_target_live_regs. */
1233 target_hash_table = XCNEWVEC (struct target_info *, TARGET_HASH_PRIME);
1234 bb_ticks = XCNEWVEC (int, last_basic_block);
1235 }
1236 \f
1237 /* Free up the resources allocated to mark_target_live_regs (). This
1238 should be invoked after the last call to mark_target_live_regs (). */
1239
1240 void
1241 free_resource_info (void)
1242 {
1243 if (target_hash_table != NULL)
1244 {
1245 int i;
1246
1247 for (i = 0; i < TARGET_HASH_PRIME; ++i)
1248 {
1249 struct target_info *ti = target_hash_table[i];
1250
1251 while (ti)
1252 {
1253 struct target_info *next = ti->next;
1254 free (ti);
1255 ti = next;
1256 }
1257 }
1258
1259 free (target_hash_table);
1260 target_hash_table = NULL;
1261 }
1262
1263 if (bb_ticks != NULL)
1264 {
1265 free (bb_ticks);
1266 bb_ticks = NULL;
1267 }
1268 }
1269 \f
1270 /* Clear any hashed information that we have stored for INSN. */
1271
1272 void
1273 clear_hashed_info_for_insn (rtx insn)
1274 {
1275 struct target_info *tinfo;
1276
1277 if (target_hash_table != NULL)
1278 {
1279 for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME];
1280 tinfo; tinfo = tinfo->next)
1281 if (tinfo->uid == INSN_UID (insn))
1282 break;
1283
1284 if (tinfo)
1285 tinfo->block = -1;
1286 }
1287 }
1288 \f
1289 /* Increment the tick count for the basic block that contains INSN. */
1290
1291 void
1292 incr_ticks_for_insn (rtx insn)
1293 {
1294 int b = find_basic_block (insn, MAX_DELAY_SLOT_LIVE_SEARCH);
1295
1296 if (b != -1)
1297 bb_ticks[b]++;
1298 }
1299 \f
1300 /* Add TRIAL to the set of resources used at the end of the current
1301 function. */
1302 void
1303 mark_end_of_function_resources (rtx trial, int include_delayed_effects)
1304 {
1305 mark_referenced_resources (trial, &end_of_function_needs,
1306 include_delayed_effects);
1307 }