cp-tree.h (lang_identifier): Remove class_value.
[gcc.git] / gcc / resource.c
1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "toplev.h"
27 #include "rtl.h"
28 #include "tm_p.h"
29 #include "hard-reg-set.h"
30 #include "basic-block.h"
31 #include "function.h"
32 #include "regs.h"
33 #include "flags.h"
34 #include "output.h"
35 #include "resource.h"
36 #include "except.h"
37 #include "insn-attr.h"
38 #include "params.h"
39
40 /* This structure is used to record liveness information at the targets or
41 fallthrough insns of branches. We will most likely need the information
42 at targets again, so save them in a hash table rather than recomputing them
43 each time. */
44
45 struct target_info
46 {
47 int uid; /* INSN_UID of target. */
48 struct target_info *next; /* Next info for same hash bucket. */
49 HARD_REG_SET live_regs; /* Registers live at target. */
50 int block; /* Basic block number containing target. */
51 int bb_tick; /* Generation count of basic block info. */
52 };
53
54 #define TARGET_HASH_PRIME 257
55
56 /* Indicates what resources are required at the beginning of the epilogue. */
57 static struct resources start_of_epilogue_needs;
58
59 /* Indicates what resources are required at function end. */
60 static struct resources end_of_function_needs;
61
62 /* Define the hash table itself. */
63 static struct target_info **target_hash_table = NULL;
64
65 /* For each basic block, we maintain a generation number of its basic
66 block info, which is updated each time we move an insn from the
67 target of a jump. This is the generation number indexed by block
68 number. */
69
70 static int *bb_ticks;
71
72 /* Marks registers possibly live at the current place being scanned by
73 mark_target_live_regs. Also used by update_live_status. */
74
75 static HARD_REG_SET current_live_regs;
76
77 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
78 Also only used by the next two functions. */
79
80 static HARD_REG_SET pending_dead_regs;
81 \f
82 static void update_live_status (rtx, rtx, void *);
83 static int find_basic_block (rtx, int);
84 static rtx next_insn_no_annul (rtx);
85 static rtx find_dead_or_set_registers (rtx, struct resources*,
86 rtx*, int, struct resources,
87 struct resources);
88 \f
89 /* Utility function called from mark_target_live_regs via note_stores.
90 It deadens any CLOBBERed registers and livens any SET registers. */
91
92 static void
93 update_live_status (rtx dest, rtx x, void *data ATTRIBUTE_UNUSED)
94 {
95 int first_regno, last_regno;
96 int i;
97
98 if (!REG_P (dest)
99 && (GET_CODE (dest) != SUBREG || !REG_P (SUBREG_REG (dest))))
100 return;
101
102 if (GET_CODE (dest) == SUBREG)
103 first_regno = subreg_regno (dest);
104 else
105 first_regno = REGNO (dest);
106
107 last_regno = first_regno + hard_regno_nregs[first_regno][GET_MODE (dest)];
108
109 if (GET_CODE (x) == CLOBBER)
110 for (i = first_regno; i < last_regno; i++)
111 CLEAR_HARD_REG_BIT (current_live_regs, i);
112 else
113 for (i = first_regno; i < last_regno; i++)
114 {
115 SET_HARD_REG_BIT (current_live_regs, i);
116 CLEAR_HARD_REG_BIT (pending_dead_regs, i);
117 }
118 }
119
120 /* Find the number of the basic block with correct live register
121 information that starts closest to INSN. Return -1 if we couldn't
122 find such a basic block or the beginning is more than
123 SEARCH_LIMIT instructions before INSN. Use SEARCH_LIMIT = -1 for
124 an unlimited search.
125
126 The delay slot filling code destroys the control-flow graph so,
127 instead of finding the basic block containing INSN, we search
128 backwards toward a BARRIER where the live register information is
129 correct. */
130
131 static int
132 find_basic_block (rtx insn, int search_limit)
133 {
134 basic_block bb;
135
136 /* Scan backwards to the previous BARRIER. Then see if we can find a
137 label that starts a basic block. Return the basic block number. */
138 for (insn = prev_nonnote_insn (insn);
139 insn && !BARRIER_P (insn) && search_limit != 0;
140 insn = prev_nonnote_insn (insn), --search_limit)
141 ;
142
143 /* The closest BARRIER is too far away. */
144 if (search_limit == 0)
145 return -1;
146
147 /* The start of the function. */
148 else if (insn == 0)
149 return ENTRY_BLOCK_PTR->next_bb->index;
150
151 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
152 anything other than a CODE_LABEL or note, we can't find this code. */
153 for (insn = next_nonnote_insn (insn);
154 insn && LABEL_P (insn);
155 insn = next_nonnote_insn (insn))
156 {
157 FOR_EACH_BB (bb)
158 if (insn == BB_HEAD (bb))
159 return bb->index;
160 }
161
162 return -1;
163 }
164 \f
165 /* Similar to next_insn, but ignores insns in the delay slots of
166 an annulled branch. */
167
168 static rtx
169 next_insn_no_annul (rtx insn)
170 {
171 if (insn)
172 {
173 /* If INSN is an annulled branch, skip any insns from the target
174 of the branch. */
175 if (INSN_P (insn)
176 && INSN_ANNULLED_BRANCH_P (insn)
177 && NEXT_INSN (PREV_INSN (insn)) != insn)
178 {
179 rtx next = NEXT_INSN (insn);
180 enum rtx_code code = GET_CODE (next);
181
182 while ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
183 && INSN_FROM_TARGET_P (next))
184 {
185 insn = next;
186 next = NEXT_INSN (insn);
187 code = GET_CODE (next);
188 }
189 }
190
191 insn = NEXT_INSN (insn);
192 if (insn && NONJUMP_INSN_P (insn)
193 && GET_CODE (PATTERN (insn)) == SEQUENCE)
194 insn = XVECEXP (PATTERN (insn), 0, 0);
195 }
196
197 return insn;
198 }
199 \f
200 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
201 which resources are referenced by the insn. If INCLUDE_DELAYED_EFFECTS
202 is TRUE, resources used by the called routine will be included for
203 CALL_INSNs. */
204
205 void
206 mark_referenced_resources (rtx x, struct resources *res,
207 int include_delayed_effects)
208 {
209 enum rtx_code code = GET_CODE (x);
210 int i, j;
211 unsigned int r;
212 const char *format_ptr;
213
214 /* Handle leaf items for which we set resource flags. Also, special-case
215 CALL, SET and CLOBBER operators. */
216 switch (code)
217 {
218 case CONST:
219 case CONST_INT:
220 case CONST_DOUBLE:
221 case CONST_VECTOR:
222 case PC:
223 case SYMBOL_REF:
224 case LABEL_REF:
225 return;
226
227 case SUBREG:
228 if (!REG_P (SUBREG_REG (x)))
229 mark_referenced_resources (SUBREG_REG (x), res, 0);
230 else
231 {
232 unsigned int regno = subreg_regno (x);
233 unsigned int last_regno
234 = regno + hard_regno_nregs[regno][GET_MODE (x)];
235
236 if (last_regno > FIRST_PSEUDO_REGISTER)
237 abort ();
238 for (r = regno; r < last_regno; r++)
239 SET_HARD_REG_BIT (res->regs, r);
240 }
241 return;
242
243 case REG:
244 {
245 unsigned int regno = REGNO (x);
246 unsigned int last_regno
247 = regno + hard_regno_nregs[regno][GET_MODE (x)];
248
249 if (last_regno > FIRST_PSEUDO_REGISTER)
250 abort ();
251 for (r = regno; r < last_regno; r++)
252 SET_HARD_REG_BIT (res->regs, r);
253 }
254 return;
255
256 case MEM:
257 /* If this memory shouldn't change, it really isn't referencing
258 memory. */
259 if (RTX_UNCHANGING_P (x))
260 res->unch_memory = 1;
261 else
262 res->memory = 1;
263 res->volatil |= MEM_VOLATILE_P (x);
264
265 /* Mark registers used to access memory. */
266 mark_referenced_resources (XEXP (x, 0), res, 0);
267 return;
268
269 case CC0:
270 res->cc = 1;
271 return;
272
273 case UNSPEC_VOLATILE:
274 case ASM_INPUT:
275 /* Traditional asm's are always volatile. */
276 res->volatil = 1;
277 return;
278
279 case TRAP_IF:
280 res->volatil = 1;
281 break;
282
283 case ASM_OPERANDS:
284 res->volatil |= MEM_VOLATILE_P (x);
285
286 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
287 We can not just fall through here since then we would be confused
288 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
289 traditional asms unlike their normal usage. */
290
291 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
292 mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, 0);
293 return;
294
295 case CALL:
296 /* The first operand will be a (MEM (xxx)) but doesn't really reference
297 memory. The second operand may be referenced, though. */
298 mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, 0);
299 mark_referenced_resources (XEXP (x, 1), res, 0);
300 return;
301
302 case SET:
303 /* Usually, the first operand of SET is set, not referenced. But
304 registers used to access memory are referenced. SET_DEST is
305 also referenced if it is a ZERO_EXTRACT or SIGN_EXTRACT. */
306
307 mark_referenced_resources (SET_SRC (x), res, 0);
308
309 x = SET_DEST (x);
310 if (GET_CODE (x) == SIGN_EXTRACT
311 || GET_CODE (x) == ZERO_EXTRACT
312 || GET_CODE (x) == STRICT_LOW_PART)
313 mark_referenced_resources (x, res, 0);
314 else if (GET_CODE (x) == SUBREG)
315 x = SUBREG_REG (x);
316 if (MEM_P (x))
317 mark_referenced_resources (XEXP (x, 0), res, 0);
318 return;
319
320 case CLOBBER:
321 return;
322
323 case CALL_INSN:
324 if (include_delayed_effects)
325 {
326 /* A CALL references memory, the frame pointer if it exists, the
327 stack pointer, any global registers and any registers given in
328 USE insns immediately in front of the CALL.
329
330 However, we may have moved some of the parameter loading insns
331 into the delay slot of this CALL. If so, the USE's for them
332 don't count and should be skipped. */
333 rtx insn = PREV_INSN (x);
334 rtx sequence = 0;
335 int seq_size = 0;
336 int i;
337
338 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
339 if (NEXT_INSN (insn) != x)
340 {
341 sequence = PATTERN (NEXT_INSN (insn));
342 seq_size = XVECLEN (sequence, 0);
343 if (GET_CODE (sequence) != SEQUENCE)
344 abort ();
345 }
346
347 res->memory = 1;
348 SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM);
349 if (frame_pointer_needed)
350 {
351 SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM);
352 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
353 SET_HARD_REG_BIT (res->regs, HARD_FRAME_POINTER_REGNUM);
354 #endif
355 }
356
357 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
358 if (global_regs[i])
359 SET_HARD_REG_BIT (res->regs, i);
360
361 /* Check for a REG_SETJMP. If it exists, then we must
362 assume that this call can need any register.
363
364 This is done to be more conservative about how we handle setjmp.
365 We assume that they both use and set all registers. Using all
366 registers ensures that a register will not be considered dead
367 just because it crosses a setjmp call. A register should be
368 considered dead only if the setjmp call returns nonzero. */
369 if (find_reg_note (x, REG_SETJMP, NULL))
370 SET_HARD_REG_SET (res->regs);
371
372 {
373 rtx link;
374
375 for (link = CALL_INSN_FUNCTION_USAGE (x);
376 link;
377 link = XEXP (link, 1))
378 if (GET_CODE (XEXP (link, 0)) == USE)
379 {
380 for (i = 1; i < seq_size; i++)
381 {
382 rtx slot_pat = PATTERN (XVECEXP (sequence, 0, i));
383 if (GET_CODE (slot_pat) == SET
384 && rtx_equal_p (SET_DEST (slot_pat),
385 XEXP (XEXP (link, 0), 0)))
386 break;
387 }
388 if (i >= seq_size)
389 mark_referenced_resources (XEXP (XEXP (link, 0), 0),
390 res, 0);
391 }
392 }
393 }
394
395 /* ... fall through to other INSN processing ... */
396
397 case INSN:
398 case JUMP_INSN:
399
400 #ifdef INSN_REFERENCES_ARE_DELAYED
401 if (! include_delayed_effects
402 && INSN_REFERENCES_ARE_DELAYED (x))
403 return;
404 #endif
405
406 /* No special processing, just speed up. */
407 mark_referenced_resources (PATTERN (x), res, include_delayed_effects);
408 return;
409
410 default:
411 break;
412 }
413
414 /* Process each sub-expression and flag what it needs. */
415 format_ptr = GET_RTX_FORMAT (code);
416 for (i = 0; i < GET_RTX_LENGTH (code); i++)
417 switch (*format_ptr++)
418 {
419 case 'e':
420 mark_referenced_resources (XEXP (x, i), res, include_delayed_effects);
421 break;
422
423 case 'E':
424 for (j = 0; j < XVECLEN (x, i); j++)
425 mark_referenced_resources (XVECEXP (x, i, j), res,
426 include_delayed_effects);
427 break;
428 }
429 }
430 \f
431 /* A subroutine of mark_target_live_regs. Search forward from TARGET
432 looking for registers that are set before they are used. These are dead.
433 Stop after passing a few conditional jumps, and/or a small
434 number of unconditional branches. */
435
436 static rtx
437 find_dead_or_set_registers (rtx target, struct resources *res,
438 rtx *jump_target, int jump_count,
439 struct resources set, struct resources needed)
440 {
441 HARD_REG_SET scratch;
442 rtx insn, next;
443 rtx jump_insn = 0;
444 int i;
445
446 for (insn = target; insn; insn = next)
447 {
448 rtx this_jump_insn = insn;
449
450 next = NEXT_INSN (insn);
451
452 /* If this instruction can throw an exception, then we don't
453 know where we might end up next. That means that we have to
454 assume that whatever we have already marked as live really is
455 live. */
456 if (can_throw_internal (insn))
457 break;
458
459 switch (GET_CODE (insn))
460 {
461 case CODE_LABEL:
462 /* After a label, any pending dead registers that weren't yet
463 used can be made dead. */
464 AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs);
465 AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs);
466 CLEAR_HARD_REG_SET (pending_dead_regs);
467
468 continue;
469
470 case BARRIER:
471 case NOTE:
472 continue;
473
474 case INSN:
475 if (GET_CODE (PATTERN (insn)) == USE)
476 {
477 /* If INSN is a USE made by update_block, we care about the
478 underlying insn. Any registers set by the underlying insn
479 are live since the insn is being done somewhere else. */
480 if (INSN_P (XEXP (PATTERN (insn), 0)))
481 mark_set_resources (XEXP (PATTERN (insn), 0), res, 0,
482 MARK_SRC_DEST_CALL);
483
484 /* All other USE insns are to be ignored. */
485 continue;
486 }
487 else if (GET_CODE (PATTERN (insn)) == CLOBBER)
488 continue;
489 else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
490 {
491 /* An unconditional jump can be used to fill the delay slot
492 of a call, so search for a JUMP_INSN in any position. */
493 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
494 {
495 this_jump_insn = XVECEXP (PATTERN (insn), 0, i);
496 if (JUMP_P (this_jump_insn))
497 break;
498 }
499 }
500
501 default:
502 break;
503 }
504
505 if (JUMP_P (this_jump_insn))
506 {
507 if (jump_count++ < 10)
508 {
509 if (any_uncondjump_p (this_jump_insn)
510 || GET_CODE (PATTERN (this_jump_insn)) == RETURN)
511 {
512 next = JUMP_LABEL (this_jump_insn);
513 if (jump_insn == 0)
514 {
515 jump_insn = insn;
516 if (jump_target)
517 *jump_target = JUMP_LABEL (this_jump_insn);
518 }
519 }
520 else if (any_condjump_p (this_jump_insn))
521 {
522 struct resources target_set, target_res;
523 struct resources fallthrough_res;
524
525 /* We can handle conditional branches here by following
526 both paths, and then IOR the results of the two paths
527 together, which will give us registers that are dead
528 on both paths. Since this is expensive, we give it
529 a much higher cost than unconditional branches. The
530 cost was chosen so that we will follow at most 1
531 conditional branch. */
532
533 jump_count += 4;
534 if (jump_count >= 10)
535 break;
536
537 mark_referenced_resources (insn, &needed, 1);
538
539 /* For an annulled branch, mark_set_resources ignores slots
540 filled by instructions from the target. This is correct
541 if the branch is not taken. Since we are following both
542 paths from the branch, we must also compute correct info
543 if the branch is taken. We do this by inverting all of
544 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
545 and then inverting the INSN_FROM_TARGET_P bits again. */
546
547 if (GET_CODE (PATTERN (insn)) == SEQUENCE
548 && INSN_ANNULLED_BRANCH_P (this_jump_insn))
549 {
550 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
551 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
552 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
553
554 target_set = set;
555 mark_set_resources (insn, &target_set, 0,
556 MARK_SRC_DEST_CALL);
557
558 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
559 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
560 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
561
562 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
563 }
564 else
565 {
566 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
567 target_set = set;
568 }
569
570 target_res = *res;
571 COPY_HARD_REG_SET (scratch, target_set.regs);
572 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
573 AND_COMPL_HARD_REG_SET (target_res.regs, scratch);
574
575 fallthrough_res = *res;
576 COPY_HARD_REG_SET (scratch, set.regs);
577 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
578 AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
579
580 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn),
581 &target_res, 0, jump_count,
582 target_set, needed);
583 find_dead_or_set_registers (next,
584 &fallthrough_res, 0, jump_count,
585 set, needed);
586 IOR_HARD_REG_SET (fallthrough_res.regs, target_res.regs);
587 AND_HARD_REG_SET (res->regs, fallthrough_res.regs);
588 break;
589 }
590 else
591 break;
592 }
593 else
594 {
595 /* Don't try this optimization if we expired our jump count
596 above, since that would mean there may be an infinite loop
597 in the function being compiled. */
598 jump_insn = 0;
599 break;
600 }
601 }
602
603 mark_referenced_resources (insn, &needed, 1);
604 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
605
606 COPY_HARD_REG_SET (scratch, set.regs);
607 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
608 AND_COMPL_HARD_REG_SET (res->regs, scratch);
609 }
610
611 return jump_insn;
612 }
613 \f
614 /* Given X, a part of an insn, and a pointer to a `struct resource',
615 RES, indicate which resources are modified by the insn. If
616 MARK_TYPE is MARK_SRC_DEST_CALL, also mark resources potentially
617 set by the called routine.
618
619 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
620 objects are being referenced instead of set.
621
622 We never mark the insn as modifying the condition code unless it explicitly
623 SETs CC0 even though this is not totally correct. The reason for this is
624 that we require a SET of CC0 to immediately precede the reference to CC0.
625 So if some other insn sets CC0 as a side-effect, we know it cannot affect
626 our computation and thus may be placed in a delay slot. */
627
628 void
629 mark_set_resources (rtx x, struct resources *res, int in_dest,
630 enum mark_resource_type mark_type)
631 {
632 enum rtx_code code;
633 int i, j;
634 unsigned int r;
635 const char *format_ptr;
636
637 restart:
638
639 code = GET_CODE (x);
640
641 switch (code)
642 {
643 case NOTE:
644 case BARRIER:
645 case CODE_LABEL:
646 case USE:
647 case CONST_INT:
648 case CONST_DOUBLE:
649 case CONST_VECTOR:
650 case LABEL_REF:
651 case SYMBOL_REF:
652 case CONST:
653 case PC:
654 /* These don't set any resources. */
655 return;
656
657 case CC0:
658 if (in_dest)
659 res->cc = 1;
660 return;
661
662 case CALL_INSN:
663 /* Called routine modifies the condition code, memory, any registers
664 that aren't saved across calls, global registers and anything
665 explicitly CLOBBERed immediately after the CALL_INSN. */
666
667 if (mark_type == MARK_SRC_DEST_CALL)
668 {
669 rtx link;
670
671 res->cc = res->memory = 1;
672 for (r = 0; r < FIRST_PSEUDO_REGISTER; r++)
673 if (call_used_regs[r] || global_regs[r])
674 SET_HARD_REG_BIT (res->regs, r);
675
676 for (link = CALL_INSN_FUNCTION_USAGE (x);
677 link; link = XEXP (link, 1))
678 if (GET_CODE (XEXP (link, 0)) == CLOBBER)
679 mark_set_resources (SET_DEST (XEXP (link, 0)), res, 1,
680 MARK_SRC_DEST);
681
682 /* Check for a REG_SETJMP. If it exists, then we must
683 assume that this call can clobber any register. */
684 if (find_reg_note (x, REG_SETJMP, NULL))
685 SET_HARD_REG_SET (res->regs);
686 }
687
688 /* ... and also what its RTL says it modifies, if anything. */
689
690 case JUMP_INSN:
691 case INSN:
692
693 /* An insn consisting of just a CLOBBER (or USE) is just for flow
694 and doesn't actually do anything, so we ignore it. */
695
696 #ifdef INSN_SETS_ARE_DELAYED
697 if (mark_type != MARK_SRC_DEST_CALL
698 && INSN_SETS_ARE_DELAYED (x))
699 return;
700 #endif
701
702 x = PATTERN (x);
703 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
704 goto restart;
705 return;
706
707 case SET:
708 /* If the source of a SET is a CALL, this is actually done by
709 the called routine. So only include it if we are to include the
710 effects of the calling routine. */
711
712 mark_set_resources (SET_DEST (x), res,
713 (mark_type == MARK_SRC_DEST_CALL
714 || GET_CODE (SET_SRC (x)) != CALL),
715 mark_type);
716
717 mark_set_resources (SET_SRC (x), res, 0, MARK_SRC_DEST);
718 return;
719
720 case CLOBBER:
721 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
722 return;
723
724 case SEQUENCE:
725 for (i = 0; i < XVECLEN (x, 0); i++)
726 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x, 0, 0))
727 && INSN_FROM_TARGET_P (XVECEXP (x, 0, i))))
728 mark_set_resources (XVECEXP (x, 0, i), res, 0, mark_type);
729 return;
730
731 case POST_INC:
732 case PRE_INC:
733 case POST_DEC:
734 case PRE_DEC:
735 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
736 return;
737
738 case PRE_MODIFY:
739 case POST_MODIFY:
740 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
741 mark_set_resources (XEXP (XEXP (x, 1), 0), res, 0, MARK_SRC_DEST);
742 mark_set_resources (XEXP (XEXP (x, 1), 1), res, 0, MARK_SRC_DEST);
743 return;
744
745 case SIGN_EXTRACT:
746 case ZERO_EXTRACT:
747 mark_set_resources (XEXP (x, 0), res, in_dest, MARK_SRC_DEST);
748 mark_set_resources (XEXP (x, 1), res, 0, MARK_SRC_DEST);
749 mark_set_resources (XEXP (x, 2), res, 0, MARK_SRC_DEST);
750 return;
751
752 case MEM:
753 if (in_dest)
754 {
755 res->memory = 1;
756 res->unch_memory |= RTX_UNCHANGING_P (x);
757 res->volatil |= MEM_VOLATILE_P (x);
758 }
759
760 mark_set_resources (XEXP (x, 0), res, 0, MARK_SRC_DEST);
761 return;
762
763 case SUBREG:
764 if (in_dest)
765 {
766 if (!REG_P (SUBREG_REG (x)))
767 mark_set_resources (SUBREG_REG (x), res, in_dest, mark_type);
768 else
769 {
770 unsigned int regno = subreg_regno (x);
771 unsigned int last_regno
772 = regno + hard_regno_nregs[regno][GET_MODE (x)];
773
774 if (last_regno > FIRST_PSEUDO_REGISTER)
775 abort ();
776 for (r = regno; r < last_regno; r++)
777 SET_HARD_REG_BIT (res->regs, r);
778 }
779 }
780 return;
781
782 case REG:
783 if (in_dest)
784 {
785 unsigned int regno = REGNO (x);
786 unsigned int last_regno
787 = regno + hard_regno_nregs[regno][GET_MODE (x)];
788
789 if (last_regno > FIRST_PSEUDO_REGISTER)
790 abort ();
791 for (r = regno; r < last_regno; r++)
792 SET_HARD_REG_BIT (res->regs, r);
793 }
794 return;
795
796 case UNSPEC_VOLATILE:
797 case ASM_INPUT:
798 /* Traditional asm's are always volatile. */
799 res->volatil = 1;
800 return;
801
802 case TRAP_IF:
803 res->volatil = 1;
804 break;
805
806 case ASM_OPERANDS:
807 res->volatil |= MEM_VOLATILE_P (x);
808
809 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
810 We can not just fall through here since then we would be confused
811 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
812 traditional asms unlike their normal usage. */
813
814 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
815 mark_set_resources (ASM_OPERANDS_INPUT (x, i), res, in_dest,
816 MARK_SRC_DEST);
817 return;
818
819 default:
820 break;
821 }
822
823 /* Process each sub-expression and flag what it needs. */
824 format_ptr = GET_RTX_FORMAT (code);
825 for (i = 0; i < GET_RTX_LENGTH (code); i++)
826 switch (*format_ptr++)
827 {
828 case 'e':
829 mark_set_resources (XEXP (x, i), res, in_dest, mark_type);
830 break;
831
832 case 'E':
833 for (j = 0; j < XVECLEN (x, i); j++)
834 mark_set_resources (XVECEXP (x, i, j), res, in_dest, mark_type);
835 break;
836 }
837 }
838 \f
839 /* Set the resources that are live at TARGET.
840
841 If TARGET is zero, we refer to the end of the current function and can
842 return our precomputed value.
843
844 Otherwise, we try to find out what is live by consulting the basic block
845 information. This is tricky, because we must consider the actions of
846 reload and jump optimization, which occur after the basic block information
847 has been computed.
848
849 Accordingly, we proceed as follows::
850
851 We find the previous BARRIER and look at all immediately following labels
852 (with no intervening active insns) to see if any of them start a basic
853 block. If we hit the start of the function first, we use block 0.
854
855 Once we have found a basic block and a corresponding first insns, we can
856 accurately compute the live status from basic_block_live_regs and
857 reg_renumber. (By starting at a label following a BARRIER, we are immune
858 to actions taken by reload and jump.) Then we scan all insns between
859 that point and our target. For each CLOBBER (or for call-clobbered regs
860 when we pass a CALL_INSN), mark the appropriate registers are dead. For
861 a SET, mark them as live.
862
863 We have to be careful when using REG_DEAD notes because they are not
864 updated by such things as find_equiv_reg. So keep track of registers
865 marked as dead that haven't been assigned to, and mark them dead at the
866 next CODE_LABEL since reload and jump won't propagate values across labels.
867
868 If we cannot find the start of a basic block (should be a very rare
869 case, if it can happen at all), mark everything as potentially live.
870
871 Next, scan forward from TARGET looking for things set or clobbered
872 before they are used. These are not live.
873
874 Because we can be called many times on the same target, save our results
875 in a hash table indexed by INSN_UID. This is only done if the function
876 init_resource_info () was invoked before we are called. */
877
878 void
879 mark_target_live_regs (rtx insns, rtx target, struct resources *res)
880 {
881 int b = -1;
882 unsigned int i;
883 struct target_info *tinfo = NULL;
884 rtx insn;
885 rtx jump_insn = 0;
886 rtx jump_target;
887 HARD_REG_SET scratch;
888 struct resources set, needed;
889
890 /* Handle end of function. */
891 if (target == 0)
892 {
893 *res = end_of_function_needs;
894 return;
895 }
896
897 /* We have to assume memory is needed, but the CC isn't. */
898 res->memory = 1;
899 res->volatil = res->unch_memory = 0;
900 res->cc = 0;
901
902 /* See if we have computed this value already. */
903 if (target_hash_table != NULL)
904 {
905 for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
906 tinfo; tinfo = tinfo->next)
907 if (tinfo->uid == INSN_UID (target))
908 break;
909
910 /* Start by getting the basic block number. If we have saved
911 information, we can get it from there unless the insn at the
912 start of the basic block has been deleted. */
913 if (tinfo && tinfo->block != -1
914 && ! INSN_DELETED_P (BB_HEAD (BASIC_BLOCK (tinfo->block))))
915 b = tinfo->block;
916 }
917
918 if (b == -1)
919 b = find_basic_block (target, MAX_DELAY_SLOT_LIVE_SEARCH);
920
921 if (target_hash_table != NULL)
922 {
923 if (tinfo)
924 {
925 /* If the information is up-to-date, use it. Otherwise, we will
926 update it below. */
927 if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b])
928 {
929 COPY_HARD_REG_SET (res->regs, tinfo->live_regs);
930 return;
931 }
932 }
933 else
934 {
935 /* Allocate a place to put our results and chain it into the
936 hash table. */
937 tinfo = xmalloc (sizeof (struct target_info));
938 tinfo->uid = INSN_UID (target);
939 tinfo->block = b;
940 tinfo->next
941 = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
942 target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo;
943 }
944 }
945
946 CLEAR_HARD_REG_SET (pending_dead_regs);
947
948 /* If we found a basic block, get the live registers from it and update
949 them with anything set or killed between its start and the insn before
950 TARGET. Otherwise, we must assume everything is live. */
951 if (b != -1)
952 {
953 regset regs_live = BASIC_BLOCK (b)->global_live_at_start;
954 unsigned int j;
955 unsigned int regno;
956 rtx start_insn, stop_insn;
957
958 /* Compute hard regs live at start of block -- this is the real hard regs
959 marked live, plus live pseudo regs that have been renumbered to
960 hard regs. */
961
962 REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live);
963
964 EXECUTE_IF_SET_IN_REG_SET
965 (regs_live, FIRST_PSEUDO_REGISTER, i,
966 {
967 if (reg_renumber[i] >= 0)
968 {
969 regno = reg_renumber[i];
970 for (j = regno;
971 j < regno + hard_regno_nregs[regno]
972 [PSEUDO_REGNO_MODE (i)];
973 j++)
974 SET_HARD_REG_BIT (current_live_regs, j);
975 }
976 });
977
978 /* Get starting and ending insn, handling the case where each might
979 be a SEQUENCE. */
980 start_insn = (b == 0 ? insns : BB_HEAD (BASIC_BLOCK (b)));
981 stop_insn = target;
982
983 if (NONJUMP_INSN_P (start_insn)
984 && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
985 start_insn = XVECEXP (PATTERN (start_insn), 0, 0);
986
987 if (NONJUMP_INSN_P (stop_insn)
988 && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
989 stop_insn = next_insn (PREV_INSN (stop_insn));
990
991 for (insn = start_insn; insn != stop_insn;
992 insn = next_insn_no_annul (insn))
993 {
994 rtx link;
995 rtx real_insn = insn;
996 enum rtx_code code = GET_CODE (insn);
997
998 /* If this insn is from the target of a branch, it isn't going to
999 be used in the sequel. If it is used in both cases, this
1000 test will not be true. */
1001 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
1002 && INSN_FROM_TARGET_P (insn))
1003 continue;
1004
1005 /* If this insn is a USE made by update_block, we care about the
1006 underlying insn. */
1007 if (code == INSN && GET_CODE (PATTERN (insn)) == USE
1008 && INSN_P (XEXP (PATTERN (insn), 0)))
1009 real_insn = XEXP (PATTERN (insn), 0);
1010
1011 if (CALL_P (real_insn))
1012 {
1013 /* CALL clobbers all call-used regs that aren't fixed except
1014 sp, ap, and fp. Do this before setting the result of the
1015 call live. */
1016 AND_COMPL_HARD_REG_SET (current_live_regs,
1017 regs_invalidated_by_call);
1018
1019 /* A CALL_INSN sets any global register live, since it may
1020 have been modified by the call. */
1021 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1022 if (global_regs[i])
1023 SET_HARD_REG_BIT (current_live_regs, i);
1024 }
1025
1026 /* Mark anything killed in an insn to be deadened at the next
1027 label. Ignore USE insns; the only REG_DEAD notes will be for
1028 parameters. But they might be early. A CALL_INSN will usually
1029 clobber registers used for parameters. It isn't worth bothering
1030 with the unlikely case when it won't. */
1031 if ((NONJUMP_INSN_P (real_insn)
1032 && GET_CODE (PATTERN (real_insn)) != USE
1033 && GET_CODE (PATTERN (real_insn)) != CLOBBER)
1034 || JUMP_P (real_insn)
1035 || CALL_P (real_insn))
1036 {
1037 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1038 if (REG_NOTE_KIND (link) == REG_DEAD
1039 && REG_P (XEXP (link, 0))
1040 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1041 {
1042 unsigned int first_regno = REGNO (XEXP (link, 0));
1043 unsigned int last_regno
1044 = (first_regno
1045 + hard_regno_nregs[first_regno]
1046 [GET_MODE (XEXP (link, 0))]);
1047
1048 for (i = first_regno; i < last_regno; i++)
1049 SET_HARD_REG_BIT (pending_dead_regs, i);
1050 }
1051
1052 note_stores (PATTERN (real_insn), update_live_status, NULL);
1053
1054 /* If any registers were unused after this insn, kill them.
1055 These notes will always be accurate. */
1056 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1057 if (REG_NOTE_KIND (link) == REG_UNUSED
1058 && REG_P (XEXP (link, 0))
1059 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1060 {
1061 unsigned int first_regno = REGNO (XEXP (link, 0));
1062 unsigned int last_regno
1063 = (first_regno
1064 + hard_regno_nregs[first_regno]
1065 [GET_MODE (XEXP (link, 0))]);
1066
1067 for (i = first_regno; i < last_regno; i++)
1068 CLEAR_HARD_REG_BIT (current_live_regs, i);
1069 }
1070 }
1071
1072 else if (LABEL_P (real_insn))
1073 {
1074 /* A label clobbers the pending dead registers since neither
1075 reload nor jump will propagate a value across a label. */
1076 AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs);
1077 CLEAR_HARD_REG_SET (pending_dead_regs);
1078 }
1079
1080 /* The beginning of the epilogue corresponds to the end of the
1081 RTL chain when there are no epilogue insns. Certain resources
1082 are implicitly required at that point. */
1083 else if (NOTE_P (real_insn)
1084 && NOTE_LINE_NUMBER (real_insn) == NOTE_INSN_EPILOGUE_BEG)
1085 IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
1086 }
1087
1088 COPY_HARD_REG_SET (res->regs, current_live_regs);
1089 if (tinfo != NULL)
1090 {
1091 tinfo->block = b;
1092 tinfo->bb_tick = bb_ticks[b];
1093 }
1094 }
1095 else
1096 /* We didn't find the start of a basic block. Assume everything
1097 in use. This should happen only extremely rarely. */
1098 SET_HARD_REG_SET (res->regs);
1099
1100 CLEAR_RESOURCE (&set);
1101 CLEAR_RESOURCE (&needed);
1102
1103 jump_insn = find_dead_or_set_registers (target, res, &jump_target, 0,
1104 set, needed);
1105
1106 /* If we hit an unconditional branch, we have another way of finding out
1107 what is live: we can see what is live at the branch target and include
1108 anything used but not set before the branch. We add the live
1109 resources found using the test below to those found until now. */
1110
1111 if (jump_insn)
1112 {
1113 struct resources new_resources;
1114 rtx stop_insn = next_active_insn (jump_insn);
1115
1116 mark_target_live_regs (insns, next_active_insn (jump_target),
1117 &new_resources);
1118 CLEAR_RESOURCE (&set);
1119 CLEAR_RESOURCE (&needed);
1120
1121 /* Include JUMP_INSN in the needed registers. */
1122 for (insn = target; insn != stop_insn; insn = next_active_insn (insn))
1123 {
1124 mark_referenced_resources (insn, &needed, 1);
1125
1126 COPY_HARD_REG_SET (scratch, needed.regs);
1127 AND_COMPL_HARD_REG_SET (scratch, set.regs);
1128 IOR_HARD_REG_SET (new_resources.regs, scratch);
1129
1130 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1131 }
1132
1133 IOR_HARD_REG_SET (res->regs, new_resources.regs);
1134 }
1135
1136 if (tinfo != NULL)
1137 {
1138 COPY_HARD_REG_SET (tinfo->live_regs, res->regs);
1139 }
1140 }
1141 \f
1142 /* Initialize the resources required by mark_target_live_regs ().
1143 This should be invoked before the first call to mark_target_live_regs. */
1144
1145 void
1146 init_resource_info (rtx epilogue_insn)
1147 {
1148 int i;
1149
1150 /* Indicate what resources are required to be valid at the end of the current
1151 function. The condition code never is and memory always is. If the
1152 frame pointer is needed, it is and so is the stack pointer unless
1153 EXIT_IGNORE_STACK is nonzero. If the frame pointer is not needed, the
1154 stack pointer is. Registers used to return the function value are
1155 needed. Registers holding global variables are needed. */
1156
1157 end_of_function_needs.cc = 0;
1158 end_of_function_needs.memory = 1;
1159 end_of_function_needs.unch_memory = 0;
1160 CLEAR_HARD_REG_SET (end_of_function_needs.regs);
1161
1162 if (frame_pointer_needed)
1163 {
1164 SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM);
1165 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1166 SET_HARD_REG_BIT (end_of_function_needs.regs, HARD_FRAME_POINTER_REGNUM);
1167 #endif
1168 if (! EXIT_IGNORE_STACK
1169 || current_function_sp_is_unchanging)
1170 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1171 }
1172 else
1173 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1174
1175 if (current_function_return_rtx != 0)
1176 mark_referenced_resources (current_function_return_rtx,
1177 &end_of_function_needs, 1);
1178
1179 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1180 if (global_regs[i]
1181 #ifdef EPILOGUE_USES
1182 || EPILOGUE_USES (i)
1183 #endif
1184 )
1185 SET_HARD_REG_BIT (end_of_function_needs.regs, i);
1186
1187 /* The registers required to be live at the end of the function are
1188 represented in the flow information as being dead just prior to
1189 reaching the end of the function. For example, the return of a value
1190 might be represented by a USE of the return register immediately
1191 followed by an unconditional jump to the return label where the
1192 return label is the end of the RTL chain. The end of the RTL chain
1193 is then taken to mean that the return register is live.
1194
1195 This sequence is no longer maintained when epilogue instructions are
1196 added to the RTL chain. To reconstruct the original meaning, the
1197 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1198 point where these registers become live (start_of_epilogue_needs).
1199 If epilogue instructions are present, the registers set by those
1200 instructions won't have been processed by flow. Thus, those
1201 registers are additionally required at the end of the RTL chain
1202 (end_of_function_needs). */
1203
1204 start_of_epilogue_needs = end_of_function_needs;
1205
1206 while ((epilogue_insn = next_nonnote_insn (epilogue_insn)))
1207 mark_set_resources (epilogue_insn, &end_of_function_needs, 0,
1208 MARK_SRC_DEST_CALL);
1209
1210 /* Allocate and initialize the tables used by mark_target_live_regs. */
1211 target_hash_table = xcalloc (TARGET_HASH_PRIME, sizeof (struct target_info *));
1212 bb_ticks = xcalloc (last_basic_block, sizeof (int));
1213 }
1214 \f
1215 /* Free up the resources allocated to mark_target_live_regs (). This
1216 should be invoked after the last call to mark_target_live_regs (). */
1217
1218 void
1219 free_resource_info (void)
1220 {
1221 if (target_hash_table != NULL)
1222 {
1223 int i;
1224
1225 for (i = 0; i < TARGET_HASH_PRIME; ++i)
1226 {
1227 struct target_info *ti = target_hash_table[i];
1228
1229 while (ti)
1230 {
1231 struct target_info *next = ti->next;
1232 free (ti);
1233 ti = next;
1234 }
1235 }
1236
1237 free (target_hash_table);
1238 target_hash_table = NULL;
1239 }
1240
1241 if (bb_ticks != NULL)
1242 {
1243 free (bb_ticks);
1244 bb_ticks = NULL;
1245 }
1246 }
1247 \f
1248 /* Clear any hashed information that we have stored for INSN. */
1249
1250 void
1251 clear_hashed_info_for_insn (rtx insn)
1252 {
1253 struct target_info *tinfo;
1254
1255 if (target_hash_table != NULL)
1256 {
1257 for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME];
1258 tinfo; tinfo = tinfo->next)
1259 if (tinfo->uid == INSN_UID (insn))
1260 break;
1261
1262 if (tinfo)
1263 tinfo->block = -1;
1264 }
1265 }
1266 \f
1267 /* Increment the tick count for the basic block that contains INSN. */
1268
1269 void
1270 incr_ticks_for_insn (rtx insn)
1271 {
1272 int b = find_basic_block (insn, MAX_DELAY_SLOT_LIVE_SEARCH);
1273
1274 if (b != -1)
1275 bb_ticks[b]++;
1276 }
1277 \f
1278 /* Add TRIAL to the set of resources used at the end of the current
1279 function. */
1280 void
1281 mark_end_of_function_resources (rtx trial, int include_delayed_effects)
1282 {
1283 mark_referenced_resources (trial, &end_of_function_needs,
1284 include_delayed_effects);
1285 }