re PR c++/66243 (enum class value is allowed to be initialized by value from other...
[gcc.git] / gcc / resource.c
1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999-2015 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "diagnostic-core.h"
25 #include "rtl.h"
26 #include "tm_p.h"
27 #include "hard-reg-set.h"
28 #include "hashtab.h"
29 #include "hash-set.h"
30 #include "vec.h"
31 #include "machmode.h"
32 #include "input.h"
33 #include "function.h"
34 #include "regs.h"
35 #include "flags.h"
36 #include "output.h"
37 #include "dominance.h"
38 #include "cfg.h"
39 #include "predict.h"
40 #include "basic-block.h"
41 #include "resource.h"
42 #include "except.h"
43 #include "insn-attr.h"
44 #include "params.h"
45 #include "df.h"
46
47 /* This structure is used to record liveness information at the targets or
48 fallthrough insns of branches. We will most likely need the information
49 at targets again, so save them in a hash table rather than recomputing them
50 each time. */
51
52 struct target_info
53 {
54 int uid; /* INSN_UID of target. */
55 struct target_info *next; /* Next info for same hash bucket. */
56 HARD_REG_SET live_regs; /* Registers live at target. */
57 int block; /* Basic block number containing target. */
58 int bb_tick; /* Generation count of basic block info. */
59 };
60
61 #define TARGET_HASH_PRIME 257
62
63 /* Indicates what resources are required at the beginning of the epilogue. */
64 static struct resources start_of_epilogue_needs;
65
66 /* Indicates what resources are required at function end. */
67 static struct resources end_of_function_needs;
68
69 /* Define the hash table itself. */
70 static struct target_info **target_hash_table = NULL;
71
72 /* For each basic block, we maintain a generation number of its basic
73 block info, which is updated each time we move an insn from the
74 target of a jump. This is the generation number indexed by block
75 number. */
76
77 static int *bb_ticks;
78
79 /* Marks registers possibly live at the current place being scanned by
80 mark_target_live_regs. Also used by update_live_status. */
81
82 static HARD_REG_SET current_live_regs;
83
84 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
85 Also only used by the next two functions. */
86
87 static HARD_REG_SET pending_dead_regs;
88 \f
89 static void update_live_status (rtx, const_rtx, void *);
90 static int find_basic_block (rtx_insn *, int);
91 static rtx_insn *next_insn_no_annul (rtx_insn *);
92 static rtx_insn *find_dead_or_set_registers (rtx_insn *, struct resources*,
93 rtx *, int, struct resources,
94 struct resources);
95 \f
96 /* Utility function called from mark_target_live_regs via note_stores.
97 It deadens any CLOBBERed registers and livens any SET registers. */
98
99 static void
100 update_live_status (rtx dest, const_rtx x, void *data ATTRIBUTE_UNUSED)
101 {
102 int first_regno, last_regno;
103 int i;
104
105 if (!REG_P (dest)
106 && (GET_CODE (dest) != SUBREG || !REG_P (SUBREG_REG (dest))))
107 return;
108
109 if (GET_CODE (dest) == SUBREG)
110 {
111 first_regno = subreg_regno (dest);
112 last_regno = first_regno + subreg_nregs (dest);
113
114 }
115 else
116 {
117 first_regno = REGNO (dest);
118 last_regno = END_REGNO (dest);
119 }
120
121 if (GET_CODE (x) == CLOBBER)
122 for (i = first_regno; i < last_regno; i++)
123 CLEAR_HARD_REG_BIT (current_live_regs, i);
124 else
125 for (i = first_regno; i < last_regno; i++)
126 {
127 SET_HARD_REG_BIT (current_live_regs, i);
128 CLEAR_HARD_REG_BIT (pending_dead_regs, i);
129 }
130 }
131
132 /* Find the number of the basic block with correct live register
133 information that starts closest to INSN. Return -1 if we couldn't
134 find such a basic block or the beginning is more than
135 SEARCH_LIMIT instructions before INSN. Use SEARCH_LIMIT = -1 for
136 an unlimited search.
137
138 The delay slot filling code destroys the control-flow graph so,
139 instead of finding the basic block containing INSN, we search
140 backwards toward a BARRIER where the live register information is
141 correct. */
142
143 static int
144 find_basic_block (rtx_insn *insn, int search_limit)
145 {
146 /* Scan backwards to the previous BARRIER. Then see if we can find a
147 label that starts a basic block. Return the basic block number. */
148 for (insn = prev_nonnote_insn (insn);
149 insn && !BARRIER_P (insn) && search_limit != 0;
150 insn = prev_nonnote_insn (insn), --search_limit)
151 ;
152
153 /* The closest BARRIER is too far away. */
154 if (search_limit == 0)
155 return -1;
156
157 /* The start of the function. */
158 else if (insn == 0)
159 return ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb->index;
160
161 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
162 anything other than a CODE_LABEL or note, we can't find this code. */
163 for (insn = next_nonnote_insn (insn);
164 insn && LABEL_P (insn);
165 insn = next_nonnote_insn (insn))
166 if (BLOCK_FOR_INSN (insn))
167 return BLOCK_FOR_INSN (insn)->index;
168
169 return -1;
170 }
171 \f
172 /* Similar to next_insn, but ignores insns in the delay slots of
173 an annulled branch. */
174
175 static rtx_insn *
176 next_insn_no_annul (rtx_insn *insn)
177 {
178 if (insn)
179 {
180 /* If INSN is an annulled branch, skip any insns from the target
181 of the branch. */
182 if (JUMP_P (insn)
183 && INSN_ANNULLED_BRANCH_P (insn)
184 && NEXT_INSN (PREV_INSN (insn)) != insn)
185 {
186 rtx_insn *next = NEXT_INSN (insn);
187
188 while ((NONJUMP_INSN_P (next) || JUMP_P (next) || CALL_P (next))
189 && INSN_FROM_TARGET_P (next))
190 {
191 insn = next;
192 next = NEXT_INSN (insn);
193 }
194 }
195
196 insn = NEXT_INSN (insn);
197 if (insn && NONJUMP_INSN_P (insn)
198 && GET_CODE (PATTERN (insn)) == SEQUENCE)
199 insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0);
200 }
201
202 return insn;
203 }
204 \f
205 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
206 which resources are referenced by the insn. If INCLUDE_DELAYED_EFFECTS
207 is TRUE, resources used by the called routine will be included for
208 CALL_INSNs. */
209
210 void
211 mark_referenced_resources (rtx x, struct resources *res,
212 bool include_delayed_effects)
213 {
214 enum rtx_code code = GET_CODE (x);
215 int i, j;
216 unsigned int r;
217 const char *format_ptr;
218
219 /* Handle leaf items for which we set resource flags. Also, special-case
220 CALL, SET and CLOBBER operators. */
221 switch (code)
222 {
223 case CONST:
224 CASE_CONST_ANY:
225 case PC:
226 case SYMBOL_REF:
227 case LABEL_REF:
228 return;
229
230 case SUBREG:
231 if (!REG_P (SUBREG_REG (x)))
232 mark_referenced_resources (SUBREG_REG (x), res, false);
233 else
234 {
235 unsigned int regno = subreg_regno (x);
236 unsigned int last_regno = regno + subreg_nregs (x);
237
238 gcc_assert (last_regno <= FIRST_PSEUDO_REGISTER);
239 for (r = regno; r < last_regno; r++)
240 SET_HARD_REG_BIT (res->regs, r);
241 }
242 return;
243
244 case REG:
245 gcc_assert (HARD_REGISTER_P (x));
246 add_to_hard_reg_set (&res->regs, GET_MODE (x), REGNO (x));
247 return;
248
249 case MEM:
250 /* If this memory shouldn't change, it really isn't referencing
251 memory. */
252 if (! MEM_READONLY_P (x))
253 res->memory = 1;
254 res->volatil |= MEM_VOLATILE_P (x);
255
256 /* Mark registers used to access memory. */
257 mark_referenced_resources (XEXP (x, 0), res, false);
258 return;
259
260 case CC0:
261 res->cc = 1;
262 return;
263
264 case UNSPEC_VOLATILE:
265 case TRAP_IF:
266 case ASM_INPUT:
267 /* Traditional asm's are always volatile. */
268 res->volatil = 1;
269 break;
270
271 case ASM_OPERANDS:
272 res->volatil |= MEM_VOLATILE_P (x);
273
274 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
275 We can not just fall through here since then we would be confused
276 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
277 traditional asms unlike their normal usage. */
278
279 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
280 mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, false);
281 return;
282
283 case CALL:
284 /* The first operand will be a (MEM (xxx)) but doesn't really reference
285 memory. The second operand may be referenced, though. */
286 mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, false);
287 mark_referenced_resources (XEXP (x, 1), res, false);
288 return;
289
290 case SET:
291 /* Usually, the first operand of SET is set, not referenced. But
292 registers used to access memory are referenced. SET_DEST is
293 also referenced if it is a ZERO_EXTRACT. */
294
295 mark_referenced_resources (SET_SRC (x), res, false);
296
297 x = SET_DEST (x);
298 if (GET_CODE (x) == ZERO_EXTRACT
299 || GET_CODE (x) == STRICT_LOW_PART)
300 mark_referenced_resources (x, res, false);
301 else if (GET_CODE (x) == SUBREG)
302 x = SUBREG_REG (x);
303 if (MEM_P (x))
304 mark_referenced_resources (XEXP (x, 0), res, false);
305 return;
306
307 case CLOBBER:
308 return;
309
310 case CALL_INSN:
311 if (include_delayed_effects)
312 {
313 /* A CALL references memory, the frame pointer if it exists, the
314 stack pointer, any global registers and any registers given in
315 USE insns immediately in front of the CALL.
316
317 However, we may have moved some of the parameter loading insns
318 into the delay slot of this CALL. If so, the USE's for them
319 don't count and should be skipped. */
320 rtx_insn *insn = PREV_INSN (as_a <rtx_insn *> (x));
321 rtx_sequence *sequence = 0;
322 int seq_size = 0;
323 int i;
324
325 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
326 if (NEXT_INSN (insn) != x)
327 {
328 sequence = as_a <rtx_sequence *> (PATTERN (NEXT_INSN (insn)));
329 seq_size = sequence->len ();
330 gcc_assert (GET_CODE (sequence) == SEQUENCE);
331 }
332
333 res->memory = 1;
334 SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM);
335 if (frame_pointer_needed)
336 {
337 SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM);
338 if (!HARD_FRAME_POINTER_IS_FRAME_POINTER)
339 SET_HARD_REG_BIT (res->regs, HARD_FRAME_POINTER_REGNUM);
340 }
341
342 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
343 if (global_regs[i])
344 SET_HARD_REG_BIT (res->regs, i);
345
346 /* Check for a REG_SETJMP. If it exists, then we must
347 assume that this call can need any register.
348
349 This is done to be more conservative about how we handle setjmp.
350 We assume that they both use and set all registers. Using all
351 registers ensures that a register will not be considered dead
352 just because it crosses a setjmp call. A register should be
353 considered dead only if the setjmp call returns nonzero. */
354 if (find_reg_note (x, REG_SETJMP, NULL))
355 SET_HARD_REG_SET (res->regs);
356
357 {
358 rtx link;
359
360 for (link = CALL_INSN_FUNCTION_USAGE (x);
361 link;
362 link = XEXP (link, 1))
363 if (GET_CODE (XEXP (link, 0)) == USE)
364 {
365 for (i = 1; i < seq_size; i++)
366 {
367 rtx slot_pat = PATTERN (sequence->element (i));
368 if (GET_CODE (slot_pat) == SET
369 && rtx_equal_p (SET_DEST (slot_pat),
370 XEXP (XEXP (link, 0), 0)))
371 break;
372 }
373 if (i >= seq_size)
374 mark_referenced_resources (XEXP (XEXP (link, 0), 0),
375 res, false);
376 }
377 }
378 }
379
380 /* ... fall through to other INSN processing ... */
381
382 case INSN:
383 case JUMP_INSN:
384
385 if (GET_CODE (PATTERN (x)) == COND_EXEC)
386 /* In addition to the usual references, also consider all outputs
387 as referenced, to compensate for mark_set_resources treating
388 them as killed. This is similar to ZERO_EXTRACT / STRICT_LOW_PART
389 handling, execpt that we got a partial incidence instead of a partial
390 width. */
391 mark_set_resources (x, res, 0,
392 include_delayed_effects
393 ? MARK_SRC_DEST_CALL : MARK_SRC_DEST);
394
395 if (! include_delayed_effects
396 && INSN_REFERENCES_ARE_DELAYED (as_a <rtx_insn *> (x)))
397 return;
398
399 /* No special processing, just speed up. */
400 mark_referenced_resources (PATTERN (x), res, include_delayed_effects);
401 return;
402
403 default:
404 break;
405 }
406
407 /* Process each sub-expression and flag what it needs. */
408 format_ptr = GET_RTX_FORMAT (code);
409 for (i = 0; i < GET_RTX_LENGTH (code); i++)
410 switch (*format_ptr++)
411 {
412 case 'e':
413 mark_referenced_resources (XEXP (x, i), res, include_delayed_effects);
414 break;
415
416 case 'E':
417 for (j = 0; j < XVECLEN (x, i); j++)
418 mark_referenced_resources (XVECEXP (x, i, j), res,
419 include_delayed_effects);
420 break;
421 }
422 }
423 \f
424 /* A subroutine of mark_target_live_regs. Search forward from TARGET
425 looking for registers that are set before they are used. These are dead.
426 Stop after passing a few conditional jumps, and/or a small
427 number of unconditional branches. */
428
429 static rtx_insn *
430 find_dead_or_set_registers (rtx_insn *target, struct resources *res,
431 rtx *jump_target, int jump_count,
432 struct resources set, struct resources needed)
433 {
434 HARD_REG_SET scratch;
435 rtx_insn *insn;
436 rtx_insn *next_insn;
437 rtx_insn *jump_insn = 0;
438 int i;
439
440 for (insn = target; insn; insn = next_insn)
441 {
442 rtx_insn *this_insn = insn;
443
444 next_insn = NEXT_INSN (insn);
445
446 /* If this instruction can throw an exception, then we don't
447 know where we might end up next. That means that we have to
448 assume that whatever we have already marked as live really is
449 live. */
450 if (can_throw_internal (insn))
451 break;
452
453 switch (GET_CODE (insn))
454 {
455 case CODE_LABEL:
456 /* After a label, any pending dead registers that weren't yet
457 used can be made dead. */
458 AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs);
459 AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs);
460 CLEAR_HARD_REG_SET (pending_dead_regs);
461
462 continue;
463
464 case BARRIER:
465 case NOTE:
466 continue;
467
468 case INSN:
469 if (GET_CODE (PATTERN (insn)) == USE)
470 {
471 /* If INSN is a USE made by update_block, we care about the
472 underlying insn. Any registers set by the underlying insn
473 are live since the insn is being done somewhere else. */
474 if (INSN_P (XEXP (PATTERN (insn), 0)))
475 mark_set_resources (XEXP (PATTERN (insn), 0), res, 0,
476 MARK_SRC_DEST_CALL);
477
478 /* All other USE insns are to be ignored. */
479 continue;
480 }
481 else if (GET_CODE (PATTERN (insn)) == CLOBBER)
482 continue;
483 else if (rtx_sequence *seq =
484 dyn_cast <rtx_sequence *> (PATTERN (insn)))
485 {
486 /* An unconditional jump can be used to fill the delay slot
487 of a call, so search for a JUMP_INSN in any position. */
488 for (i = 0; i < seq->len (); i++)
489 {
490 this_insn = seq->insn (i);
491 if (JUMP_P (this_insn))
492 break;
493 }
494 }
495
496 default:
497 break;
498 }
499
500 if (rtx_jump_insn *this_jump_insn =
501 dyn_cast <rtx_jump_insn *> (this_insn))
502 {
503 if (jump_count++ < 10)
504 {
505 if (any_uncondjump_p (this_jump_insn)
506 || ANY_RETURN_P (PATTERN (this_jump_insn)))
507 {
508 rtx lab_or_return = this_jump_insn->jump_label ();
509 if (ANY_RETURN_P (lab_or_return))
510 next_insn = NULL;
511 else
512 next_insn = as_a <rtx_insn *> (lab_or_return);
513 if (jump_insn == 0)
514 {
515 jump_insn = insn;
516 if (jump_target)
517 *jump_target = JUMP_LABEL (this_jump_insn);
518 }
519 }
520 else if (any_condjump_p (this_jump_insn))
521 {
522 struct resources target_set, target_res;
523 struct resources fallthrough_res;
524
525 /* We can handle conditional branches here by following
526 both paths, and then IOR the results of the two paths
527 together, which will give us registers that are dead
528 on both paths. Since this is expensive, we give it
529 a much higher cost than unconditional branches. The
530 cost was chosen so that we will follow at most 1
531 conditional branch. */
532
533 jump_count += 4;
534 if (jump_count >= 10)
535 break;
536
537 mark_referenced_resources (insn, &needed, true);
538
539 /* For an annulled branch, mark_set_resources ignores slots
540 filled by instructions from the target. This is correct
541 if the branch is not taken. Since we are following both
542 paths from the branch, we must also compute correct info
543 if the branch is taken. We do this by inverting all of
544 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
545 and then inverting the INSN_FROM_TARGET_P bits again. */
546
547 if (GET_CODE (PATTERN (insn)) == SEQUENCE
548 && INSN_ANNULLED_BRANCH_P (this_jump_insn))
549 {
550 rtx_sequence *seq = as_a <rtx_sequence *> (PATTERN (insn));
551 for (i = 1; i < seq->len (); i++)
552 INSN_FROM_TARGET_P (seq->element (i))
553 = ! INSN_FROM_TARGET_P (seq->element (i));
554
555 target_set = set;
556 mark_set_resources (insn, &target_set, 0,
557 MARK_SRC_DEST_CALL);
558
559 for (i = 1; i < seq->len (); i++)
560 INSN_FROM_TARGET_P (seq->element (i))
561 = ! INSN_FROM_TARGET_P (seq->element (i));
562
563 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
564 }
565 else
566 {
567 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
568 target_set = set;
569 }
570
571 target_res = *res;
572 COPY_HARD_REG_SET (scratch, target_set.regs);
573 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
574 AND_COMPL_HARD_REG_SET (target_res.regs, scratch);
575
576 fallthrough_res = *res;
577 COPY_HARD_REG_SET (scratch, set.regs);
578 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
579 AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
580
581 if (!ANY_RETURN_P (this_jump_insn->jump_label ()))
582 find_dead_or_set_registers
583 (this_jump_insn->jump_target (),
584 &target_res, 0, jump_count, target_set, needed);
585 find_dead_or_set_registers (next_insn,
586 &fallthrough_res, 0, jump_count,
587 set, needed);
588 IOR_HARD_REG_SET (fallthrough_res.regs, target_res.regs);
589 AND_HARD_REG_SET (res->regs, fallthrough_res.regs);
590 break;
591 }
592 else
593 break;
594 }
595 else
596 {
597 /* Don't try this optimization if we expired our jump count
598 above, since that would mean there may be an infinite loop
599 in the function being compiled. */
600 jump_insn = 0;
601 break;
602 }
603 }
604
605 mark_referenced_resources (insn, &needed, true);
606 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
607
608 COPY_HARD_REG_SET (scratch, set.regs);
609 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
610 AND_COMPL_HARD_REG_SET (res->regs, scratch);
611 }
612
613 return jump_insn;
614 }
615 \f
616 /* Given X, a part of an insn, and a pointer to a `struct resource',
617 RES, indicate which resources are modified by the insn. If
618 MARK_TYPE is MARK_SRC_DEST_CALL, also mark resources potentially
619 set by the called routine.
620
621 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
622 objects are being referenced instead of set.
623
624 We never mark the insn as modifying the condition code unless it explicitly
625 SETs CC0 even though this is not totally correct. The reason for this is
626 that we require a SET of CC0 to immediately precede the reference to CC0.
627 So if some other insn sets CC0 as a side-effect, we know it cannot affect
628 our computation and thus may be placed in a delay slot. */
629
630 void
631 mark_set_resources (rtx x, struct resources *res, int in_dest,
632 enum mark_resource_type mark_type)
633 {
634 enum rtx_code code;
635 int i, j;
636 unsigned int r;
637 const char *format_ptr;
638
639 restart:
640
641 code = GET_CODE (x);
642
643 switch (code)
644 {
645 case NOTE:
646 case BARRIER:
647 case CODE_LABEL:
648 case USE:
649 CASE_CONST_ANY:
650 case LABEL_REF:
651 case SYMBOL_REF:
652 case CONST:
653 case PC:
654 /* These don't set any resources. */
655 return;
656
657 case CC0:
658 if (in_dest)
659 res->cc = 1;
660 return;
661
662 case CALL_INSN:
663 /* Called routine modifies the condition code, memory, any registers
664 that aren't saved across calls, global registers and anything
665 explicitly CLOBBERed immediately after the CALL_INSN. */
666
667 if (mark_type == MARK_SRC_DEST_CALL)
668 {
669 rtx_call_insn *call_insn = as_a <rtx_call_insn *> (x);
670 rtx link;
671 HARD_REG_SET regs;
672
673 res->cc = res->memory = 1;
674
675 get_call_reg_set_usage (call_insn, &regs, regs_invalidated_by_call);
676 IOR_HARD_REG_SET (res->regs, regs);
677
678 for (link = CALL_INSN_FUNCTION_USAGE (call_insn);
679 link; link = XEXP (link, 1))
680 if (GET_CODE (XEXP (link, 0)) == CLOBBER)
681 mark_set_resources (SET_DEST (XEXP (link, 0)), res, 1,
682 MARK_SRC_DEST);
683
684 /* Check for a REG_SETJMP. If it exists, then we must
685 assume that this call can clobber any register. */
686 if (find_reg_note (call_insn, REG_SETJMP, NULL))
687 SET_HARD_REG_SET (res->regs);
688 }
689
690 /* ... and also what its RTL says it modifies, if anything. */
691
692 case JUMP_INSN:
693 case INSN:
694
695 /* An insn consisting of just a CLOBBER (or USE) is just for flow
696 and doesn't actually do anything, so we ignore it. */
697
698 if (mark_type != MARK_SRC_DEST_CALL
699 && INSN_SETS_ARE_DELAYED (as_a <rtx_insn *> (x)))
700 return;
701
702 x = PATTERN (x);
703 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
704 goto restart;
705 return;
706
707 case SET:
708 /* If the source of a SET is a CALL, this is actually done by
709 the called routine. So only include it if we are to include the
710 effects of the calling routine. */
711
712 mark_set_resources (SET_DEST (x), res,
713 (mark_type == MARK_SRC_DEST_CALL
714 || GET_CODE (SET_SRC (x)) != CALL),
715 mark_type);
716
717 mark_set_resources (SET_SRC (x), res, 0, MARK_SRC_DEST);
718 return;
719
720 case CLOBBER:
721 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
722 return;
723
724 case SEQUENCE:
725 {
726 rtx_sequence *seq = as_a <rtx_sequence *> (x);
727 rtx control = seq->element (0);
728 bool annul_p = JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control);
729
730 mark_set_resources (control, res, 0, mark_type);
731 for (i = seq->len () - 1; i >= 0; --i)
732 {
733 rtx elt = seq->element (i);
734 if (!annul_p && INSN_FROM_TARGET_P (elt))
735 mark_set_resources (elt, res, 0, mark_type);
736 }
737 }
738 return;
739
740 case POST_INC:
741 case PRE_INC:
742 case POST_DEC:
743 case PRE_DEC:
744 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
745 return;
746
747 case PRE_MODIFY:
748 case POST_MODIFY:
749 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
750 mark_set_resources (XEXP (XEXP (x, 1), 0), res, 0, MARK_SRC_DEST);
751 mark_set_resources (XEXP (XEXP (x, 1), 1), res, 0, MARK_SRC_DEST);
752 return;
753
754 case SIGN_EXTRACT:
755 case ZERO_EXTRACT:
756 mark_set_resources (XEXP (x, 0), res, in_dest, MARK_SRC_DEST);
757 mark_set_resources (XEXP (x, 1), res, 0, MARK_SRC_DEST);
758 mark_set_resources (XEXP (x, 2), res, 0, MARK_SRC_DEST);
759 return;
760
761 case MEM:
762 if (in_dest)
763 {
764 res->memory = 1;
765 res->volatil |= MEM_VOLATILE_P (x);
766 }
767
768 mark_set_resources (XEXP (x, 0), res, 0, MARK_SRC_DEST);
769 return;
770
771 case SUBREG:
772 if (in_dest)
773 {
774 if (!REG_P (SUBREG_REG (x)))
775 mark_set_resources (SUBREG_REG (x), res, in_dest, mark_type);
776 else
777 {
778 unsigned int regno = subreg_regno (x);
779 unsigned int last_regno = regno + subreg_nregs (x);
780
781 gcc_assert (last_regno <= FIRST_PSEUDO_REGISTER);
782 for (r = regno; r < last_regno; r++)
783 SET_HARD_REG_BIT (res->regs, r);
784 }
785 }
786 return;
787
788 case REG:
789 if (in_dest)
790 {
791 gcc_assert (HARD_REGISTER_P (x));
792 add_to_hard_reg_set (&res->regs, GET_MODE (x), REGNO (x));
793 }
794 return;
795
796 case UNSPEC_VOLATILE:
797 case ASM_INPUT:
798 /* Traditional asm's are always volatile. */
799 res->volatil = 1;
800 return;
801
802 case TRAP_IF:
803 res->volatil = 1;
804 break;
805
806 case ASM_OPERANDS:
807 res->volatil |= MEM_VOLATILE_P (x);
808
809 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
810 We can not just fall through here since then we would be confused
811 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
812 traditional asms unlike their normal usage. */
813
814 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
815 mark_set_resources (ASM_OPERANDS_INPUT (x, i), res, in_dest,
816 MARK_SRC_DEST);
817 return;
818
819 default:
820 break;
821 }
822
823 /* Process each sub-expression and flag what it needs. */
824 format_ptr = GET_RTX_FORMAT (code);
825 for (i = 0; i < GET_RTX_LENGTH (code); i++)
826 switch (*format_ptr++)
827 {
828 case 'e':
829 mark_set_resources (XEXP (x, i), res, in_dest, mark_type);
830 break;
831
832 case 'E':
833 for (j = 0; j < XVECLEN (x, i); j++)
834 mark_set_resources (XVECEXP (x, i, j), res, in_dest, mark_type);
835 break;
836 }
837 }
838 \f
839 /* Return TRUE if INSN is a return, possibly with a filled delay slot. */
840
841 static bool
842 return_insn_p (const_rtx insn)
843 {
844 if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn)))
845 return true;
846
847 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
848 return return_insn_p (XVECEXP (PATTERN (insn), 0, 0));
849
850 return false;
851 }
852
853 /* Set the resources that are live at TARGET.
854
855 If TARGET is zero, we refer to the end of the current function and can
856 return our precomputed value.
857
858 Otherwise, we try to find out what is live by consulting the basic block
859 information. This is tricky, because we must consider the actions of
860 reload and jump optimization, which occur after the basic block information
861 has been computed.
862
863 Accordingly, we proceed as follows::
864
865 We find the previous BARRIER and look at all immediately following labels
866 (with no intervening active insns) to see if any of them start a basic
867 block. If we hit the start of the function first, we use block 0.
868
869 Once we have found a basic block and a corresponding first insn, we can
870 accurately compute the live status (by starting at a label following a
871 BARRIER, we are immune to actions taken by reload and jump.) Then we
872 scan all insns between that point and our target. For each CLOBBER (or
873 for call-clobbered regs when we pass a CALL_INSN), mark the appropriate
874 registers are dead. For a SET, mark them as live.
875
876 We have to be careful when using REG_DEAD notes because they are not
877 updated by such things as find_equiv_reg. So keep track of registers
878 marked as dead that haven't been assigned to, and mark them dead at the
879 next CODE_LABEL since reload and jump won't propagate values across labels.
880
881 If we cannot find the start of a basic block (should be a very rare
882 case, if it can happen at all), mark everything as potentially live.
883
884 Next, scan forward from TARGET looking for things set or clobbered
885 before they are used. These are not live.
886
887 Because we can be called many times on the same target, save our results
888 in a hash table indexed by INSN_UID. This is only done if the function
889 init_resource_info () was invoked before we are called. */
890
891 void
892 mark_target_live_regs (rtx_insn *insns, rtx target_maybe_return, struct resources *res)
893 {
894 int b = -1;
895 unsigned int i;
896 struct target_info *tinfo = NULL;
897 rtx_insn *insn;
898 rtx jump_insn = 0;
899 rtx jump_target;
900 HARD_REG_SET scratch;
901 struct resources set, needed;
902
903 /* Handle end of function. */
904 if (target_maybe_return == 0 || ANY_RETURN_P (target_maybe_return))
905 {
906 *res = end_of_function_needs;
907 return;
908 }
909
910 /* We've handled the case of RETURN/SIMPLE_RETURN; we should now have an
911 instruction. */
912 rtx_insn *target = as_a <rtx_insn *> (target_maybe_return);
913
914 /* Handle return insn. */
915 if (return_insn_p (target))
916 {
917 *res = end_of_function_needs;
918 mark_referenced_resources (target, res, false);
919 return;
920 }
921
922 /* We have to assume memory is needed, but the CC isn't. */
923 res->memory = 1;
924 res->volatil = 0;
925 res->cc = 0;
926
927 /* See if we have computed this value already. */
928 if (target_hash_table != NULL)
929 {
930 for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
931 tinfo; tinfo = tinfo->next)
932 if (tinfo->uid == INSN_UID (target))
933 break;
934
935 /* Start by getting the basic block number. If we have saved
936 information, we can get it from there unless the insn at the
937 start of the basic block has been deleted. */
938 if (tinfo && tinfo->block != -1
939 && ! BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, tinfo->block))->deleted ())
940 b = tinfo->block;
941 }
942
943 if (b == -1)
944 b = find_basic_block (target, MAX_DELAY_SLOT_LIVE_SEARCH);
945
946 if (target_hash_table != NULL)
947 {
948 if (tinfo)
949 {
950 /* If the information is up-to-date, use it. Otherwise, we will
951 update it below. */
952 if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b])
953 {
954 COPY_HARD_REG_SET (res->regs, tinfo->live_regs);
955 return;
956 }
957 }
958 else
959 {
960 /* Allocate a place to put our results and chain it into the
961 hash table. */
962 tinfo = XNEW (struct target_info);
963 tinfo->uid = INSN_UID (target);
964 tinfo->block = b;
965 tinfo->next
966 = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
967 target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo;
968 }
969 }
970
971 CLEAR_HARD_REG_SET (pending_dead_regs);
972
973 /* If we found a basic block, get the live registers from it and update
974 them with anything set or killed between its start and the insn before
975 TARGET; this custom life analysis is really about registers so we need
976 to use the LR problem. Otherwise, we must assume everything is live. */
977 if (b != -1)
978 {
979 regset regs_live = DF_LR_IN (BASIC_BLOCK_FOR_FN (cfun, b));
980 rtx_insn *start_insn, *stop_insn;
981
982 /* Compute hard regs live at start of block. */
983 REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live);
984
985 /* Get starting and ending insn, handling the case where each might
986 be a SEQUENCE. */
987 start_insn = (b == ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb->index ?
988 insns : BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, b)));
989 stop_insn = target;
990
991 if (NONJUMP_INSN_P (start_insn)
992 && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
993 start_insn = as_a <rtx_sequence *> (PATTERN (start_insn))->insn (0);
994
995 if (NONJUMP_INSN_P (stop_insn)
996 && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
997 stop_insn = next_insn (PREV_INSN (stop_insn));
998
999 for (insn = start_insn; insn != stop_insn;
1000 insn = next_insn_no_annul (insn))
1001 {
1002 rtx link;
1003 rtx_insn *real_insn = insn;
1004 enum rtx_code code = GET_CODE (insn);
1005
1006 if (DEBUG_INSN_P (insn))
1007 continue;
1008
1009 /* If this insn is from the target of a branch, it isn't going to
1010 be used in the sequel. If it is used in both cases, this
1011 test will not be true. */
1012 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
1013 && INSN_FROM_TARGET_P (insn))
1014 continue;
1015
1016 /* If this insn is a USE made by update_block, we care about the
1017 underlying insn. */
1018 if (code == INSN
1019 && GET_CODE (PATTERN (insn)) == USE
1020 && INSN_P (XEXP (PATTERN (insn), 0)))
1021 real_insn = as_a <rtx_insn *> (XEXP (PATTERN (insn), 0));
1022
1023 if (CALL_P (real_insn))
1024 {
1025 /* Values in call-clobbered registers survive a COND_EXEC CALL
1026 if that is not executed; this matters for resoure use because
1027 they may be used by a complementarily (or more strictly)
1028 predicated instruction, or if the CALL is NORETURN. */
1029 if (GET_CODE (PATTERN (real_insn)) != COND_EXEC)
1030 {
1031 HARD_REG_SET regs_invalidated_by_this_call;
1032 get_call_reg_set_usage (real_insn,
1033 &regs_invalidated_by_this_call,
1034 regs_invalidated_by_call);
1035 /* CALL clobbers all call-used regs that aren't fixed except
1036 sp, ap, and fp. Do this before setting the result of the
1037 call live. */
1038 AND_COMPL_HARD_REG_SET (current_live_regs,
1039 regs_invalidated_by_this_call);
1040 }
1041
1042 /* A CALL_INSN sets any global register live, since it may
1043 have been modified by the call. */
1044 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1045 if (global_regs[i])
1046 SET_HARD_REG_BIT (current_live_regs, i);
1047 }
1048
1049 /* Mark anything killed in an insn to be deadened at the next
1050 label. Ignore USE insns; the only REG_DEAD notes will be for
1051 parameters. But they might be early. A CALL_INSN will usually
1052 clobber registers used for parameters. It isn't worth bothering
1053 with the unlikely case when it won't. */
1054 if ((NONJUMP_INSN_P (real_insn)
1055 && GET_CODE (PATTERN (real_insn)) != USE
1056 && GET_CODE (PATTERN (real_insn)) != CLOBBER)
1057 || JUMP_P (real_insn)
1058 || CALL_P (real_insn))
1059 {
1060 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1061 if (REG_NOTE_KIND (link) == REG_DEAD
1062 && REG_P (XEXP (link, 0))
1063 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1064 add_to_hard_reg_set (&pending_dead_regs,
1065 GET_MODE (XEXP (link, 0)),
1066 REGNO (XEXP (link, 0)));
1067
1068 note_stores (PATTERN (real_insn), update_live_status, NULL);
1069
1070 /* If any registers were unused after this insn, kill them.
1071 These notes will always be accurate. */
1072 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1073 if (REG_NOTE_KIND (link) == REG_UNUSED
1074 && REG_P (XEXP (link, 0))
1075 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1076 remove_from_hard_reg_set (&current_live_regs,
1077 GET_MODE (XEXP (link, 0)),
1078 REGNO (XEXP (link, 0)));
1079 }
1080
1081 else if (LABEL_P (real_insn))
1082 {
1083 basic_block bb;
1084
1085 /* A label clobbers the pending dead registers since neither
1086 reload nor jump will propagate a value across a label. */
1087 AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs);
1088 CLEAR_HARD_REG_SET (pending_dead_regs);
1089
1090 /* We must conservatively assume that all registers that used
1091 to be live here still are. The fallthrough edge may have
1092 left a live register uninitialized. */
1093 bb = BLOCK_FOR_INSN (real_insn);
1094 if (bb)
1095 {
1096 HARD_REG_SET extra_live;
1097
1098 REG_SET_TO_HARD_REG_SET (extra_live, DF_LR_IN (bb));
1099 IOR_HARD_REG_SET (current_live_regs, extra_live);
1100 }
1101 }
1102
1103 /* The beginning of the epilogue corresponds to the end of the
1104 RTL chain when there are no epilogue insns. Certain resources
1105 are implicitly required at that point. */
1106 else if (NOTE_P (real_insn)
1107 && NOTE_KIND (real_insn) == NOTE_INSN_EPILOGUE_BEG)
1108 IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
1109 }
1110
1111 COPY_HARD_REG_SET (res->regs, current_live_regs);
1112 if (tinfo != NULL)
1113 {
1114 tinfo->block = b;
1115 tinfo->bb_tick = bb_ticks[b];
1116 }
1117 }
1118 else
1119 /* We didn't find the start of a basic block. Assume everything
1120 in use. This should happen only extremely rarely. */
1121 SET_HARD_REG_SET (res->regs);
1122
1123 CLEAR_RESOURCE (&set);
1124 CLEAR_RESOURCE (&needed);
1125
1126 jump_insn = find_dead_or_set_registers (target, res, &jump_target, 0,
1127 set, needed);
1128
1129 /* If we hit an unconditional branch, we have another way of finding out
1130 what is live: we can see what is live at the branch target and include
1131 anything used but not set before the branch. We add the live
1132 resources found using the test below to those found until now. */
1133
1134 if (jump_insn)
1135 {
1136 struct resources new_resources;
1137 rtx_insn *stop_insn = next_active_insn (jump_insn);
1138
1139 if (!ANY_RETURN_P (jump_target))
1140 jump_target = next_active_insn (jump_target);
1141 mark_target_live_regs (insns, jump_target, &new_resources);
1142 CLEAR_RESOURCE (&set);
1143 CLEAR_RESOURCE (&needed);
1144
1145 /* Include JUMP_INSN in the needed registers. */
1146 for (insn = target; insn != stop_insn; insn = next_active_insn (insn))
1147 {
1148 mark_referenced_resources (insn, &needed, true);
1149
1150 COPY_HARD_REG_SET (scratch, needed.regs);
1151 AND_COMPL_HARD_REG_SET (scratch, set.regs);
1152 IOR_HARD_REG_SET (new_resources.regs, scratch);
1153
1154 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1155 }
1156
1157 IOR_HARD_REG_SET (res->regs, new_resources.regs);
1158 }
1159
1160 if (tinfo != NULL)
1161 {
1162 COPY_HARD_REG_SET (tinfo->live_regs, res->regs);
1163 }
1164 }
1165 \f
1166 /* Initialize the resources required by mark_target_live_regs ().
1167 This should be invoked before the first call to mark_target_live_regs. */
1168
1169 void
1170 init_resource_info (rtx_insn *epilogue_insn)
1171 {
1172 int i;
1173 basic_block bb;
1174
1175 /* Indicate what resources are required to be valid at the end of the current
1176 function. The condition code never is and memory always is.
1177 The stack pointer is needed unless EXIT_IGNORE_STACK is true
1178 and there is an epilogue that restores the original stack pointer
1179 from the frame pointer. Registers used to return the function value
1180 are needed. Registers holding global variables are needed. */
1181
1182 end_of_function_needs.cc = 0;
1183 end_of_function_needs.memory = 1;
1184 CLEAR_HARD_REG_SET (end_of_function_needs.regs);
1185
1186 if (frame_pointer_needed)
1187 {
1188 SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM);
1189 if (!HARD_FRAME_POINTER_IS_FRAME_POINTER)
1190 SET_HARD_REG_BIT (end_of_function_needs.regs,
1191 HARD_FRAME_POINTER_REGNUM);
1192 }
1193 if (!(frame_pointer_needed
1194 && EXIT_IGNORE_STACK
1195 && epilogue_insn
1196 && !crtl->sp_is_unchanging))
1197 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1198
1199 if (crtl->return_rtx != 0)
1200 mark_referenced_resources (crtl->return_rtx,
1201 &end_of_function_needs, true);
1202
1203 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1204 if (global_regs[i] || EPILOGUE_USES (i))
1205 SET_HARD_REG_BIT (end_of_function_needs.regs, i);
1206
1207 /* The registers required to be live at the end of the function are
1208 represented in the flow information as being dead just prior to
1209 reaching the end of the function. For example, the return of a value
1210 might be represented by a USE of the return register immediately
1211 followed by an unconditional jump to the return label where the
1212 return label is the end of the RTL chain. The end of the RTL chain
1213 is then taken to mean that the return register is live.
1214
1215 This sequence is no longer maintained when epilogue instructions are
1216 added to the RTL chain. To reconstruct the original meaning, the
1217 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1218 point where these registers become live (start_of_epilogue_needs).
1219 If epilogue instructions are present, the registers set by those
1220 instructions won't have been processed by flow. Thus, those
1221 registers are additionally required at the end of the RTL chain
1222 (end_of_function_needs). */
1223
1224 start_of_epilogue_needs = end_of_function_needs;
1225
1226 while ((epilogue_insn = next_nonnote_insn (epilogue_insn)))
1227 {
1228 mark_set_resources (epilogue_insn, &end_of_function_needs, 0,
1229 MARK_SRC_DEST_CALL);
1230 if (return_insn_p (epilogue_insn))
1231 break;
1232 }
1233
1234 /* Allocate and initialize the tables used by mark_target_live_regs. */
1235 target_hash_table = XCNEWVEC (struct target_info *, TARGET_HASH_PRIME);
1236 bb_ticks = XCNEWVEC (int, last_basic_block_for_fn (cfun));
1237
1238 /* Set the BLOCK_FOR_INSN of each label that starts a basic block. */
1239 FOR_EACH_BB_FN (bb, cfun)
1240 if (LABEL_P (BB_HEAD (bb)))
1241 BLOCK_FOR_INSN (BB_HEAD (bb)) = bb;
1242 }
1243 \f
1244 /* Free up the resources allocated to mark_target_live_regs (). This
1245 should be invoked after the last call to mark_target_live_regs (). */
1246
1247 void
1248 free_resource_info (void)
1249 {
1250 basic_block bb;
1251
1252 if (target_hash_table != NULL)
1253 {
1254 int i;
1255
1256 for (i = 0; i < TARGET_HASH_PRIME; ++i)
1257 {
1258 struct target_info *ti = target_hash_table[i];
1259
1260 while (ti)
1261 {
1262 struct target_info *next = ti->next;
1263 free (ti);
1264 ti = next;
1265 }
1266 }
1267
1268 free (target_hash_table);
1269 target_hash_table = NULL;
1270 }
1271
1272 if (bb_ticks != NULL)
1273 {
1274 free (bb_ticks);
1275 bb_ticks = NULL;
1276 }
1277
1278 FOR_EACH_BB_FN (bb, cfun)
1279 if (LABEL_P (BB_HEAD (bb)))
1280 BLOCK_FOR_INSN (BB_HEAD (bb)) = NULL;
1281 }
1282 \f
1283 /* Clear any hashed information that we have stored for INSN. */
1284
1285 void
1286 clear_hashed_info_for_insn (rtx_insn *insn)
1287 {
1288 struct target_info *tinfo;
1289
1290 if (target_hash_table != NULL)
1291 {
1292 for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME];
1293 tinfo; tinfo = tinfo->next)
1294 if (tinfo->uid == INSN_UID (insn))
1295 break;
1296
1297 if (tinfo)
1298 tinfo->block = -1;
1299 }
1300 }
1301 \f
1302 /* Increment the tick count for the basic block that contains INSN. */
1303
1304 void
1305 incr_ticks_for_insn (rtx_insn *insn)
1306 {
1307 int b = find_basic_block (insn, MAX_DELAY_SLOT_LIVE_SEARCH);
1308
1309 if (b != -1)
1310 bb_ticks[b]++;
1311 }
1312 \f
1313 /* Add TRIAL to the set of resources used at the end of the current
1314 function. */
1315 void
1316 mark_end_of_function_resources (rtx trial, bool include_delayed_effects)
1317 {
1318 mark_referenced_resources (trial, &end_of_function_needs,
1319 include_delayed_effects);
1320 }