1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999, 2000 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
26 #include "hard-reg-set.h"
27 #include "basic-block.h"
33 #include "insn-attr.h"
35 /* This structure is used to record liveness information at the targets or
36 fallthrough insns of branches. We will most likely need the information
37 at targets again, so save them in a hash table rather than recomputing them
42 int uid
; /* INSN_UID of target. */
43 struct target_info
*next
; /* Next info for same hash bucket. */
44 HARD_REG_SET live_regs
; /* Registers live at target. */
45 int block
; /* Basic block number containing target. */
46 int bb_tick
; /* Generation count of basic block info. */
49 #define TARGET_HASH_PRIME 257
51 /* Indicates what resources are required at the beginning of the epilogue. */
52 static struct resources start_of_epilogue_needs
;
54 /* Indicates what resources are required at function end. */
55 static struct resources end_of_function_needs
;
57 /* Define the hash table itself. */
58 static struct target_info
**target_hash_table
= NULL
;
60 /* For each basic block, we maintain a generation number of its basic
61 block info, which is updated each time we move an insn from the
62 target of a jump. This is the generation number indexed by block
67 /* Marks registers possibly live at the current place being scanned by
68 mark_target_live_regs. Used only by next two function. */
70 static HARD_REG_SET current_live_regs
;
72 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
73 Also only used by the next two functions. */
75 static HARD_REG_SET pending_dead_regs
;
77 static void update_live_status
PROTO ((rtx
, rtx
, void *));
78 static int find_basic_block
PROTO ((rtx
));
79 static rtx next_insn_no_annul
PROTO ((rtx
));
80 static rtx find_dead_or_set_registers
PROTO ((rtx
, struct resources
*,
81 rtx
*, int, struct resources
,
84 /* Utility function called from mark_target_live_regs via note_stores.
85 It deadens any CLOBBERed registers and livens any SET registers. */
88 update_live_status (dest
, x
, data
)
91 void *data ATTRIBUTE_UNUSED
;
93 int first_regno
, last_regno
;
96 if (GET_CODE (dest
) != REG
97 && (GET_CODE (dest
) != SUBREG
|| GET_CODE (SUBREG_REG (dest
)) != REG
))
100 if (GET_CODE (dest
) == SUBREG
)
101 first_regno
= REGNO (SUBREG_REG (dest
)) + SUBREG_WORD (dest
);
103 first_regno
= REGNO (dest
);
105 last_regno
= first_regno
+ HARD_REGNO_NREGS (first_regno
, GET_MODE (dest
));
107 if (GET_CODE (x
) == CLOBBER
)
108 for (i
= first_regno
; i
< last_regno
; i
++)
109 CLEAR_HARD_REG_BIT (current_live_regs
, i
);
111 for (i
= first_regno
; i
< last_regno
; i
++)
113 SET_HARD_REG_BIT (current_live_regs
, i
);
114 CLEAR_HARD_REG_BIT (pending_dead_regs
, i
);
117 /* Find the number of the basic block that starts closest to INSN. Return -1
118 if we couldn't find such a basic block. */
121 find_basic_block (insn
)
126 /* Scan backwards to the previous BARRIER. Then see if we can find a
127 label that starts a basic block. Return the basic block number. */
129 for (insn
= prev_nonnote_insn (insn
);
130 insn
&& GET_CODE (insn
) != BARRIER
;
131 insn
= prev_nonnote_insn (insn
))
134 /* The start of the function is basic block zero. */
138 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
139 anything other than a CODE_LABEL or note, we can't find this code. */
140 for (insn
= next_nonnote_insn (insn
);
141 insn
&& GET_CODE (insn
) == CODE_LABEL
;
142 insn
= next_nonnote_insn (insn
))
144 for (i
= 0; i
< n_basic_blocks
; i
++)
145 if (insn
== BLOCK_HEAD (i
))
152 /* Similar to next_insn, but ignores insns in the delay slots of
153 an annulled branch. */
156 next_insn_no_annul (insn
)
161 /* If INSN is an annulled branch, skip any insns from the target
163 if (INSN_ANNULLED_BRANCH_P (insn
)
164 && NEXT_INSN (PREV_INSN (insn
)) != insn
)
165 while (INSN_FROM_TARGET_P (NEXT_INSN (insn
)))
166 insn
= NEXT_INSN (insn
);
168 insn
= NEXT_INSN (insn
);
169 if (insn
&& GET_CODE (insn
) == INSN
170 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
171 insn
= XVECEXP (PATTERN (insn
), 0, 0);
177 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
178 which resources are references by the insn. If INCLUDE_DELAYED_EFFECTS
179 is TRUE, resources used by the called routine will be included for
183 mark_referenced_resources (x
, res
, include_delayed_effects
)
185 register struct resources
*res
;
186 register int include_delayed_effects
;
188 register enum rtx_code code
= GET_CODE (x
);
190 register const char *format_ptr
;
192 /* Handle leaf items for which we set resource flags. Also, special-case
193 CALL, SET and CLOBBER operators. */
205 if (GET_CODE (SUBREG_REG (x
)) != REG
)
206 mark_referenced_resources (SUBREG_REG (x
), res
, 0);
209 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
210 int last_regno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
211 for (i
= regno
; i
< last_regno
; i
++)
212 SET_HARD_REG_BIT (res
->regs
, i
);
217 for (i
= 0; i
< HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
)); i
++)
218 SET_HARD_REG_BIT (res
->regs
, REGNO (x
) + i
);
222 /* If this memory shouldn't change, it really isn't referencing
224 if (RTX_UNCHANGING_P (x
))
225 res
->unch_memory
= 1;
228 res
->volatil
|= MEM_VOLATILE_P (x
);
230 /* Mark registers used to access memory. */
231 mark_referenced_resources (XEXP (x
, 0), res
, 0);
238 case UNSPEC_VOLATILE
:
240 /* Traditional asm's are always volatile. */
249 res
->volatil
|= MEM_VOLATILE_P (x
);
251 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
252 We can not just fall through here since then we would be confused
253 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
254 traditional asms unlike their normal usage. */
256 for (i
= 0; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
257 mark_referenced_resources (ASM_OPERANDS_INPUT (x
, i
), res
, 0);
261 /* The first operand will be a (MEM (xxx)) but doesn't really reference
262 memory. The second operand may be referenced, though. */
263 mark_referenced_resources (XEXP (XEXP (x
, 0), 0), res
, 0);
264 mark_referenced_resources (XEXP (x
, 1), res
, 0);
268 /* Usually, the first operand of SET is set, not referenced. But
269 registers used to access memory are referenced. SET_DEST is
270 also referenced if it is a ZERO_EXTRACT or SIGN_EXTRACT. */
272 mark_referenced_resources (SET_SRC (x
), res
, 0);
275 if (GET_CODE (x
) == SIGN_EXTRACT
276 || GET_CODE (x
) == ZERO_EXTRACT
277 || GET_CODE (x
) == STRICT_LOW_PART
)
278 mark_referenced_resources (x
, res
, 0);
279 else if (GET_CODE (x
) == SUBREG
)
281 if (GET_CODE (x
) == MEM
)
282 mark_referenced_resources (XEXP (x
, 0), res
, 0);
289 if (include_delayed_effects
)
291 /* A CALL references memory, the frame pointer if it exists, the
292 stack pointer, any global registers and any registers given in
293 USE insns immediately in front of the CALL.
295 However, we may have moved some of the parameter loading insns
296 into the delay slot of this CALL. If so, the USE's for them
297 don't count and should be skipped. */
298 rtx insn
= PREV_INSN (x
);
301 rtx next
= NEXT_INSN (x
);
304 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
305 if (NEXT_INSN (insn
) != x
)
307 next
= NEXT_INSN (NEXT_INSN (insn
));
308 sequence
= PATTERN (NEXT_INSN (insn
));
309 seq_size
= XVECLEN (sequence
, 0);
310 if (GET_CODE (sequence
) != SEQUENCE
)
315 SET_HARD_REG_BIT (res
->regs
, STACK_POINTER_REGNUM
);
316 if (frame_pointer_needed
)
318 SET_HARD_REG_BIT (res
->regs
, FRAME_POINTER_REGNUM
);
319 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
320 SET_HARD_REG_BIT (res
->regs
, HARD_FRAME_POINTER_REGNUM
);
324 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
326 SET_HARD_REG_BIT (res
->regs
, i
);
328 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
329 assume that this call can need any register.
331 This is done to be more conservative about how we handle setjmp.
332 We assume that they both use and set all registers. Using all
333 registers ensures that a register will not be considered dead
334 just because it crosses a setjmp call. A register should be
335 considered dead only if the setjmp call returns non-zero. */
336 if (next
&& GET_CODE (next
) == NOTE
337 && NOTE_LINE_NUMBER (next
) == NOTE_INSN_SETJMP
)
338 SET_HARD_REG_SET (res
->regs
);
343 for (link
= CALL_INSN_FUNCTION_USAGE (x
);
345 link
= XEXP (link
, 1))
346 if (GET_CODE (XEXP (link
, 0)) == USE
)
348 for (i
= 1; i
< seq_size
; i
++)
350 rtx slot_pat
= PATTERN (XVECEXP (sequence
, 0, i
));
351 if (GET_CODE (slot_pat
) == SET
352 && rtx_equal_p (SET_DEST (slot_pat
),
353 SET_DEST (XEXP (link
, 0))))
357 mark_referenced_resources (SET_DEST (XEXP (link
, 0)),
363 /* ... fall through to other INSN processing ... */
368 #ifdef INSN_REFERENCES_ARE_DELAYED
369 if (! include_delayed_effects
370 && INSN_REFERENCES_ARE_DELAYED (x
))
374 /* No special processing, just speed up. */
375 mark_referenced_resources (PATTERN (x
), res
, include_delayed_effects
);
382 /* Process each sub-expression and flag what it needs. */
383 format_ptr
= GET_RTX_FORMAT (code
);
384 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
385 switch (*format_ptr
++)
388 mark_referenced_resources (XEXP (x
, i
), res
, include_delayed_effects
);
392 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
393 mark_referenced_resources (XVECEXP (x
, i
, j
), res
,
394 include_delayed_effects
);
399 /* A subroutine of mark_target_live_regs. Search forward from TARGET
400 looking for registers that are set before they are used. These are dead.
401 Stop after passing a few conditional jumps, and/or a small
402 number of unconditional branches. */
405 find_dead_or_set_registers (target
, res
, jump_target
, jump_count
, set
, needed
)
407 struct resources
*res
;
410 struct resources set
, needed
;
412 HARD_REG_SET scratch
;
417 for (insn
= target
; insn
; insn
= next
)
419 rtx this_jump_insn
= insn
;
421 next
= NEXT_INSN (insn
);
422 switch (GET_CODE (insn
))
425 /* After a label, any pending dead registers that weren't yet
426 used can be made dead. */
427 AND_COMPL_HARD_REG_SET (pending_dead_regs
, needed
.regs
);
428 AND_COMPL_HARD_REG_SET (res
->regs
, pending_dead_regs
);
429 CLEAR_HARD_REG_SET (pending_dead_regs
);
438 if (GET_CODE (PATTERN (insn
)) == USE
)
440 /* If INSN is a USE made by update_block, we care about the
441 underlying insn. Any registers set by the underlying insn
442 are live since the insn is being done somewhere else. */
443 if (GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn
), 0))) == 'i')
444 mark_set_resources (XEXP (PATTERN (insn
), 0), res
, 0, 1);
446 /* All other USE insns are to be ignored. */
449 else if (GET_CODE (PATTERN (insn
)) == CLOBBER
)
451 else if (GET_CODE (PATTERN (insn
)) == SEQUENCE
)
453 /* An unconditional jump can be used to fill the delay slot
454 of a call, so search for a JUMP_INSN in any position. */
455 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
457 this_jump_insn
= XVECEXP (PATTERN (insn
), 0, i
);
458 if (GET_CODE (this_jump_insn
) == JUMP_INSN
)
467 if (GET_CODE (this_jump_insn
) == JUMP_INSN
)
469 if (jump_count
++ < 10)
471 if (simplejump_p (this_jump_insn
)
472 || GET_CODE (PATTERN (this_jump_insn
)) == RETURN
)
474 next
= JUMP_LABEL (this_jump_insn
);
479 *jump_target
= JUMP_LABEL (this_jump_insn
);
482 else if (condjump_p (this_jump_insn
)
483 || condjump_in_parallel_p (this_jump_insn
))
485 struct resources target_set
, target_res
;
486 struct resources fallthrough_res
;
488 /* We can handle conditional branches here by following
489 both paths, and then IOR the results of the two paths
490 together, which will give us registers that are dead
491 on both paths. Since this is expensive, we give it
492 a much higher cost than unconditional branches. The
493 cost was chosen so that we will follow at most 1
494 conditional branch. */
497 if (jump_count
>= 10)
500 mark_referenced_resources (insn
, &needed
, 1);
502 /* For an annulled branch, mark_set_resources ignores slots
503 filled by instructions from the target. This is correct
504 if the branch is not taken. Since we are following both
505 paths from the branch, we must also compute correct info
506 if the branch is taken. We do this by inverting all of
507 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
508 and then inverting the INSN_FROM_TARGET_P bits again. */
510 if (GET_CODE (PATTERN (insn
)) == SEQUENCE
511 && INSN_ANNULLED_BRANCH_P (this_jump_insn
))
513 for (i
= 1; i
< XVECLEN (PATTERN (insn
), 0); i
++)
514 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
))
515 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
));
518 mark_set_resources (insn
, &target_set
, 0, 1);
520 for (i
= 1; i
< XVECLEN (PATTERN (insn
), 0); i
++)
521 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
))
522 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
));
524 mark_set_resources (insn
, &set
, 0, 1);
528 mark_set_resources (insn
, &set
, 0, 1);
533 COPY_HARD_REG_SET (scratch
, target_set
.regs
);
534 AND_COMPL_HARD_REG_SET (scratch
, needed
.regs
);
535 AND_COMPL_HARD_REG_SET (target_res
.regs
, scratch
);
537 fallthrough_res
= *res
;
538 COPY_HARD_REG_SET (scratch
, set
.regs
);
539 AND_COMPL_HARD_REG_SET (scratch
, needed
.regs
);
540 AND_COMPL_HARD_REG_SET (fallthrough_res
.regs
, scratch
);
542 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn
),
543 &target_res
, 0, jump_count
,
545 find_dead_or_set_registers (next
,
546 &fallthrough_res
, 0, jump_count
,
548 IOR_HARD_REG_SET (fallthrough_res
.regs
, target_res
.regs
);
549 AND_HARD_REG_SET (res
->regs
, fallthrough_res
.regs
);
557 /* Don't try this optimization if we expired our jump count
558 above, since that would mean there may be an infinite loop
559 in the function being compiled. */
565 mark_referenced_resources (insn
, &needed
, 1);
566 mark_set_resources (insn
, &set
, 0, 1);
568 COPY_HARD_REG_SET (scratch
, set
.regs
);
569 AND_COMPL_HARD_REG_SET (scratch
, needed
.regs
);
570 AND_COMPL_HARD_REG_SET (res
->regs
, scratch
);
576 /* Given X, a part of an insn, and a pointer to a `struct resource',
577 RES, indicate which resources are modified by the insn. If
578 INCLUDE_DELAYED_EFFECTS is nonzero, also mark resources potentially
579 set by the called routine.
581 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
582 objects are being referenced instead of set.
584 We never mark the insn as modifying the condition code unless it explicitly
585 SETs CC0 even though this is not totally correct. The reason for this is
586 that we require a SET of CC0 to immediately precede the reference to CC0.
587 So if some other insn sets CC0 as a side-effect, we know it cannot affect
588 our computation and thus may be placed in a delay slot. */
591 mark_set_resources (x
, res
, in_dest
, include_delayed_effects
)
593 register struct resources
*res
;
595 int include_delayed_effects
;
597 register enum rtx_code code
;
599 register const char *format_ptr
;
617 /* These don't set any resources. */
626 /* Called routine modifies the condition code, memory, any registers
627 that aren't saved across calls, global registers and anything
628 explicitly CLOBBERed immediately after the CALL_INSN. */
630 if (include_delayed_effects
)
632 rtx next
= NEXT_INSN (x
);
633 rtx prev
= PREV_INSN (x
);
636 res
->cc
= res
->memory
= 1;
637 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
638 if (call_used_regs
[i
] || global_regs
[i
])
639 SET_HARD_REG_BIT (res
->regs
, i
);
641 /* If X is part of a delay slot sequence, then NEXT should be
642 the first insn after the sequence. */
643 if (NEXT_INSN (prev
) != x
)
644 next
= NEXT_INSN (NEXT_INSN (prev
));
646 for (link
= CALL_INSN_FUNCTION_USAGE (x
);
647 link
; link
= XEXP (link
, 1))
648 if (GET_CODE (XEXP (link
, 0)) == CLOBBER
)
649 mark_set_resources (SET_DEST (XEXP (link
, 0)), res
, 1, 0);
651 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
652 assume that this call can clobber any register. */
653 if (next
&& GET_CODE (next
) == NOTE
654 && NOTE_LINE_NUMBER (next
) == NOTE_INSN_SETJMP
)
655 SET_HARD_REG_SET (res
->regs
);
658 /* ... and also what its RTL says it modifies, if anything. */
663 /* An insn consisting of just a CLOBBER (or USE) is just for flow
664 and doesn't actually do anything, so we ignore it. */
666 #ifdef INSN_SETS_ARE_DELAYED
667 if (! include_delayed_effects
668 && INSN_SETS_ARE_DELAYED (x
))
673 if (GET_CODE (x
) != USE
&& GET_CODE (x
) != CLOBBER
)
678 /* If the source of a SET is a CALL, this is actually done by
679 the called routine. So only include it if we are to include the
680 effects of the calling routine. */
682 mark_set_resources (SET_DEST (x
), res
,
683 (include_delayed_effects
684 || GET_CODE (SET_SRC (x
)) != CALL
),
687 mark_set_resources (SET_SRC (x
), res
, 0, 0);
691 mark_set_resources (XEXP (x
, 0), res
, 1, 0);
695 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
696 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x
, 0, 0))
697 && INSN_FROM_TARGET_P (XVECEXP (x
, 0, i
))))
698 mark_set_resources (XVECEXP (x
, 0, i
), res
, 0,
699 include_delayed_effects
);
706 mark_set_resources (XEXP (x
, 0), res
, 1, 0);
710 mark_set_resources (XEXP (x
, 0), res
, in_dest
, 0);
711 mark_set_resources (XEXP (x
, 1), res
, 0, 0);
712 mark_set_resources (XEXP (x
, 2), res
, 0, 0);
719 res
->unch_memory
|= RTX_UNCHANGING_P (x
);
720 res
->volatil
|= MEM_VOLATILE_P (x
);
723 mark_set_resources (XEXP (x
, 0), res
, 0, 0);
729 if (GET_CODE (SUBREG_REG (x
)) != REG
)
730 mark_set_resources (SUBREG_REG (x
), res
,
731 in_dest
, include_delayed_effects
);
734 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
735 int last_regno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
736 for (i
= regno
; i
< last_regno
; i
++)
737 SET_HARD_REG_BIT (res
->regs
, i
);
744 for (i
= 0; i
< HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
)); i
++)
745 SET_HARD_REG_BIT (res
->regs
, REGNO (x
) + i
);
748 case UNSPEC_VOLATILE
:
750 /* Traditional asm's are always volatile. */
759 res
->volatil
|= MEM_VOLATILE_P (x
);
761 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
762 We can not just fall through here since then we would be confused
763 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
764 traditional asms unlike their normal usage. */
766 for (i
= 0; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
767 mark_set_resources (ASM_OPERANDS_INPUT (x
, i
), res
, in_dest
, 0);
774 /* Process each sub-expression and flag what it needs. */
775 format_ptr
= GET_RTX_FORMAT (code
);
776 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
777 switch (*format_ptr
++)
780 mark_set_resources (XEXP (x
, i
), res
, in_dest
, include_delayed_effects
);
784 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
785 mark_set_resources (XVECEXP (x
, i
, j
), res
, in_dest
,
786 include_delayed_effects
);
791 /* Set the resources that are live at TARGET.
793 If TARGET is zero, we refer to the end of the current function and can
794 return our precomputed value.
796 Otherwise, we try to find out what is live by consulting the basic block
797 information. This is tricky, because we must consider the actions of
798 reload and jump optimization, which occur after the basic block information
801 Accordingly, we proceed as follows::
803 We find the previous BARRIER and look at all immediately following labels
804 (with no intervening active insns) to see if any of them start a basic
805 block. If we hit the start of the function first, we use block 0.
807 Once we have found a basic block and a corresponding first insns, we can
808 accurately compute the live status from basic_block_live_regs and
809 reg_renumber. (By starting at a label following a BARRIER, we are immune
810 to actions taken by reload and jump.) Then we scan all insns between
811 that point and our target. For each CLOBBER (or for call-clobbered regs
812 when we pass a CALL_INSN), mark the appropriate registers are dead. For
813 a SET, mark them as live.
815 We have to be careful when using REG_DEAD notes because they are not
816 updated by such things as find_equiv_reg. So keep track of registers
817 marked as dead that haven't been assigned to, and mark them dead at the
818 next CODE_LABEL since reload and jump won't propagate values across labels.
820 If we cannot find the start of a basic block (should be a very rare
821 case, if it can happen at all), mark everything as potentially live.
823 Next, scan forward from TARGET looking for things set or clobbered
824 before they are used. These are not live.
826 Because we can be called many times on the same target, save our results
827 in a hash table indexed by INSN_UID. This is only done if the function
828 init_resource_info () was invoked before we are called. */
831 mark_target_live_regs (insns
, target
, res
)
834 struct resources
*res
;
838 struct target_info
*tinfo
= NULL
;
842 HARD_REG_SET scratch
;
843 struct resources set
, needed
;
845 /* Handle end of function. */
848 *res
= end_of_function_needs
;
852 /* We have to assume memory is needed, but the CC isn't. */
854 res
->volatil
= res
->unch_memory
= 0;
857 /* See if we have computed this value already. */
858 if (target_hash_table
!= NULL
)
860 for (tinfo
= target_hash_table
[INSN_UID (target
) % TARGET_HASH_PRIME
];
861 tinfo
; tinfo
= tinfo
->next
)
862 if (tinfo
->uid
== INSN_UID (target
))
865 /* Start by getting the basic block number. If we have saved
866 information, we can get it from there unless the insn at the
867 start of the basic block has been deleted. */
868 if (tinfo
&& tinfo
->block
!= -1
869 && ! INSN_DELETED_P (BLOCK_HEAD (tinfo
->block
)))
874 b
= find_basic_block (target
);
876 if (target_hash_table
!= NULL
)
880 /* If the information is up-to-date, use it. Otherwise, we will
882 if (b
== tinfo
->block
&& b
!= -1 && tinfo
->bb_tick
== bb_ticks
[b
])
884 COPY_HARD_REG_SET (res
->regs
, tinfo
->live_regs
);
890 /* Allocate a place to put our results and chain it into the
892 tinfo
= (struct target_info
*) oballoc (sizeof (struct target_info
));
893 tinfo
->uid
= INSN_UID (target
);
895 tinfo
->next
= target_hash_table
[INSN_UID (target
) % TARGET_HASH_PRIME
];
896 target_hash_table
[INSN_UID (target
) % TARGET_HASH_PRIME
] = tinfo
;
900 CLEAR_HARD_REG_SET (pending_dead_regs
);
902 /* If we found a basic block, get the live registers from it and update
903 them with anything set or killed between its start and the insn before
904 TARGET. Otherwise, we must assume everything is live. */
907 regset regs_live
= BASIC_BLOCK (b
)->global_live_at_start
;
910 rtx start_insn
, stop_insn
;
912 /* Compute hard regs live at start of block -- this is the real hard regs
913 marked live, plus live pseudo regs that have been renumbered to
916 REG_SET_TO_HARD_REG_SET (current_live_regs
, regs_live
);
918 EXECUTE_IF_SET_IN_REG_SET
919 (regs_live
, FIRST_PSEUDO_REGISTER
, i
,
921 if ((regno
= reg_renumber
[i
]) >= 0)
923 j
< regno
+ HARD_REGNO_NREGS (regno
,
924 PSEUDO_REGNO_MODE (i
));
926 SET_HARD_REG_BIT (current_live_regs
, j
);
929 /* Get starting and ending insn, handling the case where each might
931 start_insn
= (b
== 0 ? insns
: BLOCK_HEAD (b
));
934 if (GET_CODE (start_insn
) == INSN
935 && GET_CODE (PATTERN (start_insn
)) == SEQUENCE
)
936 start_insn
= XVECEXP (PATTERN (start_insn
), 0, 0);
938 if (GET_CODE (stop_insn
) == INSN
939 && GET_CODE (PATTERN (stop_insn
)) == SEQUENCE
)
940 stop_insn
= next_insn (PREV_INSN (stop_insn
));
942 for (insn
= start_insn
; insn
!= stop_insn
;
943 insn
= next_insn_no_annul (insn
))
946 rtx real_insn
= insn
;
948 /* If this insn is from the target of a branch, it isn't going to
949 be used in the sequel. If it is used in both cases, this
950 test will not be true. */
951 if (INSN_FROM_TARGET_P (insn
))
954 /* If this insn is a USE made by update_block, we care about the
956 if (GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == USE
957 && GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn
), 0))) == 'i')
958 real_insn
= XEXP (PATTERN (insn
), 0);
960 if (GET_CODE (real_insn
) == CALL_INSN
)
962 /* CALL clobbers all call-used regs that aren't fixed except
963 sp, ap, and fp. Do this before setting the result of the
965 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
966 if (call_used_regs
[i
]
967 && i
!= STACK_POINTER_REGNUM
&& i
!= FRAME_POINTER_REGNUM
968 && i
!= ARG_POINTER_REGNUM
969 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
970 && i
!= HARD_FRAME_POINTER_REGNUM
972 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
973 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
975 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
976 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
979 CLEAR_HARD_REG_BIT (current_live_regs
, i
);
981 /* A CALL_INSN sets any global register live, since it may
982 have been modified by the call. */
983 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
985 SET_HARD_REG_BIT (current_live_regs
, i
);
988 /* Mark anything killed in an insn to be deadened at the next
989 label. Ignore USE insns; the only REG_DEAD notes will be for
990 parameters. But they might be early. A CALL_INSN will usually
991 clobber registers used for parameters. It isn't worth bothering
992 with the unlikely case when it won't. */
993 if ((GET_CODE (real_insn
) == INSN
994 && GET_CODE (PATTERN (real_insn
)) != USE
995 && GET_CODE (PATTERN (real_insn
)) != CLOBBER
)
996 || GET_CODE (real_insn
) == JUMP_INSN
997 || GET_CODE (real_insn
) == CALL_INSN
)
999 for (link
= REG_NOTES (real_insn
); link
; link
= XEXP (link
, 1))
1000 if (REG_NOTE_KIND (link
) == REG_DEAD
1001 && GET_CODE (XEXP (link
, 0)) == REG
1002 && REGNO (XEXP (link
, 0)) < FIRST_PSEUDO_REGISTER
)
1004 int first_regno
= REGNO (XEXP (link
, 0));
1007 + HARD_REGNO_NREGS (first_regno
,
1008 GET_MODE (XEXP (link
, 0))));
1010 for (i
= first_regno
; i
< last_regno
; i
++)
1011 SET_HARD_REG_BIT (pending_dead_regs
, i
);
1014 note_stores (PATTERN (real_insn
), update_live_status
, NULL
);
1016 /* If any registers were unused after this insn, kill them.
1017 These notes will always be accurate. */
1018 for (link
= REG_NOTES (real_insn
); link
; link
= XEXP (link
, 1))
1019 if (REG_NOTE_KIND (link
) == REG_UNUSED
1020 && GET_CODE (XEXP (link
, 0)) == REG
1021 && REGNO (XEXP (link
, 0)) < FIRST_PSEUDO_REGISTER
)
1023 int first_regno
= REGNO (XEXP (link
, 0));
1026 + HARD_REGNO_NREGS (first_regno
,
1027 GET_MODE (XEXP (link
, 0))));
1029 for (i
= first_regno
; i
< last_regno
; i
++)
1030 CLEAR_HARD_REG_BIT (current_live_regs
, i
);
1034 else if (GET_CODE (real_insn
) == CODE_LABEL
)
1036 /* A label clobbers the pending dead registers since neither
1037 reload nor jump will propagate a value across a label. */
1038 AND_COMPL_HARD_REG_SET (current_live_regs
, pending_dead_regs
);
1039 CLEAR_HARD_REG_SET (pending_dead_regs
);
1042 /* The beginning of the epilogue corresponds to the end of the
1043 RTL chain when there are no epilogue insns. Certain resources
1044 are implicitly required at that point. */
1045 else if (GET_CODE (real_insn
) == NOTE
1046 && NOTE_LINE_NUMBER (real_insn
) == NOTE_INSN_EPILOGUE_BEG
)
1047 IOR_HARD_REG_SET (current_live_regs
, start_of_epilogue_needs
.regs
);
1050 COPY_HARD_REG_SET (res
->regs
, current_live_regs
);
1054 tinfo
->bb_tick
= bb_ticks
[b
];
1058 /* We didn't find the start of a basic block. Assume everything
1059 in use. This should happen only extremely rarely. */
1060 SET_HARD_REG_SET (res
->regs
);
1062 CLEAR_RESOURCE (&set
);
1063 CLEAR_RESOURCE (&needed
);
1065 jump_insn
= find_dead_or_set_registers (target
, res
, &jump_target
, 0,
1068 /* If we hit an unconditional branch, we have another way of finding out
1069 what is live: we can see what is live at the branch target and include
1070 anything used but not set before the branch. We add the live
1071 resources found using the test below to those found until now. */
1075 struct resources new_resources
;
1076 rtx stop_insn
= next_active_insn (jump_insn
);
1078 mark_target_live_regs (insns
, next_active_insn (jump_target
),
1080 CLEAR_RESOURCE (&set
);
1081 CLEAR_RESOURCE (&needed
);
1083 /* Include JUMP_INSN in the needed registers. */
1084 for (insn
= target
; insn
!= stop_insn
; insn
= next_active_insn (insn
))
1086 mark_referenced_resources (insn
, &needed
, 1);
1088 COPY_HARD_REG_SET (scratch
, needed
.regs
);
1089 AND_COMPL_HARD_REG_SET (scratch
, set
.regs
);
1090 IOR_HARD_REG_SET (new_resources
.regs
, scratch
);
1092 mark_set_resources (insn
, &set
, 0, 1);
1095 IOR_HARD_REG_SET (res
->regs
, new_resources
.regs
);
1100 COPY_HARD_REG_SET (tinfo
->live_regs
, res
->regs
);
1104 /* Initialize the resources required by mark_target_live_regs ().
1105 This should be invoked before the first call to mark_target_live_regs. */
1108 init_resource_info (epilogue_insn
)
1113 /* Indicate what resources are required to be valid at the end of the current
1114 function. The condition code never is and memory always is. If the
1115 frame pointer is needed, it is and so is the stack pointer unless
1116 EXIT_IGNORE_STACK is non-zero. If the frame pointer is not needed, the
1117 stack pointer is. Registers used to return the function value are
1118 needed. Registers holding global variables are needed. */
1120 end_of_function_needs
.cc
= 0;
1121 end_of_function_needs
.memory
= 1;
1122 end_of_function_needs
.unch_memory
= 0;
1123 CLEAR_HARD_REG_SET (end_of_function_needs
.regs
);
1125 if (frame_pointer_needed
)
1127 SET_HARD_REG_BIT (end_of_function_needs
.regs
, FRAME_POINTER_REGNUM
);
1128 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1129 SET_HARD_REG_BIT (end_of_function_needs
.regs
, HARD_FRAME_POINTER_REGNUM
);
1131 #ifdef EXIT_IGNORE_STACK
1132 if (! EXIT_IGNORE_STACK
1133 || current_function_sp_is_unchanging
)
1135 SET_HARD_REG_BIT (end_of_function_needs
.regs
, STACK_POINTER_REGNUM
);
1138 SET_HARD_REG_BIT (end_of_function_needs
.regs
, STACK_POINTER_REGNUM
);
1140 if (current_function_return_rtx
!= 0)
1141 mark_referenced_resources (current_function_return_rtx
,
1142 &end_of_function_needs
, 1);
1144 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1146 #ifdef EPILOGUE_USES
1147 || EPILOGUE_USES (i
)
1150 SET_HARD_REG_BIT (end_of_function_needs
.regs
, i
);
1152 /* The registers required to be live at the end of the function are
1153 represented in the flow information as being dead just prior to
1154 reaching the end of the function. For example, the return of a value
1155 might be represented by a USE of the return register immediately
1156 followed by an unconditional jump to the return label where the
1157 return label is the end of the RTL chain. The end of the RTL chain
1158 is then taken to mean that the return register is live.
1160 This sequence is no longer maintained when epilogue instructions are
1161 added to the RTL chain. To reconstruct the original meaning, the
1162 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1163 point where these registers become live (start_of_epilogue_needs).
1164 If epilogue instructions are present, the registers set by those
1165 instructions won't have been processed by flow. Thus, those
1166 registers are additionally required at the end of the RTL chain
1167 (end_of_function_needs). */
1169 start_of_epilogue_needs
= end_of_function_needs
;
1171 while ((epilogue_insn
= next_nonnote_insn (epilogue_insn
)))
1172 mark_set_resources (epilogue_insn
, &end_of_function_needs
, 0, 1);
1174 /* Allocate and initialize the tables used by mark_target_live_regs. */
1175 target_hash_table
= (struct target_info
**)
1176 xcalloc (TARGET_HASH_PRIME
, sizeof (struct target_info
*));
1177 bb_ticks
= (int *) xcalloc (n_basic_blocks
, sizeof (int));
1180 /* Free up the resources allcated to mark_target_live_regs (). This
1181 should be invoked after the last call to mark_target_live_regs (). */
1184 free_resource_info ()
1186 if (target_hash_table
!= NULL
)
1188 free (target_hash_table
);
1189 target_hash_table
= NULL
;
1192 if (bb_ticks
!= NULL
)
1199 /* Clear any hashed information that we have stored for INSN. */
1202 clear_hashed_info_for_insn (insn
)
1205 struct target_info
*tinfo
;
1207 if (target_hash_table
!= NULL
)
1209 for (tinfo
= target_hash_table
[INSN_UID (insn
) % TARGET_HASH_PRIME
];
1210 tinfo
; tinfo
= tinfo
->next
)
1211 if (tinfo
->uid
== INSN_UID (insn
))
1219 /* Increment the tick count for the basic block that contains INSN. */
1222 incr_ticks_for_insn (insn
)
1225 int b
= find_basic_block (insn
);
1231 /* Add TRIAL to the set of resources used at the end of the current
1234 mark_end_of_function_resources (trial
, include_delayed_effects
)
1236 int include_delayed_effects
;
1238 mark_referenced_resources (trial
, &end_of_function_needs
,
1239 include_delayed_effects
);
1242 /* Try to find a hard register of mode MODE, matching the register class in
1243 CLASS_STR, which is available at the beginning of insn CURRENT_INSN and
1244 remains available until the end of LAST_INSN. LAST_INSN may be NULL_RTX,
1245 in which case the only condition is that the register must be available
1246 before CURRENT_INSN.
1247 Registers that already have bits set in REG_SET will not be considered.
1249 If an appropriate register is available, it will be returned and the
1250 corresponding bit(s) in REG_SET will be set; otherwise, NULL_RTX is
1254 find_free_register (current_insn
, last_insn
, class_str
, mode
, reg_set
)
1255 rtx current_insn
, last_insn
;
1256 const char *class_str
;
1258 HARD_REG_SET
*reg_set
;
1261 struct resources used
;
1262 unsigned char clet
= class_str
[0];
1263 enum reg_class
class
1264 = (clet
== 'r' ? GENERAL_REGS
: REG_CLASS_FROM_LETTER (clet
));
1266 mark_target_live_regs (get_insns (), current_insn
, &used
);
1268 while (current_insn
!= last_insn
)
1270 /* Exclude anything set in this insn. */
1271 mark_set_resources (PATTERN (current_insn
), &used
, 0, 1);
1272 current_insn
= next_nonnote_insn (current_insn
);
1276 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1281 #ifdef REG_ALLOC_ORDER
1282 regno
= reg_alloc_order
[i
];
1287 /* Don't allocate fixed registers. */
1288 if (fixed_regs
[regno
])
1290 /* Make sure the register is of the right class. */
1291 if (! TEST_HARD_REG_BIT (reg_class_contents
[class], regno
))
1293 /* And can support the mode we need. */
1294 if (! HARD_REGNO_MODE_OK (regno
, mode
))
1296 /* And that we don't create an extra save/restore. */
1297 if (! call_used_regs
[regno
] && ! regs_ever_live
[regno
])
1299 /* And we don't clobber traceback for noreturn functions. */
1300 if ((regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
)
1301 && (! reload_completed
|| frame_pointer_needed
))
1305 for (j
= HARD_REGNO_NREGS (regno
, mode
) - 1; j
>= 0; j
--)
1307 if (TEST_HARD_REG_BIT (*reg_set
, regno
+ j
)
1308 || TEST_HARD_REG_BIT (used
.regs
, regno
+ j
))
1316 for (j
= HARD_REGNO_NREGS (regno
, mode
) - 1; j
>= 0; j
--)
1318 SET_HARD_REG_BIT (*reg_set
, regno
+ j
);
1320 return gen_rtx_REG (mode
, regno
);
1326 /* Return true if REG is dead at CURRENT_INSN. */
1329 reg_dead_p (current_insn
, reg
)
1330 rtx current_insn
, reg
;
1332 struct resources used
;
1335 mark_target_live_regs (get_insns (), current_insn
, &used
);
1337 regno
= REGNO (reg
);
1338 for (j
= HARD_REGNO_NREGS (regno
, GET_MODE (reg
)) - 1; j
>= 0; j
--)
1340 if (TEST_HARD_REG_BIT (used
.regs
, regno
+ j
))