resource.c (mark_referenced_resources): Mark a set strict_low_part as used.
[gcc.git] / gcc / resource.c
1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999, 2000 Free Software Foundation, Inc.
3
4 This file is part of GNU CC.
5
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21 #include "config.h"
22 #include "system.h"
23 #include "toplev.h"
24 #include "rtl.h"
25 #include "tm_p.h"
26 #include "hard-reg-set.h"
27 #include "basic-block.h"
28 #include "function.h"
29 #include "regs.h"
30 #include "flags.h"
31 #include "output.h"
32 #include "resource.h"
33 #include "insn-attr.h"
34
35 /* This structure is used to record liveness information at the targets or
36 fallthrough insns of branches. We will most likely need the information
37 at targets again, so save them in a hash table rather than recomputing them
38 each time. */
39
40 struct target_info
41 {
42 int uid; /* INSN_UID of target. */
43 struct target_info *next; /* Next info for same hash bucket. */
44 HARD_REG_SET live_regs; /* Registers live at target. */
45 int block; /* Basic block number containing target. */
46 int bb_tick; /* Generation count of basic block info. */
47 };
48
49 #define TARGET_HASH_PRIME 257
50
51 /* Indicates what resources are required at the beginning of the epilogue. */
52 static struct resources start_of_epilogue_needs;
53
54 /* Indicates what resources are required at function end. */
55 static struct resources end_of_function_needs;
56
57 /* Define the hash table itself. */
58 static struct target_info **target_hash_table = NULL;
59
60 /* For each basic block, we maintain a generation number of its basic
61 block info, which is updated each time we move an insn from the
62 target of a jump. This is the generation number indexed by block
63 number. */
64
65 static int *bb_ticks;
66
67 /* Marks registers possibly live at the current place being scanned by
68 mark_target_live_regs. Used only by next two function. */
69
70 static HARD_REG_SET current_live_regs;
71
72 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
73 Also only used by the next two functions. */
74
75 static HARD_REG_SET pending_dead_regs;
76 \f
77 static void update_live_status PROTO ((rtx, rtx, void *));
78 static int find_basic_block PROTO ((rtx));
79 static rtx next_insn_no_annul PROTO ((rtx));
80 static rtx find_dead_or_set_registers PROTO ((rtx, struct resources*,
81 rtx*, int, struct resources,
82 struct resources));
83 \f
84 /* Utility function called from mark_target_live_regs via note_stores.
85 It deadens any CLOBBERed registers and livens any SET registers. */
86
87 static void
88 update_live_status (dest, x, data)
89 rtx dest;
90 rtx x;
91 void *data ATTRIBUTE_UNUSED;
92 {
93 int first_regno, last_regno;
94 int i;
95
96 if (GET_CODE (dest) != REG
97 && (GET_CODE (dest) != SUBREG || GET_CODE (SUBREG_REG (dest)) != REG))
98 return;
99
100 if (GET_CODE (dest) == SUBREG)
101 first_regno = REGNO (SUBREG_REG (dest)) + SUBREG_WORD (dest);
102 else
103 first_regno = REGNO (dest);
104
105 last_regno = first_regno + HARD_REGNO_NREGS (first_regno, GET_MODE (dest));
106
107 if (GET_CODE (x) == CLOBBER)
108 for (i = first_regno; i < last_regno; i++)
109 CLEAR_HARD_REG_BIT (current_live_regs, i);
110 else
111 for (i = first_regno; i < last_regno; i++)
112 {
113 SET_HARD_REG_BIT (current_live_regs, i);
114 CLEAR_HARD_REG_BIT (pending_dead_regs, i);
115 }
116 }
117 /* Find the number of the basic block that starts closest to INSN. Return -1
118 if we couldn't find such a basic block. */
119
120 static int
121 find_basic_block (insn)
122 rtx insn;
123 {
124 int i;
125
126 /* Scan backwards to the previous BARRIER. Then see if we can find a
127 label that starts a basic block. Return the basic block number. */
128
129 for (insn = prev_nonnote_insn (insn);
130 insn && GET_CODE (insn) != BARRIER;
131 insn = prev_nonnote_insn (insn))
132 ;
133
134 /* The start of the function is basic block zero. */
135 if (insn == 0)
136 return 0;
137
138 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
139 anything other than a CODE_LABEL or note, we can't find this code. */
140 for (insn = next_nonnote_insn (insn);
141 insn && GET_CODE (insn) == CODE_LABEL;
142 insn = next_nonnote_insn (insn))
143 {
144 for (i = 0; i < n_basic_blocks; i++)
145 if (insn == BLOCK_HEAD (i))
146 return i;
147 }
148
149 return -1;
150 }
151 \f
152 /* Similar to next_insn, but ignores insns in the delay slots of
153 an annulled branch. */
154
155 static rtx
156 next_insn_no_annul (insn)
157 rtx insn;
158 {
159 if (insn)
160 {
161 /* If INSN is an annulled branch, skip any insns from the target
162 of the branch. */
163 if (INSN_ANNULLED_BRANCH_P (insn)
164 && NEXT_INSN (PREV_INSN (insn)) != insn)
165 while (INSN_FROM_TARGET_P (NEXT_INSN (insn)))
166 insn = NEXT_INSN (insn);
167
168 insn = NEXT_INSN (insn);
169 if (insn && GET_CODE (insn) == INSN
170 && GET_CODE (PATTERN (insn)) == SEQUENCE)
171 insn = XVECEXP (PATTERN (insn), 0, 0);
172 }
173
174 return insn;
175 }
176 \f
177 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
178 which resources are references by the insn. If INCLUDE_DELAYED_EFFECTS
179 is TRUE, resources used by the called routine will be included for
180 CALL_INSNs. */
181
182 void
183 mark_referenced_resources (x, res, include_delayed_effects)
184 register rtx x;
185 register struct resources *res;
186 register int include_delayed_effects;
187 {
188 register enum rtx_code code = GET_CODE (x);
189 register int i, j;
190 register const char *format_ptr;
191
192 /* Handle leaf items for which we set resource flags. Also, special-case
193 CALL, SET and CLOBBER operators. */
194 switch (code)
195 {
196 case CONST:
197 case CONST_INT:
198 case CONST_DOUBLE:
199 case PC:
200 case SYMBOL_REF:
201 case LABEL_REF:
202 return;
203
204 case SUBREG:
205 if (GET_CODE (SUBREG_REG (x)) != REG)
206 mark_referenced_resources (SUBREG_REG (x), res, 0);
207 else
208 {
209 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
210 int last_regno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
211 for (i = regno; i < last_regno; i++)
212 SET_HARD_REG_BIT (res->regs, i);
213 }
214 return;
215
216 case REG:
217 for (i = 0; i < HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)); i++)
218 SET_HARD_REG_BIT (res->regs, REGNO (x) + i);
219 return;
220
221 case MEM:
222 /* If this memory shouldn't change, it really isn't referencing
223 memory. */
224 if (RTX_UNCHANGING_P (x))
225 res->unch_memory = 1;
226 else
227 res->memory = 1;
228 res->volatil |= MEM_VOLATILE_P (x);
229
230 /* Mark registers used to access memory. */
231 mark_referenced_resources (XEXP (x, 0), res, 0);
232 return;
233
234 case CC0:
235 res->cc = 1;
236 return;
237
238 case UNSPEC_VOLATILE:
239 case ASM_INPUT:
240 /* Traditional asm's are always volatile. */
241 res->volatil = 1;
242 return;
243
244 case TRAP_IF:
245 res->volatil = 1;
246 break;
247
248 case ASM_OPERANDS:
249 res->volatil |= MEM_VOLATILE_P (x);
250
251 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
252 We can not just fall through here since then we would be confused
253 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
254 traditional asms unlike their normal usage. */
255
256 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
257 mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, 0);
258 return;
259
260 case CALL:
261 /* The first operand will be a (MEM (xxx)) but doesn't really reference
262 memory. The second operand may be referenced, though. */
263 mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, 0);
264 mark_referenced_resources (XEXP (x, 1), res, 0);
265 return;
266
267 case SET:
268 /* Usually, the first operand of SET is set, not referenced. But
269 registers used to access memory are referenced. SET_DEST is
270 also referenced if it is a ZERO_EXTRACT or SIGN_EXTRACT. */
271
272 mark_referenced_resources (SET_SRC (x), res, 0);
273
274 x = SET_DEST (x);
275 if (GET_CODE (x) == SIGN_EXTRACT
276 || GET_CODE (x) == ZERO_EXTRACT
277 || GET_CODE (x) == STRICT_LOW_PART)
278 mark_referenced_resources (x, res, 0);
279 else if (GET_CODE (x) == SUBREG)
280 x = SUBREG_REG (x);
281 if (GET_CODE (x) == MEM)
282 mark_referenced_resources (XEXP (x, 0), res, 0);
283 return;
284
285 case CLOBBER:
286 return;
287
288 case CALL_INSN:
289 if (include_delayed_effects)
290 {
291 /* A CALL references memory, the frame pointer if it exists, the
292 stack pointer, any global registers and any registers given in
293 USE insns immediately in front of the CALL.
294
295 However, we may have moved some of the parameter loading insns
296 into the delay slot of this CALL. If so, the USE's for them
297 don't count and should be skipped. */
298 rtx insn = PREV_INSN (x);
299 rtx sequence = 0;
300 int seq_size = 0;
301 rtx next = NEXT_INSN (x);
302 int i;
303
304 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
305 if (NEXT_INSN (insn) != x)
306 {
307 next = NEXT_INSN (NEXT_INSN (insn));
308 sequence = PATTERN (NEXT_INSN (insn));
309 seq_size = XVECLEN (sequence, 0);
310 if (GET_CODE (sequence) != SEQUENCE)
311 abort ();
312 }
313
314 res->memory = 1;
315 SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM);
316 if (frame_pointer_needed)
317 {
318 SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM);
319 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
320 SET_HARD_REG_BIT (res->regs, HARD_FRAME_POINTER_REGNUM);
321 #endif
322 }
323
324 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
325 if (global_regs[i])
326 SET_HARD_REG_BIT (res->regs, i);
327
328 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
329 assume that this call can need any register.
330
331 This is done to be more conservative about how we handle setjmp.
332 We assume that they both use and set all registers. Using all
333 registers ensures that a register will not be considered dead
334 just because it crosses a setjmp call. A register should be
335 considered dead only if the setjmp call returns non-zero. */
336 if (next && GET_CODE (next) == NOTE
337 && NOTE_LINE_NUMBER (next) == NOTE_INSN_SETJMP)
338 SET_HARD_REG_SET (res->regs);
339
340 {
341 rtx link;
342
343 for (link = CALL_INSN_FUNCTION_USAGE (x);
344 link;
345 link = XEXP (link, 1))
346 if (GET_CODE (XEXP (link, 0)) == USE)
347 {
348 for (i = 1; i < seq_size; i++)
349 {
350 rtx slot_pat = PATTERN (XVECEXP (sequence, 0, i));
351 if (GET_CODE (slot_pat) == SET
352 && rtx_equal_p (SET_DEST (slot_pat),
353 SET_DEST (XEXP (link, 0))))
354 break;
355 }
356 if (i >= seq_size)
357 mark_referenced_resources (SET_DEST (XEXP (link, 0)),
358 res, 0);
359 }
360 }
361 }
362
363 /* ... fall through to other INSN processing ... */
364
365 case INSN:
366 case JUMP_INSN:
367
368 #ifdef INSN_REFERENCES_ARE_DELAYED
369 if (! include_delayed_effects
370 && INSN_REFERENCES_ARE_DELAYED (x))
371 return;
372 #endif
373
374 /* No special processing, just speed up. */
375 mark_referenced_resources (PATTERN (x), res, include_delayed_effects);
376 return;
377
378 default:
379 break;
380 }
381
382 /* Process each sub-expression and flag what it needs. */
383 format_ptr = GET_RTX_FORMAT (code);
384 for (i = 0; i < GET_RTX_LENGTH (code); i++)
385 switch (*format_ptr++)
386 {
387 case 'e':
388 mark_referenced_resources (XEXP (x, i), res, include_delayed_effects);
389 break;
390
391 case 'E':
392 for (j = 0; j < XVECLEN (x, i); j++)
393 mark_referenced_resources (XVECEXP (x, i, j), res,
394 include_delayed_effects);
395 break;
396 }
397 }
398 \f
399 /* A subroutine of mark_target_live_regs. Search forward from TARGET
400 looking for registers that are set before they are used. These are dead.
401 Stop after passing a few conditional jumps, and/or a small
402 number of unconditional branches. */
403
404 static rtx
405 find_dead_or_set_registers (target, res, jump_target, jump_count, set, needed)
406 rtx target;
407 struct resources *res;
408 rtx *jump_target;
409 int jump_count;
410 struct resources set, needed;
411 {
412 HARD_REG_SET scratch;
413 rtx insn, next;
414 rtx jump_insn = 0;
415 int i;
416
417 for (insn = target; insn; insn = next)
418 {
419 rtx this_jump_insn = insn;
420
421 next = NEXT_INSN (insn);
422 switch (GET_CODE (insn))
423 {
424 case CODE_LABEL:
425 /* After a label, any pending dead registers that weren't yet
426 used can be made dead. */
427 AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs);
428 AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs);
429 CLEAR_HARD_REG_SET (pending_dead_regs);
430
431 continue;
432
433 case BARRIER:
434 case NOTE:
435 continue;
436
437 case INSN:
438 if (GET_CODE (PATTERN (insn)) == USE)
439 {
440 /* If INSN is a USE made by update_block, we care about the
441 underlying insn. Any registers set by the underlying insn
442 are live since the insn is being done somewhere else. */
443 if (GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn), 0))) == 'i')
444 mark_set_resources (XEXP (PATTERN (insn), 0), res, 0, 1);
445
446 /* All other USE insns are to be ignored. */
447 continue;
448 }
449 else if (GET_CODE (PATTERN (insn)) == CLOBBER)
450 continue;
451 else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
452 {
453 /* An unconditional jump can be used to fill the delay slot
454 of a call, so search for a JUMP_INSN in any position. */
455 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
456 {
457 this_jump_insn = XVECEXP (PATTERN (insn), 0, i);
458 if (GET_CODE (this_jump_insn) == JUMP_INSN)
459 break;
460 }
461 }
462
463 default:
464 break;
465 }
466
467 if (GET_CODE (this_jump_insn) == JUMP_INSN)
468 {
469 if (jump_count++ < 10)
470 {
471 if (simplejump_p (this_jump_insn)
472 || GET_CODE (PATTERN (this_jump_insn)) == RETURN)
473 {
474 next = JUMP_LABEL (this_jump_insn);
475 if (jump_insn == 0)
476 {
477 jump_insn = insn;
478 if (jump_target)
479 *jump_target = JUMP_LABEL (this_jump_insn);
480 }
481 }
482 else if (condjump_p (this_jump_insn)
483 || condjump_in_parallel_p (this_jump_insn))
484 {
485 struct resources target_set, target_res;
486 struct resources fallthrough_res;
487
488 /* We can handle conditional branches here by following
489 both paths, and then IOR the results of the two paths
490 together, which will give us registers that are dead
491 on both paths. Since this is expensive, we give it
492 a much higher cost than unconditional branches. The
493 cost was chosen so that we will follow at most 1
494 conditional branch. */
495
496 jump_count += 4;
497 if (jump_count >= 10)
498 break;
499
500 mark_referenced_resources (insn, &needed, 1);
501
502 /* For an annulled branch, mark_set_resources ignores slots
503 filled by instructions from the target. This is correct
504 if the branch is not taken. Since we are following both
505 paths from the branch, we must also compute correct info
506 if the branch is taken. We do this by inverting all of
507 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
508 and then inverting the INSN_FROM_TARGET_P bits again. */
509
510 if (GET_CODE (PATTERN (insn)) == SEQUENCE
511 && INSN_ANNULLED_BRANCH_P (this_jump_insn))
512 {
513 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
514 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
515 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
516
517 target_set = set;
518 mark_set_resources (insn, &target_set, 0, 1);
519
520 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
521 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
522 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
523
524 mark_set_resources (insn, &set, 0, 1);
525 }
526 else
527 {
528 mark_set_resources (insn, &set, 0, 1);
529 target_set = set;
530 }
531
532 target_res = *res;
533 COPY_HARD_REG_SET (scratch, target_set.regs);
534 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
535 AND_COMPL_HARD_REG_SET (target_res.regs, scratch);
536
537 fallthrough_res = *res;
538 COPY_HARD_REG_SET (scratch, set.regs);
539 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
540 AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
541
542 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn),
543 &target_res, 0, jump_count,
544 target_set, needed);
545 find_dead_or_set_registers (next,
546 &fallthrough_res, 0, jump_count,
547 set, needed);
548 IOR_HARD_REG_SET (fallthrough_res.regs, target_res.regs);
549 AND_HARD_REG_SET (res->regs, fallthrough_res.regs);
550 break;
551 }
552 else
553 break;
554 }
555 else
556 {
557 /* Don't try this optimization if we expired our jump count
558 above, since that would mean there may be an infinite loop
559 in the function being compiled. */
560 jump_insn = 0;
561 break;
562 }
563 }
564
565 mark_referenced_resources (insn, &needed, 1);
566 mark_set_resources (insn, &set, 0, 1);
567
568 COPY_HARD_REG_SET (scratch, set.regs);
569 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
570 AND_COMPL_HARD_REG_SET (res->regs, scratch);
571 }
572
573 return jump_insn;
574 }
575 \f
576 /* Given X, a part of an insn, and a pointer to a `struct resource',
577 RES, indicate which resources are modified by the insn. If
578 INCLUDE_DELAYED_EFFECTS is nonzero, also mark resources potentially
579 set by the called routine.
580
581 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
582 objects are being referenced instead of set.
583
584 We never mark the insn as modifying the condition code unless it explicitly
585 SETs CC0 even though this is not totally correct. The reason for this is
586 that we require a SET of CC0 to immediately precede the reference to CC0.
587 So if some other insn sets CC0 as a side-effect, we know it cannot affect
588 our computation and thus may be placed in a delay slot. */
589
590 void
591 mark_set_resources (x, res, in_dest, include_delayed_effects)
592 register rtx x;
593 register struct resources *res;
594 int in_dest;
595 int include_delayed_effects;
596 {
597 register enum rtx_code code;
598 register int i, j;
599 register const char *format_ptr;
600
601 restart:
602
603 code = GET_CODE (x);
604
605 switch (code)
606 {
607 case NOTE:
608 case BARRIER:
609 case CODE_LABEL:
610 case USE:
611 case CONST_INT:
612 case CONST_DOUBLE:
613 case LABEL_REF:
614 case SYMBOL_REF:
615 case CONST:
616 case PC:
617 /* These don't set any resources. */
618 return;
619
620 case CC0:
621 if (in_dest)
622 res->cc = 1;
623 return;
624
625 case CALL_INSN:
626 /* Called routine modifies the condition code, memory, any registers
627 that aren't saved across calls, global registers and anything
628 explicitly CLOBBERed immediately after the CALL_INSN. */
629
630 if (include_delayed_effects)
631 {
632 rtx next = NEXT_INSN (x);
633 rtx prev = PREV_INSN (x);
634 rtx link;
635
636 res->cc = res->memory = 1;
637 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
638 if (call_used_regs[i] || global_regs[i])
639 SET_HARD_REG_BIT (res->regs, i);
640
641 /* If X is part of a delay slot sequence, then NEXT should be
642 the first insn after the sequence. */
643 if (NEXT_INSN (prev) != x)
644 next = NEXT_INSN (NEXT_INSN (prev));
645
646 for (link = CALL_INSN_FUNCTION_USAGE (x);
647 link; link = XEXP (link, 1))
648 if (GET_CODE (XEXP (link, 0)) == CLOBBER)
649 mark_set_resources (SET_DEST (XEXP (link, 0)), res, 1, 0);
650
651 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
652 assume that this call can clobber any register. */
653 if (next && GET_CODE (next) == NOTE
654 && NOTE_LINE_NUMBER (next) == NOTE_INSN_SETJMP)
655 SET_HARD_REG_SET (res->regs);
656 }
657
658 /* ... and also what its RTL says it modifies, if anything. */
659
660 case JUMP_INSN:
661 case INSN:
662
663 /* An insn consisting of just a CLOBBER (or USE) is just for flow
664 and doesn't actually do anything, so we ignore it. */
665
666 #ifdef INSN_SETS_ARE_DELAYED
667 if (! include_delayed_effects
668 && INSN_SETS_ARE_DELAYED (x))
669 return;
670 #endif
671
672 x = PATTERN (x);
673 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
674 goto restart;
675 return;
676
677 case SET:
678 /* If the source of a SET is a CALL, this is actually done by
679 the called routine. So only include it if we are to include the
680 effects of the calling routine. */
681
682 mark_set_resources (SET_DEST (x), res,
683 (include_delayed_effects
684 || GET_CODE (SET_SRC (x)) != CALL),
685 0);
686
687 mark_set_resources (SET_SRC (x), res, 0, 0);
688 return;
689
690 case CLOBBER:
691 mark_set_resources (XEXP (x, 0), res, 1, 0);
692 return;
693
694 case SEQUENCE:
695 for (i = 0; i < XVECLEN (x, 0); i++)
696 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x, 0, 0))
697 && INSN_FROM_TARGET_P (XVECEXP (x, 0, i))))
698 mark_set_resources (XVECEXP (x, 0, i), res, 0,
699 include_delayed_effects);
700 return;
701
702 case POST_INC:
703 case PRE_INC:
704 case POST_DEC:
705 case PRE_DEC:
706 mark_set_resources (XEXP (x, 0), res, 1, 0);
707 return;
708
709 case ZERO_EXTRACT:
710 mark_set_resources (XEXP (x, 0), res, in_dest, 0);
711 mark_set_resources (XEXP (x, 1), res, 0, 0);
712 mark_set_resources (XEXP (x, 2), res, 0, 0);
713 return;
714
715 case MEM:
716 if (in_dest)
717 {
718 res->memory = 1;
719 res->unch_memory |= RTX_UNCHANGING_P (x);
720 res->volatil |= MEM_VOLATILE_P (x);
721 }
722
723 mark_set_resources (XEXP (x, 0), res, 0, 0);
724 return;
725
726 case SUBREG:
727 if (in_dest)
728 {
729 if (GET_CODE (SUBREG_REG (x)) != REG)
730 mark_set_resources (SUBREG_REG (x), res,
731 in_dest, include_delayed_effects);
732 else
733 {
734 int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
735 int last_regno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
736 for (i = regno; i < last_regno; i++)
737 SET_HARD_REG_BIT (res->regs, i);
738 }
739 }
740 return;
741
742 case REG:
743 if (in_dest)
744 for (i = 0; i < HARD_REGNO_NREGS (REGNO (x), GET_MODE (x)); i++)
745 SET_HARD_REG_BIT (res->regs, REGNO (x) + i);
746 return;
747
748 case UNSPEC_VOLATILE:
749 case ASM_INPUT:
750 /* Traditional asm's are always volatile. */
751 res->volatil = 1;
752 return;
753
754 case TRAP_IF:
755 res->volatil = 1;
756 break;
757
758 case ASM_OPERANDS:
759 res->volatil |= MEM_VOLATILE_P (x);
760
761 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
762 We can not just fall through here since then we would be confused
763 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
764 traditional asms unlike their normal usage. */
765
766 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
767 mark_set_resources (ASM_OPERANDS_INPUT (x, i), res, in_dest, 0);
768 return;
769
770 default:
771 break;
772 }
773
774 /* Process each sub-expression and flag what it needs. */
775 format_ptr = GET_RTX_FORMAT (code);
776 for (i = 0; i < GET_RTX_LENGTH (code); i++)
777 switch (*format_ptr++)
778 {
779 case 'e':
780 mark_set_resources (XEXP (x, i), res, in_dest, include_delayed_effects);
781 break;
782
783 case 'E':
784 for (j = 0; j < XVECLEN (x, i); j++)
785 mark_set_resources (XVECEXP (x, i, j), res, in_dest,
786 include_delayed_effects);
787 break;
788 }
789 }
790 \f
791 /* Set the resources that are live at TARGET.
792
793 If TARGET is zero, we refer to the end of the current function and can
794 return our precomputed value.
795
796 Otherwise, we try to find out what is live by consulting the basic block
797 information. This is tricky, because we must consider the actions of
798 reload and jump optimization, which occur after the basic block information
799 has been computed.
800
801 Accordingly, we proceed as follows::
802
803 We find the previous BARRIER and look at all immediately following labels
804 (with no intervening active insns) to see if any of them start a basic
805 block. If we hit the start of the function first, we use block 0.
806
807 Once we have found a basic block and a corresponding first insns, we can
808 accurately compute the live status from basic_block_live_regs and
809 reg_renumber. (By starting at a label following a BARRIER, we are immune
810 to actions taken by reload and jump.) Then we scan all insns between
811 that point and our target. For each CLOBBER (or for call-clobbered regs
812 when we pass a CALL_INSN), mark the appropriate registers are dead. For
813 a SET, mark them as live.
814
815 We have to be careful when using REG_DEAD notes because they are not
816 updated by such things as find_equiv_reg. So keep track of registers
817 marked as dead that haven't been assigned to, and mark them dead at the
818 next CODE_LABEL since reload and jump won't propagate values across labels.
819
820 If we cannot find the start of a basic block (should be a very rare
821 case, if it can happen at all), mark everything as potentially live.
822
823 Next, scan forward from TARGET looking for things set or clobbered
824 before they are used. These are not live.
825
826 Because we can be called many times on the same target, save our results
827 in a hash table indexed by INSN_UID. This is only done if the function
828 init_resource_info () was invoked before we are called. */
829
830 void
831 mark_target_live_regs (insns, target, res)
832 rtx insns;
833 rtx target;
834 struct resources *res;
835 {
836 int b = -1;
837 int i;
838 struct target_info *tinfo = NULL;
839 rtx insn;
840 rtx jump_insn = 0;
841 rtx jump_target;
842 HARD_REG_SET scratch;
843 struct resources set, needed;
844
845 /* Handle end of function. */
846 if (target == 0)
847 {
848 *res = end_of_function_needs;
849 return;
850 }
851
852 /* We have to assume memory is needed, but the CC isn't. */
853 res->memory = 1;
854 res->volatil = res->unch_memory = 0;
855 res->cc = 0;
856
857 /* See if we have computed this value already. */
858 if (target_hash_table != NULL)
859 {
860 for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
861 tinfo; tinfo = tinfo->next)
862 if (tinfo->uid == INSN_UID (target))
863 break;
864
865 /* Start by getting the basic block number. If we have saved
866 information, we can get it from there unless the insn at the
867 start of the basic block has been deleted. */
868 if (tinfo && tinfo->block != -1
869 && ! INSN_DELETED_P (BLOCK_HEAD (tinfo->block)))
870 b = tinfo->block;
871 }
872
873 if (b == -1)
874 b = find_basic_block (target);
875
876 if (target_hash_table != NULL)
877 {
878 if (tinfo)
879 {
880 /* If the information is up-to-date, use it. Otherwise, we will
881 update it below. */
882 if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b])
883 {
884 COPY_HARD_REG_SET (res->regs, tinfo->live_regs);
885 return;
886 }
887 }
888 else
889 {
890 /* Allocate a place to put our results and chain it into the
891 hash table. */
892 tinfo = (struct target_info *) oballoc (sizeof (struct target_info));
893 tinfo->uid = INSN_UID (target);
894 tinfo->block = b;
895 tinfo->next = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
896 target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo;
897 }
898 }
899
900 CLEAR_HARD_REG_SET (pending_dead_regs);
901
902 /* If we found a basic block, get the live registers from it and update
903 them with anything set or killed between its start and the insn before
904 TARGET. Otherwise, we must assume everything is live. */
905 if (b != -1)
906 {
907 regset regs_live = BASIC_BLOCK (b)->global_live_at_start;
908 int j;
909 int regno;
910 rtx start_insn, stop_insn;
911
912 /* Compute hard regs live at start of block -- this is the real hard regs
913 marked live, plus live pseudo regs that have been renumbered to
914 hard regs. */
915
916 REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live);
917
918 EXECUTE_IF_SET_IN_REG_SET
919 (regs_live, FIRST_PSEUDO_REGISTER, i,
920 {
921 if ((regno = reg_renumber[i]) >= 0)
922 for (j = regno;
923 j < regno + HARD_REGNO_NREGS (regno,
924 PSEUDO_REGNO_MODE (i));
925 j++)
926 SET_HARD_REG_BIT (current_live_regs, j);
927 });
928
929 /* Get starting and ending insn, handling the case where each might
930 be a SEQUENCE. */
931 start_insn = (b == 0 ? insns : BLOCK_HEAD (b));
932 stop_insn = target;
933
934 if (GET_CODE (start_insn) == INSN
935 && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
936 start_insn = XVECEXP (PATTERN (start_insn), 0, 0);
937
938 if (GET_CODE (stop_insn) == INSN
939 && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
940 stop_insn = next_insn (PREV_INSN (stop_insn));
941
942 for (insn = start_insn; insn != stop_insn;
943 insn = next_insn_no_annul (insn))
944 {
945 rtx link;
946 rtx real_insn = insn;
947
948 /* If this insn is from the target of a branch, it isn't going to
949 be used in the sequel. If it is used in both cases, this
950 test will not be true. */
951 if (INSN_FROM_TARGET_P (insn))
952 continue;
953
954 /* If this insn is a USE made by update_block, we care about the
955 underlying insn. */
956 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == USE
957 && GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn), 0))) == 'i')
958 real_insn = XEXP (PATTERN (insn), 0);
959
960 if (GET_CODE (real_insn) == CALL_INSN)
961 {
962 /* CALL clobbers all call-used regs that aren't fixed except
963 sp, ap, and fp. Do this before setting the result of the
964 call live. */
965 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
966 if (call_used_regs[i]
967 && i != STACK_POINTER_REGNUM && i != FRAME_POINTER_REGNUM
968 && i != ARG_POINTER_REGNUM
969 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
970 && i != HARD_FRAME_POINTER_REGNUM
971 #endif
972 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
973 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
974 #endif
975 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
976 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
977 #endif
978 )
979 CLEAR_HARD_REG_BIT (current_live_regs, i);
980
981 /* A CALL_INSN sets any global register live, since it may
982 have been modified by the call. */
983 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
984 if (global_regs[i])
985 SET_HARD_REG_BIT (current_live_regs, i);
986 }
987
988 /* Mark anything killed in an insn to be deadened at the next
989 label. Ignore USE insns; the only REG_DEAD notes will be for
990 parameters. But they might be early. A CALL_INSN will usually
991 clobber registers used for parameters. It isn't worth bothering
992 with the unlikely case when it won't. */
993 if ((GET_CODE (real_insn) == INSN
994 && GET_CODE (PATTERN (real_insn)) != USE
995 && GET_CODE (PATTERN (real_insn)) != CLOBBER)
996 || GET_CODE (real_insn) == JUMP_INSN
997 || GET_CODE (real_insn) == CALL_INSN)
998 {
999 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1000 if (REG_NOTE_KIND (link) == REG_DEAD
1001 && GET_CODE (XEXP (link, 0)) == REG
1002 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1003 {
1004 int first_regno = REGNO (XEXP (link, 0));
1005 int last_regno
1006 = (first_regno
1007 + HARD_REGNO_NREGS (first_regno,
1008 GET_MODE (XEXP (link, 0))));
1009
1010 for (i = first_regno; i < last_regno; i++)
1011 SET_HARD_REG_BIT (pending_dead_regs, i);
1012 }
1013
1014 note_stores (PATTERN (real_insn), update_live_status, NULL);
1015
1016 /* If any registers were unused after this insn, kill them.
1017 These notes will always be accurate. */
1018 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1019 if (REG_NOTE_KIND (link) == REG_UNUSED
1020 && GET_CODE (XEXP (link, 0)) == REG
1021 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1022 {
1023 int first_regno = REGNO (XEXP (link, 0));
1024 int last_regno
1025 = (first_regno
1026 + HARD_REGNO_NREGS (first_regno,
1027 GET_MODE (XEXP (link, 0))));
1028
1029 for (i = first_regno; i < last_regno; i++)
1030 CLEAR_HARD_REG_BIT (current_live_regs, i);
1031 }
1032 }
1033
1034 else if (GET_CODE (real_insn) == CODE_LABEL)
1035 {
1036 /* A label clobbers the pending dead registers since neither
1037 reload nor jump will propagate a value across a label. */
1038 AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs);
1039 CLEAR_HARD_REG_SET (pending_dead_regs);
1040 }
1041
1042 /* The beginning of the epilogue corresponds to the end of the
1043 RTL chain when there are no epilogue insns. Certain resources
1044 are implicitly required at that point. */
1045 else if (GET_CODE (real_insn) == NOTE
1046 && NOTE_LINE_NUMBER (real_insn) == NOTE_INSN_EPILOGUE_BEG)
1047 IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
1048 }
1049
1050 COPY_HARD_REG_SET (res->regs, current_live_regs);
1051 if (tinfo != NULL)
1052 {
1053 tinfo->block = b;
1054 tinfo->bb_tick = bb_ticks[b];
1055 }
1056 }
1057 else
1058 /* We didn't find the start of a basic block. Assume everything
1059 in use. This should happen only extremely rarely. */
1060 SET_HARD_REG_SET (res->regs);
1061
1062 CLEAR_RESOURCE (&set);
1063 CLEAR_RESOURCE (&needed);
1064
1065 jump_insn = find_dead_or_set_registers (target, res, &jump_target, 0,
1066 set, needed);
1067
1068 /* If we hit an unconditional branch, we have another way of finding out
1069 what is live: we can see what is live at the branch target and include
1070 anything used but not set before the branch. We add the live
1071 resources found using the test below to those found until now. */
1072
1073 if (jump_insn)
1074 {
1075 struct resources new_resources;
1076 rtx stop_insn = next_active_insn (jump_insn);
1077
1078 mark_target_live_regs (insns, next_active_insn (jump_target),
1079 &new_resources);
1080 CLEAR_RESOURCE (&set);
1081 CLEAR_RESOURCE (&needed);
1082
1083 /* Include JUMP_INSN in the needed registers. */
1084 for (insn = target; insn != stop_insn; insn = next_active_insn (insn))
1085 {
1086 mark_referenced_resources (insn, &needed, 1);
1087
1088 COPY_HARD_REG_SET (scratch, needed.regs);
1089 AND_COMPL_HARD_REG_SET (scratch, set.regs);
1090 IOR_HARD_REG_SET (new_resources.regs, scratch);
1091
1092 mark_set_resources (insn, &set, 0, 1);
1093 }
1094
1095 IOR_HARD_REG_SET (res->regs, new_resources.regs);
1096 }
1097
1098 if (tinfo != NULL)
1099 {
1100 COPY_HARD_REG_SET (tinfo->live_regs, res->regs);
1101 }
1102 }
1103 \f
1104 /* Initialize the resources required by mark_target_live_regs ().
1105 This should be invoked before the first call to mark_target_live_regs. */
1106
1107 void
1108 init_resource_info (epilogue_insn)
1109 rtx epilogue_insn;
1110 {
1111 int i;
1112
1113 /* Indicate what resources are required to be valid at the end of the current
1114 function. The condition code never is and memory always is. If the
1115 frame pointer is needed, it is and so is the stack pointer unless
1116 EXIT_IGNORE_STACK is non-zero. If the frame pointer is not needed, the
1117 stack pointer is. Registers used to return the function value are
1118 needed. Registers holding global variables are needed. */
1119
1120 end_of_function_needs.cc = 0;
1121 end_of_function_needs.memory = 1;
1122 end_of_function_needs.unch_memory = 0;
1123 CLEAR_HARD_REG_SET (end_of_function_needs.regs);
1124
1125 if (frame_pointer_needed)
1126 {
1127 SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM);
1128 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1129 SET_HARD_REG_BIT (end_of_function_needs.regs, HARD_FRAME_POINTER_REGNUM);
1130 #endif
1131 #ifdef EXIT_IGNORE_STACK
1132 if (! EXIT_IGNORE_STACK
1133 || current_function_sp_is_unchanging)
1134 #endif
1135 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1136 }
1137 else
1138 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1139
1140 if (current_function_return_rtx != 0)
1141 mark_referenced_resources (current_function_return_rtx,
1142 &end_of_function_needs, 1);
1143
1144 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1145 if (global_regs[i]
1146 #ifdef EPILOGUE_USES
1147 || EPILOGUE_USES (i)
1148 #endif
1149 )
1150 SET_HARD_REG_BIT (end_of_function_needs.regs, i);
1151
1152 /* The registers required to be live at the end of the function are
1153 represented in the flow information as being dead just prior to
1154 reaching the end of the function. For example, the return of a value
1155 might be represented by a USE of the return register immediately
1156 followed by an unconditional jump to the return label where the
1157 return label is the end of the RTL chain. The end of the RTL chain
1158 is then taken to mean that the return register is live.
1159
1160 This sequence is no longer maintained when epilogue instructions are
1161 added to the RTL chain. To reconstruct the original meaning, the
1162 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1163 point where these registers become live (start_of_epilogue_needs).
1164 If epilogue instructions are present, the registers set by those
1165 instructions won't have been processed by flow. Thus, those
1166 registers are additionally required at the end of the RTL chain
1167 (end_of_function_needs). */
1168
1169 start_of_epilogue_needs = end_of_function_needs;
1170
1171 while ((epilogue_insn = next_nonnote_insn (epilogue_insn)))
1172 mark_set_resources (epilogue_insn, &end_of_function_needs, 0, 1);
1173
1174 /* Allocate and initialize the tables used by mark_target_live_regs. */
1175 target_hash_table = (struct target_info **)
1176 xcalloc (TARGET_HASH_PRIME, sizeof (struct target_info *));
1177 bb_ticks = (int *) xcalloc (n_basic_blocks, sizeof (int));
1178 }
1179 \f
1180 /* Free up the resources allcated to mark_target_live_regs (). This
1181 should be invoked after the last call to mark_target_live_regs (). */
1182
1183 void
1184 free_resource_info ()
1185 {
1186 if (target_hash_table != NULL)
1187 {
1188 free (target_hash_table);
1189 target_hash_table = NULL;
1190 }
1191
1192 if (bb_ticks != NULL)
1193 {
1194 free (bb_ticks);
1195 bb_ticks = NULL;
1196 }
1197 }
1198 \f
1199 /* Clear any hashed information that we have stored for INSN. */
1200
1201 void
1202 clear_hashed_info_for_insn (insn)
1203 rtx insn;
1204 {
1205 struct target_info *tinfo;
1206
1207 if (target_hash_table != NULL)
1208 {
1209 for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME];
1210 tinfo; tinfo = tinfo->next)
1211 if (tinfo->uid == INSN_UID (insn))
1212 break;
1213
1214 if (tinfo)
1215 tinfo->block = -1;
1216 }
1217 }
1218 \f
1219 /* Increment the tick count for the basic block that contains INSN. */
1220
1221 void
1222 incr_ticks_for_insn (insn)
1223 rtx insn;
1224 {
1225 int b = find_basic_block (insn);
1226
1227 if (b != -1)
1228 bb_ticks[b]++;
1229 }
1230 \f
1231 /* Add TRIAL to the set of resources used at the end of the current
1232 function. */
1233 void
1234 mark_end_of_function_resources (trial, include_delayed_effects)
1235 rtx trial;
1236 int include_delayed_effects;
1237 {
1238 mark_referenced_resources (trial, &end_of_function_needs,
1239 include_delayed_effects);
1240 }
1241 \f
1242 /* Try to find a hard register of mode MODE, matching the register class in
1243 CLASS_STR, which is available at the beginning of insn CURRENT_INSN and
1244 remains available until the end of LAST_INSN. LAST_INSN may be NULL_RTX,
1245 in which case the only condition is that the register must be available
1246 before CURRENT_INSN.
1247 Registers that already have bits set in REG_SET will not be considered.
1248
1249 If an appropriate register is available, it will be returned and the
1250 corresponding bit(s) in REG_SET will be set; otherwise, NULL_RTX is
1251 returned. */
1252
1253 rtx
1254 find_free_register (current_insn, last_insn, class_str, mode, reg_set)
1255 rtx current_insn, last_insn;
1256 const char *class_str;
1257 int mode;
1258 HARD_REG_SET *reg_set;
1259 {
1260 int i, j;
1261 struct resources used;
1262 unsigned char clet = class_str[0];
1263 enum reg_class class
1264 = (clet == 'r' ? GENERAL_REGS : REG_CLASS_FROM_LETTER (clet));
1265
1266 mark_target_live_regs (get_insns (), current_insn, &used);
1267 if (last_insn)
1268 while (current_insn != last_insn)
1269 {
1270 /* Exclude anything set in this insn. */
1271 mark_set_resources (PATTERN (current_insn), &used, 0, 1);
1272 current_insn = next_nonnote_insn (current_insn);
1273 }
1274
1275
1276 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1277 {
1278 int regno;
1279 int success;
1280
1281 #ifdef REG_ALLOC_ORDER
1282 regno = reg_alloc_order [i];
1283 #else
1284 regno = i;
1285 #endif
1286
1287 /* Don't allocate fixed registers. */
1288 if (fixed_regs[regno])
1289 continue;
1290 /* Make sure the register is of the right class. */
1291 if (! TEST_HARD_REG_BIT (reg_class_contents[class], regno))
1292 continue;
1293 /* And can support the mode we need. */
1294 if (! HARD_REGNO_MODE_OK (regno, mode))
1295 continue;
1296 /* And that we don't create an extra save/restore. */
1297 if (! call_used_regs[regno] && ! regs_ever_live[regno])
1298 continue;
1299 /* And we don't clobber traceback for noreturn functions. */
1300 if ((regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM)
1301 && (! reload_completed || frame_pointer_needed))
1302 continue;
1303
1304 success = 1;
1305 for (j = HARD_REGNO_NREGS (regno, mode) - 1; j >= 0; j--)
1306 {
1307 if (TEST_HARD_REG_BIT (*reg_set, regno + j)
1308 || TEST_HARD_REG_BIT (used.regs, regno + j))
1309 {
1310 success = 0;
1311 break;
1312 }
1313 }
1314 if (success)
1315 {
1316 for (j = HARD_REGNO_NREGS (regno, mode) - 1; j >= 0; j--)
1317 {
1318 SET_HARD_REG_BIT (*reg_set, regno + j);
1319 }
1320 return gen_rtx_REG (mode, regno);
1321 }
1322 }
1323 return NULL_RTX;
1324 }
1325
1326 /* Return true if REG is dead at CURRENT_INSN. */
1327
1328 int
1329 reg_dead_p (current_insn, reg)
1330 rtx current_insn, reg;
1331 {
1332 struct resources used;
1333 int regno, j;
1334
1335 mark_target_live_regs (get_insns (), current_insn, &used);
1336
1337 regno = REGNO (reg);
1338 for (j = HARD_REGNO_NREGS (regno, GET_MODE (reg)) - 1; j >= 0; j--)
1339 {
1340 if (TEST_HARD_REG_BIT (used.regs, regno + j))
1341 return 0;
1342 }
1343
1344 return 1;
1345 }