1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
24 #include "hard-reg-set.h"
26 #include "basic-block.h"
32 /* This structure is used to record liveness information at the targets or
33 fallthrough insns of branches. We will most likely need the information
34 at targets again, so save them in a hash table rather than recomputing them
39 int uid
; /* INSN_UID of target. */
40 struct target_info
*next
; /* Next info for same hash bucket. */
41 HARD_REG_SET live_regs
; /* Registers live at target. */
42 int block
; /* Basic block number containing target. */
43 int bb_tick
; /* Generation count of basic block info. */
46 #define TARGET_HASH_PRIME 257
48 /* Indicates what resources are required at the beginning of the epilogue. */
49 static struct resources start_of_epilogue_needs
;
51 /* Indicates what resources are required at function end. */
52 static struct resources end_of_function_needs
;
54 /* Define the hash table itself. */
55 static struct target_info
**target_hash_table
= NULL
;
57 /* For each basic block, we maintain a generation number of its basic
58 block info, which is updated each time we move an insn from the
59 target of a jump. This is the generation number indexed by block
64 /* Marks registers possibly live at the current place being scanned by
65 mark_target_live_regs. Used only by next two function. */
67 static HARD_REG_SET current_live_regs
;
69 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
70 Also only used by the next two functions. */
72 static HARD_REG_SET pending_dead_regs
;
74 static void update_live_status
PROTO ((rtx
, rtx
));
75 static int find_basic_block
PROTO ((rtx
));
76 static rtx next_insn_no_annul
PROTO ((rtx
));
77 static rtx find_dead_or_set_registers
PROTO ((rtx
, struct resources
*,
78 rtx
*, int, struct resources
,
81 /* Utility function called from mark_target_live_regs via note_stores.
82 It deadens any CLOBBERed registers and livens any SET registers. */
85 update_live_status (dest
, x
)
89 int first_regno
, last_regno
;
92 if (GET_CODE (dest
) != REG
93 && (GET_CODE (dest
) != SUBREG
|| GET_CODE (SUBREG_REG (dest
)) != REG
))
96 if (GET_CODE (dest
) == SUBREG
)
97 first_regno
= REGNO (SUBREG_REG (dest
)) + SUBREG_WORD (dest
);
99 first_regno
= REGNO (dest
);
101 last_regno
= first_regno
+ HARD_REGNO_NREGS (first_regno
, GET_MODE (dest
));
103 if (GET_CODE (x
) == CLOBBER
)
104 for (i
= first_regno
; i
< last_regno
; i
++)
105 CLEAR_HARD_REG_BIT (current_live_regs
, i
);
107 for (i
= first_regno
; i
< last_regno
; i
++)
109 SET_HARD_REG_BIT (current_live_regs
, i
);
110 CLEAR_HARD_REG_BIT (pending_dead_regs
, i
);
113 /* Find the number of the basic block that starts closest to INSN. Return -1
114 if we couldn't find such a basic block. */
117 find_basic_block (insn
)
122 /* Scan backwards to the previous BARRIER. Then see if we can find a
123 label that starts a basic block. Return the basic block number. */
125 for (insn
= prev_nonnote_insn (insn
);
126 insn
&& GET_CODE (insn
) != BARRIER
;
127 insn
= prev_nonnote_insn (insn
))
130 /* The start of the function is basic block zero. */
134 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
135 anything other than a CODE_LABEL or note, we can't find this code. */
136 for (insn
= next_nonnote_insn (insn
);
137 insn
&& GET_CODE (insn
) == CODE_LABEL
;
138 insn
= next_nonnote_insn (insn
))
140 for (i
= 0; i
< n_basic_blocks
; i
++)
141 if (insn
== BLOCK_HEAD (i
))
148 /* Similar to next_insn, but ignores insns in the delay slots of
149 an annulled branch. */
152 next_insn_no_annul (insn
)
157 /* If INSN is an annulled branch, skip any insns from the target
159 if (INSN_ANNULLED_BRANCH_P (insn
)
160 && NEXT_INSN (PREV_INSN (insn
)) != insn
)
161 while (INSN_FROM_TARGET_P (NEXT_INSN (insn
)))
162 insn
= NEXT_INSN (insn
);
164 insn
= NEXT_INSN (insn
);
165 if (insn
&& GET_CODE (insn
) == INSN
166 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
167 insn
= XVECEXP (PATTERN (insn
), 0, 0);
173 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
174 which resources are references by the insn. If INCLUDE_DELAYED_EFFECTS
175 is TRUE, resources used by the called routine will be included for
179 mark_referenced_resources (x
, res
, include_delayed_effects
)
181 register struct resources
*res
;
182 register int include_delayed_effects
;
184 register enum rtx_code code
= GET_CODE (x
);
186 register char *format_ptr
;
188 /* Handle leaf items for which we set resource flags. Also, special-case
189 CALL, SET and CLOBBER operators. */
201 if (GET_CODE (SUBREG_REG (x
)) != REG
)
202 mark_referenced_resources (SUBREG_REG (x
), res
, 0);
205 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
206 int last_regno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
207 for (i
= regno
; i
< last_regno
; i
++)
208 SET_HARD_REG_BIT (res
->regs
, i
);
213 for (i
= 0; i
< HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
)); i
++)
214 SET_HARD_REG_BIT (res
->regs
, REGNO (x
) + i
);
218 /* If this memory shouldn't change, it really isn't referencing
220 if (RTX_UNCHANGING_P (x
))
221 res
->unch_memory
= 1;
224 res
->volatil
= MEM_VOLATILE_P (x
);
226 /* Mark registers used to access memory. */
227 mark_referenced_resources (XEXP (x
, 0), res
, 0);
234 case UNSPEC_VOLATILE
:
236 /* Traditional asm's are always volatile. */
245 res
->volatil
= MEM_VOLATILE_P (x
);
247 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
248 We can not just fall through here since then we would be confused
249 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
250 traditional asms unlike their normal usage. */
252 for (i
= 0; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
253 mark_referenced_resources (ASM_OPERANDS_INPUT (x
, i
), res
, 0);
257 /* The first operand will be a (MEM (xxx)) but doesn't really reference
258 memory. The second operand may be referenced, though. */
259 mark_referenced_resources (XEXP (XEXP (x
, 0), 0), res
, 0);
260 mark_referenced_resources (XEXP (x
, 1), res
, 0);
264 /* Usually, the first operand of SET is set, not referenced. But
265 registers used to access memory are referenced. SET_DEST is
266 also referenced if it is a ZERO_EXTRACT or SIGN_EXTRACT. */
268 mark_referenced_resources (SET_SRC (x
), res
, 0);
271 if (GET_CODE (x
) == SIGN_EXTRACT
|| GET_CODE (x
) == ZERO_EXTRACT
)
272 mark_referenced_resources (x
, res
, 0);
273 else if (GET_CODE (x
) == SUBREG
)
275 if (GET_CODE (x
) == MEM
)
276 mark_referenced_resources (XEXP (x
, 0), res
, 0);
283 if (include_delayed_effects
)
285 /* A CALL references memory, the frame pointer if it exists, the
286 stack pointer, any global registers and any registers given in
287 USE insns immediately in front of the CALL.
289 However, we may have moved some of the parameter loading insns
290 into the delay slot of this CALL. If so, the USE's for them
291 don't count and should be skipped. */
292 rtx insn
= PREV_INSN (x
);
295 rtx next
= NEXT_INSN (x
);
298 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
299 if (NEXT_INSN (insn
) != x
)
301 next
= NEXT_INSN (NEXT_INSN (insn
));
302 sequence
= PATTERN (NEXT_INSN (insn
));
303 seq_size
= XVECLEN (sequence
, 0);
304 if (GET_CODE (sequence
) != SEQUENCE
)
309 SET_HARD_REG_BIT (res
->regs
, STACK_POINTER_REGNUM
);
310 if (frame_pointer_needed
)
312 SET_HARD_REG_BIT (res
->regs
, FRAME_POINTER_REGNUM
);
313 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
314 SET_HARD_REG_BIT (res
->regs
, HARD_FRAME_POINTER_REGNUM
);
318 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
320 SET_HARD_REG_BIT (res
->regs
, i
);
322 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
323 assume that this call can need any register.
325 This is done to be more conservative about how we handle setjmp.
326 We assume that they both use and set all registers. Using all
327 registers ensures that a register will not be considered dead
328 just because it crosses a setjmp call. A register should be
329 considered dead only if the setjmp call returns non-zero. */
330 if (next
&& GET_CODE (next
) == NOTE
331 && NOTE_LINE_NUMBER (next
) == NOTE_INSN_SETJMP
)
332 SET_HARD_REG_SET (res
->regs
);
337 for (link
= CALL_INSN_FUNCTION_USAGE (x
);
339 link
= XEXP (link
, 1))
340 if (GET_CODE (XEXP (link
, 0)) == USE
)
342 for (i
= 1; i
< seq_size
; i
++)
344 rtx slot_pat
= PATTERN (XVECEXP (sequence
, 0, i
));
345 if (GET_CODE (slot_pat
) == SET
346 && rtx_equal_p (SET_DEST (slot_pat
),
347 SET_DEST (XEXP (link
, 0))))
351 mark_referenced_resources (SET_DEST (XEXP (link
, 0)),
357 /* ... fall through to other INSN processing ... */
362 #ifdef INSN_REFERENCES_ARE_DELAYED
363 if (! include_delayed_effects
364 && INSN_REFERENCES_ARE_DELAYED (x
))
368 /* No special processing, just speed up. */
369 mark_referenced_resources (PATTERN (x
), res
, include_delayed_effects
);
376 /* Process each sub-expression and flag what it needs. */
377 format_ptr
= GET_RTX_FORMAT (code
);
378 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
379 switch (*format_ptr
++)
382 mark_referenced_resources (XEXP (x
, i
), res
, include_delayed_effects
);
386 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
387 mark_referenced_resources (XVECEXP (x
, i
, j
), res
,
388 include_delayed_effects
);
393 /* A subroutine of mark_target_live_regs. Search forward from TARGET
394 looking for registers that are set before they are used. These are dead.
395 Stop after passing a few conditional jumps, and/or a small
396 number of unconditional branches. */
399 find_dead_or_set_registers (target
, res
, jump_target
, jump_count
, set
, needed
)
401 struct resources
*res
;
404 struct resources set
, needed
;
406 HARD_REG_SET scratch
;
411 for (insn
= target
; insn
; insn
= next
)
413 rtx this_jump_insn
= insn
;
415 next
= NEXT_INSN (insn
);
416 switch (GET_CODE (insn
))
419 /* After a label, any pending dead registers that weren't yet
420 used can be made dead. */
421 AND_COMPL_HARD_REG_SET (pending_dead_regs
, needed
.regs
);
422 AND_COMPL_HARD_REG_SET (res
->regs
, pending_dead_regs
);
423 CLEAR_HARD_REG_SET (pending_dead_regs
);
432 if (GET_CODE (PATTERN (insn
)) == USE
)
434 /* If INSN is a USE made by update_block, we care about the
435 underlying insn. Any registers set by the underlying insn
436 are live since the insn is being done somewhere else. */
437 if (GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn
), 0))) == 'i')
438 mark_set_resources (XEXP (PATTERN (insn
), 0), res
, 0, 1);
440 /* All other USE insns are to be ignored. */
443 else if (GET_CODE (PATTERN (insn
)) == CLOBBER
)
445 else if (GET_CODE (PATTERN (insn
)) == SEQUENCE
)
447 /* An unconditional jump can be used to fill the delay slot
448 of a call, so search for a JUMP_INSN in any position. */
449 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
451 this_jump_insn
= XVECEXP (PATTERN (insn
), 0, i
);
452 if (GET_CODE (this_jump_insn
) == JUMP_INSN
)
461 if (GET_CODE (this_jump_insn
) == JUMP_INSN
)
463 if (jump_count
++ < 10)
465 if (simplejump_p (this_jump_insn
)
466 || GET_CODE (PATTERN (this_jump_insn
)) == RETURN
)
468 next
= JUMP_LABEL (this_jump_insn
);
473 *jump_target
= JUMP_LABEL (this_jump_insn
);
476 else if (condjump_p (this_jump_insn
)
477 || condjump_in_parallel_p (this_jump_insn
))
479 struct resources target_set
, target_res
;
480 struct resources fallthrough_res
;
482 /* We can handle conditional branches here by following
483 both paths, and then IOR the results of the two paths
484 together, which will give us registers that are dead
485 on both paths. Since this is expensive, we give it
486 a much higher cost than unconditional branches. The
487 cost was chosen so that we will follow at most 1
488 conditional branch. */
491 if (jump_count
>= 10)
494 mark_referenced_resources (insn
, &needed
, 1);
496 /* For an annulled branch, mark_set_resources ignores slots
497 filled by instructions from the target. This is correct
498 if the branch is not taken. Since we are following both
499 paths from the branch, we must also compute correct info
500 if the branch is taken. We do this by inverting all of
501 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
502 and then inverting the INSN_FROM_TARGET_P bits again. */
504 if (GET_CODE (PATTERN (insn
)) == SEQUENCE
505 && INSN_ANNULLED_BRANCH_P (this_jump_insn
))
507 for (i
= 1; i
< XVECLEN (PATTERN (insn
), 0); i
++)
508 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
))
509 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
));
512 mark_set_resources (insn
, &target_set
, 0, 1);
514 for (i
= 1; i
< XVECLEN (PATTERN (insn
), 0); i
++)
515 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
))
516 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
));
518 mark_set_resources (insn
, &set
, 0, 1);
522 mark_set_resources (insn
, &set
, 0, 1);
527 COPY_HARD_REG_SET (scratch
, target_set
.regs
);
528 AND_COMPL_HARD_REG_SET (scratch
, needed
.regs
);
529 AND_COMPL_HARD_REG_SET (target_res
.regs
, scratch
);
531 fallthrough_res
= *res
;
532 COPY_HARD_REG_SET (scratch
, set
.regs
);
533 AND_COMPL_HARD_REG_SET (scratch
, needed
.regs
);
534 AND_COMPL_HARD_REG_SET (fallthrough_res
.regs
, scratch
);
536 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn
),
537 &target_res
, 0, jump_count
,
539 find_dead_or_set_registers (next
,
540 &fallthrough_res
, 0, jump_count
,
542 IOR_HARD_REG_SET (fallthrough_res
.regs
, target_res
.regs
);
543 AND_HARD_REG_SET (res
->regs
, fallthrough_res
.regs
);
551 /* Don't try this optimization if we expired our jump count
552 above, since that would mean there may be an infinite loop
553 in the function being compiled. */
559 mark_referenced_resources (insn
, &needed
, 1);
560 mark_set_resources (insn
, &set
, 0, 1);
562 COPY_HARD_REG_SET (scratch
, set
.regs
);
563 AND_COMPL_HARD_REG_SET (scratch
, needed
.regs
);
564 AND_COMPL_HARD_REG_SET (res
->regs
, scratch
);
570 /* Given X, a part of an insn, and a pointer to a `struct resource',
571 RES, indicate which resources are modified by the insn. If
572 INCLUDE_DELAYED_EFFECTS is nonzero, also mark resources potentially
573 set by the called routine.
575 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
576 objects are being referenced instead of set.
578 We never mark the insn as modifying the condition code unless it explicitly
579 SETs CC0 even though this is not totally correct. The reason for this is
580 that we require a SET of CC0 to immediately precede the reference to CC0.
581 So if some other insn sets CC0 as a side-effect, we know it cannot affect
582 our computation and thus may be placed in a delay slot. */
585 mark_set_resources (x
, res
, in_dest
, include_delayed_effects
)
587 register struct resources
*res
;
589 int include_delayed_effects
;
591 register enum rtx_code code
;
593 register char *format_ptr
;
611 /* These don't set any resources. */
620 /* Called routine modifies the condition code, memory, any registers
621 that aren't saved across calls, global registers and anything
622 explicitly CLOBBERed immediately after the CALL_INSN. */
624 if (include_delayed_effects
)
626 rtx next
= NEXT_INSN (x
);
627 rtx prev
= PREV_INSN (x
);
630 res
->cc
= res
->memory
= 1;
631 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
632 if (call_used_regs
[i
] || global_regs
[i
])
633 SET_HARD_REG_BIT (res
->regs
, i
);
635 /* If X is part of a delay slot sequence, then NEXT should be
636 the first insn after the sequence. */
637 if (NEXT_INSN (prev
) != x
)
638 next
= NEXT_INSN (NEXT_INSN (prev
));
640 for (link
= CALL_INSN_FUNCTION_USAGE (x
);
641 link
; link
= XEXP (link
, 1))
642 if (GET_CODE (XEXP (link
, 0)) == CLOBBER
)
643 mark_set_resources (SET_DEST (XEXP (link
, 0)), res
, 1, 0);
645 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
646 assume that this call can clobber any register. */
647 if (next
&& GET_CODE (next
) == NOTE
648 && NOTE_LINE_NUMBER (next
) == NOTE_INSN_SETJMP
)
649 SET_HARD_REG_SET (res
->regs
);
652 /* ... and also what its RTL says it modifies, if anything. */
657 /* An insn consisting of just a CLOBBER (or USE) is just for flow
658 and doesn't actually do anything, so we ignore it. */
660 #ifdef INSN_SETS_ARE_DELAYED
661 if (! include_delayed_effects
662 && INSN_SETS_ARE_DELAYED (x
))
667 if (GET_CODE (x
) != USE
&& GET_CODE (x
) != CLOBBER
)
672 /* If the source of a SET is a CALL, this is actually done by
673 the called routine. So only include it if we are to include the
674 effects of the calling routine. */
676 mark_set_resources (SET_DEST (x
), res
,
677 (include_delayed_effects
678 || GET_CODE (SET_SRC (x
)) != CALL
),
681 mark_set_resources (SET_SRC (x
), res
, 0, 0);
685 mark_set_resources (XEXP (x
, 0), res
, 1, 0);
689 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
690 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x
, 0, 0))
691 && INSN_FROM_TARGET_P (XVECEXP (x
, 0, i
))))
692 mark_set_resources (XVECEXP (x
, 0, i
), res
, 0,
693 include_delayed_effects
);
700 mark_set_resources (XEXP (x
, 0), res
, 1, 0);
704 mark_set_resources (XEXP (x
, 0), res
, in_dest
, 0);
705 mark_set_resources (XEXP (x
, 1), res
, 0, 0);
706 mark_set_resources (XEXP (x
, 2), res
, 0, 0);
713 res
->unch_memory
= RTX_UNCHANGING_P (x
);
714 res
->volatil
= MEM_VOLATILE_P (x
);
717 mark_set_resources (XEXP (x
, 0), res
, 0, 0);
723 if (GET_CODE (SUBREG_REG (x
)) != REG
)
724 mark_set_resources (SUBREG_REG (x
), res
,
725 in_dest
, include_delayed_effects
);
728 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
729 int last_regno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
730 for (i
= regno
; i
< last_regno
; i
++)
731 SET_HARD_REG_BIT (res
->regs
, i
);
738 for (i
= 0; i
< HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
)); i
++)
739 SET_HARD_REG_BIT (res
->regs
, REGNO (x
) + i
);
742 case UNSPEC_VOLATILE
:
744 /* Traditional asm's are always volatile. */
753 res
->volatil
= MEM_VOLATILE_P (x
);
755 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
756 We can not just fall through here since then we would be confused
757 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
758 traditional asms unlike their normal usage. */
760 for (i
= 0; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
761 mark_set_resources (ASM_OPERANDS_INPUT (x
, i
), res
, in_dest
, 0);
768 /* Process each sub-expression and flag what it needs. */
769 format_ptr
= GET_RTX_FORMAT (code
);
770 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
771 switch (*format_ptr
++)
774 mark_set_resources (XEXP (x
, i
), res
, in_dest
, include_delayed_effects
);
778 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
779 mark_set_resources (XVECEXP (x
, i
, j
), res
, in_dest
,
780 include_delayed_effects
);
785 /* Set the resources that are live at TARGET.
787 If TARGET is zero, we refer to the end of the current function and can
788 return our precomputed value.
790 Otherwise, we try to find out what is live by consulting the basic block
791 information. This is tricky, because we must consider the actions of
792 reload and jump optimization, which occur after the basic block information
795 Accordingly, we proceed as follows::
797 We find the previous BARRIER and look at all immediately following labels
798 (with no intervening active insns) to see if any of them start a basic
799 block. If we hit the start of the function first, we use block 0.
801 Once we have found a basic block and a corresponding first insns, we can
802 accurately compute the live status from basic_block_live_regs and
803 reg_renumber. (By starting at a label following a BARRIER, we are immune
804 to actions taken by reload and jump.) Then we scan all insns between
805 that point and our target. For each CLOBBER (or for call-clobbered regs
806 when we pass a CALL_INSN), mark the appropriate registers are dead. For
807 a SET, mark them as live.
809 We have to be careful when using REG_DEAD notes because they are not
810 updated by such things as find_equiv_reg. So keep track of registers
811 marked as dead that haven't been assigned to, and mark them dead at the
812 next CODE_LABEL since reload and jump won't propagate values across labels.
814 If we cannot find the start of a basic block (should be a very rare
815 case, if it can happen at all), mark everything as potentially live.
817 Next, scan forward from TARGET looking for things set or clobbered
818 before they are used. These are not live.
820 Because we can be called many times on the same target, save our results
821 in a hash table indexed by INSN_UID. This is only done if the function
822 init_resource_info () was invoked before we are called. */
825 mark_target_live_regs (insns
, target
, res
)
828 struct resources
*res
;
832 struct target_info
*tinfo
= NULL
;
836 HARD_REG_SET scratch
;
837 struct resources set
, needed
;
839 /* Handle end of function. */
842 *res
= end_of_function_needs
;
846 /* We have to assume memory is needed, but the CC isn't. */
848 res
->volatil
= res
->unch_memory
= 0;
851 /* See if we have computed this value already. */
852 if (target_hash_table
!= NULL
)
854 for (tinfo
= target_hash_table
[INSN_UID (target
) % TARGET_HASH_PRIME
];
855 tinfo
; tinfo
= tinfo
->next
)
856 if (tinfo
->uid
== INSN_UID (target
))
859 /* Start by getting the basic block number. If we have saved
860 information, we can get it from there unless the insn at the
861 start of the basic block has been deleted. */
862 if (tinfo
&& tinfo
->block
!= -1
863 && ! INSN_DELETED_P (BLOCK_HEAD (tinfo
->block
)))
868 b
= find_basic_block (target
);
870 if (target_hash_table
!= NULL
)
874 /* If the information is up-to-date, use it. Otherwise, we will
876 if (b
== tinfo
->block
&& b
!= -1 && tinfo
->bb_tick
== bb_ticks
[b
])
878 COPY_HARD_REG_SET (res
->regs
, tinfo
->live_regs
);
884 /* Allocate a place to put our results and chain it into the
886 tinfo
= (struct target_info
*) oballoc (sizeof (struct target_info
));
887 tinfo
->uid
= INSN_UID (target
);
889 tinfo
->next
= target_hash_table
[INSN_UID (target
) % TARGET_HASH_PRIME
];
890 target_hash_table
[INSN_UID (target
) % TARGET_HASH_PRIME
] = tinfo
;
894 CLEAR_HARD_REG_SET (pending_dead_regs
);
896 /* If we found a basic block, get the live registers from it and update
897 them with anything set or killed between its start and the insn before
898 TARGET. Otherwise, we must assume everything is live. */
901 regset regs_live
= BASIC_BLOCK (b
)->global_live_at_start
;
904 rtx start_insn
, stop_insn
;
906 /* Compute hard regs live at start of block -- this is the real hard regs
907 marked live, plus live pseudo regs that have been renumbered to
910 REG_SET_TO_HARD_REG_SET (current_live_regs
, regs_live
);
912 EXECUTE_IF_SET_IN_REG_SET
913 (regs_live
, FIRST_PSEUDO_REGISTER
, i
,
915 if ((regno
= reg_renumber
[i
]) >= 0)
917 j
< regno
+ HARD_REGNO_NREGS (regno
,
918 PSEUDO_REGNO_MODE (i
));
920 SET_HARD_REG_BIT (current_live_regs
, j
);
923 /* Get starting and ending insn, handling the case where each might
925 start_insn
= (b
== 0 ? insns
: BLOCK_HEAD (b
));
928 if (GET_CODE (start_insn
) == INSN
929 && GET_CODE (PATTERN (start_insn
)) == SEQUENCE
)
930 start_insn
= XVECEXP (PATTERN (start_insn
), 0, 0);
932 if (GET_CODE (stop_insn
) == INSN
933 && GET_CODE (PATTERN (stop_insn
)) == SEQUENCE
)
934 stop_insn
= next_insn (PREV_INSN (stop_insn
));
936 for (insn
= start_insn
; insn
!= stop_insn
;
937 insn
= next_insn_no_annul (insn
))
940 rtx real_insn
= insn
;
942 /* If this insn is from the target of a branch, it isn't going to
943 be used in the sequel. If it is used in both cases, this
944 test will not be true. */
945 if (INSN_FROM_TARGET_P (insn
))
948 /* If this insn is a USE made by update_block, we care about the
950 if (GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == USE
951 && GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn
), 0))) == 'i')
952 real_insn
= XEXP (PATTERN (insn
), 0);
954 if (GET_CODE (real_insn
) == CALL_INSN
)
956 /* CALL clobbers all call-used regs that aren't fixed except
957 sp, ap, and fp. Do this before setting the result of the
959 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
960 if (call_used_regs
[i
]
961 && i
!= STACK_POINTER_REGNUM
&& i
!= FRAME_POINTER_REGNUM
962 && i
!= ARG_POINTER_REGNUM
963 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
964 && i
!= HARD_FRAME_POINTER_REGNUM
966 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
967 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
969 #ifdef PIC_OFFSET_TABLE_REGNUM
970 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
973 CLEAR_HARD_REG_BIT (current_live_regs
, i
);
975 /* A CALL_INSN sets any global register live, since it may
976 have been modified by the call. */
977 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
979 SET_HARD_REG_BIT (current_live_regs
, i
);
982 /* Mark anything killed in an insn to be deadened at the next
983 label. Ignore USE insns; the only REG_DEAD notes will be for
984 parameters. But they might be early. A CALL_INSN will usually
985 clobber registers used for parameters. It isn't worth bothering
986 with the unlikely case when it won't. */
987 if ((GET_CODE (real_insn
) == INSN
988 && GET_CODE (PATTERN (real_insn
)) != USE
989 && GET_CODE (PATTERN (real_insn
)) != CLOBBER
)
990 || GET_CODE (real_insn
) == JUMP_INSN
991 || GET_CODE (real_insn
) == CALL_INSN
)
993 for (link
= REG_NOTES (real_insn
); link
; link
= XEXP (link
, 1))
994 if (REG_NOTE_KIND (link
) == REG_DEAD
995 && GET_CODE (XEXP (link
, 0)) == REG
996 && REGNO (XEXP (link
, 0)) < FIRST_PSEUDO_REGISTER
)
998 int first_regno
= REGNO (XEXP (link
, 0));
1001 + HARD_REGNO_NREGS (first_regno
,
1002 GET_MODE (XEXP (link
, 0))));
1004 for (i
= first_regno
; i
< last_regno
; i
++)
1005 SET_HARD_REG_BIT (pending_dead_regs
, i
);
1008 note_stores (PATTERN (real_insn
), update_live_status
);
1010 /* If any registers were unused after this insn, kill them.
1011 These notes will always be accurate. */
1012 for (link
= REG_NOTES (real_insn
); link
; link
= XEXP (link
, 1))
1013 if (REG_NOTE_KIND (link
) == REG_UNUSED
1014 && GET_CODE (XEXP (link
, 0)) == REG
1015 && REGNO (XEXP (link
, 0)) < FIRST_PSEUDO_REGISTER
)
1017 int first_regno
= REGNO (XEXP (link
, 0));
1020 + HARD_REGNO_NREGS (first_regno
,
1021 GET_MODE (XEXP (link
, 0))));
1023 for (i
= first_regno
; i
< last_regno
; i
++)
1024 CLEAR_HARD_REG_BIT (current_live_regs
, i
);
1028 else if (GET_CODE (real_insn
) == CODE_LABEL
)
1030 /* A label clobbers the pending dead registers since neither
1031 reload nor jump will propagate a value across a label. */
1032 AND_COMPL_HARD_REG_SET (current_live_regs
, pending_dead_regs
);
1033 CLEAR_HARD_REG_SET (pending_dead_regs
);
1036 /* The beginning of the epilogue corresponds to the end of the
1037 RTL chain when there are no epilogue insns. Certain resources
1038 are implicitly required at that point. */
1039 else if (GET_CODE (real_insn
) == NOTE
1040 && NOTE_LINE_NUMBER (real_insn
) == NOTE_INSN_EPILOGUE_BEG
)
1041 IOR_HARD_REG_SET (current_live_regs
, start_of_epilogue_needs
.regs
);
1044 COPY_HARD_REG_SET (res
->regs
, current_live_regs
);
1048 tinfo
->bb_tick
= bb_ticks
[b
];
1052 /* We didn't find the start of a basic block. Assume everything
1053 in use. This should happen only extremely rarely. */
1054 SET_HARD_REG_SET (res
->regs
);
1056 CLEAR_RESOURCE (&set
);
1057 CLEAR_RESOURCE (&needed
);
1059 jump_insn
= find_dead_or_set_registers (target
, res
, &jump_target
, 0,
1062 /* If we hit an unconditional branch, we have another way of finding out
1063 what is live: we can see what is live at the branch target and include
1064 anything used but not set before the branch. The only things that are
1065 live are those that are live using the above test and the test below. */
1069 struct resources new_resources
;
1070 rtx stop_insn
= next_active_insn (jump_insn
);
1072 mark_target_live_regs (insns
, next_active_insn (jump_target
),
1074 CLEAR_RESOURCE (&set
);
1075 CLEAR_RESOURCE (&needed
);
1077 /* Include JUMP_INSN in the needed registers. */
1078 for (insn
= target
; insn
!= stop_insn
; insn
= next_active_insn (insn
))
1080 mark_referenced_resources (insn
, &needed
, 1);
1082 COPY_HARD_REG_SET (scratch
, needed
.regs
);
1083 AND_COMPL_HARD_REG_SET (scratch
, set
.regs
);
1084 IOR_HARD_REG_SET (new_resources
.regs
, scratch
);
1086 mark_set_resources (insn
, &set
, 0, 1);
1089 AND_HARD_REG_SET (res
->regs
, new_resources
.regs
);
1094 COPY_HARD_REG_SET (tinfo
->live_regs
, res
->regs
);
1098 /* Initialize the resources required by mark_target_live_regs ().
1099 This should be invoked before the first call to mark_target_live_regs. */
1102 init_resource_info (epilogue_insn
)
1107 /* Indicate what resources are required to be valid at the end of the current
1108 function. The condition code never is and memory always is. If the
1109 frame pointer is needed, it is and so is the stack pointer unless
1110 EXIT_IGNORE_STACK is non-zero. If the frame pointer is not needed, the
1111 stack pointer is. Registers used to return the function value are
1112 needed. Registers holding global variables are needed. */
1114 end_of_function_needs
.cc
= 0;
1115 end_of_function_needs
.memory
= 1;
1116 end_of_function_needs
.unch_memory
= 0;
1117 CLEAR_HARD_REG_SET (end_of_function_needs
.regs
);
1119 if (frame_pointer_needed
)
1121 SET_HARD_REG_BIT (end_of_function_needs
.regs
, FRAME_POINTER_REGNUM
);
1122 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1123 SET_HARD_REG_BIT (end_of_function_needs
.regs
, HARD_FRAME_POINTER_REGNUM
);
1125 #ifdef EXIT_IGNORE_STACK
1126 if (! EXIT_IGNORE_STACK
1127 || current_function_sp_is_unchanging
)
1129 SET_HARD_REG_BIT (end_of_function_needs
.regs
, STACK_POINTER_REGNUM
);
1132 SET_HARD_REG_BIT (end_of_function_needs
.regs
, STACK_POINTER_REGNUM
);
1134 if (current_function_return_rtx
!= 0)
1135 mark_referenced_resources (current_function_return_rtx
,
1136 &end_of_function_needs
, 1);
1138 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1140 #ifdef EPILOGUE_USES
1141 || EPILOGUE_USES (i
)
1144 SET_HARD_REG_BIT (end_of_function_needs
.regs
, i
);
1146 /* The registers required to be live at the end of the function are
1147 represented in the flow information as being dead just prior to
1148 reaching the end of the function. For example, the return of a value
1149 might be represented by a USE of the return register immediately
1150 followed by an unconditional jump to the return label where the
1151 return label is the end of the RTL chain. The end of the RTL chain
1152 is then taken to mean that the return register is live.
1154 This sequence is no longer maintained when epilogue instructions are
1155 added to the RTL chain. To reconstruct the original meaning, the
1156 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1157 point where these registers become live (start_of_epilogue_needs).
1158 If epilogue instructions are present, the registers set by those
1159 instructions won't have been processed by flow. Thus, those
1160 registers are additionally required at the end of the RTL chain
1161 (end_of_function_needs). */
1163 start_of_epilogue_needs
= end_of_function_needs
;
1165 while ((epilogue_insn
= next_nonnote_insn (epilogue_insn
)))
1166 mark_set_resources (epilogue_insn
, &end_of_function_needs
, 0, 1);
1168 /* Allocate and initialize the tables used by mark_target_live_regs. */
1170 = (struct target_info
**) xmalloc ((TARGET_HASH_PRIME
1171 * sizeof (struct target_info
*)));
1172 bzero ((char *) target_hash_table
,
1173 TARGET_HASH_PRIME
* sizeof (struct target_info
*));
1175 bb_ticks
= (int *) xmalloc (n_basic_blocks
* sizeof (int));
1176 bzero ((char *) bb_ticks
, n_basic_blocks
* sizeof (int));
1179 /* Free up the resources allcated to mark_target_live_regs (). This
1180 should be invoked after the last call to mark_target_live_regs (). */
1183 free_resource_info ()
1185 if (target_hash_table
!= NULL
)
1187 free (target_hash_table
);
1188 target_hash_table
= NULL
;
1191 if (bb_ticks
!= NULL
)
1198 /* Clear any hashed information that we have stored for INSN. */
1201 clear_hashed_info_for_insn (insn
)
1204 struct target_info
*tinfo
;
1206 if (target_hash_table
!= NULL
)
1208 for (tinfo
= target_hash_table
[INSN_UID (insn
) % TARGET_HASH_PRIME
];
1209 tinfo
; tinfo
= tinfo
->next
)
1210 if (tinfo
->uid
== INSN_UID (insn
))
1218 /* Increment the tick count for the basic block that contains INSN. */
1221 incr_ticks_for_insn (insn
)
1224 int b
= find_basic_block (insn
);
1230 /* Add TRIAL to the set of resources used at the end of the current
1233 mark_end_of_function_resources (trial
, include_delayed_effects
)
1235 int include_delayed_effects
;
1237 mark_referenced_resources (trial
, &end_of_function_needs
,
1238 include_delayed_effects
);
1241 /* Try to find an available hard register of mode MODE at
1242 CURRENT_INSN, matching the register class in CLASS_STR. Registers
1243 that already have bits set in REG_SET will not be considered.
1245 If an appropriate register is available, it will be returned and the
1246 corresponding bit(s) in REG_SET will be set; otherwise, NULL_RTX is
1250 find_free_register (current_insn
, class_str
, mode
, reg_set
)
1254 HARD_REG_SET
*reg_set
;
1257 struct resources used
;
1258 unsigned char clet
= class_str
[0];
1259 enum reg_class
class
1260 = (clet
== 'r' ? GENERAL_REGS
: REG_CLASS_FROM_LETTER (clet
));
1262 mark_target_live_regs (get_insns (), current_insn
, &used
);
1264 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1268 if (! TEST_HARD_REG_BIT (reg_class_contents
[class], i
))
1270 for (j
= HARD_REGNO_NREGS (i
, mode
) - 1; j
>= 0; j
--)
1272 if (TEST_HARD_REG_BIT (*reg_set
, i
+ j
)
1273 || TEST_HARD_REG_BIT (used
.regs
, i
+ j
))
1281 for (j
= HARD_REGNO_NREGS (i
, mode
) - 1; j
>= 0; j
--)
1283 SET_HARD_REG_BIT (*reg_set
, i
+ j
);
1285 return gen_rtx_REG (mode
, i
);