1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
24 #include "hard-reg-set.h"
26 #include "basic-block.h"
33 /* This structure is used to record liveness information at the targets or
34 fallthrough insns of branches. We will most likely need the information
35 at targets again, so save them in a hash table rather than recomputing them
40 int uid
; /* INSN_UID of target. */
41 struct target_info
*next
; /* Next info for same hash bucket. */
42 HARD_REG_SET live_regs
; /* Registers live at target. */
43 int block
; /* Basic block number containing target. */
44 int bb_tick
; /* Generation count of basic block info. */
47 #define TARGET_HASH_PRIME 257
49 /* Indicates what resources are required at the beginning of the epilogue. */
50 static struct resources start_of_epilogue_needs
;
52 /* Indicates what resources are required at function end. */
53 static struct resources end_of_function_needs
;
55 /* Define the hash table itself. */
56 static struct target_info
**target_hash_table
= NULL
;
58 /* For each basic block, we maintain a generation number of its basic
59 block info, which is updated each time we move an insn from the
60 target of a jump. This is the generation number indexed by block
65 /* Marks registers possibly live at the current place being scanned by
66 mark_target_live_regs. Used only by next two function. */
68 static HARD_REG_SET current_live_regs
;
70 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
71 Also only used by the next two functions. */
73 static HARD_REG_SET pending_dead_regs
;
75 static void update_live_status
PROTO ((rtx
, rtx
));
76 static int find_basic_block
PROTO ((rtx
));
77 static rtx next_insn_no_annul
PROTO ((rtx
));
78 static rtx find_dead_or_set_registers
PROTO ((rtx
, struct resources
*,
79 rtx
*, int, struct resources
,
82 /* Utility function called from mark_target_live_regs via note_stores.
83 It deadens any CLOBBERed registers and livens any SET registers. */
86 update_live_status (dest
, x
)
90 int first_regno
, last_regno
;
93 if (GET_CODE (dest
) != REG
94 && (GET_CODE (dest
) != SUBREG
|| GET_CODE (SUBREG_REG (dest
)) != REG
))
97 if (GET_CODE (dest
) == SUBREG
)
98 first_regno
= REGNO (SUBREG_REG (dest
)) + SUBREG_WORD (dest
);
100 first_regno
= REGNO (dest
);
102 last_regno
= first_regno
+ HARD_REGNO_NREGS (first_regno
, GET_MODE (dest
));
104 if (GET_CODE (x
) == CLOBBER
)
105 for (i
= first_regno
; i
< last_regno
; i
++)
106 CLEAR_HARD_REG_BIT (current_live_regs
, i
);
108 for (i
= first_regno
; i
< last_regno
; i
++)
110 SET_HARD_REG_BIT (current_live_regs
, i
);
111 CLEAR_HARD_REG_BIT (pending_dead_regs
, i
);
114 /* Find the number of the basic block that starts closest to INSN. Return -1
115 if we couldn't find such a basic block. */
118 find_basic_block (insn
)
123 /* Scan backwards to the previous BARRIER. Then see if we can find a
124 label that starts a basic block. Return the basic block number. */
126 for (insn
= prev_nonnote_insn (insn
);
127 insn
&& GET_CODE (insn
) != BARRIER
;
128 insn
= prev_nonnote_insn (insn
))
131 /* The start of the function is basic block zero. */
135 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
136 anything other than a CODE_LABEL or note, we can't find this code. */
137 for (insn
= next_nonnote_insn (insn
);
138 insn
&& GET_CODE (insn
) == CODE_LABEL
;
139 insn
= next_nonnote_insn (insn
))
141 for (i
= 0; i
< n_basic_blocks
; i
++)
142 if (insn
== BLOCK_HEAD (i
))
149 /* Similar to next_insn, but ignores insns in the delay slots of
150 an annulled branch. */
153 next_insn_no_annul (insn
)
158 /* If INSN is an annulled branch, skip any insns from the target
160 if (INSN_ANNULLED_BRANCH_P (insn
)
161 && NEXT_INSN (PREV_INSN (insn
)) != insn
)
162 while (INSN_FROM_TARGET_P (NEXT_INSN (insn
)))
163 insn
= NEXT_INSN (insn
);
165 insn
= NEXT_INSN (insn
);
166 if (insn
&& GET_CODE (insn
) == INSN
167 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
168 insn
= XVECEXP (PATTERN (insn
), 0, 0);
174 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
175 which resources are references by the insn. If INCLUDE_DELAYED_EFFECTS
176 is TRUE, resources used by the called routine will be included for
180 mark_referenced_resources (x
, res
, include_delayed_effects
)
182 register struct resources
*res
;
183 register int include_delayed_effects
;
185 register enum rtx_code code
= GET_CODE (x
);
187 register const char *format_ptr
;
189 /* Handle leaf items for which we set resource flags. Also, special-case
190 CALL, SET and CLOBBER operators. */
202 if (GET_CODE (SUBREG_REG (x
)) != REG
)
203 mark_referenced_resources (SUBREG_REG (x
), res
, 0);
206 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
207 int last_regno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
208 for (i
= regno
; i
< last_regno
; i
++)
209 SET_HARD_REG_BIT (res
->regs
, i
);
214 for (i
= 0; i
< HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
)); i
++)
215 SET_HARD_REG_BIT (res
->regs
, REGNO (x
) + i
);
219 /* If this memory shouldn't change, it really isn't referencing
221 if (RTX_UNCHANGING_P (x
))
222 res
->unch_memory
= 1;
225 res
->volatil
|= MEM_VOLATILE_P (x
);
227 /* Mark registers used to access memory. */
228 mark_referenced_resources (XEXP (x
, 0), res
, 0);
235 case UNSPEC_VOLATILE
:
237 /* Traditional asm's are always volatile. */
246 res
->volatil
|= MEM_VOLATILE_P (x
);
248 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
249 We can not just fall through here since then we would be confused
250 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
251 traditional asms unlike their normal usage. */
253 for (i
= 0; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
254 mark_referenced_resources (ASM_OPERANDS_INPUT (x
, i
), res
, 0);
258 /* The first operand will be a (MEM (xxx)) but doesn't really reference
259 memory. The second operand may be referenced, though. */
260 mark_referenced_resources (XEXP (XEXP (x
, 0), 0), res
, 0);
261 mark_referenced_resources (XEXP (x
, 1), res
, 0);
265 /* Usually, the first operand of SET is set, not referenced. But
266 registers used to access memory are referenced. SET_DEST is
267 also referenced if it is a ZERO_EXTRACT or SIGN_EXTRACT. */
269 mark_referenced_resources (SET_SRC (x
), res
, 0);
272 if (GET_CODE (x
) == SIGN_EXTRACT
|| GET_CODE (x
) == ZERO_EXTRACT
)
273 mark_referenced_resources (x
, res
, 0);
274 else if (GET_CODE (x
) == SUBREG
)
276 if (GET_CODE (x
) == MEM
)
277 mark_referenced_resources (XEXP (x
, 0), res
, 0);
284 if (include_delayed_effects
)
286 /* A CALL references memory, the frame pointer if it exists, the
287 stack pointer, any global registers and any registers given in
288 USE insns immediately in front of the CALL.
290 However, we may have moved some of the parameter loading insns
291 into the delay slot of this CALL. If so, the USE's for them
292 don't count and should be skipped. */
293 rtx insn
= PREV_INSN (x
);
296 rtx next
= NEXT_INSN (x
);
299 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
300 if (NEXT_INSN (insn
) != x
)
302 next
= NEXT_INSN (NEXT_INSN (insn
));
303 sequence
= PATTERN (NEXT_INSN (insn
));
304 seq_size
= XVECLEN (sequence
, 0);
305 if (GET_CODE (sequence
) != SEQUENCE
)
310 SET_HARD_REG_BIT (res
->regs
, STACK_POINTER_REGNUM
);
311 if (frame_pointer_needed
)
313 SET_HARD_REG_BIT (res
->regs
, FRAME_POINTER_REGNUM
);
314 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
315 SET_HARD_REG_BIT (res
->regs
, HARD_FRAME_POINTER_REGNUM
);
319 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
321 SET_HARD_REG_BIT (res
->regs
, i
);
323 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
324 assume that this call can need any register.
326 This is done to be more conservative about how we handle setjmp.
327 We assume that they both use and set all registers. Using all
328 registers ensures that a register will not be considered dead
329 just because it crosses a setjmp call. A register should be
330 considered dead only if the setjmp call returns non-zero. */
331 if (next
&& GET_CODE (next
) == NOTE
332 && NOTE_LINE_NUMBER (next
) == NOTE_INSN_SETJMP
)
333 SET_HARD_REG_SET (res
->regs
);
338 for (link
= CALL_INSN_FUNCTION_USAGE (x
);
340 link
= XEXP (link
, 1))
341 if (GET_CODE (XEXP (link
, 0)) == USE
)
343 for (i
= 1; i
< seq_size
; i
++)
345 rtx slot_pat
= PATTERN (XVECEXP (sequence
, 0, i
));
346 if (GET_CODE (slot_pat
) == SET
347 && rtx_equal_p (SET_DEST (slot_pat
),
348 SET_DEST (XEXP (link
, 0))))
352 mark_referenced_resources (SET_DEST (XEXP (link
, 0)),
358 /* ... fall through to other INSN processing ... */
363 #ifdef INSN_REFERENCES_ARE_DELAYED
364 if (! include_delayed_effects
365 && INSN_REFERENCES_ARE_DELAYED (x
))
369 /* No special processing, just speed up. */
370 mark_referenced_resources (PATTERN (x
), res
, include_delayed_effects
);
377 /* Process each sub-expression and flag what it needs. */
378 format_ptr
= GET_RTX_FORMAT (code
);
379 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
380 switch (*format_ptr
++)
383 mark_referenced_resources (XEXP (x
, i
), res
, include_delayed_effects
);
387 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
388 mark_referenced_resources (XVECEXP (x
, i
, j
), res
,
389 include_delayed_effects
);
394 /* A subroutine of mark_target_live_regs. Search forward from TARGET
395 looking for registers that are set before they are used. These are dead.
396 Stop after passing a few conditional jumps, and/or a small
397 number of unconditional branches. */
400 find_dead_or_set_registers (target
, res
, jump_target
, jump_count
, set
, needed
)
402 struct resources
*res
;
405 struct resources set
, needed
;
407 HARD_REG_SET scratch
;
412 for (insn
= target
; insn
; insn
= next
)
414 rtx this_jump_insn
= insn
;
416 next
= NEXT_INSN (insn
);
417 switch (GET_CODE (insn
))
420 /* After a label, any pending dead registers that weren't yet
421 used can be made dead. */
422 AND_COMPL_HARD_REG_SET (pending_dead_regs
, needed
.regs
);
423 AND_COMPL_HARD_REG_SET (res
->regs
, pending_dead_regs
);
424 CLEAR_HARD_REG_SET (pending_dead_regs
);
433 if (GET_CODE (PATTERN (insn
)) == USE
)
435 /* If INSN is a USE made by update_block, we care about the
436 underlying insn. Any registers set by the underlying insn
437 are live since the insn is being done somewhere else. */
438 if (GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn
), 0))) == 'i')
439 mark_set_resources (XEXP (PATTERN (insn
), 0), res
, 0, 1);
441 /* All other USE insns are to be ignored. */
444 else if (GET_CODE (PATTERN (insn
)) == CLOBBER
)
446 else if (GET_CODE (PATTERN (insn
)) == SEQUENCE
)
448 /* An unconditional jump can be used to fill the delay slot
449 of a call, so search for a JUMP_INSN in any position. */
450 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
452 this_jump_insn
= XVECEXP (PATTERN (insn
), 0, i
);
453 if (GET_CODE (this_jump_insn
) == JUMP_INSN
)
462 if (GET_CODE (this_jump_insn
) == JUMP_INSN
)
464 if (jump_count
++ < 10)
466 if (simplejump_p (this_jump_insn
)
467 || GET_CODE (PATTERN (this_jump_insn
)) == RETURN
)
469 next
= JUMP_LABEL (this_jump_insn
);
474 *jump_target
= JUMP_LABEL (this_jump_insn
);
477 else if (condjump_p (this_jump_insn
)
478 || condjump_in_parallel_p (this_jump_insn
))
480 struct resources target_set
, target_res
;
481 struct resources fallthrough_res
;
483 /* We can handle conditional branches here by following
484 both paths, and then IOR the results of the two paths
485 together, which will give us registers that are dead
486 on both paths. Since this is expensive, we give it
487 a much higher cost than unconditional branches. The
488 cost was chosen so that we will follow at most 1
489 conditional branch. */
492 if (jump_count
>= 10)
495 mark_referenced_resources (insn
, &needed
, 1);
497 /* For an annulled branch, mark_set_resources ignores slots
498 filled by instructions from the target. This is correct
499 if the branch is not taken. Since we are following both
500 paths from the branch, we must also compute correct info
501 if the branch is taken. We do this by inverting all of
502 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
503 and then inverting the INSN_FROM_TARGET_P bits again. */
505 if (GET_CODE (PATTERN (insn
)) == SEQUENCE
506 && INSN_ANNULLED_BRANCH_P (this_jump_insn
))
508 for (i
= 1; i
< XVECLEN (PATTERN (insn
), 0); i
++)
509 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
))
510 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
));
513 mark_set_resources (insn
, &target_set
, 0, 1);
515 for (i
= 1; i
< XVECLEN (PATTERN (insn
), 0); i
++)
516 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
))
517 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
));
519 mark_set_resources (insn
, &set
, 0, 1);
523 mark_set_resources (insn
, &set
, 0, 1);
528 COPY_HARD_REG_SET (scratch
, target_set
.regs
);
529 AND_COMPL_HARD_REG_SET (scratch
, needed
.regs
);
530 AND_COMPL_HARD_REG_SET (target_res
.regs
, scratch
);
532 fallthrough_res
= *res
;
533 COPY_HARD_REG_SET (scratch
, set
.regs
);
534 AND_COMPL_HARD_REG_SET (scratch
, needed
.regs
);
535 AND_COMPL_HARD_REG_SET (fallthrough_res
.regs
, scratch
);
537 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn
),
538 &target_res
, 0, jump_count
,
540 find_dead_or_set_registers (next
,
541 &fallthrough_res
, 0, jump_count
,
543 IOR_HARD_REG_SET (fallthrough_res
.regs
, target_res
.regs
);
544 AND_HARD_REG_SET (res
->regs
, fallthrough_res
.regs
);
552 /* Don't try this optimization if we expired our jump count
553 above, since that would mean there may be an infinite loop
554 in the function being compiled. */
560 mark_referenced_resources (insn
, &needed
, 1);
561 mark_set_resources (insn
, &set
, 0, 1);
563 COPY_HARD_REG_SET (scratch
, set
.regs
);
564 AND_COMPL_HARD_REG_SET (scratch
, needed
.regs
);
565 AND_COMPL_HARD_REG_SET (res
->regs
, scratch
);
571 /* Given X, a part of an insn, and a pointer to a `struct resource',
572 RES, indicate which resources are modified by the insn. If
573 INCLUDE_DELAYED_EFFECTS is nonzero, also mark resources potentially
574 set by the called routine.
576 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
577 objects are being referenced instead of set.
579 We never mark the insn as modifying the condition code unless it explicitly
580 SETs CC0 even though this is not totally correct. The reason for this is
581 that we require a SET of CC0 to immediately precede the reference to CC0.
582 So if some other insn sets CC0 as a side-effect, we know it cannot affect
583 our computation and thus may be placed in a delay slot. */
586 mark_set_resources (x
, res
, in_dest
, include_delayed_effects
)
588 register struct resources
*res
;
590 int include_delayed_effects
;
592 register enum rtx_code code
;
594 register const char *format_ptr
;
612 /* These don't set any resources. */
621 /* Called routine modifies the condition code, memory, any registers
622 that aren't saved across calls, global registers and anything
623 explicitly CLOBBERed immediately after the CALL_INSN. */
625 if (include_delayed_effects
)
627 rtx next
= NEXT_INSN (x
);
628 rtx prev
= PREV_INSN (x
);
631 res
->cc
= res
->memory
= 1;
632 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
633 if (call_used_regs
[i
] || global_regs
[i
])
634 SET_HARD_REG_BIT (res
->regs
, i
);
636 /* If X is part of a delay slot sequence, then NEXT should be
637 the first insn after the sequence. */
638 if (NEXT_INSN (prev
) != x
)
639 next
= NEXT_INSN (NEXT_INSN (prev
));
641 for (link
= CALL_INSN_FUNCTION_USAGE (x
);
642 link
; link
= XEXP (link
, 1))
643 if (GET_CODE (XEXP (link
, 0)) == CLOBBER
)
644 mark_set_resources (SET_DEST (XEXP (link
, 0)), res
, 1, 0);
646 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
647 assume that this call can clobber any register. */
648 if (next
&& GET_CODE (next
) == NOTE
649 && NOTE_LINE_NUMBER (next
) == NOTE_INSN_SETJMP
)
650 SET_HARD_REG_SET (res
->regs
);
653 /* ... and also what its RTL says it modifies, if anything. */
658 /* An insn consisting of just a CLOBBER (or USE) is just for flow
659 and doesn't actually do anything, so we ignore it. */
661 #ifdef INSN_SETS_ARE_DELAYED
662 if (! include_delayed_effects
663 && INSN_SETS_ARE_DELAYED (x
))
668 if (GET_CODE (x
) != USE
&& GET_CODE (x
) != CLOBBER
)
673 /* If the source of a SET is a CALL, this is actually done by
674 the called routine. So only include it if we are to include the
675 effects of the calling routine. */
677 mark_set_resources (SET_DEST (x
), res
,
678 (include_delayed_effects
679 || GET_CODE (SET_SRC (x
)) != CALL
),
682 mark_set_resources (SET_SRC (x
), res
, 0, 0);
686 mark_set_resources (XEXP (x
, 0), res
, 1, 0);
690 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
691 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x
, 0, 0))
692 && INSN_FROM_TARGET_P (XVECEXP (x
, 0, i
))))
693 mark_set_resources (XVECEXP (x
, 0, i
), res
, 0,
694 include_delayed_effects
);
701 mark_set_resources (XEXP (x
, 0), res
, 1, 0);
705 mark_set_resources (XEXP (x
, 0), res
, in_dest
, 0);
706 mark_set_resources (XEXP (x
, 1), res
, 0, 0);
707 mark_set_resources (XEXP (x
, 2), res
, 0, 0);
714 res
->unch_memory
|= RTX_UNCHANGING_P (x
);
715 res
->volatil
|= MEM_VOLATILE_P (x
);
718 mark_set_resources (XEXP (x
, 0), res
, 0, 0);
724 if (GET_CODE (SUBREG_REG (x
)) != REG
)
725 mark_set_resources (SUBREG_REG (x
), res
,
726 in_dest
, include_delayed_effects
);
729 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
730 int last_regno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
731 for (i
= regno
; i
< last_regno
; i
++)
732 SET_HARD_REG_BIT (res
->regs
, i
);
739 for (i
= 0; i
< HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
)); i
++)
740 SET_HARD_REG_BIT (res
->regs
, REGNO (x
) + i
);
743 case UNSPEC_VOLATILE
:
745 /* Traditional asm's are always volatile. */
754 res
->volatil
|= MEM_VOLATILE_P (x
);
756 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
757 We can not just fall through here since then we would be confused
758 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
759 traditional asms unlike their normal usage. */
761 for (i
= 0; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
762 mark_set_resources (ASM_OPERANDS_INPUT (x
, i
), res
, in_dest
, 0);
769 /* Process each sub-expression and flag what it needs. */
770 format_ptr
= GET_RTX_FORMAT (code
);
771 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
772 switch (*format_ptr
++)
775 mark_set_resources (XEXP (x
, i
), res
, in_dest
, include_delayed_effects
);
779 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
780 mark_set_resources (XVECEXP (x
, i
, j
), res
, in_dest
,
781 include_delayed_effects
);
786 /* Set the resources that are live at TARGET.
788 If TARGET is zero, we refer to the end of the current function and can
789 return our precomputed value.
791 Otherwise, we try to find out what is live by consulting the basic block
792 information. This is tricky, because we must consider the actions of
793 reload and jump optimization, which occur after the basic block information
796 Accordingly, we proceed as follows::
798 We find the previous BARRIER and look at all immediately following labels
799 (with no intervening active insns) to see if any of them start a basic
800 block. If we hit the start of the function first, we use block 0.
802 Once we have found a basic block and a corresponding first insns, we can
803 accurately compute the live status from basic_block_live_regs and
804 reg_renumber. (By starting at a label following a BARRIER, we are immune
805 to actions taken by reload and jump.) Then we scan all insns between
806 that point and our target. For each CLOBBER (or for call-clobbered regs
807 when we pass a CALL_INSN), mark the appropriate registers are dead. For
808 a SET, mark them as live.
810 We have to be careful when using REG_DEAD notes because they are not
811 updated by such things as find_equiv_reg. So keep track of registers
812 marked as dead that haven't been assigned to, and mark them dead at the
813 next CODE_LABEL since reload and jump won't propagate values across labels.
815 If we cannot find the start of a basic block (should be a very rare
816 case, if it can happen at all), mark everything as potentially live.
818 Next, scan forward from TARGET looking for things set or clobbered
819 before they are used. These are not live.
821 Because we can be called many times on the same target, save our results
822 in a hash table indexed by INSN_UID. This is only done if the function
823 init_resource_info () was invoked before we are called. */
826 mark_target_live_regs (insns
, target
, res
)
829 struct resources
*res
;
833 struct target_info
*tinfo
= NULL
;
837 HARD_REG_SET scratch
;
838 struct resources set
, needed
;
840 /* Handle end of function. */
843 *res
= end_of_function_needs
;
847 /* We have to assume memory is needed, but the CC isn't. */
849 res
->volatil
= res
->unch_memory
= 0;
852 /* See if we have computed this value already. */
853 if (target_hash_table
!= NULL
)
855 for (tinfo
= target_hash_table
[INSN_UID (target
) % TARGET_HASH_PRIME
];
856 tinfo
; tinfo
= tinfo
->next
)
857 if (tinfo
->uid
== INSN_UID (target
))
860 /* Start by getting the basic block number. If we have saved
861 information, we can get it from there unless the insn at the
862 start of the basic block has been deleted. */
863 if (tinfo
&& tinfo
->block
!= -1
864 && ! INSN_DELETED_P (BLOCK_HEAD (tinfo
->block
)))
869 b
= find_basic_block (target
);
871 if (target_hash_table
!= NULL
)
875 /* If the information is up-to-date, use it. Otherwise, we will
877 if (b
== tinfo
->block
&& b
!= -1 && tinfo
->bb_tick
== bb_ticks
[b
])
879 COPY_HARD_REG_SET (res
->regs
, tinfo
->live_regs
);
885 /* Allocate a place to put our results and chain it into the
887 tinfo
= (struct target_info
*) oballoc (sizeof (struct target_info
));
888 tinfo
->uid
= INSN_UID (target
);
890 tinfo
->next
= target_hash_table
[INSN_UID (target
) % TARGET_HASH_PRIME
];
891 target_hash_table
[INSN_UID (target
) % TARGET_HASH_PRIME
] = tinfo
;
895 CLEAR_HARD_REG_SET (pending_dead_regs
);
897 /* If we found a basic block, get the live registers from it and update
898 them with anything set or killed between its start and the insn before
899 TARGET. Otherwise, we must assume everything is live. */
902 regset regs_live
= BASIC_BLOCK (b
)->global_live_at_start
;
905 rtx start_insn
, stop_insn
;
907 /* Compute hard regs live at start of block -- this is the real hard regs
908 marked live, plus live pseudo regs that have been renumbered to
911 REG_SET_TO_HARD_REG_SET (current_live_regs
, regs_live
);
913 EXECUTE_IF_SET_IN_REG_SET
914 (regs_live
, FIRST_PSEUDO_REGISTER
, i
,
916 if ((regno
= reg_renumber
[i
]) >= 0)
918 j
< regno
+ HARD_REGNO_NREGS (regno
,
919 PSEUDO_REGNO_MODE (i
));
921 SET_HARD_REG_BIT (current_live_regs
, j
);
924 /* Get starting and ending insn, handling the case where each might
926 start_insn
= (b
== 0 ? insns
: BLOCK_HEAD (b
));
929 if (GET_CODE (start_insn
) == INSN
930 && GET_CODE (PATTERN (start_insn
)) == SEQUENCE
)
931 start_insn
= XVECEXP (PATTERN (start_insn
), 0, 0);
933 if (GET_CODE (stop_insn
) == INSN
934 && GET_CODE (PATTERN (stop_insn
)) == SEQUENCE
)
935 stop_insn
= next_insn (PREV_INSN (stop_insn
));
937 for (insn
= start_insn
; insn
!= stop_insn
;
938 insn
= next_insn_no_annul (insn
))
941 rtx real_insn
= insn
;
943 /* If this insn is from the target of a branch, it isn't going to
944 be used in the sequel. If it is used in both cases, this
945 test will not be true. */
946 if (INSN_FROM_TARGET_P (insn
))
949 /* If this insn is a USE made by update_block, we care about the
951 if (GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == USE
952 && GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn
), 0))) == 'i')
953 real_insn
= XEXP (PATTERN (insn
), 0);
955 if (GET_CODE (real_insn
) == CALL_INSN
)
957 /* CALL clobbers all call-used regs that aren't fixed except
958 sp, ap, and fp. Do this before setting the result of the
960 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
961 if (call_used_regs
[i
]
962 && i
!= STACK_POINTER_REGNUM
&& i
!= FRAME_POINTER_REGNUM
963 && i
!= ARG_POINTER_REGNUM
964 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
965 && i
!= HARD_FRAME_POINTER_REGNUM
967 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
968 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
970 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
971 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
974 CLEAR_HARD_REG_BIT (current_live_regs
, i
);
976 /* A CALL_INSN sets any global register live, since it may
977 have been modified by the call. */
978 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
980 SET_HARD_REG_BIT (current_live_regs
, i
);
983 /* Mark anything killed in an insn to be deadened at the next
984 label. Ignore USE insns; the only REG_DEAD notes will be for
985 parameters. But they might be early. A CALL_INSN will usually
986 clobber registers used for parameters. It isn't worth bothering
987 with the unlikely case when it won't. */
988 if ((GET_CODE (real_insn
) == INSN
989 && GET_CODE (PATTERN (real_insn
)) != USE
990 && GET_CODE (PATTERN (real_insn
)) != CLOBBER
)
991 || GET_CODE (real_insn
) == JUMP_INSN
992 || GET_CODE (real_insn
) == CALL_INSN
)
994 for (link
= REG_NOTES (real_insn
); link
; link
= XEXP (link
, 1))
995 if (REG_NOTE_KIND (link
) == REG_DEAD
996 && GET_CODE (XEXP (link
, 0)) == REG
997 && REGNO (XEXP (link
, 0)) < FIRST_PSEUDO_REGISTER
)
999 int first_regno
= REGNO (XEXP (link
, 0));
1002 + HARD_REGNO_NREGS (first_regno
,
1003 GET_MODE (XEXP (link
, 0))));
1005 for (i
= first_regno
; i
< last_regno
; i
++)
1006 SET_HARD_REG_BIT (pending_dead_regs
, i
);
1009 note_stores (PATTERN (real_insn
), update_live_status
);
1011 /* If any registers were unused after this insn, kill them.
1012 These notes will always be accurate. */
1013 for (link
= REG_NOTES (real_insn
); link
; link
= XEXP (link
, 1))
1014 if (REG_NOTE_KIND (link
) == REG_UNUSED
1015 && GET_CODE (XEXP (link
, 0)) == REG
1016 && REGNO (XEXP (link
, 0)) < FIRST_PSEUDO_REGISTER
)
1018 int first_regno
= REGNO (XEXP (link
, 0));
1021 + HARD_REGNO_NREGS (first_regno
,
1022 GET_MODE (XEXP (link
, 0))));
1024 for (i
= first_regno
; i
< last_regno
; i
++)
1025 CLEAR_HARD_REG_BIT (current_live_regs
, i
);
1029 else if (GET_CODE (real_insn
) == CODE_LABEL
)
1031 /* A label clobbers the pending dead registers since neither
1032 reload nor jump will propagate a value across a label. */
1033 AND_COMPL_HARD_REG_SET (current_live_regs
, pending_dead_regs
);
1034 CLEAR_HARD_REG_SET (pending_dead_regs
);
1037 /* The beginning of the epilogue corresponds to the end of the
1038 RTL chain when there are no epilogue insns. Certain resources
1039 are implicitly required at that point. */
1040 else if (GET_CODE (real_insn
) == NOTE
1041 && NOTE_LINE_NUMBER (real_insn
) == NOTE_INSN_EPILOGUE_BEG
)
1042 IOR_HARD_REG_SET (current_live_regs
, start_of_epilogue_needs
.regs
);
1045 COPY_HARD_REG_SET (res
->regs
, current_live_regs
);
1049 tinfo
->bb_tick
= bb_ticks
[b
];
1053 /* We didn't find the start of a basic block. Assume everything
1054 in use. This should happen only extremely rarely. */
1055 SET_HARD_REG_SET (res
->regs
);
1057 CLEAR_RESOURCE (&set
);
1058 CLEAR_RESOURCE (&needed
);
1060 jump_insn
= find_dead_or_set_registers (target
, res
, &jump_target
, 0,
1063 /* If we hit an unconditional branch, we have another way of finding out
1064 what is live: we can see what is live at the branch target and include
1065 anything used but not set before the branch. The only things that are
1066 live are those that are live using the above test and the test below. */
1070 struct resources new_resources
;
1071 rtx stop_insn
= next_active_insn (jump_insn
);
1073 mark_target_live_regs (insns
, next_active_insn (jump_target
),
1075 CLEAR_RESOURCE (&set
);
1076 CLEAR_RESOURCE (&needed
);
1078 /* Include JUMP_INSN in the needed registers. */
1079 for (insn
= target
; insn
!= stop_insn
; insn
= next_active_insn (insn
))
1081 mark_referenced_resources (insn
, &needed
, 1);
1083 COPY_HARD_REG_SET (scratch
, needed
.regs
);
1084 AND_COMPL_HARD_REG_SET (scratch
, set
.regs
);
1085 IOR_HARD_REG_SET (new_resources
.regs
, scratch
);
1087 mark_set_resources (insn
, &set
, 0, 1);
1090 AND_HARD_REG_SET (res
->regs
, new_resources
.regs
);
1095 COPY_HARD_REG_SET (tinfo
->live_regs
, res
->regs
);
1099 /* Initialize the resources required by mark_target_live_regs ().
1100 This should be invoked before the first call to mark_target_live_regs. */
1103 init_resource_info (epilogue_insn
)
1108 /* Indicate what resources are required to be valid at the end of the current
1109 function. The condition code never is and memory always is. If the
1110 frame pointer is needed, it is and so is the stack pointer unless
1111 EXIT_IGNORE_STACK is non-zero. If the frame pointer is not needed, the
1112 stack pointer is. Registers used to return the function value are
1113 needed. Registers holding global variables are needed. */
1115 end_of_function_needs
.cc
= 0;
1116 end_of_function_needs
.memory
= 1;
1117 end_of_function_needs
.unch_memory
= 0;
1118 CLEAR_HARD_REG_SET (end_of_function_needs
.regs
);
1120 if (frame_pointer_needed
)
1122 SET_HARD_REG_BIT (end_of_function_needs
.regs
, FRAME_POINTER_REGNUM
);
1123 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1124 SET_HARD_REG_BIT (end_of_function_needs
.regs
, HARD_FRAME_POINTER_REGNUM
);
1126 #ifdef EXIT_IGNORE_STACK
1127 if (! EXIT_IGNORE_STACK
1128 || current_function_sp_is_unchanging
)
1130 SET_HARD_REG_BIT (end_of_function_needs
.regs
, STACK_POINTER_REGNUM
);
1133 SET_HARD_REG_BIT (end_of_function_needs
.regs
, STACK_POINTER_REGNUM
);
1135 if (current_function_return_rtx
!= 0)
1136 mark_referenced_resources (current_function_return_rtx
,
1137 &end_of_function_needs
, 1);
1139 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1141 #ifdef EPILOGUE_USES
1142 || EPILOGUE_USES (i
)
1145 SET_HARD_REG_BIT (end_of_function_needs
.regs
, i
);
1147 /* The registers required to be live at the end of the function are
1148 represented in the flow information as being dead just prior to
1149 reaching the end of the function. For example, the return of a value
1150 might be represented by a USE of the return register immediately
1151 followed by an unconditional jump to the return label where the
1152 return label is the end of the RTL chain. The end of the RTL chain
1153 is then taken to mean that the return register is live.
1155 This sequence is no longer maintained when epilogue instructions are
1156 added to the RTL chain. To reconstruct the original meaning, the
1157 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1158 point where these registers become live (start_of_epilogue_needs).
1159 If epilogue instructions are present, the registers set by those
1160 instructions won't have been processed by flow. Thus, those
1161 registers are additionally required at the end of the RTL chain
1162 (end_of_function_needs). */
1164 start_of_epilogue_needs
= end_of_function_needs
;
1166 while ((epilogue_insn
= next_nonnote_insn (epilogue_insn
)))
1167 mark_set_resources (epilogue_insn
, &end_of_function_needs
, 0, 1);
1169 /* Allocate and initialize the tables used by mark_target_live_regs. */
1171 = (struct target_info
**) xmalloc ((TARGET_HASH_PRIME
1172 * sizeof (struct target_info
*)));
1173 bzero ((char *) target_hash_table
,
1174 TARGET_HASH_PRIME
* sizeof (struct target_info
*));
1176 bb_ticks
= (int *) xmalloc (n_basic_blocks
* sizeof (int));
1177 bzero ((char *) bb_ticks
, n_basic_blocks
* sizeof (int));
1180 /* Free up the resources allcated to mark_target_live_regs (). This
1181 should be invoked after the last call to mark_target_live_regs (). */
1184 free_resource_info ()
1186 if (target_hash_table
!= NULL
)
1188 free (target_hash_table
);
1189 target_hash_table
= NULL
;
1192 if (bb_ticks
!= NULL
)
1199 /* Clear any hashed information that we have stored for INSN. */
1202 clear_hashed_info_for_insn (insn
)
1205 struct target_info
*tinfo
;
1207 if (target_hash_table
!= NULL
)
1209 for (tinfo
= target_hash_table
[INSN_UID (insn
) % TARGET_HASH_PRIME
];
1210 tinfo
; tinfo
= tinfo
->next
)
1211 if (tinfo
->uid
== INSN_UID (insn
))
1219 /* Increment the tick count for the basic block that contains INSN. */
1222 incr_ticks_for_insn (insn
)
1225 int b
= find_basic_block (insn
);
1231 /* Add TRIAL to the set of resources used at the end of the current
1234 mark_end_of_function_resources (trial
, include_delayed_effects
)
1236 int include_delayed_effects
;
1238 mark_referenced_resources (trial
, &end_of_function_needs
,
1239 include_delayed_effects
);
1242 /* Try to find an available hard register of mode MODE at
1243 CURRENT_INSN, matching the register class in CLASS_STR. Registers
1244 that already have bits set in REG_SET will not be considered.
1246 If an appropriate register is available, it will be returned and the
1247 corresponding bit(s) in REG_SET will be set; otherwise, NULL_RTX is
1251 find_free_register (current_insn
, class_str
, mode
, reg_set
)
1255 HARD_REG_SET
*reg_set
;
1258 struct resources used
;
1259 unsigned char clet
= class_str
[0];
1260 enum reg_class
class
1261 = (clet
== 'r' ? GENERAL_REGS
: REG_CLASS_FROM_LETTER (clet
));
1263 mark_target_live_regs (get_insns (), current_insn
, &used
);
1265 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1269 if (! TEST_HARD_REG_BIT (reg_class_contents
[class], i
))
1271 for (j
= HARD_REGNO_NREGS (i
, mode
) - 1; j
>= 0; j
--)
1273 if (TEST_HARD_REG_BIT (*reg_set
, i
+ j
)
1274 || TEST_HARD_REG_BIT (used
.regs
, i
+ j
))
1282 for (j
= HARD_REGNO_NREGS (i
, mode
) - 1; j
>= 0; j
--)
1284 SET_HARD_REG_BIT (*reg_set
, i
+ j
);
1286 return gen_rtx_REG (mode
, i
);