1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
26 #include "hard-reg-set.h"
27 #include "basic-block.h"
34 /* This structure is used to record liveness information at the targets or
35 fallthrough insns of branches. We will most likely need the information
36 at targets again, so save them in a hash table rather than recomputing them
41 int uid
; /* INSN_UID of target. */
42 struct target_info
*next
; /* Next info for same hash bucket. */
43 HARD_REG_SET live_regs
; /* Registers live at target. */
44 int block
; /* Basic block number containing target. */
45 int bb_tick
; /* Generation count of basic block info. */
48 #define TARGET_HASH_PRIME 257
50 /* Indicates what resources are required at the beginning of the epilogue. */
51 static struct resources start_of_epilogue_needs
;
53 /* Indicates what resources are required at function end. */
54 static struct resources end_of_function_needs
;
56 /* Define the hash table itself. */
57 static struct target_info
**target_hash_table
= NULL
;
59 /* For each basic block, we maintain a generation number of its basic
60 block info, which is updated each time we move an insn from the
61 target of a jump. This is the generation number indexed by block
66 /* Marks registers possibly live at the current place being scanned by
67 mark_target_live_regs. Used only by next two function. */
69 static HARD_REG_SET current_live_regs
;
71 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
72 Also only used by the next two functions. */
74 static HARD_REG_SET pending_dead_regs
;
76 static void update_live_status
PROTO ((rtx
, rtx
, void *));
77 static rtx next_insn_no_annul
PROTO ((rtx
));
78 static rtx find_dead_or_set_registers
PROTO ((rtx
, struct resources
*,
79 rtx
*, int, struct resources
,
82 /* Utility function called from mark_target_live_regs via note_stores.
83 It deadens any CLOBBERed registers and livens any SET registers. */
86 update_live_status (dest
, x
, data
)
89 void *data ATTRIBUTE_UNUSED
;
91 int first_regno
, last_regno
;
94 if (GET_CODE (dest
) != REG
95 && (GET_CODE (dest
) != SUBREG
|| GET_CODE (SUBREG_REG (dest
)) != REG
))
98 if (GET_CODE (dest
) == SUBREG
)
99 first_regno
= REGNO (SUBREG_REG (dest
)) + SUBREG_WORD (dest
);
101 first_regno
= REGNO (dest
);
103 last_regno
= first_regno
+ HARD_REGNO_NREGS (first_regno
, GET_MODE (dest
));
105 if (GET_CODE (x
) == CLOBBER
)
106 for (i
= first_regno
; i
< last_regno
; i
++)
107 CLEAR_HARD_REG_BIT (current_live_regs
, i
);
109 for (i
= first_regno
; i
< last_regno
; i
++)
111 SET_HARD_REG_BIT (current_live_regs
, i
);
112 CLEAR_HARD_REG_BIT (pending_dead_regs
, i
);
116 /* Similar to next_insn, but ignores insns in the delay slots of
117 an annulled branch. */
120 next_insn_no_annul (insn
)
125 /* If INSN is an annulled branch, skip any insns from the target
127 if (INSN_ANNULLED_BRANCH_P (insn
)
128 && NEXT_INSN (PREV_INSN (insn
)) != insn
)
129 while (INSN_FROM_TARGET_P (NEXT_INSN (insn
)))
130 insn
= NEXT_INSN (insn
);
132 insn
= NEXT_INSN (insn
);
133 if (insn
&& GET_CODE (insn
) == INSN
134 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
135 insn
= XVECEXP (PATTERN (insn
), 0, 0);
141 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
142 which resources are references by the insn. If INCLUDE_DELAYED_EFFECTS
143 is TRUE, resources used by the called routine will be included for
147 mark_referenced_resources (x
, res
, include_delayed_effects
)
149 register struct resources
*res
;
150 register int include_delayed_effects
;
152 register enum rtx_code code
= GET_CODE (x
);
154 register const char *format_ptr
;
156 /* Handle leaf items for which we set resource flags. Also, special-case
157 CALL, SET and CLOBBER operators. */
169 if (GET_CODE (SUBREG_REG (x
)) != REG
)
170 mark_referenced_resources (SUBREG_REG (x
), res
, 0);
173 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
174 int last_regno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
175 for (i
= regno
; i
< last_regno
; i
++)
176 SET_HARD_REG_BIT (res
->regs
, i
);
181 for (i
= 0; i
< HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
)); i
++)
182 SET_HARD_REG_BIT (res
->regs
, REGNO (x
) + i
);
186 /* If this memory shouldn't change, it really isn't referencing
188 if (RTX_UNCHANGING_P (x
))
189 res
->unch_memory
= 1;
192 res
->volatil
|= MEM_VOLATILE_P (x
);
194 /* Mark registers used to access memory. */
195 mark_referenced_resources (XEXP (x
, 0), res
, 0);
202 case UNSPEC_VOLATILE
:
204 /* Traditional asm's are always volatile. */
213 res
->volatil
|= MEM_VOLATILE_P (x
);
215 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
216 We can not just fall through here since then we would be confused
217 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
218 traditional asms unlike their normal usage. */
220 for (i
= 0; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
221 mark_referenced_resources (ASM_OPERANDS_INPUT (x
, i
), res
, 0);
225 /* The first operand will be a (MEM (xxx)) but doesn't really reference
226 memory. The second operand may be referenced, though. */
227 mark_referenced_resources (XEXP (XEXP (x
, 0), 0), res
, 0);
228 mark_referenced_resources (XEXP (x
, 1), res
, 0);
232 /* Usually, the first operand of SET is set, not referenced. But
233 registers used to access memory are referenced. SET_DEST is
234 also referenced if it is a ZERO_EXTRACT or SIGN_EXTRACT. */
236 mark_referenced_resources (SET_SRC (x
), res
, 0);
239 if (GET_CODE (x
) == SIGN_EXTRACT
|| GET_CODE (x
) == ZERO_EXTRACT
)
240 mark_referenced_resources (x
, res
, 0);
241 else if (GET_CODE (x
) == SUBREG
)
243 if (GET_CODE (x
) == MEM
)
244 mark_referenced_resources (XEXP (x
, 0), res
, 0);
251 if (include_delayed_effects
)
253 /* A CALL references memory, the frame pointer if it exists, the
254 stack pointer, any global registers and any registers given in
255 USE insns immediately in front of the CALL.
257 However, we may have moved some of the parameter loading insns
258 into the delay slot of this CALL. If so, the USE's for them
259 don't count and should be skipped. */
260 rtx insn
= PREV_INSN (x
);
263 rtx next
= NEXT_INSN (x
);
266 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
267 if (NEXT_INSN (insn
) != x
)
269 next
= NEXT_INSN (NEXT_INSN (insn
));
270 sequence
= PATTERN (NEXT_INSN (insn
));
271 seq_size
= XVECLEN (sequence
, 0);
272 if (GET_CODE (sequence
) != SEQUENCE
)
277 SET_HARD_REG_BIT (res
->regs
, STACK_POINTER_REGNUM
);
278 if (frame_pointer_needed
)
280 SET_HARD_REG_BIT (res
->regs
, FRAME_POINTER_REGNUM
);
281 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
282 SET_HARD_REG_BIT (res
->regs
, HARD_FRAME_POINTER_REGNUM
);
286 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
288 SET_HARD_REG_BIT (res
->regs
, i
);
290 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
291 assume that this call can need any register.
293 This is done to be more conservative about how we handle setjmp.
294 We assume that they both use and set all registers. Using all
295 registers ensures that a register will not be considered dead
296 just because it crosses a setjmp call. A register should be
297 considered dead only if the setjmp call returns non-zero. */
298 if (next
&& GET_CODE (next
) == NOTE
299 && NOTE_LINE_NUMBER (next
) == NOTE_INSN_SETJMP
)
300 SET_HARD_REG_SET (res
->regs
);
305 for (link
= CALL_INSN_FUNCTION_USAGE (x
);
307 link
= XEXP (link
, 1))
308 if (GET_CODE (XEXP (link
, 0)) == USE
)
310 for (i
= 1; i
< seq_size
; i
++)
312 rtx slot_pat
= PATTERN (XVECEXP (sequence
, 0, i
));
313 if (GET_CODE (slot_pat
) == SET
314 && rtx_equal_p (SET_DEST (slot_pat
),
315 SET_DEST (XEXP (link
, 0))))
319 mark_referenced_resources (SET_DEST (XEXP (link
, 0)),
325 /* ... fall through to other INSN processing ... */
330 #ifdef INSN_REFERENCES_ARE_DELAYED
331 if (! include_delayed_effects
332 && INSN_REFERENCES_ARE_DELAYED (x
))
336 /* No special processing, just speed up. */
337 mark_referenced_resources (PATTERN (x
), res
, include_delayed_effects
);
344 /* Process each sub-expression and flag what it needs. */
345 format_ptr
= GET_RTX_FORMAT (code
);
346 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
347 switch (*format_ptr
++)
350 mark_referenced_resources (XEXP (x
, i
), res
, include_delayed_effects
);
354 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
355 mark_referenced_resources (XVECEXP (x
, i
, j
), res
,
356 include_delayed_effects
);
361 /* A subroutine of mark_target_live_regs. Search forward from TARGET
362 looking for registers that are set before they are used. These are dead.
363 Stop after passing a few conditional jumps, and/or a small
364 number of unconditional branches. */
367 find_dead_or_set_registers (target
, res
, jump_target
, jump_count
, set
, needed
)
369 struct resources
*res
;
372 struct resources set
, needed
;
374 HARD_REG_SET scratch
;
379 for (insn
= target
; insn
; insn
= next
)
381 rtx this_jump_insn
= insn
;
383 next
= NEXT_INSN (insn
);
384 switch (GET_CODE (insn
))
387 /* After a label, any pending dead registers that weren't yet
388 used can be made dead. */
389 AND_COMPL_HARD_REG_SET (pending_dead_regs
, needed
.regs
);
390 AND_COMPL_HARD_REG_SET (res
->regs
, pending_dead_regs
);
391 CLEAR_HARD_REG_SET (pending_dead_regs
);
400 if (GET_CODE (PATTERN (insn
)) == USE
)
402 /* If INSN is a USE made by update_block, we care about the
403 underlying insn. Any registers set by the underlying insn
404 are live since the insn is being done somewhere else. */
405 if (GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn
), 0))) == 'i')
406 mark_set_resources (XEXP (PATTERN (insn
), 0), res
, 0, 1);
408 /* All other USE insns are to be ignored. */
411 else if (GET_CODE (PATTERN (insn
)) == CLOBBER
)
413 else if (GET_CODE (PATTERN (insn
)) == SEQUENCE
)
415 /* An unconditional jump can be used to fill the delay slot
416 of a call, so search for a JUMP_INSN in any position. */
417 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
419 this_jump_insn
= XVECEXP (PATTERN (insn
), 0, i
);
420 if (GET_CODE (this_jump_insn
) == JUMP_INSN
)
429 if (GET_CODE (this_jump_insn
) == JUMP_INSN
)
431 if (jump_count
++ < 10)
433 if (simplejump_p (this_jump_insn
)
434 || GET_CODE (PATTERN (this_jump_insn
)) == RETURN
)
436 next
= JUMP_LABEL (this_jump_insn
);
441 *jump_target
= JUMP_LABEL (this_jump_insn
);
444 else if (condjump_p (this_jump_insn
)
445 || condjump_in_parallel_p (this_jump_insn
))
447 struct resources target_set
, target_res
;
448 struct resources fallthrough_res
;
450 /* We can handle conditional branches here by following
451 both paths, and then IOR the results of the two paths
452 together, which will give us registers that are dead
453 on both paths. Since this is expensive, we give it
454 a much higher cost than unconditional branches. The
455 cost was chosen so that we will follow at most 1
456 conditional branch. */
459 if (jump_count
>= 10)
462 mark_referenced_resources (insn
, &needed
, 1);
464 /* For an annulled branch, mark_set_resources ignores slots
465 filled by instructions from the target. This is correct
466 if the branch is not taken. Since we are following both
467 paths from the branch, we must also compute correct info
468 if the branch is taken. We do this by inverting all of
469 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
470 and then inverting the INSN_FROM_TARGET_P bits again. */
472 if (GET_CODE (PATTERN (insn
)) == SEQUENCE
473 && INSN_ANNULLED_BRANCH_P (this_jump_insn
))
475 for (i
= 1; i
< XVECLEN (PATTERN (insn
), 0); i
++)
476 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
))
477 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
));
480 mark_set_resources (insn
, &target_set
, 0, 1);
482 for (i
= 1; i
< XVECLEN (PATTERN (insn
), 0); i
++)
483 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
))
484 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
));
486 mark_set_resources (insn
, &set
, 0, 1);
490 mark_set_resources (insn
, &set
, 0, 1);
495 COPY_HARD_REG_SET (scratch
, target_set
.regs
);
496 AND_COMPL_HARD_REG_SET (scratch
, needed
.regs
);
497 AND_COMPL_HARD_REG_SET (target_res
.regs
, scratch
);
499 fallthrough_res
= *res
;
500 COPY_HARD_REG_SET (scratch
, set
.regs
);
501 AND_COMPL_HARD_REG_SET (scratch
, needed
.regs
);
502 AND_COMPL_HARD_REG_SET (fallthrough_res
.regs
, scratch
);
504 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn
),
505 &target_res
, 0, jump_count
,
507 find_dead_or_set_registers (next
,
508 &fallthrough_res
, 0, jump_count
,
510 IOR_HARD_REG_SET (fallthrough_res
.regs
, target_res
.regs
);
511 AND_HARD_REG_SET (res
->regs
, fallthrough_res
.regs
);
519 /* Don't try this optimization if we expired our jump count
520 above, since that would mean there may be an infinite loop
521 in the function being compiled. */
527 mark_referenced_resources (insn
, &needed
, 1);
528 mark_set_resources (insn
, &set
, 0, 1);
530 COPY_HARD_REG_SET (scratch
, set
.regs
);
531 AND_COMPL_HARD_REG_SET (scratch
, needed
.regs
);
532 AND_COMPL_HARD_REG_SET (res
->regs
, scratch
);
538 /* Given X, a part of an insn, and a pointer to a `struct resource',
539 RES, indicate which resources are modified by the insn. If
540 INCLUDE_DELAYED_EFFECTS is nonzero, also mark resources potentially
541 set by the called routine.
543 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
544 objects are being referenced instead of set.
546 We never mark the insn as modifying the condition code unless it explicitly
547 SETs CC0 even though this is not totally correct. The reason for this is
548 that we require a SET of CC0 to immediately precede the reference to CC0.
549 So if some other insn sets CC0 as a side-effect, we know it cannot affect
550 our computation and thus may be placed in a delay slot. */
553 mark_set_resources (x
, res
, in_dest
, include_delayed_effects
)
555 register struct resources
*res
;
557 int include_delayed_effects
;
559 register enum rtx_code code
;
561 register const char *format_ptr
;
579 /* These don't set any resources. */
588 /* Called routine modifies the condition code, memory, any registers
589 that aren't saved across calls, global registers and anything
590 explicitly CLOBBERed immediately after the CALL_INSN. */
592 if (include_delayed_effects
)
594 rtx next
= NEXT_INSN (x
);
595 rtx prev
= PREV_INSN (x
);
598 res
->cc
= res
->memory
= 1;
599 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
600 if (call_used_regs
[i
] || global_regs
[i
])
601 SET_HARD_REG_BIT (res
->regs
, i
);
603 /* If X is part of a delay slot sequence, then NEXT should be
604 the first insn after the sequence. */
605 if (NEXT_INSN (prev
) != x
)
606 next
= NEXT_INSN (NEXT_INSN (prev
));
608 for (link
= CALL_INSN_FUNCTION_USAGE (x
);
609 link
; link
= XEXP (link
, 1))
610 if (GET_CODE (XEXP (link
, 0)) == CLOBBER
)
611 mark_set_resources (SET_DEST (XEXP (link
, 0)), res
, 1, 0);
613 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
614 assume that this call can clobber any register. */
615 if (next
&& GET_CODE (next
) == NOTE
616 && NOTE_LINE_NUMBER (next
) == NOTE_INSN_SETJMP
)
617 SET_HARD_REG_SET (res
->regs
);
620 /* ... and also what its RTL says it modifies, if anything. */
625 /* An insn consisting of just a CLOBBER (or USE) is just for flow
626 and doesn't actually do anything, so we ignore it. */
628 #ifdef INSN_SETS_ARE_DELAYED
629 if (! include_delayed_effects
630 && INSN_SETS_ARE_DELAYED (x
))
635 if (GET_CODE (x
) != USE
&& GET_CODE (x
) != CLOBBER
)
640 /* If the source of a SET is a CALL, this is actually done by
641 the called routine. So only include it if we are to include the
642 effects of the calling routine. */
644 mark_set_resources (SET_DEST (x
), res
,
645 (include_delayed_effects
646 || GET_CODE (SET_SRC (x
)) != CALL
),
649 mark_set_resources (SET_SRC (x
), res
, 0, 0);
653 mark_set_resources (XEXP (x
, 0), res
, 1, 0);
657 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
658 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x
, 0, 0))
659 && INSN_FROM_TARGET_P (XVECEXP (x
, 0, i
))))
660 mark_set_resources (XVECEXP (x
, 0, i
), res
, 0,
661 include_delayed_effects
);
668 mark_set_resources (XEXP (x
, 0), res
, 1, 0);
672 mark_set_resources (XEXP (x
, 0), res
, in_dest
, 0);
673 mark_set_resources (XEXP (x
, 1), res
, 0, 0);
674 mark_set_resources (XEXP (x
, 2), res
, 0, 0);
681 res
->unch_memory
|= RTX_UNCHANGING_P (x
);
682 res
->volatil
|= MEM_VOLATILE_P (x
);
685 mark_set_resources (XEXP (x
, 0), res
, 0, 0);
691 if (GET_CODE (SUBREG_REG (x
)) != REG
)
692 mark_set_resources (SUBREG_REG (x
), res
,
693 in_dest
, include_delayed_effects
);
696 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
697 int last_regno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
698 for (i
= regno
; i
< last_regno
; i
++)
699 SET_HARD_REG_BIT (res
->regs
, i
);
706 for (i
= 0; i
< HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
)); i
++)
707 SET_HARD_REG_BIT (res
->regs
, REGNO (x
) + i
);
710 case UNSPEC_VOLATILE
:
712 /* Traditional asm's are always volatile. */
721 res
->volatil
|= MEM_VOLATILE_P (x
);
723 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
724 We can not just fall through here since then we would be confused
725 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
726 traditional asms unlike their normal usage. */
728 for (i
= 0; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
729 mark_set_resources (ASM_OPERANDS_INPUT (x
, i
), res
, in_dest
, 0);
736 /* Process each sub-expression and flag what it needs. */
737 format_ptr
= GET_RTX_FORMAT (code
);
738 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
739 switch (*format_ptr
++)
742 mark_set_resources (XEXP (x
, i
), res
, in_dest
, include_delayed_effects
);
746 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
747 mark_set_resources (XVECEXP (x
, i
, j
), res
, in_dest
,
748 include_delayed_effects
);
753 /* Set the resources that are live at TARGET.
755 If TARGET is zero, we refer to the end of the current function and can
756 return our precomputed value.
758 Otherwise, we try to find out what is live by consulting the basic block
759 information. This is tricky, because we must consider the actions of
760 reload and jump optimization, which occur after the basic block information
763 Accordingly, we proceed as follows::
765 We find the previous BARRIER and look at all immediately following labels
766 (with no intervening active insns) to see if any of them start a basic
767 block. If we hit the start of the function first, we use block 0.
769 Once we have found a basic block and a corresponding first insns, we can
770 accurately compute the live status from basic_block_live_regs and
771 reg_renumber. (By starting at a label following a BARRIER, we are immune
772 to actions taken by reload and jump.) Then we scan all insns between
773 that point and our target. For each CLOBBER (or for call-clobbered regs
774 when we pass a CALL_INSN), mark the appropriate registers are dead. For
775 a SET, mark them as live.
777 We have to be careful when using REG_DEAD notes because they are not
778 updated by such things as find_equiv_reg. So keep track of registers
779 marked as dead that haven't been assigned to, and mark them dead at the
780 next CODE_LABEL since reload and jump won't propagate values across labels.
782 If we cannot find the start of a basic block (should be a very rare
783 case, if it can happen at all), mark everything as potentially live.
785 Next, scan forward from TARGET looking for things set or clobbered
786 before they are used. These are not live.
788 Because we can be called many times on the same target, save our results
789 in a hash table indexed by INSN_UID. This is only done if the function
790 init_resource_info () was invoked before we are called. */
793 mark_target_live_regs (insns
, target
, res
)
796 struct resources
*res
;
800 struct target_info
*tinfo
= NULL
;
804 HARD_REG_SET scratch
;
805 struct resources set
, needed
;
807 /* Handle end of function. */
810 *res
= end_of_function_needs
;
814 /* We have to assume memory is needed, but the CC isn't. */
816 res
->volatil
= res
->unch_memory
= 0;
819 /* See if we have computed this value already. */
820 if (target_hash_table
!= NULL
)
822 for (tinfo
= target_hash_table
[INSN_UID (target
) % TARGET_HASH_PRIME
];
823 tinfo
; tinfo
= tinfo
->next
)
824 if (tinfo
->uid
== INSN_UID (target
))
827 /* Start by getting the basic block number. If we have saved
828 information, we can get it from there unless the insn at the
829 start of the basic block has been deleted. */
830 if (tinfo
&& tinfo
->block
!= -1
831 && ! INSN_DELETED_P (BLOCK_HEAD (tinfo
->block
)))
836 && INSN_UID (target
) < (int) VARRAY_SIZE (basic_block_for_insn
))
837 b
= BLOCK_NUM (target
);
839 if (target_hash_table
!= NULL
)
843 /* If the information is up-to-date, use it. Otherwise, we will
845 if (b
== tinfo
->block
&& b
!= -1 && tinfo
->bb_tick
== bb_ticks
[b
])
847 COPY_HARD_REG_SET (res
->regs
, tinfo
->live_regs
);
853 /* Allocate a place to put our results and chain it into the
855 tinfo
= (struct target_info
*) oballoc (sizeof (struct target_info
));
856 tinfo
->uid
= INSN_UID (target
);
858 tinfo
->next
= target_hash_table
[INSN_UID (target
) % TARGET_HASH_PRIME
];
859 target_hash_table
[INSN_UID (target
) % TARGET_HASH_PRIME
] = tinfo
;
863 CLEAR_HARD_REG_SET (pending_dead_regs
);
865 /* If we found a basic block, get the live registers from it and update
866 them with anything set or killed between its start and the insn before
867 TARGET. Otherwise, we must assume everything is live. */
870 regset regs_live
= BASIC_BLOCK (b
)->global_live_at_start
;
873 rtx start_insn
, stop_insn
;
875 /* Compute hard regs live at start of block -- this is the real hard regs
876 marked live, plus live pseudo regs that have been renumbered to
879 REG_SET_TO_HARD_REG_SET (current_live_regs
, regs_live
);
881 EXECUTE_IF_SET_IN_REG_SET
882 (regs_live
, FIRST_PSEUDO_REGISTER
, i
,
884 if ((regno
= reg_renumber
[i
]) >= 0)
886 j
< regno
+ HARD_REGNO_NREGS (regno
,
887 PSEUDO_REGNO_MODE (i
));
889 SET_HARD_REG_BIT (current_live_regs
, j
);
892 /* Get starting and ending insn, handling the case where each might
894 start_insn
= (b
== 0 ? insns
: BLOCK_HEAD (b
));
897 if (GET_CODE (start_insn
) == INSN
898 && GET_CODE (PATTERN (start_insn
)) == SEQUENCE
)
899 start_insn
= XVECEXP (PATTERN (start_insn
), 0, 0);
901 if (GET_CODE (stop_insn
) == INSN
902 && GET_CODE (PATTERN (stop_insn
)) == SEQUENCE
)
903 stop_insn
= next_insn (PREV_INSN (stop_insn
));
905 for (insn
= start_insn
; insn
!= stop_insn
;
906 insn
= next_insn_no_annul (insn
))
909 rtx real_insn
= insn
;
911 /* If this insn is from the target of a branch, it isn't going to
912 be used in the sequel. If it is used in both cases, this
913 test will not be true. */
914 if (INSN_FROM_TARGET_P (insn
))
917 /* If this insn is a USE made by update_block, we care about the
919 if (GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == USE
920 && GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn
), 0))) == 'i')
921 real_insn
= XEXP (PATTERN (insn
), 0);
923 if (GET_CODE (real_insn
) == CALL_INSN
)
925 /* CALL clobbers all call-used regs that aren't fixed except
926 sp, ap, and fp. Do this before setting the result of the
928 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
929 if (call_used_regs
[i
]
930 && i
!= STACK_POINTER_REGNUM
&& i
!= FRAME_POINTER_REGNUM
931 && i
!= ARG_POINTER_REGNUM
932 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
933 && i
!= HARD_FRAME_POINTER_REGNUM
935 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
936 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
938 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
939 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
942 CLEAR_HARD_REG_BIT (current_live_regs
, i
);
944 /* A CALL_INSN sets any global register live, since it may
945 have been modified by the call. */
946 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
948 SET_HARD_REG_BIT (current_live_regs
, i
);
951 /* Mark anything killed in an insn to be deadened at the next
952 label. Ignore USE insns; the only REG_DEAD notes will be for
953 parameters. But they might be early. A CALL_INSN will usually
954 clobber registers used for parameters. It isn't worth bothering
955 with the unlikely case when it won't. */
956 if ((GET_CODE (real_insn
) == INSN
957 && GET_CODE (PATTERN (real_insn
)) != USE
958 && GET_CODE (PATTERN (real_insn
)) != CLOBBER
)
959 || GET_CODE (real_insn
) == JUMP_INSN
960 || GET_CODE (real_insn
) == CALL_INSN
)
962 for (link
= REG_NOTES (real_insn
); link
; link
= XEXP (link
, 1))
963 if (REG_NOTE_KIND (link
) == REG_DEAD
964 && GET_CODE (XEXP (link
, 0)) == REG
965 && REGNO (XEXP (link
, 0)) < FIRST_PSEUDO_REGISTER
)
967 int first_regno
= REGNO (XEXP (link
, 0));
970 + HARD_REGNO_NREGS (first_regno
,
971 GET_MODE (XEXP (link
, 0))));
973 for (i
= first_regno
; i
< last_regno
; i
++)
974 SET_HARD_REG_BIT (pending_dead_regs
, i
);
977 note_stores (PATTERN (real_insn
), update_live_status
, NULL
);
979 /* If any registers were unused after this insn, kill them.
980 These notes will always be accurate. */
981 for (link
= REG_NOTES (real_insn
); link
; link
= XEXP (link
, 1))
982 if (REG_NOTE_KIND (link
) == REG_UNUSED
983 && GET_CODE (XEXP (link
, 0)) == REG
984 && REGNO (XEXP (link
, 0)) < FIRST_PSEUDO_REGISTER
)
986 int first_regno
= REGNO (XEXP (link
, 0));
989 + HARD_REGNO_NREGS (first_regno
,
990 GET_MODE (XEXP (link
, 0))));
992 for (i
= first_regno
; i
< last_regno
; i
++)
993 CLEAR_HARD_REG_BIT (current_live_regs
, i
);
997 else if (GET_CODE (real_insn
) == CODE_LABEL
)
999 /* A label clobbers the pending dead registers since neither
1000 reload nor jump will propagate a value across a label. */
1001 AND_COMPL_HARD_REG_SET (current_live_regs
, pending_dead_regs
);
1002 CLEAR_HARD_REG_SET (pending_dead_regs
);
1005 /* The beginning of the epilogue corresponds to the end of the
1006 RTL chain when there are no epilogue insns. Certain resources
1007 are implicitly required at that point. */
1008 else if (GET_CODE (real_insn
) == NOTE
1009 && NOTE_LINE_NUMBER (real_insn
) == NOTE_INSN_EPILOGUE_BEG
)
1010 IOR_HARD_REG_SET (current_live_regs
, start_of_epilogue_needs
.regs
);
1013 COPY_HARD_REG_SET (res
->regs
, current_live_regs
);
1017 tinfo
->bb_tick
= bb_ticks
[b
];
1021 /* We didn't find the start of a basic block. Assume everything
1022 in use. This should happen only extremely rarely. */
1023 SET_HARD_REG_SET (res
->regs
);
1025 CLEAR_RESOURCE (&set
);
1026 CLEAR_RESOURCE (&needed
);
1028 jump_insn
= find_dead_or_set_registers (target
, res
, &jump_target
, 0,
1031 /* If we hit an unconditional branch, we have another way of finding out
1032 what is live: we can see what is live at the branch target and include
1033 anything used but not set before the branch. We add the live
1034 resources found using the test below to those found until now. */
1038 struct resources new_resources
;
1039 rtx stop_insn
= next_active_insn (jump_insn
);
1041 mark_target_live_regs (insns
, next_active_insn (jump_target
),
1043 CLEAR_RESOURCE (&set
);
1044 CLEAR_RESOURCE (&needed
);
1046 /* Include JUMP_INSN in the needed registers. */
1047 for (insn
= target
; insn
!= stop_insn
; insn
= next_active_insn (insn
))
1049 mark_referenced_resources (insn
, &needed
, 1);
1051 COPY_HARD_REG_SET (scratch
, needed
.regs
);
1052 AND_COMPL_HARD_REG_SET (scratch
, set
.regs
);
1053 IOR_HARD_REG_SET (new_resources
.regs
, scratch
);
1055 mark_set_resources (insn
, &set
, 0, 1);
1058 IOR_HARD_REG_SET (res
->regs
, new_resources
.regs
);
1063 COPY_HARD_REG_SET (tinfo
->live_regs
, res
->regs
);
1067 /* Initialize the resources required by mark_target_live_regs ().
1068 This should be invoked before the first call to mark_target_live_regs. */
1071 init_resource_info (epilogue_insn
)
1076 /* Indicate what resources are required to be valid at the end of the current
1077 function. The condition code never is and memory always is. If the
1078 frame pointer is needed, it is and so is the stack pointer unless
1079 EXIT_IGNORE_STACK is non-zero. If the frame pointer is not needed, the
1080 stack pointer is. Registers used to return the function value are
1081 needed. Registers holding global variables are needed. */
1083 end_of_function_needs
.cc
= 0;
1084 end_of_function_needs
.memory
= 1;
1085 end_of_function_needs
.unch_memory
= 0;
1086 CLEAR_HARD_REG_SET (end_of_function_needs
.regs
);
1088 if (frame_pointer_needed
)
1090 SET_HARD_REG_BIT (end_of_function_needs
.regs
, FRAME_POINTER_REGNUM
);
1091 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1092 SET_HARD_REG_BIT (end_of_function_needs
.regs
, HARD_FRAME_POINTER_REGNUM
);
1094 #ifdef EXIT_IGNORE_STACK
1095 if (! EXIT_IGNORE_STACK
1096 || current_function_sp_is_unchanging
)
1098 SET_HARD_REG_BIT (end_of_function_needs
.regs
, STACK_POINTER_REGNUM
);
1101 SET_HARD_REG_BIT (end_of_function_needs
.regs
, STACK_POINTER_REGNUM
);
1103 if (current_function_return_rtx
!= 0)
1104 mark_referenced_resources (current_function_return_rtx
,
1105 &end_of_function_needs
, 1);
1107 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1109 #ifdef EPILOGUE_USES
1110 || EPILOGUE_USES (i
)
1113 SET_HARD_REG_BIT (end_of_function_needs
.regs
, i
);
1115 /* The registers required to be live at the end of the function are
1116 represented in the flow information as being dead just prior to
1117 reaching the end of the function. For example, the return of a value
1118 might be represented by a USE of the return register immediately
1119 followed by an unconditional jump to the return label where the
1120 return label is the end of the RTL chain. The end of the RTL chain
1121 is then taken to mean that the return register is live.
1123 This sequence is no longer maintained when epilogue instructions are
1124 added to the RTL chain. To reconstruct the original meaning, the
1125 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1126 point where these registers become live (start_of_epilogue_needs).
1127 If epilogue instructions are present, the registers set by those
1128 instructions won't have been processed by flow. Thus, those
1129 registers are additionally required at the end of the RTL chain
1130 (end_of_function_needs). */
1132 start_of_epilogue_needs
= end_of_function_needs
;
1134 while ((epilogue_insn
= next_nonnote_insn (epilogue_insn
)))
1135 mark_set_resources (epilogue_insn
, &end_of_function_needs
, 0, 1);
1137 /* Allocate and initialize the tables used by mark_target_live_regs. */
1138 target_hash_table
= (struct target_info
**)
1139 xcalloc (TARGET_HASH_PRIME
, sizeof (struct target_info
*));
1140 bb_ticks
= (int *) xcalloc (n_basic_blocks
, sizeof (int));
1142 compute_bb_for_insn (get_max_uid ());
1145 /* Free up the resources allcated to mark_target_live_regs (). This
1146 should be invoked after the last call to mark_target_live_regs (). */
1149 free_resource_info ()
1151 if (target_hash_table
!= NULL
)
1153 free (target_hash_table
);
1154 target_hash_table
= NULL
;
1157 if (bb_ticks
!= NULL
)
1164 /* Clear any hashed information that we have stored for INSN. */
1167 clear_hashed_info_for_insn (insn
)
1170 struct target_info
*tinfo
;
1172 if (target_hash_table
!= NULL
)
1174 for (tinfo
= target_hash_table
[INSN_UID (insn
) % TARGET_HASH_PRIME
];
1175 tinfo
; tinfo
= tinfo
->next
)
1176 if (tinfo
->uid
== INSN_UID (insn
))
1184 /* Increment the tick count for the basic block that contains INSN. */
1187 incr_ticks_for_insn (insn
)
1190 int b
= BLOCK_NUM (insn
);
1196 /* Add TRIAL to the set of resources used at the end of the current
1199 mark_end_of_function_resources (trial
, include_delayed_effects
)
1201 int include_delayed_effects
;
1203 mark_referenced_resources (trial
, &end_of_function_needs
,
1204 include_delayed_effects
);
1207 /* Try to find a hard register of mode MODE, matching the register class in
1208 CLASS_STR, which is available at the beginning of insn CURRENT_INSN and
1209 remains available until the end of LAST_INSN. LAST_INSN may be NULL_RTX,
1210 in which case the only condition is that the register must be available
1211 before CURRENT_INSN.
1212 Registers that already have bits set in REG_SET will not be considered.
1214 If an appropriate register is available, it will be returned and the
1215 corresponding bit(s) in REG_SET will be set; otherwise, NULL_RTX is
1219 find_free_register (current_insn
, last_insn
, class_str
, mode
, reg_set
)
1220 rtx current_insn
, last_insn
;
1221 const char *class_str
;
1223 HARD_REG_SET
*reg_set
;
1226 struct resources used
;
1227 unsigned char clet
= class_str
[0];
1228 enum reg_class
class
1229 = (clet
== 'r' ? GENERAL_REGS
: REG_CLASS_FROM_LETTER (clet
));
1231 mark_target_live_regs (get_insns (), current_insn
, &used
);
1233 while (current_insn
!= last_insn
)
1235 /* Exclude anything set in this insn. */
1236 mark_set_resources (PATTERN (current_insn
), &used
, 0, 1);
1237 current_insn
= next_nonnote_insn (current_insn
);
1241 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1246 #ifdef REG_ALLOC_ORDER
1247 regno
= reg_alloc_order
[i
];
1252 /* Don't allocate fixed registers. */
1253 if (fixed_regs
[regno
])
1255 /* Make sure the register is of the right class. */
1256 if (! TEST_HARD_REG_BIT (reg_class_contents
[class], regno
))
1258 /* And can support the mode we need. */
1259 if (! HARD_REGNO_MODE_OK (regno
, mode
))
1261 /* And that we don't create an extra save/restore. */
1262 if (! call_used_regs
[regno
] && ! regs_ever_live
[regno
])
1264 /* And we don't clobber traceback for noreturn functions. */
1265 if ((regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
)
1266 && (! reload_completed
|| frame_pointer_needed
))
1270 for (j
= HARD_REGNO_NREGS (regno
, mode
) - 1; j
>= 0; j
--)
1272 if (TEST_HARD_REG_BIT (*reg_set
, regno
+ j
)
1273 || TEST_HARD_REG_BIT (used
.regs
, regno
+ j
))
1281 for (j
= HARD_REGNO_NREGS (regno
, mode
) - 1; j
>= 0; j
--)
1283 SET_HARD_REG_BIT (*reg_set
, regno
+ j
);
1285 return gen_rtx_REG (mode
, regno
);
1291 /* Return true if REG is dead at CURRENT_INSN. */
1294 reg_dead_p (current_insn
, reg
)
1295 rtx current_insn
, reg
;
1297 struct resources used
;
1300 mark_target_live_regs (get_insns (), current_insn
, &used
);
1302 regno
= REGNO (reg
);
1303 for (j
= HARD_REGNO_NREGS (regno
, GET_MODE (reg
)) - 1; j
>= 0; j
--)
1305 if (TEST_HARD_REG_BIT (used
.regs
, regno
+ j
))