1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999, 2000 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
26 #include "hard-reg-set.h"
27 #include "basic-block.h"
33 #include "insn-attr.h"
35 /* This structure is used to record liveness information at the targets or
36 fallthrough insns of branches. We will most likely need the information
37 at targets again, so save them in a hash table rather than recomputing them
42 int uid
; /* INSN_UID of target. */
43 struct target_info
*next
; /* Next info for same hash bucket. */
44 HARD_REG_SET live_regs
; /* Registers live at target. */
45 int block
; /* Basic block number containing target. */
46 int bb_tick
; /* Generation count of basic block info. */
49 #define TARGET_HASH_PRIME 257
51 /* Indicates what resources are required at the beginning of the epilogue. */
52 static struct resources start_of_epilogue_needs
;
54 /* Indicates what resources are required at function end. */
55 static struct resources end_of_function_needs
;
57 /* Define the hash table itself. */
58 static struct target_info
**target_hash_table
= NULL
;
60 /* For each basic block, we maintain a generation number of its basic
61 block info, which is updated each time we move an insn from the
62 target of a jump. This is the generation number indexed by block
67 /* Marks registers possibly live at the current place being scanned by
68 mark_target_live_regs. Used only by next two function. */
70 static HARD_REG_SET current_live_regs
;
72 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
73 Also only used by the next two functions. */
75 static HARD_REG_SET pending_dead_regs
;
77 static void update_live_status
PROTO ((rtx
, rtx
, void *));
78 static int find_basic_block
PROTO ((rtx
));
79 static rtx next_insn_no_annul
PROTO ((rtx
));
80 static rtx find_dead_or_set_registers
PROTO ((rtx
, struct resources
*,
81 rtx
*, int, struct resources
,
84 /* Utility function called from mark_target_live_regs via note_stores.
85 It deadens any CLOBBERed registers and livens any SET registers. */
88 update_live_status (dest
, x
, data
)
91 void *data ATTRIBUTE_UNUSED
;
93 int first_regno
, last_regno
;
96 if (GET_CODE (dest
) != REG
97 && (GET_CODE (dest
) != SUBREG
|| GET_CODE (SUBREG_REG (dest
)) != REG
))
100 if (GET_CODE (dest
) == SUBREG
)
101 first_regno
= REGNO (SUBREG_REG (dest
)) + SUBREG_WORD (dest
);
103 first_regno
= REGNO (dest
);
105 last_regno
= first_regno
+ HARD_REGNO_NREGS (first_regno
, GET_MODE (dest
));
107 if (GET_CODE (x
) == CLOBBER
)
108 for (i
= first_regno
; i
< last_regno
; i
++)
109 CLEAR_HARD_REG_BIT (current_live_regs
, i
);
111 for (i
= first_regno
; i
< last_regno
; i
++)
113 SET_HARD_REG_BIT (current_live_regs
, i
);
114 CLEAR_HARD_REG_BIT (pending_dead_regs
, i
);
117 /* Find the number of the basic block that starts closest to INSN. Return -1
118 if we couldn't find such a basic block. */
121 find_basic_block (insn
)
126 /* Scan backwards to the previous BARRIER. Then see if we can find a
127 label that starts a basic block. Return the basic block number. */
129 for (insn
= prev_nonnote_insn (insn
);
130 insn
&& GET_CODE (insn
) != BARRIER
;
131 insn
= prev_nonnote_insn (insn
))
134 /* The start of the function is basic block zero. */
138 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
139 anything other than a CODE_LABEL or note, we can't find this code. */
140 for (insn
= next_nonnote_insn (insn
);
141 insn
&& GET_CODE (insn
) == CODE_LABEL
;
142 insn
= next_nonnote_insn (insn
))
144 for (i
= 0; i
< n_basic_blocks
; i
++)
145 if (insn
== BLOCK_HEAD (i
))
152 /* Similar to next_insn, but ignores insns in the delay slots of
153 an annulled branch. */
156 next_insn_no_annul (insn
)
161 /* If INSN is an annulled branch, skip any insns from the target
163 if (INSN_ANNULLED_BRANCH_P (insn
)
164 && NEXT_INSN (PREV_INSN (insn
)) != insn
)
165 while (INSN_FROM_TARGET_P (NEXT_INSN (insn
)))
166 insn
= NEXT_INSN (insn
);
168 insn
= NEXT_INSN (insn
);
169 if (insn
&& GET_CODE (insn
) == INSN
170 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
171 insn
= XVECEXP (PATTERN (insn
), 0, 0);
177 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
178 which resources are references by the insn. If INCLUDE_DELAYED_EFFECTS
179 is TRUE, resources used by the called routine will be included for
183 mark_referenced_resources (x
, res
, include_delayed_effects
)
185 register struct resources
*res
;
186 register int include_delayed_effects
;
188 register enum rtx_code code
= GET_CODE (x
);
190 register const char *format_ptr
;
192 /* Handle leaf items for which we set resource flags. Also, special-case
193 CALL, SET and CLOBBER operators. */
205 if (GET_CODE (SUBREG_REG (x
)) != REG
)
206 mark_referenced_resources (SUBREG_REG (x
), res
, 0);
209 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
210 int last_regno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
211 for (i
= regno
; i
< last_regno
; i
++)
212 SET_HARD_REG_BIT (res
->regs
, i
);
217 for (i
= 0; i
< HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
)); i
++)
218 SET_HARD_REG_BIT (res
->regs
, REGNO (x
) + i
);
222 /* If this memory shouldn't change, it really isn't referencing
224 if (RTX_UNCHANGING_P (x
))
225 res
->unch_memory
= 1;
228 res
->volatil
|= MEM_VOLATILE_P (x
);
230 /* Mark registers used to access memory. */
231 mark_referenced_resources (XEXP (x
, 0), res
, 0);
238 case UNSPEC_VOLATILE
:
240 /* Traditional asm's are always volatile. */
249 res
->volatil
|= MEM_VOLATILE_P (x
);
251 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
252 We can not just fall through here since then we would be confused
253 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
254 traditional asms unlike their normal usage. */
256 for (i
= 0; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
257 mark_referenced_resources (ASM_OPERANDS_INPUT (x
, i
), res
, 0);
261 /* The first operand will be a (MEM (xxx)) but doesn't really reference
262 memory. The second operand may be referenced, though. */
263 mark_referenced_resources (XEXP (XEXP (x
, 0), 0), res
, 0);
264 mark_referenced_resources (XEXP (x
, 1), res
, 0);
268 /* Usually, the first operand of SET is set, not referenced. But
269 registers used to access memory are referenced. SET_DEST is
270 also referenced if it is a ZERO_EXTRACT or SIGN_EXTRACT. */
272 mark_referenced_resources (SET_SRC (x
), res
, 0);
275 if (GET_CODE (x
) == SIGN_EXTRACT
|| GET_CODE (x
) == ZERO_EXTRACT
)
276 mark_referenced_resources (x
, res
, 0);
277 else if (GET_CODE (x
) == SUBREG
)
279 if (GET_CODE (x
) == MEM
)
280 mark_referenced_resources (XEXP (x
, 0), res
, 0);
287 if (include_delayed_effects
)
289 /* A CALL references memory, the frame pointer if it exists, the
290 stack pointer, any global registers and any registers given in
291 USE insns immediately in front of the CALL.
293 However, we may have moved some of the parameter loading insns
294 into the delay slot of this CALL. If so, the USE's for them
295 don't count and should be skipped. */
296 rtx insn
= PREV_INSN (x
);
299 rtx next
= NEXT_INSN (x
);
302 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
303 if (NEXT_INSN (insn
) != x
)
305 next
= NEXT_INSN (NEXT_INSN (insn
));
306 sequence
= PATTERN (NEXT_INSN (insn
));
307 seq_size
= XVECLEN (sequence
, 0);
308 if (GET_CODE (sequence
) != SEQUENCE
)
313 SET_HARD_REG_BIT (res
->regs
, STACK_POINTER_REGNUM
);
314 if (frame_pointer_needed
)
316 SET_HARD_REG_BIT (res
->regs
, FRAME_POINTER_REGNUM
);
317 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
318 SET_HARD_REG_BIT (res
->regs
, HARD_FRAME_POINTER_REGNUM
);
322 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
324 SET_HARD_REG_BIT (res
->regs
, i
);
326 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
327 assume that this call can need any register.
329 This is done to be more conservative about how we handle setjmp.
330 We assume that they both use and set all registers. Using all
331 registers ensures that a register will not be considered dead
332 just because it crosses a setjmp call. A register should be
333 considered dead only if the setjmp call returns non-zero. */
334 if (next
&& GET_CODE (next
) == NOTE
335 && NOTE_LINE_NUMBER (next
) == NOTE_INSN_SETJMP
)
336 SET_HARD_REG_SET (res
->regs
);
341 for (link
= CALL_INSN_FUNCTION_USAGE (x
);
343 link
= XEXP (link
, 1))
344 if (GET_CODE (XEXP (link
, 0)) == USE
)
346 for (i
= 1; i
< seq_size
; i
++)
348 rtx slot_pat
= PATTERN (XVECEXP (sequence
, 0, i
));
349 if (GET_CODE (slot_pat
) == SET
350 && rtx_equal_p (SET_DEST (slot_pat
),
351 SET_DEST (XEXP (link
, 0))))
355 mark_referenced_resources (SET_DEST (XEXP (link
, 0)),
361 /* ... fall through to other INSN processing ... */
366 #ifdef INSN_REFERENCES_ARE_DELAYED
367 if (! include_delayed_effects
368 && INSN_REFERENCES_ARE_DELAYED (x
))
372 /* No special processing, just speed up. */
373 mark_referenced_resources (PATTERN (x
), res
, include_delayed_effects
);
380 /* Process each sub-expression and flag what it needs. */
381 format_ptr
= GET_RTX_FORMAT (code
);
382 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
383 switch (*format_ptr
++)
386 mark_referenced_resources (XEXP (x
, i
), res
, include_delayed_effects
);
390 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
391 mark_referenced_resources (XVECEXP (x
, i
, j
), res
,
392 include_delayed_effects
);
397 /* A subroutine of mark_target_live_regs. Search forward from TARGET
398 looking for registers that are set before they are used. These are dead.
399 Stop after passing a few conditional jumps, and/or a small
400 number of unconditional branches. */
403 find_dead_or_set_registers (target
, res
, jump_target
, jump_count
, set
, needed
)
405 struct resources
*res
;
408 struct resources set
, needed
;
410 HARD_REG_SET scratch
;
415 for (insn
= target
; insn
; insn
= next
)
417 rtx this_jump_insn
= insn
;
419 next
= NEXT_INSN (insn
);
420 switch (GET_CODE (insn
))
423 /* After a label, any pending dead registers that weren't yet
424 used can be made dead. */
425 AND_COMPL_HARD_REG_SET (pending_dead_regs
, needed
.regs
);
426 AND_COMPL_HARD_REG_SET (res
->regs
, pending_dead_regs
);
427 CLEAR_HARD_REG_SET (pending_dead_regs
);
436 if (GET_CODE (PATTERN (insn
)) == USE
)
438 /* If INSN is a USE made by update_block, we care about the
439 underlying insn. Any registers set by the underlying insn
440 are live since the insn is being done somewhere else. */
441 if (GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn
), 0))) == 'i')
442 mark_set_resources (XEXP (PATTERN (insn
), 0), res
, 0, 1);
444 /* All other USE insns are to be ignored. */
447 else if (GET_CODE (PATTERN (insn
)) == CLOBBER
)
449 else if (GET_CODE (PATTERN (insn
)) == SEQUENCE
)
451 /* An unconditional jump can be used to fill the delay slot
452 of a call, so search for a JUMP_INSN in any position. */
453 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
455 this_jump_insn
= XVECEXP (PATTERN (insn
), 0, i
);
456 if (GET_CODE (this_jump_insn
) == JUMP_INSN
)
465 if (GET_CODE (this_jump_insn
) == JUMP_INSN
)
467 if (jump_count
++ < 10)
469 if (simplejump_p (this_jump_insn
)
470 || GET_CODE (PATTERN (this_jump_insn
)) == RETURN
)
472 next
= JUMP_LABEL (this_jump_insn
);
477 *jump_target
= JUMP_LABEL (this_jump_insn
);
480 else if (condjump_p (this_jump_insn
)
481 || condjump_in_parallel_p (this_jump_insn
))
483 struct resources target_set
, target_res
;
484 struct resources fallthrough_res
;
486 /* We can handle conditional branches here by following
487 both paths, and then IOR the results of the two paths
488 together, which will give us registers that are dead
489 on both paths. Since this is expensive, we give it
490 a much higher cost than unconditional branches. The
491 cost was chosen so that we will follow at most 1
492 conditional branch. */
495 if (jump_count
>= 10)
498 mark_referenced_resources (insn
, &needed
, 1);
500 /* For an annulled branch, mark_set_resources ignores slots
501 filled by instructions from the target. This is correct
502 if the branch is not taken. Since we are following both
503 paths from the branch, we must also compute correct info
504 if the branch is taken. We do this by inverting all of
505 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
506 and then inverting the INSN_FROM_TARGET_P bits again. */
508 if (GET_CODE (PATTERN (insn
)) == SEQUENCE
509 && INSN_ANNULLED_BRANCH_P (this_jump_insn
))
511 for (i
= 1; i
< XVECLEN (PATTERN (insn
), 0); i
++)
512 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
))
513 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
));
516 mark_set_resources (insn
, &target_set
, 0, 1);
518 for (i
= 1; i
< XVECLEN (PATTERN (insn
), 0); i
++)
519 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
))
520 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn
), 0, i
));
522 mark_set_resources (insn
, &set
, 0, 1);
526 mark_set_resources (insn
, &set
, 0, 1);
531 COPY_HARD_REG_SET (scratch
, target_set
.regs
);
532 AND_COMPL_HARD_REG_SET (scratch
, needed
.regs
);
533 AND_COMPL_HARD_REG_SET (target_res
.regs
, scratch
);
535 fallthrough_res
= *res
;
536 COPY_HARD_REG_SET (scratch
, set
.regs
);
537 AND_COMPL_HARD_REG_SET (scratch
, needed
.regs
);
538 AND_COMPL_HARD_REG_SET (fallthrough_res
.regs
, scratch
);
540 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn
),
541 &target_res
, 0, jump_count
,
543 find_dead_or_set_registers (next
,
544 &fallthrough_res
, 0, jump_count
,
546 IOR_HARD_REG_SET (fallthrough_res
.regs
, target_res
.regs
);
547 AND_HARD_REG_SET (res
->regs
, fallthrough_res
.regs
);
555 /* Don't try this optimization if we expired our jump count
556 above, since that would mean there may be an infinite loop
557 in the function being compiled. */
563 mark_referenced_resources (insn
, &needed
, 1);
564 mark_set_resources (insn
, &set
, 0, 1);
566 COPY_HARD_REG_SET (scratch
, set
.regs
);
567 AND_COMPL_HARD_REG_SET (scratch
, needed
.regs
);
568 AND_COMPL_HARD_REG_SET (res
->regs
, scratch
);
574 /* Given X, a part of an insn, and a pointer to a `struct resource',
575 RES, indicate which resources are modified by the insn. If
576 INCLUDE_DELAYED_EFFECTS is nonzero, also mark resources potentially
577 set by the called routine.
579 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
580 objects are being referenced instead of set.
582 We never mark the insn as modifying the condition code unless it explicitly
583 SETs CC0 even though this is not totally correct. The reason for this is
584 that we require a SET of CC0 to immediately precede the reference to CC0.
585 So if some other insn sets CC0 as a side-effect, we know it cannot affect
586 our computation and thus may be placed in a delay slot. */
589 mark_set_resources (x
, res
, in_dest
, include_delayed_effects
)
591 register struct resources
*res
;
593 int include_delayed_effects
;
595 register enum rtx_code code
;
597 register const char *format_ptr
;
615 /* These don't set any resources. */
624 /* Called routine modifies the condition code, memory, any registers
625 that aren't saved across calls, global registers and anything
626 explicitly CLOBBERed immediately after the CALL_INSN. */
628 if (include_delayed_effects
)
630 rtx next
= NEXT_INSN (x
);
631 rtx prev
= PREV_INSN (x
);
634 res
->cc
= res
->memory
= 1;
635 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
636 if (call_used_regs
[i
] || global_regs
[i
])
637 SET_HARD_REG_BIT (res
->regs
, i
);
639 /* If X is part of a delay slot sequence, then NEXT should be
640 the first insn after the sequence. */
641 if (NEXT_INSN (prev
) != x
)
642 next
= NEXT_INSN (NEXT_INSN (prev
));
644 for (link
= CALL_INSN_FUNCTION_USAGE (x
);
645 link
; link
= XEXP (link
, 1))
646 if (GET_CODE (XEXP (link
, 0)) == CLOBBER
)
647 mark_set_resources (SET_DEST (XEXP (link
, 0)), res
, 1, 0);
649 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
650 assume that this call can clobber any register. */
651 if (next
&& GET_CODE (next
) == NOTE
652 && NOTE_LINE_NUMBER (next
) == NOTE_INSN_SETJMP
)
653 SET_HARD_REG_SET (res
->regs
);
656 /* ... and also what its RTL says it modifies, if anything. */
661 /* An insn consisting of just a CLOBBER (or USE) is just for flow
662 and doesn't actually do anything, so we ignore it. */
664 #ifdef INSN_SETS_ARE_DELAYED
665 if (! include_delayed_effects
666 && INSN_SETS_ARE_DELAYED (x
))
671 if (GET_CODE (x
) != USE
&& GET_CODE (x
) != CLOBBER
)
676 /* If the source of a SET is a CALL, this is actually done by
677 the called routine. So only include it if we are to include the
678 effects of the calling routine. */
680 mark_set_resources (SET_DEST (x
), res
,
681 (include_delayed_effects
682 || GET_CODE (SET_SRC (x
)) != CALL
),
685 mark_set_resources (SET_SRC (x
), res
, 0, 0);
689 mark_set_resources (XEXP (x
, 0), res
, 1, 0);
693 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
694 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x
, 0, 0))
695 && INSN_FROM_TARGET_P (XVECEXP (x
, 0, i
))))
696 mark_set_resources (XVECEXP (x
, 0, i
), res
, 0,
697 include_delayed_effects
);
704 mark_set_resources (XEXP (x
, 0), res
, 1, 0);
708 mark_set_resources (XEXP (x
, 0), res
, in_dest
, 0);
709 mark_set_resources (XEXP (x
, 1), res
, 0, 0);
710 mark_set_resources (XEXP (x
, 2), res
, 0, 0);
717 res
->unch_memory
|= RTX_UNCHANGING_P (x
);
718 res
->volatil
|= MEM_VOLATILE_P (x
);
721 mark_set_resources (XEXP (x
, 0), res
, 0, 0);
727 if (GET_CODE (SUBREG_REG (x
)) != REG
)
728 mark_set_resources (SUBREG_REG (x
), res
,
729 in_dest
, include_delayed_effects
);
732 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
733 int last_regno
= regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (x
));
734 for (i
= regno
; i
< last_regno
; i
++)
735 SET_HARD_REG_BIT (res
->regs
, i
);
742 for (i
= 0; i
< HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
)); i
++)
743 SET_HARD_REG_BIT (res
->regs
, REGNO (x
) + i
);
746 case UNSPEC_VOLATILE
:
748 /* Traditional asm's are always volatile. */
757 res
->volatil
|= MEM_VOLATILE_P (x
);
759 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
760 We can not just fall through here since then we would be confused
761 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
762 traditional asms unlike their normal usage. */
764 for (i
= 0; i
< ASM_OPERANDS_INPUT_LENGTH (x
); i
++)
765 mark_set_resources (ASM_OPERANDS_INPUT (x
, i
), res
, in_dest
, 0);
772 /* Process each sub-expression and flag what it needs. */
773 format_ptr
= GET_RTX_FORMAT (code
);
774 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
775 switch (*format_ptr
++)
778 mark_set_resources (XEXP (x
, i
), res
, in_dest
, include_delayed_effects
);
782 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
783 mark_set_resources (XVECEXP (x
, i
, j
), res
, in_dest
,
784 include_delayed_effects
);
789 /* Set the resources that are live at TARGET.
791 If TARGET is zero, we refer to the end of the current function and can
792 return our precomputed value.
794 Otherwise, we try to find out what is live by consulting the basic block
795 information. This is tricky, because we must consider the actions of
796 reload and jump optimization, which occur after the basic block information
799 Accordingly, we proceed as follows::
801 We find the previous BARRIER and look at all immediately following labels
802 (with no intervening active insns) to see if any of them start a basic
803 block. If we hit the start of the function first, we use block 0.
805 Once we have found a basic block and a corresponding first insns, we can
806 accurately compute the live status from basic_block_live_regs and
807 reg_renumber. (By starting at a label following a BARRIER, we are immune
808 to actions taken by reload and jump.) Then we scan all insns between
809 that point and our target. For each CLOBBER (or for call-clobbered regs
810 when we pass a CALL_INSN), mark the appropriate registers are dead. For
811 a SET, mark them as live.
813 We have to be careful when using REG_DEAD notes because they are not
814 updated by such things as find_equiv_reg. So keep track of registers
815 marked as dead that haven't been assigned to, and mark them dead at the
816 next CODE_LABEL since reload and jump won't propagate values across labels.
818 If we cannot find the start of a basic block (should be a very rare
819 case, if it can happen at all), mark everything as potentially live.
821 Next, scan forward from TARGET looking for things set or clobbered
822 before they are used. These are not live.
824 Because we can be called many times on the same target, save our results
825 in a hash table indexed by INSN_UID. This is only done if the function
826 init_resource_info () was invoked before we are called. */
829 mark_target_live_regs (insns
, target
, res
)
832 struct resources
*res
;
836 struct target_info
*tinfo
= NULL
;
840 HARD_REG_SET scratch
;
841 struct resources set
, needed
;
843 /* Handle end of function. */
846 *res
= end_of_function_needs
;
850 /* We have to assume memory is needed, but the CC isn't. */
852 res
->volatil
= res
->unch_memory
= 0;
855 /* See if we have computed this value already. */
856 if (target_hash_table
!= NULL
)
858 for (tinfo
= target_hash_table
[INSN_UID (target
) % TARGET_HASH_PRIME
];
859 tinfo
; tinfo
= tinfo
->next
)
860 if (tinfo
->uid
== INSN_UID (target
))
863 /* Start by getting the basic block number. If we have saved
864 information, we can get it from there unless the insn at the
865 start of the basic block has been deleted. */
866 if (tinfo
&& tinfo
->block
!= -1
867 && ! INSN_DELETED_P (BLOCK_HEAD (tinfo
->block
)))
872 b
= find_basic_block (target
);
874 if (target_hash_table
!= NULL
)
878 /* If the information is up-to-date, use it. Otherwise, we will
880 if (b
== tinfo
->block
&& b
!= -1 && tinfo
->bb_tick
== bb_ticks
[b
])
882 COPY_HARD_REG_SET (res
->regs
, tinfo
->live_regs
);
888 /* Allocate a place to put our results and chain it into the
890 tinfo
= (struct target_info
*) oballoc (sizeof (struct target_info
));
891 tinfo
->uid
= INSN_UID (target
);
893 tinfo
->next
= target_hash_table
[INSN_UID (target
) % TARGET_HASH_PRIME
];
894 target_hash_table
[INSN_UID (target
) % TARGET_HASH_PRIME
] = tinfo
;
898 CLEAR_HARD_REG_SET (pending_dead_regs
);
900 /* If we found a basic block, get the live registers from it and update
901 them with anything set or killed between its start and the insn before
902 TARGET. Otherwise, we must assume everything is live. */
905 regset regs_live
= BASIC_BLOCK (b
)->global_live_at_start
;
908 rtx start_insn
, stop_insn
;
910 /* Compute hard regs live at start of block -- this is the real hard regs
911 marked live, plus live pseudo regs that have been renumbered to
914 REG_SET_TO_HARD_REG_SET (current_live_regs
, regs_live
);
916 EXECUTE_IF_SET_IN_REG_SET
917 (regs_live
, FIRST_PSEUDO_REGISTER
, i
,
919 if ((regno
= reg_renumber
[i
]) >= 0)
921 j
< regno
+ HARD_REGNO_NREGS (regno
,
922 PSEUDO_REGNO_MODE (i
));
924 SET_HARD_REG_BIT (current_live_regs
, j
);
927 /* Get starting and ending insn, handling the case where each might
929 start_insn
= (b
== 0 ? insns
: BLOCK_HEAD (b
));
932 if (GET_CODE (start_insn
) == INSN
933 && GET_CODE (PATTERN (start_insn
)) == SEQUENCE
)
934 start_insn
= XVECEXP (PATTERN (start_insn
), 0, 0);
936 if (GET_CODE (stop_insn
) == INSN
937 && GET_CODE (PATTERN (stop_insn
)) == SEQUENCE
)
938 stop_insn
= next_insn (PREV_INSN (stop_insn
));
940 for (insn
= start_insn
; insn
!= stop_insn
;
941 insn
= next_insn_no_annul (insn
))
944 rtx real_insn
= insn
;
946 /* If this insn is from the target of a branch, it isn't going to
947 be used in the sequel. If it is used in both cases, this
948 test will not be true. */
949 if (INSN_FROM_TARGET_P (insn
))
952 /* If this insn is a USE made by update_block, we care about the
954 if (GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == USE
955 && GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn
), 0))) == 'i')
956 real_insn
= XEXP (PATTERN (insn
), 0);
958 if (GET_CODE (real_insn
) == CALL_INSN
)
960 /* CALL clobbers all call-used regs that aren't fixed except
961 sp, ap, and fp. Do this before setting the result of the
963 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
964 if (call_used_regs
[i
]
965 && i
!= STACK_POINTER_REGNUM
&& i
!= FRAME_POINTER_REGNUM
966 && i
!= ARG_POINTER_REGNUM
967 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
968 && i
!= HARD_FRAME_POINTER_REGNUM
970 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
971 && ! (i
== ARG_POINTER_REGNUM
&& fixed_regs
[i
])
973 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
974 && ! (i
== PIC_OFFSET_TABLE_REGNUM
&& flag_pic
)
977 CLEAR_HARD_REG_BIT (current_live_regs
, i
);
979 /* A CALL_INSN sets any global register live, since it may
980 have been modified by the call. */
981 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
983 SET_HARD_REG_BIT (current_live_regs
, i
);
986 /* Mark anything killed in an insn to be deadened at the next
987 label. Ignore USE insns; the only REG_DEAD notes will be for
988 parameters. But they might be early. A CALL_INSN will usually
989 clobber registers used for parameters. It isn't worth bothering
990 with the unlikely case when it won't. */
991 if ((GET_CODE (real_insn
) == INSN
992 && GET_CODE (PATTERN (real_insn
)) != USE
993 && GET_CODE (PATTERN (real_insn
)) != CLOBBER
)
994 || GET_CODE (real_insn
) == JUMP_INSN
995 || GET_CODE (real_insn
) == CALL_INSN
)
997 for (link
= REG_NOTES (real_insn
); link
; link
= XEXP (link
, 1))
998 if (REG_NOTE_KIND (link
) == REG_DEAD
999 && GET_CODE (XEXP (link
, 0)) == REG
1000 && REGNO (XEXP (link
, 0)) < FIRST_PSEUDO_REGISTER
)
1002 int first_regno
= REGNO (XEXP (link
, 0));
1005 + HARD_REGNO_NREGS (first_regno
,
1006 GET_MODE (XEXP (link
, 0))));
1008 for (i
= first_regno
; i
< last_regno
; i
++)
1009 SET_HARD_REG_BIT (pending_dead_regs
, i
);
1012 note_stores (PATTERN (real_insn
), update_live_status
, NULL
);
1014 /* If any registers were unused after this insn, kill them.
1015 These notes will always be accurate. */
1016 for (link
= REG_NOTES (real_insn
); link
; link
= XEXP (link
, 1))
1017 if (REG_NOTE_KIND (link
) == REG_UNUSED
1018 && GET_CODE (XEXP (link
, 0)) == REG
1019 && REGNO (XEXP (link
, 0)) < FIRST_PSEUDO_REGISTER
)
1021 int first_regno
= REGNO (XEXP (link
, 0));
1024 + HARD_REGNO_NREGS (first_regno
,
1025 GET_MODE (XEXP (link
, 0))));
1027 for (i
= first_regno
; i
< last_regno
; i
++)
1028 CLEAR_HARD_REG_BIT (current_live_regs
, i
);
1032 else if (GET_CODE (real_insn
) == CODE_LABEL
)
1034 /* A label clobbers the pending dead registers since neither
1035 reload nor jump will propagate a value across a label. */
1036 AND_COMPL_HARD_REG_SET (current_live_regs
, pending_dead_regs
);
1037 CLEAR_HARD_REG_SET (pending_dead_regs
);
1040 /* The beginning of the epilogue corresponds to the end of the
1041 RTL chain when there are no epilogue insns. Certain resources
1042 are implicitly required at that point. */
1043 else if (GET_CODE (real_insn
) == NOTE
1044 && NOTE_LINE_NUMBER (real_insn
) == NOTE_INSN_EPILOGUE_BEG
)
1045 IOR_HARD_REG_SET (current_live_regs
, start_of_epilogue_needs
.regs
);
1048 COPY_HARD_REG_SET (res
->regs
, current_live_regs
);
1052 tinfo
->bb_tick
= bb_ticks
[b
];
1056 /* We didn't find the start of a basic block. Assume everything
1057 in use. This should happen only extremely rarely. */
1058 SET_HARD_REG_SET (res
->regs
);
1060 CLEAR_RESOURCE (&set
);
1061 CLEAR_RESOURCE (&needed
);
1063 jump_insn
= find_dead_or_set_registers (target
, res
, &jump_target
, 0,
1066 /* If we hit an unconditional branch, we have another way of finding out
1067 what is live: we can see what is live at the branch target and include
1068 anything used but not set before the branch. We add the live
1069 resources found using the test below to those found until now. */
1073 struct resources new_resources
;
1074 rtx stop_insn
= next_active_insn (jump_insn
);
1076 mark_target_live_regs (insns
, next_active_insn (jump_target
),
1078 CLEAR_RESOURCE (&set
);
1079 CLEAR_RESOURCE (&needed
);
1081 /* Include JUMP_INSN in the needed registers. */
1082 for (insn
= target
; insn
!= stop_insn
; insn
= next_active_insn (insn
))
1084 mark_referenced_resources (insn
, &needed
, 1);
1086 COPY_HARD_REG_SET (scratch
, needed
.regs
);
1087 AND_COMPL_HARD_REG_SET (scratch
, set
.regs
);
1088 IOR_HARD_REG_SET (new_resources
.regs
, scratch
);
1090 mark_set_resources (insn
, &set
, 0, 1);
1093 IOR_HARD_REG_SET (res
->regs
, new_resources
.regs
);
1098 COPY_HARD_REG_SET (tinfo
->live_regs
, res
->regs
);
1102 /* Initialize the resources required by mark_target_live_regs ().
1103 This should be invoked before the first call to mark_target_live_regs. */
1106 init_resource_info (epilogue_insn
)
1111 /* Indicate what resources are required to be valid at the end of the current
1112 function. The condition code never is and memory always is. If the
1113 frame pointer is needed, it is and so is the stack pointer unless
1114 EXIT_IGNORE_STACK is non-zero. If the frame pointer is not needed, the
1115 stack pointer is. Registers used to return the function value are
1116 needed. Registers holding global variables are needed. */
1118 end_of_function_needs
.cc
= 0;
1119 end_of_function_needs
.memory
= 1;
1120 end_of_function_needs
.unch_memory
= 0;
1121 CLEAR_HARD_REG_SET (end_of_function_needs
.regs
);
1123 if (frame_pointer_needed
)
1125 SET_HARD_REG_BIT (end_of_function_needs
.regs
, FRAME_POINTER_REGNUM
);
1126 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1127 SET_HARD_REG_BIT (end_of_function_needs
.regs
, HARD_FRAME_POINTER_REGNUM
);
1129 #ifdef EXIT_IGNORE_STACK
1130 if (! EXIT_IGNORE_STACK
1131 || current_function_sp_is_unchanging
)
1133 SET_HARD_REG_BIT (end_of_function_needs
.regs
, STACK_POINTER_REGNUM
);
1136 SET_HARD_REG_BIT (end_of_function_needs
.regs
, STACK_POINTER_REGNUM
);
1138 if (current_function_return_rtx
!= 0)
1139 mark_referenced_resources (current_function_return_rtx
,
1140 &end_of_function_needs
, 1);
1142 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1144 #ifdef EPILOGUE_USES
1145 || EPILOGUE_USES (i
)
1148 SET_HARD_REG_BIT (end_of_function_needs
.regs
, i
);
1150 /* The registers required to be live at the end of the function are
1151 represented in the flow information as being dead just prior to
1152 reaching the end of the function. For example, the return of a value
1153 might be represented by a USE of the return register immediately
1154 followed by an unconditional jump to the return label where the
1155 return label is the end of the RTL chain. The end of the RTL chain
1156 is then taken to mean that the return register is live.
1158 This sequence is no longer maintained when epilogue instructions are
1159 added to the RTL chain. To reconstruct the original meaning, the
1160 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1161 point where these registers become live (start_of_epilogue_needs).
1162 If epilogue instructions are present, the registers set by those
1163 instructions won't have been processed by flow. Thus, those
1164 registers are additionally required at the end of the RTL chain
1165 (end_of_function_needs). */
1167 start_of_epilogue_needs
= end_of_function_needs
;
1169 while ((epilogue_insn
= next_nonnote_insn (epilogue_insn
)))
1170 mark_set_resources (epilogue_insn
, &end_of_function_needs
, 0, 1);
1172 /* Allocate and initialize the tables used by mark_target_live_regs. */
1173 target_hash_table
= (struct target_info
**)
1174 xcalloc (TARGET_HASH_PRIME
, sizeof (struct target_info
*));
1175 bb_ticks
= (int *) xcalloc (n_basic_blocks
, sizeof (int));
1178 /* Free up the resources allcated to mark_target_live_regs (). This
1179 should be invoked after the last call to mark_target_live_regs (). */
1182 free_resource_info ()
1184 if (target_hash_table
!= NULL
)
1186 free (target_hash_table
);
1187 target_hash_table
= NULL
;
1190 if (bb_ticks
!= NULL
)
1197 /* Clear any hashed information that we have stored for INSN. */
1200 clear_hashed_info_for_insn (insn
)
1203 struct target_info
*tinfo
;
1205 if (target_hash_table
!= NULL
)
1207 for (tinfo
= target_hash_table
[INSN_UID (insn
) % TARGET_HASH_PRIME
];
1208 tinfo
; tinfo
= tinfo
->next
)
1209 if (tinfo
->uid
== INSN_UID (insn
))
1217 /* Increment the tick count for the basic block that contains INSN. */
1220 incr_ticks_for_insn (insn
)
1223 int b
= find_basic_block (insn
);
1229 /* Add TRIAL to the set of resources used at the end of the current
1232 mark_end_of_function_resources (trial
, include_delayed_effects
)
1234 int include_delayed_effects
;
1236 mark_referenced_resources (trial
, &end_of_function_needs
,
1237 include_delayed_effects
);
1240 /* Try to find a hard register of mode MODE, matching the register class in
1241 CLASS_STR, which is available at the beginning of insn CURRENT_INSN and
1242 remains available until the end of LAST_INSN. LAST_INSN may be NULL_RTX,
1243 in which case the only condition is that the register must be available
1244 before CURRENT_INSN.
1245 Registers that already have bits set in REG_SET will not be considered.
1247 If an appropriate register is available, it will be returned and the
1248 corresponding bit(s) in REG_SET will be set; otherwise, NULL_RTX is
1252 find_free_register (current_insn
, last_insn
, class_str
, mode
, reg_set
)
1253 rtx current_insn
, last_insn
;
1254 const char *class_str
;
1256 HARD_REG_SET
*reg_set
;
1259 struct resources used
;
1260 unsigned char clet
= class_str
[0];
1261 enum reg_class
class
1262 = (clet
== 'r' ? GENERAL_REGS
: REG_CLASS_FROM_LETTER (clet
));
1264 mark_target_live_regs (get_insns (), current_insn
, &used
);
1266 while (current_insn
!= last_insn
)
1268 /* Exclude anything set in this insn. */
1269 mark_set_resources (PATTERN (current_insn
), &used
, 0, 1);
1270 current_insn
= next_nonnote_insn (current_insn
);
1274 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1279 #ifdef REG_ALLOC_ORDER
1280 regno
= reg_alloc_order
[i
];
1285 /* Don't allocate fixed registers. */
1286 if (fixed_regs
[regno
])
1288 /* Make sure the register is of the right class. */
1289 if (! TEST_HARD_REG_BIT (reg_class_contents
[class], regno
))
1291 /* And can support the mode we need. */
1292 if (! HARD_REGNO_MODE_OK (regno
, mode
))
1294 /* And that we don't create an extra save/restore. */
1295 if (! call_used_regs
[regno
] && ! regs_ever_live
[regno
])
1297 /* And we don't clobber traceback for noreturn functions. */
1298 if ((regno
== FRAME_POINTER_REGNUM
|| regno
== HARD_FRAME_POINTER_REGNUM
)
1299 && (! reload_completed
|| frame_pointer_needed
))
1303 for (j
= HARD_REGNO_NREGS (regno
, mode
) - 1; j
>= 0; j
--)
1305 if (TEST_HARD_REG_BIT (*reg_set
, regno
+ j
)
1306 || TEST_HARD_REG_BIT (used
.regs
, regno
+ j
))
1314 for (j
= HARD_REGNO_NREGS (regno
, mode
) - 1; j
>= 0; j
--)
1316 SET_HARD_REG_BIT (*reg_set
, regno
+ j
);
1318 return gen_rtx_REG (mode
, regno
);
1324 /* Return true if REG is dead at CURRENT_INSN. */
1327 reg_dead_p (current_insn
, reg
)
1328 rtx current_insn
, reg
;
1330 struct resources used
;
1333 mark_target_live_regs (get_insns (), current_insn
, &used
);
1335 regno
= REGNO (reg
);
1336 for (j
= HARD_REGNO_NREGS (regno
, GET_MODE (reg
)) - 1; j
>= 0; j
--)
1338 if (TEST_HARD_REG_BIT (used
.regs
, regno
+ j
))