gcc/rtl.def

   1 /* This file contains the definitions and documentation for the
   2    Register Transfer Expressions (rtx's) that make up the
   3    Register Transfer Language (rtl) used in the Back End of the GNU compiler.
   4    Copyright (C) 1987-1991 Free Software Foundation, Inc.
   5
   6 This file is part of GNU CC.
   7
   8 GNU CC is free software; you can redistribute it and/or modify
   9 it under the terms of the GNU General Public License as published by
  10 the Free Software Foundation; either version 2, or (at your option)
  11 any later version.
  12
  13 GNU CC is distributed in the hope that it will be useful,
  14 but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 GNU General Public License for more details.
  17
  18 You should have received a copy of the GNU General Public License
  19 along with GNU CC; see the file COPYING.  If not, write to
  20 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
  21
  22
  23 /* Expression definitions and descriptions for all targets are in this file.
  24    Some will not be used for some targets.
  25
  26    The fields in the cpp macro call "DEF_RTL_EXPR()"
  27    are used to create declarations in the C source of the compiler.
  28
  29    The fields are:
  30
  31    1.  The internal name of the rtx used in the C source.
  32    It is a tag in the enumeration "enum rtx_code" defined in "rtl.h".
  33    By convention these are in UPPER_CASE.
  34
  35    2.  The name of the rtx in the external ASCII format read by
  36    read_rtx(), and printed by print_rtx().
  37    These names are stored in rtx_name[].
  38    By convention these are the internal (field 1) names in lower_case.
  39
  40    3.  The print format, and type of each rtx->fld[] (field) in this rtx.
  41    These formats are stored in rtx_format[].
  42    The meaning of the formats is documented in front of this array in rtl.c
  43
  44    4.  The class of the rtx.  These are stored in rtx_class and are accessed
  45    via the GET_RTX_CLASS macro.  They are defined as follows:
  46
  47      "o" an rtx code that can be used to represent an object (e.g, REG, MEM)
  48      "<" an rtx code for a comparison (e.g, EQ, NE, LT)
  49      "1" an rtx code for a unary arithmetic expression (e.g, NEG, NOT)
  50      "c" an rtx code for a commutative binary operation (e.g,, PLUS, MULT)
  51      "3" an rtx code for a non-bitfield three input operation (IF_THEN_ELSE)
  52      "2" an rtx code for a non-commutative binary operation (e.g., MINUS, DIV)
  53      "b" an rtx code for a bit-field operation (ZERO_EXTRACT, SIGN_EXTRACT)
  54      "i" an rtx code for a machine insn (INSN, JUMP_INSN, CALL_INSN)
  55      "m" an rtx code for something that matches in insns (e.g, MATCH_DUP)
  56      "x" everything else
  57
  58    */
  59
  60 /* ---------------------------------------------------------------------
  61    Expressions (and "meta" expressions) used for structuring the
  62    rtl representation of a program.
  63    --------------------------------------------------------------------- */
  64
  65 /* an expression code name unknown to the reader */
  66 DEF_RTL_EXPR(UNKNOWN, "UnKnown", "*", 'x')
  67
  68 /* (NIL) is used by rtl reader and printer to represent a null pointer.  */
  69
  70 DEF_RTL_EXPR(NIL, "nil", "*", 'x')
  71
  72 /* ---------------------------------------------------------------------
  73    Expressions used in constructing lists.
  74    --------------------------------------------------------------------- */
  75
  76 /* a linked list of expressions */
  77 DEF_RTL_EXPR(EXPR_LIST, "expr_list", "ee", 'x')
  78
  79 /* a linked list of instructions.
  80    The insns are represented in print by their uids.  */
  81 DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", 'x')
  82
  83 /* ----------------------------------------------------------------------
  84    Expression types for machine descripions.
  85    These do not appear in actual rtl code in the compiler.
  86    ---------------------------------------------------------------------- */
  87
  88 /* Appears only in machine descriptions.
  89    Means use the function named by the second arg (the string)
  90    as a predicate; if matched, store the structure that was matched
  91    in the operand table at index specified by the first arg (the integer).
  92    If the second arg is the null string, the structure is just stored.
  93
  94    A third string argument indicates to the register allocator restrictions
  95    on where the operand can be allocated.
  96
  97    If the target needs no restriction on any instruction this field should
  98    be the null string.
  99
 100    The string is prepended by:
 101    '=' to indicate the operand is only written to.
 102    '+' to indicate the operand is both read and written to.
 103
 104    Each character in the string represents an allocatable class for an operand.
 105    'g' indicates the operand can be any valid class.
 106    'i' indicates the operand can be immediate (in the instruction) data.
 107    'r' indicates the operand can be in a register.
 108    'm' indicates the operand can be in memory.
 109    'o' a subset of the 'm' class.  Those memory addressing modes that
 110        can be offset at compile time (have a constant added to them).
 111
 112    Other characters indicate target dependent operand classes and
 113    are described in each target's machine description.
 114
 115    For instructions with more than one operand, sets of classes can be
 116    separated by a comma to indicate the appropriate multi-operand constraints.
 117    There must be a 1 to 1 correspondence between these sets of classes in
 118    all operands for an instruction.
 119    */
 120 DEF_RTL_EXPR(MATCH_OPERAND, "match_operand", "iss", 'm')
 121
 122 /* Appears only in machine descriptions.
 123    Means match a SCRATCH or a register.  When used to generate rtl, a
 124    SCRATCH is generated.  As for MATCH_OPERAND, the mode specifies
 125    the desired mode and the first argument is the operand number.
 126    The second argument is the constraint.  */
 127 DEF_RTL_EXPR(MATCH_SCRATCH, "match_scratch", "is", 'm')
 128
 129 /* Appears only in machine descriptions.
 130    Means match only something equal to what is stored in the operand table
 131    at the index specified by the argument.  */
 132 DEF_RTL_EXPR(MATCH_DUP, "match_dup", "i", 'm')
 133
 134 /* Appears only in machine descriptions.
 135    Means apply a predicate, AND match recursively the operands of the rtx.
 136    Operand 0 is the operand-number, as in match_operand.
 137    Operand 1 is a predicate to apply (as a string, a function name).
 138    Operand 2 is a vector of expressions, each of which must match
 139    one subexpression of the rtx this construct is matching.  */
 140 DEF_RTL_EXPR(MATCH_OPERATOR, "match_operator", "isE", 'm')
 141
 142 /* Appears only in machine descriptions.
 143    Means to match a PARALLEL of arbitrary length.  The predicate is applied
 144    to the PARALLEL and the initial expressions in the PARALLEL are matched.
 145    Operand 0 is the operand-number, as in match_operand.
 146    Operand 1 is a predicate to apply to the PARALLEL.
 147    Operand 2 is a vector of expressions, each of which must match the
 148    corresponding element in the PARALLEL.  */
 149 DEF_RTL_EXPR(MATCH_PARALLEL, "match_parallel", "isE", 'm')
 150
 151 /* Appears only in machine descriptions.
 152    Means match only something equal to what is stored in the operand table
 153    at the index specified by the argument.  For MATCH_OPERATOR.  */
 154 DEF_RTL_EXPR(MATCH_OP_DUP, "match_op_dup", "iE", 'm')
 155
 156 /* Appears only in machine descriptions.
 157    Defines the pattern for one kind of instruction.
 158    Operand:
 159    0: names this instruction.
 160       If the name is the null string, the instruction is in the
 161       machine description just to be recognized, and will never be emitted by
 162       the tree to rtl expander.
 163    1: is the pattern.
 164    2: is a string which is a C expression
 165       giving an additional condition for recognizing this pattern.
 166       A null string means no extra condition.
 167    3: is the action to execute if this pattern is matched.
 168       If this assembler code template starts with a * then it is a fragment of
 169       C code to run to decide on a template to use.  Otherwise, it is the
 170       template to use.
 171    4: optionally, a vector of attributes for this insn.
 172      */
 173 DEF_RTL_EXPR(DEFINE_INSN, "define_insn", "sEssV", 'x')
 174
 175 /* Definition of a peephole optimization.
 176    1st operand: vector of insn patterns to match
 177    2nd operand: C expression that must be true
 178    3rd operand: template or C code to produce assembler output.
 179    4: optionally, a vector of attributes for this insn.
 180      */
 181 DEF_RTL_EXPR(DEFINE_PEEPHOLE, "define_peephole", "EssV", 'x')
 182
 183 /* Definition of a split operation.
 184    1st operand: insn pattern to match
 185    2nd operand: C expression that must be true
 186    3rd operand: vector of insn patterns to place into a SEQUENCE
 187    4th operand: optionally, some C code to execute before generating the
 188         insns.  This might, for example, create some RTX's and store them in
 189         elements of `recog_operand' for use by the vector of insn-patterns.
 190         (`operands' is an alias here for `recog_operand').   */
 191 DEF_RTL_EXPR(DEFINE_SPLIT, "define_split", "EsES", 'x')
 192
 193 /* Definition of a combiner pattern.
 194    Operands not defined yet.  */
 195 DEF_RTL_EXPR(DEFINE_COMBINE, "define_combine", "Ess", 'x')
 196
 197 /* Define how to generate multiple insns for a standard insn name.
 198    1st operand: the insn name.
 199    2nd operand: vector of insn-patterns.
 200         Use match_operand to substitute an element of `recog_operand'.
 201    3rd operand: C expression that must be true for this to be available.
 202         This may not test any operands.
 203    4th operand: Extra C code to execute before generating the insns.
 204         This might, for example, create some RTX's and store them in
 205         elements of `recog_operand' for use by the vector of insn-patterns.
 206         (`operands' is an alias here for `recog_operand').  */
 207 DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss", 'x')
 208
 209 /* Define a requirement for delay slots.
 210    1st operand: Condition involving insn attributes that, if true,
 211                 indicates that the insn requires the number of delay slots
 212                 shown.
 213    2nd operand: Vector whose length is the three times the number of delay
 214                 slots required.
 215                 Each entry gives three conditions, each involving attributes.
 216                 The first must be true for an insn to occupy that delay slot
 217                 location.  The second is true for all insns that can be
 218                 annulled if the branch is true and the third is true for all
 219                 insns that can be annulled if the branch is false.
 220
 221    Multiple DEFINE_DELAYs may be present.  They indicate differing
 222    requirements for delay slots.  */
 223 DEF_RTL_EXPR(DEFINE_DELAY, "define_delay", "eE", 'x')
 224
 225 /* Define a set of insns that requires a function unit.  This means that
 226    these insns produce their result after a delay and that there may be
 227    restrictions on the number of insns of this type that can be scheduled
 228    simultaneously.
 229
 230    More than one DEFINE_FUNCTION_UNIT can be specified for a function unit.
 231    Each gives a set of operations and associated delays.  The first three
 232    operands must be the same for each operation for the same function unit.
 233
 234    All delays are specified in units of COST_PER_CYCLE.
 235
 236    1st operand: Name of function unit (mostly for documentation)
 237    2nd operand: Number of identical function units in CPU
 238    3rd operand: Total number of simultaneous insns that can execute on this
 239                 function unit; 0 if unlimited.
 240    4th operand: Condition involving insn attribute, that, if true, specifies
 241                 those insns that this expression applies to.
 242    5th operand: Constant delay after which insn result will be
 243                 available.
 244    6th operand: Delay until next insn can be scheduled on the function unit
 245                 executing this operation.  The meaning depends on whether or
 246                 not the next operand is supplied.
 247    7th operand: If this operand is not specified, the 6th operand gives the
 248                 cost of scheduling another operation on this unit while a
 249                 previous one is active.  A value of zero should be used for a
 250                 pipelined unit.  If only one operation can be executed a time
 251                 and the unit is busy for the entire time, the 3rd operand
 252                 should be specified as 1 and the 6th and 7th operands will
 253                 be ignored.
 254
 255                 If this operand is specified, it is a list of attribute
 256                 expressions.  If an insn for which any of these expressions
 257                 is true is currently executing on the function unit, the
 258                 delay will be given by the 6th operand.  Otherwise, the
 259                 insn can be immediately scheduled (subject to the limit on
 260                 the number of simultaneous operations executing on the
 261                 unit.)  */
 262 DEF_RTL_EXPR(DEFINE_FUNCTION_UNIT, "define_function_unit", "siieiiV", 'x')
 263
 264 /* Define attribute computation for `asm' instructions.  */
 265 DEF_RTL_EXPR(DEFINE_ASM_ATTRIBUTES, "define_asm_attributes", "V", 'x' )
 266
 267 /* SEQUENCE appears in the result of a `gen_...' function
 268    for a DEFINE_EXPAND that wants to make several insns.
 269    Its elements are the bodies of the insns that should be made.
 270    `emit_insn' takes the SEQUENCE apart and makes separate insns.  */
 271 DEF_RTL_EXPR(SEQUENCE, "sequence", "E", 'x')
 272
 273 /* Refers to the address of its argument.
 274    This appears only in machine descriptions, indicating that
 275    any expression that would be acceptable as the operand of MEM
 276    should be matched.  */
 277 DEF_RTL_EXPR(ADDRESS, "address", "e", 'm')
 278
 279 /* ----------------------------------------------------------------------
 280    Expressions used for insn attributes.  These also do not appear in
 281    actual rtl code in the compiler.
 282    ---------------------------------------------------------------------- */
 283
 284 /* Definition of an insn attribute.
 285    1st operand: name of the attribute
 286    2nd operand: comma-separated list of possible attribute values
 287    3rd operand: expression for the default value of the attribute. */
 288 DEF_RTL_EXPR(DEFINE_ATTR, "define_attr", "sse", 'x')
 289
 290 /* Marker for the name of an attribute. */
 291 DEF_RTL_EXPR(ATTR, "attr", "s", 'x')
 292
 293 /* For use in the last (optional) operand of DEFINE_INSN or DEFINE_PEEPHOLE and
 294    in DEFINE_ASM_INSN to specify an attribute to assign to insns matching that
 295    pattern.
 296
 297    (set_attr "name" "value") is equivalent to
 298    (set (attr "name") (const_string "value"))  */
 299 DEF_RTL_EXPR(SET_ATTR, "set_attr", "ss", 'x')
 300
 301 /* In the last operand of DEFINE_INSN and DEFINE_PEEPHOLE, this can be used to
 302    specify that attribute values are to be assigned according to the
 303    alternative matched.
 304
 305    The following three expressions are equivalent:
 306
 307    (set (attr "att") (cond [(eq_attrq "alternative" "1") (const_string "a1")
 308                             (eq_attrq "alternative" "2") (const_string "a2")]
 309                            (const_string "a3")))
 310    (set_attr_alternative "att" [(const_string "a1") (const_string "a2")
 311                                  (const_string "a3")])
 312    (set_attr "att" "a1,a2,a3")
 313  */
 314 DEF_RTL_EXPR(SET_ATTR_ALTERNATIVE, "set_attr_alternative", "sE", 'x')
 315
 316 /* A conditional expression true if the value of the specified attribute of
 317    the current insn equals the specified value.  The first operand is the
 318    attribute name and the second is the comparison value.  */
 319 DEF_RTL_EXPR(EQ_ATTR, "eq_attr", "ss", 'x')
 320
 321 /* ----------------------------------------------------------------------
 322    Expression types used for things in the instruction chain.
 323
 324    All formats must start with "iuu" to handle the chain.
 325    Each insn expression holds an rtl instruction and its semantics
 326    during back-end processing.
 327    See macros's in "rtl.h" for the meaning of each rtx->fld[].
 328
 329    ---------------------------------------------------------------------- */
 330
 331 /* An instruction that cannot jump.  */
 332 DEF_RTL_EXPR(INSN, "insn", "iuueiee", 'i')
 333
 334 /* An instruction that can possibly jump.
 335    Fields ( rtx->fld[] ) have exact same meaning as INSN's.  */
 336 DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "iuueiee0", 'i')
 337
 338 /* An instruction that can possibly call a subroutine
 339    but which will not change which instruction comes next
 340    in the current function.
 341    Fields ( rtx->fld[] ) have exact same meaning as INSN's.  */
 342 DEF_RTL_EXPR(CALL_INSN, "call_insn", "iuueiee", 'i')
 343
 344 /* A marker that indicates that control will not flow through.  */
 345 DEF_RTL_EXPR(BARRIER, "barrier", "iuu", 'x')
 346
 347 /* Holds a label that is followed by instructions.
 348    Operand:
 349    3: is a number that is unique in the entire compilation.
 350    4: is the user-given name of the label, if any.
 351    5: is used in jump.c for the use-count of the label.
 352    and in flow.c to point to the chain of label_ref's to this label.  */
 353 DEF_RTL_EXPR(CODE_LABEL, "code_label", "iuuis0", 'x')
 354
 355 /* Say where in the code a source line starts, for symbol table's sake.
 356    Contains a filename and a line number.  Line numbers <= 0 are special:
 357    0 is used in a dummy placed at the front of every function
 358       just so there will never be a need to delete the first insn;
 359    -1 indicates a dummy; insns to be deleted by flow analysis and combining
 360       are really changed to NOTEs with a number of -1.
 361    -2 means beginning of a name binding contour; output N_LBRAC.
 362    -3 means end of a contour; output N_RBRAC.  */
 363 DEF_RTL_EXPR(NOTE, "note", "iuusn", 'x')
 364
 365 /* INLINE_HEADER is use by inline function machinery.  The information
 366    it contains helps to build the mapping function between the rtx's of
 367    the function to be inlined and the current function being expanded.  */
 368
 369 DEF_RTL_EXPR(INLINE_HEADER, "inline_header", "iuuuiiiiiieiiEe", 'x')
 370
 371 /* ----------------------------------------------------------------------
 372    Top level constituents of INSN, JUMP_INSN and CALL_INSN.
 373    ---------------------------------------------------------------------- */
 374
 375 /* Several operations to be done in parallel.  */
 376 DEF_RTL_EXPR(PARALLEL, "parallel", "E", 'x')
 377
 378 /* A string that is passed through to the assembler as input.
 379      One can obviously pass comments through by using the
 380      assembler comment syntax.
 381      These occur in an insn all by themselves as the PATTERN.
 382      They also appear inside an ASM_OPERANDS
 383      as a convenient way to hold a string.  */
 384 DEF_RTL_EXPR(ASM_INPUT, "asm_input", "s", 'x')
 385
 386 /* An assembler instruction with operands.
 387    1st operand is the instruction template.
 388    2nd operand is the constraint for the output.
 389    3rd operand is the number of the output this expression refers to.
 390      When an insn stores more than one value, a separate ASM_OPERANDS
 391      is made for each output; this integer distinguishes them.
 392    4th is a vector of values of input operands.
 393    5th is a vector of modes and constraints for the input operands.
 394      Each element is an ASM_INPUT containing a constraint string
 395      and whose mode indicates the mode of the input operand.
 396    6th is the name of the containing source file.
 397    7th is the source line number.  */
 398 DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEsi", 'x')
 399
 400 /* A machine-specific operation.
 401    1st operand is a vector of operands being used by the operation so that
 402      any needed reloads can be done.
 403    2nd operand is a unique value saying which of a number of machine-specific
 404      operations is to be performed.
 405    (Note that the vector must be the first operand because of the way that
 406    genrecog.c record positions within an insn.)
 407    This can occur all by itself in a PATTERN, as a component of a PARALLEL,
 408    or inside an expression.  */
 409 DEF_RTL_EXPR(UNSPEC, "unspec", "Ei", 'x')
 410
 411 /* Similiar, but a volatile operation and one which may trap.  */
 412 DEF_RTL_EXPR(UNSPEC_VOLATILE, "unspec_volatile", "Ei", 'x')
 413
 414 /* Vector of addresses, stored as full words.  */
 415 /* Each element is a LABEL_REF to a CODE_LABEL whose address we want.  */
 416 DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", 'x')
 417
 418 /* Vector of address differences X0 - BASE, X1 - BASE, ...
 419    First operand is BASE; the vector contains the X's.
 420    The machine mode of this rtx says how much space to leave
 421    for each difference.  */
 422 DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eE", 'x')
 423
 424 /* ----------------------------------------------------------------------
 425    At the top level of an instruction (perhaps under PARALLEL).
 426    ---------------------------------------------------------------------- */
 427
 428 /* Assignment.
 429    Operand 1 is the location (REG, MEM, PC, CC0 or whatever) assigned to.
 430    Operand 2 is the value stored there.
 431    ALL assignment must use SET.
 432    Instructions that do multiple assignments must use multiple SET,
 433    under PARALLEL.  */
 434 DEF_RTL_EXPR(SET, "set", "ee", 'x')
 435
 436 /* Indicate something is used in a way that we don't want to explain.
 437    For example, subroutine calls will use the register
 438    in which the static chain is passed.  */
 439 DEF_RTL_EXPR(USE, "use", "e", 'x')
 440
 441 /* Indicate something is clobbered in a way that we don't want to explain.
 442    For example, subroutine calls will clobber some physical registers
 443    (the ones that are by convention not saved).  */
 444 DEF_RTL_EXPR(CLOBBER, "clobber", "e", 'x')
 445
 446 /* Call a subroutine.
 447    Operand 1 is the address to call.
 448    Operand 2 is the number of arguments.  */
 449
 450 DEF_RTL_EXPR(CALL, "call", "ee", 'x')
 451
 452 /* Return from a subroutine.  */
 453
 454 DEF_RTL_EXPR(RETURN, "return", "", 'x')
 455
 456 /* Conditional trap.
 457    Operand 1 is the condition.
 458    Operand 2 is the trap code.
 459    For an unconditional trap, make the condition (const_int 1).  */
 460 DEF_RTL_EXPR(TRAP_IF, "trap_if", "ei", 'x')
 461
 462 /* ----------------------------------------------------------------------
 463    Primitive values for use in expressions.
 464    ---------------------------------------------------------------------- */
 465
 466 /* numeric integer constant */
 467 DEF_RTL_EXPR(CONST_INT, "const_int", "i", 'o')
 468
 469 /* numeric double constant.
 470    Operand 0 is the MEM that stores this constant in memory,
 471    or various other things (see comments at immed_double_const in varasm.c).
 472    Operand 1 is a chain of all CONST_DOUBLEs in use in the current function.
 473    Remaining operands hold the actual value.
 474    The number of operands may be more than 2 if cross-compiling;
 475    see init_rtl.  */
 476 DEF_RTL_EXPR(CONST_DOUBLE, "const_double", "e0ii", 'o')
 477
 478 /* String constant.  Used only for attributes right now.  */
 479 DEF_RTL_EXPR(CONST_STRING, "const_string", "s", 'o')
 480
 481 /* This is used to encapsulate an expression whose value is constant
 482    (such as the sum of a SYMBOL_REF and a CONST_INT) so that it will be
 483    recognized as a constant operand rather than by arithmetic instructions.  */
 484
 485 DEF_RTL_EXPR(CONST, "const", "e", 'o')
 486
 487 /* program counter.  Ordinary jumps are represented
 488    by a SET whose first operand is (PC).  */
 489 DEF_RTL_EXPR(PC, "pc", "", 'o')
 490
 491 /* A register.  The "operand" is the register number, accessed
 492    with the REGNO macro.  If this number is less than FIRST_PSEUDO_REGISTER
 493    than a hardware register is being referred to.  */
 494 DEF_RTL_EXPR(REG, "reg", "i", 'o')
 495
 496 /* A scratch register.  This represents a register used only within a
 497    single insn.  It will be turned into a REG during register allocation
 498    or reload unless the constraint indicates that the register won't be
 499    needed, in which case it can remain a SCRATCH.  This code is
 500    marked as having one operand so it can be turned into a REG.  */
 501 DEF_RTL_EXPR(SCRATCH, "scratch", "0", 'o')
 502
 503 /* One word of a multi-word value.
 504    The first operand is the complete value; the second says which word.
 505    The WORDS_BIG_ENDIAN flag controls whether word number 0
 506    (as numbered in a SUBREG) is the most or least significant word.
 507
 508    This is also used to refer to a value in a different machine mode.
 509    For example, it can be used to refer to a SImode value as if it were
 510    Qimode, or vice versa.  Then the word number is always 0.  */
 511 DEF_RTL_EXPR(SUBREG, "subreg", "ei", 'x')
 512
 513 /* This one-argument rtx is used for move instructions
 514    that are guaranteed to alter only the low part of a destination.
 515    Thus, (SET (SUBREG:HI (REG...)) (MEM:HI ...))
 516    has an unspecified effect on the high part of REG,
 517    but (SET (STRICT_LOW_PART (SUBREG:HI (REG...))) (MEM:HI ...))
 518    is guaranteed to alter only the bits of REG that are in HImode.
 519
 520    The actual instruction used is probably the same in both cases,
 521    but the register constraints may be tighter when STRICT_LOW_PART
 522    is in use.  */
 523
 524 DEF_RTL_EXPR(STRICT_LOW_PART, "strict_low_part", "e", 'x')
 525
 526 /* A memory location; operand is the address.
 527    Can be nested inside a VOLATILE.  */
 528 DEF_RTL_EXPR(MEM, "mem", "e", 'o')
 529
 530 /* Reference to an assembler label in the code for this function.
 531    The operand is a CODE_LABEL found in the insn chain.
 532    The unprinted fields 1 and 2 are used in flow.c for the
 533    LABEL_NEXTREF and CONTAINING_INSN.  */
 534 DEF_RTL_EXPR(LABEL_REF, "label_ref", "u00", 'o')
 535
 536 /* Reference to a named label: the string that is the first operand,
 537    with `_' added implicitly in front.
 538    Exception: if the first character explicitly given is `*',
 539    to give it to the assembler, remove the `*' and do not add `_'.  */
 540 DEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s", 'o')
 541
 542 /* The condition code register is represented, in our imagination,
 543    as a register holding a value that can be compared to zero.
 544    In fact, the machine has already compared them and recorded the
 545    results; but instructions that look at the condition code
 546    pretend to be looking at the entire value and comparing it.  */
 547 DEF_RTL_EXPR(CC0, "cc0", "", 'o')
 548
 549 /* =====================================================================
 550    A QUEUED expression really points to a member of the queue of instructions
 551    to be output later for postincrement/postdecrement.
 552    QUEUED expressions never become part of instructions.
 553    When a QUEUED expression would be put into an instruction,
 554    instead either the incremented variable or a copy of its previous
 555    value is used.
 556
 557    Operands are:
 558    0. the variable to be incremented (a REG rtx).
 559    1. the incrementing instruction, or 0 if it hasn't been output yet.
 560    2. A REG rtx for a copy of the old value of the variable, or 0 if none yet.
 561    3. the body to use for the incrementing instruction
 562    4. the next QUEUED expression in the queue.
 563    ====================================================================== */
 564
 565 DEF_RTL_EXPR(QUEUED, "queued", "eeeee", 'x')
 566
 567 /* ----------------------------------------------------------------------
 568    Expressions for operators in an rtl pattern
 569    ---------------------------------------------------------------------- */
 570
 571 /* if_then_else.  This is used in representing ordinary
 572    conditional jump instructions.
 573      Operand:
 574      0:  condition
 575      1:  then expr
 576      2:  else expr */
 577 DEF_RTL_EXPR(IF_THEN_ELSE, "if_then_else", "eee", '3')
 578
 579 /* General conditional. The first operand is a vector composed of pairs of
 580    expressions.  The first element of each pair is evaluated, in turn.
 581    The value of the conditional is the second expression of the first pair
 582    whose first expression evaluates non-zero.  If none of the expressions is
 583    true, the second operand will be used as the value of the conditional.
 584
 585    This should be replaced with use of IF_THEN_ELSE.  */
 586 DEF_RTL_EXPR(COND, "cond", "Ee", 'x')
 587
 588 /* Comparison, produces a condition code result.  */
 589 DEF_RTL_EXPR(COMPARE, "compare", "ee", '2')
 590
 591 /* plus */
 592 DEF_RTL_EXPR(PLUS, "plus", "ee", 'c')
 593
 594 /* Operand 0 minus operand 1.  */
 595 DEF_RTL_EXPR(MINUS, "minus", "ee", '2')
 596
 597 /* Minus operand 0.  */
 598 DEF_RTL_EXPR(NEG, "neg", "e", '1')
 599
 600 DEF_RTL_EXPR(MULT, "mult", "ee", 'c')
 601
 602 /* Operand 0 divided by operand 1.  */
 603 DEF_RTL_EXPR(DIV, "div", "ee", '2')
 604 /* Remainder of operand 0 divided by operand 1.  */
 605 DEF_RTL_EXPR(MOD, "mod", "ee", '2')
 606
 607 /* Unsigned divide and remainder.  */
 608 DEF_RTL_EXPR(UDIV, "udiv", "ee", '2')
 609 DEF_RTL_EXPR(UMOD, "umod", "ee", '2')
 610
 611 /* Bitwise operations.  */
 612 DEF_RTL_EXPR(AND, "and", "ee", 'c')
 613
 614 DEF_RTL_EXPR(IOR, "ior", "ee", 'c')
 615
 616 DEF_RTL_EXPR(XOR, "xor", "ee", 'c')
 617
 618 DEF_RTL_EXPR(NOT, "not", "e", '1')
 619
 620 /* Operand:
 621      0:  value to be shifted.
 622      1:  number of bits.
 623    ASHIFT and LSHIFT are distinguished because on some machines
 624    these allow a negative operand and shift right in that case.  */
 625 DEF_RTL_EXPR(LSHIFT, "lshift", "ee", '2')
 626 DEF_RTL_EXPR(ASHIFT, "ashift", "ee", '2')
 627 DEF_RTL_EXPR(ROTATE, "rotate", "ee", '2')
 628
 629 /* Right shift operations, for machines where these are not the same
 630    as left shifting with a negative argument.  */
 631
 632 DEF_RTL_EXPR(ASHIFTRT, "ashiftrt", "ee", '2')
 633 DEF_RTL_EXPR(LSHIFTRT, "lshiftrt", "ee", '2')
 634 DEF_RTL_EXPR(ROTATERT, "rotatert", "ee", '2')
 635
 636 /* Minimum and maximum values of two operands.  We need both signed and
 637    unsigned forms.  (We cannot use MIN for SMIN because it conflicts
 638    with a macro of the same name.) */
 639
 640 DEF_RTL_EXPR(SMIN, "smin", "ee", 'c')
 641 DEF_RTL_EXPR(SMAX, "smax", "ee", 'c')
 642 DEF_RTL_EXPR(UMIN, "umin", "ee", 'c')
 643 DEF_RTL_EXPR(UMAX, "umax", "ee", 'c')
 644
 645 /* These unary operations are used to represent incrementation
 646    and decrementation as they occur in memory addresses.
 647    The amount of increment or decrement are not represented
 648    because they can be understood from the machine-mode of the
 649    containing MEM.  These operations exist in only two cases:
 650    1. pushes onto the stack.
 651    2. created automatically by the life_analysis pass in flow.c.  */
 652 DEF_RTL_EXPR(PRE_DEC, "pre_dec", "e", 'x')
 653 DEF_RTL_EXPR(PRE_INC, "pre_inc", "e", 'x')
 654 DEF_RTL_EXPR(POST_DEC, "post_dec", "e", 'x')
 655 DEF_RTL_EXPR(POST_INC, "post_inc", "e", 'x')
 656
 657 /* Comparison operations.  The ordered comparisons exist in two
 658    flavors, signed and unsigned.  */
 659 DEF_RTL_EXPR(NE, "ne", "ee", '<')
 660 DEF_RTL_EXPR(EQ, "eq", "ee", '<')
 661 DEF_RTL_EXPR(GE, "ge", "ee", '<')
 662 DEF_RTL_EXPR(GT, "gt", "ee", '<')
 663 DEF_RTL_EXPR(LE, "le", "ee", '<')
 664 DEF_RTL_EXPR(LT, "lt", "ee", '<')
 665 DEF_RTL_EXPR(GEU, "geu", "ee", '<')
 666 DEF_RTL_EXPR(GTU, "gtu", "ee", '<')
 667 DEF_RTL_EXPR(LEU, "leu", "ee", '<')
 668 DEF_RTL_EXPR(LTU, "ltu", "ee", '<')
 669
 670 /* Represents the result of sign-extending the sole operand.
 671    The machine modes of the operand and of the SIGN_EXTEND expression
 672    determine how much sign-extension is going on.  */
 673 DEF_RTL_EXPR(SIGN_EXTEND, "sign_extend", "e", '1')
 674
 675 /* Similar for zero-extension (such as unsigned short to int).  */
 676 DEF_RTL_EXPR(ZERO_EXTEND, "zero_extend", "e", '1')
 677
 678 /* Similar but here the operand has a wider mode.  */
 679 DEF_RTL_EXPR(TRUNCATE, "truncate", "e", '1')
 680
 681 /* Similar for extending floating-point values (such as SFmode to DFmode).  */
 682 DEF_RTL_EXPR(FLOAT_EXTEND, "float_extend", "e", '1')
 683 DEF_RTL_EXPR(FLOAT_TRUNCATE, "float_truncate", "e", '1')
 684
 685 /* Conversion of fixed point operand to floating point value.  */
 686 DEF_RTL_EXPR(FLOAT, "float", "e", '1')
 687
 688 /* With fixed-point machine mode:
 689    Conversion of floating point operand to fixed point value.
 690    Value is defined only when the operand's value is an integer.
 691    With floating-point machine mode (and operand with same mode):
 692    Operand is rounded toward zero to produce an integer value
 693    represented in floating point.  */
 694 DEF_RTL_EXPR(FIX, "fix", "e", '1')
 695
 696 /* Conversion of unsigned fixed point operand to floating point value.  */
 697 DEF_RTL_EXPR(UNSIGNED_FLOAT, "unsigned_float", "e", '1')
 698
 699 /* With fixed-point machine mode:
 700    Conversion of floating point operand to *unsigned* fixed point value.
 701    Value is defined only when the operand's value is an integer.  */
 702 DEF_RTL_EXPR(UNSIGNED_FIX, "unsigned_fix", "e", '1')
 703
 704 /* Absolute value */
 705 DEF_RTL_EXPR(ABS, "abs", "e", '1')
 706
 707 /* Square root */
 708 DEF_RTL_EXPR(SQRT, "sqrt", "e", '1')
 709
 710 /* Find first bit that is set.
 711    Value is 1 + number of trailing zeros in the arg.,
 712    or 0 if arg is 0.  */
 713 DEF_RTL_EXPR(FFS, "ffs", "e", '1')
 714
 715 /* Reference to a signed bit-field of specified size and position.
 716    Operand 0 is the memory unit (usually SImode or QImode) which
 717    contains the field's first bit.  Operand 1 is the width, in bits.
 718    Operand 2 is the number of bits in the memory unit before the
 719    first bit of this field.
 720    If BITS_BIG_ENDIAN is defined, the first bit is the msb and
 721    operand 2 counts from the msb of the memory unit.
 722    Otherwise, the first bit is the lsb and operand 2 counts from
 723    the lsb of the memory unit.  */
 724 DEF_RTL_EXPR(SIGN_EXTRACT, "sign_extract", "eee", 'b')
 725
 726 /* Similar for unsigned bit-field.  */
 727 DEF_RTL_EXPR(ZERO_EXTRACT, "zero_extract", "eee", 'b')
 728
 729 /* For RISC machines.  These save memory when splitting insns.  */
 730
 731 /* HIGH are the high-order bits of a constant expression.  */
 732 DEF_RTL_EXPR(HIGH, "high", "e", 'o')
 733
 734 /* LO_SUM is the sum of a register and the low-order bits
 735    of a constant expression.  */
 736 DEF_RTL_EXPR(LO_SUM, "lo_sum", "ee", 'o')
 737
 738 /*
 739 Local variables:
 740 mode:c
 741 version-control: t
 742 End:
 743 */