1 /* Analyze RTL for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
26 #include "coretypes.h"
30 #include "hard-reg-set.h"
31 #include "insn-config.h"
41 /* Forward declarations */
42 static void set_of_1 (rtx
, rtx
, void *);
43 static bool covers_regno_p (rtx
, unsigned int);
44 static bool covers_regno_no_parallel_p (rtx
, unsigned int);
45 static int rtx_referenced_p_1 (rtx
*, void *);
46 static int computed_jump_p_1 (rtx
);
47 static void parms_set (rtx
, rtx
, void *);
49 static unsigned HOST_WIDE_INT
cached_nonzero_bits (rtx
, enum machine_mode
,
50 rtx
, enum machine_mode
,
51 unsigned HOST_WIDE_INT
);
52 static unsigned HOST_WIDE_INT
nonzero_bits1 (rtx
, enum machine_mode
, rtx
,
54 unsigned HOST_WIDE_INT
);
55 static unsigned int cached_num_sign_bit_copies (rtx
, enum machine_mode
, rtx
,
58 static unsigned int num_sign_bit_copies1 (rtx
, enum machine_mode
, rtx
,
59 enum machine_mode
, unsigned int);
61 /* Offset of the first 'e', 'E' or 'V' operand for each rtx code, or
62 -1 if a code has no such operand. */
63 static int non_rtx_starting_operands
[NUM_RTX_CODE
];
65 /* Bit flags that specify the machine subtype we are compiling for.
66 Bits are tested using macros TARGET_... defined in the tm.h file
67 and set by `-m...' switches. Must be defined in rtlanal.c. */
71 /* Return 1 if the value of X is unstable
72 (would be different at a different point in the program).
73 The frame pointer, arg pointer, etc. are considered stable
74 (within one function) and so is anything marked `unchanging'. */
77 rtx_unstable_p (rtx x
)
79 RTX_CODE code
= GET_CODE (x
);
86 return !MEM_READONLY_P (x
) || rtx_unstable_p (XEXP (x
, 0));
97 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
98 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
99 /* The arg pointer varies if it is not a fixed register. */
100 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
102 #ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
103 /* ??? When call-clobbered, the value is stable modulo the restore
104 that must happen after a call. This currently screws up local-alloc
105 into believing that the restore is not needed. */
106 if (x
== pic_offset_table_rtx
)
112 if (MEM_VOLATILE_P (x
))
121 fmt
= GET_RTX_FORMAT (code
);
122 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
125 if (rtx_unstable_p (XEXP (x
, i
)))
128 else if (fmt
[i
] == 'E')
131 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
132 if (rtx_unstable_p (XVECEXP (x
, i
, j
)))
139 /* Return 1 if X has a value that can vary even between two
140 executions of the program. 0 means X can be compared reliably
141 against certain constants or near-constants.
142 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
143 zero, we are slightly more conservative.
144 The frame pointer and the arg pointer are considered constant. */
147 rtx_varies_p (rtx x
, int for_alias
)
160 return !MEM_READONLY_P (x
) || rtx_varies_p (XEXP (x
, 0), for_alias
);
171 /* Note that we have to test for the actual rtx used for the frame
172 and arg pointers and not just the register number in case we have
173 eliminated the frame and/or arg pointer and are using it
175 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
176 /* The arg pointer varies if it is not a fixed register. */
177 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
179 if (x
== pic_offset_table_rtx
180 #ifdef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
181 /* ??? When call-clobbered, the value is stable modulo the restore
182 that must happen after a call. This currently screws up
183 local-alloc into believing that the restore is not needed, so we
184 must return 0 only if we are called from alias analysis. */
192 /* The operand 0 of a LO_SUM is considered constant
193 (in fact it is related specifically to operand 1)
194 during alias analysis. */
195 return (! for_alias
&& rtx_varies_p (XEXP (x
, 0), for_alias
))
196 || rtx_varies_p (XEXP (x
, 1), for_alias
);
199 if (MEM_VOLATILE_P (x
))
208 fmt
= GET_RTX_FORMAT (code
);
209 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
212 if (rtx_varies_p (XEXP (x
, i
), for_alias
))
215 else if (fmt
[i
] == 'E')
218 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
219 if (rtx_varies_p (XVECEXP (x
, i
, j
), for_alias
))
226 /* Return nonzero if the use of X as an address in a MEM can cause a trap.
227 MODE is the mode of the MEM (not that of X) and UNALIGNED_MEMS controls
228 whether nonzero is returned for unaligned memory accesses on strict
229 alignment machines. */
232 rtx_addr_can_trap_p_1 (rtx x
, enum machine_mode mode
, bool unaligned_mems
)
234 enum rtx_code code
= GET_CODE (x
);
239 return SYMBOL_REF_WEAK (x
);
245 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
246 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
247 || x
== stack_pointer_rtx
248 /* The arg pointer varies if it is not a fixed register. */
249 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
251 /* All of the virtual frame registers are stack references. */
252 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
253 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
258 return rtx_addr_can_trap_p_1 (XEXP (x
, 0), mode
, unaligned_mems
);
261 /* An address is assumed not to trap if:
262 - it is an address that can't trap plus a constant integer,
263 with the proper remainder modulo the mode size if we are
264 considering unaligned memory references. */
265 if (!rtx_addr_can_trap_p_1 (XEXP (x
, 0), mode
, unaligned_mems
)
266 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
268 HOST_WIDE_INT offset
;
270 if (!STRICT_ALIGNMENT
272 || GET_MODE_SIZE (mode
) == 0)
275 offset
= INTVAL (XEXP (x
, 1));
277 #ifdef SPARC_STACK_BOUNDARY_HACK
278 /* ??? The SPARC port may claim a STACK_BOUNDARY higher than
279 the real alignment of %sp. However, when it does this, the
280 alignment of %sp+STACK_POINTER_OFFSET is STACK_BOUNDARY. */
281 if (SPARC_STACK_BOUNDARY_HACK
282 && (XEXP (x
, 0) == stack_pointer_rtx
283 || XEXP (x
, 0) == hard_frame_pointer_rtx
))
284 offset
-= STACK_POINTER_OFFSET
;
287 return offset
% GET_MODE_SIZE (mode
) != 0;
290 /* - or it is the pic register plus a constant. */
291 if (XEXP (x
, 0) == pic_offset_table_rtx
&& CONSTANT_P (XEXP (x
, 1)))
298 return rtx_addr_can_trap_p_1 (XEXP (x
, 1), mode
, unaligned_mems
);
305 return rtx_addr_can_trap_p_1 (XEXP (x
, 0), mode
, unaligned_mems
);
311 /* If it isn't one of the case above, it can cause a trap. */
315 /* Return nonzero if the use of X as an address in a MEM can cause a trap. */
318 rtx_addr_can_trap_p (rtx x
)
320 return rtx_addr_can_trap_p_1 (x
, VOIDmode
, false);
323 /* Return true if X is an address that is known to not be zero. */
326 nonzero_address_p (rtx x
)
328 enum rtx_code code
= GET_CODE (x
);
333 return !SYMBOL_REF_WEAK (x
);
339 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
340 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
341 || x
== stack_pointer_rtx
342 || (x
== arg_pointer_rtx
&& fixed_regs
[ARG_POINTER_REGNUM
]))
344 /* All of the virtual frame registers are stack references. */
345 if (REGNO (x
) >= FIRST_VIRTUAL_REGISTER
346 && REGNO (x
) <= LAST_VIRTUAL_REGISTER
)
351 return nonzero_address_p (XEXP (x
, 0));
354 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
356 /* Pointers aren't allowed to wrap. If we've got a register
357 that is known to be a pointer, and a positive offset, then
358 the composite can't be zero. */
359 if (INTVAL (XEXP (x
, 1)) > 0
360 && REG_P (XEXP (x
, 0))
361 && REG_POINTER (XEXP (x
, 0)))
364 return nonzero_address_p (XEXP (x
, 0));
366 /* Handle PIC references. */
367 else if (XEXP (x
, 0) == pic_offset_table_rtx
368 && CONSTANT_P (XEXP (x
, 1)))
373 /* Similar to the above; allow positive offsets. Further, since
374 auto-inc is only allowed in memories, the register must be a
376 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
377 && INTVAL (XEXP (x
, 1)) > 0)
379 return nonzero_address_p (XEXP (x
, 0));
382 /* Similarly. Further, the offset is always positive. */
389 return nonzero_address_p (XEXP (x
, 0));
392 return nonzero_address_p (XEXP (x
, 1));
398 /* If it isn't one of the case above, might be zero. */
402 /* Return 1 if X refers to a memory location whose address
403 cannot be compared reliably with constant addresses,
404 or if X refers to a BLKmode memory object.
405 FOR_ALIAS is nonzero if we are called from alias analysis; if it is
406 zero, we are slightly more conservative. */
409 rtx_addr_varies_p (rtx x
, int for_alias
)
420 return GET_MODE (x
) == BLKmode
|| rtx_varies_p (XEXP (x
, 0), for_alias
);
422 fmt
= GET_RTX_FORMAT (code
);
423 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
426 if (rtx_addr_varies_p (XEXP (x
, i
), for_alias
))
429 else if (fmt
[i
] == 'E')
432 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
433 if (rtx_addr_varies_p (XVECEXP (x
, i
, j
), for_alias
))
439 /* Return the value of the integer term in X, if one is apparent;
441 Only obvious integer terms are detected.
442 This is used in cse.c with the `related_value' field. */
445 get_integer_term (rtx x
)
447 if (GET_CODE (x
) == CONST
)
450 if (GET_CODE (x
) == MINUS
451 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
452 return - INTVAL (XEXP (x
, 1));
453 if (GET_CODE (x
) == PLUS
454 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
455 return INTVAL (XEXP (x
, 1));
459 /* If X is a constant, return the value sans apparent integer term;
461 Only obvious integer terms are detected. */
464 get_related_value (rtx x
)
466 if (GET_CODE (x
) != CONST
)
469 if (GET_CODE (x
) == PLUS
470 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
472 else if (GET_CODE (x
) == MINUS
473 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
478 /* Return the number of places FIND appears within X. If COUNT_DEST is
479 zero, we do not count occurrences inside the destination of a SET. */
482 count_occurrences (rtx x
, rtx find
, int count_dest
)
486 const char *format_ptr
;
507 if (MEM_P (find
) && rtx_equal_p (x
, find
))
512 if (SET_DEST (x
) == find
&& ! count_dest
)
513 return count_occurrences (SET_SRC (x
), find
, count_dest
);
520 format_ptr
= GET_RTX_FORMAT (code
);
523 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
525 switch (*format_ptr
++)
528 count
+= count_occurrences (XEXP (x
, i
), find
, count_dest
);
532 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
533 count
+= count_occurrences (XVECEXP (x
, i
, j
), find
, count_dest
);
540 /* Nonzero if register REG appears somewhere within IN.
541 Also works if REG is not a register; in this case it checks
542 for a subexpression of IN that is Lisp "equal" to REG. */
545 reg_mentioned_p (rtx reg
, rtx in
)
557 if (GET_CODE (in
) == LABEL_REF
)
558 return reg
== XEXP (in
, 0);
560 code
= GET_CODE (in
);
564 /* Compare registers by number. */
566 return REG_P (reg
) && REGNO (in
) == REGNO (reg
);
568 /* These codes have no constituent expressions
578 /* These are kept unique for a given value. */
585 if (GET_CODE (reg
) == code
&& rtx_equal_p (reg
, in
))
588 fmt
= GET_RTX_FORMAT (code
);
590 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
595 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; j
--)
596 if (reg_mentioned_p (reg
, XVECEXP (in
, i
, j
)))
599 else if (fmt
[i
] == 'e'
600 && reg_mentioned_p (reg
, XEXP (in
, i
)))
606 /* Return 1 if in between BEG and END, exclusive of BEG and END, there is
607 no CODE_LABEL insn. */
610 no_labels_between_p (rtx beg
, rtx end
)
615 for (p
= NEXT_INSN (beg
); p
!= end
; p
= NEXT_INSN (p
))
621 /* Nonzero if register REG is used in an insn between
622 FROM_INSN and TO_INSN (exclusive of those two). */
625 reg_used_between_p (rtx reg
, rtx from_insn
, rtx to_insn
)
629 if (from_insn
== to_insn
)
632 for (insn
= NEXT_INSN (from_insn
); insn
!= to_insn
; insn
= NEXT_INSN (insn
))
634 && (reg_overlap_mentioned_p (reg
, PATTERN (insn
))
635 || (CALL_P (insn
) && find_reg_fusage (insn
, USE
, reg
))))
640 /* Nonzero if the old value of X, a register, is referenced in BODY. If X
641 is entirely replaced by a new value and the only use is as a SET_DEST,
642 we do not consider it a reference. */
645 reg_referenced_p (rtx x
, rtx body
)
649 switch (GET_CODE (body
))
652 if (reg_overlap_mentioned_p (x
, SET_SRC (body
)))
655 /* If the destination is anything other than CC0, PC, a REG or a SUBREG
656 of a REG that occupies all of the REG, the insn references X if
657 it is mentioned in the destination. */
658 if (GET_CODE (SET_DEST (body
)) != CC0
659 && GET_CODE (SET_DEST (body
)) != PC
660 && !REG_P (SET_DEST (body
))
661 && ! (GET_CODE (SET_DEST (body
)) == SUBREG
662 && REG_P (SUBREG_REG (SET_DEST (body
)))
663 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body
))))
664 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)
665 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body
)))
666 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
)))
667 && reg_overlap_mentioned_p (x
, SET_DEST (body
)))
672 for (i
= ASM_OPERANDS_INPUT_LENGTH (body
) - 1; i
>= 0; i
--)
673 if (reg_overlap_mentioned_p (x
, ASM_OPERANDS_INPUT (body
, i
)))
680 return reg_overlap_mentioned_p (x
, body
);
683 return reg_overlap_mentioned_p (x
, TRAP_CONDITION (body
));
686 return reg_overlap_mentioned_p (x
, XEXP (body
, 0));
689 case UNSPEC_VOLATILE
:
690 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
691 if (reg_overlap_mentioned_p (x
, XVECEXP (body
, 0, i
)))
696 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
697 if (reg_referenced_p (x
, XVECEXP (body
, 0, i
)))
702 if (MEM_P (XEXP (body
, 0)))
703 if (reg_overlap_mentioned_p (x
, XEXP (XEXP (body
, 0), 0)))
708 if (reg_overlap_mentioned_p (x
, COND_EXEC_TEST (body
)))
710 return reg_referenced_p (x
, COND_EXEC_CODE (body
));
717 /* Nonzero if register REG is set or clobbered in an insn between
718 FROM_INSN and TO_INSN (exclusive of those two). */
721 reg_set_between_p (rtx reg
, rtx from_insn
, rtx to_insn
)
725 if (from_insn
== to_insn
)
728 for (insn
= NEXT_INSN (from_insn
); insn
!= to_insn
; insn
= NEXT_INSN (insn
))
729 if (INSN_P (insn
) && reg_set_p (reg
, insn
))
734 /* Internals of reg_set_between_p. */
736 reg_set_p (rtx reg
, rtx insn
)
738 /* We can be passed an insn or part of one. If we are passed an insn,
739 check if a side-effect of the insn clobbers REG. */
741 && (FIND_REG_INC_NOTE (insn
, reg
)
744 && REGNO (reg
) < FIRST_PSEUDO_REGISTER
745 && TEST_HARD_REG_BIT (regs_invalidated_by_call
,
748 || find_reg_fusage (insn
, CLOBBER
, reg
)))))
751 return set_of (reg
, insn
) != NULL_RTX
;
754 /* Similar to reg_set_between_p, but check all registers in X. Return 0
755 only if none of them are modified between START and END. Return 1 if
756 X contains a MEM; this routine does usememory aliasing. */
759 modified_between_p (rtx x
, rtx start
, rtx end
)
761 enum rtx_code code
= GET_CODE (x
);
784 if (modified_between_p (XEXP (x
, 0), start
, end
))
786 if (MEM_READONLY_P (x
))
788 for (insn
= NEXT_INSN (start
); insn
!= end
; insn
= NEXT_INSN (insn
))
789 if (memory_modified_in_insn_p (x
, insn
))
795 return reg_set_between_p (x
, start
, end
);
801 fmt
= GET_RTX_FORMAT (code
);
802 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
804 if (fmt
[i
] == 'e' && modified_between_p (XEXP (x
, i
), start
, end
))
807 else if (fmt
[i
] == 'E')
808 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
809 if (modified_between_p (XVECEXP (x
, i
, j
), start
, end
))
816 /* Similar to reg_set_p, but check all registers in X. Return 0 only if none
817 of them are modified in INSN. Return 1 if X contains a MEM; this routine
818 does use memory aliasing. */
821 modified_in_p (rtx x
, rtx insn
)
823 enum rtx_code code
= GET_CODE (x
);
842 if (modified_in_p (XEXP (x
, 0), insn
))
844 if (MEM_READONLY_P (x
))
846 if (memory_modified_in_insn_p (x
, insn
))
852 return reg_set_p (x
, insn
);
858 fmt
= GET_RTX_FORMAT (code
);
859 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
861 if (fmt
[i
] == 'e' && modified_in_p (XEXP (x
, i
), insn
))
864 else if (fmt
[i
] == 'E')
865 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
866 if (modified_in_p (XVECEXP (x
, i
, j
), insn
))
873 /* Helper function for set_of. */
881 set_of_1 (rtx x
, rtx pat
, void *data1
)
883 struct set_of_data
*data
= (struct set_of_data
*) (data1
);
884 if (rtx_equal_p (x
, data
->pat
)
885 || (!MEM_P (x
) && reg_overlap_mentioned_p (data
->pat
, x
)))
889 /* Give an INSN, return a SET or CLOBBER expression that does modify PAT
890 (either directly or via STRICT_LOW_PART and similar modifiers). */
892 set_of (rtx pat
, rtx insn
)
894 struct set_of_data data
;
895 data
.found
= NULL_RTX
;
897 note_stores (INSN_P (insn
) ? PATTERN (insn
) : insn
, set_of_1
, &data
);
901 /* Given an INSN, return a SET expression if this insn has only a single SET.
902 It may also have CLOBBERs, USEs, or SET whose output
903 will not be used, which we ignore. */
906 single_set_2 (rtx insn
, rtx pat
)
909 int set_verified
= 1;
912 if (GET_CODE (pat
) == PARALLEL
)
914 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
916 rtx sub
= XVECEXP (pat
, 0, i
);
917 switch (GET_CODE (sub
))
924 /* We can consider insns having multiple sets, where all
925 but one are dead as single set insns. In common case
926 only single set is present in the pattern so we want
927 to avoid checking for REG_UNUSED notes unless necessary.
929 When we reach set first time, we just expect this is
930 the single set we are looking for and only when more
931 sets are found in the insn, we check them. */
934 if (find_reg_note (insn
, REG_UNUSED
, SET_DEST (set
))
935 && !side_effects_p (set
))
941 set
= sub
, set_verified
= 0;
942 else if (!find_reg_note (insn
, REG_UNUSED
, SET_DEST (sub
))
943 || side_effects_p (sub
))
955 /* Given an INSN, return nonzero if it has more than one SET, else return
959 multiple_sets (rtx insn
)
964 /* INSN must be an insn. */
968 /* Only a PARALLEL can have multiple SETs. */
969 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
971 for (i
= 0, found
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
972 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
974 /* If we have already found a SET, then return now. */
982 /* Either zero or one SET. */
986 /* Return nonzero if the destination of SET equals the source
987 and there are no side effects. */
992 rtx src
= SET_SRC (set
);
993 rtx dst
= SET_DEST (set
);
995 if (dst
== pc_rtx
&& src
== pc_rtx
)
998 if (MEM_P (dst
) && MEM_P (src
))
999 return rtx_equal_p (dst
, src
) && !side_effects_p (dst
);
1001 if (GET_CODE (dst
) == ZERO_EXTRACT
)
1002 return rtx_equal_p (XEXP (dst
, 0), src
)
1003 && ! BYTES_BIG_ENDIAN
&& XEXP (dst
, 2) == const0_rtx
1004 && !side_effects_p (src
);
1006 if (GET_CODE (dst
) == STRICT_LOW_PART
)
1007 dst
= XEXP (dst
, 0);
1009 if (GET_CODE (src
) == SUBREG
&& GET_CODE (dst
) == SUBREG
)
1011 if (SUBREG_BYTE (src
) != SUBREG_BYTE (dst
))
1013 src
= SUBREG_REG (src
);
1014 dst
= SUBREG_REG (dst
);
1017 return (REG_P (src
) && REG_P (dst
)
1018 && REGNO (src
) == REGNO (dst
));
1021 /* Return nonzero if an insn consists only of SETs, each of which only sets a
1025 noop_move_p (rtx insn
)
1027 rtx pat
= PATTERN (insn
);
1029 if (INSN_CODE (insn
) == NOOP_MOVE_INSN_CODE
)
1032 /* Insns carrying these notes are useful later on. */
1033 if (find_reg_note (insn
, REG_EQUAL
, NULL_RTX
))
1036 /* For now treat an insn with a REG_RETVAL note as a
1037 a special insn which should not be considered a no-op. */
1038 if (find_reg_note (insn
, REG_RETVAL
, NULL_RTX
))
1041 if (GET_CODE (pat
) == SET
&& set_noop_p (pat
))
1044 if (GET_CODE (pat
) == PARALLEL
)
1047 /* If nothing but SETs of registers to themselves,
1048 this insn can also be deleted. */
1049 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
1051 rtx tem
= XVECEXP (pat
, 0, i
);
1053 if (GET_CODE (tem
) == USE
1054 || GET_CODE (tem
) == CLOBBER
)
1057 if (GET_CODE (tem
) != SET
|| ! set_noop_p (tem
))
1067 /* Return the last thing that X was assigned from before *PINSN. If VALID_TO
1068 is not NULL_RTX then verify that the object is not modified up to VALID_TO.
1069 If the object was modified, if we hit a partial assignment to X, or hit a
1070 CODE_LABEL first, return X. If we found an assignment, update *PINSN to
1071 point to it. ALLOW_HWREG is set to 1 if hardware registers are allowed to
1075 find_last_value (rtx x
, rtx
*pinsn
, rtx valid_to
, int allow_hwreg
)
1079 for (p
= PREV_INSN (*pinsn
); p
&& !LABEL_P (p
);
1083 rtx set
= single_set (p
);
1084 rtx note
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
1086 if (set
&& rtx_equal_p (x
, SET_DEST (set
)))
1088 rtx src
= SET_SRC (set
);
1090 if (note
&& GET_CODE (XEXP (note
, 0)) != EXPR_LIST
)
1091 src
= XEXP (note
, 0);
1093 if ((valid_to
== NULL_RTX
1094 || ! modified_between_p (src
, PREV_INSN (p
), valid_to
))
1095 /* Reject hard registers because we don't usually want
1096 to use them; we'd rather use a pseudo. */
1098 && REGNO (src
) < FIRST_PSEUDO_REGISTER
) || allow_hwreg
))
1105 /* If set in non-simple way, we don't have a value. */
1106 if (reg_set_p (x
, p
))
1113 /* Return nonzero if register in range [REGNO, ENDREGNO)
1114 appears either explicitly or implicitly in X
1115 other than being stored into.
1117 References contained within the substructure at LOC do not count.
1118 LOC may be zero, meaning don't ignore anything. */
1121 refers_to_regno_p (unsigned int regno
, unsigned int endregno
, rtx x
,
1125 unsigned int x_regno
;
1130 /* The contents of a REG_NONNEG note is always zero, so we must come here
1131 upon repeat in case the last REG_NOTE is a REG_NONNEG note. */
1135 code
= GET_CODE (x
);
1140 x_regno
= REGNO (x
);
1142 /* If we modifying the stack, frame, or argument pointer, it will
1143 clobber a virtual register. In fact, we could be more precise,
1144 but it isn't worth it. */
1145 if ((x_regno
== STACK_POINTER_REGNUM
1146 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1147 || x_regno
== ARG_POINTER_REGNUM
1149 || x_regno
== FRAME_POINTER_REGNUM
)
1150 && regno
>= FIRST_VIRTUAL_REGISTER
&& regno
<= LAST_VIRTUAL_REGISTER
)
1153 return (endregno
> x_regno
1154 && regno
< x_regno
+ (x_regno
< FIRST_PSEUDO_REGISTER
1155 ? hard_regno_nregs
[x_regno
][GET_MODE (x
)]
1159 /* If this is a SUBREG of a hard reg, we can see exactly which
1160 registers are being modified. Otherwise, handle normally. */
1161 if (REG_P (SUBREG_REG (x
))
1162 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
1164 unsigned int inner_regno
= subreg_regno (x
);
1165 unsigned int inner_endregno
1166 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
1167 ? hard_regno_nregs
[inner_regno
][GET_MODE (x
)] : 1);
1169 return endregno
> inner_regno
&& regno
< inner_endregno
;
1175 if (&SET_DEST (x
) != loc
1176 /* Note setting a SUBREG counts as referring to the REG it is in for
1177 a pseudo but not for hard registers since we can
1178 treat each word individually. */
1179 && ((GET_CODE (SET_DEST (x
)) == SUBREG
1180 && loc
!= &SUBREG_REG (SET_DEST (x
))
1181 && REG_P (SUBREG_REG (SET_DEST (x
)))
1182 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
1183 && refers_to_regno_p (regno
, endregno
,
1184 SUBREG_REG (SET_DEST (x
)), loc
))
1185 || (!REG_P (SET_DEST (x
))
1186 && refers_to_regno_p (regno
, endregno
, SET_DEST (x
), loc
))))
1189 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
1198 /* X does not match, so try its subexpressions. */
1200 fmt
= GET_RTX_FORMAT (code
);
1201 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1203 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
1211 if (refers_to_regno_p (regno
, endregno
, XEXP (x
, i
), loc
))
1214 else if (fmt
[i
] == 'E')
1217 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1218 if (loc
!= &XVECEXP (x
, i
, j
)
1219 && refers_to_regno_p (regno
, endregno
, XVECEXP (x
, i
, j
), loc
))
1226 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
1227 we check if any register number in X conflicts with the relevant register
1228 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
1229 contains a MEM (we don't bother checking for memory addresses that can't
1230 conflict because we expect this to be a rare case. */
1233 reg_overlap_mentioned_p (rtx x
, rtx in
)
1235 unsigned int regno
, endregno
;
1237 /* If either argument is a constant, then modifying X can not
1238 affect IN. Here we look at IN, we can profitably combine
1239 CONSTANT_P (x) with the switch statement below. */
1240 if (CONSTANT_P (in
))
1244 switch (GET_CODE (x
))
1246 case STRICT_LOW_PART
:
1249 /* Overly conservative. */
1254 regno
= REGNO (SUBREG_REG (x
));
1255 if (regno
< FIRST_PSEUDO_REGISTER
)
1256 regno
= subreg_regno (x
);
1262 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
1263 ? hard_regno_nregs
[regno
][GET_MODE (x
)] : 1);
1264 return refers_to_regno_p (regno
, endregno
, in
, (rtx
*) 0);
1274 fmt
= GET_RTX_FORMAT (GET_CODE (in
));
1275 for (i
= GET_RTX_LENGTH (GET_CODE (in
)) - 1; i
>= 0; i
--)
1278 if (reg_overlap_mentioned_p (x
, XEXP (in
, i
)))
1281 else if (fmt
[i
] == 'E')
1284 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; --j
)
1285 if (reg_overlap_mentioned_p (x
, XVECEXP (in
, i
, j
)))
1295 return reg_mentioned_p (x
, in
);
1301 /* If any register in here refers to it we return true. */
1302 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
1303 if (XEXP (XVECEXP (x
, 0, i
), 0) != 0
1304 && reg_overlap_mentioned_p (XEXP (XVECEXP (x
, 0, i
), 0), in
))
1310 gcc_assert (CONSTANT_P (x
));
1315 /* Call FUN on each register or MEM that is stored into or clobbered by X.
1316 (X would be the pattern of an insn).
1317 FUN receives two arguments:
1318 the REG, MEM, CC0 or PC being stored in or clobbered,
1319 the SET or CLOBBER rtx that does the store.
1321 If the item being stored in or clobbered is a SUBREG of a hard register,
1322 the SUBREG will be passed. */
1325 note_stores (rtx x
, void (*fun
) (rtx
, rtx
, void *), void *data
)
1329 if (GET_CODE (x
) == COND_EXEC
)
1330 x
= COND_EXEC_CODE (x
);
1332 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1334 rtx dest
= SET_DEST (x
);
1336 while ((GET_CODE (dest
) == SUBREG
1337 && (!REG_P (SUBREG_REG (dest
))
1338 || REGNO (SUBREG_REG (dest
)) >= FIRST_PSEUDO_REGISTER
))
1339 || GET_CODE (dest
) == ZERO_EXTRACT
1340 || GET_CODE (dest
) == STRICT_LOW_PART
)
1341 dest
= XEXP (dest
, 0);
1343 /* If we have a PARALLEL, SET_DEST is a list of EXPR_LIST expressions,
1344 each of whose first operand is a register. */
1345 if (GET_CODE (dest
) == PARALLEL
)
1347 for (i
= XVECLEN (dest
, 0) - 1; i
>= 0; i
--)
1348 if (XEXP (XVECEXP (dest
, 0, i
), 0) != 0)
1349 (*fun
) (XEXP (XVECEXP (dest
, 0, i
), 0), x
, data
);
1352 (*fun
) (dest
, x
, data
);
1355 else if (GET_CODE (x
) == PARALLEL
)
1356 for (i
= XVECLEN (x
, 0) - 1; i
>= 0; i
--)
1357 note_stores (XVECEXP (x
, 0, i
), fun
, data
);
1360 /* Like notes_stores, but call FUN for each expression that is being
1361 referenced in PBODY, a pointer to the PATTERN of an insn. We only call
1362 FUN for each expression, not any interior subexpressions. FUN receives a
1363 pointer to the expression and the DATA passed to this function.
1365 Note that this is not quite the same test as that done in reg_referenced_p
1366 since that considers something as being referenced if it is being
1367 partially set, while we do not. */
1370 note_uses (rtx
*pbody
, void (*fun
) (rtx
*, void *), void *data
)
1375 switch (GET_CODE (body
))
1378 (*fun
) (&COND_EXEC_TEST (body
), data
);
1379 note_uses (&COND_EXEC_CODE (body
), fun
, data
);
1383 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1384 note_uses (&XVECEXP (body
, 0, i
), fun
, data
);
1388 (*fun
) (&XEXP (body
, 0), data
);
1392 for (i
= ASM_OPERANDS_INPUT_LENGTH (body
) - 1; i
>= 0; i
--)
1393 (*fun
) (&ASM_OPERANDS_INPUT (body
, i
), data
);
1397 (*fun
) (&TRAP_CONDITION (body
), data
);
1401 (*fun
) (&XEXP (body
, 0), data
);
1405 case UNSPEC_VOLATILE
:
1406 for (i
= XVECLEN (body
, 0) - 1; i
>= 0; i
--)
1407 (*fun
) (&XVECEXP (body
, 0, i
), data
);
1411 if (MEM_P (XEXP (body
, 0)))
1412 (*fun
) (&XEXP (XEXP (body
, 0), 0), data
);
1417 rtx dest
= SET_DEST (body
);
1419 /* For sets we replace everything in source plus registers in memory
1420 expression in store and operands of a ZERO_EXTRACT. */
1421 (*fun
) (&SET_SRC (body
), data
);
1423 if (GET_CODE (dest
) == ZERO_EXTRACT
)
1425 (*fun
) (&XEXP (dest
, 1), data
);
1426 (*fun
) (&XEXP (dest
, 2), data
);
1429 while (GET_CODE (dest
) == SUBREG
|| GET_CODE (dest
) == STRICT_LOW_PART
)
1430 dest
= XEXP (dest
, 0);
1433 (*fun
) (&XEXP (dest
, 0), data
);
1438 /* All the other possibilities never store. */
1439 (*fun
) (pbody
, data
);
1444 /* Return nonzero if X's old contents don't survive after INSN.
1445 This will be true if X is (cc0) or if X is a register and
1446 X dies in INSN or because INSN entirely sets X.
1448 "Entirely set" means set directly and not through a SUBREG, or
1449 ZERO_EXTRACT, so no trace of the old contents remains.
1450 Likewise, REG_INC does not count.
1452 REG may be a hard or pseudo reg. Renumbering is not taken into account,
1453 but for this use that makes no difference, since regs don't overlap
1454 during their lifetimes. Therefore, this function may be used
1455 at any time after deaths have been computed (in flow.c).
1457 If REG is a hard reg that occupies multiple machine registers, this
1458 function will only return 1 if each of those registers will be replaced
1462 dead_or_set_p (rtx insn
, rtx x
)
1464 unsigned int regno
, last_regno
;
1467 /* Can't use cc0_rtx below since this file is used by genattrtab.c. */
1468 if (GET_CODE (x
) == CC0
)
1471 gcc_assert (REG_P (x
));
1474 last_regno
= (regno
>= FIRST_PSEUDO_REGISTER
? regno
1475 : regno
+ hard_regno_nregs
[regno
][GET_MODE (x
)] - 1);
1477 for (i
= regno
; i
<= last_regno
; i
++)
1478 if (! dead_or_set_regno_p (insn
, i
))
1484 /* Return TRUE iff DEST is a register or subreg of a register and
1485 doesn't change the number of words of the inner register, and any
1486 part of the register is TEST_REGNO. */
1489 covers_regno_no_parallel_p (rtx dest
, unsigned int test_regno
)
1491 unsigned int regno
, endregno
;
1493 if (GET_CODE (dest
) == SUBREG
1494 && (((GET_MODE_SIZE (GET_MODE (dest
))
1495 + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
)
1496 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest
)))
1497 + UNITS_PER_WORD
- 1) / UNITS_PER_WORD
)))
1498 dest
= SUBREG_REG (dest
);
1503 regno
= REGNO (dest
);
1504 endregno
= (regno
>= FIRST_PSEUDO_REGISTER
? regno
+ 1
1505 : regno
+ hard_regno_nregs
[regno
][GET_MODE (dest
)]);
1506 return (test_regno
>= regno
&& test_regno
< endregno
);
1509 /* Like covers_regno_no_parallel_p, but also handles PARALLELs where
1510 any member matches the covers_regno_no_parallel_p criteria. */
1513 covers_regno_p (rtx dest
, unsigned int test_regno
)
1515 if (GET_CODE (dest
) == PARALLEL
)
1517 /* Some targets place small structures in registers for return
1518 values of functions, and those registers are wrapped in
1519 PARALLELs that we may see as the destination of a SET. */
1522 for (i
= XVECLEN (dest
, 0) - 1; i
>= 0; i
--)
1524 rtx inner
= XEXP (XVECEXP (dest
, 0, i
), 0);
1525 if (inner
!= NULL_RTX
1526 && covers_regno_no_parallel_p (inner
, test_regno
))
1533 return covers_regno_no_parallel_p (dest
, test_regno
);
1536 /* Utility function for dead_or_set_p to check an individual register. Also
1537 called from flow.c. */
1540 dead_or_set_regno_p (rtx insn
, unsigned int test_regno
)
1544 /* See if there is a death note for something that includes TEST_REGNO. */
1545 if (find_regno_note (insn
, REG_DEAD
, test_regno
))
1549 && find_regno_fusage (insn
, CLOBBER
, test_regno
))
1552 pattern
= PATTERN (insn
);
1554 if (GET_CODE (pattern
) == COND_EXEC
)
1555 pattern
= COND_EXEC_CODE (pattern
);
1557 if (GET_CODE (pattern
) == SET
)
1558 return covers_regno_p (SET_DEST (pattern
), test_regno
);
1559 else if (GET_CODE (pattern
) == PARALLEL
)
1563 for (i
= XVECLEN (pattern
, 0) - 1; i
>= 0; i
--)
1565 rtx body
= XVECEXP (pattern
, 0, i
);
1567 if (GET_CODE (body
) == COND_EXEC
)
1568 body
= COND_EXEC_CODE (body
);
1570 if ((GET_CODE (body
) == SET
|| GET_CODE (body
) == CLOBBER
)
1571 && covers_regno_p (SET_DEST (body
), test_regno
))
1579 /* Return the reg-note of kind KIND in insn INSN, if there is one.
1580 If DATUM is nonzero, look for one whose datum is DATUM. */
1583 find_reg_note (rtx insn
, enum reg_note kind
, rtx datum
)
1589 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1590 if (! INSN_P (insn
))
1594 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1595 if (REG_NOTE_KIND (link
) == kind
)
1600 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1601 if (REG_NOTE_KIND (link
) == kind
&& datum
== XEXP (link
, 0))
1606 /* Return the reg-note of kind KIND in insn INSN which applies to register
1607 number REGNO, if any. Return 0 if there is no such reg-note. Note that
1608 the REGNO of this NOTE need not be REGNO if REGNO is a hard register;
1609 it might be the case that the note overlaps REGNO. */
1612 find_regno_note (rtx insn
, enum reg_note kind
, unsigned int regno
)
1616 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1617 if (! INSN_P (insn
))
1620 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1621 if (REG_NOTE_KIND (link
) == kind
1622 /* Verify that it is a register, so that scratch and MEM won't cause a
1624 && REG_P (XEXP (link
, 0))
1625 && REGNO (XEXP (link
, 0)) <= regno
1626 && ((REGNO (XEXP (link
, 0))
1627 + (REGNO (XEXP (link
, 0)) >= FIRST_PSEUDO_REGISTER
? 1
1628 : hard_regno_nregs
[REGNO (XEXP (link
, 0))]
1629 [GET_MODE (XEXP (link
, 0))]))
1635 /* Return a REG_EQUIV or REG_EQUAL note if insn has only a single set and
1639 find_reg_equal_equiv_note (rtx insn
)
1645 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1646 if (REG_NOTE_KIND (link
) == REG_EQUAL
1647 || REG_NOTE_KIND (link
) == REG_EQUIV
)
1649 if (single_set (insn
) == 0)
1656 /* Return true if DATUM, or any overlap of DATUM, of kind CODE is found
1657 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1660 find_reg_fusage (rtx insn
, enum rtx_code code
, rtx datum
)
1662 /* If it's not a CALL_INSN, it can't possibly have a
1663 CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */
1673 for (link
= CALL_INSN_FUNCTION_USAGE (insn
);
1675 link
= XEXP (link
, 1))
1676 if (GET_CODE (XEXP (link
, 0)) == code
1677 && rtx_equal_p (datum
, XEXP (XEXP (link
, 0), 0)))
1682 unsigned int regno
= REGNO (datum
);
1684 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1685 to pseudo registers, so don't bother checking. */
1687 if (regno
< FIRST_PSEUDO_REGISTER
)
1689 unsigned int end_regno
1690 = regno
+ hard_regno_nregs
[regno
][GET_MODE (datum
)];
1693 for (i
= regno
; i
< end_regno
; i
++)
1694 if (find_regno_fusage (insn
, code
, i
))
1702 /* Return true if REGNO, or any overlap of REGNO, of kind CODE is found
1703 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1706 find_regno_fusage (rtx insn
, enum rtx_code code
, unsigned int regno
)
1710 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1711 to pseudo registers, so don't bother checking. */
1713 if (regno
>= FIRST_PSEUDO_REGISTER
1717 for (link
= CALL_INSN_FUNCTION_USAGE (insn
); link
; link
= XEXP (link
, 1))
1719 unsigned int regnote
;
1722 if (GET_CODE (op
= XEXP (link
, 0)) == code
1723 && REG_P (reg
= XEXP (op
, 0))
1724 && (regnote
= REGNO (reg
)) <= regno
1725 && regnote
+ hard_regno_nregs
[regnote
][GET_MODE (reg
)] > regno
)
1732 /* Return true if INSN is a call to a pure function. */
1735 pure_call_p (rtx insn
)
1739 if (!CALL_P (insn
) || ! CONST_OR_PURE_CALL_P (insn
))
1742 /* Look for the note that differentiates const and pure functions. */
1743 for (link
= CALL_INSN_FUNCTION_USAGE (insn
); link
; link
= XEXP (link
, 1))
1747 if (GET_CODE (u
= XEXP (link
, 0)) == USE
1748 && MEM_P (m
= XEXP (u
, 0)) && GET_MODE (m
) == BLKmode
1749 && GET_CODE (XEXP (m
, 0)) == SCRATCH
)
1756 /* Remove register note NOTE from the REG_NOTES of INSN. */
1759 remove_note (rtx insn
, rtx note
)
1763 if (note
== NULL_RTX
)
1766 if (REG_NOTES (insn
) == note
)
1768 REG_NOTES (insn
) = XEXP (note
, 1);
1772 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
1773 if (XEXP (link
, 1) == note
)
1775 XEXP (link
, 1) = XEXP (note
, 1);
1782 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
1783 return 1 if it is found. A simple equality test is used to determine if
1787 in_expr_list_p (rtx listp
, rtx node
)
1791 for (x
= listp
; x
; x
= XEXP (x
, 1))
1792 if (node
== XEXP (x
, 0))
1798 /* Search LISTP (an EXPR_LIST) for an entry whose first operand is NODE and
1799 remove that entry from the list if it is found.
1801 A simple equality test is used to determine if NODE matches. */
1804 remove_node_from_expr_list (rtx node
, rtx
*listp
)
1807 rtx prev
= NULL_RTX
;
1811 if (node
== XEXP (temp
, 0))
1813 /* Splice the node out of the list. */
1815 XEXP (prev
, 1) = XEXP (temp
, 1);
1817 *listp
= XEXP (temp
, 1);
1823 temp
= XEXP (temp
, 1);
1827 /* Nonzero if X contains any volatile instructions. These are instructions
1828 which may cause unpredictable machine state instructions, and thus no
1829 instructions should be moved or combined across them. This includes
1830 only volatile asms and UNSPEC_VOLATILE instructions. */
1833 volatile_insn_p (rtx x
)
1837 code
= GET_CODE (x
);
1857 case UNSPEC_VOLATILE
:
1858 /* case TRAP_IF: This isn't clear yet. */
1863 if (MEM_VOLATILE_P (x
))
1870 /* Recursively scan the operands of this expression. */
1873 const char *fmt
= GET_RTX_FORMAT (code
);
1876 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1880 if (volatile_insn_p (XEXP (x
, i
)))
1883 else if (fmt
[i
] == 'E')
1886 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1887 if (volatile_insn_p (XVECEXP (x
, i
, j
)))
1895 /* Nonzero if X contains any volatile memory references
1896 UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */
1899 volatile_refs_p (rtx x
)
1903 code
= GET_CODE (x
);
1921 case UNSPEC_VOLATILE
:
1927 if (MEM_VOLATILE_P (x
))
1934 /* Recursively scan the operands of this expression. */
1937 const char *fmt
= GET_RTX_FORMAT (code
);
1940 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1944 if (volatile_refs_p (XEXP (x
, i
)))
1947 else if (fmt
[i
] == 'E')
1950 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1951 if (volatile_refs_p (XVECEXP (x
, i
, j
)))
1959 /* Similar to above, except that it also rejects register pre- and post-
1963 side_effects_p (rtx x
)
1967 code
= GET_CODE (x
);
1985 /* Reject CLOBBER with a non-VOID mode. These are made by combine.c
1986 when some combination can't be done. If we see one, don't think
1987 that we can simplify the expression. */
1988 return (GET_MODE (x
) != VOIDmode
);
1997 case UNSPEC_VOLATILE
:
1998 /* case TRAP_IF: This isn't clear yet. */
2004 if (MEM_VOLATILE_P (x
))
2011 /* Recursively scan the operands of this expression. */
2014 const char *fmt
= GET_RTX_FORMAT (code
);
2017 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2021 if (side_effects_p (XEXP (x
, i
)))
2024 else if (fmt
[i
] == 'E')
2027 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2028 if (side_effects_p (XVECEXP (x
, i
, j
)))
2036 enum may_trap_p_flags
2038 MTP_UNALIGNED_MEMS
= 1,
2041 /* Return nonzero if evaluating rtx X might cause a trap.
2042 (FLAGS & MTP_UNALIGNED_MEMS) controls whether nonzero is returned for
2043 unaligned memory accesses on strict alignment machines. If
2044 (FLAGS & AFTER_MOVE) is true, returns nonzero even in case the expression
2045 cannot trap at its current location, but it might become trapping if moved
2049 may_trap_p_1 (rtx x
, unsigned flags
)
2054 bool unaligned_mems
= (flags
& MTP_UNALIGNED_MEMS
) != 0;
2058 code
= GET_CODE (x
);
2061 /* Handle these cases quickly. */
2075 case UNSPEC_VOLATILE
:
2080 return MEM_VOLATILE_P (x
);
2082 /* Memory ref can trap unless it's a static var or a stack slot. */
2084 if (/* MEM_NOTRAP_P only relates to the actual position of the memory
2085 reference; moving it out of condition might cause its address
2087 !(flags
& MTP_AFTER_MOVE
)
2089 && (!STRICT_ALIGNMENT
|| !unaligned_mems
))
2092 rtx_addr_can_trap_p_1 (XEXP (x
, 0), GET_MODE (x
), unaligned_mems
);
2094 /* Division by a non-constant might trap. */
2099 if (HONOR_SNANS (GET_MODE (x
)))
2101 if (SCALAR_FLOAT_MODE_P (GET_MODE (x
)))
2102 return flag_trapping_math
;
2103 if (!CONSTANT_P (XEXP (x
, 1)) || (XEXP (x
, 1) == const0_rtx
))
2108 /* An EXPR_LIST is used to represent a function call. This
2109 certainly may trap. */
2118 /* Some floating point comparisons may trap. */
2119 if (!flag_trapping_math
)
2121 /* ??? There is no machine independent way to check for tests that trap
2122 when COMPARE is used, though many targets do make this distinction.
2123 For instance, sparc uses CCFPE for compares which generate exceptions
2124 and CCFP for compares which do not generate exceptions. */
2125 if (HONOR_NANS (GET_MODE (x
)))
2127 /* But often the compare has some CC mode, so check operand
2129 if (HONOR_NANS (GET_MODE (XEXP (x
, 0)))
2130 || HONOR_NANS (GET_MODE (XEXP (x
, 1))))
2136 if (HONOR_SNANS (GET_MODE (x
)))
2138 /* Often comparison is CC mode, so check operand modes. */
2139 if (HONOR_SNANS (GET_MODE (XEXP (x
, 0)))
2140 || HONOR_SNANS (GET_MODE (XEXP (x
, 1))))
2145 /* Conversion of floating point might trap. */
2146 if (flag_trapping_math
&& HONOR_NANS (GET_MODE (XEXP (x
, 0))))
2153 /* These operations don't trap even with floating point. */
2157 /* Any floating arithmetic may trap. */
2158 if (SCALAR_FLOAT_MODE_P (GET_MODE (x
))
2159 && flag_trapping_math
)
2163 fmt
= GET_RTX_FORMAT (code
);
2164 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2168 if (may_trap_p_1 (XEXP (x
, i
), flags
))
2171 else if (fmt
[i
] == 'E')
2174 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2175 if (may_trap_p_1 (XVECEXP (x
, i
, j
), flags
))
2182 /* Return nonzero if evaluating rtx X might cause a trap. */
2187 return may_trap_p_1 (x
, 0);
2190 /* Return nonzero if evaluating rtx X might cause a trap, when the expression
2191 is moved from its current location by some optimization. */
2194 may_trap_after_code_motion_p (rtx x
)
2196 return may_trap_p_1 (x
, MTP_AFTER_MOVE
);
2199 /* Same as above, but additionally return non-zero if evaluating rtx X might
2200 cause a fault. We define a fault for the purpose of this function as a
2201 erroneous execution condition that cannot be encountered during the normal
2202 execution of a valid program; the typical example is an unaligned memory
2203 access on a strict alignment machine. The compiler guarantees that it
2204 doesn't generate code that will fault from a valid program, but this
2205 guarantee doesn't mean anything for individual instructions. Consider
2206 the following example:
2208 struct S { int d; union { char *cp; int *ip; }; };
2210 int foo(struct S *s)
2218 on a strict alignment machine. In a valid program, foo will never be
2219 invoked on a structure for which d is equal to 1 and the underlying
2220 unique field of the union not aligned on a 4-byte boundary, but the
2221 expression *s->ip might cause a fault if considered individually.
2223 At the RTL level, potentially problematic expressions will almost always
2224 verify may_trap_p; for example, the above dereference can be emitted as
2225 (mem:SI (reg:P)) and this expression is may_trap_p for a generic register.
2226 However, suppose that foo is inlined in a caller that causes s->cp to
2227 point to a local character variable and guarantees that s->d is not set
2228 to 1; foo may have been effectively translated into pseudo-RTL as:
2231 (set (reg:SI) (mem:SI (%fp - 7)))
2233 (set (reg:QI) (mem:QI (%fp - 7)))
2235 Now (mem:SI (%fp - 7)) is considered as not may_trap_p since it is a
2236 memory reference to a stack slot, but it will certainly cause a fault
2237 on a strict alignment machine. */
2240 may_trap_or_fault_p (rtx x
)
2242 return may_trap_p_1 (x
, MTP_UNALIGNED_MEMS
);
2245 /* Return nonzero if X contains a comparison that is not either EQ or NE,
2246 i.e., an inequality. */
2249 inequality_comparisons_p (rtx x
)
2253 enum rtx_code code
= GET_CODE (x
);
2283 len
= GET_RTX_LENGTH (code
);
2284 fmt
= GET_RTX_FORMAT (code
);
2286 for (i
= 0; i
< len
; i
++)
2290 if (inequality_comparisons_p (XEXP (x
, i
)))
2293 else if (fmt
[i
] == 'E')
2296 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2297 if (inequality_comparisons_p (XVECEXP (x
, i
, j
)))
2305 /* Replace any occurrence of FROM in X with TO. The function does
2306 not enter into CONST_DOUBLE for the replace.
2308 Note that copying is not done so X must not be shared unless all copies
2309 are to be modified. */
2312 replace_rtx (rtx x
, rtx from
, rtx to
)
2317 /* The following prevents loops occurrence when we change MEM in
2318 CONST_DOUBLE onto the same CONST_DOUBLE. */
2319 if (x
!= 0 && GET_CODE (x
) == CONST_DOUBLE
)
2325 /* Allow this function to make replacements in EXPR_LISTs. */
2329 if (GET_CODE (x
) == SUBREG
)
2331 rtx
new = replace_rtx (SUBREG_REG (x
), from
, to
);
2333 if (GET_CODE (new) == CONST_INT
)
2335 x
= simplify_subreg (GET_MODE (x
), new,
2336 GET_MODE (SUBREG_REG (x
)),
2341 SUBREG_REG (x
) = new;
2345 else if (GET_CODE (x
) == ZERO_EXTEND
)
2347 rtx
new = replace_rtx (XEXP (x
, 0), from
, to
);
2349 if (GET_CODE (new) == CONST_INT
)
2351 x
= simplify_unary_operation (ZERO_EXTEND
, GET_MODE (x
),
2352 new, GET_MODE (XEXP (x
, 0)));
2361 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
2362 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
2365 XEXP (x
, i
) = replace_rtx (XEXP (x
, i
), from
, to
);
2366 else if (fmt
[i
] == 'E')
2367 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2368 XVECEXP (x
, i
, j
) = replace_rtx (XVECEXP (x
, i
, j
), from
, to
);
2374 /* Throughout the rtx X, replace many registers according to REG_MAP.
2375 Return the replacement for X (which may be X with altered contents).
2376 REG_MAP[R] is the replacement for register R, or 0 for don't replace.
2377 NREGS is the length of REG_MAP; regs >= NREGS are not mapped.
2379 We only support REG_MAP entries of REG or SUBREG. Also, hard registers
2380 should not be mapped to pseudos or vice versa since validate_change
2383 If REPLACE_DEST is 1, replacements are also done in destinations;
2384 otherwise, only sources are replaced. */
2387 replace_regs (rtx x
, rtx
*reg_map
, unsigned int nregs
, int replace_dest
)
2396 code
= GET_CODE (x
);
2411 /* Verify that the register has an entry before trying to access it. */
2412 if (REGNO (x
) < nregs
&& reg_map
[REGNO (x
)] != 0)
2414 /* SUBREGs can't be shared. Always return a copy to ensure that if
2415 this replacement occurs more than once then each instance will
2416 get distinct rtx. */
2417 if (GET_CODE (reg_map
[REGNO (x
)]) == SUBREG
)
2418 return copy_rtx (reg_map
[REGNO (x
)]);
2419 return reg_map
[REGNO (x
)];
2424 /* Prevent making nested SUBREGs. */
2425 if (REG_P (SUBREG_REG (x
)) && REGNO (SUBREG_REG (x
)) < nregs
2426 && reg_map
[REGNO (SUBREG_REG (x
))] != 0
2427 && GET_CODE (reg_map
[REGNO (SUBREG_REG (x
))]) == SUBREG
)
2429 rtx map_val
= reg_map
[REGNO (SUBREG_REG (x
))];
2430 return simplify_gen_subreg (GET_MODE (x
), map_val
,
2431 GET_MODE (SUBREG_REG (x
)),
2438 SET_DEST (x
) = replace_regs (SET_DEST (x
), reg_map
, nregs
, 0);
2440 else if (MEM_P (SET_DEST (x
))
2441 || GET_CODE (SET_DEST (x
)) == STRICT_LOW_PART
)
2442 /* Even if we are not to replace destinations, replace register if it
2443 is CONTAINED in destination (destination is memory or
2444 STRICT_LOW_PART). */
2445 XEXP (SET_DEST (x
), 0) = replace_regs (XEXP (SET_DEST (x
), 0),
2447 else if (GET_CODE (SET_DEST (x
)) == ZERO_EXTRACT
)
2448 /* Similarly, for ZERO_EXTRACT we replace all operands. */
2451 SET_SRC (x
) = replace_regs (SET_SRC (x
), reg_map
, nregs
, 0);
2458 fmt
= GET_RTX_FORMAT (code
);
2459 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2462 XEXP (x
, i
) = replace_regs (XEXP (x
, i
), reg_map
, nregs
, replace_dest
);
2463 else if (fmt
[i
] == 'E')
2466 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2467 XVECEXP (x
, i
, j
) = replace_regs (XVECEXP (x
, i
, j
), reg_map
,
2468 nregs
, replace_dest
);
2474 /* Replace occurrences of the old label in *X with the new one.
2475 DATA is a REPLACE_LABEL_DATA containing the old and new labels. */
2478 replace_label (rtx
*x
, void *data
)
2481 rtx old_label
= ((replace_label_data
*) data
)->r1
;
2482 rtx new_label
= ((replace_label_data
*) data
)->r2
;
2483 bool update_label_nuses
= ((replace_label_data
*) data
)->update_label_nuses
;
2488 if (GET_CODE (l
) == SYMBOL_REF
2489 && CONSTANT_POOL_ADDRESS_P (l
))
2491 rtx c
= get_pool_constant (l
);
2492 if (rtx_referenced_p (old_label
, c
))
2495 replace_label_data
*d
= (replace_label_data
*) data
;
2497 /* Create a copy of constant C; replace the label inside
2498 but do not update LABEL_NUSES because uses in constant pool
2500 new_c
= copy_rtx (c
);
2501 d
->update_label_nuses
= false;
2502 for_each_rtx (&new_c
, replace_label
, data
);
2503 d
->update_label_nuses
= update_label_nuses
;
2505 /* Add the new constant NEW_C to constant pool and replace
2506 the old reference to constant by new reference. */
2507 new_l
= XEXP (force_const_mem (get_pool_mode (l
), new_c
), 0);
2508 *x
= replace_rtx (l
, l
, new_l
);
2513 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
2514 field. This is not handled by for_each_rtx because it doesn't
2515 handle unprinted ('0') fields. */
2516 if (JUMP_P (l
) && JUMP_LABEL (l
) == old_label
)
2517 JUMP_LABEL (l
) = new_label
;
2519 if ((GET_CODE (l
) == LABEL_REF
2520 || GET_CODE (l
) == INSN_LIST
)
2521 && XEXP (l
, 0) == old_label
)
2523 XEXP (l
, 0) = new_label
;
2524 if (update_label_nuses
)
2526 ++LABEL_NUSES (new_label
);
2527 --LABEL_NUSES (old_label
);
2535 /* When *BODY is equal to X or X is directly referenced by *BODY
2536 return nonzero, thus FOR_EACH_RTX stops traversing and returns nonzero
2537 too, otherwise FOR_EACH_RTX continues traversing *BODY. */
2540 rtx_referenced_p_1 (rtx
*body
, void *x
)
2544 if (*body
== NULL_RTX
)
2545 return y
== NULL_RTX
;
2547 /* Return true if a label_ref *BODY refers to label Y. */
2548 if (GET_CODE (*body
) == LABEL_REF
&& LABEL_P (y
))
2549 return XEXP (*body
, 0) == y
;
2551 /* If *BODY is a reference to pool constant traverse the constant. */
2552 if (GET_CODE (*body
) == SYMBOL_REF
2553 && CONSTANT_POOL_ADDRESS_P (*body
))
2554 return rtx_referenced_p (y
, get_pool_constant (*body
));
2556 /* By default, compare the RTL expressions. */
2557 return rtx_equal_p (*body
, y
);
2560 /* Return true if X is referenced in BODY. */
2563 rtx_referenced_p (rtx x
, rtx body
)
2565 return for_each_rtx (&body
, rtx_referenced_p_1
, x
);
2568 /* If INSN is a tablejump return true and store the label (before jump table) to
2569 *LABELP and the jump table to *TABLEP. LABELP and TABLEP may be NULL. */
2572 tablejump_p (rtx insn
, rtx
*labelp
, rtx
*tablep
)
2577 && (label
= JUMP_LABEL (insn
)) != NULL_RTX
2578 && (table
= next_active_insn (label
)) != NULL_RTX
2580 && (GET_CODE (PATTERN (table
)) == ADDR_VEC
2581 || GET_CODE (PATTERN (table
)) == ADDR_DIFF_VEC
))
2592 /* A subroutine of computed_jump_p, return 1 if X contains a REG or MEM or
2593 constant that is not in the constant pool and not in the condition
2594 of an IF_THEN_ELSE. */
2597 computed_jump_p_1 (rtx x
)
2599 enum rtx_code code
= GET_CODE (x
);
2618 return ! (GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
2619 && CONSTANT_POOL_ADDRESS_P (XEXP (x
, 0)));
2622 return (computed_jump_p_1 (XEXP (x
, 1))
2623 || computed_jump_p_1 (XEXP (x
, 2)));
2629 fmt
= GET_RTX_FORMAT (code
);
2630 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2633 && computed_jump_p_1 (XEXP (x
, i
)))
2636 else if (fmt
[i
] == 'E')
2637 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2638 if (computed_jump_p_1 (XVECEXP (x
, i
, j
)))
2645 /* Return nonzero if INSN is an indirect jump (aka computed jump).
2647 Tablejumps and casesi insns are not considered indirect jumps;
2648 we can recognize them by a (use (label_ref)). */
2651 computed_jump_p (rtx insn
)
2656 rtx pat
= PATTERN (insn
);
2658 if (find_reg_note (insn
, REG_LABEL
, NULL_RTX
))
2660 else if (GET_CODE (pat
) == PARALLEL
)
2662 int len
= XVECLEN (pat
, 0);
2663 int has_use_labelref
= 0;
2665 for (i
= len
- 1; i
>= 0; i
--)
2666 if (GET_CODE (XVECEXP (pat
, 0, i
)) == USE
2667 && (GET_CODE (XEXP (XVECEXP (pat
, 0, i
), 0))
2669 has_use_labelref
= 1;
2671 if (! has_use_labelref
)
2672 for (i
= len
- 1; i
>= 0; i
--)
2673 if (GET_CODE (XVECEXP (pat
, 0, i
)) == SET
2674 && SET_DEST (XVECEXP (pat
, 0, i
)) == pc_rtx
2675 && computed_jump_p_1 (SET_SRC (XVECEXP (pat
, 0, i
))))
2678 else if (GET_CODE (pat
) == SET
2679 && SET_DEST (pat
) == pc_rtx
2680 && computed_jump_p_1 (SET_SRC (pat
)))
2686 /* Optimized loop of for_each_rtx, trying to avoid useless recursive
2687 calls. Processes the subexpressions of EXP and passes them to F. */
2689 for_each_rtx_1 (rtx exp
, int n
, rtx_function f
, void *data
)
2692 const char *format
= GET_RTX_FORMAT (GET_CODE (exp
));
2695 for (; format
[n
] != '\0'; n
++)
2702 result
= (*f
) (x
, data
);
2704 /* Do not traverse sub-expressions. */
2706 else if (result
!= 0)
2707 /* Stop the traversal. */
2711 /* There are no sub-expressions. */
2714 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2717 result
= for_each_rtx_1 (*x
, i
, f
, data
);
2725 if (XVEC (exp
, n
) == 0)
2727 for (j
= 0; j
< XVECLEN (exp
, n
); ++j
)
2730 x
= &XVECEXP (exp
, n
, j
);
2731 result
= (*f
) (x
, data
);
2733 /* Do not traverse sub-expressions. */
2735 else if (result
!= 0)
2736 /* Stop the traversal. */
2740 /* There are no sub-expressions. */
2743 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2746 result
= for_each_rtx_1 (*x
, i
, f
, data
);
2754 /* Nothing to do. */
2762 /* Traverse X via depth-first search, calling F for each
2763 sub-expression (including X itself). F is also passed the DATA.
2764 If F returns -1, do not traverse sub-expressions, but continue
2765 traversing the rest of the tree. If F ever returns any other
2766 nonzero value, stop the traversal, and return the value returned
2767 by F. Otherwise, return 0. This function does not traverse inside
2768 tree structure that contains RTX_EXPRs, or into sub-expressions
2769 whose format code is `0' since it is not known whether or not those
2770 codes are actually RTL.
2772 This routine is very general, and could (should?) be used to
2773 implement many of the other routines in this file. */
2776 for_each_rtx (rtx
*x
, rtx_function f
, void *data
)
2782 result
= (*f
) (x
, data
);
2784 /* Do not traverse sub-expressions. */
2786 else if (result
!= 0)
2787 /* Stop the traversal. */
2791 /* There are no sub-expressions. */
2794 i
= non_rtx_starting_operands
[GET_CODE (*x
)];
2798 return for_each_rtx_1 (*x
, i
, f
, data
);
2802 /* Searches X for any reference to REGNO, returning the rtx of the
2803 reference found if any. Otherwise, returns NULL_RTX. */
2806 regno_use_in (unsigned int regno
, rtx x
)
2812 if (REG_P (x
) && REGNO (x
) == regno
)
2815 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
2816 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
2820 if ((tem
= regno_use_in (regno
, XEXP (x
, i
))))
2823 else if (fmt
[i
] == 'E')
2824 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2825 if ((tem
= regno_use_in (regno
, XVECEXP (x
, i
, j
))))
2832 /* Return a value indicating whether OP, an operand of a commutative
2833 operation, is preferred as the first or second operand. The higher
2834 the value, the stronger the preference for being the first operand.
2835 We use negative values to indicate a preference for the first operand
2836 and positive values for the second operand. */
2839 commutative_operand_precedence (rtx op
)
2841 enum rtx_code code
= GET_CODE (op
);
2843 /* Constants always come the second operand. Prefer "nice" constants. */
2844 if (code
== CONST_INT
)
2846 if (code
== CONST_DOUBLE
)
2848 op
= avoid_constant_pool_reference (op
);
2849 code
= GET_CODE (op
);
2851 switch (GET_RTX_CLASS (code
))
2854 if (code
== CONST_INT
)
2856 if (code
== CONST_DOUBLE
)
2861 /* SUBREGs of objects should come second. */
2862 if (code
== SUBREG
&& OBJECT_P (SUBREG_REG (op
)))
2865 if (!CONSTANT_P (op
))
2868 /* As for RTX_CONST_OBJ. */
2872 /* Complex expressions should be the first, so decrease priority
2876 case RTX_COMM_ARITH
:
2877 /* Prefer operands that are themselves commutative to be first.
2878 This helps to make things linear. In particular,
2879 (and (and (reg) (reg)) (not (reg))) is canonical. */
2883 /* If only one operand is a binary expression, it will be the first
2884 operand. In particular, (plus (minus (reg) (reg)) (neg (reg)))
2885 is canonical, although it will usually be further simplified. */
2889 /* Then prefer NEG and NOT. */
2890 if (code
== NEG
|| code
== NOT
)
2898 /* Return 1 iff it is necessary to swap operands of commutative operation
2899 in order to canonicalize expression. */
2902 swap_commutative_operands_p (rtx x
, rtx y
)
2904 return (commutative_operand_precedence (x
)
2905 < commutative_operand_precedence (y
));
2908 /* Return 1 if X is an autoincrement side effect and the register is
2909 not the stack pointer. */
2913 switch (GET_CODE (x
))
2921 /* There are no REG_INC notes for SP. */
2922 if (XEXP (x
, 0) != stack_pointer_rtx
)
2930 /* Return nonzero if IN contains a piece of rtl that has the address LOC. */
2932 loc_mentioned_in_p (rtx
*loc
, rtx in
)
2934 enum rtx_code code
= GET_CODE (in
);
2935 const char *fmt
= GET_RTX_FORMAT (code
);
2938 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2940 if (loc
== &in
->u
.fld
[i
].rt_rtx
)
2944 if (loc_mentioned_in_p (loc
, XEXP (in
, i
)))
2947 else if (fmt
[i
] == 'E')
2948 for (j
= XVECLEN (in
, i
) - 1; j
>= 0; j
--)
2949 if (loc_mentioned_in_p (loc
, XVECEXP (in
, i
, j
)))
2955 /* Helper function for subreg_lsb. Given a subreg's OUTER_MODE, INNER_MODE,
2956 and SUBREG_BYTE, return the bit offset where the subreg begins
2957 (counting from the least significant bit of the operand). */
2960 subreg_lsb_1 (enum machine_mode outer_mode
,
2961 enum machine_mode inner_mode
,
2962 unsigned int subreg_byte
)
2964 unsigned int bitpos
;
2968 /* A paradoxical subreg begins at bit position 0. */
2969 if (GET_MODE_BITSIZE (outer_mode
) > GET_MODE_BITSIZE (inner_mode
))
2972 if (WORDS_BIG_ENDIAN
!= BYTES_BIG_ENDIAN
)
2973 /* If the subreg crosses a word boundary ensure that
2974 it also begins and ends on a word boundary. */
2975 gcc_assert (!((subreg_byte
% UNITS_PER_WORD
2976 + GET_MODE_SIZE (outer_mode
)) > UNITS_PER_WORD
2977 && (subreg_byte
% UNITS_PER_WORD
2978 || GET_MODE_SIZE (outer_mode
) % UNITS_PER_WORD
)));
2980 if (WORDS_BIG_ENDIAN
)
2981 word
= (GET_MODE_SIZE (inner_mode
)
2982 - (subreg_byte
+ GET_MODE_SIZE (outer_mode
))) / UNITS_PER_WORD
;
2984 word
= subreg_byte
/ UNITS_PER_WORD
;
2985 bitpos
= word
* BITS_PER_WORD
;
2987 if (BYTES_BIG_ENDIAN
)
2988 byte
= (GET_MODE_SIZE (inner_mode
)
2989 - (subreg_byte
+ GET_MODE_SIZE (outer_mode
))) % UNITS_PER_WORD
;
2991 byte
= subreg_byte
% UNITS_PER_WORD
;
2992 bitpos
+= byte
* BITS_PER_UNIT
;
2997 /* Given a subreg X, return the bit offset where the subreg begins
2998 (counting from the least significant bit of the reg). */
3003 return subreg_lsb_1 (GET_MODE (x
), GET_MODE (SUBREG_REG (x
)),
3007 /* This function returns the regno offset of a subreg expression.
3008 xregno - A regno of an inner hard subreg_reg (or what will become one).
3009 xmode - The mode of xregno.
3010 offset - The byte offset.
3011 ymode - The mode of a top level SUBREG (or what may become one).
3012 RETURN - The regno offset which would be used. */
3014 subreg_regno_offset (unsigned int xregno
, enum machine_mode xmode
,
3015 unsigned int offset
, enum machine_mode ymode
)
3017 int nregs_xmode
, nregs_ymode
, nregs_xmode_unit_int
;
3018 int mode_multiple
, nregs_multiple
;
3020 enum machine_mode xmode_unit
, xmode_unit_int
;
3022 gcc_assert (xregno
< FIRST_PSEUDO_REGISTER
);
3024 if (GET_MODE_INNER (xmode
) == VOIDmode
)
3027 xmode_unit
= GET_MODE_INNER (xmode
);
3029 if (FLOAT_MODE_P (xmode_unit
))
3031 xmode_unit_int
= int_mode_for_mode (xmode_unit
);
3032 if (xmode_unit_int
== BLKmode
)
3033 /* It's probably bad to be here; a port should have an integer mode
3034 that's the same size as anything of which it takes a SUBREG. */
3035 xmode_unit_int
= xmode_unit
;
3038 xmode_unit_int
= xmode_unit
;
3040 nregs_xmode_unit_int
= hard_regno_nregs
[xregno
][xmode_unit_int
];
3042 /* Adjust nregs_xmode to allow for 'holes'. */
3043 if (nregs_xmode_unit_int
!= hard_regno_nregs
[xregno
][xmode_unit
])
3044 nregs_xmode
= nregs_xmode_unit_int
* GET_MODE_NUNITS (xmode
);
3046 nregs_xmode
= hard_regno_nregs
[xregno
][xmode
];
3048 nregs_ymode
= hard_regno_nregs
[xregno
][ymode
];
3050 /* If this is a big endian paradoxical subreg, which uses more actual
3051 hard registers than the original register, we must return a negative
3052 offset so that we find the proper highpart of the register. */
3054 && nregs_ymode
> nregs_xmode
3055 && (GET_MODE_SIZE (ymode
) > UNITS_PER_WORD
3056 ? WORDS_BIG_ENDIAN
: BYTES_BIG_ENDIAN
))
3057 return nregs_xmode
- nregs_ymode
;
3059 if (offset
== 0 || nregs_xmode
== nregs_ymode
)
3062 /* Size of ymode must not be greater than the size of xmode. */
3063 mode_multiple
= GET_MODE_SIZE (xmode
) / GET_MODE_SIZE (ymode
);
3064 gcc_assert (mode_multiple
!= 0);
3066 y_offset
= offset
/ GET_MODE_SIZE (ymode
);
3067 nregs_multiple
= nregs_xmode
/ nregs_ymode
;
3068 return (y_offset
/ (mode_multiple
/ nregs_multiple
)) * nregs_ymode
;
3071 /* This function returns true when the offset is representable via
3072 subreg_offset in the given regno.
3073 xregno - A regno of an inner hard subreg_reg (or what will become one).
3074 xmode - The mode of xregno.
3075 offset - The byte offset.
3076 ymode - The mode of a top level SUBREG (or what may become one).
3077 RETURN - Whether the offset is representable. */
3079 subreg_offset_representable_p (unsigned int xregno
, enum machine_mode xmode
,
3080 unsigned int offset
, enum machine_mode ymode
)
3082 int nregs_xmode
, nregs_ymode
, nregs_xmode_unit
, nregs_xmode_unit_int
;
3083 int mode_multiple
, nregs_multiple
;
3085 enum machine_mode xmode_unit
, xmode_unit_int
;
3087 gcc_assert (xregno
< FIRST_PSEUDO_REGISTER
);
3089 if (GET_MODE_INNER (xmode
) == VOIDmode
)
3092 xmode_unit
= GET_MODE_INNER (xmode
);
3094 if (FLOAT_MODE_P (xmode_unit
))
3096 xmode_unit_int
= int_mode_for_mode (xmode_unit
);
3097 if (xmode_unit_int
== BLKmode
)
3098 /* It's probably bad to be here; a port should have an integer mode
3099 that's the same size as anything of which it takes a SUBREG. */
3100 xmode_unit_int
= xmode_unit
;
3103 xmode_unit_int
= xmode_unit
;
3105 nregs_xmode_unit
= hard_regno_nregs
[xregno
][xmode_unit
];
3106 nregs_xmode_unit_int
= hard_regno_nregs
[xregno
][xmode_unit_int
];
3108 /* If there are holes in a non-scalar mode in registers, we expect
3109 that it is made up of its units concatenated together. */
3110 if (nregs_xmode_unit
!= nregs_xmode_unit_int
)
3112 gcc_assert (nregs_xmode_unit
* GET_MODE_NUNITS (xmode
)
3113 == hard_regno_nregs
[xregno
][xmode
]);
3115 /* You can only ask for a SUBREG of a value with holes in the middle
3116 if you don't cross the holes. (Such a SUBREG should be done by
3117 picking a different register class, or doing it in memory if
3118 necessary.) An example of a value with holes is XCmode on 32-bit
3119 x86 with -m128bit-long-double; it's represented in 6 32-bit registers,
3120 3 for each part, but in memory it's two 128-bit parts.
3121 Padding is assumed to be at the end (not necessarily the 'high part')
3123 if (nregs_xmode_unit
!= nregs_xmode_unit_int
3124 && (offset
/ GET_MODE_SIZE (xmode_unit_int
) + 1
3125 < GET_MODE_NUNITS (xmode
))
3126 && (offset
/ GET_MODE_SIZE (xmode_unit_int
)
3127 != ((offset
+ GET_MODE_SIZE (ymode
) - 1)
3128 / GET_MODE_SIZE (xmode_unit_int
))))
3131 nregs_xmode
= nregs_xmode_unit_int
* GET_MODE_NUNITS (xmode
);
3134 nregs_xmode
= hard_regno_nregs
[xregno
][xmode
];
3136 nregs_ymode
= hard_regno_nregs
[xregno
][ymode
];
3138 /* Paradoxical subregs are otherwise valid. */
3140 && nregs_ymode
> nregs_xmode
3141 && (GET_MODE_SIZE (ymode
) > UNITS_PER_WORD
3142 ? WORDS_BIG_ENDIAN
: BYTES_BIG_ENDIAN
))
3145 /* Lowpart subregs are otherwise valid. */
3146 if (offset
== subreg_lowpart_offset (ymode
, xmode
))
3149 /* This should always pass, otherwise we don't know how to verify
3150 the constraint. These conditions may be relaxed but
3151 subreg_regno_offset would need to be redesigned. */
3152 gcc_assert ((GET_MODE_SIZE (xmode
) % GET_MODE_SIZE (ymode
)) == 0);
3153 gcc_assert ((nregs_xmode
% nregs_ymode
) == 0);
3155 /* The XMODE value can be seen as a vector of NREGS_XMODE
3156 values. The subreg must represent a lowpart of given field.
3157 Compute what field it is. */
3158 offset
-= subreg_lowpart_offset (ymode
,
3159 mode_for_size (GET_MODE_BITSIZE (xmode
)
3163 /* Size of ymode must not be greater than the size of xmode. */
3164 mode_multiple
= GET_MODE_SIZE (xmode
) / GET_MODE_SIZE (ymode
);
3165 gcc_assert (mode_multiple
!= 0);
3167 y_offset
= offset
/ GET_MODE_SIZE (ymode
);
3168 nregs_multiple
= nregs_xmode
/ nregs_ymode
;
3170 gcc_assert ((offset
% GET_MODE_SIZE (ymode
)) == 0);
3171 gcc_assert ((mode_multiple
% nregs_multiple
) == 0);
3173 return (!(y_offset
% (mode_multiple
/ nregs_multiple
)));
3176 /* Return the final regno that a subreg expression refers to. */
3178 subreg_regno (rtx x
)
3181 rtx subreg
= SUBREG_REG (x
);
3182 int regno
= REGNO (subreg
);
3184 ret
= regno
+ subreg_regno_offset (regno
,
3191 struct parms_set_data
3197 /* Helper function for noticing stores to parameter registers. */
3199 parms_set (rtx x
, rtx pat ATTRIBUTE_UNUSED
, void *data
)
3201 struct parms_set_data
*d
= data
;
3202 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
3203 && TEST_HARD_REG_BIT (d
->regs
, REGNO (x
)))
3205 CLEAR_HARD_REG_BIT (d
->regs
, REGNO (x
));
3210 /* Look backward for first parameter to be loaded.
3211 Note that loads of all parameters will not necessarily be
3212 found if CSE has eliminated some of them (e.g., an argument
3213 to the outer function is passed down as a parameter).
3214 Do not skip BOUNDARY. */
3216 find_first_parameter_load (rtx call_insn
, rtx boundary
)
3218 struct parms_set_data parm
;
3219 rtx p
, before
, first_set
;
3221 /* Since different machines initialize their parameter registers
3222 in different orders, assume nothing. Collect the set of all
3223 parameter registers. */
3224 CLEAR_HARD_REG_SET (parm
.regs
);
3226 for (p
= CALL_INSN_FUNCTION_USAGE (call_insn
); p
; p
= XEXP (p
, 1))
3227 if (GET_CODE (XEXP (p
, 0)) == USE
3228 && REG_P (XEXP (XEXP (p
, 0), 0)))
3230 gcc_assert (REGNO (XEXP (XEXP (p
, 0), 0)) < FIRST_PSEUDO_REGISTER
);
3232 /* We only care about registers which can hold function
3234 if (!FUNCTION_ARG_REGNO_P (REGNO (XEXP (XEXP (p
, 0), 0))))
3237 SET_HARD_REG_BIT (parm
.regs
, REGNO (XEXP (XEXP (p
, 0), 0)));
3241 first_set
= call_insn
;
3243 /* Search backward for the first set of a register in this set. */
3244 while (parm
.nregs
&& before
!= boundary
)
3246 before
= PREV_INSN (before
);
3248 /* It is possible that some loads got CSEed from one call to
3249 another. Stop in that case. */
3250 if (CALL_P (before
))
3253 /* Our caller needs either ensure that we will find all sets
3254 (in case code has not been optimized yet), or take care
3255 for possible labels in a way by setting boundary to preceding
3257 if (LABEL_P (before
))
3259 gcc_assert (before
== boundary
);
3263 if (INSN_P (before
))
3265 int nregs_old
= parm
.nregs
;
3266 note_stores (PATTERN (before
), parms_set
, &parm
);
3267 /* If we found something that did not set a parameter reg,
3268 we're done. Do not keep going, as that might result
3269 in hoisting an insn before the setting of a pseudo
3270 that is used by the hoisted insn. */
3271 if (nregs_old
!= parm
.nregs
)
3280 /* Return true if we should avoid inserting code between INSN and preceding
3281 call instruction. */
3284 keep_with_call_p (rtx insn
)
3288 if (INSN_P (insn
) && (set
= single_set (insn
)) != NULL
)
3290 if (REG_P (SET_DEST (set
))
3291 && REGNO (SET_DEST (set
)) < FIRST_PSEUDO_REGISTER
3292 && fixed_regs
[REGNO (SET_DEST (set
))]
3293 && general_operand (SET_SRC (set
), VOIDmode
))
3295 if (REG_P (SET_SRC (set
))
3296 && FUNCTION_VALUE_REGNO_P (REGNO (SET_SRC (set
)))
3297 && REG_P (SET_DEST (set
))
3298 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
3300 /* There may be a stack pop just after the call and before the store
3301 of the return register. Search for the actual store when deciding
3302 if we can break or not. */
3303 if (SET_DEST (set
) == stack_pointer_rtx
)
3305 rtx i2
= next_nonnote_insn (insn
);
3306 if (i2
&& keep_with_call_p (i2
))
3313 /* Return true if LABEL is a target of JUMP_INSN. This applies only
3314 to non-complex jumps. That is, direct unconditional, conditional,
3315 and tablejumps, but not computed jumps or returns. It also does
3316 not apply to the fallthru case of a conditional jump. */
3319 label_is_jump_target_p (rtx label
, rtx jump_insn
)
3321 rtx tmp
= JUMP_LABEL (jump_insn
);
3326 if (tablejump_p (jump_insn
, NULL
, &tmp
))
3328 rtvec vec
= XVEC (PATTERN (tmp
),
3329 GET_CODE (PATTERN (tmp
)) == ADDR_DIFF_VEC
);
3330 int i
, veclen
= GET_NUM_ELEM (vec
);
3332 for (i
= 0; i
< veclen
; ++i
)
3333 if (XEXP (RTVEC_ELT (vec
, i
), 0) == label
)
3341 /* Return an estimate of the cost of computing rtx X.
3342 One use is in cse, to decide which expression to keep in the hash table.
3343 Another is in rtl generation, to pick the cheapest way to multiply.
3344 Other uses like the latter are expected in the future. */
3347 rtx_cost (rtx x
, enum rtx_code outer_code ATTRIBUTE_UNUSED
)
3357 /* Compute the default costs of certain things.
3358 Note that targetm.rtx_costs can override the defaults. */
3360 code
= GET_CODE (x
);
3364 total
= COSTS_N_INSNS (5);
3370 total
= COSTS_N_INSNS (7);
3373 /* Used in loop.c and combine.c as a marker. */
3377 total
= COSTS_N_INSNS (1);
3387 /* If we can't tie these modes, make this expensive. The larger
3388 the mode, the more expensive it is. */
3389 if (! MODES_TIEABLE_P (GET_MODE (x
), GET_MODE (SUBREG_REG (x
))))
3390 return COSTS_N_INSNS (2
3391 + GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
);
3395 if (targetm
.rtx_costs (x
, code
, outer_code
, &total
))
3400 /* Sum the costs of the sub-rtx's, plus cost of this operation,
3401 which is already in total. */
3403 fmt
= GET_RTX_FORMAT (code
);
3404 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3406 total
+= rtx_cost (XEXP (x
, i
), code
);
3407 else if (fmt
[i
] == 'E')
3408 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3409 total
+= rtx_cost (XVECEXP (x
, i
, j
), code
);
3414 /* Return cost of address expression X.
3415 Expect that X is properly formed address reference. */
3418 address_cost (rtx x
, enum machine_mode mode
)
3420 /* We may be asked for cost of various unusual addresses, such as operands
3421 of push instruction. It is not worthwhile to complicate writing
3422 of the target hook by such cases. */
3424 if (!memory_address_p (mode
, x
))
3427 return targetm
.address_cost (x
);
3430 /* If the target doesn't override, compute the cost as with arithmetic. */
3433 default_address_cost (rtx x
)
3435 return rtx_cost (x
, MEM
);
3439 unsigned HOST_WIDE_INT
3440 nonzero_bits (rtx x
, enum machine_mode mode
)
3442 return cached_nonzero_bits (x
, mode
, NULL_RTX
, VOIDmode
, 0);
3446 num_sign_bit_copies (rtx x
, enum machine_mode mode
)
3448 return cached_num_sign_bit_copies (x
, mode
, NULL_RTX
, VOIDmode
, 0);
3451 /* The function cached_nonzero_bits is a wrapper around nonzero_bits1.
3452 It avoids exponential behavior in nonzero_bits1 when X has
3453 identical subexpressions on the first or the second level. */
3455 static unsigned HOST_WIDE_INT
3456 cached_nonzero_bits (rtx x
, enum machine_mode mode
, rtx known_x
,
3457 enum machine_mode known_mode
,
3458 unsigned HOST_WIDE_INT known_ret
)
3460 if (x
== known_x
&& mode
== known_mode
)
3463 /* Try to find identical subexpressions. If found call
3464 nonzero_bits1 on X with the subexpressions as KNOWN_X and the
3465 precomputed value for the subexpression as KNOWN_RET. */
3467 if (ARITHMETIC_P (x
))
3469 rtx x0
= XEXP (x
, 0);
3470 rtx x1
= XEXP (x
, 1);
3472 /* Check the first level. */
3474 return nonzero_bits1 (x
, mode
, x0
, mode
,
3475 cached_nonzero_bits (x0
, mode
, known_x
,
3476 known_mode
, known_ret
));
3478 /* Check the second level. */
3479 if (ARITHMETIC_P (x0
)
3480 && (x1
== XEXP (x0
, 0) || x1
== XEXP (x0
, 1)))
3481 return nonzero_bits1 (x
, mode
, x1
, mode
,
3482 cached_nonzero_bits (x1
, mode
, known_x
,
3483 known_mode
, known_ret
));
3485 if (ARITHMETIC_P (x1
)
3486 && (x0
== XEXP (x1
, 0) || x0
== XEXP (x1
, 1)))
3487 return nonzero_bits1 (x
, mode
, x0
, mode
,
3488 cached_nonzero_bits (x0
, mode
, known_x
,
3489 known_mode
, known_ret
));
3492 return nonzero_bits1 (x
, mode
, known_x
, known_mode
, known_ret
);
3495 /* We let num_sign_bit_copies recur into nonzero_bits as that is useful.
3496 We don't let nonzero_bits recur into num_sign_bit_copies, because that
3497 is less useful. We can't allow both, because that results in exponential
3498 run time recursion. There is a nullstone testcase that triggered
3499 this. This macro avoids accidental uses of num_sign_bit_copies. */
3500 #define cached_num_sign_bit_copies sorry_i_am_preventing_exponential_behavior
3502 /* Given an expression, X, compute which bits in X can be nonzero.
3503 We don't care about bits outside of those defined in MODE.
3505 For most X this is simply GET_MODE_MASK (GET_MODE (MODE)), but if X is
3506 an arithmetic operation, we can do better. */
3508 static unsigned HOST_WIDE_INT
3509 nonzero_bits1 (rtx x
, enum machine_mode mode
, rtx known_x
,
3510 enum machine_mode known_mode
,
3511 unsigned HOST_WIDE_INT known_ret
)
3513 unsigned HOST_WIDE_INT nonzero
= GET_MODE_MASK (mode
);
3514 unsigned HOST_WIDE_INT inner_nz
;
3516 unsigned int mode_width
= GET_MODE_BITSIZE (mode
);
3518 /* For floating-point values, assume all bits are needed. */
3519 if (FLOAT_MODE_P (GET_MODE (x
)) || FLOAT_MODE_P (mode
))
3522 /* If X is wider than MODE, use its mode instead. */
3523 if (GET_MODE_BITSIZE (GET_MODE (x
)) > mode_width
)
3525 mode
= GET_MODE (x
);
3526 nonzero
= GET_MODE_MASK (mode
);
3527 mode_width
= GET_MODE_BITSIZE (mode
);
3530 if (mode_width
> HOST_BITS_PER_WIDE_INT
)
3531 /* Our only callers in this case look for single bit values. So
3532 just return the mode mask. Those tests will then be false. */
3535 #ifndef WORD_REGISTER_OPERATIONS
3536 /* If MODE is wider than X, but both are a single word for both the host
3537 and target machines, we can compute this from which bits of the
3538 object might be nonzero in its own mode, taking into account the fact
3539 that on many CISC machines, accessing an object in a wider mode
3540 causes the high-order bits to become undefined. So they are
3541 not known to be zero. */
3543 if (GET_MODE (x
) != VOIDmode
&& GET_MODE (x
) != mode
3544 && GET_MODE_BITSIZE (GET_MODE (x
)) <= BITS_PER_WORD
3545 && GET_MODE_BITSIZE (GET_MODE (x
)) <= HOST_BITS_PER_WIDE_INT
3546 && GET_MODE_BITSIZE (mode
) > GET_MODE_BITSIZE (GET_MODE (x
)))
3548 nonzero
&= cached_nonzero_bits (x
, GET_MODE (x
),
3549 known_x
, known_mode
, known_ret
);
3550 nonzero
|= GET_MODE_MASK (mode
) & ~GET_MODE_MASK (GET_MODE (x
));
3555 code
= GET_CODE (x
);
3559 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
3560 /* If pointers extend unsigned and this is a pointer in Pmode, say that
3561 all the bits above ptr_mode are known to be zero. */
3562 if (POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
3564 nonzero
&= GET_MODE_MASK (ptr_mode
);
3567 /* Include declared information about alignment of pointers. */
3568 /* ??? We don't properly preserve REG_POINTER changes across
3569 pointer-to-integer casts, so we can't trust it except for
3570 things that we know must be pointers. See execute/960116-1.c. */
3571 if ((x
== stack_pointer_rtx
3572 || x
== frame_pointer_rtx
3573 || x
== arg_pointer_rtx
)
3574 && REGNO_POINTER_ALIGN (REGNO (x
)))
3576 unsigned HOST_WIDE_INT alignment
3577 = REGNO_POINTER_ALIGN (REGNO (x
)) / BITS_PER_UNIT
;
3579 #ifdef PUSH_ROUNDING
3580 /* If PUSH_ROUNDING is defined, it is possible for the
3581 stack to be momentarily aligned only to that amount,
3582 so we pick the least alignment. */
3583 if (x
== stack_pointer_rtx
&& PUSH_ARGS
)
3584 alignment
= MIN ((unsigned HOST_WIDE_INT
) PUSH_ROUNDING (1),
3588 nonzero
&= ~(alignment
- 1);
3592 unsigned HOST_WIDE_INT nonzero_for_hook
= nonzero
;
3593 rtx
new = rtl_hooks
.reg_nonzero_bits (x
, mode
, known_x
,
3594 known_mode
, known_ret
,
3598 nonzero_for_hook
&= cached_nonzero_bits (new, mode
, known_x
,
3599 known_mode
, known_ret
);
3601 return nonzero_for_hook
;
3605 #ifdef SHORT_IMMEDIATES_SIGN_EXTEND
3606 /* If X is negative in MODE, sign-extend the value. */
3607 if (INTVAL (x
) > 0 && mode_width
< BITS_PER_WORD
3608 && 0 != (INTVAL (x
) & ((HOST_WIDE_INT
) 1 << (mode_width
- 1))))
3609 return (INTVAL (x
) | ((HOST_WIDE_INT
) (-1) << mode_width
));
3615 #ifdef LOAD_EXTEND_OP
3616 /* In many, if not most, RISC machines, reading a byte from memory
3617 zeros the rest of the register. Noticing that fact saves a lot
3618 of extra zero-extends. */
3619 if (LOAD_EXTEND_OP (GET_MODE (x
)) == ZERO_EXTEND
)
3620 nonzero
&= GET_MODE_MASK (GET_MODE (x
));
3625 case UNEQ
: case LTGT
:
3626 case GT
: case GTU
: case UNGT
:
3627 case LT
: case LTU
: case UNLT
:
3628 case GE
: case GEU
: case UNGE
:
3629 case LE
: case LEU
: case UNLE
:
3630 case UNORDERED
: case ORDERED
:
3631 /* If this produces an integer result, we know which bits are set.
3632 Code here used to clear bits outside the mode of X, but that is
3634 /* Mind that MODE is the mode the caller wants to look at this
3635 operation in, and not the actual operation mode. We can wind
3636 up with (subreg:DI (gt:V4HI x y)), and we don't have anything
3637 that describes the results of a vector compare. */
3638 if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
3639 && mode_width
<= HOST_BITS_PER_WIDE_INT
)
3640 nonzero
= STORE_FLAG_VALUE
;
3645 /* Disabled to avoid exponential mutual recursion between nonzero_bits
3646 and num_sign_bit_copies. */
3647 if (num_sign_bit_copies (XEXP (x
, 0), GET_MODE (x
))
3648 == GET_MODE_BITSIZE (GET_MODE (x
)))
3652 if (GET_MODE_SIZE (GET_MODE (x
)) < mode_width
)
3653 nonzero
|= (GET_MODE_MASK (mode
) & ~GET_MODE_MASK (GET_MODE (x
)));
3658 /* Disabled to avoid exponential mutual recursion between nonzero_bits
3659 and num_sign_bit_copies. */
3660 if (num_sign_bit_copies (XEXP (x
, 0), GET_MODE (x
))
3661 == GET_MODE_BITSIZE (GET_MODE (x
)))
3667 nonzero
&= (cached_nonzero_bits (XEXP (x
, 0), mode
,
3668 known_x
, known_mode
, known_ret
)
3669 & GET_MODE_MASK (mode
));
3673 nonzero
&= cached_nonzero_bits (XEXP (x
, 0), mode
,
3674 known_x
, known_mode
, known_ret
);
3675 if (GET_MODE (XEXP (x
, 0)) != VOIDmode
)
3676 nonzero
&= GET_MODE_MASK (GET_MODE (XEXP (x
, 0)));
3680 /* If the sign bit is known clear, this is the same as ZERO_EXTEND.
3681 Otherwise, show all the bits in the outer mode but not the inner
3683 inner_nz
= cached_nonzero_bits (XEXP (x
, 0), mode
,
3684 known_x
, known_mode
, known_ret
);
3685 if (GET_MODE (XEXP (x
, 0)) != VOIDmode
)
3687 inner_nz
&= GET_MODE_MASK (GET_MODE (XEXP (x
, 0)));
3689 & (((HOST_WIDE_INT
) 1
3690 << (GET_MODE_BITSIZE (GET_MODE (XEXP (x
, 0))) - 1))))
3691 inner_nz
|= (GET_MODE_MASK (mode
)
3692 & ~GET_MODE_MASK (GET_MODE (XEXP (x
, 0))));
3695 nonzero
&= inner_nz
;
3699 nonzero
&= cached_nonzero_bits (XEXP (x
, 0), mode
,
3700 known_x
, known_mode
, known_ret
)
3701 & cached_nonzero_bits (XEXP (x
, 1), mode
,
3702 known_x
, known_mode
, known_ret
);
3706 case UMIN
: case UMAX
: case SMIN
: case SMAX
:
3708 unsigned HOST_WIDE_INT nonzero0
=
3709 cached_nonzero_bits (XEXP (x
, 0), mode
,
3710 known_x
, known_mode
, known_ret
);
3712 /* Don't call nonzero_bits for the second time if it cannot change
3714 if ((nonzero
& nonzero0
) != nonzero
)
3716 | cached_nonzero_bits (XEXP (x
, 1), mode
,
3717 known_x
, known_mode
, known_ret
);
3721 case PLUS
: case MINUS
:
3723 case DIV
: case UDIV
:
3724 case MOD
: case UMOD
:
3725 /* We can apply the rules of arithmetic to compute the number of
3726 high- and low-order zero bits of these operations. We start by
3727 computing the width (position of the highest-order nonzero bit)
3728 and the number of low-order zero bits for each value. */
3730 unsigned HOST_WIDE_INT nz0
=
3731 cached_nonzero_bits (XEXP (x
, 0), mode
,
3732 known_x
, known_mode
, known_ret
);
3733 unsigned HOST_WIDE_INT nz1
=
3734 cached_nonzero_bits (XEXP (x
, 1), mode
,
3735 known_x
, known_mode
, known_ret
);
3736 int sign_index
= GET_MODE_BITSIZE (GET_MODE (x
)) - 1;
3737 int width0
= floor_log2 (nz0
) + 1;
3738 int width1
= floor_log2 (nz1
) + 1;
3739 int low0
= floor_log2 (nz0
& -nz0
);
3740 int low1
= floor_log2 (nz1
& -nz1
);
3741 HOST_WIDE_INT op0_maybe_minusp
3742 = (nz0
& ((HOST_WIDE_INT
) 1 << sign_index
));
3743 HOST_WIDE_INT op1_maybe_minusp
3744 = (nz1
& ((HOST_WIDE_INT
) 1 << sign_index
));
3745 unsigned int result_width
= mode_width
;
3751 result_width
= MAX (width0
, width1
) + 1;
3752 result_low
= MIN (low0
, low1
);
3755 result_low
= MIN (low0
, low1
);
3758 result_width
= width0
+ width1
;
3759 result_low
= low0
+ low1
;
3764 if (! op0_maybe_minusp
&& ! op1_maybe_minusp
)
3765 result_width
= width0
;
3770 result_width
= width0
;
3775 if (! op0_maybe_minusp
&& ! op1_maybe_minusp
)
3776 result_width
= MIN (width0
, width1
);
3777 result_low
= MIN (low0
, low1
);
3782 result_width
= MIN (width0
, width1
);
3783 result_low
= MIN (low0
, low1
);
3789 if (result_width
< mode_width
)
3790 nonzero
&= ((HOST_WIDE_INT
) 1 << result_width
) - 1;
3793 nonzero
&= ~(((HOST_WIDE_INT
) 1 << result_low
) - 1);
3795 #ifdef POINTERS_EXTEND_UNSIGNED
3796 /* If pointers extend unsigned and this is an addition or subtraction
3797 to a pointer in Pmode, all the bits above ptr_mode are known to be
3799 if (POINTERS_EXTEND_UNSIGNED
> 0 && GET_MODE (x
) == Pmode
3800 && (code
== PLUS
|| code
== MINUS
)
3801 && REG_P (XEXP (x
, 0)) && REG_POINTER (XEXP (x
, 0)))
3802 nonzero
&= GET_MODE_MASK (ptr_mode
);
3808 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
3809 && INTVAL (XEXP (x
, 1)) < HOST_BITS_PER_WIDE_INT
)
3810 nonzero
&= ((HOST_WIDE_INT
) 1 << INTVAL (XEXP (x
, 1))) - 1;
3814 /* If this is a SUBREG formed for a promoted variable that has
3815 been zero-extended, we know that at least the high-order bits
3816 are zero, though others might be too. */
3818 if (SUBREG_PROMOTED_VAR_P (x
) && SUBREG_PROMOTED_UNSIGNED_P (x
) > 0)
3819 nonzero
= GET_MODE_MASK (GET_MODE (x
))
3820 & cached_nonzero_bits (SUBREG_REG (x
), GET_MODE (x
),
3821 known_x
, known_mode
, known_ret
);
3823 /* If the inner mode is a single word for both the host and target
3824 machines, we can compute this from which bits of the inner
3825 object might be nonzero. */
3826 if (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
))) <= BITS_PER_WORD
3827 && (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
3828 <= HOST_BITS_PER_WIDE_INT
))
3830 nonzero
&= cached_nonzero_bits (SUBREG_REG (x
), mode
,
3831 known_x
, known_mode
, known_ret
);
3833 #if defined (WORD_REGISTER_OPERATIONS) && defined (LOAD_EXTEND_OP)
3834 /* If this is a typical RISC machine, we only have to worry
3835 about the way loads are extended. */
3836 if ((LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x
))) == SIGN_EXTEND
3838 & (((unsigned HOST_WIDE_INT
) 1
3839 << (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
))) - 1))))
3841 : LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x
))) != ZERO_EXTEND
)
3842 || !MEM_P (SUBREG_REG (x
)))
3845 /* On many CISC machines, accessing an object in a wider mode
3846 causes the high-order bits to become undefined. So they are
3847 not known to be zero. */
3848 if (GET_MODE_SIZE (GET_MODE (x
))
3849 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
3850 nonzero
|= (GET_MODE_MASK (GET_MODE (x
))
3851 & ~GET_MODE_MASK (GET_MODE (SUBREG_REG (x
))));
3860 /* The nonzero bits are in two classes: any bits within MODE
3861 that aren't in GET_MODE (x) are always significant. The rest of the
3862 nonzero bits are those that are significant in the operand of
3863 the shift when shifted the appropriate number of bits. This
3864 shows that high-order bits are cleared by the right shift and
3865 low-order bits by left shifts. */
3866 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
3867 && INTVAL (XEXP (x
, 1)) >= 0
3868 && INTVAL (XEXP (x
, 1)) < HOST_BITS_PER_WIDE_INT
)
3870 enum machine_mode inner_mode
= GET_MODE (x
);
3871 unsigned int width
= GET_MODE_BITSIZE (inner_mode
);
3872 int count
= INTVAL (XEXP (x
, 1));
3873 unsigned HOST_WIDE_INT mode_mask
= GET_MODE_MASK (inner_mode
);
3874 unsigned HOST_WIDE_INT op_nonzero
=
3875 cached_nonzero_bits (XEXP (x
, 0), mode
,
3876 known_x
, known_mode
, known_ret
);
3877 unsigned HOST_WIDE_INT inner
= op_nonzero
& mode_mask
;
3878 unsigned HOST_WIDE_INT outer
= 0;
3880 if (mode_width
> width
)
3881 outer
= (op_nonzero
& nonzero
& ~mode_mask
);
3883 if (code
== LSHIFTRT
)
3885 else if (code
== ASHIFTRT
)
3889 /* If the sign bit may have been nonzero before the shift, we
3890 need to mark all the places it could have been copied to
3891 by the shift as possibly nonzero. */
3892 if (inner
& ((HOST_WIDE_INT
) 1 << (width
- 1 - count
)))
3893 inner
|= (((HOST_WIDE_INT
) 1 << count
) - 1) << (width
- count
);
3895 else if (code
== ASHIFT
)
3898 inner
= ((inner
<< (count
% width
)
3899 | (inner
>> (width
- (count
% width
)))) & mode_mask
);
3901 nonzero
&= (outer
| inner
);
3907 /* This is at most the number of bits in the mode. */
3908 nonzero
= ((HOST_WIDE_INT
) 2 << (floor_log2 (mode_width
))) - 1;
3912 /* If CLZ has a known value at zero, then the nonzero bits are
3913 that value, plus the number of bits in the mode minus one. */
3914 if (CLZ_DEFINED_VALUE_AT_ZERO (mode
, nonzero
))
3915 nonzero
|= ((HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
3921 /* If CTZ has a known value at zero, then the nonzero bits are
3922 that value, plus the number of bits in the mode minus one. */
3923 if (CTZ_DEFINED_VALUE_AT_ZERO (mode
, nonzero
))
3924 nonzero
|= ((HOST_WIDE_INT
) 1 << (floor_log2 (mode_width
))) - 1;
3935 unsigned HOST_WIDE_INT nonzero_true
=
3936 cached_nonzero_bits (XEXP (x
, 1), mode
,
3937 known_x
, known_mode
, known_ret
);
3939 /* Don't call nonzero_bits for the second time if it cannot change
3941 if ((nonzero
& nonzero_true
) != nonzero
)
3942 nonzero
&= nonzero_true
3943 | cached_nonzero_bits (XEXP (x
, 2), mode
,
3944 known_x
, known_mode
, known_ret
);
3955 /* See the macro definition above. */
3956 #undef cached_num_sign_bit_copies
3959 /* The function cached_num_sign_bit_copies is a wrapper around
3960 num_sign_bit_copies1. It avoids exponential behavior in
3961 num_sign_bit_copies1 when X has identical subexpressions on the
3962 first or the second level. */
3965 cached_num_sign_bit_copies (rtx x
, enum machine_mode mode
, rtx known_x
,
3966 enum machine_mode known_mode
,
3967 unsigned int known_ret
)
3969 if (x
== known_x
&& mode
== known_mode
)
3972 /* Try to find identical subexpressions. If found call
3973 num_sign_bit_copies1 on X with the subexpressions as KNOWN_X and
3974 the precomputed value for the subexpression as KNOWN_RET. */
3976 if (ARITHMETIC_P (x
))
3978 rtx x0
= XEXP (x
, 0);
3979 rtx x1
= XEXP (x
, 1);
3981 /* Check the first level. */
3984 num_sign_bit_copies1 (x
, mode
, x0
, mode
,
3985 cached_num_sign_bit_copies (x0
, mode
, known_x
,
3989 /* Check the second level. */
3990 if (ARITHMETIC_P (x0
)
3991 && (x1
== XEXP (x0
, 0) || x1
== XEXP (x0
, 1)))
3993 num_sign_bit_copies1 (x
, mode
, x1
, mode
,
3994 cached_num_sign_bit_copies (x1
, mode
, known_x
,
3998 if (ARITHMETIC_P (x1
)
3999 && (x0
== XEXP (x1
, 0) || x0
== XEXP (x1
, 1)))
4001 num_sign_bit_copies1 (x
, mode
, x0
, mode
,
4002 cached_num_sign_bit_copies (x0
, mode
, known_x
,
4007 return num_sign_bit_copies1 (x
, mode
, known_x
, known_mode
, known_ret
);
4010 /* Return the number of bits at the high-order end of X that are known to
4011 be equal to the sign bit. X will be used in mode MODE; if MODE is
4012 VOIDmode, X will be used in its own mode. The returned value will always
4013 be between 1 and the number of bits in MODE. */
4016 num_sign_bit_copies1 (rtx x
, enum machine_mode mode
, rtx known_x
,
4017 enum machine_mode known_mode
,
4018 unsigned int known_ret
)
4020 enum rtx_code code
= GET_CODE (x
);
4021 unsigned int bitwidth
= GET_MODE_BITSIZE (mode
);
4022 int num0
, num1
, result
;
4023 unsigned HOST_WIDE_INT nonzero
;
4025 /* If we weren't given a mode, use the mode of X. If the mode is still
4026 VOIDmode, we don't know anything. Likewise if one of the modes is
4029 if (mode
== VOIDmode
)
4030 mode
= GET_MODE (x
);
4032 if (mode
== VOIDmode
|| FLOAT_MODE_P (mode
) || FLOAT_MODE_P (GET_MODE (x
)))
4035 /* For a smaller object, just ignore the high bits. */
4036 if (bitwidth
< GET_MODE_BITSIZE (GET_MODE (x
)))
4038 num0
= cached_num_sign_bit_copies (x
, GET_MODE (x
),
4039 known_x
, known_mode
, known_ret
);
4041 num0
- (int) (GET_MODE_BITSIZE (GET_MODE (x
)) - bitwidth
));
4044 if (GET_MODE (x
) != VOIDmode
&& bitwidth
> GET_MODE_BITSIZE (GET_MODE (x
)))
4046 #ifndef WORD_REGISTER_OPERATIONS
4047 /* If this machine does not do all register operations on the entire
4048 register and MODE is wider than the mode of X, we can say nothing
4049 at all about the high-order bits. */
4052 /* Likewise on machines that do, if the mode of the object is smaller
4053 than a word and loads of that size don't sign extend, we can say
4054 nothing about the high order bits. */
4055 if (GET_MODE_BITSIZE (GET_MODE (x
)) < BITS_PER_WORD
4056 #ifdef LOAD_EXTEND_OP
4057 && LOAD_EXTEND_OP (GET_MODE (x
)) != SIGN_EXTEND
4068 #if defined(POINTERS_EXTEND_UNSIGNED) && !defined(HAVE_ptr_extend)
4069 /* If pointers extend signed and this is a pointer in Pmode, say that
4070 all the bits above ptr_mode are known to be sign bit copies. */
4071 if (! POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
&& mode
== Pmode
4073 return GET_MODE_BITSIZE (Pmode
) - GET_MODE_BITSIZE (ptr_mode
) + 1;
4077 unsigned int copies_for_hook
= 1, copies
= 1;
4078 rtx
new = rtl_hooks
.reg_num_sign_bit_copies (x
, mode
, known_x
,
4079 known_mode
, known_ret
,
4083 copies
= cached_num_sign_bit_copies (new, mode
, known_x
,
4084 known_mode
, known_ret
);
4086 if (copies
> 1 || copies_for_hook
> 1)
4087 return MAX (copies
, copies_for_hook
);
4089 /* Else, use nonzero_bits to guess num_sign_bit_copies (see below). */
4094 #ifdef LOAD_EXTEND_OP
4095 /* Some RISC machines sign-extend all loads of smaller than a word. */
4096 if (LOAD_EXTEND_OP (GET_MODE (x
)) == SIGN_EXTEND
)
4097 return MAX (1, ((int) bitwidth
4098 - (int) GET_MODE_BITSIZE (GET_MODE (x
)) + 1));
4103 /* If the constant is negative, take its 1's complement and remask.
4104 Then see how many zero bits we have. */
4105 nonzero
= INTVAL (x
) & GET_MODE_MASK (mode
);
4106 if (bitwidth
<= HOST_BITS_PER_WIDE_INT
4107 && (nonzero
& ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4108 nonzero
= (~nonzero
) & GET_MODE_MASK (mode
);
4110 return (nonzero
== 0 ? bitwidth
: bitwidth
- floor_log2 (nonzero
) - 1);
4113 /* If this is a SUBREG for a promoted object that is sign-extended
4114 and we are looking at it in a wider mode, we know that at least the
4115 high-order bits are known to be sign bit copies. */
4117 if (SUBREG_PROMOTED_VAR_P (x
) && ! SUBREG_PROMOTED_UNSIGNED_P (x
))
4119 num0
= cached_num_sign_bit_copies (SUBREG_REG (x
), mode
,
4120 known_x
, known_mode
, known_ret
);
4121 return MAX ((int) bitwidth
4122 - (int) GET_MODE_BITSIZE (GET_MODE (x
)) + 1,
4126 /* For a smaller object, just ignore the high bits. */
4127 if (bitwidth
<= GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
))))
4129 num0
= cached_num_sign_bit_copies (SUBREG_REG (x
), VOIDmode
,
4130 known_x
, known_mode
, known_ret
);
4131 return MAX (1, (num0
4132 - (int) (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4136 #ifdef WORD_REGISTER_OPERATIONS
4137 #ifdef LOAD_EXTEND_OP
4138 /* For paradoxical SUBREGs on machines where all register operations
4139 affect the entire register, just look inside. Note that we are
4140 passing MODE to the recursive call, so the number of sign bit copies
4141 will remain relative to that mode, not the inner mode. */
4143 /* This works only if loads sign extend. Otherwise, if we get a
4144 reload for the inner part, it may be loaded from the stack, and
4145 then we lose all sign bit copies that existed before the store
4148 if ((GET_MODE_SIZE (GET_MODE (x
))
4149 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4150 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (x
))) == SIGN_EXTEND
4151 && MEM_P (SUBREG_REG (x
)))
4152 return cached_num_sign_bit_copies (SUBREG_REG (x
), mode
,
4153 known_x
, known_mode
, known_ret
);
4159 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
4160 return MAX (1, (int) bitwidth
- INTVAL (XEXP (x
, 1)));
4164 return (bitwidth
- GET_MODE_BITSIZE (GET_MODE (XEXP (x
, 0)))
4165 + cached_num_sign_bit_copies (XEXP (x
, 0), VOIDmode
,
4166 known_x
, known_mode
, known_ret
));
4169 /* For a smaller object, just ignore the high bits. */
4170 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), VOIDmode
,
4171 known_x
, known_mode
, known_ret
);
4172 return MAX (1, (num0
- (int) (GET_MODE_BITSIZE (GET_MODE (XEXP (x
, 0)))
4176 return cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4177 known_x
, known_mode
, known_ret
);
4179 case ROTATE
: case ROTATERT
:
4180 /* If we are rotating left by a number of bits less than the number
4181 of sign bit copies, we can just subtract that amount from the
4183 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
4184 && INTVAL (XEXP (x
, 1)) >= 0
4185 && INTVAL (XEXP (x
, 1)) < (int) bitwidth
)
4187 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4188 known_x
, known_mode
, known_ret
);
4189 return MAX (1, num0
- (code
== ROTATE
? INTVAL (XEXP (x
, 1))
4190 : (int) bitwidth
- INTVAL (XEXP (x
, 1))));
4195 /* In general, this subtracts one sign bit copy. But if the value
4196 is known to be positive, the number of sign bit copies is the
4197 same as that of the input. Finally, if the input has just one bit
4198 that might be nonzero, all the bits are copies of the sign bit. */
4199 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4200 known_x
, known_mode
, known_ret
);
4201 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4202 return num0
> 1 ? num0
- 1 : 1;
4204 nonzero
= nonzero_bits (XEXP (x
, 0), mode
);
4209 && (((HOST_WIDE_INT
) 1 << (bitwidth
- 1)) & nonzero
))
4214 case IOR
: case AND
: case XOR
:
4215 case SMIN
: case SMAX
: case UMIN
: case UMAX
:
4216 /* Logical operations will preserve the number of sign-bit copies.
4217 MIN and MAX operations always return one of the operands. */
4218 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4219 known_x
, known_mode
, known_ret
);
4220 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4221 known_x
, known_mode
, known_ret
);
4222 return MIN (num0
, num1
);
4224 case PLUS
: case MINUS
:
4225 /* For addition and subtraction, we can have a 1-bit carry. However,
4226 if we are subtracting 1 from a positive number, there will not
4227 be such a carry. Furthermore, if the positive number is known to
4228 be 0 or 1, we know the result is either -1 or 0. */
4230 if (code
== PLUS
&& XEXP (x
, 1) == constm1_rtx
4231 && bitwidth
<= HOST_BITS_PER_WIDE_INT
)
4233 nonzero
= nonzero_bits (XEXP (x
, 0), mode
);
4234 if ((((HOST_WIDE_INT
) 1 << (bitwidth
- 1)) & nonzero
) == 0)
4235 return (nonzero
== 1 || nonzero
== 0 ? bitwidth
4236 : bitwidth
- floor_log2 (nonzero
) - 1);
4239 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4240 known_x
, known_mode
, known_ret
);
4241 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4242 known_x
, known_mode
, known_ret
);
4243 result
= MAX (1, MIN (num0
, num1
) - 1);
4245 #ifdef POINTERS_EXTEND_UNSIGNED
4246 /* If pointers extend signed and this is an addition or subtraction
4247 to a pointer in Pmode, all the bits above ptr_mode are known to be
4249 if (! POINTERS_EXTEND_UNSIGNED
&& GET_MODE (x
) == Pmode
4250 && (code
== PLUS
|| code
== MINUS
)
4251 && REG_P (XEXP (x
, 0)) && REG_POINTER (XEXP (x
, 0)))
4252 result
= MAX ((int) (GET_MODE_BITSIZE (Pmode
)
4253 - GET_MODE_BITSIZE (ptr_mode
) + 1),
4259 /* The number of bits of the product is the sum of the number of
4260 bits of both terms. However, unless one of the terms if known
4261 to be positive, we must allow for an additional bit since negating
4262 a negative number can remove one sign bit copy. */
4264 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4265 known_x
, known_mode
, known_ret
);
4266 num1
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4267 known_x
, known_mode
, known_ret
);
4269 result
= bitwidth
- (bitwidth
- num0
) - (bitwidth
- num1
);
4271 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4272 || (((nonzero_bits (XEXP (x
, 0), mode
)
4273 & ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4274 && ((nonzero_bits (XEXP (x
, 1), mode
)
4275 & ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0))))
4278 return MAX (1, result
);
4281 /* The result must be <= the first operand. If the first operand
4282 has the high bit set, we know nothing about the number of sign
4284 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4286 else if ((nonzero_bits (XEXP (x
, 0), mode
)
4287 & ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4290 return cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4291 known_x
, known_mode
, known_ret
);
4294 /* The result must be <= the second operand. */
4295 return cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4296 known_x
, known_mode
, known_ret
);
4299 /* Similar to unsigned division, except that we have to worry about
4300 the case where the divisor is negative, in which case we have
4302 result
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4303 known_x
, known_mode
, known_ret
);
4305 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4306 || (nonzero_bits (XEXP (x
, 1), mode
)
4307 & ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0))
4313 result
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4314 known_x
, known_mode
, known_ret
);
4316 && (bitwidth
> HOST_BITS_PER_WIDE_INT
4317 || (nonzero_bits (XEXP (x
, 1), mode
)
4318 & ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0))
4324 /* Shifts by a constant add to the number of bits equal to the
4326 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4327 known_x
, known_mode
, known_ret
);
4328 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
4329 && INTVAL (XEXP (x
, 1)) > 0)
4330 num0
= MIN ((int) bitwidth
, num0
+ INTVAL (XEXP (x
, 1)));
4335 /* Left shifts destroy copies. */
4336 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
4337 || INTVAL (XEXP (x
, 1)) < 0
4338 || INTVAL (XEXP (x
, 1)) >= (int) bitwidth
)
4341 num0
= cached_num_sign_bit_copies (XEXP (x
, 0), mode
,
4342 known_x
, known_mode
, known_ret
);
4343 return MAX (1, num0
- INTVAL (XEXP (x
, 1)));
4346 num0
= cached_num_sign_bit_copies (XEXP (x
, 1), mode
,
4347 known_x
, known_mode
, known_ret
);
4348 num1
= cached_num_sign_bit_copies (XEXP (x
, 2), mode
,
4349 known_x
, known_mode
, known_ret
);
4350 return MIN (num0
, num1
);
4352 case EQ
: case NE
: case GE
: case GT
: case LE
: case LT
:
4353 case UNEQ
: case LTGT
: case UNGE
: case UNGT
: case UNLE
: case UNLT
:
4354 case GEU
: case GTU
: case LEU
: case LTU
:
4355 case UNORDERED
: case ORDERED
:
4356 /* If the constant is negative, take its 1's complement and remask.
4357 Then see how many zero bits we have. */
4358 nonzero
= STORE_FLAG_VALUE
;
4359 if (bitwidth
<= HOST_BITS_PER_WIDE_INT
4360 && (nonzero
& ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))) != 0)
4361 nonzero
= (~nonzero
) & GET_MODE_MASK (mode
);
4363 return (nonzero
== 0 ? bitwidth
: bitwidth
- floor_log2 (nonzero
) - 1);
4369 /* If we haven't been able to figure it out by one of the above rules,
4370 see if some of the high-order bits are known to be zero. If so,
4371 count those bits and return one less than that amount. If we can't
4372 safely compute the mask for this mode, always return BITWIDTH. */
4374 bitwidth
= GET_MODE_BITSIZE (mode
);
4375 if (bitwidth
> HOST_BITS_PER_WIDE_INT
)
4378 nonzero
= nonzero_bits (x
, mode
);
4379 return nonzero
& ((HOST_WIDE_INT
) 1 << (bitwidth
- 1))
4380 ? 1 : bitwidth
- floor_log2 (nonzero
) - 1;
4383 /* Calculate the rtx_cost of a single instruction. A return value of
4384 zero indicates an instruction pattern without a known cost. */
4387 insn_rtx_cost (rtx pat
)
4392 /* Extract the single set rtx from the instruction pattern.
4393 We can't use single_set since we only have the pattern. */
4394 if (GET_CODE (pat
) == SET
)
4396 else if (GET_CODE (pat
) == PARALLEL
)
4399 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
4401 rtx x
= XVECEXP (pat
, 0, i
);
4402 if (GET_CODE (x
) == SET
)
4415 cost
= rtx_cost (SET_SRC (set
), SET
);
4416 return cost
> 0 ? cost
: COSTS_N_INSNS (1);
4419 /* Given an insn INSN and condition COND, return the condition in a
4420 canonical form to simplify testing by callers. Specifically:
4422 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
4423 (2) Both operands will be machine operands; (cc0) will have been replaced.
4424 (3) If an operand is a constant, it will be the second operand.
4425 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
4426 for GE, GEU, and LEU.
4428 If the condition cannot be understood, or is an inequality floating-point
4429 comparison which needs to be reversed, 0 will be returned.
4431 If REVERSE is nonzero, then reverse the condition prior to canonizing it.
4433 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4434 insn used in locating the condition was found. If a replacement test
4435 of the condition is desired, it should be placed in front of that
4436 insn and we will be sure that the inputs are still valid.
4438 If WANT_REG is nonzero, we wish the condition to be relative to that
4439 register, if possible. Therefore, do not canonicalize the condition
4440 further. If ALLOW_CC_MODE is nonzero, allow the condition returned
4441 to be a compare to a CC mode register.
4443 If VALID_AT_INSN_P, the condition must be valid at both *EARLIEST
4447 canonicalize_condition (rtx insn
, rtx cond
, int reverse
, rtx
*earliest
,
4448 rtx want_reg
, int allow_cc_mode
, int valid_at_insn_p
)
4455 int reverse_code
= 0;
4456 enum machine_mode mode
;
4457 basic_block bb
= BLOCK_FOR_INSN (insn
);
4459 code
= GET_CODE (cond
);
4460 mode
= GET_MODE (cond
);
4461 op0
= XEXP (cond
, 0);
4462 op1
= XEXP (cond
, 1);
4465 code
= reversed_comparison_code (cond
, insn
);
4466 if (code
== UNKNOWN
)
4472 /* If we are comparing a register with zero, see if the register is set
4473 in the previous insn to a COMPARE or a comparison operation. Perform
4474 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
4477 while ((GET_RTX_CLASS (code
) == RTX_COMPARE
4478 || GET_RTX_CLASS (code
) == RTX_COMM_COMPARE
)
4479 && op1
== CONST0_RTX (GET_MODE (op0
))
4482 /* Set nonzero when we find something of interest. */
4486 /* If comparison with cc0, import actual comparison from compare
4490 if ((prev
= prev_nonnote_insn (prev
)) == 0
4491 || !NONJUMP_INSN_P (prev
)
4492 || (set
= single_set (prev
)) == 0
4493 || SET_DEST (set
) != cc0_rtx
)
4496 op0
= SET_SRC (set
);
4497 op1
= CONST0_RTX (GET_MODE (op0
));
4503 /* If this is a COMPARE, pick up the two things being compared. */
4504 if (GET_CODE (op0
) == COMPARE
)
4506 op1
= XEXP (op0
, 1);
4507 op0
= XEXP (op0
, 0);
4510 else if (!REG_P (op0
))
4513 /* Go back to the previous insn. Stop if it is not an INSN. We also
4514 stop if it isn't a single set or if it has a REG_INC note because
4515 we don't want to bother dealing with it. */
4517 if ((prev
= prev_nonnote_insn (prev
)) == 0
4518 || !NONJUMP_INSN_P (prev
)
4519 || FIND_REG_INC_NOTE (prev
, NULL_RTX
)
4520 /* In cfglayout mode, there do not have to be labels at the
4521 beginning of a block, or jumps at the end, so the previous
4522 conditions would not stop us when we reach bb boundary. */
4523 || BLOCK_FOR_INSN (prev
) != bb
)
4526 set
= set_of (op0
, prev
);
4529 && (GET_CODE (set
) != SET
4530 || !rtx_equal_p (SET_DEST (set
), op0
)))
4533 /* If this is setting OP0, get what it sets it to if it looks
4537 enum machine_mode inner_mode
= GET_MODE (SET_DEST (set
));
4538 #ifdef FLOAT_STORE_FLAG_VALUE
4539 REAL_VALUE_TYPE fsfv
;
4542 /* ??? We may not combine comparisons done in a CCmode with
4543 comparisons not done in a CCmode. This is to aid targets
4544 like Alpha that have an IEEE compliant EQ instruction, and
4545 a non-IEEE compliant BEQ instruction. The use of CCmode is
4546 actually artificial, simply to prevent the combination, but
4547 should not affect other platforms.
4549 However, we must allow VOIDmode comparisons to match either
4550 CCmode or non-CCmode comparison, because some ports have
4551 modeless comparisons inside branch patterns.
4553 ??? This mode check should perhaps look more like the mode check
4554 in simplify_comparison in combine. */
4556 if ((GET_CODE (SET_SRC (set
)) == COMPARE
4559 && GET_MODE_CLASS (inner_mode
) == MODE_INT
4560 && (GET_MODE_BITSIZE (inner_mode
)
4561 <= HOST_BITS_PER_WIDE_INT
)
4562 && (STORE_FLAG_VALUE
4563 & ((HOST_WIDE_INT
) 1
4564 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
4565 #ifdef FLOAT_STORE_FLAG_VALUE
4567 && SCALAR_FLOAT_MODE_P (inner_mode
)
4568 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
4569 REAL_VALUE_NEGATIVE (fsfv
)))
4572 && COMPARISON_P (SET_SRC (set
))))
4573 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
4574 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
4575 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
4577 else if (((code
== EQ
4579 && (GET_MODE_BITSIZE (inner_mode
)
4580 <= HOST_BITS_PER_WIDE_INT
)
4581 && GET_MODE_CLASS (inner_mode
) == MODE_INT
4582 && (STORE_FLAG_VALUE
4583 & ((HOST_WIDE_INT
) 1
4584 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
4585 #ifdef FLOAT_STORE_FLAG_VALUE
4587 && SCALAR_FLOAT_MODE_P (inner_mode
)
4588 && (fsfv
= FLOAT_STORE_FLAG_VALUE (inner_mode
),
4589 REAL_VALUE_NEGATIVE (fsfv
)))
4592 && COMPARISON_P (SET_SRC (set
))
4593 && (((GET_MODE_CLASS (mode
) == MODE_CC
)
4594 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
))
4595 || mode
== VOIDmode
|| inner_mode
== VOIDmode
))
4605 else if (reg_set_p (op0
, prev
))
4606 /* If this sets OP0, but not directly, we have to give up. */
4611 /* If the caller is expecting the condition to be valid at INSN,
4612 make sure X doesn't change before INSN. */
4613 if (valid_at_insn_p
)
4614 if (modified_in_p (x
, prev
) || modified_between_p (x
, prev
, insn
))
4616 if (COMPARISON_P (x
))
4617 code
= GET_CODE (x
);
4620 code
= reversed_comparison_code (x
, prev
);
4621 if (code
== UNKNOWN
)
4626 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
4632 /* If constant is first, put it last. */
4633 if (CONSTANT_P (op0
))
4634 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
4636 /* If OP0 is the result of a comparison, we weren't able to find what
4637 was really being compared, so fail. */
4639 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
4642 /* Canonicalize any ordered comparison with integers involving equality
4643 if we can do computations in the relevant mode and we do not
4646 if (GET_MODE_CLASS (GET_MODE (op0
)) != MODE_CC
4647 && GET_CODE (op1
) == CONST_INT
4648 && GET_MODE (op0
) != VOIDmode
4649 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
4651 HOST_WIDE_INT const_val
= INTVAL (op1
);
4652 unsigned HOST_WIDE_INT uconst_val
= const_val
;
4653 unsigned HOST_WIDE_INT max_val
4654 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
4659 if ((unsigned HOST_WIDE_INT
) const_val
!= max_val
>> 1)
4660 code
= LT
, op1
= gen_int_mode (const_val
+ 1, GET_MODE (op0
));
4663 /* When cross-compiling, const_val might be sign-extended from
4664 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
4666 if ((HOST_WIDE_INT
) (const_val
& max_val
)
4667 != (((HOST_WIDE_INT
) 1
4668 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
4669 code
= GT
, op1
= gen_int_mode (const_val
- 1, GET_MODE (op0
));
4673 if (uconst_val
< max_val
)
4674 code
= LTU
, op1
= gen_int_mode (uconst_val
+ 1, GET_MODE (op0
));
4678 if (uconst_val
!= 0)
4679 code
= GTU
, op1
= gen_int_mode (uconst_val
- 1, GET_MODE (op0
));
4687 /* Never return CC0; return zero instead. */
4691 return gen_rtx_fmt_ee (code
, VOIDmode
, op0
, op1
);
4694 /* Given a jump insn JUMP, return the condition that will cause it to branch
4695 to its JUMP_LABEL. If the condition cannot be understood, or is an
4696 inequality floating-point comparison which needs to be reversed, 0 will
4699 If EARLIEST is nonzero, it is a pointer to a place where the earliest
4700 insn used in locating the condition was found. If a replacement test
4701 of the condition is desired, it should be placed in front of that
4702 insn and we will be sure that the inputs are still valid. If EARLIEST
4703 is null, the returned condition will be valid at INSN.
4705 If ALLOW_CC_MODE is nonzero, allow the condition returned to be a
4706 compare CC mode register.
4708 VALID_AT_INSN_P is the same as for canonicalize_condition. */
4711 get_condition (rtx jump
, rtx
*earliest
, int allow_cc_mode
, int valid_at_insn_p
)
4717 /* If this is not a standard conditional jump, we can't parse it. */
4719 || ! any_condjump_p (jump
))
4721 set
= pc_set (jump
);
4723 cond
= XEXP (SET_SRC (set
), 0);
4725 /* If this branches to JUMP_LABEL when the condition is false, reverse
4728 = GET_CODE (XEXP (SET_SRC (set
), 2)) == LABEL_REF
4729 && XEXP (XEXP (SET_SRC (set
), 2), 0) == JUMP_LABEL (jump
);
4731 return canonicalize_condition (jump
, cond
, reverse
, earliest
, NULL_RTX
,
4732 allow_cc_mode
, valid_at_insn_p
);
4735 /* Suppose that truncation from the machine mode of X to MODE is not a
4736 no-op. See if there is anything special about X so that we can
4737 assume it already contains a truncated value of MODE. */
4740 truncated_to_mode (enum machine_mode mode
, rtx x
)
4742 return REG_P (x
) && rtl_hooks
.reg_truncated_to_mode (mode
, x
);
4746 /* Initialize non_rtx_starting_operands, which is used to speed up
4752 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
4754 const char *format
= GET_RTX_FORMAT (i
);
4755 const char *first
= strpbrk (format
, "eEV");
4756 non_rtx_starting_operands
[i
] = first
? first
- format
: -1;
4760 /* Check whether this is a constant pool constant. */
4762 constant_pool_constant_p (rtx x
)
4764 x
= avoid_constant_pool_reference (x
);
4765 return GET_CODE (x
) == CONST_DOUBLE
;