c0d9f5588e5d60c19f78170bdd35f2649741df35
[gcc.git] / gcc / sched-deps.c
1 /* Instruction scheduling pass. This file computes dependencies between
2 instructions.
3 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
4 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
5 Free Software Foundation, Inc.
6 Contributed by Michael Tiemann (tiemann@cygnus.com) Enhanced by,
7 and currently maintained by, Jim Wilson (wilson@cygnus.com)
8
9 This file is part of GCC.
10
11 GCC is free software; you can redistribute it and/or modify it under
12 the terms of the GNU General Public License as published by the Free
13 Software Foundation; either version 3, or (at your option) any later
14 version.
15
16 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
17 WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with GCC; see the file COPYING3. If not see
23 <http://www.gnu.org/licenses/>. */
24 \f
25 #include "config.h"
26 #include "system.h"
27 #include "coretypes.h"
28 #include "tm.h"
29 #include "toplev.h"
30 #include "rtl.h"
31 #include "tm_p.h"
32 #include "hard-reg-set.h"
33 #include "regs.h"
34 #include "function.h"
35 #include "flags.h"
36 #include "insn-config.h"
37 #include "insn-attr.h"
38 #include "except.h"
39 #include "toplev.h"
40 #include "recog.h"
41 #include "sched-int.h"
42 #include "params.h"
43 #include "cselib.h"
44
45 #ifdef ENABLE_CHECKING
46 #define CHECK (true)
47 #else
48 #define CHECK (false)
49 #endif
50
51 /* Return the major type present in the DS. */
52 enum reg_note
53 ds_to_dk (ds_t ds)
54 {
55 if (ds & DEP_TRUE)
56 return REG_DEP_TRUE;
57
58 if (ds & DEP_OUTPUT)
59 return REG_DEP_OUTPUT;
60
61 gcc_assert (ds & DEP_ANTI);
62
63 return REG_DEP_ANTI;
64 }
65
66 /* Return equivalent dep_status. */
67 ds_t
68 dk_to_ds (enum reg_note dk)
69 {
70 switch (dk)
71 {
72 case REG_DEP_TRUE:
73 return DEP_TRUE;
74
75 case REG_DEP_OUTPUT:
76 return DEP_OUTPUT;
77
78 default:
79 gcc_assert (dk == REG_DEP_ANTI);
80 return DEP_ANTI;
81 }
82 }
83
84 /* Functions to operate with dependence information container - dep_t. */
85
86 /* Init DEP with the arguments. */
87 void
88 init_dep_1 (dep_t dep, rtx pro, rtx con, enum reg_note type, ds_t ds)
89 {
90 DEP_PRO (dep) = pro;
91 DEP_CON (dep) = con;
92 DEP_TYPE (dep) = type;
93 DEP_STATUS (dep) = ds;
94 }
95
96 /* Init DEP with the arguments.
97 While most of the scheduler (including targets) only need the major type
98 of the dependency, it is convenient to hide full dep_status from them. */
99 void
100 init_dep (dep_t dep, rtx pro, rtx con, enum reg_note kind)
101 {
102 ds_t ds;
103
104 if ((current_sched_info->flags & USE_DEPS_LIST))
105 ds = dk_to_ds (kind);
106 else
107 ds = -1;
108
109 init_dep_1 (dep, pro, con, kind, ds);
110 }
111
112 /* Make a copy of FROM in TO. */
113 static void
114 copy_dep (dep_t to, dep_t from)
115 {
116 memcpy (to, from, sizeof (*to));
117 }
118
119 static void dump_ds (FILE *, ds_t);
120
121 /* Define flags for dump_dep (). */
122
123 /* Dump producer of the dependence. */
124 #define DUMP_DEP_PRO (2)
125
126 /* Dump consumer of the dependence. */
127 #define DUMP_DEP_CON (4)
128
129 /* Dump type of the dependence. */
130 #define DUMP_DEP_TYPE (8)
131
132 /* Dump status of the dependence. */
133 #define DUMP_DEP_STATUS (16)
134
135 /* Dump all information about the dependence. */
136 #define DUMP_DEP_ALL (DUMP_DEP_PRO | DUMP_DEP_CON | DUMP_DEP_TYPE \
137 |DUMP_DEP_STATUS)
138
139 /* Dump DEP to DUMP.
140 FLAGS is a bit mask specifying what information about DEP needs
141 to be printed.
142 If FLAGS has the very first bit set, then dump all information about DEP
143 and propagate this bit into the callee dump functions. */
144 static void
145 dump_dep (FILE *dump, dep_t dep, int flags)
146 {
147 if (flags & 1)
148 flags |= DUMP_DEP_ALL;
149
150 fprintf (dump, "<");
151
152 if (flags & DUMP_DEP_PRO)
153 fprintf (dump, "%d; ", INSN_UID (DEP_PRO (dep)));
154
155 if (flags & DUMP_DEP_CON)
156 fprintf (dump, "%d; ", INSN_UID (DEP_CON (dep)));
157
158 if (flags & DUMP_DEP_TYPE)
159 {
160 char t;
161 enum reg_note type = DEP_TYPE (dep);
162
163 switch (type)
164 {
165 case REG_DEP_TRUE:
166 t = 't';
167 break;
168
169 case REG_DEP_OUTPUT:
170 t = 'o';
171 break;
172
173 case REG_DEP_ANTI:
174 t = 'a';
175 break;
176
177 default:
178 gcc_unreachable ();
179 break;
180 }
181
182 fprintf (dump, "%c; ", t);
183 }
184
185 if (flags & DUMP_DEP_STATUS)
186 {
187 if (current_sched_info->flags & USE_DEPS_LIST)
188 dump_ds (dump, DEP_STATUS (dep));
189 }
190
191 fprintf (dump, ">");
192 }
193
194 /* Default flags for dump_dep (). */
195 static int dump_dep_flags = (DUMP_DEP_PRO | DUMP_DEP_CON);
196
197 /* Dump all fields of DEP to STDERR. */
198 void
199 sd_debug_dep (dep_t dep)
200 {
201 dump_dep (stderr, dep, 1);
202 fprintf (stderr, "\n");
203 }
204
205 /* Functions to operate with a single link from the dependencies lists -
206 dep_link_t. */
207
208 /* Attach L to appear after link X whose &DEP_LINK_NEXT (X) is given by
209 PREV_NEXT_P. */
210 static void
211 attach_dep_link (dep_link_t l, dep_link_t *prev_nextp)
212 {
213 dep_link_t next = *prev_nextp;
214
215 gcc_assert (DEP_LINK_PREV_NEXTP (l) == NULL
216 && DEP_LINK_NEXT (l) == NULL);
217
218 /* Init node being inserted. */
219 DEP_LINK_PREV_NEXTP (l) = prev_nextp;
220 DEP_LINK_NEXT (l) = next;
221
222 /* Fix next node. */
223 if (next != NULL)
224 {
225 gcc_assert (DEP_LINK_PREV_NEXTP (next) == prev_nextp);
226
227 DEP_LINK_PREV_NEXTP (next) = &DEP_LINK_NEXT (l);
228 }
229
230 /* Fix prev node. */
231 *prev_nextp = l;
232 }
233
234 /* Add dep_link LINK to deps_list L. */
235 static void
236 add_to_deps_list (dep_link_t link, deps_list_t l)
237 {
238 attach_dep_link (link, &DEPS_LIST_FIRST (l));
239
240 ++DEPS_LIST_N_LINKS (l);
241 }
242
243 /* Detach dep_link L from the list. */
244 static void
245 detach_dep_link (dep_link_t l)
246 {
247 dep_link_t *prev_nextp = DEP_LINK_PREV_NEXTP (l);
248 dep_link_t next = DEP_LINK_NEXT (l);
249
250 *prev_nextp = next;
251
252 if (next != NULL)
253 DEP_LINK_PREV_NEXTP (next) = prev_nextp;
254
255 DEP_LINK_PREV_NEXTP (l) = NULL;
256 DEP_LINK_NEXT (l) = NULL;
257 }
258
259 /* Remove link LINK from list LIST. */
260 static void
261 remove_from_deps_list (dep_link_t link, deps_list_t list)
262 {
263 detach_dep_link (link);
264
265 --DEPS_LIST_N_LINKS (list);
266 }
267
268 /* Move link LINK from list FROM to list TO. */
269 static void
270 move_dep_link (dep_link_t link, deps_list_t from, deps_list_t to)
271 {
272 remove_from_deps_list (link, from);
273 add_to_deps_list (link, to);
274 }
275
276 /* Return true of LINK is not attached to any list. */
277 static bool
278 dep_link_is_detached_p (dep_link_t link)
279 {
280 return DEP_LINK_PREV_NEXTP (link) == NULL;
281 }
282
283 /* Pool to hold all dependency nodes (dep_node_t). */
284 static alloc_pool dn_pool;
285
286 /* Number of dep_nodes out there. */
287 static int dn_pool_diff = 0;
288
289 /* Create a dep_node. */
290 static dep_node_t
291 create_dep_node (void)
292 {
293 dep_node_t n = (dep_node_t) pool_alloc (dn_pool);
294 dep_link_t back = DEP_NODE_BACK (n);
295 dep_link_t forw = DEP_NODE_FORW (n);
296
297 DEP_LINK_NODE (back) = n;
298 DEP_LINK_NEXT (back) = NULL;
299 DEP_LINK_PREV_NEXTP (back) = NULL;
300
301 DEP_LINK_NODE (forw) = n;
302 DEP_LINK_NEXT (forw) = NULL;
303 DEP_LINK_PREV_NEXTP (forw) = NULL;
304
305 ++dn_pool_diff;
306
307 return n;
308 }
309
310 /* Delete dep_node N. N must not be connected to any deps_list. */
311 static void
312 delete_dep_node (dep_node_t n)
313 {
314 gcc_assert (dep_link_is_detached_p (DEP_NODE_BACK (n))
315 && dep_link_is_detached_p (DEP_NODE_FORW (n)));
316
317 --dn_pool_diff;
318
319 pool_free (dn_pool, n);
320 }
321
322 /* Pool to hold dependencies lists (deps_list_t). */
323 static alloc_pool dl_pool;
324
325 /* Number of deps_lists out there. */
326 static int dl_pool_diff = 0;
327
328 /* Functions to operate with dependences lists - deps_list_t. */
329
330 /* Return true if list L is empty. */
331 static bool
332 deps_list_empty_p (deps_list_t l)
333 {
334 return DEPS_LIST_N_LINKS (l) == 0;
335 }
336
337 /* Create a new deps_list. */
338 static deps_list_t
339 create_deps_list (void)
340 {
341 deps_list_t l = (deps_list_t) pool_alloc (dl_pool);
342
343 DEPS_LIST_FIRST (l) = NULL;
344 DEPS_LIST_N_LINKS (l) = 0;
345
346 ++dl_pool_diff;
347 return l;
348 }
349
350 /* Free deps_list L. */
351 static void
352 free_deps_list (deps_list_t l)
353 {
354 gcc_assert (deps_list_empty_p (l));
355
356 --dl_pool_diff;
357
358 pool_free (dl_pool, l);
359 }
360
361 /* Return true if there is no dep_nodes and deps_lists out there.
362 After the region is scheduled all the depedency nodes and lists
363 should [generally] be returned to pool. */
364 bool
365 deps_pools_are_empty_p (void)
366 {
367 return dn_pool_diff == 0 && dl_pool_diff == 0;
368 }
369
370 /* Remove all elements from L. */
371 static void
372 clear_deps_list (deps_list_t l)
373 {
374 do
375 {
376 dep_link_t link = DEPS_LIST_FIRST (l);
377
378 if (link == NULL)
379 break;
380
381 remove_from_deps_list (link, l);
382 }
383 while (1);
384 }
385
386 static regset reg_pending_sets;
387 static regset reg_pending_clobbers;
388 static regset reg_pending_uses;
389
390 /* The following enumeration values tell us what dependencies we
391 should use to implement the barrier. We use true-dependencies for
392 TRUE_BARRIER and anti-dependencies for MOVE_BARRIER. */
393 enum reg_pending_barrier_mode
394 {
395 NOT_A_BARRIER = 0,
396 MOVE_BARRIER,
397 TRUE_BARRIER
398 };
399
400 static enum reg_pending_barrier_mode reg_pending_barrier;
401
402 /* To speed up the test for duplicate dependency links we keep a
403 record of dependencies created by add_dependence when the average
404 number of instructions in a basic block is very large.
405
406 Studies have shown that there is typically around 5 instructions between
407 branches for typical C code. So we can make a guess that the average
408 basic block is approximately 5 instructions long; we will choose 100X
409 the average size as a very large basic block.
410
411 Each insn has associated bitmaps for its dependencies. Each bitmap
412 has enough entries to represent a dependency on any other insn in
413 the insn chain. All bitmap for true dependencies cache is
414 allocated then the rest two ones are also allocated. */
415 static bitmap_head *true_dependency_cache;
416 static bitmap_head *output_dependency_cache;
417 static bitmap_head *anti_dependency_cache;
418 static bitmap_head *spec_dependency_cache;
419 static int cache_size;
420
421 static int deps_may_trap_p (const_rtx);
422 static void add_dependence_list (rtx, rtx, int, enum reg_note);
423 static void add_dependence_list_and_free (rtx, rtx *, int, enum reg_note);
424 static void delete_all_dependences (rtx);
425 static void fixup_sched_groups (rtx);
426
427 static void flush_pending_lists (struct deps *, rtx, int, int);
428 static void sched_analyze_1 (struct deps *, rtx, rtx);
429 static void sched_analyze_2 (struct deps *, rtx, rtx);
430 static void sched_analyze_insn (struct deps *, rtx, rtx);
431
432 static rtx sched_get_condition (const_rtx);
433 static int conditions_mutex_p (const_rtx, const_rtx);
434
435 static enum DEPS_ADJUST_RESULT maybe_add_or_update_dep_1 (dep_t, bool,
436 rtx, rtx);
437 static enum DEPS_ADJUST_RESULT add_or_update_dep_1 (dep_t, bool, rtx, rtx);
438
439 static dw_t estimate_dep_weak (rtx, rtx);
440 #ifdef INSN_SCHEDULING
441 #ifdef ENABLE_CHECKING
442 static void check_dep (dep_t, bool);
443 #endif
444 #endif
445 \f
446 /* Return nonzero if a load of the memory reference MEM can cause a trap. */
447
448 static int
449 deps_may_trap_p (const_rtx mem)
450 {
451 const_rtx addr = XEXP (mem, 0);
452
453 if (REG_P (addr) && REGNO (addr) >= FIRST_PSEUDO_REGISTER)
454 {
455 const_rtx t = get_reg_known_value (REGNO (addr));
456 if (t)
457 addr = t;
458 }
459 return rtx_addr_can_trap_p (addr);
460 }
461 \f
462 /* Find the condition under which INSN is executed. */
463
464 static rtx
465 sched_get_condition (const_rtx insn)
466 {
467 rtx pat = PATTERN (insn);
468 rtx src;
469
470 if (pat == 0)
471 return 0;
472
473 if (GET_CODE (pat) == COND_EXEC)
474 return COND_EXEC_TEST (pat);
475
476 if (!any_condjump_p (insn) || !onlyjump_p (insn))
477 return 0;
478
479 src = SET_SRC (pc_set (insn));
480
481 if (XEXP (src, 2) == pc_rtx)
482 return XEXP (src, 0);
483 else if (XEXP (src, 1) == pc_rtx)
484 {
485 rtx cond = XEXP (src, 0);
486 enum rtx_code revcode = reversed_comparison_code (cond, insn);
487
488 if (revcode == UNKNOWN)
489 return 0;
490 return gen_rtx_fmt_ee (revcode, GET_MODE (cond), XEXP (cond, 0),
491 XEXP (cond, 1));
492 }
493
494 return 0;
495 }
496
497 \f
498 /* Return nonzero if conditions COND1 and COND2 can never be both true. */
499
500 static int
501 conditions_mutex_p (const_rtx cond1, const_rtx cond2)
502 {
503 if (COMPARISON_P (cond1)
504 && COMPARISON_P (cond2)
505 && GET_CODE (cond1) == reversed_comparison_code (cond2, NULL)
506 && XEXP (cond1, 0) == XEXP (cond2, 0)
507 && XEXP (cond1, 1) == XEXP (cond2, 1))
508 return 1;
509 return 0;
510 }
511
512 /* Return true if insn1 and insn2 can never depend on one another because
513 the conditions under which they are executed are mutually exclusive. */
514 bool
515 sched_insns_conditions_mutex_p (const_rtx insn1, const_rtx insn2)
516 {
517 rtx cond1, cond2;
518
519 /* df doesn't handle conditional lifetimes entirely correctly;
520 calls mess up the conditional lifetimes. */
521 if (!CALL_P (insn1) && !CALL_P (insn2))
522 {
523 cond1 = sched_get_condition (insn1);
524 cond2 = sched_get_condition (insn2);
525 if (cond1 && cond2
526 && conditions_mutex_p (cond1, cond2)
527 /* Make sure first instruction doesn't affect condition of second
528 instruction if switched. */
529 && !modified_in_p (cond1, insn2)
530 /* Make sure second instruction doesn't affect condition of first
531 instruction if switched. */
532 && !modified_in_p (cond2, insn1))
533 return true;
534 }
535 return false;
536 }
537 \f
538
539 /* Initialize LIST_PTR to point to one of the lists present in TYPES_PTR,
540 initialize RESOLVED_P_PTR with true if that list consists of resolved deps,
541 and remove the type of returned [through LIST_PTR] list from TYPES_PTR.
542 This function is used to switch sd_iterator to the next list.
543 !!! For internal use only. Might consider moving it to sched-int.h. */
544 void
545 sd_next_list (const_rtx insn, sd_list_types_def *types_ptr,
546 deps_list_t *list_ptr, bool *resolved_p_ptr)
547 {
548 sd_list_types_def types = *types_ptr;
549
550 if (types & SD_LIST_HARD_BACK)
551 {
552 *list_ptr = INSN_HARD_BACK_DEPS (insn);
553 *resolved_p_ptr = false;
554 *types_ptr = types & ~SD_LIST_HARD_BACK;
555 }
556 else if (types & SD_LIST_SPEC_BACK)
557 {
558 *list_ptr = INSN_SPEC_BACK_DEPS (insn);
559 *resolved_p_ptr = false;
560 *types_ptr = types & ~SD_LIST_SPEC_BACK;
561 }
562 else if (types & SD_LIST_FORW)
563 {
564 *list_ptr = INSN_FORW_DEPS (insn);
565 *resolved_p_ptr = false;
566 *types_ptr = types & ~SD_LIST_FORW;
567 }
568 else if (types & SD_LIST_RES_BACK)
569 {
570 *list_ptr = INSN_RESOLVED_BACK_DEPS (insn);
571 *resolved_p_ptr = true;
572 *types_ptr = types & ~SD_LIST_RES_BACK;
573 }
574 else if (types & SD_LIST_RES_FORW)
575 {
576 *list_ptr = INSN_RESOLVED_FORW_DEPS (insn);
577 *resolved_p_ptr = true;
578 *types_ptr = types & ~SD_LIST_RES_FORW;
579 }
580 else
581 {
582 *list_ptr = NULL;
583 *resolved_p_ptr = false;
584 *types_ptr = SD_LIST_NONE;
585 }
586 }
587
588 /* Return the summary size of INSN's lists defined by LIST_TYPES. */
589 int
590 sd_lists_size (const_rtx insn, sd_list_types_def list_types)
591 {
592 int size = 0;
593
594 while (list_types != SD_LIST_NONE)
595 {
596 deps_list_t list;
597 bool resolved_p;
598
599 sd_next_list (insn, &list_types, &list, &resolved_p);
600 size += DEPS_LIST_N_LINKS (list);
601 }
602
603 return size;
604 }
605
606 /* Return true if INSN's lists defined by LIST_TYPES are all empty. */
607 bool
608 sd_lists_empty_p (const_rtx insn, sd_list_types_def list_types)
609 {
610 return sd_lists_size (insn, list_types) == 0;
611 }
612
613 /* Initialize data for INSN. */
614 void
615 sd_init_insn (rtx insn)
616 {
617 INSN_HARD_BACK_DEPS (insn) = create_deps_list ();
618 INSN_SPEC_BACK_DEPS (insn) = create_deps_list ();
619 INSN_RESOLVED_BACK_DEPS (insn) = create_deps_list ();
620 INSN_FORW_DEPS (insn) = create_deps_list ();
621 INSN_RESOLVED_FORW_DEPS (insn) = create_deps_list ();
622
623 /* ??? It would be nice to allocate dependency caches here. */
624 }
625
626 /* Free data for INSN. */
627 void
628 sd_finish_insn (rtx insn)
629 {
630 /* ??? It would be nice to deallocate dependency caches here. */
631
632 free_deps_list (INSN_HARD_BACK_DEPS (insn));
633 INSN_HARD_BACK_DEPS (insn) = NULL;
634
635 free_deps_list (INSN_SPEC_BACK_DEPS (insn));
636 INSN_SPEC_BACK_DEPS (insn) = NULL;
637
638 free_deps_list (INSN_RESOLVED_BACK_DEPS (insn));
639 INSN_RESOLVED_BACK_DEPS (insn) = NULL;
640
641 free_deps_list (INSN_FORW_DEPS (insn));
642 INSN_FORW_DEPS (insn) = NULL;
643
644 free_deps_list (INSN_RESOLVED_FORW_DEPS (insn));
645 INSN_RESOLVED_FORW_DEPS (insn) = NULL;
646 }
647
648 /* Find a dependency between producer PRO and consumer CON.
649 Search through resolved dependency lists if RESOLVED_P is true.
650 If no such dependency is found return NULL,
651 overwise return the dependency and initialize SD_IT_PTR [if it is nonnull]
652 with an iterator pointing to it. */
653 static dep_t
654 sd_find_dep_between_no_cache (rtx pro, rtx con, bool resolved_p,
655 sd_iterator_def *sd_it_ptr)
656 {
657 sd_list_types_def pro_list_type;
658 sd_list_types_def con_list_type;
659 sd_iterator_def sd_it;
660 dep_t dep;
661 bool found_p = false;
662
663 if (resolved_p)
664 {
665 pro_list_type = SD_LIST_RES_FORW;
666 con_list_type = SD_LIST_RES_BACK;
667 }
668 else
669 {
670 pro_list_type = SD_LIST_FORW;
671 con_list_type = SD_LIST_BACK;
672 }
673
674 /* Walk through either back list of INSN or forw list of ELEM
675 depending on which one is shorter. */
676 if (sd_lists_size (con, con_list_type) < sd_lists_size (pro, pro_list_type))
677 {
678 /* Find the dep_link with producer PRO in consumer's back_deps. */
679 FOR_EACH_DEP (con, con_list_type, sd_it, dep)
680 if (DEP_PRO (dep) == pro)
681 {
682 found_p = true;
683 break;
684 }
685 }
686 else
687 {
688 /* Find the dep_link with consumer CON in producer's forw_deps. */
689 FOR_EACH_DEP (pro, pro_list_type, sd_it, dep)
690 if (DEP_CON (dep) == con)
691 {
692 found_p = true;
693 break;
694 }
695 }
696
697 if (found_p)
698 {
699 if (sd_it_ptr != NULL)
700 *sd_it_ptr = sd_it;
701
702 return dep;
703 }
704
705 return NULL;
706 }
707
708 /* Find a dependency between producer PRO and consumer CON.
709 Use dependency [if available] to check if dependency is present at all.
710 Search through resolved dependency lists if RESOLVED_P is true.
711 If the dependency or NULL if none found. */
712 dep_t
713 sd_find_dep_between (rtx pro, rtx con, bool resolved_p)
714 {
715 if (true_dependency_cache != NULL)
716 /* Avoiding the list walk below can cut compile times dramatically
717 for some code. */
718 {
719 int elem_luid = INSN_LUID (pro);
720 int insn_luid = INSN_LUID (con);
721
722 gcc_assert (output_dependency_cache != NULL
723 && anti_dependency_cache != NULL);
724
725 if (!bitmap_bit_p (&true_dependency_cache[insn_luid], elem_luid)
726 && !bitmap_bit_p (&output_dependency_cache[insn_luid], elem_luid)
727 && !bitmap_bit_p (&anti_dependency_cache[insn_luid], elem_luid))
728 return NULL;
729 }
730
731 return sd_find_dep_between_no_cache (pro, con, resolved_p, NULL);
732 }
733
734 /* Add or update a dependence described by DEP.
735 MEM1 and MEM2, if non-null, correspond to memory locations in case of
736 data speculation.
737
738 The function returns a value indicating if an old entry has been changed
739 or a new entry has been added to insn's backward deps.
740
741 This function merely checks if producer and consumer is the same insn
742 and doesn't create a dep in this case. Actual manipulation of
743 dependence data structures is performed in add_or_update_dep_1. */
744 static enum DEPS_ADJUST_RESULT
745 maybe_add_or_update_dep_1 (dep_t dep, bool resolved_p, rtx mem1, rtx mem2)
746 {
747 rtx elem = DEP_PRO (dep);
748 rtx insn = DEP_CON (dep);
749
750 gcc_assert (INSN_P (insn) && INSN_P (elem));
751
752 /* Don't depend an insn on itself. */
753 if (insn == elem)
754 {
755 #ifdef INSN_SCHEDULING
756 if (current_sched_info->flags & DO_SPECULATION)
757 /* INSN has an internal dependence, which we can't overcome. */
758 HAS_INTERNAL_DEP (insn) = 1;
759 #endif
760
761 return DEP_NODEP;
762 }
763
764 return add_or_update_dep_1 (dep, resolved_p, mem1, mem2);
765 }
766
767 #ifdef INSN_SCHEDULING
768 /* Ask dependency caches what needs to be done for dependence DEP.
769 Return DEP_CREATED if new dependence should be created and there is no
770 need to try to find one searching the dependencies lists.
771 Return DEP_PRESENT if there already is a dependence described by DEP and
772 hence nothing is to be done.
773 Return DEP_CHANGED if there already is a dependence, but it should be
774 updated to incorporate additional information from DEP. */
775 static enum DEPS_ADJUST_RESULT
776 ask_dependency_caches (dep_t dep)
777 {
778 int elem_luid = INSN_LUID (DEP_PRO (dep));
779 int insn_luid = INSN_LUID (DEP_CON (dep));
780
781 gcc_assert (true_dependency_cache != NULL
782 && output_dependency_cache != NULL
783 && anti_dependency_cache != NULL);
784
785 if (!(current_sched_info->flags & USE_DEPS_LIST))
786 {
787 enum reg_note present_dep_type;
788
789 if (bitmap_bit_p (&true_dependency_cache[insn_luid], elem_luid))
790 present_dep_type = REG_DEP_TRUE;
791 else if (bitmap_bit_p (&output_dependency_cache[insn_luid], elem_luid))
792 present_dep_type = REG_DEP_OUTPUT;
793 else if (bitmap_bit_p (&anti_dependency_cache[insn_luid], elem_luid))
794 present_dep_type = REG_DEP_ANTI;
795 else
796 /* There is no existing dep so it should be created. */
797 return DEP_CREATED;
798
799 if ((int) DEP_TYPE (dep) >= (int) present_dep_type)
800 /* DEP does not add anything to the existing dependence. */
801 return DEP_PRESENT;
802 }
803 else
804 {
805 ds_t present_dep_types = 0;
806
807 if (bitmap_bit_p (&true_dependency_cache[insn_luid], elem_luid))
808 present_dep_types |= DEP_TRUE;
809 if (bitmap_bit_p (&output_dependency_cache[insn_luid], elem_luid))
810 present_dep_types |= DEP_OUTPUT;
811 if (bitmap_bit_p (&anti_dependency_cache[insn_luid], elem_luid))
812 present_dep_types |= DEP_ANTI;
813
814 if (present_dep_types == 0)
815 /* There is no existing dep so it should be created. */
816 return DEP_CREATED;
817
818 if (!(current_sched_info->flags & DO_SPECULATION)
819 || !bitmap_bit_p (&spec_dependency_cache[insn_luid], elem_luid))
820 {
821 if ((present_dep_types | (DEP_STATUS (dep) & DEP_TYPES))
822 == present_dep_types)
823 /* DEP does not add anything to the existing dependence. */
824 return DEP_PRESENT;
825 }
826 else
827 {
828 /* Only true dependencies can be data speculative and
829 only anti dependencies can be control speculative. */
830 gcc_assert ((present_dep_types & (DEP_TRUE | DEP_ANTI))
831 == present_dep_types);
832
833 /* if (DEP is SPECULATIVE) then
834 ..we should update DEP_STATUS
835 else
836 ..we should reset existing dep to non-speculative. */
837 }
838 }
839
840 return DEP_CHANGED;
841 }
842
843 /* Set dependency caches according to DEP. */
844 static void
845 set_dependency_caches (dep_t dep)
846 {
847 int elem_luid = INSN_LUID (DEP_PRO (dep));
848 int insn_luid = INSN_LUID (DEP_CON (dep));
849
850 if (!(current_sched_info->flags & USE_DEPS_LIST))
851 {
852 switch (DEP_TYPE (dep))
853 {
854 case REG_DEP_TRUE:
855 bitmap_set_bit (&true_dependency_cache[insn_luid], elem_luid);
856 break;
857
858 case REG_DEP_OUTPUT:
859 bitmap_set_bit (&output_dependency_cache[insn_luid], elem_luid);
860 break;
861
862 case REG_DEP_ANTI:
863 bitmap_set_bit (&anti_dependency_cache[insn_luid], elem_luid);
864 break;
865
866 default:
867 gcc_unreachable ();
868 }
869 }
870 else
871 {
872 ds_t ds = DEP_STATUS (dep);
873
874 if (ds & DEP_TRUE)
875 bitmap_set_bit (&true_dependency_cache[insn_luid], elem_luid);
876 if (ds & DEP_OUTPUT)
877 bitmap_set_bit (&output_dependency_cache[insn_luid], elem_luid);
878 if (ds & DEP_ANTI)
879 bitmap_set_bit (&anti_dependency_cache[insn_luid], elem_luid);
880
881 if (ds & SPECULATIVE)
882 {
883 gcc_assert (current_sched_info->flags & DO_SPECULATION);
884 bitmap_set_bit (&spec_dependency_cache[insn_luid], elem_luid);
885 }
886 }
887 }
888
889 /* Type of dependence DEP have changed from OLD_TYPE. Update dependency
890 caches accordingly. */
891 static void
892 update_dependency_caches (dep_t dep, enum reg_note old_type)
893 {
894 int elem_luid = INSN_LUID (DEP_PRO (dep));
895 int insn_luid = INSN_LUID (DEP_CON (dep));
896
897 /* Clear corresponding cache entry because type of the link
898 may have changed. Keep them if we use_deps_list. */
899 if (!(current_sched_info->flags & USE_DEPS_LIST))
900 {
901 switch (old_type)
902 {
903 case REG_DEP_OUTPUT:
904 bitmap_clear_bit (&output_dependency_cache[insn_luid], elem_luid);
905 break;
906
907 case REG_DEP_ANTI:
908 bitmap_clear_bit (&anti_dependency_cache[insn_luid], elem_luid);
909 break;
910
911 default:
912 gcc_unreachable ();
913 }
914 }
915
916 set_dependency_caches (dep);
917 }
918
919 /* Convert a dependence pointed to by SD_IT to be non-speculative. */
920 static void
921 change_spec_dep_to_hard (sd_iterator_def sd_it)
922 {
923 dep_node_t node = DEP_LINK_NODE (*sd_it.linkp);
924 dep_link_t link = DEP_NODE_BACK (node);
925 dep_t dep = DEP_NODE_DEP (node);
926 rtx elem = DEP_PRO (dep);
927 rtx insn = DEP_CON (dep);
928
929 move_dep_link (link, INSN_SPEC_BACK_DEPS (insn), INSN_HARD_BACK_DEPS (insn));
930
931 DEP_STATUS (dep) &= ~SPECULATIVE;
932
933 if (true_dependency_cache != NULL)
934 /* Clear the cache entry. */
935 bitmap_clear_bit (&spec_dependency_cache[INSN_LUID (insn)],
936 INSN_LUID (elem));
937 }
938 #endif
939
940 /* Update DEP to incorporate information from NEW_DEP.
941 SD_IT points to DEP in case it should be moved to another list.
942 MEM1 and MEM2, if nonnull, correspond to memory locations in case if
943 data-speculative dependence should be updated. */
944 static enum DEPS_ADJUST_RESULT
945 update_dep (dep_t dep, dep_t new_dep,
946 sd_iterator_def sd_it, rtx mem1, rtx mem2)
947 {
948 enum DEPS_ADJUST_RESULT res = DEP_PRESENT;
949 enum reg_note old_type = DEP_TYPE (dep);
950
951 /* If this is a more restrictive type of dependence than the
952 existing one, then change the existing dependence to this
953 type. */
954 if ((int) DEP_TYPE (new_dep) < (int) old_type)
955 {
956 DEP_TYPE (dep) = DEP_TYPE (new_dep);
957 res = DEP_CHANGED;
958 }
959
960 #ifdef INSN_SCHEDULING
961 if (current_sched_info->flags & USE_DEPS_LIST)
962 /* Update DEP_STATUS. */
963 {
964 ds_t dep_status = DEP_STATUS (dep);
965 ds_t ds = DEP_STATUS (new_dep);
966 ds_t new_status = ds | dep_status;
967
968 if (new_status & SPECULATIVE)
969 /* Either existing dep or a dep we're adding or both are
970 speculative. */
971 {
972 if (!(ds & SPECULATIVE)
973 || !(dep_status & SPECULATIVE))
974 /* The new dep can't be speculative. */
975 {
976 new_status &= ~SPECULATIVE;
977
978 if (dep_status & SPECULATIVE)
979 /* The old dep was speculative, but now it
980 isn't. */
981 change_spec_dep_to_hard (sd_it);
982 }
983 else
984 {
985 /* Both are speculative. Merge probabilities. */
986 if (mem1 != NULL)
987 {
988 dw_t dw;
989
990 dw = estimate_dep_weak (mem1, mem2);
991 ds = set_dep_weak (ds, BEGIN_DATA, dw);
992 }
993
994 new_status = ds_merge (dep_status, ds);
995 }
996 }
997
998 ds = new_status;
999
1000 if (dep_status != ds)
1001 {
1002 DEP_STATUS (dep) = ds;
1003 res = DEP_CHANGED;
1004 }
1005 }
1006
1007 if (true_dependency_cache != NULL
1008 && res == DEP_CHANGED)
1009 update_dependency_caches (dep, old_type);
1010 #endif
1011
1012 return res;
1013 }
1014
1015 /* Add or update a dependence described by DEP.
1016 MEM1 and MEM2, if non-null, correspond to memory locations in case of
1017 data speculation.
1018
1019 The function returns a value indicating if an old entry has been changed
1020 or a new entry has been added to insn's backward deps or nothing has
1021 been updated at all. */
1022 static enum DEPS_ADJUST_RESULT
1023 add_or_update_dep_1 (dep_t new_dep, bool resolved_p,
1024 rtx mem1 ATTRIBUTE_UNUSED, rtx mem2 ATTRIBUTE_UNUSED)
1025 {
1026 bool maybe_present_p = true;
1027 bool present_p = false;
1028
1029 gcc_assert (INSN_P (DEP_PRO (new_dep)) && INSN_P (DEP_CON (new_dep))
1030 && DEP_PRO (new_dep) != DEP_CON (new_dep));
1031
1032 #ifdef INSN_SCHEDULING
1033
1034 #ifdef ENABLE_CHECKING
1035 check_dep (new_dep, mem1 != NULL);
1036 #endif
1037
1038 if (true_dependency_cache != NULL)
1039 {
1040 switch (ask_dependency_caches (new_dep))
1041 {
1042 case DEP_PRESENT:
1043 return DEP_PRESENT;
1044
1045 case DEP_CHANGED:
1046 maybe_present_p = true;
1047 present_p = true;
1048 break;
1049
1050 case DEP_CREATED:
1051 maybe_present_p = false;
1052 present_p = false;
1053 break;
1054
1055 default:
1056 gcc_unreachable ();
1057 break;
1058 }
1059 }
1060 #endif
1061
1062 /* Check that we don't already have this dependence. */
1063 if (maybe_present_p)
1064 {
1065 dep_t present_dep;
1066 sd_iterator_def sd_it;
1067
1068 gcc_assert (true_dependency_cache == NULL || present_p);
1069
1070 present_dep = sd_find_dep_between_no_cache (DEP_PRO (new_dep),
1071 DEP_CON (new_dep),
1072 resolved_p, &sd_it);
1073
1074 if (present_dep != NULL)
1075 /* We found an existing dependency between ELEM and INSN. */
1076 return update_dep (present_dep, new_dep, sd_it, mem1, mem2);
1077 else
1078 /* We didn't find a dep, it shouldn't present in the cache. */
1079 gcc_assert (!present_p);
1080 }
1081
1082 /* Might want to check one level of transitivity to save conses.
1083 This check should be done in maybe_add_or_update_dep_1.
1084 Since we made it to add_or_update_dep_1, we must create
1085 (or update) a link. */
1086
1087 if (mem1 != NULL_RTX)
1088 {
1089 gcc_assert (current_sched_info->flags & DO_SPECULATION);
1090 DEP_STATUS (new_dep) = set_dep_weak (DEP_STATUS (new_dep), BEGIN_DATA,
1091 estimate_dep_weak (mem1, mem2));
1092 }
1093
1094 sd_add_dep (new_dep, resolved_p);
1095
1096 return DEP_CREATED;
1097 }
1098
1099 /* Initialize BACK_LIST_PTR with consumer's backward list and
1100 FORW_LIST_PTR with producer's forward list. If RESOLVED_P is true
1101 initialize with lists that hold resolved deps. */
1102 static void
1103 get_back_and_forw_lists (dep_t dep, bool resolved_p,
1104 deps_list_t *back_list_ptr,
1105 deps_list_t *forw_list_ptr)
1106 {
1107 rtx con = DEP_CON (dep);
1108
1109 if (!resolved_p)
1110 {
1111 if ((current_sched_info->flags & DO_SPECULATION)
1112 && (DEP_STATUS (dep) & SPECULATIVE))
1113 *back_list_ptr = INSN_SPEC_BACK_DEPS (con);
1114 else
1115 *back_list_ptr = INSN_HARD_BACK_DEPS (con);
1116
1117 *forw_list_ptr = INSN_FORW_DEPS (DEP_PRO (dep));
1118 }
1119 else
1120 {
1121 *back_list_ptr = INSN_RESOLVED_BACK_DEPS (con);
1122 *forw_list_ptr = INSN_RESOLVED_FORW_DEPS (DEP_PRO (dep));
1123 }
1124 }
1125
1126 /* Add dependence described by DEP.
1127 If RESOLVED_P is true treat the dependence as a resolved one. */
1128 void
1129 sd_add_dep (dep_t dep, bool resolved_p)
1130 {
1131 dep_node_t n = create_dep_node ();
1132 deps_list_t con_back_deps;
1133 deps_list_t pro_forw_deps;
1134 rtx elem = DEP_PRO (dep);
1135 rtx insn = DEP_CON (dep);
1136
1137 gcc_assert (INSN_P (insn) && INSN_P (elem) && insn != elem);
1138
1139 if ((current_sched_info->flags & DO_SPECULATION)
1140 && !sched_insn_is_legitimate_for_speculation_p (insn, DEP_STATUS (dep)))
1141 DEP_STATUS (dep) &= ~SPECULATIVE;
1142
1143 copy_dep (DEP_NODE_DEP (n), dep);
1144
1145 get_back_and_forw_lists (dep, resolved_p, &con_back_deps, &pro_forw_deps);
1146
1147 add_to_deps_list (DEP_NODE_BACK (n), con_back_deps);
1148
1149 #ifdef INSN_SCHEDULING
1150 #ifdef ENABLE_CHECKING
1151 check_dep (dep, false);
1152 #endif
1153
1154 add_to_deps_list (DEP_NODE_FORW (n), pro_forw_deps);
1155
1156 /* If we are adding a dependency to INSN's LOG_LINKs, then note that
1157 in the bitmap caches of dependency information. */
1158 if (true_dependency_cache != NULL)
1159 set_dependency_caches (dep);
1160 #endif
1161 }
1162
1163 /* Add or update backward dependence between INSN and ELEM
1164 with given type DEP_TYPE and dep_status DS.
1165 This function is a convenience wrapper. */
1166 enum DEPS_ADJUST_RESULT
1167 sd_add_or_update_dep (dep_t dep, bool resolved_p)
1168 {
1169 return add_or_update_dep_1 (dep, resolved_p, NULL_RTX, NULL_RTX);
1170 }
1171
1172 /* Resolved dependence pointed to by SD_IT.
1173 SD_IT will advance to the next element. */
1174 void
1175 sd_resolve_dep (sd_iterator_def sd_it)
1176 {
1177 dep_node_t node = DEP_LINK_NODE (*sd_it.linkp);
1178 dep_t dep = DEP_NODE_DEP (node);
1179 rtx pro = DEP_PRO (dep);
1180 rtx con = DEP_CON (dep);
1181
1182 if ((current_sched_info->flags & DO_SPECULATION)
1183 && (DEP_STATUS (dep) & SPECULATIVE))
1184 move_dep_link (DEP_NODE_BACK (node), INSN_SPEC_BACK_DEPS (con),
1185 INSN_RESOLVED_BACK_DEPS (con));
1186 else
1187 move_dep_link (DEP_NODE_BACK (node), INSN_HARD_BACK_DEPS (con),
1188 INSN_RESOLVED_BACK_DEPS (con));
1189
1190 move_dep_link (DEP_NODE_FORW (node), INSN_FORW_DEPS (pro),
1191 INSN_RESOLVED_FORW_DEPS (pro));
1192 }
1193
1194 /* Make TO depend on all the FROM's producers.
1195 If RESOLVED_P is true add dependencies to the resolved lists. */
1196 void
1197 sd_copy_back_deps (rtx to, rtx from, bool resolved_p)
1198 {
1199 sd_list_types_def list_type;
1200 sd_iterator_def sd_it;
1201 dep_t dep;
1202
1203 list_type = resolved_p ? SD_LIST_RES_BACK : SD_LIST_BACK;
1204
1205 FOR_EACH_DEP (from, list_type, sd_it, dep)
1206 {
1207 dep_def _new_dep, *new_dep = &_new_dep;
1208
1209 copy_dep (new_dep, dep);
1210 DEP_CON (new_dep) = to;
1211 sd_add_dep (new_dep, resolved_p);
1212 }
1213 }
1214
1215 /* Remove a dependency referred to by SD_IT.
1216 SD_IT will point to the next dependence after removal. */
1217 void
1218 sd_delete_dep (sd_iterator_def sd_it)
1219 {
1220 dep_node_t n = DEP_LINK_NODE (*sd_it.linkp);
1221 dep_t dep = DEP_NODE_DEP (n);
1222 rtx pro = DEP_PRO (dep);
1223 rtx con = DEP_CON (dep);
1224 deps_list_t con_back_deps;
1225 deps_list_t pro_forw_deps;
1226
1227 if (true_dependency_cache != NULL)
1228 {
1229 int elem_luid = INSN_LUID (pro);
1230 int insn_luid = INSN_LUID (con);
1231
1232 bitmap_clear_bit (&true_dependency_cache[insn_luid], elem_luid);
1233 bitmap_clear_bit (&anti_dependency_cache[insn_luid], elem_luid);
1234 bitmap_clear_bit (&output_dependency_cache[insn_luid], elem_luid);
1235
1236 if (current_sched_info->flags & DO_SPECULATION)
1237 bitmap_clear_bit (&spec_dependency_cache[insn_luid], elem_luid);
1238 }
1239
1240 get_back_and_forw_lists (dep, sd_it.resolved_p,
1241 &con_back_deps, &pro_forw_deps);
1242
1243 remove_from_deps_list (DEP_NODE_BACK (n), con_back_deps);
1244 remove_from_deps_list (DEP_NODE_FORW (n), pro_forw_deps);
1245
1246 delete_dep_node (n);
1247 }
1248
1249 /* Dump size of the lists. */
1250 #define DUMP_LISTS_SIZE (2)
1251
1252 /* Dump dependencies of the lists. */
1253 #define DUMP_LISTS_DEPS (4)
1254
1255 /* Dump all information about the lists. */
1256 #define DUMP_LISTS_ALL (DUMP_LISTS_SIZE | DUMP_LISTS_DEPS)
1257
1258 /* Dump deps_lists of INSN specified by TYPES to DUMP.
1259 FLAGS is a bit mask specifying what information about the lists needs
1260 to be printed.
1261 If FLAGS has the very first bit set, then dump all information about
1262 the lists and propagate this bit into the callee dump functions. */
1263 static void
1264 dump_lists (FILE *dump, rtx insn, sd_list_types_def types, int flags)
1265 {
1266 sd_iterator_def sd_it;
1267 dep_t dep;
1268 int all;
1269
1270 all = (flags & 1);
1271
1272 if (all)
1273 flags |= DUMP_LISTS_ALL;
1274
1275 fprintf (dump, "[");
1276
1277 if (flags & DUMP_LISTS_SIZE)
1278 fprintf (dump, "%d; ", sd_lists_size (insn, types));
1279
1280 if (flags & DUMP_LISTS_DEPS)
1281 {
1282 FOR_EACH_DEP (insn, types, sd_it, dep)
1283 {
1284 dump_dep (dump, dep, dump_dep_flags | all);
1285 fprintf (dump, " ");
1286 }
1287 }
1288 }
1289
1290 /* Dump all information about deps_lists of INSN specified by TYPES
1291 to STDERR. */
1292 void
1293 sd_debug_lists (rtx insn, sd_list_types_def types)
1294 {
1295 dump_lists (stderr, insn, types, 1);
1296 fprintf (stderr, "\n");
1297 }
1298
1299 /* A convenience wrapper to operate on an entire list. */
1300
1301 static void
1302 add_dependence_list (rtx insn, rtx list, int uncond, enum reg_note dep_type)
1303 {
1304 for (; list; list = XEXP (list, 1))
1305 {
1306 if (uncond || ! sched_insns_conditions_mutex_p (insn, XEXP (list, 0)))
1307 add_dependence (insn, XEXP (list, 0), dep_type);
1308 }
1309 }
1310
1311 /* Similar, but free *LISTP at the same time. */
1312
1313 static void
1314 add_dependence_list_and_free (rtx insn, rtx *listp, int uncond,
1315 enum reg_note dep_type)
1316 {
1317 rtx list, next;
1318 for (list = *listp, *listp = NULL; list ; list = next)
1319 {
1320 next = XEXP (list, 1);
1321 if (uncond || ! sched_insns_conditions_mutex_p (insn, XEXP (list, 0)))
1322 add_dependence (insn, XEXP (list, 0), dep_type);
1323 free_INSN_LIST_node (list);
1324 }
1325 }
1326
1327 /* Clear all dependencies for an insn. */
1328 static void
1329 delete_all_dependences (rtx insn)
1330 {
1331 sd_iterator_def sd_it;
1332 dep_t dep;
1333
1334 /* The below cycle can be optimized to clear the caches and back_deps
1335 in one call but that would provoke duplication of code from
1336 delete_dep (). */
1337
1338 for (sd_it = sd_iterator_start (insn, SD_LIST_BACK);
1339 sd_iterator_cond (&sd_it, &dep);)
1340 sd_delete_dep (sd_it);
1341 }
1342
1343 /* All insns in a scheduling group except the first should only have
1344 dependencies on the previous insn in the group. So we find the
1345 first instruction in the scheduling group by walking the dependence
1346 chains backwards. Then we add the dependencies for the group to
1347 the previous nonnote insn. */
1348
1349 static void
1350 fixup_sched_groups (rtx insn)
1351 {
1352 sd_iterator_def sd_it;
1353 dep_t dep;
1354 rtx prev_nonnote;
1355
1356 FOR_EACH_DEP (insn, SD_LIST_BACK, sd_it, dep)
1357 {
1358 rtx i = insn;
1359 rtx pro = DEP_PRO (dep);
1360
1361 do
1362 {
1363 i = prev_nonnote_insn (i);
1364
1365 if (pro == i)
1366 goto next_link;
1367 } while (SCHED_GROUP_P (i));
1368
1369 if (! sched_insns_conditions_mutex_p (i, pro))
1370 add_dependence (i, pro, DEP_TYPE (dep));
1371 next_link:;
1372 }
1373
1374 delete_all_dependences (insn);
1375
1376 prev_nonnote = prev_nonnote_insn (insn);
1377 if (BLOCK_FOR_INSN (insn) == BLOCK_FOR_INSN (prev_nonnote)
1378 && ! sched_insns_conditions_mutex_p (insn, prev_nonnote))
1379 add_dependence (insn, prev_nonnote, REG_DEP_ANTI);
1380 }
1381 \f
1382 /* Process an insn's memory dependencies. There are four kinds of
1383 dependencies:
1384
1385 (0) read dependence: read follows read
1386 (1) true dependence: read follows write
1387 (2) output dependence: write follows write
1388 (3) anti dependence: write follows read
1389
1390 We are careful to build only dependencies which actually exist, and
1391 use transitivity to avoid building too many links. */
1392
1393 /* Add an INSN and MEM reference pair to a pending INSN_LIST and MEM_LIST.
1394 The MEM is a memory reference contained within INSN, which we are saving
1395 so that we can do memory aliasing on it. */
1396
1397 static void
1398 add_insn_mem_dependence (struct deps *deps, bool read_p,
1399 rtx insn, rtx mem)
1400 {
1401 rtx *insn_list;
1402 rtx *mem_list;
1403 rtx link;
1404
1405 if (read_p)
1406 {
1407 insn_list = &deps->pending_read_insns;
1408 mem_list = &deps->pending_read_mems;
1409 deps->pending_read_list_length++;
1410 }
1411 else
1412 {
1413 insn_list = &deps->pending_write_insns;
1414 mem_list = &deps->pending_write_mems;
1415 deps->pending_write_list_length++;
1416 }
1417
1418 link = alloc_INSN_LIST (insn, *insn_list);
1419 *insn_list = link;
1420
1421 if (current_sched_info->use_cselib)
1422 {
1423 mem = shallow_copy_rtx (mem);
1424 XEXP (mem, 0) = cselib_subst_to_values (XEXP (mem, 0));
1425 }
1426 link = alloc_EXPR_LIST (VOIDmode, canon_rtx (mem), *mem_list);
1427 *mem_list = link;
1428 }
1429
1430 /* Make a dependency between every memory reference on the pending lists
1431 and INSN, thus flushing the pending lists. FOR_READ is true if emitting
1432 dependencies for a read operation, similarly with FOR_WRITE. */
1433
1434 static void
1435 flush_pending_lists (struct deps *deps, rtx insn, int for_read,
1436 int for_write)
1437 {
1438 if (for_write)
1439 {
1440 add_dependence_list_and_free (insn, &deps->pending_read_insns, 1,
1441 REG_DEP_ANTI);
1442 free_EXPR_LIST_list (&deps->pending_read_mems);
1443 deps->pending_read_list_length = 0;
1444 }
1445
1446 add_dependence_list_and_free (insn, &deps->pending_write_insns, 1,
1447 for_read ? REG_DEP_ANTI : REG_DEP_OUTPUT);
1448 free_EXPR_LIST_list (&deps->pending_write_mems);
1449 deps->pending_write_list_length = 0;
1450
1451 add_dependence_list_and_free (insn, &deps->last_pending_memory_flush, 1,
1452 for_read ? REG_DEP_ANTI : REG_DEP_OUTPUT);
1453 deps->last_pending_memory_flush = alloc_INSN_LIST (insn, NULL_RTX);
1454 deps->pending_flush_length = 1;
1455 }
1456 \f
1457 /* Analyze a single reference to register (reg:MODE REGNO) in INSN.
1458 The type of the reference is specified by REF and can be SET,
1459 CLOBBER, PRE_DEC, POST_DEC, PRE_INC, POST_INC or USE. */
1460
1461 static void
1462 sched_analyze_reg (struct deps *deps, int regno, enum machine_mode mode,
1463 enum rtx_code ref, rtx insn)
1464 {
1465 /* A hard reg in a wide mode may really be multiple registers.
1466 If so, mark all of them just like the first. */
1467 if (regno < FIRST_PSEUDO_REGISTER)
1468 {
1469 int i = hard_regno_nregs[regno][mode];
1470 if (ref == SET)
1471 {
1472 while (--i >= 0)
1473 SET_REGNO_REG_SET (reg_pending_sets, regno + i);
1474 }
1475 else if (ref == USE)
1476 {
1477 while (--i >= 0)
1478 SET_REGNO_REG_SET (reg_pending_uses, regno + i);
1479 }
1480 else
1481 {
1482 while (--i >= 0)
1483 SET_REGNO_REG_SET (reg_pending_clobbers, regno + i);
1484 }
1485 }
1486
1487 /* ??? Reload sometimes emits USEs and CLOBBERs of pseudos that
1488 it does not reload. Ignore these as they have served their
1489 purpose already. */
1490 else if (regno >= deps->max_reg)
1491 {
1492 enum rtx_code code = GET_CODE (PATTERN (insn));
1493 gcc_assert (code == USE || code == CLOBBER);
1494 }
1495
1496 else
1497 {
1498 if (ref == SET)
1499 SET_REGNO_REG_SET (reg_pending_sets, regno);
1500 else if (ref == USE)
1501 SET_REGNO_REG_SET (reg_pending_uses, regno);
1502 else
1503 SET_REGNO_REG_SET (reg_pending_clobbers, regno);
1504
1505 /* Pseudos that are REG_EQUIV to something may be replaced
1506 by that during reloading. We need only add dependencies for
1507 the address in the REG_EQUIV note. */
1508 if (!reload_completed && get_reg_known_equiv_p (regno))
1509 {
1510 rtx t = get_reg_known_value (regno);
1511 if (MEM_P (t))
1512 sched_analyze_2 (deps, XEXP (t, 0), insn);
1513 }
1514
1515 /* Don't let it cross a call after scheduling if it doesn't
1516 already cross one. */
1517 if (REG_N_CALLS_CROSSED (regno) == 0)
1518 {
1519 if (ref == USE)
1520 deps->sched_before_next_call
1521 = alloc_INSN_LIST (insn, deps->sched_before_next_call);
1522 else
1523 add_dependence_list (insn, deps->last_function_call, 1,
1524 REG_DEP_ANTI);
1525 }
1526 }
1527 }
1528
1529 /* Analyze a single SET, CLOBBER, PRE_DEC, POST_DEC, PRE_INC or POST_INC
1530 rtx, X, creating all dependencies generated by the write to the
1531 destination of X, and reads of everything mentioned. */
1532
1533 static void
1534 sched_analyze_1 (struct deps *deps, rtx x, rtx insn)
1535 {
1536 rtx dest = XEXP (x, 0);
1537 enum rtx_code code = GET_CODE (x);
1538
1539 if (dest == 0)
1540 return;
1541
1542 if (GET_CODE (dest) == PARALLEL)
1543 {
1544 int i;
1545
1546 for (i = XVECLEN (dest, 0) - 1; i >= 0; i--)
1547 if (XEXP (XVECEXP (dest, 0, i), 0) != 0)
1548 sched_analyze_1 (deps,
1549 gen_rtx_CLOBBER (VOIDmode,
1550 XEXP (XVECEXP (dest, 0, i), 0)),
1551 insn);
1552
1553 if (GET_CODE (x) == SET)
1554 sched_analyze_2 (deps, SET_SRC (x), insn);
1555 return;
1556 }
1557
1558 while (GET_CODE (dest) == STRICT_LOW_PART || GET_CODE (dest) == SUBREG
1559 || GET_CODE (dest) == ZERO_EXTRACT)
1560 {
1561 if (GET_CODE (dest) == STRICT_LOW_PART
1562 || GET_CODE (dest) == ZERO_EXTRACT
1563 || df_read_modify_subreg_p (dest))
1564 {
1565 /* These both read and modify the result. We must handle
1566 them as writes to get proper dependencies for following
1567 instructions. We must handle them as reads to get proper
1568 dependencies from this to previous instructions.
1569 Thus we need to call sched_analyze_2. */
1570
1571 sched_analyze_2 (deps, XEXP (dest, 0), insn);
1572 }
1573 if (GET_CODE (dest) == ZERO_EXTRACT)
1574 {
1575 /* The second and third arguments are values read by this insn. */
1576 sched_analyze_2 (deps, XEXP (dest, 1), insn);
1577 sched_analyze_2 (deps, XEXP (dest, 2), insn);
1578 }
1579 dest = XEXP (dest, 0);
1580 }
1581
1582 if (REG_P (dest))
1583 {
1584 int regno = REGNO (dest);
1585 enum machine_mode mode = GET_MODE (dest);
1586
1587 sched_analyze_reg (deps, regno, mode, code, insn);
1588
1589 #ifdef STACK_REGS
1590 /* Treat all writes to a stack register as modifying the TOS. */
1591 if (regno >= FIRST_STACK_REG && regno <= LAST_STACK_REG)
1592 {
1593 /* Avoid analyzing the same register twice. */
1594 if (regno != FIRST_STACK_REG)
1595 sched_analyze_reg (deps, FIRST_STACK_REG, mode, code, insn);
1596 sched_analyze_reg (deps, FIRST_STACK_REG, mode, USE, insn);
1597 }
1598 #endif
1599 }
1600 else if (MEM_P (dest))
1601 {
1602 /* Writing memory. */
1603 rtx t = dest;
1604
1605 if (current_sched_info->use_cselib)
1606 {
1607 t = shallow_copy_rtx (dest);
1608 cselib_lookup (XEXP (t, 0), Pmode, 1);
1609 XEXP (t, 0) = cselib_subst_to_values (XEXP (t, 0));
1610 }
1611 t = canon_rtx (t);
1612
1613 if ((deps->pending_read_list_length + deps->pending_write_list_length)
1614 > MAX_PENDING_LIST_LENGTH)
1615 {
1616 /* Flush all pending reads and writes to prevent the pending lists
1617 from getting any larger. Insn scheduling runs too slowly when
1618 these lists get long. When compiling GCC with itself,
1619 this flush occurs 8 times for sparc, and 10 times for m88k using
1620 the default value of 32. */
1621 flush_pending_lists (deps, insn, false, true);
1622 }
1623 else
1624 {
1625 rtx pending, pending_mem;
1626
1627 pending = deps->pending_read_insns;
1628 pending_mem = deps->pending_read_mems;
1629 while (pending)
1630 {
1631 if (anti_dependence (XEXP (pending_mem, 0), t)
1632 && ! sched_insns_conditions_mutex_p (insn, XEXP (pending, 0)))
1633 add_dependence (insn, XEXP (pending, 0), REG_DEP_ANTI);
1634
1635 pending = XEXP (pending, 1);
1636 pending_mem = XEXP (pending_mem, 1);
1637 }
1638
1639 pending = deps->pending_write_insns;
1640 pending_mem = deps->pending_write_mems;
1641 while (pending)
1642 {
1643 if (output_dependence (XEXP (pending_mem, 0), t)
1644 && ! sched_insns_conditions_mutex_p (insn, XEXP (pending, 0)))
1645 add_dependence (insn, XEXP (pending, 0), REG_DEP_OUTPUT);
1646
1647 pending = XEXP (pending, 1);
1648 pending_mem = XEXP (pending_mem, 1);
1649 }
1650
1651 add_dependence_list (insn, deps->last_pending_memory_flush, 1,
1652 REG_DEP_ANTI);
1653
1654 add_insn_mem_dependence (deps, false, insn, dest);
1655 }
1656 sched_analyze_2 (deps, XEXP (dest, 0), insn);
1657 }
1658
1659 /* Analyze reads. */
1660 if (GET_CODE (x) == SET)
1661 sched_analyze_2 (deps, SET_SRC (x), insn);
1662 }
1663
1664 /* Analyze the uses of memory and registers in rtx X in INSN. */
1665
1666 static void
1667 sched_analyze_2 (struct deps *deps, rtx x, rtx insn)
1668 {
1669 int i;
1670 int j;
1671 enum rtx_code code;
1672 const char *fmt;
1673
1674 if (x == 0)
1675 return;
1676
1677 code = GET_CODE (x);
1678
1679 switch (code)
1680 {
1681 case CONST_INT:
1682 case CONST_DOUBLE:
1683 case CONST_FIXED:
1684 case CONST_VECTOR:
1685 case SYMBOL_REF:
1686 case CONST:
1687 case LABEL_REF:
1688 /* Ignore constants. Note that we must handle CONST_DOUBLE here
1689 because it may have a cc0_rtx in its CONST_DOUBLE_CHAIN field, but
1690 this does not mean that this insn is using cc0. */
1691 return;
1692
1693 #ifdef HAVE_cc0
1694 case CC0:
1695 /* User of CC0 depends on immediately preceding insn. */
1696 SCHED_GROUP_P (insn) = 1;
1697 /* Don't move CC0 setter to another block (it can set up the
1698 same flag for previous CC0 users which is safe). */
1699 CANT_MOVE (prev_nonnote_insn (insn)) = 1;
1700 return;
1701 #endif
1702
1703 case REG:
1704 {
1705 int regno = REGNO (x);
1706 enum machine_mode mode = GET_MODE (x);
1707
1708 sched_analyze_reg (deps, regno, mode, USE, insn);
1709
1710 #ifdef STACK_REGS
1711 /* Treat all reads of a stack register as modifying the TOS. */
1712 if (regno >= FIRST_STACK_REG && regno <= LAST_STACK_REG)
1713 {
1714 /* Avoid analyzing the same register twice. */
1715 if (regno != FIRST_STACK_REG)
1716 sched_analyze_reg (deps, FIRST_STACK_REG, mode, USE, insn);
1717 sched_analyze_reg (deps, FIRST_STACK_REG, mode, SET, insn);
1718 }
1719 #endif
1720 return;
1721 }
1722
1723 case MEM:
1724 {
1725 /* Reading memory. */
1726 rtx u;
1727 rtx pending, pending_mem;
1728 rtx t = x;
1729
1730 if (current_sched_info->use_cselib)
1731 {
1732 t = shallow_copy_rtx (t);
1733 cselib_lookup (XEXP (t, 0), Pmode, 1);
1734 XEXP (t, 0) = cselib_subst_to_values (XEXP (t, 0));
1735 }
1736 t = canon_rtx (t);
1737 pending = deps->pending_read_insns;
1738 pending_mem = deps->pending_read_mems;
1739 while (pending)
1740 {
1741 if (read_dependence (XEXP (pending_mem, 0), t)
1742 && ! sched_insns_conditions_mutex_p (insn, XEXP (pending, 0)))
1743 add_dependence (insn, XEXP (pending, 0), REG_DEP_ANTI);
1744
1745 pending = XEXP (pending, 1);
1746 pending_mem = XEXP (pending_mem, 1);
1747 }
1748
1749 pending = deps->pending_write_insns;
1750 pending_mem = deps->pending_write_mems;
1751 while (pending)
1752 {
1753 if (true_dependence (XEXP (pending_mem, 0), VOIDmode,
1754 t, rtx_varies_p)
1755 && ! sched_insns_conditions_mutex_p (insn, XEXP (pending, 0)))
1756 {
1757 if ((current_sched_info->flags & DO_SPECULATION)
1758 && (spec_info->mask & BEGIN_DATA))
1759 /* Create a data-speculative dependence between producer
1760 and consumer. */
1761 {
1762 dep_def _dep, *dep = &_dep;
1763
1764 init_dep_1 (dep, XEXP (pending, 0), insn, REG_DEP_TRUE,
1765 BEGIN_DATA | DEP_TRUE);
1766
1767 maybe_add_or_update_dep_1 (dep, false,
1768 XEXP (pending_mem, 0), t);
1769 }
1770 else
1771 add_dependence (insn, XEXP (pending, 0), REG_DEP_TRUE);
1772 }
1773
1774 pending = XEXP (pending, 1);
1775 pending_mem = XEXP (pending_mem, 1);
1776 }
1777
1778 for (u = deps->last_pending_memory_flush; u; u = XEXP (u, 1))
1779 if (! JUMP_P (XEXP (u, 0)) || deps_may_trap_p (x))
1780 add_dependence (insn, XEXP (u, 0), REG_DEP_ANTI);
1781
1782 /* Always add these dependencies to pending_reads, since
1783 this insn may be followed by a write. */
1784 add_insn_mem_dependence (deps, true, insn, x);
1785
1786 /* Take advantage of tail recursion here. */
1787 sched_analyze_2 (deps, XEXP (x, 0), insn);
1788 return;
1789 }
1790
1791 /* Force pending stores to memory in case a trap handler needs them. */
1792 case TRAP_IF:
1793 flush_pending_lists (deps, insn, true, false);
1794 break;
1795
1796 case ASM_OPERANDS:
1797 case ASM_INPUT:
1798 case UNSPEC_VOLATILE:
1799 {
1800 /* Traditional and volatile asm instructions must be considered to use
1801 and clobber all hard registers, all pseudo-registers and all of
1802 memory. So must TRAP_IF and UNSPEC_VOLATILE operations.
1803
1804 Consider for instance a volatile asm that changes the fpu rounding
1805 mode. An insn should not be moved across this even if it only uses
1806 pseudo-regs because it might give an incorrectly rounded result. */
1807 if (code != ASM_OPERANDS || MEM_VOLATILE_P (x))
1808 reg_pending_barrier = TRUE_BARRIER;
1809
1810 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
1811 We can not just fall through here since then we would be confused
1812 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
1813 traditional asms unlike their normal usage. */
1814
1815 if (code == ASM_OPERANDS)
1816 {
1817 for (j = 0; j < ASM_OPERANDS_INPUT_LENGTH (x); j++)
1818 sched_analyze_2 (deps, ASM_OPERANDS_INPUT (x, j), insn);
1819 return;
1820 }
1821 break;
1822 }
1823
1824 case PRE_DEC:
1825 case POST_DEC:
1826 case PRE_INC:
1827 case POST_INC:
1828 /* These both read and modify the result. We must handle them as writes
1829 to get proper dependencies for following instructions. We must handle
1830 them as reads to get proper dependencies from this to previous
1831 instructions. Thus we need to pass them to both sched_analyze_1
1832 and sched_analyze_2. We must call sched_analyze_2 first in order
1833 to get the proper antecedent for the read. */
1834 sched_analyze_2 (deps, XEXP (x, 0), insn);
1835 sched_analyze_1 (deps, x, insn);
1836 return;
1837
1838 case POST_MODIFY:
1839 case PRE_MODIFY:
1840 /* op0 = op0 + op1 */
1841 sched_analyze_2 (deps, XEXP (x, 0), insn);
1842 sched_analyze_2 (deps, XEXP (x, 1), insn);
1843 sched_analyze_1 (deps, x, insn);
1844 return;
1845
1846 default:
1847 break;
1848 }
1849
1850 /* Other cases: walk the insn. */
1851 fmt = GET_RTX_FORMAT (code);
1852 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1853 {
1854 if (fmt[i] == 'e')
1855 sched_analyze_2 (deps, XEXP (x, i), insn);
1856 else if (fmt[i] == 'E')
1857 for (j = 0; j < XVECLEN (x, i); j++)
1858 sched_analyze_2 (deps, XVECEXP (x, i, j), insn);
1859 }
1860 }
1861
1862 /* Analyze an INSN with pattern X to find all dependencies. */
1863
1864 static void
1865 sched_analyze_insn (struct deps *deps, rtx x, rtx insn)
1866 {
1867 RTX_CODE code = GET_CODE (x);
1868 rtx link;
1869 unsigned i;
1870 reg_set_iterator rsi;
1871
1872 if (code == COND_EXEC)
1873 {
1874 sched_analyze_2 (deps, COND_EXEC_TEST (x), insn);
1875
1876 /* ??? Should be recording conditions so we reduce the number of
1877 false dependencies. */
1878 x = COND_EXEC_CODE (x);
1879 code = GET_CODE (x);
1880 }
1881 if (code == SET || code == CLOBBER)
1882 {
1883 sched_analyze_1 (deps, x, insn);
1884
1885 /* Bare clobber insns are used for letting life analysis, reg-stack
1886 and others know that a value is dead. Depend on the last call
1887 instruction so that reg-stack won't get confused. */
1888 if (code == CLOBBER)
1889 add_dependence_list (insn, deps->last_function_call, 1, REG_DEP_OUTPUT);
1890 }
1891 else if (code == PARALLEL)
1892 {
1893 for (i = XVECLEN (x, 0); i--;)
1894 {
1895 rtx sub = XVECEXP (x, 0, i);
1896 code = GET_CODE (sub);
1897
1898 if (code == COND_EXEC)
1899 {
1900 sched_analyze_2 (deps, COND_EXEC_TEST (sub), insn);
1901 sub = COND_EXEC_CODE (sub);
1902 code = GET_CODE (sub);
1903 }
1904 if (code == SET || code == CLOBBER)
1905 sched_analyze_1 (deps, sub, insn);
1906 else
1907 sched_analyze_2 (deps, sub, insn);
1908 }
1909 }
1910 else
1911 sched_analyze_2 (deps, x, insn);
1912
1913 /* Mark registers CLOBBERED or used by called function. */
1914 if (CALL_P (insn))
1915 {
1916 for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1))
1917 {
1918 if (GET_CODE (XEXP (link, 0)) == CLOBBER)
1919 sched_analyze_1 (deps, XEXP (link, 0), insn);
1920 else
1921 sched_analyze_2 (deps, XEXP (link, 0), insn);
1922 }
1923 if (find_reg_note (insn, REG_SETJMP, NULL))
1924 reg_pending_barrier = MOVE_BARRIER;
1925 }
1926
1927 if (JUMP_P (insn))
1928 {
1929 rtx next;
1930 next = next_nonnote_insn (insn);
1931 if (next && BARRIER_P (next))
1932 reg_pending_barrier = TRUE_BARRIER;
1933 else
1934 {
1935 rtx pending, pending_mem;
1936 regset_head tmp_uses, tmp_sets;
1937 INIT_REG_SET (&tmp_uses);
1938 INIT_REG_SET (&tmp_sets);
1939
1940 (*current_sched_info->compute_jump_reg_dependencies)
1941 (insn, &deps->reg_conditional_sets, &tmp_uses, &tmp_sets);
1942 /* Make latency of jump equal to 0 by using anti-dependence. */
1943 EXECUTE_IF_SET_IN_REG_SET (&tmp_uses, 0, i, rsi)
1944 {
1945 struct deps_reg *reg_last = &deps->reg_last[i];
1946 add_dependence_list (insn, reg_last->sets, 0, REG_DEP_ANTI);
1947 add_dependence_list (insn, reg_last->clobbers, 0, REG_DEP_ANTI);
1948 reg_last->uses_length++;
1949 reg_last->uses = alloc_INSN_LIST (insn, reg_last->uses);
1950 }
1951 IOR_REG_SET (reg_pending_sets, &tmp_sets);
1952
1953 CLEAR_REG_SET (&tmp_uses);
1954 CLEAR_REG_SET (&tmp_sets);
1955
1956 /* All memory writes and volatile reads must happen before the
1957 jump. Non-volatile reads must happen before the jump iff
1958 the result is needed by the above register used mask. */
1959
1960 pending = deps->pending_write_insns;
1961 pending_mem = deps->pending_write_mems;
1962 while (pending)
1963 {
1964 if (! sched_insns_conditions_mutex_p (insn, XEXP (pending, 0)))
1965 add_dependence (insn, XEXP (pending, 0), REG_DEP_OUTPUT);
1966 pending = XEXP (pending, 1);
1967 pending_mem = XEXP (pending_mem, 1);
1968 }
1969
1970 pending = deps->pending_read_insns;
1971 pending_mem = deps->pending_read_mems;
1972 while (pending)
1973 {
1974 if (MEM_VOLATILE_P (XEXP (pending_mem, 0))
1975 && ! sched_insns_conditions_mutex_p (insn, XEXP (pending, 0)))
1976 add_dependence (insn, XEXP (pending, 0), REG_DEP_OUTPUT);
1977 pending = XEXP (pending, 1);
1978 pending_mem = XEXP (pending_mem, 1);
1979 }
1980
1981 add_dependence_list (insn, deps->last_pending_memory_flush, 1,
1982 REG_DEP_ANTI);
1983 }
1984 }
1985
1986 /* If this instruction can throw an exception, then moving it changes
1987 where block boundaries fall. This is mighty confusing elsewhere.
1988 Therefore, prevent such an instruction from being moved. Same for
1989 non-jump instructions that define block boundaries.
1990 ??? Unclear whether this is still necessary in EBB mode. If not,
1991 add_branch_dependences should be adjusted for RGN mode instead. */
1992 if (((CALL_P (insn) || JUMP_P (insn)) && can_throw_internal (insn))
1993 || (NONJUMP_INSN_P (insn) && control_flow_insn_p (insn)))
1994 reg_pending_barrier = MOVE_BARRIER;
1995
1996 /* Add dependencies if a scheduling barrier was found. */
1997 if (reg_pending_barrier)
1998 {
1999 /* In the case of barrier the most added dependencies are not
2000 real, so we use anti-dependence here. */
2001 if (sched_get_condition (insn))
2002 {
2003 EXECUTE_IF_SET_IN_REG_SET (&deps->reg_last_in_use, 0, i, rsi)
2004 {
2005 struct deps_reg *reg_last = &deps->reg_last[i];
2006 add_dependence_list (insn, reg_last->uses, 0, REG_DEP_ANTI);
2007 add_dependence_list
2008 (insn, reg_last->sets, 0,
2009 reg_pending_barrier == TRUE_BARRIER ? REG_DEP_TRUE : REG_DEP_ANTI);
2010 add_dependence_list
2011 (insn, reg_last->clobbers, 0,
2012 reg_pending_barrier == TRUE_BARRIER ? REG_DEP_TRUE : REG_DEP_ANTI);
2013 }
2014 }
2015 else
2016 {
2017 EXECUTE_IF_SET_IN_REG_SET (&deps->reg_last_in_use, 0, i, rsi)
2018 {
2019 struct deps_reg *reg_last = &deps->reg_last[i];
2020 add_dependence_list_and_free (insn, &reg_last->uses, 0,
2021 REG_DEP_ANTI);
2022 add_dependence_list_and_free
2023 (insn, &reg_last->sets, 0,
2024 reg_pending_barrier == TRUE_BARRIER ? REG_DEP_TRUE : REG_DEP_ANTI);
2025 add_dependence_list_and_free
2026 (insn, &reg_last->clobbers, 0,
2027 reg_pending_barrier == TRUE_BARRIER ? REG_DEP_TRUE : REG_DEP_ANTI);
2028 reg_last->uses_length = 0;
2029 reg_last->clobbers_length = 0;
2030 }
2031 }
2032
2033 for (i = 0; i < (unsigned)deps->max_reg; i++)
2034 {
2035 struct deps_reg *reg_last = &deps->reg_last[i];
2036 reg_last->sets = alloc_INSN_LIST (insn, reg_last->sets);
2037 SET_REGNO_REG_SET (&deps->reg_last_in_use, i);
2038 }
2039
2040 flush_pending_lists (deps, insn, true, true);
2041 CLEAR_REG_SET (&deps->reg_conditional_sets);
2042 reg_pending_barrier = NOT_A_BARRIER;
2043 }
2044 else
2045 {
2046 /* If the current insn is conditional, we can't free any
2047 of the lists. */
2048 if (sched_get_condition (insn))
2049 {
2050 EXECUTE_IF_SET_IN_REG_SET (reg_pending_uses, 0, i, rsi)
2051 {
2052 struct deps_reg *reg_last = &deps->reg_last[i];
2053 add_dependence_list (insn, reg_last->sets, 0, REG_DEP_TRUE);
2054 add_dependence_list (insn, reg_last->clobbers, 0, REG_DEP_TRUE);
2055 reg_last->uses = alloc_INSN_LIST (insn, reg_last->uses);
2056 reg_last->uses_length++;
2057 }
2058 EXECUTE_IF_SET_IN_REG_SET (reg_pending_clobbers, 0, i, rsi)
2059 {
2060 struct deps_reg *reg_last = &deps->reg_last[i];
2061 add_dependence_list (insn, reg_last->sets, 0, REG_DEP_OUTPUT);
2062 add_dependence_list (insn, reg_last->uses, 0, REG_DEP_ANTI);
2063 reg_last->clobbers = alloc_INSN_LIST (insn, reg_last->clobbers);
2064 reg_last->clobbers_length++;
2065 }
2066 EXECUTE_IF_SET_IN_REG_SET (reg_pending_sets, 0, i, rsi)
2067 {
2068 struct deps_reg *reg_last = &deps->reg_last[i];
2069 add_dependence_list (insn, reg_last->sets, 0, REG_DEP_OUTPUT);
2070 add_dependence_list (insn, reg_last->clobbers, 0, REG_DEP_OUTPUT);
2071 add_dependence_list (insn, reg_last->uses, 0, REG_DEP_ANTI);
2072 reg_last->sets = alloc_INSN_LIST (insn, reg_last->sets);
2073 SET_REGNO_REG_SET (&deps->reg_conditional_sets, i);
2074 }
2075 }
2076 else
2077 {
2078 EXECUTE_IF_SET_IN_REG_SET (reg_pending_uses, 0, i, rsi)
2079 {
2080 struct deps_reg *reg_last = &deps->reg_last[i];
2081 add_dependence_list (insn, reg_last->sets, 0, REG_DEP_TRUE);
2082 add_dependence_list (insn, reg_last->clobbers, 0, REG_DEP_TRUE);
2083 reg_last->uses_length++;
2084 reg_last->uses = alloc_INSN_LIST (insn, reg_last->uses);
2085 }
2086 EXECUTE_IF_SET_IN_REG_SET (reg_pending_clobbers, 0, i, rsi)
2087 {
2088 struct deps_reg *reg_last = &deps->reg_last[i];
2089 if (reg_last->uses_length > MAX_PENDING_LIST_LENGTH
2090 || reg_last->clobbers_length > MAX_PENDING_LIST_LENGTH)
2091 {
2092 add_dependence_list_and_free (insn, &reg_last->sets, 0,
2093 REG_DEP_OUTPUT);
2094 add_dependence_list_and_free (insn, &reg_last->uses, 0,
2095 REG_DEP_ANTI);
2096 add_dependence_list_and_free (insn, &reg_last->clobbers, 0,
2097 REG_DEP_OUTPUT);
2098 reg_last->sets = alloc_INSN_LIST (insn, reg_last->sets);
2099 reg_last->clobbers_length = 0;
2100 reg_last->uses_length = 0;
2101 }
2102 else
2103 {
2104 add_dependence_list (insn, reg_last->sets, 0, REG_DEP_OUTPUT);
2105 add_dependence_list (insn, reg_last->uses, 0, REG_DEP_ANTI);
2106 }
2107 reg_last->clobbers_length++;
2108 reg_last->clobbers = alloc_INSN_LIST (insn, reg_last->clobbers);
2109 }
2110 EXECUTE_IF_SET_IN_REG_SET (reg_pending_sets, 0, i, rsi)
2111 {
2112 struct deps_reg *reg_last = &deps->reg_last[i];
2113 add_dependence_list_and_free (insn, &reg_last->sets, 0,
2114 REG_DEP_OUTPUT);
2115 add_dependence_list_and_free (insn, &reg_last->clobbers, 0,
2116 REG_DEP_OUTPUT);
2117 add_dependence_list_and_free (insn, &reg_last->uses, 0,
2118 REG_DEP_ANTI);
2119 reg_last->sets = alloc_INSN_LIST (insn, reg_last->sets);
2120 reg_last->uses_length = 0;
2121 reg_last->clobbers_length = 0;
2122 CLEAR_REGNO_REG_SET (&deps->reg_conditional_sets, i);
2123 }
2124 }
2125
2126 IOR_REG_SET (&deps->reg_last_in_use, reg_pending_uses);
2127 IOR_REG_SET (&deps->reg_last_in_use, reg_pending_clobbers);
2128 IOR_REG_SET (&deps->reg_last_in_use, reg_pending_sets);
2129 }
2130 CLEAR_REG_SET (reg_pending_uses);
2131 CLEAR_REG_SET (reg_pending_clobbers);
2132 CLEAR_REG_SET (reg_pending_sets);
2133
2134 /* If we are currently in a libcall scheduling group, then mark the
2135 current insn as being in a scheduling group and that it can not
2136 be moved into a different basic block. */
2137
2138 if (deps->libcall_block_tail_insn)
2139 {
2140 SCHED_GROUP_P (insn) = 1;
2141 CANT_MOVE (insn) = 1;
2142 }
2143
2144 /* If a post-call group is still open, see if it should remain so.
2145 This insn must be a simple move of a hard reg to a pseudo or
2146 vice-versa.
2147
2148 We must avoid moving these insns for correctness on
2149 SMALL_REGISTER_CLASS machines, and for special registers like
2150 PIC_OFFSET_TABLE_REGNUM. For simplicity, extend this to all
2151 hard regs for all targets. */
2152
2153 if (deps->in_post_call_group_p)
2154 {
2155 rtx tmp, set = single_set (insn);
2156 int src_regno, dest_regno;
2157
2158 if (set == NULL)
2159 goto end_call_group;
2160
2161 tmp = SET_DEST (set);
2162 if (GET_CODE (tmp) == SUBREG)
2163 tmp = SUBREG_REG (tmp);
2164 if (REG_P (tmp))
2165 dest_regno = REGNO (tmp);
2166 else
2167 goto end_call_group;
2168
2169 tmp = SET_SRC (set);
2170 if (GET_CODE (tmp) == SUBREG)
2171 tmp = SUBREG_REG (tmp);
2172 if ((GET_CODE (tmp) == PLUS
2173 || GET_CODE (tmp) == MINUS)
2174 && REG_P (XEXP (tmp, 0))
2175 && REGNO (XEXP (tmp, 0)) == STACK_POINTER_REGNUM
2176 && dest_regno == STACK_POINTER_REGNUM)
2177 src_regno = STACK_POINTER_REGNUM;
2178 else if (REG_P (tmp))
2179 src_regno = REGNO (tmp);
2180 else
2181 goto end_call_group;
2182
2183 if (src_regno < FIRST_PSEUDO_REGISTER
2184 || dest_regno < FIRST_PSEUDO_REGISTER)
2185 {
2186 if (deps->in_post_call_group_p == post_call_initial)
2187 deps->in_post_call_group_p = post_call;
2188
2189 SCHED_GROUP_P (insn) = 1;
2190 CANT_MOVE (insn) = 1;
2191 }
2192 else
2193 {
2194 end_call_group:
2195 deps->in_post_call_group_p = not_post_call;
2196 }
2197 }
2198
2199 /* Fixup the dependencies in the sched group. */
2200 if (SCHED_GROUP_P (insn))
2201 fixup_sched_groups (insn);
2202
2203 if ((current_sched_info->flags & DO_SPECULATION)
2204 && !sched_insn_is_legitimate_for_speculation_p (insn, 0))
2205 /* INSN has an internal dependency (e.g. r14 = [r14]) and thus cannot
2206 be speculated. */
2207 {
2208 sd_iterator_def sd_it;
2209 dep_t dep;
2210
2211 for (sd_it = sd_iterator_start (insn, SD_LIST_SPEC_BACK);
2212 sd_iterator_cond (&sd_it, &dep);)
2213 change_spec_dep_to_hard (sd_it);
2214 }
2215 }
2216
2217 /* Analyze every insn between HEAD and TAIL inclusive, creating backward
2218 dependencies for each insn. */
2219
2220 void
2221 sched_analyze (struct deps *deps, rtx head, rtx tail)
2222 {
2223 rtx insn;
2224
2225 if (current_sched_info->use_cselib)
2226 cselib_init (true);
2227
2228 /* Before reload, if the previous block ended in a call, show that
2229 we are inside a post-call group, so as to keep the lifetimes of
2230 hard registers correct. */
2231 if (! reload_completed && !LABEL_P (head))
2232 {
2233 insn = prev_nonnote_insn (head);
2234 if (insn && CALL_P (insn))
2235 deps->in_post_call_group_p = post_call_initial;
2236 }
2237 for (insn = head;; insn = NEXT_INSN (insn))
2238 {
2239 rtx link, end_seq, r0, set;
2240
2241 if (INSN_P (insn))
2242 {
2243 /* And initialize deps_lists. */
2244 sd_init_insn (insn);
2245 }
2246
2247 if (NONJUMP_INSN_P (insn) || JUMP_P (insn))
2248 {
2249 /* Make each JUMP_INSN a scheduling barrier for memory
2250 references. */
2251 if (JUMP_P (insn))
2252 {
2253 /* Keep the list a reasonable size. */
2254 if (deps->pending_flush_length++ > MAX_PENDING_LIST_LENGTH)
2255 flush_pending_lists (deps, insn, true, true);
2256 else
2257 deps->last_pending_memory_flush
2258 = alloc_INSN_LIST (insn, deps->last_pending_memory_flush);
2259 }
2260 sched_analyze_insn (deps, PATTERN (insn), insn);
2261 }
2262 else if (CALL_P (insn))
2263 {
2264 int i;
2265
2266 CANT_MOVE (insn) = 1;
2267
2268 if (find_reg_note (insn, REG_SETJMP, NULL))
2269 {
2270 /* This is setjmp. Assume that all registers, not just
2271 hard registers, may be clobbered by this call. */
2272 reg_pending_barrier = MOVE_BARRIER;
2273 }
2274 else
2275 {
2276 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2277 /* A call may read and modify global register variables. */
2278 if (global_regs[i])
2279 {
2280 SET_REGNO_REG_SET (reg_pending_sets, i);
2281 SET_REGNO_REG_SET (reg_pending_uses, i);
2282 }
2283 /* Other call-clobbered hard regs may be clobbered.
2284 Since we only have a choice between 'might be clobbered'
2285 and 'definitely not clobbered', we must include all
2286 partly call-clobbered registers here. */
2287 else if (HARD_REGNO_CALL_PART_CLOBBERED (i, reg_raw_mode[i])
2288 || TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2289 SET_REGNO_REG_SET (reg_pending_clobbers, i);
2290 /* We don't know what set of fixed registers might be used
2291 by the function, but it is certain that the stack pointer
2292 is among them, but be conservative. */
2293 else if (fixed_regs[i])
2294 SET_REGNO_REG_SET (reg_pending_uses, i);
2295 /* The frame pointer is normally not used by the function
2296 itself, but by the debugger. */
2297 /* ??? MIPS o32 is an exception. It uses the frame pointer
2298 in the macro expansion of jal but does not represent this
2299 fact in the call_insn rtl. */
2300 else if (i == FRAME_POINTER_REGNUM
2301 || (i == HARD_FRAME_POINTER_REGNUM
2302 && (! reload_completed || frame_pointer_needed)))
2303 SET_REGNO_REG_SET (reg_pending_uses, i);
2304 }
2305
2306 /* For each insn which shouldn't cross a call, add a dependence
2307 between that insn and this call insn. */
2308 add_dependence_list_and_free (insn, &deps->sched_before_next_call, 1,
2309 REG_DEP_ANTI);
2310
2311 sched_analyze_insn (deps, PATTERN (insn), insn);
2312
2313 /* In the absence of interprocedural alias analysis, we must flush
2314 all pending reads and writes, and start new dependencies starting
2315 from here. But only flush writes for constant calls (which may
2316 be passed a pointer to something we haven't written yet). */
2317 flush_pending_lists (deps, insn, true, !CONST_OR_PURE_CALL_P (insn));
2318
2319 /* Remember the last function call for limiting lifetimes. */
2320 free_INSN_LIST_list (&deps->last_function_call);
2321 deps->last_function_call = alloc_INSN_LIST (insn, NULL_RTX);
2322
2323 /* Before reload, begin a post-call group, so as to keep the
2324 lifetimes of hard registers correct. */
2325 if (! reload_completed)
2326 deps->in_post_call_group_p = post_call;
2327 }
2328
2329 /* EH_REGION insn notes can not appear until well after we complete
2330 scheduling. */
2331 if (NOTE_P (insn))
2332 gcc_assert (NOTE_KIND (insn) != NOTE_INSN_EH_REGION_BEG
2333 && NOTE_KIND (insn) != NOTE_INSN_EH_REGION_END);
2334
2335 if (current_sched_info->use_cselib)
2336 cselib_process_insn (insn);
2337
2338 /* Now that we have completed handling INSN, check and see if it is
2339 a CLOBBER beginning a libcall block. If it is, record the
2340 end of the libcall sequence.
2341
2342 We want to schedule libcall blocks as a unit before reload. While
2343 this restricts scheduling, it preserves the meaning of a libcall
2344 block.
2345
2346 As a side effect, we may get better code due to decreased register
2347 pressure as well as less chance of a foreign insn appearing in
2348 a libcall block. */
2349 if (!reload_completed
2350 /* Note we may have nested libcall sequences. We only care about
2351 the outermost libcall sequence. */
2352 && deps->libcall_block_tail_insn == 0
2353 /* The sequence must start with a clobber of a register. */
2354 && NONJUMP_INSN_P (insn)
2355 && GET_CODE (PATTERN (insn)) == CLOBBER
2356 && (r0 = XEXP (PATTERN (insn), 0), REG_P (r0))
2357 && REG_P (XEXP (PATTERN (insn), 0))
2358 /* The CLOBBER must also have a REG_LIBCALL note attached. */
2359 && (link = find_reg_note (insn, REG_LIBCALL, NULL_RTX)) != 0
2360 && (end_seq = XEXP (link, 0)) != 0
2361 /* The insn referenced by the REG_LIBCALL note must be a
2362 simple nop copy with the same destination as the register
2363 mentioned in the clobber. */
2364 && (set = single_set (end_seq)) != 0
2365 && SET_DEST (set) == r0 && SET_SRC (set) == r0
2366 /* And finally the insn referenced by the REG_LIBCALL must
2367 also contain a REG_EQUAL note and a REG_RETVAL note. */
2368 && find_reg_note (end_seq, REG_EQUAL, NULL_RTX) != 0
2369 && find_reg_note (end_seq, REG_RETVAL, NULL_RTX) != 0)
2370 deps->libcall_block_tail_insn = XEXP (link, 0);
2371
2372 /* If we have reached the end of a libcall block, then close the
2373 block. */
2374 if (deps->libcall_block_tail_insn == insn)
2375 deps->libcall_block_tail_insn = 0;
2376
2377 if (insn == tail)
2378 {
2379 if (current_sched_info->use_cselib)
2380 cselib_finish ();
2381 return;
2382 }
2383 }
2384 gcc_unreachable ();
2385 }
2386
2387 /* Helper for sched_free_deps ().
2388 Delete INSN's (RESOLVED_P) backward dependencies. */
2389 static void
2390 delete_dep_nodes_in_back_deps (rtx insn, bool resolved_p)
2391 {
2392 sd_iterator_def sd_it;
2393 dep_t dep;
2394 sd_list_types_def types;
2395
2396 if (resolved_p)
2397 types = SD_LIST_RES_BACK;
2398 else
2399 types = SD_LIST_BACK;
2400
2401 for (sd_it = sd_iterator_start (insn, types);
2402 sd_iterator_cond (&sd_it, &dep);)
2403 {
2404 dep_link_t link = *sd_it.linkp;
2405 dep_node_t node = DEP_LINK_NODE (link);
2406 deps_list_t back_list;
2407 deps_list_t forw_list;
2408
2409 get_back_and_forw_lists (dep, resolved_p, &back_list, &forw_list);
2410 remove_from_deps_list (link, back_list);
2411 delete_dep_node (node);
2412 }
2413 }
2414
2415 /* Delete (RESOLVED_P) dependencies between HEAD and TAIL together with
2416 deps_lists. */
2417 void
2418 sched_free_deps (rtx head, rtx tail, bool resolved_p)
2419 {
2420 rtx insn;
2421 rtx next_tail = NEXT_INSN (tail);
2422
2423 for (insn = head; insn != next_tail; insn = NEXT_INSN (insn))
2424 if (INSN_P (insn) && INSN_LUID (insn) > 0)
2425 {
2426 /* Clear resolved back deps together with its dep_nodes. */
2427 delete_dep_nodes_in_back_deps (insn, resolved_p);
2428
2429 /* Clear forward deps and leave the dep_nodes to the
2430 corresponding back_deps list. */
2431 if (resolved_p)
2432 clear_deps_list (INSN_RESOLVED_FORW_DEPS (insn));
2433 else
2434 clear_deps_list (INSN_FORW_DEPS (insn));
2435
2436 sd_finish_insn (insn);
2437 }
2438 }
2439 \f
2440 /* Initialize variables for region data dependence analysis.
2441 n_bbs is the number of region blocks. */
2442
2443 void
2444 init_deps (struct deps *deps)
2445 {
2446 int max_reg = (reload_completed ? FIRST_PSEUDO_REGISTER : max_reg_num ());
2447
2448 deps->max_reg = max_reg;
2449 deps->reg_last = XCNEWVEC (struct deps_reg, max_reg);
2450 INIT_REG_SET (&deps->reg_last_in_use);
2451 INIT_REG_SET (&deps->reg_conditional_sets);
2452
2453 deps->pending_read_insns = 0;
2454 deps->pending_read_mems = 0;
2455 deps->pending_write_insns = 0;
2456 deps->pending_write_mems = 0;
2457 deps->pending_read_list_length = 0;
2458 deps->pending_write_list_length = 0;
2459 deps->pending_flush_length = 0;
2460 deps->last_pending_memory_flush = 0;
2461 deps->last_function_call = 0;
2462 deps->sched_before_next_call = 0;
2463 deps->in_post_call_group_p = not_post_call;
2464 deps->libcall_block_tail_insn = 0;
2465 }
2466
2467 /* Free insn lists found in DEPS. */
2468
2469 void
2470 free_deps (struct deps *deps)
2471 {
2472 unsigned i;
2473 reg_set_iterator rsi;
2474
2475 free_INSN_LIST_list (&deps->pending_read_insns);
2476 free_EXPR_LIST_list (&deps->pending_read_mems);
2477 free_INSN_LIST_list (&deps->pending_write_insns);
2478 free_EXPR_LIST_list (&deps->pending_write_mems);
2479 free_INSN_LIST_list (&deps->last_pending_memory_flush);
2480
2481 /* Without the EXECUTE_IF_SET, this loop is executed max_reg * nr_regions
2482 times. For a testcase with 42000 regs and 8000 small basic blocks,
2483 this loop accounted for nearly 60% (84 sec) of the total -O2 runtime. */
2484 EXECUTE_IF_SET_IN_REG_SET (&deps->reg_last_in_use, 0, i, rsi)
2485 {
2486 struct deps_reg *reg_last = &deps->reg_last[i];
2487 if (reg_last->uses)
2488 free_INSN_LIST_list (&reg_last->uses);
2489 if (reg_last->sets)
2490 free_INSN_LIST_list (&reg_last->sets);
2491 if (reg_last->clobbers)
2492 free_INSN_LIST_list (&reg_last->clobbers);
2493 }
2494 CLEAR_REG_SET (&deps->reg_last_in_use);
2495 CLEAR_REG_SET (&deps->reg_conditional_sets);
2496
2497 free (deps->reg_last);
2498 }
2499
2500 /* If it is profitable to use them, initialize caches for tracking
2501 dependency information. LUID is the number of insns to be scheduled,
2502 it is used in the estimate of profitability. */
2503
2504 void
2505 init_dependency_caches (int luid)
2506 {
2507 /* Average number of insns in the basic block.
2508 '+ 1' is used to make it nonzero. */
2509 int insns_in_block = luid / n_basic_blocks + 1;
2510
2511 /* ?!? We could save some memory by computing a per-region luid mapping
2512 which could reduce both the number of vectors in the cache and the size
2513 of each vector. Instead we just avoid the cache entirely unless the
2514 average number of instructions in a basic block is very high. See
2515 the comment before the declaration of true_dependency_cache for
2516 what we consider "very high". */
2517 if (insns_in_block > 100 * 5)
2518 {
2519 cache_size = 0;
2520 extend_dependency_caches (luid, true);
2521 }
2522
2523 dl_pool = create_alloc_pool ("deps_list", sizeof (struct _deps_list),
2524 /* Allocate lists for one block at a time. */
2525 insns_in_block);
2526
2527 dn_pool = create_alloc_pool ("dep_node", sizeof (struct _dep_node),
2528 /* Allocate nodes for one block at a time.
2529 We assume that average insn has
2530 5 producers. */
2531 5 * insns_in_block);
2532 }
2533
2534 /* Create or extend (depending on CREATE_P) dependency caches to
2535 size N. */
2536 void
2537 extend_dependency_caches (int n, bool create_p)
2538 {
2539 if (create_p || true_dependency_cache)
2540 {
2541 int i, luid = cache_size + n;
2542
2543 true_dependency_cache = XRESIZEVEC (bitmap_head, true_dependency_cache,
2544 luid);
2545 output_dependency_cache = XRESIZEVEC (bitmap_head,
2546 output_dependency_cache, luid);
2547 anti_dependency_cache = XRESIZEVEC (bitmap_head, anti_dependency_cache,
2548 luid);
2549
2550 if (current_sched_info->flags & DO_SPECULATION)
2551 spec_dependency_cache = XRESIZEVEC (bitmap_head, spec_dependency_cache,
2552 luid);
2553
2554 for (i = cache_size; i < luid; i++)
2555 {
2556 bitmap_initialize (&true_dependency_cache[i], 0);
2557 bitmap_initialize (&output_dependency_cache[i], 0);
2558 bitmap_initialize (&anti_dependency_cache[i], 0);
2559
2560 if (current_sched_info->flags & DO_SPECULATION)
2561 bitmap_initialize (&spec_dependency_cache[i], 0);
2562 }
2563 cache_size = luid;
2564 }
2565 }
2566
2567 /* Free the caches allocated in init_dependency_caches. */
2568
2569 void
2570 free_dependency_caches (void)
2571 {
2572 gcc_assert (deps_pools_are_empty_p ());
2573 free_alloc_pool_if_empty (&dn_pool);
2574 free_alloc_pool_if_empty (&dl_pool);
2575 gcc_assert (dn_pool == NULL && dl_pool == NULL);
2576
2577 if (true_dependency_cache)
2578 {
2579 int i;
2580
2581 for (i = 0; i < cache_size; i++)
2582 {
2583 bitmap_clear (&true_dependency_cache[i]);
2584 bitmap_clear (&output_dependency_cache[i]);
2585 bitmap_clear (&anti_dependency_cache[i]);
2586
2587 if (current_sched_info->flags & DO_SPECULATION)
2588 bitmap_clear (&spec_dependency_cache[i]);
2589 }
2590 free (true_dependency_cache);
2591 true_dependency_cache = NULL;
2592 free (output_dependency_cache);
2593 output_dependency_cache = NULL;
2594 free (anti_dependency_cache);
2595 anti_dependency_cache = NULL;
2596
2597 if (current_sched_info->flags & DO_SPECULATION)
2598 {
2599 free (spec_dependency_cache);
2600 spec_dependency_cache = NULL;
2601 }
2602 }
2603 }
2604
2605 /* Initialize some global variables needed by the dependency analysis
2606 code. */
2607
2608 void
2609 init_deps_global (void)
2610 {
2611 reg_pending_sets = ALLOC_REG_SET (&reg_obstack);
2612 reg_pending_clobbers = ALLOC_REG_SET (&reg_obstack);
2613 reg_pending_uses = ALLOC_REG_SET (&reg_obstack);
2614 reg_pending_barrier = NOT_A_BARRIER;
2615 }
2616
2617 /* Free everything used by the dependency analysis code. */
2618
2619 void
2620 finish_deps_global (void)
2621 {
2622 FREE_REG_SET (reg_pending_sets);
2623 FREE_REG_SET (reg_pending_clobbers);
2624 FREE_REG_SET (reg_pending_uses);
2625 }
2626
2627 /* Estimate the weakness of dependence between MEM1 and MEM2. */
2628 static dw_t
2629 estimate_dep_weak (rtx mem1, rtx mem2)
2630 {
2631 rtx r1, r2;
2632
2633 if (mem1 == mem2)
2634 /* MEMs are the same - don't speculate. */
2635 return MIN_DEP_WEAK;
2636
2637 r1 = XEXP (mem1, 0);
2638 r2 = XEXP (mem2, 0);
2639
2640 if (r1 == r2
2641 || (REG_P (r1) && REG_P (r2)
2642 && REGNO (r1) == REGNO (r2)))
2643 /* Again, MEMs are the same. */
2644 return MIN_DEP_WEAK;
2645 else if ((REG_P (r1) && !REG_P (r2))
2646 || (!REG_P (r1) && REG_P (r2)))
2647 /* Different addressing modes - reason to be more speculative,
2648 than usual. */
2649 return NO_DEP_WEAK - (NO_DEP_WEAK - UNCERTAIN_DEP_WEAK) / 2;
2650 else
2651 /* We can't say anything about the dependence. */
2652 return UNCERTAIN_DEP_WEAK;
2653 }
2654
2655 /* Add or update backward dependence between INSN and ELEM with type DEP_TYPE.
2656 This function can handle same INSN and ELEM (INSN == ELEM).
2657 It is a convenience wrapper. */
2658 void
2659 add_dependence (rtx insn, rtx elem, enum reg_note dep_type)
2660 {
2661 dep_def _dep, *dep = &_dep;
2662
2663 init_dep (dep, elem, insn, dep_type);
2664 maybe_add_or_update_dep_1 (dep, false, NULL_RTX, NULL_RTX);
2665 }
2666
2667 /* Return weakness of speculative type TYPE in the dep_status DS. */
2668 static dw_t
2669 get_dep_weak_1 (ds_t ds, ds_t type)
2670 {
2671 ds = ds & type;
2672 switch (type)
2673 {
2674 case BEGIN_DATA: ds >>= BEGIN_DATA_BITS_OFFSET; break;
2675 case BE_IN_DATA: ds >>= BE_IN_DATA_BITS_OFFSET; break;
2676 case BEGIN_CONTROL: ds >>= BEGIN_CONTROL_BITS_OFFSET; break;
2677 case BE_IN_CONTROL: ds >>= BE_IN_CONTROL_BITS_OFFSET; break;
2678 default: gcc_unreachable ();
2679 }
2680
2681 return (dw_t) ds;
2682 }
2683
2684 /* Return weakness of speculative type TYPE in the dep_status DS. */
2685 dw_t
2686 get_dep_weak (ds_t ds, ds_t type)
2687 {
2688 dw_t dw = get_dep_weak_1 (ds, type);
2689
2690 gcc_assert (MIN_DEP_WEAK <= dw && dw <= MAX_DEP_WEAK);
2691
2692 return dw;
2693 }
2694
2695 /* Return the dep_status, which has the same parameters as DS, except for
2696 speculative type TYPE, that will have weakness DW. */
2697 ds_t
2698 set_dep_weak (ds_t ds, ds_t type, dw_t dw)
2699 {
2700 gcc_assert (MIN_DEP_WEAK <= dw && dw <= MAX_DEP_WEAK);
2701
2702 ds &= ~type;
2703 switch (type)
2704 {
2705 case BEGIN_DATA: ds |= ((ds_t) dw) << BEGIN_DATA_BITS_OFFSET; break;
2706 case BE_IN_DATA: ds |= ((ds_t) dw) << BE_IN_DATA_BITS_OFFSET; break;
2707 case BEGIN_CONTROL: ds |= ((ds_t) dw) << BEGIN_CONTROL_BITS_OFFSET; break;
2708 case BE_IN_CONTROL: ds |= ((ds_t) dw) << BE_IN_CONTROL_BITS_OFFSET; break;
2709 default: gcc_unreachable ();
2710 }
2711 return ds;
2712 }
2713
2714 /* Return the join of two dep_statuses DS1 and DS2. */
2715 ds_t
2716 ds_merge (ds_t ds1, ds_t ds2)
2717 {
2718 ds_t ds, t;
2719
2720 gcc_assert ((ds1 & SPECULATIVE) && (ds2 & SPECULATIVE));
2721
2722 ds = (ds1 & DEP_TYPES) | (ds2 & DEP_TYPES);
2723
2724 t = FIRST_SPEC_TYPE;
2725 do
2726 {
2727 if ((ds1 & t) && !(ds2 & t))
2728 ds |= ds1 & t;
2729 else if (!(ds1 & t) && (ds2 & t))
2730 ds |= ds2 & t;
2731 else if ((ds1 & t) && (ds2 & t))
2732 {
2733 ds_t dw;
2734
2735 dw = ((ds_t) get_dep_weak (ds1, t)) * ((ds_t) get_dep_weak (ds2, t));
2736 dw /= MAX_DEP_WEAK;
2737 if (dw < MIN_DEP_WEAK)
2738 dw = MIN_DEP_WEAK;
2739
2740 ds = set_dep_weak (ds, t, (dw_t) dw);
2741 }
2742
2743 if (t == LAST_SPEC_TYPE)
2744 break;
2745 t <<= SPEC_TYPE_SHIFT;
2746 }
2747 while (1);
2748
2749 return ds;
2750 }
2751
2752 /* Dump information about the dependence status S. */
2753 static void
2754 dump_ds (FILE *f, ds_t s)
2755 {
2756 fprintf (f, "{");
2757
2758 if (s & BEGIN_DATA)
2759 fprintf (f, "BEGIN_DATA: %d; ", get_dep_weak_1 (s, BEGIN_DATA));
2760 if (s & BE_IN_DATA)
2761 fprintf (f, "BE_IN_DATA: %d; ", get_dep_weak_1 (s, BE_IN_DATA));
2762 if (s & BEGIN_CONTROL)
2763 fprintf (f, "BEGIN_CONTROL: %d; ", get_dep_weak_1 (s, BEGIN_CONTROL));
2764 if (s & BE_IN_CONTROL)
2765 fprintf (f, "BE_IN_CONTROL: %d; ", get_dep_weak_1 (s, BE_IN_CONTROL));
2766
2767 if (s & HARD_DEP)
2768 fprintf (f, "HARD_DEP; ");
2769
2770 if (s & DEP_TRUE)
2771 fprintf (f, "DEP_TRUE; ");
2772 if (s & DEP_ANTI)
2773 fprintf (f, "DEP_ANTI; ");
2774 if (s & DEP_OUTPUT)
2775 fprintf (f, "DEP_OUTPUT; ");
2776
2777 fprintf (f, "}");
2778 }
2779
2780 void
2781 debug_ds (ds_t s)
2782 {
2783 dump_ds (stderr, s);
2784 fprintf (stderr, "\n");
2785 }
2786
2787 #ifdef INSN_SCHEDULING
2788 #ifdef ENABLE_CHECKING
2789 /* Verify that dependence type and status are consistent.
2790 If RELAXED_P is true, then skip dep_weakness checks. */
2791 static void
2792 check_dep (dep_t dep, bool relaxed_p)
2793 {
2794 enum reg_note dt = DEP_TYPE (dep);
2795 ds_t ds = DEP_STATUS (dep);
2796
2797 gcc_assert (DEP_PRO (dep) != DEP_CON (dep));
2798
2799 if (!(current_sched_info->flags & USE_DEPS_LIST))
2800 {
2801 gcc_assert (ds == -1);
2802 return;
2803 }
2804
2805 /* Check that dependence type contains the same bits as the status. */
2806 if (dt == REG_DEP_TRUE)
2807 gcc_assert (ds & DEP_TRUE);
2808 else if (dt == REG_DEP_OUTPUT)
2809 gcc_assert ((ds & DEP_OUTPUT)
2810 && !(ds & DEP_TRUE));
2811 else
2812 gcc_assert ((dt == REG_DEP_ANTI)
2813 && (ds & DEP_ANTI)
2814 && !(ds & (DEP_OUTPUT | DEP_TRUE)));
2815
2816 /* HARD_DEP can not appear in dep_status of a link. */
2817 gcc_assert (!(ds & HARD_DEP));
2818
2819 /* Check that dependence status is set correctly when speculation is not
2820 supported. */
2821 if (!(current_sched_info->flags & DO_SPECULATION))
2822 gcc_assert (!(ds & SPECULATIVE));
2823 else if (ds & SPECULATIVE)
2824 {
2825 if (!relaxed_p)
2826 {
2827 ds_t type = FIRST_SPEC_TYPE;
2828
2829 /* Check that dependence weakness is in proper range. */
2830 do
2831 {
2832 if (ds & type)
2833 get_dep_weak (ds, type);
2834
2835 if (type == LAST_SPEC_TYPE)
2836 break;
2837 type <<= SPEC_TYPE_SHIFT;
2838 }
2839 while (1);
2840 }
2841
2842 if (ds & BEGIN_SPEC)
2843 {
2844 /* Only true dependence can be data speculative. */
2845 if (ds & BEGIN_DATA)
2846 gcc_assert (ds & DEP_TRUE);
2847
2848 /* Control dependencies in the insn scheduler are represented by
2849 anti-dependencies, therefore only anti dependence can be
2850 control speculative. */
2851 if (ds & BEGIN_CONTROL)
2852 gcc_assert (ds & DEP_ANTI);
2853 }
2854 else
2855 {
2856 /* Subsequent speculations should resolve true dependencies. */
2857 gcc_assert ((ds & DEP_TYPES) == DEP_TRUE);
2858 }
2859
2860 /* Check that true and anti dependencies can't have other speculative
2861 statuses. */
2862 if (ds & DEP_TRUE)
2863 gcc_assert (ds & (BEGIN_DATA | BE_IN_SPEC));
2864 /* An output dependence can't be speculative at all. */
2865 gcc_assert (!(ds & DEP_OUTPUT));
2866 if (ds & DEP_ANTI)
2867 gcc_assert (ds & BEGIN_CONTROL);
2868 }
2869 }
2870 #endif
2871 #endif