1 /* Instruction scheduling pass. This file contains definitions used
2 internally in the scheduler.
3 Copyright (C) 1992-2019 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
21 #ifndef GCC_SCHED_INT_H
22 #define GCC_SCHED_INT_H
24 #ifdef INSN_SCHEDULING
26 /* Identificator of a scheduler pass. */
27 enum sched_pass_id_t
{ SCHED_PASS_UNKNOWN
, SCHED_RGN_PASS
, SCHED_EBB_PASS
,
28 SCHED_SMS_PASS
, SCHED_SEL_PASS
};
30 /* The algorithm used to implement -fsched-pressure. */
31 enum sched_pressure_algorithm
34 SCHED_PRESSURE_WEIGHTED
,
38 typedef vec
<basic_block
> bb_vec_t
;
39 typedef vec
<rtx_insn
*> insn_vec_t
;
40 typedef vec
<rtx_insn
*> rtx_vec_t
;
42 extern void sched_init_bbs (void);
44 extern void sched_extend_luids (void);
45 extern void sched_init_insn_luid (rtx_insn
*);
46 extern void sched_init_luids (bb_vec_t
);
47 extern void sched_finish_luids (void);
49 extern void sched_extend_target (void);
51 extern void haifa_init_h_i_d (bb_vec_t
);
52 extern void haifa_finish_h_i_d (void);
54 /* Hooks that are common to all the schedulers. */
55 struct common_sched_info_def
57 /* Called after blocks were rearranged due to movement of jump instruction.
58 The first parameter - index of basic block, in which jump currently is.
59 The second parameter - index of basic block, in which jump used
61 The third parameter - index of basic block, that follows the second
63 void (*fix_recovery_cfg
) (int, int, int);
65 /* Called to notify frontend, that new basic block is being added.
66 The first parameter - new basic block.
67 The second parameter - block, after which new basic block is being added,
68 or the exit block, if recovery block is being added,
69 or NULL, if standalone block is being added. */
70 void (*add_block
) (basic_block
, basic_block
);
72 /* Estimate number of insns in the basic block. */
73 int (*estimate_number_of_insns
) (basic_block
);
75 /* Given a non-insn (!INSN_P (x)) return
76 -1 - if this rtx don't need a luid.
77 0 - if it should have the same luid as the previous insn.
78 1 - if it needs a separate luid. */
79 int (*luid_for_non_insn
) (rtx
);
81 /* Scheduler pass identifier. It is preferably used in assertions. */
82 enum sched_pass_id_t sched_pass_id
;
85 extern struct common_sched_info_def
*common_sched_info
;
87 extern const struct common_sched_info_def haifa_common_sched_info
;
89 /* Return true if selective scheduling pass is working. */
93 return common_sched_info
->sched_pass_id
== SCHED_SEL_PASS
;
96 /* Returns maximum priority that an insn was assigned to. */
97 extern int get_rgn_sched_max_insns_priority (void);
99 /* Increases effective priority for INSN by AMOUNT. */
100 extern void sel_add_to_insn_priority (rtx
, int);
102 /* True if during selective scheduling we need to emulate some of haifa
103 scheduler behavior. */
104 extern int sched_emulate_haifa_p
;
106 /* Mapping from INSN_UID to INSN_LUID. In the end all other per insn data
107 structures should be indexed by luid. */
108 extern vec
<int> sched_luids
;
109 #define INSN_LUID(INSN) (sched_luids[INSN_UID (INSN)])
110 #define LUID_BY_UID(UID) (sched_luids[UID])
112 #define SET_INSN_LUID(INSN, LUID) \
113 (sched_luids[INSN_UID (INSN)] = (LUID))
115 /* The highest INSN_LUID. */
116 extern int sched_max_luid
;
118 extern int insn_luid (rtx
);
120 /* This list holds ripped off notes from the current block. These notes will
121 be attached to the beginning of the block when its scheduling is
123 extern rtx_insn
*note_list
;
125 extern void remove_notes (rtx_insn
*, rtx_insn
*);
126 extern rtx_insn
*restore_other_notes (rtx_insn
*, basic_block
);
127 extern void sched_insns_init (rtx
);
128 extern void sched_insns_finish (void);
130 extern void *xrecalloc (void *, size_t, size_t, size_t);
132 extern void reemit_notes (rtx_insn
*);
134 /* Functions in haifa-sched.c. */
135 extern int haifa_classify_insn (const_rtx
);
137 /* Functions in sel-sched-ir.c. */
138 extern void sel_find_rgns (void);
139 extern void sel_mark_hard_insn (rtx
);
141 extern size_t dfa_state_size
;
143 extern void advance_state (state_t
);
145 extern void setup_sched_dump (void);
146 extern void sched_init (void);
147 extern void sched_finish (void);
149 extern bool sel_insn_is_speculation_check (rtx
);
151 /* Describe the ready list of the scheduler.
152 VEC holds space enough for all insns in the current region. VECLEN
153 says how many exactly.
154 FIRST is the index of the element with the highest priority; i.e. the
155 last one in the ready list, since elements are ordered by ascending
157 N_READY determines how many insns are on the ready list.
158 N_DEBUG determines how many debug insns are on the ready list. */
168 extern signed char *ready_try
;
169 extern struct ready_list ready
;
171 extern int max_issue (struct ready_list
*, int, state_t
, bool, int *);
173 extern void ebb_compute_jump_reg_dependencies (rtx
, regset
);
175 extern edge
find_fallthru_edge_from (basic_block
);
177 extern void (* sched_init_only_bb
) (basic_block
, basic_block
);
178 extern basic_block (* sched_split_block
) (basic_block
, rtx
);
179 extern basic_block
sched_split_block_1 (basic_block
, rtx
);
180 extern basic_block (* sched_create_empty_bb
) (basic_block
);
181 extern basic_block
sched_create_empty_bb_1 (basic_block
);
183 extern basic_block
sched_create_recovery_block (basic_block
*);
184 extern void sched_create_recovery_edges (basic_block
, basic_block
,
187 /* Pointer to data describing the current DFA state. */
188 extern state_t curr_state
;
190 /* Type to represent status of a dependence. */
191 typedef unsigned int ds_t
;
192 #define BITS_PER_DEP_STATUS HOST_BITS_PER_INT
194 /* Type to represent weakness of speculative dependence. */
195 typedef unsigned int dw_t
;
197 extern enum reg_note
ds_to_dk (ds_t
);
198 extern ds_t
dk_to_ds (enum reg_note
);
200 /* Describe a dependency that can be broken by making a replacement
201 in one of the patterns. LOC is the location, ORIG and NEWVAL the
202 two alternative contents, and INSN the instruction that must be
204 struct dep_replacement
212 /* Information about the dependency. */
221 /* If nonnull, holds a pointer to information about how to break the
222 dependency by making a replacement in one of the insns. There is
223 only one such dependency for each insn that must be modified in
224 order to break such a dependency. */
225 struct dep_replacement
*replace
;
227 /* Dependency status. This field holds all dependency types and additional
228 information for speculative dependencies. */
231 /* Dependency major type. This field is superseded by STATUS above.
232 Though, it is still in place because some targets use it. */
233 ENUM_BITFIELD(reg_note
) type
:6;
238 /* Cached cost of the dependency. Make sure to update UNKNOWN_DEP_COST
239 when changing the size of this field. */
243 #define UNKNOWN_DEP_COST ((int) ((unsigned int) -1 << 19))
245 typedef struct _dep dep_def
;
246 typedef dep_def
*dep_t
;
248 #define DEP_PRO(D) ((D)->pro)
249 #define DEP_CON(D) ((D)->con)
250 #define DEP_TYPE(D) ((D)->type)
251 #define DEP_STATUS(D) ((D)->status)
252 #define DEP_COST(D) ((D)->cost)
253 #define DEP_NONREG(D) ((D)->nonreg)
254 #define DEP_MULTIPLE(D) ((D)->multiple)
255 #define DEP_REPLACE(D) ((D)->replace)
257 /* Functions to work with dep. */
259 extern void init_dep_1 (dep_t
, rtx_insn
*, rtx_insn
*, enum reg_note
, ds_t
);
260 extern void init_dep (dep_t
, rtx_insn
*, rtx_insn
*, enum reg_note
);
262 extern void sd_debug_dep (dep_t
);
264 /* Definition of this struct resides below. */
266 typedef struct _dep_node
*dep_node_t
;
268 /* A link in the dependency list. This is essentially an equivalent of a
269 single {INSN, DEPS}_LIST rtx. */
272 /* Dep node with all the data. */
275 /* Next link in the list. For the last one it is NULL. */
276 struct _dep_link
*next
;
278 /* Pointer to the next field of the previous link in the list.
279 For the first link this points to the deps_list->first.
281 With help of this field it is easy to remove and insert links to the
283 struct _dep_link
**prev_nextp
;
285 typedef struct _dep_link
*dep_link_t
;
287 #define DEP_LINK_NODE(N) ((N)->node)
288 #define DEP_LINK_NEXT(N) ((N)->next)
289 #define DEP_LINK_PREV_NEXTP(N) ((N)->prev_nextp)
291 /* Macros to work dep_link. For most usecases only part of the dependency
292 information is need. These macros conveniently provide that piece of
295 #define DEP_LINK_DEP(N) (DEP_NODE_DEP (DEP_LINK_NODE (N)))
296 #define DEP_LINK_PRO(N) (DEP_PRO (DEP_LINK_DEP (N)))
297 #define DEP_LINK_CON(N) (DEP_CON (DEP_LINK_DEP (N)))
298 #define DEP_LINK_TYPE(N) (DEP_TYPE (DEP_LINK_DEP (N)))
299 #define DEP_LINK_STATUS(N) (DEP_STATUS (DEP_LINK_DEP (N)))
301 /* A list of dep_links. */
307 /* Total number of elements in the list. */
310 typedef struct _deps_list
*deps_list_t
;
312 #define DEPS_LIST_FIRST(L) ((L)->first)
313 #define DEPS_LIST_N_LINKS(L) ((L)->n_links)
315 /* Suppose we have a dependence Y between insn pro1 and con1, where pro1 has
316 additional dependents con0 and con2, and con1 is dependent on additional
337 This is represented using a "dep_node" for each dependence arc, which are
338 connected as follows (diagram is centered around Y which is fully shown;
339 other dep_nodes shown partially):
341 . +------------+ +--------------+ +------------+
342 . : dep_node X : | dep_node Y | : dep_node Z :
345 . : forw : | forw | : forw :
346 . : +--------+ : | +--------+ | : +--------+ :
347 forw_deps : |dep_link| : | |dep_link| | : |dep_link| :
348 +-----+ : | +----+ | : | | +----+ | | : | +----+ | :
349 |first|----->| |next|-+------+->| |next|-+--+----->| |next|-+--->NULL
350 +-----+ : | +----+ | : | | +----+ | | : | +----+ | :
351 . ^ ^ : | ^ | : | | ^ | | : | | :
352 . | | : | | | : | | | | | : | | :
353 . | +--<----+--+ +--+---<--+--+--+ +--+--+--<---+--+ | :
354 . | : | | | : | | | | | : | | | :
355 . | : | +----+ | : | | +----+ | | : | +----+ | :
356 . | : | |prev| | : | | |prev| | | : | |prev| | :
357 . | : | |next| | : | | |next| | | : | |next| | :
358 . | : | +----+ | : | | +----+ | | : | +----+ | :
359 . | : | | :<-+ | | | |<-+ : | | :<-+
360 . | : | +----+ | : | | | +----+ | | | : | +----+ | : |
361 . | : | |node|-+----+ | | |node|-+--+--+ : | |node|-+----+
362 . | : | +----+ | : | | +----+ | | : | +----+ | :
363 . | : | | : | | | | : | | :
364 . | : +--------+ : | +--------+ | : +--------+ :
366 . | : SAME pro1 : | +--------+ | : SAME pro1 :
367 . | : DIFF con0 : | |dep | | : DIFF con2 :
370 .RTX<------------------------+--+-|pro1| | |
374 .RTX<------------------------+--+-|con1| | |
380 . | : : | | |stat| | | : :
381 . | : DIFF pro0 : | | +----+ | | : DIFF pro2 :
382 . | : SAME con1 : | | | | : SAME con1 :
383 . | : : | +--------+ | : :
385 . | : back : | back | : back :
386 . v : +--------+ : | +--------+ | : +--------+ :
387 back_deps : |dep_link| : | |dep_link| | : |dep_link| :
388 +-----+ : | +----+ | : | | +----+ | | : | +----+ | :
389 |first|----->| |next|-+------+->| |next|-+--+----->| |next|-+--->NULL
390 +-----+ : | +----+ | : | | +----+ | | : | +----+ | :
391 . ^ : | ^ | : | | ^ | | : | | :
392 . | : | | | : | | | | | : | | :
393 . +--<----+--+ +--+---<--+--+--+ +--+--+--<---+--+ | :
394 . : | | | : | | | | | : | | | :
395 . : | +----+ | : | | +----+ | | : | +----+ | :
396 . : | |prev| | : | | |prev| | | : | |prev| | :
397 . : | |next| | : | | |next| | | : | |next| | :
398 . : | +----+ | : | | +----+ | | : | +----+ | :
399 . : | | :<-+ | | | |<-+ : | | :<-+
400 . : | +----+ | : | | | +----+ | | | : | +----+ | : |
401 . : | |node|-+----+ | | |node|-+--+--+ : | |node|-+----+
402 . : | +----+ | : | | +----+ | | : | +----+ | :
403 . : | | : | | | | : | | :
404 . : +--------+ : | +--------+ | : +--------+ :
406 . : dep_node A : | dep_node Y | : dep_node B :
407 . +------------+ +--------------+ +------------+
413 struct _dep_link back
;
419 struct _dep_link forw
;
422 #define DEP_NODE_BACK(N) (&(N)->back)
423 #define DEP_NODE_DEP(N) (&(N)->dep)
424 #define DEP_NODE_FORW(N) (&(N)->forw)
426 /* The following enumeration values tell us what dependencies we
427 should use to implement the barrier. We use true-dependencies for
428 TRUE_BARRIER and anti-dependencies for MOVE_BARRIER. */
429 enum reg_pending_barrier_mode
436 /* Whether a register movement is associated with a call. */
444 /* Insns which affect pseudo-registers. */
449 rtx_insn_list
*implicit_sets
;
450 rtx_insn_list
*control_uses
;
451 rtx_insn_list
*clobbers
;
456 /* Describe state of dependencies used during sched_analyze phase. */
460 /* The *_insns and *_mems are paired lists. Each pending memory operation
461 will have a pointer to the MEM rtx on one list and a pointer to the
462 containing insn on the other list in the same place in the list. */
464 /* We can't use add_dependence like the old code did, because a single insn
465 may have multiple memory accesses, and hence needs to be on the list
466 once for each memory access. Add_dependence won't let you add an insn
467 to a list more than once. */
469 /* An INSN_LIST containing all insns with pending read operations. */
470 rtx_insn_list
*pending_read_insns
;
472 /* An EXPR_LIST containing all MEM rtx's which are pending reads. */
473 rtx_expr_list
*pending_read_mems
;
475 /* An INSN_LIST containing all insns with pending write operations. */
476 rtx_insn_list
*pending_write_insns
;
478 /* An EXPR_LIST containing all MEM rtx's which are pending writes. */
479 rtx_expr_list
*pending_write_mems
;
481 /* An INSN_LIST containing all jump insns. */
482 rtx_insn_list
*pending_jump_insns
;
484 /* We must prevent the above lists from ever growing too large since
485 the number of dependencies produced is at least O(N*N),
486 and execution time is at least O(4*N*N), as a function of the
487 length of these pending lists. */
489 /* Indicates the length of the pending_read list. */
490 int pending_read_list_length
;
492 /* Indicates the length of the pending_write list. */
493 int pending_write_list_length
;
495 /* Length of the pending memory flush list plus the length of the pending
496 jump insn list. Large functions with no calls may build up extremely
498 int pending_flush_length
;
500 /* The last insn upon which all memory references must depend.
501 This is an insn which flushed the pending lists, creating a dependency
502 between it and all previously pending memory references. This creates
503 a barrier (or a checkpoint) which no memory reference is allowed to cross.
505 This includes all non constant CALL_INSNs. When we do interprocedural
506 alias analysis, this restriction can be relaxed.
507 This may also be an INSN that writes memory if the pending lists grow
509 rtx_insn_list
*last_pending_memory_flush
;
511 /* A list of the last function calls we have seen. We use a list to
512 represent last function calls from multiple predecessor blocks.
513 Used to prevent register lifetimes from expanding unnecessarily. */
514 rtx_insn_list
*last_function_call
;
516 /* A list of the last function calls that may not return normally
517 we have seen. We use a list to represent last function calls from
518 multiple predecessor blocks. Used to prevent moving trapping insns
519 across such calls. */
520 rtx_insn_list
*last_function_call_may_noreturn
;
522 /* A list of insns which use a pseudo register that does not already
523 cross a call. We create dependencies between each of those insn
524 and the next call insn, to ensure that they won't cross a call after
525 scheduling is done. */
526 rtx_insn_list
*sched_before_next_call
;
528 /* Similarly, a list of insns which should not cross a branch. */
529 rtx_insn_list
*sched_before_next_jump
;
531 /* Used to keep post-call pseudo/hard reg movements together with
533 enum post_call_group in_post_call_group_p
;
535 /* The last debug insn we've seen. */
536 rtx_insn
*last_debug_insn
;
538 /* The last insn bearing REG_ARGS_SIZE that we've seen. */
539 rtx_insn
*last_args_size
;
541 /* A list of all prologue insns we have seen without intervening epilogue
542 insns, and one of all epilogue insns we have seen without intervening
543 prologue insns. This is used to prevent mixing prologue and epilogue
544 insns. See PR78029. */
545 rtx_insn_list
*last_prologue
;
546 rtx_insn_list
*last_epilogue
;
548 /* Whether the last *logue insn was an epilogue insn or a prologue insn
550 bool last_logue_was_epilogue
;
552 /* The maximum register number for the following arrays. Before reload
553 this is max_reg_num; after reload it is FIRST_PSEUDO_REGISTER. */
556 /* Element N is the next insn that sets (hard or pseudo) register
557 N within the current basic block; or zero, if there is no
558 such insn. Needed for new registers which may be introduced
559 by splitting insns. */
560 struct deps_reg
*reg_last
;
562 /* Element N is set for each register that has any nonzero element
563 in reg_last[N].{uses,sets,clobbers}. */
564 regset_head reg_last_in_use
;
566 /* Shows the last value of reg_pending_barrier associated with the insn. */
567 enum reg_pending_barrier_mode last_reg_pending_barrier
;
569 /* True when this context should be treated as a readonly by
571 BOOL_BITFIELD readonly
: 1;
574 typedef class deps_desc
*deps_t
;
576 /* This structure holds some state of the current scheduling pass, and
577 contains some function pointers that abstract out some of the non-generic
578 functionality from functions such as schedule_block or schedule_insn.
579 There is one global variable, current_sched_info, which points to the
580 sched_info structure currently in use. */
581 struct haifa_sched_info
583 /* Add all insns that are initially ready to the ready list. Called once
584 before scheduling a set of insns. */
585 void (*init_ready_list
) (void);
586 /* Called after taking an insn from the ready list. Returns nonzero if
587 this insn can be scheduled, nonzero if we should silently discard it. */
588 int (*can_schedule_ready_p
) (rtx_insn
*);
589 /* Return nonzero if there are more insns that should be scheduled. */
590 int (*schedule_more_p
) (void);
591 /* Called after an insn has all its hard dependencies resolved.
592 Adjusts status of instruction (which is passed through second parameter)
593 to indicate if instruction should be moved to the ready list or the
594 queue, or if it should silently discard it (until next resolved
596 ds_t (*new_ready
) (rtx_insn
*, ds_t
);
597 /* Compare priority of two insns. Return a positive number if the second
598 insn is to be preferred for scheduling, and a negative one if the first
599 is to be preferred. Zero if they are equally good. */
600 int (*rank
) (rtx_insn
*, rtx_insn
*);
601 /* Return a string that contains the insn uid and optionally anything else
602 necessary to identify this insn in an output. It's valid to use a
603 static buffer for this. The ALIGNED parameter should cause the string
604 to be formatted so that multiple output lines will line up nicely. */
605 const char *(*print_insn
) (const rtx_insn
*, int);
606 /* Return nonzero if an insn should be included in priority
608 int (*contributes_to_priority
) (rtx_insn
*, rtx_insn
*);
610 /* Return true if scheduling insn (passed as the parameter) will trigger
611 finish of scheduling current block. */
612 bool (*insn_finishes_block_p
) (rtx_insn
*);
614 /* The boundaries of the set of insns to be scheduled. */
615 rtx_insn
*prev_head
, *next_tail
;
617 /* Filled in after the schedule is finished; the first and last scheduled
619 rtx_insn
*head
, *tail
;
621 /* If nonzero, enables an additional sanity check in schedule_block. */
622 unsigned int queue_must_finish_empty
:1;
624 /* Maximum priority that has been assigned to an insn. */
625 int sched_max_insns_priority
;
627 /* Hooks to support speculative scheduling. */
629 /* Called to notify frontend that instruction is being added (second
630 parameter == 0) or removed (second parameter == 1). */
631 void (*add_remove_insn
) (rtx_insn
*, int);
633 /* Called to notify the frontend that instruction INSN is being
635 void (*begin_schedule_ready
) (rtx_insn
*insn
);
637 /* Called to notify the frontend that an instruction INSN is about to be
638 moved to its correct place in the final schedule. This is done for all
639 insns in order of the schedule. LAST indicates the last scheduled
641 void (*begin_move_insn
) (rtx_insn
*insn
, rtx_insn
*last
);
643 /* If the second parameter is not NULL, return nonnull value, if the
644 basic block should be advanced.
645 If the second parameter is NULL, return the next basic block in EBB.
646 The first parameter is the current basic block in EBB. */
647 basic_block (*advance_target_bb
) (basic_block
, rtx_insn
*);
649 /* Allocate memory, store the frontend scheduler state in it, and
651 void *(*save_state
) (void);
652 /* Restore frontend scheduler state from the argument, and free the
654 void (*restore_state
) (void *);
656 /* ??? FIXME: should use straight bitfields inside sched_info instead of
661 /* This structure holds description of the properties for speculative
665 /* Holds types of allowed speculations: BEGIN_{DATA|CONTROL},
666 BE_IN_{DATA_CONTROL}. */
669 /* A dump file for additional information on speculative scheduling. */
672 /* Minimal cumulative weakness of speculative instruction's
673 dependencies, so that insn will be scheduled. */
674 dw_t data_weakness_cutoff
;
676 /* Minimal usefulness of speculative instruction to be considered for
678 int control_weakness_cutoff
;
680 /* Flags from the enum SPEC_SCHED_FLAGS. */
683 typedef struct spec_info_def
*spec_info_t
;
685 extern spec_info_t spec_info
;
687 extern struct haifa_sched_info
*current_sched_info
;
689 /* Do register pressure sensitive insn scheduling if the flag is set
691 extern enum sched_pressure_algorithm sched_pressure
;
693 /* Map regno -> its pressure class. The map defined only when
694 SCHED_PRESSURE_P is true. */
695 extern enum reg_class
*sched_regno_pressure_class
;
697 /* Indexed by INSN_UID, the collection of all data associated with
698 a single instruction. */
700 struct _haifa_deps_insn_data
702 /* The number of incoming edges in the forward dependency graph.
703 As scheduling proceeds, counts are decreased. An insn moves to
704 the ready queue when its counter reaches zero. */
707 /* Nonzero if instruction has internal dependence
708 (e.g. add_dependence was invoked with (insn == elem)). */
709 unsigned int has_internal_dep
;
711 /* NB: We can't place 'struct _deps_list' here instead of deps_list_t into
712 h_i_d because when h_i_d extends, addresses of the deps_list->first
713 change without updating deps_list->first->next->prev_nextp. Thus
714 BACK_DEPS and RESOLVED_BACK_DEPS are allocated on the heap and FORW_DEPS
715 list is allocated on the obstack. */
717 /* A list of hard backward dependencies. The insn is a consumer of all the
718 deps mentioned here. */
719 deps_list_t hard_back_deps
;
721 /* A list of speculative (weak) dependencies. The insn is a consumer of all
722 the deps mentioned here. */
723 deps_list_t spec_back_deps
;
725 /* A list of insns which depend on the instruction. Unlike 'back_deps',
726 it represents forward dependencies. */
727 deps_list_t forw_deps
;
729 /* A list of scheduled producers of the instruction. Links are being moved
730 from 'back_deps' to 'resolved_back_deps' while scheduling. */
731 deps_list_t resolved_back_deps
;
733 /* A list of scheduled consumers of the instruction. Links are being moved
734 from 'forw_deps' to 'resolved_forw_deps' while scheduling to fasten the
735 search in 'forw_deps'. */
736 deps_list_t resolved_forw_deps
;
738 /* If the insn is conditional (either through COND_EXEC, or because
739 it is a conditional branch), this records the condition. NULL
740 for insns that haven't been seen yet or don't have a condition;
741 const_true_rtx to mark an insn without a condition, or with a
742 condition that has been clobbered by a subsequent insn. */
745 /* For a conditional insn, a list of insns that could set the condition
746 register. Used when generating control dependencies. */
747 rtx_insn_list
*cond_deps
;
749 /* True if the condition in 'cond' should be reversed to get the actual
751 unsigned int reverse_cond
: 1;
753 /* Some insns (e.g. call) are not allowed to move across blocks. */
754 unsigned int cant_move
: 1;
758 /* Bits used for storing values of the fields in the following
760 #define INCREASE_BITS 8
762 /* The structure describes how the corresponding insn increases the
763 register pressure for each pressure class. */
764 struct reg_pressure_data
766 /* Pressure increase for given class because of clobber. */
767 unsigned int clobber_increase
: INCREASE_BITS
;
768 /* Increase in register pressure for given class because of register
770 unsigned int set_increase
: INCREASE_BITS
;
771 /* Pressure increase for given class because of unused register
773 unsigned int unused_set_increase
: INCREASE_BITS
;
774 /* Pressure change: #sets - #deaths. */
775 int change
: INCREASE_BITS
;
778 /* The following structure describes usage of registers by insns. */
781 /* Regno used in the insn. */
783 /* Insn using the regno. */
785 /* Cyclic list of elements with the same regno. */
786 struct reg_use_data
*next_regno_use
;
787 /* List of elements with the same insn. */
788 struct reg_use_data
*next_insn_use
;
791 /* The following structure describes used sets of registers by insns.
792 Registers are pseudos whose pressure class is not NO_REGS or hard
793 registers available for allocations. */
796 /* Regno used in the insn. */
798 /* Insn setting the regno. */
800 /* List of elements with the same insn. */
801 struct reg_set_data
*next_insn_set
;
804 enum autopref_multipass_data_status
{
805 /* Entry is irrelevant for auto-prefetcher. */
806 AUTOPREF_MULTIPASS_DATA_IRRELEVANT
= -2,
807 /* Entry is uninitialized. */
808 AUTOPREF_MULTIPASS_DATA_UNINITIALIZED
= -1,
809 /* Entry is relevant for auto-prefetcher and insn can be delayed
810 to allow another insn through. */
811 AUTOPREF_MULTIPASS_DATA_NORMAL
= 0,
812 /* Entry is relevant for auto-prefetcher, but insn should not be
813 delayed as that will break scheduling. */
814 AUTOPREF_MULTIPASS_DATA_DONT_DELAY
= 1
817 /* Data for modeling cache auto-prefetcher. */
818 struct autopref_multipass_data_
820 /* Base part of memory address. */
823 /* Memory offsets from the base. */
827 enum autopref_multipass_data_status status
;
829 typedef struct autopref_multipass_data_ autopref_multipass_data_def
;
830 typedef autopref_multipass_data_def
*autopref_multipass_data_t
;
832 struct _haifa_insn_data
834 /* We can't place 'struct _deps_list' into h_i_d instead of deps_list_t
835 because when h_i_d extends, addresses of the deps_list->first
836 change without updating deps_list->first->next->prev_nextp. */
838 /* Logical uid gives the original ordering of the insns. */
841 /* A priority for each insn. */
844 /* The fusion priority for each insn. */
847 /* The minimum clock tick at which the insn becomes ready. This is
848 used to note timing constraints for the insns in the pending list. */
851 /* For insns that are scheduled at a fixed difference from another,
852 this records the tick in which they must be ready. */
855 /* INTER_TICK is used to adjust INSN_TICKs of instructions from the
856 subsequent blocks in a region. */
859 /* Used temporarily to estimate an INSN_TICK value for an insn given
860 current knowledge. */
863 /* See comment on QUEUE_INDEX macro in haifa-sched.c. */
868 /* '> 0' if priority is valid,
869 '== 0' if priority was not yet computed,
870 '< 0' if priority in invalid and should be recomputed. */
871 signed char priority_status
;
873 /* Set if there's DEF-USE dependence between some speculatively
874 moved load insn and this one. */
875 unsigned int fed_by_spec_load
: 1;
876 unsigned int is_load_insn
: 1;
877 /* Nonzero if this insn has negative-cost forward dependencies against
878 an already scheduled insn. */
879 unsigned int feeds_backtrack_insn
: 1;
881 /* Nonzero if this insn is a shadow of another, scheduled after a fixed
882 delay. We only emit shadows at the end of a cycle, with no other
883 real insns following them. */
884 unsigned int shadow_p
: 1;
886 /* Used internally in unschedule_insns_until to mark insns that must have
887 their TODO_SPEC recomputed. */
888 unsigned int must_recompute_spec
: 1;
890 /* What speculations are necessary to apply to schedule the instruction. */
893 /* What speculations were already applied. */
896 /* What speculations are checked by this instruction. */
899 /* Recovery block for speculation checks. */
900 basic_block recovery_block
;
902 /* Original pattern of the instruction. */
905 /* For insns with DEP_CONTROL dependencies, the predicated pattern if it
906 was ever successfully constructed. */
909 /* The following array contains info how the insn increases register
910 pressure. There is an element for each cover class of pseudos
911 referenced in insns. */
912 struct reg_pressure_data
*reg_pressure
;
913 /* The following array contains maximal reg pressure between last
914 scheduled insn and given insn. There is an element for each
915 pressure class of pseudos referenced in insns. This info updated
916 after scheduling each insn for each insn between the two
918 int *max_reg_pressure
;
919 /* The following list contains info about used pseudos and hard
920 registers available for allocation. */
921 struct reg_use_data
*reg_use_list
;
922 /* The following list contains info about set pseudos and hard
923 registers available for allocation. */
924 struct reg_set_data
*reg_set_list
;
925 /* Info about how scheduling the insn changes cost of register
926 pressure excess (between source and target). */
927 int reg_pressure_excess_cost_change
;
930 /* Original order of insns in the ready list. */
931 int rfs_debug_orig_order
;
933 /* The deciding reason for INSN's place in the ready list. */
936 /* Two entries for cache auto-prefetcher model: one for mem reads,
937 and one for mem writes. */
938 autopref_multipass_data_def autopref_multipass_data
[2];
941 typedef struct _haifa_insn_data haifa_insn_data_def
;
942 typedef haifa_insn_data_def
*haifa_insn_data_t
;
945 extern vec
<haifa_insn_data_def
> h_i_d
;
947 #define HID(INSN) (&h_i_d[INSN_UID (INSN)])
949 /* Accessor macros for h_i_d. There are more in haifa-sched.c and
951 #define INSN_PRIORITY(INSN) (HID (INSN)->priority)
952 #define INSN_FUSION_PRIORITY(INSN) (HID (INSN)->fusion_priority)
953 #define INSN_REG_PRESSURE(INSN) (HID (INSN)->reg_pressure)
954 #define INSN_MAX_REG_PRESSURE(INSN) (HID (INSN)->max_reg_pressure)
955 #define INSN_REG_USE_LIST(INSN) (HID (INSN)->reg_use_list)
956 #define INSN_REG_SET_LIST(INSN) (HID (INSN)->reg_set_list)
957 #define INSN_REG_PRESSURE_EXCESS_COST_CHANGE(INSN) \
958 (HID (INSN)->reg_pressure_excess_cost_change)
959 #define INSN_PRIORITY_STATUS(INSN) (HID (INSN)->priority_status)
960 #define INSN_MODEL_INDEX(INSN) (HID (INSN)->model_index)
961 #define INSN_AUTOPREF_MULTIPASS_DATA(INSN) \
962 (HID (INSN)->autopref_multipass_data)
964 typedef struct _haifa_deps_insn_data haifa_deps_insn_data_def
;
965 typedef haifa_deps_insn_data_def
*haifa_deps_insn_data_t
;
968 extern vec
<haifa_deps_insn_data_def
> h_d_i_d
;
970 #define HDID(INSN) (&h_d_i_d[INSN_LUID (INSN)])
971 #define INSN_DEP_COUNT(INSN) (HDID (INSN)->dep_count)
972 #define HAS_INTERNAL_DEP(INSN) (HDID (INSN)->has_internal_dep)
973 #define INSN_FORW_DEPS(INSN) (HDID (INSN)->forw_deps)
974 #define INSN_RESOLVED_BACK_DEPS(INSN) (HDID (INSN)->resolved_back_deps)
975 #define INSN_RESOLVED_FORW_DEPS(INSN) (HDID (INSN)->resolved_forw_deps)
976 #define INSN_HARD_BACK_DEPS(INSN) (HDID (INSN)->hard_back_deps)
977 #define INSN_SPEC_BACK_DEPS(INSN) (HDID (INSN)->spec_back_deps)
978 #define INSN_CACHED_COND(INSN) (HDID (INSN)->cond)
979 #define INSN_REVERSE_COND(INSN) (HDID (INSN)->reverse_cond)
980 #define INSN_COND_DEPS(INSN) (HDID (INSN)->cond_deps)
981 #define CANT_MOVE(INSN) (HDID (INSN)->cant_move)
982 #define CANT_MOVE_BY_LUID(LUID) (h_d_i_d[LUID].cant_move)
985 #define INSN_PRIORITY(INSN) (HID (INSN)->priority)
986 #define INSN_PRIORITY_STATUS(INSN) (HID (INSN)->priority_status)
987 #define INSN_PRIORITY_KNOWN(INSN) (INSN_PRIORITY_STATUS (INSN) > 0)
988 #define TODO_SPEC(INSN) (HID (INSN)->todo_spec)
989 #define DONE_SPEC(INSN) (HID (INSN)->done_spec)
990 #define CHECK_SPEC(INSN) (HID (INSN)->check_spec)
991 #define RECOVERY_BLOCK(INSN) (HID (INSN)->recovery_block)
992 #define ORIG_PAT(INSN) (HID (INSN)->orig_pat)
993 #define PREDICATED_PAT(INSN) (HID (INSN)->predicated_pat)
995 /* INSN is either a simple or a branchy speculation check. */
996 #define IS_SPECULATION_CHECK_P(INSN) \
997 (sel_sched_p () ? sel_insn_is_speculation_check (INSN) : RECOVERY_BLOCK (INSN) != NULL)
999 /* INSN is a speculation check that will simply reexecute the speculatively
1000 scheduled instruction if the speculation fails. */
1001 #define IS_SPECULATION_SIMPLE_CHECK_P(INSN) \
1002 (RECOVERY_BLOCK (INSN) == EXIT_BLOCK_PTR_FOR_FN (cfun))
1004 /* INSN is a speculation check that will branch to RECOVERY_BLOCK if the
1005 speculation fails. Insns in that block will reexecute the speculatively
1006 scheduled code and then will return immediately after INSN thus preserving
1007 semantics of the program. */
1008 #define IS_SPECULATION_BRANCHY_CHECK_P(INSN) \
1009 (RECOVERY_BLOCK (INSN) != NULL \
1010 && RECOVERY_BLOCK (INSN) != EXIT_BLOCK_PTR_FOR_FN (cfun))
1013 /* Dep status (aka ds_t) of the link encapsulates all information for a given
1014 dependency, including everything that is needed for speculative scheduling.
1016 The lay-out of a ds_t is as follows:
1018 1. Integers corresponding to the probability of the dependence to *not*
1019 exist. This is the probability that overcoming this dependence will
1020 not be followed by execution of the recovery code. Note that however
1021 high this probability is, the recovery code should still always be
1022 generated to preserve semantics of the program.
1024 The probability values can be set or retrieved using the functions
1025 the set_dep_weak() and get_dep_weak() in sched-deps.c. The values
1026 are always in the range [0, MAX_DEP_WEAK].
1028 BEGIN_DATA : BITS_PER_DEP_WEAK
1029 BE_IN_DATA : BITS_PER_DEP_WEAK
1030 BEGIN_CONTROL : BITS_PER_DEP_WEAK
1031 BE_IN_CONTROL : BITS_PER_DEP_WEAK
1033 The basic type of DS_T is a host int. For a 32-bits int, the values
1034 will each take 6 bits.
1036 2. The type of dependence. This supercedes the old-style REG_NOTE_KIND
1037 values. TODO: Use this field instead of DEP_TYPE, or make DEP_TYPE
1038 extract the dependence type from here.
1040 dep_type : 4 => DEP_{TRUE|OUTPUT|ANTI|CONTROL}
1044 HARD_DEP : 1 => Set if an instruction has a non-speculative
1045 dependence. This is an instruction property
1046 so this bit can only appear in the TODO_SPEC
1047 field of an instruction.
1048 DEP_POSTPONED : 1 => Like HARD_DEP, but the hard dependence may
1049 still be broken by adjusting the instruction.
1050 DEP_CANCELLED : 1 => Set if a dependency has been broken using
1051 some form of speculation.
1052 RESERVED : 1 => Reserved for use in the delay slot scheduler.
1054 See also: check_dep_status () in sched-deps.c . */
1056 /* The number of bits per weakness probability. There are 4 weakness types
1057 and we need 8 bits for other data in a DS_T. */
1058 #define BITS_PER_DEP_WEAK ((BITS_PER_DEP_STATUS - 8) / 4)
1060 /* Mask of speculative weakness in dep_status. */
1061 #define DEP_WEAK_MASK ((1 << BITS_PER_DEP_WEAK) - 1)
1063 /* This constant means that dependence is fake with 99.999...% probability.
1064 This is the maximum value, that can appear in dep_status.
1065 Note, that we don't want MAX_DEP_WEAK to be the same as DEP_WEAK_MASK for
1066 debugging reasons. Though, it can be set to DEP_WEAK_MASK, and, when
1067 done so, we'll get fast (mul for)/(div by) NO_DEP_WEAK. */
1068 #define MAX_DEP_WEAK (DEP_WEAK_MASK - 1)
1070 /* This constant means that dependence is 99.999...% real and it is a really
1071 bad idea to overcome it (though this can be done, preserving program
1073 #define MIN_DEP_WEAK 1
1075 /* This constant represents 100% probability.
1076 E.g. it is used to represent weakness of dependence, that doesn't exist.
1077 This value never appears in a ds_t, it is only used for computing the
1078 weakness of a dependence. */
1079 #define NO_DEP_WEAK (MAX_DEP_WEAK + MIN_DEP_WEAK)
1081 /* Default weakness of speculative dependence. Used when we can't say
1082 neither bad nor good about the dependence. */
1083 #define UNCERTAIN_DEP_WEAK (MAX_DEP_WEAK - MAX_DEP_WEAK / 4)
1085 /* Offset for speculative weaknesses in dep_status. */
1086 enum SPEC_TYPES_OFFSETS
{
1087 BEGIN_DATA_BITS_OFFSET
= 0,
1088 BE_IN_DATA_BITS_OFFSET
= BEGIN_DATA_BITS_OFFSET
+ BITS_PER_DEP_WEAK
,
1089 BEGIN_CONTROL_BITS_OFFSET
= BE_IN_DATA_BITS_OFFSET
+ BITS_PER_DEP_WEAK
,
1090 BE_IN_CONTROL_BITS_OFFSET
= BEGIN_CONTROL_BITS_OFFSET
+ BITS_PER_DEP_WEAK
1093 /* The following defines provide numerous constants used to distinguish
1094 between different types of speculative dependencies. They are also
1095 used as masks to clear/preserve the bits corresponding to the type
1096 of dependency weakness. */
1098 /* Dependence can be overcome with generation of new data speculative
1100 #define BEGIN_DATA (((ds_t) DEP_WEAK_MASK) << BEGIN_DATA_BITS_OFFSET)
1102 /* This dependence is to the instruction in the recovery block, that was
1103 formed to recover after data-speculation failure.
1104 Thus, this dependence can overcome with generating of the copy of
1105 this instruction in the recovery block. */
1106 #define BE_IN_DATA (((ds_t) DEP_WEAK_MASK) << BE_IN_DATA_BITS_OFFSET)
1108 /* Dependence can be overcome with generation of new control speculative
1110 #define BEGIN_CONTROL (((ds_t) DEP_WEAK_MASK) << BEGIN_CONTROL_BITS_OFFSET)
1112 /* This dependence is to the instruction in the recovery block, that was
1113 formed to recover after control-speculation failure.
1114 Thus, this dependence can be overcome with generating of the copy of
1115 this instruction in the recovery block. */
1116 #define BE_IN_CONTROL (((ds_t) DEP_WEAK_MASK) << BE_IN_CONTROL_BITS_OFFSET)
1118 /* A few convenient combinations. */
1119 #define BEGIN_SPEC (BEGIN_DATA | BEGIN_CONTROL)
1120 #define DATA_SPEC (BEGIN_DATA | BE_IN_DATA)
1121 #define CONTROL_SPEC (BEGIN_CONTROL | BE_IN_CONTROL)
1122 #define SPECULATIVE (DATA_SPEC | CONTROL_SPEC)
1123 #define BE_IN_SPEC (BE_IN_DATA | BE_IN_CONTROL)
1125 /* Constants, that are helpful in iterating through dep_status. */
1126 #define FIRST_SPEC_TYPE BEGIN_DATA
1127 #define LAST_SPEC_TYPE BE_IN_CONTROL
1128 #define SPEC_TYPE_SHIFT BITS_PER_DEP_WEAK
1130 /* Dependence on instruction can be of multiple types
1131 (e.g. true and output). This fields enhance REG_NOTE_KIND information
1132 of the dependence. */
1133 #define DEP_TRUE (((ds_t) 1) << (BE_IN_CONTROL_BITS_OFFSET + BITS_PER_DEP_WEAK))
1134 #define DEP_OUTPUT (DEP_TRUE << 1)
1135 #define DEP_ANTI (DEP_OUTPUT << 1)
1136 #define DEP_CONTROL (DEP_ANTI << 1)
1138 #define DEP_TYPES (DEP_TRUE | DEP_OUTPUT | DEP_ANTI | DEP_CONTROL)
1140 /* Instruction has non-speculative dependence. This bit represents the
1141 property of an instruction - not the one of a dependence.
1142 Therefore, it can appear only in the TODO_SPEC field of an instruction. */
1143 #define HARD_DEP (DEP_CONTROL << 1)
1145 /* Like HARD_DEP, but dependencies can perhaps be broken by modifying
1146 the instructions. This is used for example to change:
1151 For instructions that have this bit set, one of the dependencies of
1152 the instructions will have a non-NULL REPLACE field in its DEP_T.
1153 Just like HARD_DEP, this bit is only ever set in TODO_SPEC. */
1154 #define DEP_POSTPONED (HARD_DEP << 1)
1156 /* Set if a dependency is cancelled via speculation. */
1157 #define DEP_CANCELLED (DEP_POSTPONED << 1)
1160 /* This represents the results of calling sched-deps.c functions,
1161 which modify dependencies. */
1162 enum DEPS_ADJUST_RESULT
{
1163 /* No dependence needed (e.g. producer == consumer). */
1165 /* Dependence is already present and wasn't modified. */
1167 /* Existing dependence was modified to include additional information. */
1169 /* New dependence has been created. */
1173 /* Represents the bits that can be set in the flags field of the
1174 sched_info structure. */
1176 /* If set, generate links between instruction as DEPS_LIST.
1177 Otherwise, generate usual INSN_LIST links. */
1179 /* Perform data or control (or both) speculation.
1180 Results in generation of data and control speculative dependencies.
1181 Requires USE_DEPS_LIST set. */
1182 DO_SPECULATION
= USE_DEPS_LIST
<< 1,
1183 DO_BACKTRACKING
= DO_SPECULATION
<< 1,
1184 DO_PREDICATION
= DO_BACKTRACKING
<< 1,
1185 DONT_BREAK_DEPENDENCIES
= DO_PREDICATION
<< 1,
1186 SCHED_RGN
= DONT_BREAK_DEPENDENCIES
<< 1,
1187 SCHED_EBB
= SCHED_RGN
<< 1,
1188 /* Scheduler can possibly create new basic blocks. Used for assertions. */
1189 NEW_BBS
= SCHED_EBB
<< 1,
1190 SEL_SCHED
= NEW_BBS
<< 1
1193 enum SPEC_SCHED_FLAGS
{
1194 COUNT_SPEC_IN_CRITICAL_PATH
= 1,
1195 SEL_SCHED_SPEC_DONT_CHECK_CONTROL
= COUNT_SPEC_IN_CRITICAL_PATH
<< 1
1198 #define NOTE_NOT_BB_P(NOTE) (NOTE_P (NOTE) && (NOTE_KIND (NOTE) \
1199 != NOTE_INSN_BASIC_BLOCK))
1201 extern FILE *sched_dump
;
1202 extern int sched_verbose
;
1204 extern spec_info_t spec_info
;
1205 extern bool haifa_recovery_bb_ever_added_p
;
1207 /* Exception Free Loads:
1209 We define five classes of speculative loads: IFREE, IRISKY,
1210 PFREE, PRISKY, and MFREE.
1212 IFREE loads are loads that are proved to be exception-free, just
1213 by examining the load insn. Examples for such loads are loads
1214 from TOC and loads of global data.
1216 IRISKY loads are loads that are proved to be exception-risky,
1217 just by examining the load insn. Examples for such loads are
1218 volatile loads and loads from shared memory.
1220 PFREE loads are loads for which we can prove, by examining other
1221 insns, that they are exception-free. Currently, this class consists
1222 of loads for which we are able to find a "similar load", either in
1223 the target block, or, if only one split-block exists, in that split
1224 block. Load2 is similar to load1 if both have same single base
1225 register. We identify only part of the similar loads, by finding
1226 an insn upon which both load1 and load2 have a DEF-USE dependence.
1228 PRISKY loads are loads for which we can prove, by examining other
1229 insns, that they are exception-risky. Currently we have two proofs for
1230 such loads. The first proof detects loads that are probably guarded by a
1231 test on the memory address. This proof is based on the
1232 backward and forward data dependence information for the region.
1233 Let load-insn be the examined load.
1234 Load-insn is PRISKY iff ALL the following hold:
1236 - insn1 is not in the same block as load-insn
1237 - there is a DEF-USE dependence chain (insn1, ..., load-insn)
1238 - test-insn is either a compare or a branch, not in the same block
1240 - load-insn is reachable from test-insn
1241 - there is a DEF-USE dependence chain (insn1, ..., test-insn)
1243 This proof might fail when the compare and the load are fed
1244 by an insn not in the region. To solve this, we will add to this
1245 group all loads that have no input DEF-USE dependence.
1247 The second proof detects loads that are directly or indirectly
1248 fed by a speculative load. This proof is affected by the
1249 scheduling process. We will use the flag fed_by_spec_load.
1250 Initially, all insns have this flag reset. After a speculative
1251 motion of an insn, if insn is either a load, or marked as
1252 fed_by_spec_load, we will also mark as fed_by_spec_load every
1253 insn1 for which a DEF-USE dependence (insn, insn1) exists. A
1254 load which is fed_by_spec_load is also PRISKY.
1256 MFREE (maybe-free) loads are all the remaining loads. They may be
1257 exception-free, but we cannot prove it.
1259 Now, all loads in IFREE and PFREE classes are considered
1260 exception-free, while all loads in IRISKY and PRISKY classes are
1261 considered exception-risky. As for loads in the MFREE class,
1262 these are considered either exception-free or exception-risky,
1263 depending on whether we are pessimistic or optimistic. We have
1264 to take the pessimistic approach to assure the safety of
1265 speculative scheduling, but we can take the optimistic approach
1266 by invoking the -fsched_spec_load_dangerous option. */
1268 enum INSN_TRAP_CLASS
1270 TRAP_FREE
= 0, IFREE
= 1, PFREE_CANDIDATE
= 2,
1271 PRISKY_CANDIDATE
= 3, IRISKY
= 4, TRAP_RISKY
= 5
1274 #define WORST_CLASS(class1, class2) \
1275 ((class1 > class2) ? class1 : class2)
1281 #ifndef HAIFA_INLINE
1282 #define HAIFA_INLINE __inline
1285 struct sched_deps_info_def
1287 /* Called when computing dependencies for a JUMP_INSN. This function
1288 should store the set of registers that must be considered as set by
1289 the jump in the regset. */
1290 void (*compute_jump_reg_dependencies
) (rtx
, regset
);
1292 /* Start analyzing insn. */
1293 void (*start_insn
) (rtx_insn
*);
1295 /* Finish analyzing insn. */
1296 void (*finish_insn
) (void);
1298 /* Start analyzing insn LHS (Left Hand Side). */
1299 void (*start_lhs
) (rtx
);
1301 /* Finish analyzing insn LHS. */
1302 void (*finish_lhs
) (void);
1304 /* Start analyzing insn RHS (Right Hand Side). */
1305 void (*start_rhs
) (rtx
);
1307 /* Finish analyzing insn RHS. */
1308 void (*finish_rhs
) (void);
1310 /* Note set of the register. */
1311 void (*note_reg_set
) (int);
1313 /* Note clobber of the register. */
1314 void (*note_reg_clobber
) (int);
1316 /* Note use of the register. */
1317 void (*note_reg_use
) (int);
1319 /* Note memory dependence of type DS between MEM1 and MEM2 (which is
1321 void (*note_mem_dep
) (rtx mem1
, rtx mem2
, rtx_insn
*insn2
, ds_t ds
);
1323 /* Note a dependence of type DS from the INSN. */
1324 void (*note_dep
) (rtx_insn
*, ds_t ds
);
1326 /* Nonzero if we should use cselib for better alias analysis. This
1327 must be 0 if the dependency information is used after sched_analyze
1328 has completed, e.g. if we're using it to initialize state for successor
1329 blocks in region scheduling. */
1330 unsigned int use_cselib
: 1;
1332 /* If set, generate links between instruction as DEPS_LIST.
1333 Otherwise, generate usual INSN_LIST links. */
1334 unsigned int use_deps_list
: 1;
1336 /* Generate data and control speculative dependencies.
1337 Requires USE_DEPS_LIST set. */
1338 unsigned int generate_spec_deps
: 1;
1341 extern struct sched_deps_info_def
*sched_deps_info
;
1344 /* Functions in sched-deps.c. */
1345 extern rtx
sched_get_reverse_condition_uncached (const rtx_insn
*);
1346 extern bool sched_insns_conditions_mutex_p (const rtx_insn
*,
1348 extern bool sched_insn_is_legitimate_for_speculation_p (const rtx_insn
*, ds_t
);
1349 extern void add_dependence (rtx_insn
*, rtx_insn
*, enum reg_note
);
1350 extern void sched_analyze (class deps_desc
*, rtx_insn
*, rtx_insn
*);
1351 extern void init_deps (class deps_desc
*, bool);
1352 extern void init_deps_reg_last (class deps_desc
*);
1353 extern void free_deps (class deps_desc
*);
1354 extern void init_deps_global (void);
1355 extern void finish_deps_global (void);
1356 extern void deps_analyze_insn (class deps_desc
*, rtx_insn
*);
1357 extern void remove_from_deps (class deps_desc
*, rtx_insn
*);
1358 extern void init_insn_reg_pressure_info (rtx_insn
*);
1359 extern void get_implicit_reg_pending_clobbers (HARD_REG_SET
*, rtx_insn
*);
1361 extern dw_t
get_dep_weak (ds_t
, ds_t
);
1362 extern ds_t
set_dep_weak (ds_t
, ds_t
, dw_t
);
1363 extern dw_t
estimate_dep_weak (rtx
, rtx
);
1364 extern ds_t
ds_merge (ds_t
, ds_t
);
1365 extern ds_t
ds_full_merge (ds_t
, ds_t
, rtx
, rtx
);
1366 extern ds_t
ds_max_merge (ds_t
, ds_t
);
1367 extern dw_t
ds_weak (ds_t
);
1368 extern ds_t
ds_get_speculation_types (ds_t
);
1369 extern ds_t
ds_get_max_dep_weak (ds_t
);
1371 extern void sched_deps_init (bool);
1372 extern void sched_deps_finish (void);
1374 extern void haifa_note_reg_set (int);
1375 extern void haifa_note_reg_clobber (int);
1376 extern void haifa_note_reg_use (int);
1378 extern void maybe_extend_reg_info_p (void);
1380 extern void deps_start_bb (class deps_desc
*, rtx_insn
*);
1381 extern enum reg_note
ds_to_dt (ds_t
);
1383 extern bool deps_pools_are_empty_p (void);
1384 extern void sched_free_deps (rtx_insn
*, rtx_insn
*, bool);
1385 extern void extend_dependency_caches (int, bool);
1387 extern void debug_ds (ds_t
);
1390 /* Functions in haifa-sched.c. */
1391 extern void initialize_live_range_shrinkage (void);
1392 extern void finish_live_range_shrinkage (void);
1393 extern void sched_init_region_reg_pressure_info (void);
1394 extern void free_global_sched_pressure_data (void);
1395 extern int haifa_classify_insn (const_rtx
);
1396 extern void get_ebb_head_tail (basic_block
, basic_block
,
1397 rtx_insn
**, rtx_insn
**);
1398 extern int no_real_insns_p (const rtx_insn
*, const rtx_insn
*);
1400 extern int insn_sched_cost (rtx_insn
*);
1401 extern int dep_cost_1 (dep_t
, dw_t
);
1402 extern int dep_cost (dep_t
);
1403 extern int set_priorities (rtx_insn
*, rtx_insn
*);
1405 extern void sched_setup_bb_reg_pressure_info (basic_block
, rtx_insn
*);
1406 extern bool schedule_block (basic_block
*, state_t
);
1408 extern int cycle_issued_insns
;
1409 extern int issue_rate
;
1410 extern int dfa_lookahead
;
1412 extern int autopref_multipass_dfa_lookahead_guard (rtx_insn
*, int);
1414 extern rtx_insn
*ready_element (struct ready_list
*, int);
1415 extern rtx_insn
**ready_lastpos (struct ready_list
*);
1417 extern int try_ready (rtx_insn
*);
1418 extern void sched_extend_ready_list (int);
1419 extern void sched_finish_ready_list (void);
1420 extern void sched_change_pattern (rtx
, rtx
);
1421 extern int sched_speculate_insn (rtx_insn
*, ds_t
, rtx
*);
1422 extern void unlink_bb_notes (basic_block
, basic_block
);
1423 extern void add_block (basic_block
, basic_block
);
1424 extern rtx_note
*bb_note (basic_block
);
1425 extern void concat_note_lists (rtx_insn
*, rtx_insn
**);
1426 extern rtx_insn
*sched_emit_insn (rtx
);
1427 extern rtx_insn
*get_ready_element (int);
1428 extern int number_in_ready (void);
1430 /* Types and functions in sched-ebb.c. */
1432 extern basic_block
schedule_ebb (rtx_insn
*, rtx_insn
*, bool);
1433 extern void schedule_ebbs_init (void);
1434 extern void schedule_ebbs_finish (void);
1436 /* Types and functions in sched-rgn.c. */
1438 /* A region is the main entity for interblock scheduling: insns
1439 are allowed to move between blocks in the same region, along
1440 control flow graph edges, in the 'up' direction. */
1443 /* Number of extended basic blocks in region. */
1445 /* cblocks in the region (actually index in rgn_bb_table). */
1447 /* Dependencies for this region are already computed. Basically, indicates,
1448 that this is a recovery block. */
1449 unsigned int dont_calc_deps
: 1;
1450 /* This region has at least one non-trivial ebb. */
1451 unsigned int has_real_ebb
: 1;
1454 extern int nr_regions
;
1455 extern region
*rgn_table
;
1456 extern int *rgn_bb_table
;
1457 extern int *block_to_bb
;
1458 extern int *containing_rgn
;
1460 /* Often used short-hand in the scheduler. The rest of the compiler uses
1461 BLOCK_FOR_INSN(INSN) and an indirect reference to get the basic block
1462 number ("index"). For historical reasons, the scheduler does not. */
1463 #define BLOCK_NUM(INSN) (BLOCK_FOR_INSN (INSN)->index + 0)
1465 #define RGN_NR_BLOCKS(rgn) (rgn_table[rgn].rgn_nr_blocks)
1466 #define RGN_BLOCKS(rgn) (rgn_table[rgn].rgn_blocks)
1467 #define RGN_DONT_CALC_DEPS(rgn) (rgn_table[rgn].dont_calc_deps)
1468 #define RGN_HAS_REAL_EBB(rgn) (rgn_table[rgn].has_real_ebb)
1469 #define BLOCK_TO_BB(block) (block_to_bb[block])
1470 #define CONTAINING_RGN(block) (containing_rgn[block])
1472 /* The mapping from ebb to block. */
1473 extern int *ebb_head
;
1474 #define BB_TO_BLOCK(ebb) (rgn_bb_table[ebb_head[ebb]])
1475 #define EBB_FIRST_BB(ebb) BASIC_BLOCK_FOR_FN (cfun, BB_TO_BLOCK (ebb))
1476 #define EBB_LAST_BB(ebb) \
1477 BASIC_BLOCK_FOR_FN (cfun, rgn_bb_table[ebb_head[ebb + 1] - 1])
1478 #define INSN_BB(INSN) (BLOCK_TO_BB (BLOCK_NUM (INSN)))
1480 extern int current_nr_blocks
;
1481 extern int current_blocks
;
1482 extern int target_bb
;
1483 extern bool sched_no_dce
;
1485 extern void set_modulo_params (int, int, int, int);
1486 extern void record_delay_slot_pair (rtx_insn
*, rtx_insn
*, int, int);
1487 extern rtx_insn
*real_insn_for_shadow (rtx_insn
*);
1488 extern void discard_delay_pairs_above (int);
1489 extern void free_delay_pairs (void);
1490 extern void add_delay_dependencies (rtx_insn
*);
1491 extern bool sched_is_disabled_for_current_region_p (void);
1492 extern void sched_rgn_init (bool);
1493 extern void sched_rgn_finish (void);
1494 extern void rgn_setup_region (int);
1495 extern void sched_rgn_compute_dependencies (int);
1496 extern void sched_rgn_local_init (int);
1497 extern void sched_rgn_local_finish (void);
1498 extern void sched_rgn_local_free (void);
1499 extern void extend_regions (void);
1500 extern void rgn_make_new_region_out_of_new_block (basic_block
);
1502 extern void compute_priorities (void);
1503 extern void increase_insn_priority (rtx_insn
*, int);
1504 extern void debug_rgn_dependencies (int);
1505 extern void debug_dependencies (rtx_insn
*, rtx_insn
*);
1506 extern void dump_rgn_dependencies_dot (FILE *);
1507 extern void dump_rgn_dependencies_dot (const char *);
1509 extern void free_rgn_deps (void);
1510 extern int contributes_to_priority (rtx_insn
*, rtx_insn
*);
1511 extern void extend_rgns (int *, int *, sbitmap
, int *);
1512 extern void deps_join (class deps_desc
*, class deps_desc
*);
1514 extern void rgn_setup_common_sched_info (void);
1515 extern void rgn_setup_sched_infos (void);
1517 extern void debug_regions (void);
1518 extern void debug_region (int);
1519 extern void dump_region_dot (FILE *, int);
1520 extern void dump_region_dot_file (const char *, int);
1522 extern void haifa_sched_init (void);
1523 extern void haifa_sched_finish (void);
1525 extern void find_modifiable_mems (rtx_insn
*, rtx_insn
*);
1527 /* sched-deps.c interface to walk, add, search, update, resolve, delete
1528 and debug instruction dependencies. */
1530 /* Constants defining dependences lists. */
1533 #define SD_LIST_NONE (0)
1535 /* hard_back_deps. */
1536 #define SD_LIST_HARD_BACK (1)
1538 /* spec_back_deps. */
1539 #define SD_LIST_SPEC_BACK (2)
1542 #define SD_LIST_FORW (4)
1544 /* resolved_back_deps. */
1545 #define SD_LIST_RES_BACK (8)
1547 /* resolved_forw_deps. */
1548 #define SD_LIST_RES_FORW (16)
1550 #define SD_LIST_BACK (SD_LIST_HARD_BACK | SD_LIST_SPEC_BACK)
1552 /* A type to hold above flags. */
1553 typedef int sd_list_types_def
;
1555 extern void sd_next_list (const_rtx
, sd_list_types_def
*, deps_list_t
*, bool *);
1557 /* Iterator to walk through, resolve and delete dependencies. */
1560 /* What lists to walk. Can be any combination of SD_LIST_* flags. */
1561 sd_list_types_def types
;
1563 /* Instruction dependencies lists of which will be walked. */
1566 /* Pointer to the next field of the previous element. This is not
1567 simply a pointer to the next element to allow easy deletion from the
1568 list. When a dep is being removed from the list the iterator
1569 will automatically advance because the value in *linkp will start
1570 referring to the next element. */
1573 /* True if the current list is a resolved one. */
1577 typedef struct _sd_iterator sd_iterator_def
;
1579 /* ??? We can move some definitions that are used in below inline functions
1580 out of sched-int.h to sched-deps.c provided that the below functions will
1581 become global externals.
1582 These definitions include:
1583 * struct _deps_list: opaque pointer is needed at global scope.
1584 * struct _dep_link: opaque pointer is needed at scope of sd_iterator_def.
1585 * struct _dep_node: opaque pointer is needed at scope of
1586 struct _deps_link. */
1588 /* Return initialized iterator. */
1589 static inline sd_iterator_def
1590 sd_iterator_start (rtx insn
, sd_list_types_def types
)
1592 /* Some dep_link a pointer to which will return NULL. */
1593 static dep_link_t null_link
= NULL
;
1599 i
.linkp
= &null_link
;
1601 /* Avoid 'uninitialized warning'. */
1602 i
.resolved_p
= false;
1607 /* Return the current element. */
1609 sd_iterator_cond (sd_iterator_def
*it_ptr
, dep_t
*dep_ptr
)
1613 dep_link_t link
= *it_ptr
->linkp
;
1617 *dep_ptr
= DEP_LINK_DEP (link
);
1622 sd_list_types_def types
= it_ptr
->types
;
1624 if (types
!= SD_LIST_NONE
)
1625 /* Switch to next list. */
1629 sd_next_list (it_ptr
->insn
,
1630 &it_ptr
->types
, &list
, &it_ptr
->resolved_p
);
1634 it_ptr
->linkp
= &DEPS_LIST_FIRST (list
);
1645 /* Advance iterator. */
1647 sd_iterator_next (sd_iterator_def
*it_ptr
)
1649 it_ptr
->linkp
= &DEP_LINK_NEXT (*it_ptr
->linkp
);
1652 /* A cycle wrapper. */
1653 #define FOR_EACH_DEP(INSN, LIST_TYPES, ITER, DEP) \
1654 for ((ITER) = sd_iterator_start ((INSN), (LIST_TYPES)); \
1655 sd_iterator_cond (&(ITER), &(DEP)); \
1656 sd_iterator_next (&(ITER)))
1658 #define IS_DISPATCH_ON 1
1660 #define DISPATCH_VIOLATION 3
1661 #define FITS_DISPATCH_WINDOW 4
1662 #define DISPATCH_INIT 5
1663 #define ADD_TO_DISPATCH_WINDOW 6
1665 extern int sd_lists_size (const_rtx
, sd_list_types_def
);
1666 extern bool sd_lists_empty_p (const_rtx
, sd_list_types_def
);
1667 extern void sd_init_insn (rtx_insn
*);
1668 extern void sd_finish_insn (rtx_insn
*);
1669 extern dep_t
sd_find_dep_between (rtx
, rtx
, bool);
1670 extern void sd_add_dep (dep_t
, bool);
1671 extern enum DEPS_ADJUST_RESULT
sd_add_or_update_dep (dep_t
, bool);
1672 extern void sd_resolve_dep (sd_iterator_def
);
1673 extern void sd_unresolve_dep (sd_iterator_def
);
1674 extern void sd_copy_back_deps (rtx_insn
*, rtx_insn
*, bool);
1675 extern void sd_delete_dep (sd_iterator_def
);
1676 extern void sd_debug_lists (rtx
, sd_list_types_def
);
1678 /* Macros and declarations for scheduling fusion. */
1679 #define FUSION_MAX_PRIORITY (INT_MAX)
1680 extern bool sched_fusion
;
1682 #endif /* INSN_SCHEDULING */
1684 #endif /* GCC_SCHED_INT_H */