remove elim_graph typedef
[gcc.git] / gcc / store-motion.c
1 /* Store motion via Lazy Code Motion on the reverse CFG.
2 Copyright (C) 1997-2016 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "backend.h"
24 #include "rtl.h"
25 #include "tree.h"
26 #include "predict.h"
27 #include "df.h"
28 #include "toplev.h"
29
30 #include "cfgrtl.h"
31 #include "cfganal.h"
32 #include "lcm.h"
33 #include "cfgcleanup.h"
34 #include "expr.h"
35 #include "tree-pass.h"
36 #include "dbgcnt.h"
37 #include "rtl-iter.h"
38 #include "print-rtl.h"
39
40 /* This pass implements downward store motion.
41 As of May 1, 2009, the pass is not enabled by default on any target,
42 but bootstrap completes on ia64 and x86_64 with the pass enabled. */
43
44 /* TODO:
45 - remove_reachable_equiv_notes is an incomprehensible pile of goo and
46 a compile time hog that needs a rewrite (maybe cache st_exprs to
47 invalidate REG_EQUAL/REG_EQUIV notes for?).
48 - pattern_regs in st_expr should be a regset (on its own obstack).
49 - store_motion_mems should be a vec instead of a list.
50 - there should be an alloc pool for struct st_expr objects.
51 - investigate whether it is helpful to make the address of an st_expr
52 a cselib VALUE.
53 - when GIMPLE alias information is exported, the effectiveness of this
54 pass should be re-evaluated.
55 */
56
57 /* This is a list of store expressions (MEMs). The structure is used
58 as an expression table to track stores which look interesting, and
59 might be moveable towards the exit block. */
60
61 struct st_expr
62 {
63 /* Pattern of this mem. */
64 rtx pattern;
65 /* List of registers mentioned by the mem. */
66 rtx pattern_regs;
67 /* INSN list of stores that are locally anticipatable. */
68 vec<rtx_insn *> antic_stores;
69 /* INSN list of stores that are locally available. */
70 vec<rtx_insn *> avail_stores;
71 /* Next in the list. */
72 struct st_expr * next;
73 /* Store ID in the dataflow bitmaps. */
74 int index;
75 /* Hash value for the hash table. */
76 unsigned int hash_index;
77 /* Register holding the stored expression when a store is moved.
78 This field is also used as a cache in find_moveable_store, see
79 LAST_AVAIL_CHECK_FAILURE below. */
80 rtx reaching_reg;
81 };
82
83 /* Head of the list of load/store memory refs. */
84 static struct st_expr * store_motion_mems = NULL;
85
86 /* These bitmaps will hold the local dataflow properties per basic block. */
87 static sbitmap *st_kill, *st_avloc, *st_antloc, *st_transp;
88
89 /* Nonzero for expressions which should be inserted on a specific edge. */
90 static sbitmap *st_insert_map;
91
92 /* Nonzero for expressions which should be deleted in a specific block. */
93 static sbitmap *st_delete_map;
94
95 /* Global holding the number of store expressions we are dealing with. */
96 static int num_stores;
97
98 /* Contains the edge_list returned by pre_edge_lcm. */
99 static struct edge_list *edge_list;
100
101 /* Hashtable helpers. */
102
103 struct st_expr_hasher : nofree_ptr_hash <st_expr>
104 {
105 static inline hashval_t hash (const st_expr *);
106 static inline bool equal (const st_expr *, const st_expr *);
107 };
108
109 inline hashval_t
110 st_expr_hasher::hash (const st_expr *x)
111 {
112 int do_not_record_p = 0;
113 return hash_rtx (x->pattern, GET_MODE (x->pattern), &do_not_record_p, NULL, false);
114 }
115
116 inline bool
117 st_expr_hasher::equal (const st_expr *ptr1, const st_expr *ptr2)
118 {
119 return exp_equiv_p (ptr1->pattern, ptr2->pattern, 0, true);
120 }
121
122 /* Hashtable for the load/store memory refs. */
123 static hash_table<st_expr_hasher> *store_motion_mems_table;
124
125 /* This will search the st_expr list for a matching expression. If it
126 doesn't find one, we create one and initialize it. */
127
128 static struct st_expr *
129 st_expr_entry (rtx x)
130 {
131 int do_not_record_p = 0;
132 struct st_expr * ptr;
133 unsigned int hash;
134 st_expr **slot;
135 struct st_expr e;
136
137 hash = hash_rtx (x, GET_MODE (x), &do_not_record_p,
138 NULL, /*have_reg_qty=*/false);
139
140 e.pattern = x;
141 slot = store_motion_mems_table->find_slot_with_hash (&e, hash, INSERT);
142 if (*slot)
143 return *slot;
144
145 ptr = XNEW (struct st_expr);
146
147 ptr->next = store_motion_mems;
148 ptr->pattern = x;
149 ptr->pattern_regs = NULL_RTX;
150 ptr->antic_stores.create (0);
151 ptr->avail_stores.create (0);
152 ptr->reaching_reg = NULL_RTX;
153 ptr->index = 0;
154 ptr->hash_index = hash;
155 store_motion_mems = ptr;
156 *slot = ptr;
157
158 return ptr;
159 }
160
161 /* Free up an individual st_expr entry. */
162
163 static void
164 free_st_expr_entry (struct st_expr * ptr)
165 {
166 ptr->antic_stores.release ();
167 ptr->avail_stores.release ();
168
169 free (ptr);
170 }
171
172 /* Free up all memory associated with the st_expr list. */
173
174 static void
175 free_store_motion_mems (void)
176 {
177 delete store_motion_mems_table;
178 store_motion_mems_table = NULL;
179
180 while (store_motion_mems)
181 {
182 struct st_expr * tmp = store_motion_mems;
183 store_motion_mems = store_motion_mems->next;
184 free_st_expr_entry (tmp);
185 }
186 store_motion_mems = NULL;
187 }
188
189 /* Assign each element of the list of mems a monotonically increasing value. */
190
191 static int
192 enumerate_store_motion_mems (void)
193 {
194 struct st_expr * ptr;
195 int n = 0;
196
197 for (ptr = store_motion_mems; ptr != NULL; ptr = ptr->next)
198 ptr->index = n++;
199
200 return n;
201 }
202
203 /* Return first item in the list. */
204
205 static inline struct st_expr *
206 first_st_expr (void)
207 {
208 return store_motion_mems;
209 }
210
211 /* Return the next item in the list after the specified one. */
212
213 static inline struct st_expr *
214 next_st_expr (struct st_expr * ptr)
215 {
216 return ptr->next;
217 }
218
219 /* Dump debugging info about the store_motion_mems list. */
220
221 static void
222 print_store_motion_mems (FILE * file)
223 {
224 struct st_expr * ptr;
225
226 fprintf (dump_file, "STORE_MOTION list of MEM exprs considered:\n");
227
228 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
229 {
230 fprintf (file, " Pattern (%3d): ", ptr->index);
231
232 print_rtl (file, ptr->pattern);
233
234 fprintf (file, "\n ANTIC stores : ");
235 print_rtx_insn_vec (file, ptr->antic_stores);
236
237 fprintf (file, "\n AVAIL stores : ");
238
239 print_rtx_insn_vec (file, ptr->avail_stores);
240
241 fprintf (file, "\n\n");
242 }
243
244 fprintf (file, "\n");
245 }
246 \f
247 /* Return zero if some of the registers in list X are killed
248 due to set of registers in bitmap REGS_SET. */
249
250 static bool
251 store_ops_ok (const_rtx x, int *regs_set)
252 {
253 const_rtx reg;
254
255 for (; x; x = XEXP (x, 1))
256 {
257 reg = XEXP (x, 0);
258 if (regs_set[REGNO (reg)])
259 return false;
260 }
261
262 return true;
263 }
264
265 /* Returns a list of registers mentioned in X.
266 FIXME: A regset would be prettier and less expensive. */
267
268 static rtx_expr_list *
269 extract_mentioned_regs (rtx x)
270 {
271 rtx_expr_list *mentioned_regs = NULL;
272 subrtx_var_iterator::array_type array;
273 FOR_EACH_SUBRTX_VAR (iter, array, x, NONCONST)
274 {
275 rtx x = *iter;
276 if (REG_P (x))
277 mentioned_regs = alloc_EXPR_LIST (0, x, mentioned_regs);
278 }
279 return mentioned_regs;
280 }
281
282 /* Check to see if the load X is aliased with STORE_PATTERN.
283 AFTER is true if we are checking the case when STORE_PATTERN occurs
284 after the X. */
285
286 static bool
287 load_kills_store (const_rtx x, const_rtx store_pattern, int after)
288 {
289 if (after)
290 return anti_dependence (x, store_pattern);
291 else
292 return true_dependence (store_pattern, GET_MODE (store_pattern), x);
293 }
294
295 /* Go through the entire rtx X, looking for any loads which might alias
296 STORE_PATTERN. Return true if found.
297 AFTER is true if we are checking the case when STORE_PATTERN occurs
298 after the insn X. */
299
300 static bool
301 find_loads (const_rtx x, const_rtx store_pattern, int after)
302 {
303 const char * fmt;
304 int i, j;
305 int ret = false;
306
307 if (!x)
308 return false;
309
310 if (GET_CODE (x) == SET)
311 x = SET_SRC (x);
312
313 if (MEM_P (x))
314 {
315 if (load_kills_store (x, store_pattern, after))
316 return true;
317 }
318
319 /* Recursively process the insn. */
320 fmt = GET_RTX_FORMAT (GET_CODE (x));
321
322 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0 && !ret; i--)
323 {
324 if (fmt[i] == 'e')
325 ret |= find_loads (XEXP (x, i), store_pattern, after);
326 else if (fmt[i] == 'E')
327 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
328 ret |= find_loads (XVECEXP (x, i, j), store_pattern, after);
329 }
330 return ret;
331 }
332
333 /* Go through pattern PAT looking for any loads which might kill the
334 store in X. Return true if found.
335 AFTER is true if we are checking the case when loads kill X occurs
336 after the insn for PAT. */
337
338 static inline bool
339 store_killed_in_pat (const_rtx x, const_rtx pat, int after)
340 {
341 if (GET_CODE (pat) == SET)
342 {
343 rtx dest = SET_DEST (pat);
344
345 if (GET_CODE (dest) == ZERO_EXTRACT)
346 dest = XEXP (dest, 0);
347
348 /* Check for memory stores to aliased objects. */
349 if (MEM_P (dest)
350 && !exp_equiv_p (dest, x, 0, true))
351 {
352 if (after)
353 {
354 if (output_dependence (dest, x))
355 return true;
356 }
357 else
358 {
359 if (output_dependence (x, dest))
360 return true;
361 }
362 }
363 }
364
365 if (find_loads (pat, x, after))
366 return true;
367
368 return false;
369 }
370
371 /* Check if INSN kills the store pattern X (is aliased with it).
372 AFTER is true if we are checking the case when store X occurs
373 after the insn. Return true if it does. */
374
375 static bool
376 store_killed_in_insn (const_rtx x, const_rtx x_regs, const rtx_insn *insn, int after)
377 {
378 const_rtx reg, note, pat;
379
380 if (! NONDEBUG_INSN_P (insn))
381 return false;
382
383 if (CALL_P (insn))
384 {
385 /* A normal or pure call might read from pattern,
386 but a const call will not. */
387 if (!RTL_CONST_CALL_P (insn))
388 return true;
389
390 /* But even a const call reads its parameters. Check whether the
391 base of some of registers used in mem is stack pointer. */
392 for (reg = x_regs; reg; reg = XEXP (reg, 1))
393 if (may_be_sp_based_p (XEXP (reg, 0)))
394 return true;
395
396 return false;
397 }
398
399 pat = PATTERN (insn);
400 if (GET_CODE (pat) == SET)
401 {
402 if (store_killed_in_pat (x, pat, after))
403 return true;
404 }
405 else if (GET_CODE (pat) == PARALLEL)
406 {
407 int i;
408
409 for (i = 0; i < XVECLEN (pat, 0); i++)
410 if (store_killed_in_pat (x, XVECEXP (pat, 0, i), after))
411 return true;
412 }
413 else if (find_loads (PATTERN (insn), x, after))
414 return true;
415
416 /* If this insn has a REG_EQUAL or REG_EQUIV note referencing a memory
417 location aliased with X, then this insn kills X. */
418 note = find_reg_equal_equiv_note (insn);
419 if (! note)
420 return false;
421 note = XEXP (note, 0);
422
423 /* However, if the note represents a must alias rather than a may
424 alias relationship, then it does not kill X. */
425 if (exp_equiv_p (note, x, 0, true))
426 return false;
427
428 /* See if there are any aliased loads in the note. */
429 return find_loads (note, x, after);
430 }
431
432 /* Returns true if the expression X is loaded or clobbered on or after INSN
433 within basic block BB. REGS_SET_AFTER is bitmap of registers set in
434 or after the insn. X_REGS is list of registers mentioned in X. If the store
435 is killed, return the last insn in that it occurs in FAIL_INSN. */
436
437 static bool
438 store_killed_after (const_rtx x, const_rtx x_regs, const rtx_insn *insn,
439 const_basic_block bb,
440 int *regs_set_after, rtx *fail_insn)
441 {
442 rtx_insn *last = BB_END (bb), *act;
443
444 if (!store_ops_ok (x_regs, regs_set_after))
445 {
446 /* We do not know where it will happen. */
447 if (fail_insn)
448 *fail_insn = NULL_RTX;
449 return true;
450 }
451
452 /* Scan from the end, so that fail_insn is determined correctly. */
453 for (act = last; act != PREV_INSN (insn); act = PREV_INSN (act))
454 if (store_killed_in_insn (x, x_regs, act, false))
455 {
456 if (fail_insn)
457 *fail_insn = act;
458 return true;
459 }
460
461 return false;
462 }
463
464 /* Returns true if the expression X is loaded or clobbered on or before INSN
465 within basic block BB. X_REGS is list of registers mentioned in X.
466 REGS_SET_BEFORE is bitmap of registers set before or in this insn. */
467 static bool
468 store_killed_before (const_rtx x, const_rtx x_regs, const rtx_insn *insn,
469 const_basic_block bb, int *regs_set_before)
470 {
471 rtx_insn *first = BB_HEAD (bb);
472
473 if (!store_ops_ok (x_regs, regs_set_before))
474 return true;
475
476 for ( ; insn != PREV_INSN (first); insn = PREV_INSN (insn))
477 if (store_killed_in_insn (x, x_regs, insn, true))
478 return true;
479
480 return false;
481 }
482
483 /* The last insn in the basic block that compute_store_table is processing,
484 where store_killed_after is true for X.
485 Since we go through the basic block from BB_END to BB_HEAD, this is
486 also the available store at the end of the basic block. Therefore
487 this is in effect a cache, to avoid calling store_killed_after for
488 equivalent aliasing store expressions.
489 This value is only meaningful during the computation of the store
490 table. We hi-jack the REACHING_REG field of struct st_expr to save
491 a bit of memory. */
492 #define LAST_AVAIL_CHECK_FAILURE(x) ((x)->reaching_reg)
493
494 /* Determine whether INSN is MEM store pattern that we will consider moving.
495 REGS_SET_BEFORE is bitmap of registers set before (and including) the
496 current insn, REGS_SET_AFTER is bitmap of registers set after (and
497 including) the insn in this basic block. We must be passing through BB from
498 head to end, as we are using this fact to speed things up.
499
500 The results are stored this way:
501
502 -- the first anticipatable expression is added into ANTIC_STORES
503 -- if the processed expression is not anticipatable, NULL_RTX is added
504 there instead, so that we can use it as indicator that no further
505 expression of this type may be anticipatable
506 -- if the expression is available, it is added as head of AVAIL_STORES;
507 consequently, all of them but this head are dead and may be deleted.
508 -- if the expression is not available, the insn due to that it fails to be
509 available is stored in REACHING_REG (via LAST_AVAIL_CHECK_FAILURE).
510
511 The things are complicated a bit by fact that there already may be stores
512 to the same MEM from other blocks; also caller must take care of the
513 necessary cleanup of the temporary markers after end of the basic block.
514 */
515
516 static void
517 find_moveable_store (rtx_insn *insn, int *regs_set_before, int *regs_set_after)
518 {
519 struct st_expr * ptr;
520 rtx dest, set;
521 int check_anticipatable, check_available;
522 basic_block bb = BLOCK_FOR_INSN (insn);
523
524 set = single_set (insn);
525 if (!set)
526 return;
527
528 dest = SET_DEST (set);
529
530 if (! MEM_P (dest) || MEM_VOLATILE_P (dest)
531 || GET_MODE (dest) == BLKmode)
532 return;
533
534 if (side_effects_p (dest))
535 return;
536
537 /* If we are handling exceptions, we must be careful with memory references
538 that may trap. If we are not, the behavior is undefined, so we may just
539 continue. */
540 if (cfun->can_throw_non_call_exceptions && may_trap_p (dest))
541 return;
542
543 /* Even if the destination cannot trap, the source may. In this case we'd
544 need to handle updating the REG_EH_REGION note. */
545 if (find_reg_note (insn, REG_EH_REGION, NULL_RTX))
546 return;
547
548 /* Make sure that the SET_SRC of this store insns can be assigned to
549 a register, or we will fail later on in replace_store_insn, which
550 assumes that we can do this. But sometimes the target machine has
551 oddities like MEM read-modify-write instruction. See for example
552 PR24257. */
553 if (!can_assign_to_reg_without_clobbers_p (SET_SRC (set),
554 GET_MODE (SET_SRC (set))))
555 return;
556
557 ptr = st_expr_entry (dest);
558 if (!ptr->pattern_regs)
559 ptr->pattern_regs = extract_mentioned_regs (dest);
560
561 /* Do not check for anticipatability if we either found one anticipatable
562 store already, or tested for one and found out that it was killed. */
563 check_anticipatable = 0;
564 if (ptr->antic_stores.is_empty ())
565 check_anticipatable = 1;
566 else
567 {
568 rtx_insn *tmp = ptr->antic_stores.last ();
569 if (tmp != NULL_RTX
570 && BLOCK_FOR_INSN (tmp) != bb)
571 check_anticipatable = 1;
572 }
573 if (check_anticipatable)
574 {
575 rtx_insn *tmp;
576 if (store_killed_before (dest, ptr->pattern_regs, insn, bb, regs_set_before))
577 tmp = NULL;
578 else
579 tmp = insn;
580 ptr->antic_stores.safe_push (tmp);
581 }
582
583 /* It is not necessary to check whether store is available if we did
584 it successfully before; if we failed before, do not bother to check
585 until we reach the insn that caused us to fail. */
586 check_available = 0;
587 if (ptr->avail_stores.is_empty ())
588 check_available = 1;
589 else
590 {
591 rtx_insn *tmp = ptr->avail_stores.last ();
592 if (BLOCK_FOR_INSN (tmp) != bb)
593 check_available = 1;
594 }
595 if (check_available)
596 {
597 /* Check that we have already reached the insn at that the check
598 failed last time. */
599 if (LAST_AVAIL_CHECK_FAILURE (ptr))
600 {
601 rtx_insn *tmp;
602 for (tmp = BB_END (bb);
603 tmp != insn && tmp != LAST_AVAIL_CHECK_FAILURE (ptr);
604 tmp = PREV_INSN (tmp))
605 continue;
606 if (tmp == insn)
607 check_available = 0;
608 }
609 else
610 check_available = store_killed_after (dest, ptr->pattern_regs, insn,
611 bb, regs_set_after,
612 &LAST_AVAIL_CHECK_FAILURE (ptr));
613 }
614 if (!check_available)
615 ptr->avail_stores.safe_push (insn);
616 }
617
618 /* Find available and anticipatable stores. */
619
620 static int
621 compute_store_table (void)
622 {
623 int ret;
624 basic_block bb;
625 rtx_insn *insn;
626 rtx_insn *tmp;
627 df_ref def;
628 int *last_set_in, *already_set;
629 struct st_expr * ptr, **prev_next_ptr_ptr;
630 unsigned int max_gcse_regno = max_reg_num ();
631
632 store_motion_mems = NULL;
633 store_motion_mems_table = new hash_table<st_expr_hasher> (13);
634 last_set_in = XCNEWVEC (int, max_gcse_regno);
635 already_set = XNEWVEC (int, max_gcse_regno);
636
637 /* Find all the stores we care about. */
638 FOR_EACH_BB_FN (bb, cfun)
639 {
640 /* First compute the registers set in this block. */
641 FOR_BB_INSNS (bb, insn)
642 {
643
644 if (! NONDEBUG_INSN_P (insn))
645 continue;
646
647 FOR_EACH_INSN_DEF (def, insn)
648 last_set_in[DF_REF_REGNO (def)] = INSN_UID (insn);
649 }
650
651 /* Now find the stores. */
652 memset (already_set, 0, sizeof (int) * max_gcse_regno);
653 FOR_BB_INSNS (bb, insn)
654 {
655 if (! NONDEBUG_INSN_P (insn))
656 continue;
657
658 FOR_EACH_INSN_DEF (def, insn)
659 already_set[DF_REF_REGNO (def)] = INSN_UID (insn);
660
661 /* Now that we've marked regs, look for stores. */
662 find_moveable_store (insn, already_set, last_set_in);
663
664 /* Unmark regs that are no longer set. */
665 FOR_EACH_INSN_DEF (def, insn)
666 if (last_set_in[DF_REF_REGNO (def)] == INSN_UID (insn))
667 last_set_in[DF_REF_REGNO (def)] = 0;
668 }
669
670 if (flag_checking)
671 {
672 /* last_set_in should now be all-zero. */
673 for (unsigned regno = 0; regno < max_gcse_regno; regno++)
674 gcc_assert (!last_set_in[regno]);
675 }
676
677 /* Clear temporary marks. */
678 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
679 {
680 LAST_AVAIL_CHECK_FAILURE (ptr) = NULL_RTX;
681 if (!ptr->antic_stores.is_empty ()
682 && (tmp = ptr->antic_stores.last ()) == NULL)
683 ptr->antic_stores.pop ();
684 }
685 }
686
687 /* Remove the stores that are not available anywhere, as there will
688 be no opportunity to optimize them. */
689 for (ptr = store_motion_mems, prev_next_ptr_ptr = &store_motion_mems;
690 ptr != NULL;
691 ptr = *prev_next_ptr_ptr)
692 {
693 if (ptr->avail_stores.is_empty ())
694 {
695 *prev_next_ptr_ptr = ptr->next;
696 store_motion_mems_table->remove_elt_with_hash (ptr, ptr->hash_index);
697 free_st_expr_entry (ptr);
698 }
699 else
700 prev_next_ptr_ptr = &ptr->next;
701 }
702
703 ret = enumerate_store_motion_mems ();
704
705 if (dump_file)
706 print_store_motion_mems (dump_file);
707
708 free (last_set_in);
709 free (already_set);
710 return ret;
711 }
712
713 /* In all code following after this, REACHING_REG has its original
714 meaning again. Avoid confusion, and undef the accessor macro for
715 the temporary marks usage in compute_store_table. */
716 #undef LAST_AVAIL_CHECK_FAILURE
717
718 /* Insert an instruction at the beginning of a basic block, and update
719 the BB_HEAD if needed. */
720
721 static void
722 insert_insn_start_basic_block (rtx_insn *insn, basic_block bb)
723 {
724 /* Insert at start of successor block. */
725 rtx_insn *prev = PREV_INSN (BB_HEAD (bb));
726 rtx_insn *before = BB_HEAD (bb);
727 while (before != 0)
728 {
729 if (! LABEL_P (before)
730 && !NOTE_INSN_BASIC_BLOCK_P (before))
731 break;
732 prev = before;
733 if (prev == BB_END (bb))
734 break;
735 before = NEXT_INSN (before);
736 }
737
738 insn = emit_insn_after_noloc (insn, prev, bb);
739
740 if (dump_file)
741 {
742 fprintf (dump_file, "STORE_MOTION insert store at start of BB %d:\n",
743 bb->index);
744 print_inline_rtx (dump_file, insn, 6);
745 fprintf (dump_file, "\n");
746 }
747 }
748
749 /* This routine will insert a store on an edge. EXPR is the st_expr entry for
750 the memory reference, and E is the edge to insert it on. Returns nonzero
751 if an edge insertion was performed. */
752
753 static int
754 insert_store (struct st_expr * expr, edge e)
755 {
756 rtx reg;
757 rtx_insn *insn;
758 basic_block bb;
759 edge tmp;
760 edge_iterator ei;
761
762 /* We did all the deleted before this insert, so if we didn't delete a
763 store, then we haven't set the reaching reg yet either. */
764 if (expr->reaching_reg == NULL_RTX)
765 return 0;
766
767 if (e->flags & EDGE_FAKE)
768 return 0;
769
770 reg = expr->reaching_reg;
771 insn = gen_move_insn (copy_rtx (expr->pattern), reg);
772
773 /* If we are inserting this expression on ALL predecessor edges of a BB,
774 insert it at the start of the BB, and reset the insert bits on the other
775 edges so we don't try to insert it on the other edges. */
776 bb = e->dest;
777 FOR_EACH_EDGE (tmp, ei, e->dest->preds)
778 if (!(tmp->flags & EDGE_FAKE))
779 {
780 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
781
782 gcc_assert (index != EDGE_INDEX_NO_EDGE);
783 if (! bitmap_bit_p (st_insert_map[index], expr->index))
784 break;
785 }
786
787 /* If tmp is NULL, we found an insertion on every edge, blank the
788 insertion vector for these edges, and insert at the start of the BB. */
789 if (!tmp && bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
790 {
791 FOR_EACH_EDGE (tmp, ei, e->dest->preds)
792 {
793 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
794 bitmap_clear_bit (st_insert_map[index], expr->index);
795 }
796 insert_insn_start_basic_block (insn, bb);
797 return 0;
798 }
799
800 /* We can't put stores in the front of blocks pointed to by abnormal
801 edges since that may put a store where one didn't used to be. */
802 gcc_assert (!(e->flags & EDGE_ABNORMAL));
803
804 insert_insn_on_edge (insn, e);
805
806 if (dump_file)
807 {
808 fprintf (dump_file, "STORE_MOTION insert insn on edge (%d, %d):\n",
809 e->src->index, e->dest->index);
810 print_inline_rtx (dump_file, insn, 6);
811 fprintf (dump_file, "\n");
812 }
813
814 return 1;
815 }
816
817 /* Remove any REG_EQUAL or REG_EQUIV notes containing a reference to the
818 memory location in SMEXPR set in basic block BB.
819
820 This could be rather expensive. */
821
822 static void
823 remove_reachable_equiv_notes (basic_block bb, struct st_expr *smexpr)
824 {
825 edge_iterator *stack, ei;
826 int sp;
827 edge act;
828 auto_sbitmap visited (last_basic_block_for_fn (cfun));
829 rtx note;
830 rtx_insn *insn;
831 rtx mem = smexpr->pattern;
832
833 stack = XNEWVEC (edge_iterator, n_basic_blocks_for_fn (cfun));
834 sp = 0;
835 ei = ei_start (bb->succs);
836
837 bitmap_clear (visited);
838
839 act = (EDGE_COUNT (ei_container (ei)) > 0 ? EDGE_I (ei_container (ei), 0) : NULL);
840 while (1)
841 {
842 if (!act)
843 {
844 if (!sp)
845 {
846 free (stack);
847 return;
848 }
849 act = ei_edge (stack[--sp]);
850 }
851 bb = act->dest;
852
853 if (bb == EXIT_BLOCK_PTR_FOR_FN (cfun)
854 || bitmap_bit_p (visited, bb->index))
855 {
856 if (!ei_end_p (ei))
857 ei_next (&ei);
858 act = (! ei_end_p (ei)) ? ei_edge (ei) : NULL;
859 continue;
860 }
861 bitmap_set_bit (visited, bb->index);
862
863 rtx_insn *last;
864 if (bitmap_bit_p (st_antloc[bb->index], smexpr->index))
865 {
866 unsigned int i;
867 FOR_EACH_VEC_ELT_REVERSE (smexpr->antic_stores, i, last)
868 if (BLOCK_FOR_INSN (last) == bb)
869 break;
870 }
871 else
872 last = NEXT_INSN (BB_END (bb));
873
874 for (insn = BB_HEAD (bb); insn != last; insn = NEXT_INSN (insn))
875 if (NONDEBUG_INSN_P (insn))
876 {
877 note = find_reg_equal_equiv_note (insn);
878 if (!note || !exp_equiv_p (XEXP (note, 0), mem, 0, true))
879 continue;
880
881 if (dump_file)
882 fprintf (dump_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n",
883 INSN_UID (insn));
884 remove_note (insn, note);
885 }
886
887 if (!ei_end_p (ei))
888 ei_next (&ei);
889 act = (! ei_end_p (ei)) ? ei_edge (ei) : NULL;
890
891 if (EDGE_COUNT (bb->succs) > 0)
892 {
893 if (act)
894 stack[sp++] = ei;
895 ei = ei_start (bb->succs);
896 act = (EDGE_COUNT (ei_container (ei)) > 0 ? EDGE_I (ei_container (ei), 0) : NULL);
897 }
898 }
899 }
900
901 /* This routine will replace a store with a SET to a specified register. */
902
903 static void
904 replace_store_insn (rtx reg, rtx_insn *del, basic_block bb,
905 struct st_expr *smexpr)
906 {
907 rtx_insn *insn;
908 rtx mem, note, set;
909
910 mem = smexpr->pattern;
911 insn = gen_move_insn (reg, SET_SRC (single_set (del)));
912
913 unsigned int i;
914 rtx_insn *temp;
915 FOR_EACH_VEC_ELT_REVERSE (smexpr->antic_stores, i, temp)
916 if (temp == del)
917 {
918 smexpr->antic_stores[i] = insn;
919 break;
920 }
921
922 /* Move the notes from the deleted insn to its replacement. */
923 REG_NOTES (insn) = REG_NOTES (del);
924
925 /* Emit the insn AFTER all the notes are transferred.
926 This is cheaper since we avoid df rescanning for the note change. */
927 insn = emit_insn_after (insn, del);
928
929 if (dump_file)
930 {
931 fprintf (dump_file,
932 "STORE_MOTION delete insn in BB %d:\n ", bb->index);
933 print_inline_rtx (dump_file, del, 6);
934 fprintf (dump_file, "\nSTORE_MOTION replaced with insn:\n ");
935 print_inline_rtx (dump_file, insn, 6);
936 fprintf (dump_file, "\n");
937 }
938
939 delete_insn (del);
940
941 /* Now we must handle REG_EQUAL notes whose contents is equal to the mem;
942 they are no longer accurate provided that they are reached by this
943 definition, so drop them. */
944 for (; insn != NEXT_INSN (BB_END (bb)); insn = NEXT_INSN (insn))
945 if (NONDEBUG_INSN_P (insn))
946 {
947 set = single_set (insn);
948 if (!set)
949 continue;
950 if (exp_equiv_p (SET_DEST (set), mem, 0, true))
951 return;
952 note = find_reg_equal_equiv_note (insn);
953 if (!note || !exp_equiv_p (XEXP (note, 0), mem, 0, true))
954 continue;
955
956 if (dump_file)
957 fprintf (dump_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n",
958 INSN_UID (insn));
959 remove_note (insn, note);
960 }
961 remove_reachable_equiv_notes (bb, smexpr);
962 }
963
964
965 /* Delete a store, but copy the value that would have been stored into
966 the reaching_reg for later storing. */
967
968 static void
969 delete_store (struct st_expr * expr, basic_block bb)
970 {
971 rtx reg;
972
973 if (expr->reaching_reg == NULL_RTX)
974 expr->reaching_reg = gen_reg_rtx_and_attrs (expr->pattern);
975
976 reg = expr->reaching_reg;
977
978 unsigned int len = expr->avail_stores.length ();
979 for (unsigned int i = len - 1; i < len; i--)
980 {
981 rtx_insn *del = expr->avail_stores[i];
982 if (BLOCK_FOR_INSN (del) == bb)
983 {
984 /* We know there is only one since we deleted redundant
985 ones during the available computation. */
986 replace_store_insn (reg, del, bb, expr);
987 break;
988 }
989 }
990 }
991
992 /* Fill in available, anticipatable, transparent and kill vectors in
993 STORE_DATA, based on lists of available and anticipatable stores. */
994 static void
995 build_store_vectors (void)
996 {
997 basic_block bb;
998 int *regs_set_in_block;
999 rtx_insn *insn;
1000 struct st_expr * ptr;
1001 unsigned int max_gcse_regno = max_reg_num ();
1002
1003 /* Build the gen_vector. This is any store in the table which is not killed
1004 by aliasing later in its block. */
1005 st_avloc = sbitmap_vector_alloc (last_basic_block_for_fn (cfun),
1006 num_stores);
1007 bitmap_vector_clear (st_avloc, last_basic_block_for_fn (cfun));
1008
1009 st_antloc = sbitmap_vector_alloc (last_basic_block_for_fn (cfun),
1010 num_stores);
1011 bitmap_vector_clear (st_antloc, last_basic_block_for_fn (cfun));
1012
1013 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
1014 {
1015 unsigned int len = ptr->avail_stores.length ();
1016 for (unsigned int i = len - 1; i < len; i--)
1017 {
1018 insn = ptr->avail_stores[i];
1019 bb = BLOCK_FOR_INSN (insn);
1020
1021 /* If we've already seen an available expression in this block,
1022 we can delete this one (It occurs earlier in the block). We'll
1023 copy the SRC expression to an unused register in case there
1024 are any side effects. */
1025 if (bitmap_bit_p (st_avloc[bb->index], ptr->index))
1026 {
1027 rtx r = gen_reg_rtx_and_attrs (ptr->pattern);
1028 if (dump_file)
1029 fprintf (dump_file, "Removing redundant store:\n");
1030 replace_store_insn (r, insn, bb, ptr);
1031 continue;
1032 }
1033 bitmap_set_bit (st_avloc[bb->index], ptr->index);
1034 }
1035
1036 unsigned int i;
1037 FOR_EACH_VEC_ELT_REVERSE (ptr->antic_stores, i, insn)
1038 {
1039 bb = BLOCK_FOR_INSN (insn);
1040 bitmap_set_bit (st_antloc[bb->index], ptr->index);
1041 }
1042 }
1043
1044 st_kill = sbitmap_vector_alloc (last_basic_block_for_fn (cfun), num_stores);
1045 bitmap_vector_clear (st_kill, last_basic_block_for_fn (cfun));
1046
1047 st_transp = sbitmap_vector_alloc (last_basic_block_for_fn (cfun), num_stores);
1048 bitmap_vector_clear (st_transp, last_basic_block_for_fn (cfun));
1049 regs_set_in_block = XNEWVEC (int, max_gcse_regno);
1050
1051 FOR_EACH_BB_FN (bb, cfun)
1052 {
1053 memset (regs_set_in_block, 0, sizeof (int) * max_gcse_regno);
1054
1055 FOR_BB_INSNS (bb, insn)
1056 if (NONDEBUG_INSN_P (insn))
1057 {
1058 df_ref def;
1059 FOR_EACH_INSN_DEF (def, insn)
1060 {
1061 unsigned int ref_regno = DF_REF_REGNO (def);
1062 if (ref_regno < max_gcse_regno)
1063 regs_set_in_block[DF_REF_REGNO (def)] = 1;
1064 }
1065 }
1066
1067 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
1068 {
1069 if (store_killed_after (ptr->pattern, ptr->pattern_regs, BB_HEAD (bb),
1070 bb, regs_set_in_block, NULL))
1071 {
1072 /* It should not be necessary to consider the expression
1073 killed if it is both anticipatable and available. */
1074 if (!bitmap_bit_p (st_antloc[bb->index], ptr->index)
1075 || !bitmap_bit_p (st_avloc[bb->index], ptr->index))
1076 bitmap_set_bit (st_kill[bb->index], ptr->index);
1077 }
1078 else
1079 bitmap_set_bit (st_transp[bb->index], ptr->index);
1080 }
1081 }
1082
1083 free (regs_set_in_block);
1084
1085 if (dump_file)
1086 {
1087 dump_bitmap_vector (dump_file, "st_antloc", "", st_antloc,
1088 last_basic_block_for_fn (cfun));
1089 dump_bitmap_vector (dump_file, "st_kill", "", st_kill,
1090 last_basic_block_for_fn (cfun));
1091 dump_bitmap_vector (dump_file, "st_transp", "", st_transp,
1092 last_basic_block_for_fn (cfun));
1093 dump_bitmap_vector (dump_file, "st_avloc", "", st_avloc,
1094 last_basic_block_for_fn (cfun));
1095 }
1096 }
1097
1098 /* Free memory used by store motion. */
1099
1100 static void
1101 free_store_memory (void)
1102 {
1103 free_store_motion_mems ();
1104
1105 if (st_avloc)
1106 sbitmap_vector_free (st_avloc);
1107 if (st_kill)
1108 sbitmap_vector_free (st_kill);
1109 if (st_transp)
1110 sbitmap_vector_free (st_transp);
1111 if (st_antloc)
1112 sbitmap_vector_free (st_antloc);
1113 if (st_insert_map)
1114 sbitmap_vector_free (st_insert_map);
1115 if (st_delete_map)
1116 sbitmap_vector_free (st_delete_map);
1117
1118 st_avloc = st_kill = st_transp = st_antloc = NULL;
1119 st_insert_map = st_delete_map = NULL;
1120 }
1121
1122 /* Perform store motion. Much like gcse, except we move expressions the
1123 other way by looking at the flowgraph in reverse.
1124 Return non-zero if transformations are performed by the pass. */
1125
1126 static int
1127 one_store_motion_pass (void)
1128 {
1129 basic_block bb;
1130 int x;
1131 struct st_expr * ptr;
1132 int did_edge_inserts = 0;
1133 int n_stores_deleted = 0;
1134 int n_stores_created = 0;
1135
1136 init_alias_analysis ();
1137
1138 /* Find all the available and anticipatable stores. */
1139 num_stores = compute_store_table ();
1140 if (num_stores == 0)
1141 {
1142 delete store_motion_mems_table;
1143 store_motion_mems_table = NULL;
1144 end_alias_analysis ();
1145 return 0;
1146 }
1147
1148 /* Now compute kill & transp vectors. */
1149 build_store_vectors ();
1150 add_noreturn_fake_exit_edges ();
1151 connect_infinite_loops_to_exit ();
1152
1153 edge_list = pre_edge_rev_lcm (num_stores, st_transp, st_avloc,
1154 st_antloc, st_kill, &st_insert_map,
1155 &st_delete_map);
1156
1157 /* Now we want to insert the new stores which are going to be needed. */
1158 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
1159 {
1160 /* If any of the edges we have above are abnormal, we can't move this
1161 store. */
1162 for (x = NUM_EDGES (edge_list) - 1; x >= 0; x--)
1163 if (bitmap_bit_p (st_insert_map[x], ptr->index)
1164 && (INDEX_EDGE (edge_list, x)->flags & EDGE_ABNORMAL))
1165 break;
1166
1167 if (x >= 0)
1168 {
1169 if (dump_file != NULL)
1170 fprintf (dump_file,
1171 "Can't replace store %d: abnormal edge from %d to %d\n",
1172 ptr->index, INDEX_EDGE (edge_list, x)->src->index,
1173 INDEX_EDGE (edge_list, x)->dest->index);
1174 continue;
1175 }
1176
1177 /* Now we want to insert the new stores which are going to be needed. */
1178
1179 FOR_EACH_BB_FN (bb, cfun)
1180 if (bitmap_bit_p (st_delete_map[bb->index], ptr->index))
1181 {
1182 delete_store (ptr, bb);
1183 n_stores_deleted++;
1184 }
1185
1186 for (x = 0; x < NUM_EDGES (edge_list); x++)
1187 if (bitmap_bit_p (st_insert_map[x], ptr->index))
1188 {
1189 did_edge_inserts |= insert_store (ptr, INDEX_EDGE (edge_list, x));
1190 n_stores_created++;
1191 }
1192 }
1193
1194 if (did_edge_inserts)
1195 commit_edge_insertions ();
1196
1197 free_store_memory ();
1198 free_edge_list (edge_list);
1199 remove_fake_exit_edges ();
1200 end_alias_analysis ();
1201
1202 if (dump_file)
1203 {
1204 fprintf (dump_file, "STORE_MOTION of %s, %d basic blocks, ",
1205 current_function_name (), n_basic_blocks_for_fn (cfun));
1206 fprintf (dump_file, "%d insns deleted, %d insns created\n",
1207 n_stores_deleted, n_stores_created);
1208 }
1209
1210 return (n_stores_deleted > 0 || n_stores_created > 0);
1211 }
1212
1213 \f
1214 static unsigned int
1215 execute_rtl_store_motion (void)
1216 {
1217 delete_unreachable_blocks ();
1218 df_analyze ();
1219 flag_rerun_cse_after_global_opts |= one_store_motion_pass ();
1220 return 0;
1221 }
1222
1223 namespace {
1224
1225 const pass_data pass_data_rtl_store_motion =
1226 {
1227 RTL_PASS, /* type */
1228 "store_motion", /* name */
1229 OPTGROUP_NONE, /* optinfo_flags */
1230 TV_LSM, /* tv_id */
1231 PROP_cfglayout, /* properties_required */
1232 0, /* properties_provided */
1233 0, /* properties_destroyed */
1234 0, /* todo_flags_start */
1235 TODO_df_finish, /* todo_flags_finish */
1236 };
1237
1238 class pass_rtl_store_motion : public rtl_opt_pass
1239 {
1240 public:
1241 pass_rtl_store_motion (gcc::context *ctxt)
1242 : rtl_opt_pass (pass_data_rtl_store_motion, ctxt)
1243 {}
1244
1245 /* opt_pass methods: */
1246 virtual bool gate (function *);
1247 virtual unsigned int execute (function *)
1248 {
1249 return execute_rtl_store_motion ();
1250 }
1251
1252 }; // class pass_rtl_store_motion
1253
1254 bool
1255 pass_rtl_store_motion::gate (function *fun)
1256 {
1257 return optimize > 0 && flag_gcse_sm
1258 && !fun->calls_setjmp
1259 && optimize_function_for_speed_p (fun)
1260 && dbg_cnt (store_motion);
1261 }
1262
1263 } // anon namespace
1264
1265 rtl_opt_pass *
1266 make_pass_rtl_store_motion (gcc::context *ctxt)
1267 {
1268 return new pass_rtl_store_motion (ctxt);
1269 }