decl.c (value_annotation_hasher::handle_cache_entry): Delete.
[gcc.git] / gcc / store-motion.c
1 /* Store motion via Lazy Code Motion on the reverse CFG.
2 Copyright (C) 1997-2015 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "diagnostic-core.h"
25 #include "toplev.h"
26
27 #include "rtl.h"
28 #include "alias.h"
29 #include "symtab.h"
30 #include "tree.h"
31 #include "tm_p.h"
32 #include "regs.h"
33 #include "hard-reg-set.h"
34 #include "flags.h"
35 #include "insn-config.h"
36 #include "recog.h"
37 #include "predict.h"
38 #include "function.h"
39 #include "dominance.h"
40 #include "cfg.h"
41 #include "cfgrtl.h"
42 #include "cfganal.h"
43 #include "lcm.h"
44 #include "cfgcleanup.h"
45 #include "basic-block.h"
46 #include "expmed.h"
47 #include "dojump.h"
48 #include "explow.h"
49 #include "calls.h"
50 #include "emit-rtl.h"
51 #include "varasm.h"
52 #include "stmt.h"
53 #include "expr.h"
54 #include "except.h"
55 #include "intl.h"
56 #include "tree-pass.h"
57 #include "df.h"
58 #include "dbgcnt.h"
59 #include "rtl-iter.h"
60
61 /* This pass implements downward store motion.
62 As of May 1, 2009, the pass is not enabled by default on any target,
63 but bootstrap completes on ia64 and x86_64 with the pass enabled. */
64
65 /* TODO:
66 - remove_reachable_equiv_notes is an incomprehensible pile of goo and
67 a compile time hog that needs a rewrite (maybe cache st_exprs to
68 invalidate REG_EQUAL/REG_EQUIV notes for?).
69 - pattern_regs in st_expr should be a regset (on its own obstack).
70 - antic_stores and avail_stores should be VECs instead of lists.
71 - store_motion_mems should be a vec instead of a list.
72 - there should be an alloc pool for struct st_expr objects.
73 - investigate whether it is helpful to make the address of an st_expr
74 a cselib VALUE.
75 - when GIMPLE alias information is exported, the effectiveness of this
76 pass should be re-evaluated.
77 */
78
79 /* This is a list of store expressions (MEMs). The structure is used
80 as an expression table to track stores which look interesting, and
81 might be moveable towards the exit block. */
82
83 struct st_expr
84 {
85 /* Pattern of this mem. */
86 rtx pattern;
87 /* List of registers mentioned by the mem. */
88 rtx pattern_regs;
89 /* INSN list of stores that are locally anticipatable. */
90 rtx_insn_list *antic_stores;
91 /* INSN list of stores that are locally available. */
92 rtx_insn_list *avail_stores;
93 /* Next in the list. */
94 struct st_expr * next;
95 /* Store ID in the dataflow bitmaps. */
96 int index;
97 /* Hash value for the hash table. */
98 unsigned int hash_index;
99 /* Register holding the stored expression when a store is moved.
100 This field is also used as a cache in find_moveable_store, see
101 LAST_AVAIL_CHECK_FAILURE below. */
102 rtx reaching_reg;
103 };
104
105 /* Head of the list of load/store memory refs. */
106 static struct st_expr * store_motion_mems = NULL;
107
108 /* These bitmaps will hold the local dataflow properties per basic block. */
109 static sbitmap *st_kill, *st_avloc, *st_antloc, *st_transp;
110
111 /* Nonzero for expressions which should be inserted on a specific edge. */
112 static sbitmap *st_insert_map;
113
114 /* Nonzero for expressions which should be deleted in a specific block. */
115 static sbitmap *st_delete_map;
116
117 /* Global holding the number of store expressions we are dealing with. */
118 static int num_stores;
119
120 /* Contains the edge_list returned by pre_edge_lcm. */
121 static struct edge_list *edge_list;
122
123 /* Hashtable helpers. */
124
125 struct st_expr_hasher : typed_noop_remove <st_expr>
126 {
127 typedef st_expr *value_type;
128 typedef st_expr *compare_type;
129 static inline hashval_t hash (const st_expr *);
130 static inline bool equal (const st_expr *, const st_expr *);
131 };
132
133 inline hashval_t
134 st_expr_hasher::hash (const st_expr *x)
135 {
136 int do_not_record_p = 0;
137 return hash_rtx (x->pattern, GET_MODE (x->pattern), &do_not_record_p, NULL, false);
138 }
139
140 inline bool
141 st_expr_hasher::equal (const st_expr *ptr1, const st_expr *ptr2)
142 {
143 return exp_equiv_p (ptr1->pattern, ptr2->pattern, 0, true);
144 }
145
146 /* Hashtable for the load/store memory refs. */
147 static hash_table<st_expr_hasher> *store_motion_mems_table;
148
149 /* This will search the st_expr list for a matching expression. If it
150 doesn't find one, we create one and initialize it. */
151
152 static struct st_expr *
153 st_expr_entry (rtx x)
154 {
155 int do_not_record_p = 0;
156 struct st_expr * ptr;
157 unsigned int hash;
158 st_expr **slot;
159 struct st_expr e;
160
161 hash = hash_rtx (x, GET_MODE (x), &do_not_record_p,
162 NULL, /*have_reg_qty=*/false);
163
164 e.pattern = x;
165 slot = store_motion_mems_table->find_slot_with_hash (&e, hash, INSERT);
166 if (*slot)
167 return *slot;
168
169 ptr = XNEW (struct st_expr);
170
171 ptr->next = store_motion_mems;
172 ptr->pattern = x;
173 ptr->pattern_regs = NULL_RTX;
174 ptr->antic_stores = NULL;
175 ptr->avail_stores = NULL;
176 ptr->reaching_reg = NULL_RTX;
177 ptr->index = 0;
178 ptr->hash_index = hash;
179 store_motion_mems = ptr;
180 *slot = ptr;
181
182 return ptr;
183 }
184
185 /* Free up an individual st_expr entry. */
186
187 static void
188 free_st_expr_entry (struct st_expr * ptr)
189 {
190 free_INSN_LIST_list (& ptr->antic_stores);
191 free_INSN_LIST_list (& ptr->avail_stores);
192
193 free (ptr);
194 }
195
196 /* Free up all memory associated with the st_expr list. */
197
198 static void
199 free_store_motion_mems (void)
200 {
201 delete store_motion_mems_table;
202 store_motion_mems_table = NULL;
203
204 while (store_motion_mems)
205 {
206 struct st_expr * tmp = store_motion_mems;
207 store_motion_mems = store_motion_mems->next;
208 free_st_expr_entry (tmp);
209 }
210 store_motion_mems = NULL;
211 }
212
213 /* Assign each element of the list of mems a monotonically increasing value. */
214
215 static int
216 enumerate_store_motion_mems (void)
217 {
218 struct st_expr * ptr;
219 int n = 0;
220
221 for (ptr = store_motion_mems; ptr != NULL; ptr = ptr->next)
222 ptr->index = n++;
223
224 return n;
225 }
226
227 /* Return first item in the list. */
228
229 static inline struct st_expr *
230 first_st_expr (void)
231 {
232 return store_motion_mems;
233 }
234
235 /* Return the next item in the list after the specified one. */
236
237 static inline struct st_expr *
238 next_st_expr (struct st_expr * ptr)
239 {
240 return ptr->next;
241 }
242
243 /* Dump debugging info about the store_motion_mems list. */
244
245 static void
246 print_store_motion_mems (FILE * file)
247 {
248 struct st_expr * ptr;
249
250 fprintf (dump_file, "STORE_MOTION list of MEM exprs considered:\n");
251
252 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
253 {
254 fprintf (file, " Pattern (%3d): ", ptr->index);
255
256 print_rtl (file, ptr->pattern);
257
258 fprintf (file, "\n ANTIC stores : ");
259
260 if (ptr->antic_stores)
261 print_rtl (file, ptr->antic_stores);
262 else
263 fprintf (file, "(nil)");
264
265 fprintf (file, "\n AVAIL stores : ");
266
267 if (ptr->avail_stores)
268 print_rtl (file, ptr->avail_stores);
269 else
270 fprintf (file, "(nil)");
271
272 fprintf (file, "\n\n");
273 }
274
275 fprintf (file, "\n");
276 }
277 \f
278 /* Return zero if some of the registers in list X are killed
279 due to set of registers in bitmap REGS_SET. */
280
281 static bool
282 store_ops_ok (const_rtx x, int *regs_set)
283 {
284 const_rtx reg;
285
286 for (; x; x = XEXP (x, 1))
287 {
288 reg = XEXP (x, 0);
289 if (regs_set[REGNO (reg)])
290 return false;
291 }
292
293 return true;
294 }
295
296 /* Returns a list of registers mentioned in X.
297 FIXME: A regset would be prettier and less expensive. */
298
299 static rtx_expr_list *
300 extract_mentioned_regs (rtx x)
301 {
302 rtx_expr_list *mentioned_regs = NULL;
303 subrtx_var_iterator::array_type array;
304 FOR_EACH_SUBRTX_VAR (iter, array, x, NONCONST)
305 {
306 rtx x = *iter;
307 if (REG_P (x))
308 mentioned_regs = alloc_EXPR_LIST (0, x, mentioned_regs);
309 }
310 return mentioned_regs;
311 }
312
313 /* Check to see if the load X is aliased with STORE_PATTERN.
314 AFTER is true if we are checking the case when STORE_PATTERN occurs
315 after the X. */
316
317 static bool
318 load_kills_store (const_rtx x, const_rtx store_pattern, int after)
319 {
320 if (after)
321 return anti_dependence (x, store_pattern);
322 else
323 return true_dependence (store_pattern, GET_MODE (store_pattern), x);
324 }
325
326 /* Go through the entire rtx X, looking for any loads which might alias
327 STORE_PATTERN. Return true if found.
328 AFTER is true if we are checking the case when STORE_PATTERN occurs
329 after the insn X. */
330
331 static bool
332 find_loads (const_rtx x, const_rtx store_pattern, int after)
333 {
334 const char * fmt;
335 int i, j;
336 int ret = false;
337
338 if (!x)
339 return false;
340
341 if (GET_CODE (x) == SET)
342 x = SET_SRC (x);
343
344 if (MEM_P (x))
345 {
346 if (load_kills_store (x, store_pattern, after))
347 return true;
348 }
349
350 /* Recursively process the insn. */
351 fmt = GET_RTX_FORMAT (GET_CODE (x));
352
353 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0 && !ret; i--)
354 {
355 if (fmt[i] == 'e')
356 ret |= find_loads (XEXP (x, i), store_pattern, after);
357 else if (fmt[i] == 'E')
358 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
359 ret |= find_loads (XVECEXP (x, i, j), store_pattern, after);
360 }
361 return ret;
362 }
363
364 /* Go through pattern PAT looking for any loads which might kill the
365 store in X. Return true if found.
366 AFTER is true if we are checking the case when loads kill X occurs
367 after the insn for PAT. */
368
369 static inline bool
370 store_killed_in_pat (const_rtx x, const_rtx pat, int after)
371 {
372 if (GET_CODE (pat) == SET)
373 {
374 rtx dest = SET_DEST (pat);
375
376 if (GET_CODE (dest) == ZERO_EXTRACT)
377 dest = XEXP (dest, 0);
378
379 /* Check for memory stores to aliased objects. */
380 if (MEM_P (dest)
381 && !exp_equiv_p (dest, x, 0, true))
382 {
383 if (after)
384 {
385 if (output_dependence (dest, x))
386 return true;
387 }
388 else
389 {
390 if (output_dependence (x, dest))
391 return true;
392 }
393 }
394 }
395
396 if (find_loads (pat, x, after))
397 return true;
398
399 return false;
400 }
401
402 /* Check if INSN kills the store pattern X (is aliased with it).
403 AFTER is true if we are checking the case when store X occurs
404 after the insn. Return true if it does. */
405
406 static bool
407 store_killed_in_insn (const_rtx x, const_rtx x_regs, const rtx_insn *insn, int after)
408 {
409 const_rtx reg, note, pat;
410
411 if (! NONDEBUG_INSN_P (insn))
412 return false;
413
414 if (CALL_P (insn))
415 {
416 /* A normal or pure call might read from pattern,
417 but a const call will not. */
418 if (!RTL_CONST_CALL_P (insn))
419 return true;
420
421 /* But even a const call reads its parameters. Check whether the
422 base of some of registers used in mem is stack pointer. */
423 for (reg = x_regs; reg; reg = XEXP (reg, 1))
424 if (may_be_sp_based_p (XEXP (reg, 0)))
425 return true;
426
427 return false;
428 }
429
430 pat = PATTERN (insn);
431 if (GET_CODE (pat) == SET)
432 {
433 if (store_killed_in_pat (x, pat, after))
434 return true;
435 }
436 else if (GET_CODE (pat) == PARALLEL)
437 {
438 int i;
439
440 for (i = 0; i < XVECLEN (pat, 0); i++)
441 if (store_killed_in_pat (x, XVECEXP (pat, 0, i), after))
442 return true;
443 }
444 else if (find_loads (PATTERN (insn), x, after))
445 return true;
446
447 /* If this insn has a REG_EQUAL or REG_EQUIV note referencing a memory
448 location aliased with X, then this insn kills X. */
449 note = find_reg_equal_equiv_note (insn);
450 if (! note)
451 return false;
452 note = XEXP (note, 0);
453
454 /* However, if the note represents a must alias rather than a may
455 alias relationship, then it does not kill X. */
456 if (exp_equiv_p (note, x, 0, true))
457 return false;
458
459 /* See if there are any aliased loads in the note. */
460 return find_loads (note, x, after);
461 }
462
463 /* Returns true if the expression X is loaded or clobbered on or after INSN
464 within basic block BB. REGS_SET_AFTER is bitmap of registers set in
465 or after the insn. X_REGS is list of registers mentioned in X. If the store
466 is killed, return the last insn in that it occurs in FAIL_INSN. */
467
468 static bool
469 store_killed_after (const_rtx x, const_rtx x_regs, const rtx_insn *insn,
470 const_basic_block bb,
471 int *regs_set_after, rtx *fail_insn)
472 {
473 rtx_insn *last = BB_END (bb), *act;
474
475 if (!store_ops_ok (x_regs, regs_set_after))
476 {
477 /* We do not know where it will happen. */
478 if (fail_insn)
479 *fail_insn = NULL_RTX;
480 return true;
481 }
482
483 /* Scan from the end, so that fail_insn is determined correctly. */
484 for (act = last; act != PREV_INSN (insn); act = PREV_INSN (act))
485 if (store_killed_in_insn (x, x_regs, act, false))
486 {
487 if (fail_insn)
488 *fail_insn = act;
489 return true;
490 }
491
492 return false;
493 }
494
495 /* Returns true if the expression X is loaded or clobbered on or before INSN
496 within basic block BB. X_REGS is list of registers mentioned in X.
497 REGS_SET_BEFORE is bitmap of registers set before or in this insn. */
498 static bool
499 store_killed_before (const_rtx x, const_rtx x_regs, const rtx_insn *insn,
500 const_basic_block bb, int *regs_set_before)
501 {
502 rtx_insn *first = BB_HEAD (bb);
503
504 if (!store_ops_ok (x_regs, regs_set_before))
505 return true;
506
507 for ( ; insn != PREV_INSN (first); insn = PREV_INSN (insn))
508 if (store_killed_in_insn (x, x_regs, insn, true))
509 return true;
510
511 return false;
512 }
513
514 /* The last insn in the basic block that compute_store_table is processing,
515 where store_killed_after is true for X.
516 Since we go through the basic block from BB_END to BB_HEAD, this is
517 also the available store at the end of the basic block. Therefore
518 this is in effect a cache, to avoid calling store_killed_after for
519 equivalent aliasing store expressions.
520 This value is only meaningful during the computation of the store
521 table. We hi-jack the REACHING_REG field of struct st_expr to save
522 a bit of memory. */
523 #define LAST_AVAIL_CHECK_FAILURE(x) ((x)->reaching_reg)
524
525 /* Determine whether INSN is MEM store pattern that we will consider moving.
526 REGS_SET_BEFORE is bitmap of registers set before (and including) the
527 current insn, REGS_SET_AFTER is bitmap of registers set after (and
528 including) the insn in this basic block. We must be passing through BB from
529 head to end, as we are using this fact to speed things up.
530
531 The results are stored this way:
532
533 -- the first anticipatable expression is added into ANTIC_STORES
534 -- if the processed expression is not anticipatable, NULL_RTX is added
535 there instead, so that we can use it as indicator that no further
536 expression of this type may be anticipatable
537 -- if the expression is available, it is added as head of AVAIL_STORES;
538 consequently, all of them but this head are dead and may be deleted.
539 -- if the expression is not available, the insn due to that it fails to be
540 available is stored in REACHING_REG (via LAST_AVAIL_CHECK_FAILURE).
541
542 The things are complicated a bit by fact that there already may be stores
543 to the same MEM from other blocks; also caller must take care of the
544 necessary cleanup of the temporary markers after end of the basic block.
545 */
546
547 static void
548 find_moveable_store (rtx_insn *insn, int *regs_set_before, int *regs_set_after)
549 {
550 struct st_expr * ptr;
551 rtx dest, set;
552 int check_anticipatable, check_available;
553 basic_block bb = BLOCK_FOR_INSN (insn);
554
555 set = single_set (insn);
556 if (!set)
557 return;
558
559 dest = SET_DEST (set);
560
561 if (! MEM_P (dest) || MEM_VOLATILE_P (dest)
562 || GET_MODE (dest) == BLKmode)
563 return;
564
565 if (side_effects_p (dest))
566 return;
567
568 /* If we are handling exceptions, we must be careful with memory references
569 that may trap. If we are not, the behavior is undefined, so we may just
570 continue. */
571 if (cfun->can_throw_non_call_exceptions && may_trap_p (dest))
572 return;
573
574 /* Even if the destination cannot trap, the source may. In this case we'd
575 need to handle updating the REG_EH_REGION note. */
576 if (find_reg_note (insn, REG_EH_REGION, NULL_RTX))
577 return;
578
579 /* Make sure that the SET_SRC of this store insns can be assigned to
580 a register, or we will fail later on in replace_store_insn, which
581 assumes that we can do this. But sometimes the target machine has
582 oddities like MEM read-modify-write instruction. See for example
583 PR24257. */
584 if (!can_assign_to_reg_without_clobbers_p (SET_SRC (set)))
585 return;
586
587 ptr = st_expr_entry (dest);
588 if (!ptr->pattern_regs)
589 ptr->pattern_regs = extract_mentioned_regs (dest);
590
591 /* Do not check for anticipatability if we either found one anticipatable
592 store already, or tested for one and found out that it was killed. */
593 check_anticipatable = 0;
594 if (!ptr->antic_stores)
595 check_anticipatable = 1;
596 else
597 {
598 rtx_insn *tmp = ptr->antic_stores->insn ();
599 if (tmp != NULL_RTX
600 && BLOCK_FOR_INSN (tmp) != bb)
601 check_anticipatable = 1;
602 }
603 if (check_anticipatable)
604 {
605 rtx_insn *tmp;
606 if (store_killed_before (dest, ptr->pattern_regs, insn, bb, regs_set_before))
607 tmp = NULL;
608 else
609 tmp = insn;
610 ptr->antic_stores = alloc_INSN_LIST (tmp, ptr->antic_stores);
611 }
612
613 /* It is not necessary to check whether store is available if we did
614 it successfully before; if we failed before, do not bother to check
615 until we reach the insn that caused us to fail. */
616 check_available = 0;
617 if (!ptr->avail_stores)
618 check_available = 1;
619 else
620 {
621 rtx_insn *tmp = ptr->avail_stores->insn ();
622 if (BLOCK_FOR_INSN (tmp) != bb)
623 check_available = 1;
624 }
625 if (check_available)
626 {
627 /* Check that we have already reached the insn at that the check
628 failed last time. */
629 if (LAST_AVAIL_CHECK_FAILURE (ptr))
630 {
631 rtx_insn *tmp;
632 for (tmp = BB_END (bb);
633 tmp != insn && tmp != LAST_AVAIL_CHECK_FAILURE (ptr);
634 tmp = PREV_INSN (tmp))
635 continue;
636 if (tmp == insn)
637 check_available = 0;
638 }
639 else
640 check_available = store_killed_after (dest, ptr->pattern_regs, insn,
641 bb, regs_set_after,
642 &LAST_AVAIL_CHECK_FAILURE (ptr));
643 }
644 if (!check_available)
645 ptr->avail_stores = alloc_INSN_LIST (insn, ptr->avail_stores);
646 }
647
648 /* Find available and anticipatable stores. */
649
650 static int
651 compute_store_table (void)
652 {
653 int ret;
654 basic_block bb;
655 #ifdef ENABLE_CHECKING
656 unsigned regno;
657 #endif
658 rtx_insn *insn;
659 rtx_insn *tmp;
660 df_ref def;
661 int *last_set_in, *already_set;
662 struct st_expr * ptr, **prev_next_ptr_ptr;
663 unsigned int max_gcse_regno = max_reg_num ();
664
665 store_motion_mems = NULL;
666 store_motion_mems_table = new hash_table<st_expr_hasher> (13);
667 last_set_in = XCNEWVEC (int, max_gcse_regno);
668 already_set = XNEWVEC (int, max_gcse_regno);
669
670 /* Find all the stores we care about. */
671 FOR_EACH_BB_FN (bb, cfun)
672 {
673 /* First compute the registers set in this block. */
674 FOR_BB_INSNS (bb, insn)
675 {
676
677 if (! NONDEBUG_INSN_P (insn))
678 continue;
679
680 FOR_EACH_INSN_DEF (def, insn)
681 last_set_in[DF_REF_REGNO (def)] = INSN_UID (insn);
682 }
683
684 /* Now find the stores. */
685 memset (already_set, 0, sizeof (int) * max_gcse_regno);
686 FOR_BB_INSNS (bb, insn)
687 {
688 if (! NONDEBUG_INSN_P (insn))
689 continue;
690
691 FOR_EACH_INSN_DEF (def, insn)
692 already_set[DF_REF_REGNO (def)] = INSN_UID (insn);
693
694 /* Now that we've marked regs, look for stores. */
695 find_moveable_store (insn, already_set, last_set_in);
696
697 /* Unmark regs that are no longer set. */
698 FOR_EACH_INSN_DEF (def, insn)
699 if (last_set_in[DF_REF_REGNO (def)] == INSN_UID (insn))
700 last_set_in[DF_REF_REGNO (def)] = 0;
701 }
702
703 #ifdef ENABLE_CHECKING
704 /* last_set_in should now be all-zero. */
705 for (regno = 0; regno < max_gcse_regno; regno++)
706 gcc_assert (!last_set_in[regno]);
707 #endif
708
709 /* Clear temporary marks. */
710 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
711 {
712 LAST_AVAIL_CHECK_FAILURE (ptr) = NULL_RTX;
713 if (ptr->antic_stores
714 && (tmp = ptr->antic_stores->insn ()) == NULL_RTX)
715 ptr->antic_stores = ptr->antic_stores->next ();
716 }
717 }
718
719 /* Remove the stores that are not available anywhere, as there will
720 be no opportunity to optimize them. */
721 for (ptr = store_motion_mems, prev_next_ptr_ptr = &store_motion_mems;
722 ptr != NULL;
723 ptr = *prev_next_ptr_ptr)
724 {
725 if (! ptr->avail_stores)
726 {
727 *prev_next_ptr_ptr = ptr->next;
728 store_motion_mems_table->remove_elt_with_hash (ptr, ptr->hash_index);
729 free_st_expr_entry (ptr);
730 }
731 else
732 prev_next_ptr_ptr = &ptr->next;
733 }
734
735 ret = enumerate_store_motion_mems ();
736
737 if (dump_file)
738 print_store_motion_mems (dump_file);
739
740 free (last_set_in);
741 free (already_set);
742 return ret;
743 }
744
745 /* In all code following after this, REACHING_REG has its original
746 meaning again. Avoid confusion, and undef the accessor macro for
747 the temporary marks usage in compute_store_table. */
748 #undef LAST_AVAIL_CHECK_FAILURE
749
750 /* Insert an instruction at the beginning of a basic block, and update
751 the BB_HEAD if needed. */
752
753 static void
754 insert_insn_start_basic_block (rtx_insn *insn, basic_block bb)
755 {
756 /* Insert at start of successor block. */
757 rtx_insn *prev = PREV_INSN (BB_HEAD (bb));
758 rtx_insn *before = BB_HEAD (bb);
759 while (before != 0)
760 {
761 if (! LABEL_P (before)
762 && !NOTE_INSN_BASIC_BLOCK_P (before))
763 break;
764 prev = before;
765 if (prev == BB_END (bb))
766 break;
767 before = NEXT_INSN (before);
768 }
769
770 insn = emit_insn_after_noloc (insn, prev, bb);
771
772 if (dump_file)
773 {
774 fprintf (dump_file, "STORE_MOTION insert store at start of BB %d:\n",
775 bb->index);
776 print_inline_rtx (dump_file, insn, 6);
777 fprintf (dump_file, "\n");
778 }
779 }
780
781 /* This routine will insert a store on an edge. EXPR is the st_expr entry for
782 the memory reference, and E is the edge to insert it on. Returns nonzero
783 if an edge insertion was performed. */
784
785 static int
786 insert_store (struct st_expr * expr, edge e)
787 {
788 rtx reg;
789 rtx_insn *insn;
790 basic_block bb;
791 edge tmp;
792 edge_iterator ei;
793
794 /* We did all the deleted before this insert, so if we didn't delete a
795 store, then we haven't set the reaching reg yet either. */
796 if (expr->reaching_reg == NULL_RTX)
797 return 0;
798
799 if (e->flags & EDGE_FAKE)
800 return 0;
801
802 reg = expr->reaching_reg;
803 insn = gen_move_insn (copy_rtx (expr->pattern), reg);
804
805 /* If we are inserting this expression on ALL predecessor edges of a BB,
806 insert it at the start of the BB, and reset the insert bits on the other
807 edges so we don't try to insert it on the other edges. */
808 bb = e->dest;
809 FOR_EACH_EDGE (tmp, ei, e->dest->preds)
810 if (!(tmp->flags & EDGE_FAKE))
811 {
812 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
813
814 gcc_assert (index != EDGE_INDEX_NO_EDGE);
815 if (! bitmap_bit_p (st_insert_map[index], expr->index))
816 break;
817 }
818
819 /* If tmp is NULL, we found an insertion on every edge, blank the
820 insertion vector for these edges, and insert at the start of the BB. */
821 if (!tmp && bb != EXIT_BLOCK_PTR_FOR_FN (cfun))
822 {
823 FOR_EACH_EDGE (tmp, ei, e->dest->preds)
824 {
825 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
826 bitmap_clear_bit (st_insert_map[index], expr->index);
827 }
828 insert_insn_start_basic_block (insn, bb);
829 return 0;
830 }
831
832 /* We can't put stores in the front of blocks pointed to by abnormal
833 edges since that may put a store where one didn't used to be. */
834 gcc_assert (!(e->flags & EDGE_ABNORMAL));
835
836 insert_insn_on_edge (insn, e);
837
838 if (dump_file)
839 {
840 fprintf (dump_file, "STORE_MOTION insert insn on edge (%d, %d):\n",
841 e->src->index, e->dest->index);
842 print_inline_rtx (dump_file, insn, 6);
843 fprintf (dump_file, "\n");
844 }
845
846 return 1;
847 }
848
849 /* Remove any REG_EQUAL or REG_EQUIV notes containing a reference to the
850 memory location in SMEXPR set in basic block BB.
851
852 This could be rather expensive. */
853
854 static void
855 remove_reachable_equiv_notes (basic_block bb, struct st_expr *smexpr)
856 {
857 edge_iterator *stack, ei;
858 int sp;
859 edge act;
860 sbitmap visited = sbitmap_alloc (last_basic_block_for_fn (cfun));
861 rtx last, note;
862 rtx_insn *insn;
863 rtx mem = smexpr->pattern;
864
865 stack = XNEWVEC (edge_iterator, n_basic_blocks_for_fn (cfun));
866 sp = 0;
867 ei = ei_start (bb->succs);
868
869 bitmap_clear (visited);
870
871 act = (EDGE_COUNT (ei_container (ei)) > 0 ? EDGE_I (ei_container (ei), 0) : NULL);
872 while (1)
873 {
874 if (!act)
875 {
876 if (!sp)
877 {
878 free (stack);
879 sbitmap_free (visited);
880 return;
881 }
882 act = ei_edge (stack[--sp]);
883 }
884 bb = act->dest;
885
886 if (bb == EXIT_BLOCK_PTR_FOR_FN (cfun)
887 || bitmap_bit_p (visited, bb->index))
888 {
889 if (!ei_end_p (ei))
890 ei_next (&ei);
891 act = (! ei_end_p (ei)) ? ei_edge (ei) : NULL;
892 continue;
893 }
894 bitmap_set_bit (visited, bb->index);
895
896 if (bitmap_bit_p (st_antloc[bb->index], smexpr->index))
897 {
898 for (last = smexpr->antic_stores;
899 BLOCK_FOR_INSN (XEXP (last, 0)) != bb;
900 last = XEXP (last, 1))
901 continue;
902 last = XEXP (last, 0);
903 }
904 else
905 last = NEXT_INSN (BB_END (bb));
906
907 for (insn = BB_HEAD (bb); insn != last; insn = NEXT_INSN (insn))
908 if (NONDEBUG_INSN_P (insn))
909 {
910 note = find_reg_equal_equiv_note (insn);
911 if (!note || !exp_equiv_p (XEXP (note, 0), mem, 0, true))
912 continue;
913
914 if (dump_file)
915 fprintf (dump_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n",
916 INSN_UID (insn));
917 remove_note (insn, note);
918 }
919
920 if (!ei_end_p (ei))
921 ei_next (&ei);
922 act = (! ei_end_p (ei)) ? ei_edge (ei) : NULL;
923
924 if (EDGE_COUNT (bb->succs) > 0)
925 {
926 if (act)
927 stack[sp++] = ei;
928 ei = ei_start (bb->succs);
929 act = (EDGE_COUNT (ei_container (ei)) > 0 ? EDGE_I (ei_container (ei), 0) : NULL);
930 }
931 }
932 }
933
934 /* This routine will replace a store with a SET to a specified register. */
935
936 static void
937 replace_store_insn (rtx reg, rtx_insn *del, basic_block bb,
938 struct st_expr *smexpr)
939 {
940 rtx_insn *insn;
941 rtx mem, note, set, ptr;
942
943 mem = smexpr->pattern;
944 insn = gen_move_insn (reg, SET_SRC (single_set (del)));
945
946 for (ptr = smexpr->antic_stores; ptr; ptr = XEXP (ptr, 1))
947 if (XEXP (ptr, 0) == del)
948 {
949 XEXP (ptr, 0) = insn;
950 break;
951 }
952
953 /* Move the notes from the deleted insn to its replacement. */
954 REG_NOTES (insn) = REG_NOTES (del);
955
956 /* Emit the insn AFTER all the notes are transferred.
957 This is cheaper since we avoid df rescanning for the note change. */
958 insn = emit_insn_after (insn, del);
959
960 if (dump_file)
961 {
962 fprintf (dump_file,
963 "STORE_MOTION delete insn in BB %d:\n ", bb->index);
964 print_inline_rtx (dump_file, del, 6);
965 fprintf (dump_file, "\nSTORE_MOTION replaced with insn:\n ");
966 print_inline_rtx (dump_file, insn, 6);
967 fprintf (dump_file, "\n");
968 }
969
970 delete_insn (del);
971
972 /* Now we must handle REG_EQUAL notes whose contents is equal to the mem;
973 they are no longer accurate provided that they are reached by this
974 definition, so drop them. */
975 for (; insn != NEXT_INSN (BB_END (bb)); insn = NEXT_INSN (insn))
976 if (NONDEBUG_INSN_P (insn))
977 {
978 set = single_set (insn);
979 if (!set)
980 continue;
981 if (exp_equiv_p (SET_DEST (set), mem, 0, true))
982 return;
983 note = find_reg_equal_equiv_note (insn);
984 if (!note || !exp_equiv_p (XEXP (note, 0), mem, 0, true))
985 continue;
986
987 if (dump_file)
988 fprintf (dump_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n",
989 INSN_UID (insn));
990 remove_note (insn, note);
991 }
992 remove_reachable_equiv_notes (bb, smexpr);
993 }
994
995
996 /* Delete a store, but copy the value that would have been stored into
997 the reaching_reg for later storing. */
998
999 static void
1000 delete_store (struct st_expr * expr, basic_block bb)
1001 {
1002 rtx reg;
1003
1004 if (expr->reaching_reg == NULL_RTX)
1005 expr->reaching_reg = gen_reg_rtx_and_attrs (expr->pattern);
1006
1007 reg = expr->reaching_reg;
1008
1009 for (rtx_insn_list *i = expr->avail_stores; i; i = i->next ())
1010 {
1011 rtx_insn *del = i->insn ();
1012 if (BLOCK_FOR_INSN (del) == bb)
1013 {
1014 /* We know there is only one since we deleted redundant
1015 ones during the available computation. */
1016 replace_store_insn (reg, del, bb, expr);
1017 break;
1018 }
1019 }
1020 }
1021
1022 /* Fill in available, anticipatable, transparent and kill vectors in
1023 STORE_DATA, based on lists of available and anticipatable stores. */
1024 static void
1025 build_store_vectors (void)
1026 {
1027 basic_block bb;
1028 int *regs_set_in_block;
1029 rtx_insn *insn;
1030 rtx_insn_list *st;
1031 struct st_expr * ptr;
1032 unsigned int max_gcse_regno = max_reg_num ();
1033
1034 /* Build the gen_vector. This is any store in the table which is not killed
1035 by aliasing later in its block. */
1036 st_avloc = sbitmap_vector_alloc (last_basic_block_for_fn (cfun),
1037 num_stores);
1038 bitmap_vector_clear (st_avloc, last_basic_block_for_fn (cfun));
1039
1040 st_antloc = sbitmap_vector_alloc (last_basic_block_for_fn (cfun),
1041 num_stores);
1042 bitmap_vector_clear (st_antloc, last_basic_block_for_fn (cfun));
1043
1044 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
1045 {
1046 for (st = ptr->avail_stores; st != NULL; st = st->next ())
1047 {
1048 insn = st->insn ();
1049 bb = BLOCK_FOR_INSN (insn);
1050
1051 /* If we've already seen an available expression in this block,
1052 we can delete this one (It occurs earlier in the block). We'll
1053 copy the SRC expression to an unused register in case there
1054 are any side effects. */
1055 if (bitmap_bit_p (st_avloc[bb->index], ptr->index))
1056 {
1057 rtx r = gen_reg_rtx_and_attrs (ptr->pattern);
1058 if (dump_file)
1059 fprintf (dump_file, "Removing redundant store:\n");
1060 replace_store_insn (r, st->insn (), bb, ptr);
1061 continue;
1062 }
1063 bitmap_set_bit (st_avloc[bb->index], ptr->index);
1064 }
1065
1066 for (st = ptr->antic_stores; st != NULL; st = st->next ())
1067 {
1068 insn = st->insn ();
1069 bb = BLOCK_FOR_INSN (insn);
1070 bitmap_set_bit (st_antloc[bb->index], ptr->index);
1071 }
1072 }
1073
1074 st_kill = sbitmap_vector_alloc (last_basic_block_for_fn (cfun), num_stores);
1075 bitmap_vector_clear (st_kill, last_basic_block_for_fn (cfun));
1076
1077 st_transp = sbitmap_vector_alloc (last_basic_block_for_fn (cfun), num_stores);
1078 bitmap_vector_clear (st_transp, last_basic_block_for_fn (cfun));
1079 regs_set_in_block = XNEWVEC (int, max_gcse_regno);
1080
1081 FOR_EACH_BB_FN (bb, cfun)
1082 {
1083 memset (regs_set_in_block, 0, sizeof (int) * max_gcse_regno);
1084
1085 FOR_BB_INSNS (bb, insn)
1086 if (NONDEBUG_INSN_P (insn))
1087 {
1088 df_ref def;
1089 FOR_EACH_INSN_DEF (def, insn)
1090 {
1091 unsigned int ref_regno = DF_REF_REGNO (def);
1092 if (ref_regno < max_gcse_regno)
1093 regs_set_in_block[DF_REF_REGNO (def)] = 1;
1094 }
1095 }
1096
1097 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
1098 {
1099 if (store_killed_after (ptr->pattern, ptr->pattern_regs, BB_HEAD (bb),
1100 bb, regs_set_in_block, NULL))
1101 {
1102 /* It should not be necessary to consider the expression
1103 killed if it is both anticipatable and available. */
1104 if (!bitmap_bit_p (st_antloc[bb->index], ptr->index)
1105 || !bitmap_bit_p (st_avloc[bb->index], ptr->index))
1106 bitmap_set_bit (st_kill[bb->index], ptr->index);
1107 }
1108 else
1109 bitmap_set_bit (st_transp[bb->index], ptr->index);
1110 }
1111 }
1112
1113 free (regs_set_in_block);
1114
1115 if (dump_file)
1116 {
1117 dump_bitmap_vector (dump_file, "st_antloc", "", st_antloc,
1118 last_basic_block_for_fn (cfun));
1119 dump_bitmap_vector (dump_file, "st_kill", "", st_kill,
1120 last_basic_block_for_fn (cfun));
1121 dump_bitmap_vector (dump_file, "st_transp", "", st_transp,
1122 last_basic_block_for_fn (cfun));
1123 dump_bitmap_vector (dump_file, "st_avloc", "", st_avloc,
1124 last_basic_block_for_fn (cfun));
1125 }
1126 }
1127
1128 /* Free memory used by store motion. */
1129
1130 static void
1131 free_store_memory (void)
1132 {
1133 free_store_motion_mems ();
1134
1135 if (st_avloc)
1136 sbitmap_vector_free (st_avloc);
1137 if (st_kill)
1138 sbitmap_vector_free (st_kill);
1139 if (st_transp)
1140 sbitmap_vector_free (st_transp);
1141 if (st_antloc)
1142 sbitmap_vector_free (st_antloc);
1143 if (st_insert_map)
1144 sbitmap_vector_free (st_insert_map);
1145 if (st_delete_map)
1146 sbitmap_vector_free (st_delete_map);
1147
1148 st_avloc = st_kill = st_transp = st_antloc = NULL;
1149 st_insert_map = st_delete_map = NULL;
1150 }
1151
1152 /* Perform store motion. Much like gcse, except we move expressions the
1153 other way by looking at the flowgraph in reverse.
1154 Return non-zero if transformations are performed by the pass. */
1155
1156 static int
1157 one_store_motion_pass (void)
1158 {
1159 basic_block bb;
1160 int x;
1161 struct st_expr * ptr;
1162 int did_edge_inserts = 0;
1163 int n_stores_deleted = 0;
1164 int n_stores_created = 0;
1165
1166 init_alias_analysis ();
1167
1168 /* Find all the available and anticipatable stores. */
1169 num_stores = compute_store_table ();
1170 if (num_stores == 0)
1171 {
1172 delete store_motion_mems_table;
1173 store_motion_mems_table = NULL;
1174 end_alias_analysis ();
1175 return 0;
1176 }
1177
1178 /* Now compute kill & transp vectors. */
1179 build_store_vectors ();
1180 add_noreturn_fake_exit_edges ();
1181 connect_infinite_loops_to_exit ();
1182
1183 edge_list = pre_edge_rev_lcm (num_stores, st_transp, st_avloc,
1184 st_antloc, st_kill, &st_insert_map,
1185 &st_delete_map);
1186
1187 /* Now we want to insert the new stores which are going to be needed. */
1188 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
1189 {
1190 /* If any of the edges we have above are abnormal, we can't move this
1191 store. */
1192 for (x = NUM_EDGES (edge_list) - 1; x >= 0; x--)
1193 if (bitmap_bit_p (st_insert_map[x], ptr->index)
1194 && (INDEX_EDGE (edge_list, x)->flags & EDGE_ABNORMAL))
1195 break;
1196
1197 if (x >= 0)
1198 {
1199 if (dump_file != NULL)
1200 fprintf (dump_file,
1201 "Can't replace store %d: abnormal edge from %d to %d\n",
1202 ptr->index, INDEX_EDGE (edge_list, x)->src->index,
1203 INDEX_EDGE (edge_list, x)->dest->index);
1204 continue;
1205 }
1206
1207 /* Now we want to insert the new stores which are going to be needed. */
1208
1209 FOR_EACH_BB_FN (bb, cfun)
1210 if (bitmap_bit_p (st_delete_map[bb->index], ptr->index))
1211 {
1212 delete_store (ptr, bb);
1213 n_stores_deleted++;
1214 }
1215
1216 for (x = 0; x < NUM_EDGES (edge_list); x++)
1217 if (bitmap_bit_p (st_insert_map[x], ptr->index))
1218 {
1219 did_edge_inserts |= insert_store (ptr, INDEX_EDGE (edge_list, x));
1220 n_stores_created++;
1221 }
1222 }
1223
1224 if (did_edge_inserts)
1225 commit_edge_insertions ();
1226
1227 free_store_memory ();
1228 free_edge_list (edge_list);
1229 remove_fake_exit_edges ();
1230 end_alias_analysis ();
1231
1232 if (dump_file)
1233 {
1234 fprintf (dump_file, "STORE_MOTION of %s, %d basic blocks, ",
1235 current_function_name (), n_basic_blocks_for_fn (cfun));
1236 fprintf (dump_file, "%d insns deleted, %d insns created\n",
1237 n_stores_deleted, n_stores_created);
1238 }
1239
1240 return (n_stores_deleted > 0 || n_stores_created > 0);
1241 }
1242
1243 \f
1244 static unsigned int
1245 execute_rtl_store_motion (void)
1246 {
1247 delete_unreachable_blocks ();
1248 df_analyze ();
1249 flag_rerun_cse_after_global_opts |= one_store_motion_pass ();
1250 return 0;
1251 }
1252
1253 namespace {
1254
1255 const pass_data pass_data_rtl_store_motion =
1256 {
1257 RTL_PASS, /* type */
1258 "store_motion", /* name */
1259 OPTGROUP_NONE, /* optinfo_flags */
1260 TV_LSM, /* tv_id */
1261 PROP_cfglayout, /* properties_required */
1262 0, /* properties_provided */
1263 0, /* properties_destroyed */
1264 0, /* todo_flags_start */
1265 TODO_df_finish, /* todo_flags_finish */
1266 };
1267
1268 class pass_rtl_store_motion : public rtl_opt_pass
1269 {
1270 public:
1271 pass_rtl_store_motion (gcc::context *ctxt)
1272 : rtl_opt_pass (pass_data_rtl_store_motion, ctxt)
1273 {}
1274
1275 /* opt_pass methods: */
1276 virtual bool gate (function *);
1277 virtual unsigned int execute (function *)
1278 {
1279 return execute_rtl_store_motion ();
1280 }
1281
1282 }; // class pass_rtl_store_motion
1283
1284 bool
1285 pass_rtl_store_motion::gate (function *fun)
1286 {
1287 return optimize > 0 && flag_gcse_sm
1288 && !fun->calls_setjmp
1289 && optimize_function_for_speed_p (fun)
1290 && dbg_cnt (store_motion);
1291 }
1292
1293 } // anon namespace
1294
1295 rtl_opt_pass *
1296 make_pass_rtl_store_motion (gcc::context *ctxt)
1297 {
1298 return new pass_rtl_store_motion (ctxt);
1299 }