re PR rtl-optimization/58997 (ICE on valid code at -O3 on x86_64-linux-gnu (affecting...
[gcc.git] / gcc / store-motion.c
1 /* Store motion via Lazy Code Motion on the reverse CFG.
2 Copyright (C) 1997-2013 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "tm.h"
24 #include "diagnostic-core.h"
25 #include "toplev.h"
26
27 #include "rtl.h"
28 #include "tree.h"
29 #include "tm_p.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "flags.h"
33 #include "insn-config.h"
34 #include "recog.h"
35 #include "basic-block.h"
36 #include "function.h"
37 #include "expr.h"
38 #include "except.h"
39 #include "ggc.h"
40 #include "intl.h"
41 #include "tree-pass.h"
42 #include "hash-table.h"
43 #include "df.h"
44 #include "dbgcnt.h"
45
46 /* This pass implements downward store motion.
47 As of May 1, 2009, the pass is not enabled by default on any target,
48 but bootstrap completes on ia64 and x86_64 with the pass enabled. */
49
50 /* TODO:
51 - remove_reachable_equiv_notes is an incomprehensible pile of goo and
52 a compile time hog that needs a rewrite (maybe cache st_exprs to
53 invalidate REG_EQUAL/REG_EQUIV notes for?).
54 - pattern_regs in st_expr should be a regset (on its own obstack).
55 - antic_stores and avail_stores should be VECs instead of lists.
56 - store_motion_mems should be a vec instead of a list.
57 - there should be an alloc pool for struct st_expr objects.
58 - investigate whether it is helpful to make the address of an st_expr
59 a cselib VALUE.
60 - when GIMPLE alias information is exported, the effectiveness of this
61 pass should be re-evaluated.
62 */
63
64 /* This is a list of store expressions (MEMs). The structure is used
65 as an expression table to track stores which look interesting, and
66 might be moveable towards the exit block. */
67
68 struct st_expr
69 {
70 /* Pattern of this mem. */
71 rtx pattern;
72 /* List of registers mentioned by the mem. */
73 rtx pattern_regs;
74 /* INSN list of stores that are locally anticipatable. */
75 rtx antic_stores;
76 /* INSN list of stores that are locally available. */
77 rtx avail_stores;
78 /* Next in the list. */
79 struct st_expr * next;
80 /* Store ID in the dataflow bitmaps. */
81 int index;
82 /* Hash value for the hash table. */
83 unsigned int hash_index;
84 /* Register holding the stored expression when a store is moved.
85 This field is also used as a cache in find_moveable_store, see
86 LAST_AVAIL_CHECK_FAILURE below. */
87 rtx reaching_reg;
88 };
89
90 /* Head of the list of load/store memory refs. */
91 static struct st_expr * store_motion_mems = NULL;
92
93 /* These bitmaps will hold the local dataflow properties per basic block. */
94 static sbitmap *st_kill, *st_avloc, *st_antloc, *st_transp;
95
96 /* Nonzero for expressions which should be inserted on a specific edge. */
97 static sbitmap *st_insert_map;
98
99 /* Nonzero for expressions which should be deleted in a specific block. */
100 static sbitmap *st_delete_map;
101
102 /* Global holding the number of store expressions we are dealing with. */
103 static int num_stores;
104
105 /* Contains the edge_list returned by pre_edge_lcm. */
106 static struct edge_list *edge_list;
107
108 /* Hashtable helpers. */
109
110 struct st_expr_hasher : typed_noop_remove <st_expr>
111 {
112 typedef st_expr value_type;
113 typedef st_expr compare_type;
114 static inline hashval_t hash (const value_type *);
115 static inline bool equal (const value_type *, const compare_type *);
116 };
117
118 inline hashval_t
119 st_expr_hasher::hash (const value_type *x)
120 {
121 int do_not_record_p = 0;
122 return hash_rtx (x->pattern, GET_MODE (x->pattern), &do_not_record_p, NULL, false);
123 }
124
125 inline bool
126 st_expr_hasher::equal (const value_type *ptr1, const compare_type *ptr2)
127 {
128 return exp_equiv_p (ptr1->pattern, ptr2->pattern, 0, true);
129 }
130
131 /* Hashtable for the load/store memory refs. */
132 static hash_table <st_expr_hasher> store_motion_mems_table;
133
134 /* This will search the st_expr list for a matching expression. If it
135 doesn't find one, we create one and initialize it. */
136
137 static struct st_expr *
138 st_expr_entry (rtx x)
139 {
140 int do_not_record_p = 0;
141 struct st_expr * ptr;
142 unsigned int hash;
143 st_expr **slot;
144 struct st_expr e;
145
146 hash = hash_rtx (x, GET_MODE (x), &do_not_record_p,
147 NULL, /*have_reg_qty=*/false);
148
149 e.pattern = x;
150 slot = store_motion_mems_table.find_slot_with_hash (&e, hash, INSERT);
151 if (*slot)
152 return *slot;
153
154 ptr = XNEW (struct st_expr);
155
156 ptr->next = store_motion_mems;
157 ptr->pattern = x;
158 ptr->pattern_regs = NULL_RTX;
159 ptr->antic_stores = NULL_RTX;
160 ptr->avail_stores = NULL_RTX;
161 ptr->reaching_reg = NULL_RTX;
162 ptr->index = 0;
163 ptr->hash_index = hash;
164 store_motion_mems = ptr;
165 *slot = ptr;
166
167 return ptr;
168 }
169
170 /* Free up an individual st_expr entry. */
171
172 static void
173 free_st_expr_entry (struct st_expr * ptr)
174 {
175 free_INSN_LIST_list (& ptr->antic_stores);
176 free_INSN_LIST_list (& ptr->avail_stores);
177
178 free (ptr);
179 }
180
181 /* Free up all memory associated with the st_expr list. */
182
183 static void
184 free_store_motion_mems (void)
185 {
186 if (store_motion_mems_table.is_created ())
187 store_motion_mems_table.dispose ();
188
189 while (store_motion_mems)
190 {
191 struct st_expr * tmp = store_motion_mems;
192 store_motion_mems = store_motion_mems->next;
193 free_st_expr_entry (tmp);
194 }
195 store_motion_mems = NULL;
196 }
197
198 /* Assign each element of the list of mems a monotonically increasing value. */
199
200 static int
201 enumerate_store_motion_mems (void)
202 {
203 struct st_expr * ptr;
204 int n = 0;
205
206 for (ptr = store_motion_mems; ptr != NULL; ptr = ptr->next)
207 ptr->index = n++;
208
209 return n;
210 }
211
212 /* Return first item in the list. */
213
214 static inline struct st_expr *
215 first_st_expr (void)
216 {
217 return store_motion_mems;
218 }
219
220 /* Return the next item in the list after the specified one. */
221
222 static inline struct st_expr *
223 next_st_expr (struct st_expr * ptr)
224 {
225 return ptr->next;
226 }
227
228 /* Dump debugging info about the store_motion_mems list. */
229
230 static void
231 print_store_motion_mems (FILE * file)
232 {
233 struct st_expr * ptr;
234
235 fprintf (dump_file, "STORE_MOTION list of MEM exprs considered:\n");
236
237 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
238 {
239 fprintf (file, " Pattern (%3d): ", ptr->index);
240
241 print_rtl (file, ptr->pattern);
242
243 fprintf (file, "\n ANTIC stores : ");
244
245 if (ptr->antic_stores)
246 print_rtl (file, ptr->antic_stores);
247 else
248 fprintf (file, "(nil)");
249
250 fprintf (file, "\n AVAIL stores : ");
251
252 if (ptr->avail_stores)
253 print_rtl (file, ptr->avail_stores);
254 else
255 fprintf (file, "(nil)");
256
257 fprintf (file, "\n\n");
258 }
259
260 fprintf (file, "\n");
261 }
262 \f
263 /* Return zero if some of the registers in list X are killed
264 due to set of registers in bitmap REGS_SET. */
265
266 static bool
267 store_ops_ok (const_rtx x, int *regs_set)
268 {
269 const_rtx reg;
270
271 for (; x; x = XEXP (x, 1))
272 {
273 reg = XEXP (x, 0);
274 if (regs_set[REGNO (reg)])
275 return false;
276 }
277
278 return true;
279 }
280
281 /* Helper for extract_mentioned_regs. */
282
283 static int
284 extract_mentioned_regs_1 (rtx *loc, void *data)
285 {
286 rtx *mentioned_regs_p = (rtx *) data;
287
288 if (REG_P (*loc))
289 *mentioned_regs_p = alloc_EXPR_LIST (0, *loc, *mentioned_regs_p);
290
291 return 0;
292 }
293
294 /* Returns a list of registers mentioned in X.
295 FIXME: A regset would be prettier and less expensive. */
296
297 static rtx
298 extract_mentioned_regs (rtx x)
299 {
300 rtx mentioned_regs = NULL;
301 for_each_rtx (&x, extract_mentioned_regs_1, &mentioned_regs);
302 return mentioned_regs;
303 }
304
305 /* Check to see if the load X is aliased with STORE_PATTERN.
306 AFTER is true if we are checking the case when STORE_PATTERN occurs
307 after the X. */
308
309 static bool
310 load_kills_store (const_rtx x, const_rtx store_pattern, int after)
311 {
312 if (after)
313 return anti_dependence (x, store_pattern);
314 else
315 return true_dependence (store_pattern, GET_MODE (store_pattern), x);
316 }
317
318 /* Go through the entire rtx X, looking for any loads which might alias
319 STORE_PATTERN. Return true if found.
320 AFTER is true if we are checking the case when STORE_PATTERN occurs
321 after the insn X. */
322
323 static bool
324 find_loads (const_rtx x, const_rtx store_pattern, int after)
325 {
326 const char * fmt;
327 int i, j;
328 int ret = false;
329
330 if (!x)
331 return false;
332
333 if (GET_CODE (x) == SET)
334 x = SET_SRC (x);
335
336 if (MEM_P (x))
337 {
338 if (load_kills_store (x, store_pattern, after))
339 return true;
340 }
341
342 /* Recursively process the insn. */
343 fmt = GET_RTX_FORMAT (GET_CODE (x));
344
345 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0 && !ret; i--)
346 {
347 if (fmt[i] == 'e')
348 ret |= find_loads (XEXP (x, i), store_pattern, after);
349 else if (fmt[i] == 'E')
350 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
351 ret |= find_loads (XVECEXP (x, i, j), store_pattern, after);
352 }
353 return ret;
354 }
355
356 /* Go through pattern PAT looking for any loads which might kill the
357 store in X. Return true if found.
358 AFTER is true if we are checking the case when loads kill X occurs
359 after the insn for PAT. */
360
361 static inline bool
362 store_killed_in_pat (const_rtx x, const_rtx pat, int after)
363 {
364 if (GET_CODE (pat) == SET)
365 {
366 rtx dest = SET_DEST (pat);
367
368 if (GET_CODE (dest) == ZERO_EXTRACT)
369 dest = XEXP (dest, 0);
370
371 /* Check for memory stores to aliased objects. */
372 if (MEM_P (dest)
373 && !exp_equiv_p (dest, x, 0, true))
374 {
375 if (after)
376 {
377 if (output_dependence (dest, x))
378 return true;
379 }
380 else
381 {
382 if (output_dependence (x, dest))
383 return true;
384 }
385 }
386 }
387
388 if (find_loads (pat, x, after))
389 return true;
390
391 return false;
392 }
393
394 /* Check if INSN kills the store pattern X (is aliased with it).
395 AFTER is true if we are checking the case when store X occurs
396 after the insn. Return true if it does. */
397
398 static bool
399 store_killed_in_insn (const_rtx x, const_rtx x_regs, const_rtx insn, int after)
400 {
401 const_rtx reg, note, pat;
402
403 if (! NONDEBUG_INSN_P (insn))
404 return false;
405
406 if (CALL_P (insn))
407 {
408 /* A normal or pure call might read from pattern,
409 but a const call will not. */
410 if (!RTL_CONST_CALL_P (insn))
411 return true;
412
413 /* But even a const call reads its parameters. Check whether the
414 base of some of registers used in mem is stack pointer. */
415 for (reg = x_regs; reg; reg = XEXP (reg, 1))
416 if (may_be_sp_based_p (XEXP (reg, 0)))
417 return true;
418
419 return false;
420 }
421
422 pat = PATTERN (insn);
423 if (GET_CODE (pat) == SET)
424 {
425 if (store_killed_in_pat (x, pat, after))
426 return true;
427 }
428 else if (GET_CODE (pat) == PARALLEL)
429 {
430 int i;
431
432 for (i = 0; i < XVECLEN (pat, 0); i++)
433 if (store_killed_in_pat (x, XVECEXP (pat, 0, i), after))
434 return true;
435 }
436 else if (find_loads (PATTERN (insn), x, after))
437 return true;
438
439 /* If this insn has a REG_EQUAL or REG_EQUIV note referencing a memory
440 location aliased with X, then this insn kills X. */
441 note = find_reg_equal_equiv_note (insn);
442 if (! note)
443 return false;
444 note = XEXP (note, 0);
445
446 /* However, if the note represents a must alias rather than a may
447 alias relationship, then it does not kill X. */
448 if (exp_equiv_p (note, x, 0, true))
449 return false;
450
451 /* See if there are any aliased loads in the note. */
452 return find_loads (note, x, after);
453 }
454
455 /* Returns true if the expression X is loaded or clobbered on or after INSN
456 within basic block BB. REGS_SET_AFTER is bitmap of registers set in
457 or after the insn. X_REGS is list of registers mentioned in X. If the store
458 is killed, return the last insn in that it occurs in FAIL_INSN. */
459
460 static bool
461 store_killed_after (const_rtx x, const_rtx x_regs, const_rtx insn, const_basic_block bb,
462 int *regs_set_after, rtx *fail_insn)
463 {
464 rtx last = BB_END (bb), act;
465
466 if (!store_ops_ok (x_regs, regs_set_after))
467 {
468 /* We do not know where it will happen. */
469 if (fail_insn)
470 *fail_insn = NULL_RTX;
471 return true;
472 }
473
474 /* Scan from the end, so that fail_insn is determined correctly. */
475 for (act = last; act != PREV_INSN (insn); act = PREV_INSN (act))
476 if (store_killed_in_insn (x, x_regs, act, false))
477 {
478 if (fail_insn)
479 *fail_insn = act;
480 return true;
481 }
482
483 return false;
484 }
485
486 /* Returns true if the expression X is loaded or clobbered on or before INSN
487 within basic block BB. X_REGS is list of registers mentioned in X.
488 REGS_SET_BEFORE is bitmap of registers set before or in this insn. */
489 static bool
490 store_killed_before (const_rtx x, const_rtx x_regs, const_rtx insn, const_basic_block bb,
491 int *regs_set_before)
492 {
493 rtx first = BB_HEAD (bb);
494
495 if (!store_ops_ok (x_regs, regs_set_before))
496 return true;
497
498 for ( ; insn != PREV_INSN (first); insn = PREV_INSN (insn))
499 if (store_killed_in_insn (x, x_regs, insn, true))
500 return true;
501
502 return false;
503 }
504
505 /* The last insn in the basic block that compute_store_table is processing,
506 where store_killed_after is true for X.
507 Since we go through the basic block from BB_END to BB_HEAD, this is
508 also the available store at the end of the basic block. Therefore
509 this is in effect a cache, to avoid calling store_killed_after for
510 equivalent aliasing store expressions.
511 This value is only meaningful during the computation of the store
512 table. We hi-jack the REACHING_REG field of struct st_expr to save
513 a bit of memory. */
514 #define LAST_AVAIL_CHECK_FAILURE(x) ((x)->reaching_reg)
515
516 /* Determine whether INSN is MEM store pattern that we will consider moving.
517 REGS_SET_BEFORE is bitmap of registers set before (and including) the
518 current insn, REGS_SET_AFTER is bitmap of registers set after (and
519 including) the insn in this basic block. We must be passing through BB from
520 head to end, as we are using this fact to speed things up.
521
522 The results are stored this way:
523
524 -- the first anticipatable expression is added into ANTIC_STORES
525 -- if the processed expression is not anticipatable, NULL_RTX is added
526 there instead, so that we can use it as indicator that no further
527 expression of this type may be anticipatable
528 -- if the expression is available, it is added as head of AVAIL_STORES;
529 consequently, all of them but this head are dead and may be deleted.
530 -- if the expression is not available, the insn due to that it fails to be
531 available is stored in REACHING_REG (via LAST_AVAIL_CHECK_FAILURE).
532
533 The things are complicated a bit by fact that there already may be stores
534 to the same MEM from other blocks; also caller must take care of the
535 necessary cleanup of the temporary markers after end of the basic block.
536 */
537
538 static void
539 find_moveable_store (rtx insn, int *regs_set_before, int *regs_set_after)
540 {
541 struct st_expr * ptr;
542 rtx dest, set, tmp;
543 int check_anticipatable, check_available;
544 basic_block bb = BLOCK_FOR_INSN (insn);
545
546 set = single_set (insn);
547 if (!set)
548 return;
549
550 dest = SET_DEST (set);
551
552 if (! MEM_P (dest) || MEM_VOLATILE_P (dest)
553 || GET_MODE (dest) == BLKmode)
554 return;
555
556 if (side_effects_p (dest))
557 return;
558
559 /* If we are handling exceptions, we must be careful with memory references
560 that may trap. If we are not, the behavior is undefined, so we may just
561 continue. */
562 if (cfun->can_throw_non_call_exceptions && may_trap_p (dest))
563 return;
564
565 /* Even if the destination cannot trap, the source may. In this case we'd
566 need to handle updating the REG_EH_REGION note. */
567 if (find_reg_note (insn, REG_EH_REGION, NULL_RTX))
568 return;
569
570 /* Make sure that the SET_SRC of this store insns can be assigned to
571 a register, or we will fail later on in replace_store_insn, which
572 assumes that we can do this. But sometimes the target machine has
573 oddities like MEM read-modify-write instruction. See for example
574 PR24257. */
575 if (!can_assign_to_reg_without_clobbers_p (SET_SRC (set)))
576 return;
577
578 ptr = st_expr_entry (dest);
579 if (!ptr->pattern_regs)
580 ptr->pattern_regs = extract_mentioned_regs (dest);
581
582 /* Do not check for anticipatability if we either found one anticipatable
583 store already, or tested for one and found out that it was killed. */
584 check_anticipatable = 0;
585 if (!ptr->antic_stores)
586 check_anticipatable = 1;
587 else
588 {
589 tmp = XEXP (ptr->antic_stores, 0);
590 if (tmp != NULL_RTX
591 && BLOCK_FOR_INSN (tmp) != bb)
592 check_anticipatable = 1;
593 }
594 if (check_anticipatable)
595 {
596 if (store_killed_before (dest, ptr->pattern_regs, insn, bb, regs_set_before))
597 tmp = NULL_RTX;
598 else
599 tmp = insn;
600 ptr->antic_stores = alloc_INSN_LIST (tmp, ptr->antic_stores);
601 }
602
603 /* It is not necessary to check whether store is available if we did
604 it successfully before; if we failed before, do not bother to check
605 until we reach the insn that caused us to fail. */
606 check_available = 0;
607 if (!ptr->avail_stores)
608 check_available = 1;
609 else
610 {
611 tmp = XEXP (ptr->avail_stores, 0);
612 if (BLOCK_FOR_INSN (tmp) != bb)
613 check_available = 1;
614 }
615 if (check_available)
616 {
617 /* Check that we have already reached the insn at that the check
618 failed last time. */
619 if (LAST_AVAIL_CHECK_FAILURE (ptr))
620 {
621 for (tmp = BB_END (bb);
622 tmp != insn && tmp != LAST_AVAIL_CHECK_FAILURE (ptr);
623 tmp = PREV_INSN (tmp))
624 continue;
625 if (tmp == insn)
626 check_available = 0;
627 }
628 else
629 check_available = store_killed_after (dest, ptr->pattern_regs, insn,
630 bb, regs_set_after,
631 &LAST_AVAIL_CHECK_FAILURE (ptr));
632 }
633 if (!check_available)
634 ptr->avail_stores = alloc_INSN_LIST (insn, ptr->avail_stores);
635 }
636
637 /* Find available and anticipatable stores. */
638
639 static int
640 compute_store_table (void)
641 {
642 int ret;
643 basic_block bb;
644 #ifdef ENABLE_CHECKING
645 unsigned regno;
646 #endif
647 rtx insn, tmp;
648 df_ref *def_rec;
649 int *last_set_in, *already_set;
650 struct st_expr * ptr, **prev_next_ptr_ptr;
651 unsigned int max_gcse_regno = max_reg_num ();
652
653 store_motion_mems = NULL;
654 store_motion_mems_table.create (13);
655 last_set_in = XCNEWVEC (int, max_gcse_regno);
656 already_set = XNEWVEC (int, max_gcse_regno);
657
658 /* Find all the stores we care about. */
659 FOR_EACH_BB (bb)
660 {
661 /* First compute the registers set in this block. */
662 FOR_BB_INSNS (bb, insn)
663 {
664
665 if (! NONDEBUG_INSN_P (insn))
666 continue;
667
668 for (def_rec = DF_INSN_DEFS (insn); *def_rec; def_rec++)
669 last_set_in[DF_REF_REGNO (*def_rec)] = INSN_UID (insn);
670 }
671
672 /* Now find the stores. */
673 memset (already_set, 0, sizeof (int) * max_gcse_regno);
674 FOR_BB_INSNS (bb, insn)
675 {
676 if (! NONDEBUG_INSN_P (insn))
677 continue;
678
679 for (def_rec = DF_INSN_DEFS (insn); *def_rec; def_rec++)
680 already_set[DF_REF_REGNO (*def_rec)] = INSN_UID (insn);
681
682 /* Now that we've marked regs, look for stores. */
683 find_moveable_store (insn, already_set, last_set_in);
684
685 /* Unmark regs that are no longer set. */
686 for (def_rec = DF_INSN_DEFS (insn); *def_rec; def_rec++)
687 if (last_set_in[DF_REF_REGNO (*def_rec)] == INSN_UID (insn))
688 last_set_in[DF_REF_REGNO (*def_rec)] = 0;
689 }
690
691 #ifdef ENABLE_CHECKING
692 /* last_set_in should now be all-zero. */
693 for (regno = 0; regno < max_gcse_regno; regno++)
694 gcc_assert (!last_set_in[regno]);
695 #endif
696
697 /* Clear temporary marks. */
698 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
699 {
700 LAST_AVAIL_CHECK_FAILURE (ptr) = NULL_RTX;
701 if (ptr->antic_stores
702 && (tmp = XEXP (ptr->antic_stores, 0)) == NULL_RTX)
703 ptr->antic_stores = XEXP (ptr->antic_stores, 1);
704 }
705 }
706
707 /* Remove the stores that are not available anywhere, as there will
708 be no opportunity to optimize them. */
709 for (ptr = store_motion_mems, prev_next_ptr_ptr = &store_motion_mems;
710 ptr != NULL;
711 ptr = *prev_next_ptr_ptr)
712 {
713 if (! ptr->avail_stores)
714 {
715 *prev_next_ptr_ptr = ptr->next;
716 store_motion_mems_table.remove_elt_with_hash (ptr, ptr->hash_index);
717 free_st_expr_entry (ptr);
718 }
719 else
720 prev_next_ptr_ptr = &ptr->next;
721 }
722
723 ret = enumerate_store_motion_mems ();
724
725 if (dump_file)
726 print_store_motion_mems (dump_file);
727
728 free (last_set_in);
729 free (already_set);
730 return ret;
731 }
732
733 /* In all code following after this, REACHING_REG has its original
734 meaning again. Avoid confusion, and undef the accessor macro for
735 the temporary marks usage in compute_store_table. */
736 #undef LAST_AVAIL_CHECK_FAILURE
737
738 /* Insert an instruction at the beginning of a basic block, and update
739 the BB_HEAD if needed. */
740
741 static void
742 insert_insn_start_basic_block (rtx insn, basic_block bb)
743 {
744 /* Insert at start of successor block. */
745 rtx prev = PREV_INSN (BB_HEAD (bb));
746 rtx before = BB_HEAD (bb);
747 while (before != 0)
748 {
749 if (! LABEL_P (before)
750 && !NOTE_INSN_BASIC_BLOCK_P (before))
751 break;
752 prev = before;
753 if (prev == BB_END (bb))
754 break;
755 before = NEXT_INSN (before);
756 }
757
758 insn = emit_insn_after_noloc (insn, prev, bb);
759
760 if (dump_file)
761 {
762 fprintf (dump_file, "STORE_MOTION insert store at start of BB %d:\n",
763 bb->index);
764 print_inline_rtx (dump_file, insn, 6);
765 fprintf (dump_file, "\n");
766 }
767 }
768
769 /* This routine will insert a store on an edge. EXPR is the st_expr entry for
770 the memory reference, and E is the edge to insert it on. Returns nonzero
771 if an edge insertion was performed. */
772
773 static int
774 insert_store (struct st_expr * expr, edge e)
775 {
776 rtx reg, insn;
777 basic_block bb;
778 edge tmp;
779 edge_iterator ei;
780
781 /* We did all the deleted before this insert, so if we didn't delete a
782 store, then we haven't set the reaching reg yet either. */
783 if (expr->reaching_reg == NULL_RTX)
784 return 0;
785
786 if (e->flags & EDGE_FAKE)
787 return 0;
788
789 reg = expr->reaching_reg;
790 insn = gen_move_insn (copy_rtx (expr->pattern), reg);
791
792 /* If we are inserting this expression on ALL predecessor edges of a BB,
793 insert it at the start of the BB, and reset the insert bits on the other
794 edges so we don't try to insert it on the other edges. */
795 bb = e->dest;
796 FOR_EACH_EDGE (tmp, ei, e->dest->preds)
797 if (!(tmp->flags & EDGE_FAKE))
798 {
799 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
800
801 gcc_assert (index != EDGE_INDEX_NO_EDGE);
802 if (! bitmap_bit_p (st_insert_map[index], expr->index))
803 break;
804 }
805
806 /* If tmp is NULL, we found an insertion on every edge, blank the
807 insertion vector for these edges, and insert at the start of the BB. */
808 if (!tmp && bb != EXIT_BLOCK_PTR)
809 {
810 FOR_EACH_EDGE (tmp, ei, e->dest->preds)
811 {
812 int index = EDGE_INDEX (edge_list, tmp->src, tmp->dest);
813 bitmap_clear_bit (st_insert_map[index], expr->index);
814 }
815 insert_insn_start_basic_block (insn, bb);
816 return 0;
817 }
818
819 /* We can't put stores in the front of blocks pointed to by abnormal
820 edges since that may put a store where one didn't used to be. */
821 gcc_assert (!(e->flags & EDGE_ABNORMAL));
822
823 insert_insn_on_edge (insn, e);
824
825 if (dump_file)
826 {
827 fprintf (dump_file, "STORE_MOTION insert insn on edge (%d, %d):\n",
828 e->src->index, e->dest->index);
829 print_inline_rtx (dump_file, insn, 6);
830 fprintf (dump_file, "\n");
831 }
832
833 return 1;
834 }
835
836 /* Remove any REG_EQUAL or REG_EQUIV notes containing a reference to the
837 memory location in SMEXPR set in basic block BB.
838
839 This could be rather expensive. */
840
841 static void
842 remove_reachable_equiv_notes (basic_block bb, struct st_expr *smexpr)
843 {
844 edge_iterator *stack, ei;
845 int sp;
846 edge act;
847 sbitmap visited = sbitmap_alloc (last_basic_block);
848 rtx last, insn, note;
849 rtx mem = smexpr->pattern;
850
851 stack = XNEWVEC (edge_iterator, n_basic_blocks);
852 sp = 0;
853 ei = ei_start (bb->succs);
854
855 bitmap_clear (visited);
856
857 act = (EDGE_COUNT (ei_container (ei)) > 0 ? EDGE_I (ei_container (ei), 0) : NULL);
858 while (1)
859 {
860 if (!act)
861 {
862 if (!sp)
863 {
864 free (stack);
865 sbitmap_free (visited);
866 return;
867 }
868 act = ei_edge (stack[--sp]);
869 }
870 bb = act->dest;
871
872 if (bb == EXIT_BLOCK_PTR
873 || bitmap_bit_p (visited, bb->index))
874 {
875 if (!ei_end_p (ei))
876 ei_next (&ei);
877 act = (! ei_end_p (ei)) ? ei_edge (ei) : NULL;
878 continue;
879 }
880 bitmap_set_bit (visited, bb->index);
881
882 if (bitmap_bit_p (st_antloc[bb->index], smexpr->index))
883 {
884 for (last = smexpr->antic_stores;
885 BLOCK_FOR_INSN (XEXP (last, 0)) != bb;
886 last = XEXP (last, 1))
887 continue;
888 last = XEXP (last, 0);
889 }
890 else
891 last = NEXT_INSN (BB_END (bb));
892
893 for (insn = BB_HEAD (bb); insn != last; insn = NEXT_INSN (insn))
894 if (NONDEBUG_INSN_P (insn))
895 {
896 note = find_reg_equal_equiv_note (insn);
897 if (!note || !exp_equiv_p (XEXP (note, 0), mem, 0, true))
898 continue;
899
900 if (dump_file)
901 fprintf (dump_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n",
902 INSN_UID (insn));
903 remove_note (insn, note);
904 }
905
906 if (!ei_end_p (ei))
907 ei_next (&ei);
908 act = (! ei_end_p (ei)) ? ei_edge (ei) : NULL;
909
910 if (EDGE_COUNT (bb->succs) > 0)
911 {
912 if (act)
913 stack[sp++] = ei;
914 ei = ei_start (bb->succs);
915 act = (EDGE_COUNT (ei_container (ei)) > 0 ? EDGE_I (ei_container (ei), 0) : NULL);
916 }
917 }
918 }
919
920 /* This routine will replace a store with a SET to a specified register. */
921
922 static void
923 replace_store_insn (rtx reg, rtx del, basic_block bb, struct st_expr *smexpr)
924 {
925 rtx insn, mem, note, set, ptr;
926
927 mem = smexpr->pattern;
928 insn = gen_move_insn (reg, SET_SRC (single_set (del)));
929
930 for (ptr = smexpr->antic_stores; ptr; ptr = XEXP (ptr, 1))
931 if (XEXP (ptr, 0) == del)
932 {
933 XEXP (ptr, 0) = insn;
934 break;
935 }
936
937 /* Move the notes from the deleted insn to its replacement. */
938 REG_NOTES (insn) = REG_NOTES (del);
939
940 /* Emit the insn AFTER all the notes are transferred.
941 This is cheaper since we avoid df rescanning for the note change. */
942 insn = emit_insn_after (insn, del);
943
944 if (dump_file)
945 {
946 fprintf (dump_file,
947 "STORE_MOTION delete insn in BB %d:\n ", bb->index);
948 print_inline_rtx (dump_file, del, 6);
949 fprintf (dump_file, "\nSTORE_MOTION replaced with insn:\n ");
950 print_inline_rtx (dump_file, insn, 6);
951 fprintf (dump_file, "\n");
952 }
953
954 delete_insn (del);
955
956 /* Now we must handle REG_EQUAL notes whose contents is equal to the mem;
957 they are no longer accurate provided that they are reached by this
958 definition, so drop them. */
959 for (; insn != NEXT_INSN (BB_END (bb)); insn = NEXT_INSN (insn))
960 if (NONDEBUG_INSN_P (insn))
961 {
962 set = single_set (insn);
963 if (!set)
964 continue;
965 if (exp_equiv_p (SET_DEST (set), mem, 0, true))
966 return;
967 note = find_reg_equal_equiv_note (insn);
968 if (!note || !exp_equiv_p (XEXP (note, 0), mem, 0, true))
969 continue;
970
971 if (dump_file)
972 fprintf (dump_file, "STORE_MOTION drop REG_EQUAL note at insn %d:\n",
973 INSN_UID (insn));
974 remove_note (insn, note);
975 }
976 remove_reachable_equiv_notes (bb, smexpr);
977 }
978
979
980 /* Delete a store, but copy the value that would have been stored into
981 the reaching_reg for later storing. */
982
983 static void
984 delete_store (struct st_expr * expr, basic_block bb)
985 {
986 rtx reg, i, del;
987
988 if (expr->reaching_reg == NULL_RTX)
989 expr->reaching_reg = gen_reg_rtx_and_attrs (expr->pattern);
990
991 reg = expr->reaching_reg;
992
993 for (i = expr->avail_stores; i; i = XEXP (i, 1))
994 {
995 del = XEXP (i, 0);
996 if (BLOCK_FOR_INSN (del) == bb)
997 {
998 /* We know there is only one since we deleted redundant
999 ones during the available computation. */
1000 replace_store_insn (reg, del, bb, expr);
1001 break;
1002 }
1003 }
1004 }
1005
1006 /* Fill in available, anticipatable, transparent and kill vectors in
1007 STORE_DATA, based on lists of available and anticipatable stores. */
1008 static void
1009 build_store_vectors (void)
1010 {
1011 basic_block bb;
1012 int *regs_set_in_block;
1013 rtx insn, st;
1014 struct st_expr * ptr;
1015 unsigned int max_gcse_regno = max_reg_num ();
1016
1017 /* Build the gen_vector. This is any store in the table which is not killed
1018 by aliasing later in its block. */
1019 st_avloc = sbitmap_vector_alloc (last_basic_block, num_stores);
1020 bitmap_vector_clear (st_avloc, last_basic_block);
1021
1022 st_antloc = sbitmap_vector_alloc (last_basic_block, num_stores);
1023 bitmap_vector_clear (st_antloc, last_basic_block);
1024
1025 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
1026 {
1027 for (st = ptr->avail_stores; st != NULL; st = XEXP (st, 1))
1028 {
1029 insn = XEXP (st, 0);
1030 bb = BLOCK_FOR_INSN (insn);
1031
1032 /* If we've already seen an available expression in this block,
1033 we can delete this one (It occurs earlier in the block). We'll
1034 copy the SRC expression to an unused register in case there
1035 are any side effects. */
1036 if (bitmap_bit_p (st_avloc[bb->index], ptr->index))
1037 {
1038 rtx r = gen_reg_rtx_and_attrs (ptr->pattern);
1039 if (dump_file)
1040 fprintf (dump_file, "Removing redundant store:\n");
1041 replace_store_insn (r, XEXP (st, 0), bb, ptr);
1042 continue;
1043 }
1044 bitmap_set_bit (st_avloc[bb->index], ptr->index);
1045 }
1046
1047 for (st = ptr->antic_stores; st != NULL; st = XEXP (st, 1))
1048 {
1049 insn = XEXP (st, 0);
1050 bb = BLOCK_FOR_INSN (insn);
1051 bitmap_set_bit (st_antloc[bb->index], ptr->index);
1052 }
1053 }
1054
1055 st_kill = sbitmap_vector_alloc (last_basic_block, num_stores);
1056 bitmap_vector_clear (st_kill, last_basic_block);
1057
1058 st_transp = sbitmap_vector_alloc (last_basic_block, num_stores);
1059 bitmap_vector_clear (st_transp, last_basic_block);
1060 regs_set_in_block = XNEWVEC (int, max_gcse_regno);
1061
1062 FOR_EACH_BB (bb)
1063 {
1064 memset (regs_set_in_block, 0, sizeof (int) * max_gcse_regno);
1065
1066 FOR_BB_INSNS (bb, insn)
1067 if (NONDEBUG_INSN_P (insn))
1068 {
1069 df_ref *def_rec;
1070 for (def_rec = DF_INSN_DEFS (insn); *def_rec; def_rec++)
1071 {
1072 unsigned int ref_regno = DF_REF_REGNO (*def_rec);
1073 if (ref_regno < max_gcse_regno)
1074 regs_set_in_block[DF_REF_REGNO (*def_rec)] = 1;
1075 }
1076 }
1077
1078 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
1079 {
1080 if (store_killed_after (ptr->pattern, ptr->pattern_regs, BB_HEAD (bb),
1081 bb, regs_set_in_block, NULL))
1082 {
1083 /* It should not be necessary to consider the expression
1084 killed if it is both anticipatable and available. */
1085 if (!bitmap_bit_p (st_antloc[bb->index], ptr->index)
1086 || !bitmap_bit_p (st_avloc[bb->index], ptr->index))
1087 bitmap_set_bit (st_kill[bb->index], ptr->index);
1088 }
1089 else
1090 bitmap_set_bit (st_transp[bb->index], ptr->index);
1091 }
1092 }
1093
1094 free (regs_set_in_block);
1095
1096 if (dump_file)
1097 {
1098 dump_bitmap_vector (dump_file, "st_antloc", "", st_antloc, last_basic_block);
1099 dump_bitmap_vector (dump_file, "st_kill", "", st_kill, last_basic_block);
1100 dump_bitmap_vector (dump_file, "st_transp", "", st_transp, last_basic_block);
1101 dump_bitmap_vector (dump_file, "st_avloc", "", st_avloc, last_basic_block);
1102 }
1103 }
1104
1105 /* Free memory used by store motion. */
1106
1107 static void
1108 free_store_memory (void)
1109 {
1110 free_store_motion_mems ();
1111
1112 if (st_avloc)
1113 sbitmap_vector_free (st_avloc);
1114 if (st_kill)
1115 sbitmap_vector_free (st_kill);
1116 if (st_transp)
1117 sbitmap_vector_free (st_transp);
1118 if (st_antloc)
1119 sbitmap_vector_free (st_antloc);
1120 if (st_insert_map)
1121 sbitmap_vector_free (st_insert_map);
1122 if (st_delete_map)
1123 sbitmap_vector_free (st_delete_map);
1124
1125 st_avloc = st_kill = st_transp = st_antloc = NULL;
1126 st_insert_map = st_delete_map = NULL;
1127 }
1128
1129 /* Perform store motion. Much like gcse, except we move expressions the
1130 other way by looking at the flowgraph in reverse.
1131 Return non-zero if transformations are performed by the pass. */
1132
1133 static int
1134 one_store_motion_pass (void)
1135 {
1136 basic_block bb;
1137 int x;
1138 struct st_expr * ptr;
1139 int did_edge_inserts = 0;
1140 int n_stores_deleted = 0;
1141 int n_stores_created = 0;
1142
1143 init_alias_analysis ();
1144
1145 /* Find all the available and anticipatable stores. */
1146 num_stores = compute_store_table ();
1147 if (num_stores == 0)
1148 {
1149 store_motion_mems_table.dispose ();
1150 end_alias_analysis ();
1151 return 0;
1152 }
1153
1154 /* Now compute kill & transp vectors. */
1155 build_store_vectors ();
1156 add_noreturn_fake_exit_edges ();
1157 connect_infinite_loops_to_exit ();
1158
1159 edge_list = pre_edge_rev_lcm (num_stores, st_transp, st_avloc,
1160 st_antloc, st_kill, &st_insert_map,
1161 &st_delete_map);
1162
1163 /* Now we want to insert the new stores which are going to be needed. */
1164 for (ptr = first_st_expr (); ptr != NULL; ptr = next_st_expr (ptr))
1165 {
1166 /* If any of the edges we have above are abnormal, we can't move this
1167 store. */
1168 for (x = NUM_EDGES (edge_list) - 1; x >= 0; x--)
1169 if (bitmap_bit_p (st_insert_map[x], ptr->index)
1170 && (INDEX_EDGE (edge_list, x)->flags & EDGE_ABNORMAL))
1171 break;
1172
1173 if (x >= 0)
1174 {
1175 if (dump_file != NULL)
1176 fprintf (dump_file,
1177 "Can't replace store %d: abnormal edge from %d to %d\n",
1178 ptr->index, INDEX_EDGE (edge_list, x)->src->index,
1179 INDEX_EDGE (edge_list, x)->dest->index);
1180 continue;
1181 }
1182
1183 /* Now we want to insert the new stores which are going to be needed. */
1184
1185 FOR_EACH_BB (bb)
1186 if (bitmap_bit_p (st_delete_map[bb->index], ptr->index))
1187 {
1188 delete_store (ptr, bb);
1189 n_stores_deleted++;
1190 }
1191
1192 for (x = 0; x < NUM_EDGES (edge_list); x++)
1193 if (bitmap_bit_p (st_insert_map[x], ptr->index))
1194 {
1195 did_edge_inserts |= insert_store (ptr, INDEX_EDGE (edge_list, x));
1196 n_stores_created++;
1197 }
1198 }
1199
1200 if (did_edge_inserts)
1201 commit_edge_insertions ();
1202
1203 free_store_memory ();
1204 free_edge_list (edge_list);
1205 remove_fake_exit_edges ();
1206 end_alias_analysis ();
1207
1208 if (dump_file)
1209 {
1210 fprintf (dump_file, "STORE_MOTION of %s, %d basic blocks, ",
1211 current_function_name (), n_basic_blocks);
1212 fprintf (dump_file, "%d insns deleted, %d insns created\n",
1213 n_stores_deleted, n_stores_created);
1214 }
1215
1216 return (n_stores_deleted > 0 || n_stores_created > 0);
1217 }
1218
1219 \f
1220 static bool
1221 gate_rtl_store_motion (void)
1222 {
1223 return optimize > 0 && flag_gcse_sm
1224 && !cfun->calls_setjmp
1225 && optimize_function_for_speed_p (cfun)
1226 && dbg_cnt (store_motion);
1227 }
1228
1229 static unsigned int
1230 execute_rtl_store_motion (void)
1231 {
1232 delete_unreachable_blocks ();
1233 df_analyze ();
1234 flag_rerun_cse_after_global_opts |= one_store_motion_pass ();
1235 return 0;
1236 }
1237
1238 namespace {
1239
1240 const pass_data pass_data_rtl_store_motion =
1241 {
1242 RTL_PASS, /* type */
1243 "store_motion", /* name */
1244 OPTGROUP_NONE, /* optinfo_flags */
1245 true, /* has_gate */
1246 true, /* has_execute */
1247 TV_LSM, /* tv_id */
1248 PROP_cfglayout, /* properties_required */
1249 0, /* properties_provided */
1250 0, /* properties_destroyed */
1251 0, /* todo_flags_start */
1252 ( TODO_df_finish | TODO_verify_rtl_sharing
1253 | TODO_verify_flow ), /* todo_flags_finish */
1254 };
1255
1256 class pass_rtl_store_motion : public rtl_opt_pass
1257 {
1258 public:
1259 pass_rtl_store_motion (gcc::context *ctxt)
1260 : rtl_opt_pass (pass_data_rtl_store_motion, ctxt)
1261 {}
1262
1263 /* opt_pass methods: */
1264 bool gate () { return gate_rtl_store_motion (); }
1265 unsigned int execute () { return execute_rtl_store_motion (); }
1266
1267 }; // class pass_rtl_store_motion
1268
1269 } // anon namespace
1270
1271 rtl_opt_pass *
1272 make_pass_rtl_store_motion (gcc::context *ctxt)
1273 {
1274 return new pass_rtl_store_motion (ctxt);
1275 }