1 /* Data structure definitions for a generic GCC target.
2 Copyright (C) 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
4 This program is free software; you can redistribute it and/or modify it
5 under the terms of the GNU General Public License as published by the
6 Free Software Foundation; either version 2, or (at your option) any
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 In other words, you are welcome to use, share and improve this program.
19 You are forbidden to forbid anyone else to use, share and improve
20 what you give them. Help stamp out software-hoarding! */
22 /* This file contains a data structure that describes a GCC target.
23 At present it is incomplete, but in future it should grow to
24 contain most or all target machine and target O/S specific
27 This structure has its initializer declared in target-def.h in the
28 form of large macro TARGET_INITIALIZER that expands to many smaller
31 The smaller macros each initialize one component of the structure,
32 and each has a default. Each target should have a file that
33 includes target.h and target-def.h, and overrides any inappropriate
34 defaults by undefining the relevant macro and defining a suitable
35 replacement. That file should then contain the definition of
38 struct gcc_target targetm = TARGET_INITIALIZER;
40 Doing things this way allows us to bring together everything that
41 defines a GCC target. By supplying a default that is appropriate
42 to most targets, we can easily add new items without needing to
43 edit dozens of target configuration files. It should also allow us
44 to gradually reduce the amount of conditional compilation that is
45 scattered throughout GCC. */
51 /* Functions that output assembler for the target. */
54 /* Opening and closing parentheses for asm expression grouping. */
55 const char *open_paren
, *close_paren
;
57 /* Assembler instructions for creating various kinds of integer object. */
65 } aligned_op
, unaligned_op
;
67 /* Try to output the assembler code for an integer object whose
68 value is given by X. SIZE is the size of the object in bytes and
69 ALIGNED_P indicates whether it is aligned. Return true if
70 successful. Only handles cases for which BYTE_OP, ALIGNED_OP
71 and UNALIGNED_OP are NULL. */
72 bool (* integer
) (rtx x
, unsigned int size
, int aligned_p
);
74 /* Output code that will globalize a label. */
75 void (* globalize_label
) (FILE *, const char *);
77 /* Output an internal label. */
78 void (* internal_label
) (FILE *, const char *, unsigned long);
80 /* Emit an assembler directive to set visibility for the symbol
81 associated with the tree decl. */
82 void (* visibility
) (tree
, int);
84 /* Output the assembler code for entry to a function. */
85 void (* function_prologue
) (FILE *, HOST_WIDE_INT
);
87 /* Output the assembler code for end of prologue. */
88 void (* function_end_prologue
) (FILE *);
90 /* Output the assembler code for start of epilogue. */
91 void (* function_begin_epilogue
) (FILE *);
93 /* Output the assembler code for function exit. */
94 void (* function_epilogue
) (FILE *, HOST_WIDE_INT
);
96 /* Switch to an arbitrary section NAME with attributes as
97 specified by FLAGS. */
98 void (* named_section
) (const char *, unsigned int);
100 /* Switch to the section that holds the exception table. */
101 void (* exception_section
) (void);
103 /* Switch to the section that holds the exception frames. */
104 void (* eh_frame_section
) (void);
106 /* Select and switch to a section for EXP. It may be a DECL or a
107 constant. RELOC is nonzero if runtime relocations must be applied;
108 bit 1 will be set if the runtime relocations require non-local
109 name resolution. ALIGN is the required alignment of the data. */
110 void (* select_section
) (tree
, int, unsigned HOST_WIDE_INT
);
112 /* Select and switch to a section for X with MODE. ALIGN is
113 the desired alignment of the data. */
114 void (* select_rtx_section
) (enum machine_mode
, rtx
,
115 unsigned HOST_WIDE_INT
);
117 /* Select a unique section name for DECL. RELOC is the same as
118 for SELECT_SECTION. */
119 void (* unique_section
) (tree
, int);
121 /* Output a constructor for a symbol with a given priority. */
122 void (* constructor
) (rtx
, int);
124 /* Output a destructor for a symbol with a given priority. */
125 void (* destructor
) (rtx
, int);
127 /* Output the assembler code for a thunk function. THUNK_DECL is the
128 declaration for the thunk function itself, FUNCTION is the decl for
129 the target function. DELTA is an immediate constant offset to be
130 added to THIS. If VCALL_OFFSET is nonzero, the word at
131 *(*this + vcall_offset) should be added to THIS. */
132 void (* output_mi_thunk
) (FILE *file
, tree thunk_decl
,
133 HOST_WIDE_INT delta
, HOST_WIDE_INT vcall_offset
,
136 /* Determine whether output_mi_thunk would succeed. */
137 /* ??? Ideally, this hook would not exist, and success or failure
138 would be returned from output_mi_thunk directly. But there's
139 too much undo-able setup involved in invoking output_mi_thunk.
140 Could be fixed by making output_mi_thunk emit rtl instead of
141 text to the output file. */
142 bool (* can_output_mi_thunk
) (tree thunk_decl
, HOST_WIDE_INT delta
,
143 HOST_WIDE_INT vcall_offset
,
146 /* Output any boilerplate text needed at the beginning of a
148 void (*file_start
) (void);
150 /* Output any boilerplate text needed at the end of a
152 void (*file_end
) (void);
154 /* Output an assembler pseudo-op to declare a library function name
156 void (*external_libcall
) (rtx
);
159 /* Functions relating to instruction scheduling. */
162 /* Given the current cost, COST, of an insn, INSN, calculate and
163 return a new cost based on its relationship to DEP_INSN through
164 the dependence LINK. The default is to make no adjustment. */
165 int (* adjust_cost
) (rtx insn
, rtx link
, rtx def_insn
, int cost
);
167 /* Adjust the priority of an insn as you see fit. Returns the new
169 int (* adjust_priority
) (rtx
, int);
171 /* Function which returns the maximum number of insns that can be
172 scheduled in the same machine cycle. This must be constant
173 over an entire compilation. The default is 1. */
174 int (* issue_rate
) (void);
176 /* Calculate how much this insn affects how many more insns we
177 can emit this cycle. Default is they all cost the same. */
178 int (* variable_issue
) (FILE *, int, rtx
, int);
180 /* Initialize machine-dependent scheduling code. */
181 void (* md_init
) (FILE *, int, int);
183 /* Finalize machine-dependent scheduling code. */
184 void (* md_finish
) (FILE *, int);
186 /* Initialize machine-dependent function while scheduling code. */
187 void (* md_init_global
) (FILE *, int, int);
189 /* Finalize machine-dependent function wide scheduling code. */
190 void (* md_finish_global
) (FILE *, int);
192 /* Reorder insns in a machine-dependent fashion, in two different
193 places. Default does nothing. */
194 int (* reorder
) (FILE *, int, rtx
*, int *, int);
195 int (* reorder2
) (FILE *, int, rtx
*, int *, int);
197 /* The following member value is a pointer to a function called
198 after evaluation forward dependencies of insns in chain given
199 by two parameter values (head and tail correspondingly). */
200 void (* dependencies_evaluation_hook
) (rtx
, rtx
);
202 /* The following member value is a pointer to a function returning
203 nonzero if we should use DFA based scheduling. The default is
204 to use the old pipeline scheduler. */
205 int (* use_dfa_pipeline_interface
) (void);
206 /* The values of all the following members are used only for the
207 DFA based scheduler: */
208 /* The values of the following four members are pointers to
209 functions used to simplify the automaton descriptions.
210 dfa_pre_cycle_insn and dfa_post_cycle_insn give functions
211 returning insns which are used to change the pipeline hazard
212 recognizer state when the new simulated processor cycle
213 correspondingly starts and finishes. The function defined by
214 init_dfa_pre_cycle_insn and init_dfa_post_cycle_insn are used
215 to initialize the corresponding insns. The default values of
216 the members result in not changing the automaton state when
217 the new simulated processor cycle correspondingly starts and
219 void (* init_dfa_pre_cycle_insn
) (void);
220 rtx (* dfa_pre_cycle_insn
) (void);
221 void (* init_dfa_post_cycle_insn
) (void);
222 rtx (* dfa_post_cycle_insn
) (void);
223 /* The following member value is a pointer to a function returning value
224 which defines how many insns in queue `ready' will we try for
225 multi-pass scheduling. if the member value is nonzero and the
226 function returns positive value, the DFA based scheduler will make
227 multi-pass scheduling for the first cycle. In other words, we will
228 try to choose ready insn which permits to start maximum number of
229 insns on the same cycle. */
230 int (* first_cycle_multipass_dfa_lookahead
) (void);
231 /* The following member value is pointer to a function controlling
232 what insns from the ready insn queue will be considered for the
233 multipass insn scheduling. If the hook returns zero for insn
234 passed as the parameter, the insn will be not chosen to be
236 int (* first_cycle_multipass_dfa_lookahead_guard
) (rtx
);
237 /* The following member value is pointer to a function called by
238 the insn scheduler before issuing insn passed as the third
239 parameter on given cycle. If the hook returns nonzero, the
240 insn is not issued on given processors cycle. Instead of that,
241 the processor cycle is advanced. If the value passed through
242 the last parameter is zero, the insn ready queue is not sorted
243 on the new cycle start as usually. The first parameter passes
244 file for debugging output. The second one passes the scheduler
245 verbose level of the debugging output. The forth and the fifth
246 parameter values are correspondingly processor cycle on which
247 the previous insn has been issued and the current processor
249 int (* dfa_new_cycle
) (FILE *, int, rtx
, int, int, int *);
250 /* The values of the following members are pointers to functions
251 used to improve the first cycle multipass scheduling by
252 inserting nop insns. dfa_scheduler_bubble gives a function
253 returning a nop insn with given index. The indexes start with
254 zero. The function should return NULL if there are no more nop
255 insns with indexes greater than given index. To initialize the
256 nop insn the function given by member
257 init_dfa_scheduler_bubbles is used. The default values of the
258 members result in not inserting nop insns during the multipass
260 void (* init_dfa_bubbles
) (void);
261 rtx (* dfa_bubble
) (int);
262 /* The following member value is a pointer to a function called
263 by the insn scheduler. It should return true if there exists a
264 dependence which is considered costly by the target, between
265 the insn passed as the first parameter, and the insn passed as
266 the second parameter. The third parameter is the INSN_DEPEND
267 link that represents the dependence between the two insns. The
268 fourth argument is the cost of the dependence as estimated by
269 the scheduler. The last argument is the distance in cycles
270 between the already scheduled insn (first parameter) and the
271 the second insn (second parameter). */
272 bool (* is_costly_dependence
) (rtx
, rtx
, rtx
, int, int);
275 /* Given two decls, merge their attributes and return the result. */
276 tree (* merge_decl_attributes
) (tree
, tree
);
278 /* Given two types, merge their attributes and return the result. */
279 tree (* merge_type_attributes
) (tree
, tree
);
281 /* Table of machine attributes and functions to handle them.
283 const struct attribute_spec
*attribute_table
;
285 /* Return zero if the attributes on TYPE1 and TYPE2 are incompatible,
286 one if they are compatible and two if they are nearly compatible
287 (which causes a warning to be generated). */
288 int (* comp_type_attributes
) (tree type1
, tree type2
);
290 /* Assign default attributes to the newly defined TYPE. */
291 void (* set_default_type_attributes
) (tree type
);
293 /* Insert attributes on the newly created DECL. */
294 void (* insert_attributes
) (tree decl
, tree
*attributes
);
296 /* Return true if FNDECL (which has at least one machine attribute)
297 can be inlined despite its machine attributes, false otherwise. */
298 bool (* function_attribute_inlinable_p
) (tree fndecl
);
300 /* Return true if bitfields in RECORD_TYPE should follow the
301 Microsoft Visual C++ bitfield layout rules. */
302 bool (* ms_bitfield_layout_p
) (tree record_type
);
304 /* Set up target-specific built-in functions. */
305 void (* init_builtins
) (void);
307 /* Expand a target-specific builtin. */
308 rtx (* expand_builtin
) (tree exp
, rtx target
, rtx subtarget
,
309 enum machine_mode mode
, int ignore
);
311 /* Make any adjustments to libfunc names needed for this target. */
312 void (* init_libfuncs
) (void);
314 /* Given a decl, a section name, and whether the decl initializer
315 has relocs, choose attributes for the section. */
316 /* ??? Should be merged with SELECT_SECTION and UNIQUE_SECTION. */
317 unsigned int (* section_type_flags
) (tree
, const char *, int);
319 /* True if new jumps cannot be created, to replace existing ones or
320 not, at the current point in the compilation. */
321 bool (* cannot_modify_jumps_p
) (void);
323 /* Return a register class for which branch target register
324 optimizations should be applied. */
325 int (* branch_target_register_class
) (void);
327 /* Return true if branch target register optimizations should include
328 callee-saved registers that are not already live during the current
329 function. AFTER_PE_GEN is true if prologues and epilogues have
330 already been generated. */
331 bool (* branch_target_register_callee_saved
) (bool after_pe_gen
);
333 /* True if the constant X cannot be placed in the constant pool. */
334 bool (* cannot_force_const_mem
) (rtx
);
336 /* True if the insn X cannot be duplicated. */
337 bool (* cannot_copy_insn_p
) (rtx
);
339 /* Given an address RTX, undo the effects of LEGITIMIZE_ADDRESS. */
340 rtx (* delegitimize_address
) (rtx
);
342 /* True if it is OK to do sibling call optimization for the specified
343 call expression EXP. DECL will be the called function, or NULL if
344 this is an indirect call. */
345 bool (*function_ok_for_sibcall
) (tree decl
, tree exp
);
347 /* True if EXP should be placed in a "small data" section. */
348 bool (* in_small_data_p
) (tree
);
350 /* True if EXP names an object for which name resolution must resolve
351 to the current module. */
352 bool (* binds_local_p
) (tree
);
354 /* Do something target-specific to record properties of the DECL into
355 the associated SYMBOL_REF. */
356 void (* encode_section_info
) (tree
, rtx
, int);
358 /* Undo the effects of encode_section_info on the symbol string. */
359 const char * (* strip_name_encoding
) (const char *);
361 /* True if MODE is valid for a pointer in __attribute__((mode("MODE"))). */
362 bool (* valid_pointer_mode
) (enum machine_mode mode
);
364 /* True if a vector is opaque. */
365 bool (* vector_opaque_p
) (tree
);
367 /* Compute a (partial) cost for rtx X. Return true if the complete
368 cost has been computed, and false if subexpressions should be
369 scanned. In either case, *TOTAL contains the cost result. */
370 /* Note that CODE and OUTER_CODE ought to be RTX_CODE, but that's
371 not necessarily defined at this point. */
372 bool (* rtx_costs
) (rtx x
, int code
, int outer_code
, int *total
);
374 /* Compute the cost of X, used as an address. Never called with
375 invalid addresses. */
376 int (* address_cost
) (rtx x
);
378 /* Given a register, this hook should return a parallel of registers
379 to represent where to find the register pieces. Define this hook
380 if the register and its mode are represented in Dwarf in
381 non-contiguous locations, or if the register should be
382 represented in more than one register in Dwarf. Otherwise, this
383 hook should return NULL_RTX. */
384 rtx (* dwarf_register_span
) (rtx
);
386 /* Fetch the fixed register(s) which hold condition codes, for
387 targets where it makes sense to look for duplicate assignments to
388 the condition codes. This should return true if there is such a
389 register, false otherwise. The arguments should be set to the
390 fixed register numbers. Up to two condition code registers are
391 supported. If there is only one for this target, the int pointed
392 at by the second argument should be set to -1. */
393 bool (* fixed_condition_code_regs
) (unsigned int *, unsigned int *);
395 /* If two condition code modes are compatible, return a condition
396 code mode which is compatible with both, such that a comparison
397 done in the returned mode will work for both of the original
398 modes. If the condition code modes are not compatible, return
400 enum machine_mode (* cc_modes_compatible
) (enum machine_mode
,
403 /* Do machine-dependent code transformations. Called just before
404 delayed-branch scheduling. */
405 void (* machine_dependent_reorg
) (void);
407 /* Create the __builtin_va_list type. */
408 tree (* build_builtin_va_list
) (void);
410 /* Validity-checking routines for PCH files, target-specific.
411 get_pch_validity returns a pointer to the data to be stored,
412 and stores the size in its argument. pch_valid_p gets the same
413 information back and returns NULL if the PCH is valid,
414 or an error message if not.
416 void * (* get_pch_validity
) (size_t *);
417 const char * (* pch_valid_p
) (const void *, size_t);
419 /* True if the compiler should give an enum type only as many
420 bytes as it takes to represent the range of possible values of
422 bool (* default_short_enums
) (void);
424 /* This target hook returns an rtx that is used to store the address
425 of the current frame into the built-in setjmp buffer. */
426 rtx (* builtin_setjmp_frame_value
) (void);
428 /* This target hook should add STRING_CST trees for any hard regs
429 the port wishes to automatically clobber for all asms. */
430 tree (* md_asm_clobbers
) (tree
);
432 /* Leave the boolean fields at the end. */
434 /* True if arbitrary sections are supported. */
435 bool have_named_sections
;
437 /* True if "native" constructors and destructors are supported,
438 false if we're using collect2 for the job. */
439 bool have_ctors_dtors
;
441 /* True if thread-local storage is supported. */
444 /* True if a small readonly data section is supported. */
445 bool have_srodata_section
;
447 /* True if EH frame info sections should be zero-terminated. */
448 bool terminate_dw2_eh_frame_info
;
450 /* True if #NO_APP should be emitted at the beginning of
452 bool file_start_app_off
;
454 /* True if output_file_directive should be called for main_input_filename
455 at the beginning of assembly output. */
456 bool file_start_file_directive
;
458 /* Functions relating to calls - argument passing, returns, etc. */
460 bool (*promote_function_args
) (tree fntype
);
461 bool (*promote_function_return
) (tree fntype
);
462 bool (*promote_prototypes
) (tree fntype
);
463 rtx (*struct_value_rtx
) (tree fndecl
, int incoming
);
464 bool (*return_in_memory
) (tree type
, tree fndecl
);
465 bool (*return_in_msb
) (tree type
);
466 rtx (*expand_builtin_saveregs
) (void);
467 /* Returns pretend_argument_size. */
468 void (*setup_incoming_varargs
) (CUMULATIVE_ARGS
*ca
, enum machine_mode mode
,
469 tree type
, int *pretend_arg_size
, int second_time
);
470 bool (*strict_argument_naming
) (CUMULATIVE_ARGS
*ca
);
471 /* Returns true if we should use
472 targetm.calls.setup_incoming_varargs() and/or
473 targetm.calls.strict_argument_naming(). */
474 bool (*pretend_outgoing_varargs_named
) (CUMULATIVE_ARGS
*ca
);
478 extern struct gcc_target targetm
;