gcc/testsuite/gcc.dg/vmx/ldl-vsx-be-order.c

   1 /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
   2 /* { dg-require-effective-target powerpc_vsx_ok } */
   3 /* { dg-options "-maltivec=be -mabi=altivec -std=gnu99 -mvsx" } */
   4
   5 #include "harness.h"
   6
   7 static unsigned long svul[2] __attribute__ ((aligned (16)));
   8 static double svd[2] __attribute__ ((aligned (16)));
   9
  10 static void init ()
  11 {
  12   unsigned int i;
  13   for (i = 0; i < 2; ++i)
  14     {
  15       svul[i] = i;
  16       svd[i] = i * 1.0;
  17     }
  18 }
  19
  20 static void test ()
  21 {
  22 #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
  23   vector unsigned long evul = {1,0};
  24   vector double evd = {1.0,0.0};
  25 #else
  26   vector unsigned long evul = {0,1};
  27   vector double evd = {0.0,1.0};
  28 #endif
  29
  30   vector unsigned long vul;
  31   vector double vd;
  32
  33   init ();
  34
  35   vul = vec_ldl (0, (vector unsigned long *)svul);
  36   vd  = vec_ldl (0, (vector double *)svd);
  37
  38   check (vec_all_eq (vul, evul), "vul");
  39   check (vec_all_eq (vd,  evd ), "vd" );
  40 }