rs6000: Fix gcc.target/powerpc testsuite target requirements.
[gcc.git] / gcc / testsuite / gcc.target / powerpc / builtins-4-p9-runnable.c
1 /* { dg-do run } */
2 /* { dg-require-effective-target p9vector_hw } */
3 /* { dg-options "-mdejagnu-cpu=power9 -O2 " } */
4
5 #include <altivec.h> // vector
6
7 void abort (void);
8
9 int main() {
10 int i;
11
12 vector signed char vsca, vscr, vscexpt;
13 vector unsigned char vuca, vucr, vucexpt;
14 vector signed short int vssa, vssr, vssexpt;
15 vector unsigned short int vusa, vusr, vusexpt;
16 vector signed int vsia, vsir, vsiexpt;
17 vector unsigned int vuia, vuir, vuiexpt;
18 vector signed long long vslla, vsllr, vsllexpt;
19 vector unsigned long long vulla, vullr, vullexpt;
20
21 vsca = (vector signed char) {0, 1, 2, 3, 4, 5, 6, 7,
22 8, 9, 10, 11, 12, 13, 14, 15};
23
24 vscexpt = (vector signed char) {8, 0, 1, 0, 2, 0, 1, 0,
25 3, 0, 1, 0, 2, 0, 1, 0};
26
27 vuca = (vector unsigned char) {'0', '3', '6', '9', 'A', 'B', 'E', 'F',
28 'G', 'H', 'I', 'J', 'K', 'L', 'M', 'N'};
29
30 vucexpt = (vector unsigned char) {4, 0, 1, 0, 0, 1, 0, 1,
31 0, 3, 0, 1, 0, 2, 0, 1};
32
33 vssa = (vector short int) {0x1, 0x10, 0x100, 0x1000,
34 0x2, 0x20, 0x200, 0x2000};
35
36 vssexpt = (vector short int) {0, 4, 8, 12, 1, 5, 9, 13};
37
38 vusa = (vector unsigned short int) {0x4, 0x40, 0x400, 0x4000,
39 0x8, 0x80, 0x800, 0x8000};
40 vusexpt = (vector unsigned short int) {2, 6, 10, 14, 3, 7, 11, 15};
41
42 vsia = (vector int) {0x10000, 0x100000, 0x1000000, 0x10000000};
43 vsiexpt = (vector int){16, 20, 24, 28};
44
45 vuia = (vector unsigned int) {0x2, 0x20, 0x200, 0x2000};
46 vuiexpt = (vector unsigned int){1, 5, 9, 13};
47
48 vslla = (vector long long) {0x0000000000010000LL, 0x0001000100010000LL};
49 vsllexpt = (vector long long){16, 16};
50
51 vulla = (vector unsigned long long) {0x0000400000000000LL, 0x0080000000000000ULL};
52
53 vullexpt = (vector unsigned long long) {46, 55};
54
55 vscr = vec_cnttz (vsca);
56 vucr = vec_cnttz (vuca);
57 vssr = vec_cnttz (vssa);
58 vusr = vec_cnttz (vusa);
59 vsir = vec_cnttz (vsia);
60 vuir = vec_cnttz (vuia);
61 vsllr = vec_cnttz (vslla);
62 vullr = vec_cnttz (vulla);
63
64 for (i=0; i<16; i++) {
65 if (vscr[i] != vscexpt[i])
66 abort();
67
68 if (vucr[i] != vucexpt[i])
69 abort();
70 }
71
72 for (i=0; i<8; i++) {
73 if (vssr[i] != vssexpt[i])
74 abort();
75
76 if (vusr[i] != vusexpt[i])
77 abort();
78 }
79
80 for (i=0; i<4; i++) {
81 if (vsir[i] != vsiexpt[i])
82 abort();
83
84 if (vuir[i] != vuiexpt[i])
85 abort();
86 }
87
88 for (i=0; i<2; i++) {
89 if (vsllr[i] != vsllexpt[i])
90 abort();
91
92 if (vullr[i] != vullexpt[i])
93 abort();
94 }
95 }