gcc/testsuite/gcc.target/powerpc/p8vector-vectorize-1.c

   1 /* { dg-do compile { target { powerpc*-*-* } } } */
   2 /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
   3 /* { dg-require-effective-target powerpc_p8vector_ok } */
   4 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
   5 /* { dg-options "-mcpu=power8 -O2 -ftree-vectorize -fvect-cost-model=dynamic -fno-unroll-loops -fno-unroll-all-loops" } */
   6
   7 #ifndef SIZE
   8 #define SIZE 1024
   9 #endif
  10
  11 #ifndef ALIGN
  12 #define ALIGN 32
  13 #endif
  14
  15 #ifndef TYPE
  16 #define TYPE long long
  17 #endif
  18
  19 #ifndef SIGN_TYPE
  20 #define SIGN_TYPE signed TYPE
  21 #endif
  22
  23 #ifndef UNS_TYPE
  24 #define UNS_TYPE unsigned TYPE
  25 #endif
  26
  27 #define ALIGN_ATTR __attribute__((__aligned__(ALIGN)))
  28
  29 SIGN_TYPE       sa[SIZE] ALIGN_ATTR;
  30 SIGN_TYPE       sb[SIZE] ALIGN_ATTR;
  31 SIGN_TYPE       sc[SIZE] ALIGN_ATTR;
  32
  33 UNS_TYPE        ua[SIZE] ALIGN_ATTR;
  34 UNS_TYPE        ub[SIZE] ALIGN_ATTR;
  35 UNS_TYPE        uc[SIZE] ALIGN_ATTR;
  36
  37 void
  38 sign_add (void)
  39 {
  40   unsigned long i;
  41
  42   for (i = 0; i < SIZE; i++)
  43     sa[i] = sb[i] + sc[i];
  44 }
  45
  46 void
  47 sign_sub (void)
  48 {
  49   unsigned long i;
  50
  51   for (i = 0; i < SIZE; i++)
  52     sa[i] = sb[i] - sc[i];
  53 }
  54
  55 void
  56 sign_shift_left (void)
  57 {
  58   unsigned long i;
  59
  60   for (i = 0; i < SIZE; i++)
  61     sa[i] = sb[i] << sc[i];
  62 }
  63
  64 void
  65 sign_shift_right (void)
  66 {
  67   unsigned long i;
  68
  69   for (i = 0; i < SIZE; i++)
  70     sa[i] = sb[i] >> sc[i];
  71 }
  72
  73 void
  74 sign_max (void)
  75 {
  76   unsigned long i;
  77
  78   for (i = 0; i < SIZE; i++)
  79     sa[i] = (sb[i] > sc[i]) ? sb[i] : sc[i];
  80 }
  81
  82 void
  83 sign_min (void)
  84 {
  85   unsigned long i;
  86
  87   for (i = 0; i < SIZE; i++)
  88     sa[i] = (sb[i] < sc[i]) ? sb[i] : sc[i];
  89 }
  90
  91 void
  92 sign_abs (void)
  93 {
  94   unsigned long i;
  95
  96   for (i = 0; i < SIZE; i++)
  97     sa[i] = (sb[i] < 0) ? -sb[i] : sb[i];       /* xor, vsubudm, vmaxsd.  */
  98 }
  99
 100 void
 101 sign_eq (SIGN_TYPE val1, SIGN_TYPE val2)
 102 {
 103   unsigned long i;
 104
 105   for (i = 0; i < SIZE; i++)
 106     sa[i] = (sb[i] == sc[i]) ? val1 : val2;
 107 }
 108
 109 void
 110 sign_lt (SIGN_TYPE val1, SIGN_TYPE val2)
 111 {
 112   unsigned long i;
 113
 114   for (i = 0; i < SIZE; i++)
 115     sa[i] = (sb[i] < sc[i]) ? val1 : val2;
 116 }
 117
 118 void
 119 uns_add (void)
 120 {
 121   unsigned long i;
 122
 123   for (i = 0; i < SIZE; i++)
 124     ua[i] = ub[i] + uc[i];
 125 }
 126
 127 void
 128 uns_sub (void)
 129 {
 130   unsigned long i;
 131
 132   for (i = 0; i < SIZE; i++)
 133     ua[i] = ub[i] - uc[i];
 134 }
 135
 136 void
 137 uns_shift_left (void)
 138 {
 139   unsigned long i;
 140
 141   for (i = 0; i < SIZE; i++)
 142     ua[i] = ub[i] << uc[i];
 143 }
 144
 145 void
 146 uns_shift_right (void)
 147 {
 148   unsigned long i;
 149
 150   for (i = 0; i < SIZE; i++)
 151     ua[i] = ub[i] >> uc[i];
 152 }
 153
 154 void
 155 uns_max (void)
 156 {
 157   unsigned long i;
 158
 159   for (i = 0; i < SIZE; i++)
 160     ua[i] = (ub[i] > uc[i]) ? ub[i] : uc[i];
 161 }
 162
 163 void
 164 uns_min (void)
 165 {
 166   unsigned long i;
 167
 168   for (i = 0; i < SIZE; i++)
 169     ua[i] = (ub[i] < uc[i]) ? ub[i] : uc[i];
 170 }
 171
 172 void
 173 uns_eq (UNS_TYPE val1, UNS_TYPE val2)
 174 {
 175   unsigned long i;
 176
 177   for (i = 0; i < SIZE; i++)
 178     ua[i] = (ub[i] == uc[i]) ? val1 : val2;
 179 }
 180
 181 void
 182 uns_lt (UNS_TYPE val1, UNS_TYPE val2)
 183 {
 184   unsigned long i;
 185
 186   for (i = 0; i < SIZE; i++)
 187     ua[i] = (ub[i] < uc[i]) ? val1 : val2;
 188 }
 189
 190 /* { dg-final { scan-assembler-times "\[\t \]vaddudm\[\t \]"  2 } } */
 191 /* { dg-final { scan-assembler-times "\[\t \]vsubudm\[\t \]"  3 } } */
 192 /* { dg-final { scan-assembler-times "\[\t \]vmaxsd\[\t \]"   2 } } */
 193 /* { dg-final { scan-assembler-times "\[\t \]vmaxud\[\t \]"   1 } } */
 194 /* { dg-final { scan-assembler-times "\[\t \]vminsd\[\t \]"   1 } } */
 195 /* { dg-final { scan-assembler-times "\[\t \]vminud\[\t \]"   1 } } */
 196 /* { dg-final { scan-assembler-times "\[\t \]vsld\[\t \]"     2 } } */
 197 /* { dg-final { scan-assembler-times "\[\t \]vsrad\[\t \]"    1 } } */
 198 /* { dg-final { scan-assembler-times "\[\t \]vsrd\[\t \]"     1 } } */
 199 /* { dg-final { scan-assembler-times "\[\t \]vcmpequd\[\t \]" 2 } } */
 200 /* { dg-final { scan-assembler-times "\[\t \]vcmpgtsd\[\t \]" 1 } } */
 201 /* { dg-final { scan-assembler-times "\[\t \]vcmpgtud\[\t \]" 1 } } */