1 # Copyright (C) 1999-2020 Free Software Foundation, Inc.
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
20 # This file defines procs for determining features supported by the target.
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
35 # "! Fortran" for Fortran code,
37 # "// ObjC++" for ObjC++
39 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
40 # allow for ObjC/ObjC++ specific flags.
42 proc check_compile {basename type contents args} {
44 verbose "check_compile tool: $tool for $basename"
46 # Save additional_sources to avoid compiling testsuite's sources
47 # against check_compile's source.
48 global additional_sources
49 if [info exists additional_sources] {
50 set tmp_additional_sources "$additional_sources"
51 set additional_sources ""
54 if { [llength $args] > 0 } {
55 set options [list "additional_flags=[lindex $args 0]"]
59 switch -glob -- $contents {
60 "*! Fortran*" { set src ${basename}[pid].f90 }
61 "*// C++*" { set src ${basename}[pid].cc }
62 "*// D*" { set src ${basename}[pid].d }
63 "*// ObjC++*" { set src ${basename}[pid].mm }
64 "*/* ObjC*" { set src ${basename}[pid].m }
65 "*// Go*" { set src ${basename}[pid].go }
68 "objc" { set src ${basename}[pid].m }
69 "obj-c++" { set src ${basename}[pid].mm }
70 default { set src ${basename}[pid].c }
75 set compile_type $type
77 assembly { set output ${basename}[pid].s }
78 object { set output ${basename}[pid].o }
79 executable { set output ${basename}[pid].exe }
81 set output ${basename}[pid].s
82 lappend options "additional_flags=-fdump-$type"
83 set compile_type assembly
89 set lines [${tool}_target_compile $src $output $compile_type "$options"]
92 set scan_output $output
93 # Don't try folding this into the switch above; calling "glob" before the
94 # file is created won't work.
95 if [regexp "rtl-(.*)" $type dummy rtl_type] {
96 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
100 # Restore additional_sources.
101 if [info exists additional_sources] {
102 set additional_sources "$tmp_additional_sources"
105 return [list $lines $scan_output]
108 proc current_target_name { } {
110 if [info exists target_info(target,name)] {
111 set answer $target_info(target,name)
118 # Implement an effective-target check for property PROP by invoking
119 # the Tcl command ARGS and seeing if it returns true.
121 proc check_cached_effective_target { prop args } {
124 set target [current_target_name]
125 if {![info exists et_cache($prop,$target)]} {
126 verbose "check_cached_effective_target $prop: checking $target" 2
127 if {[string is true -strict $args] || [string is false -strict $args]} {
128 error {check_cached_effective_target condition already evaluated; did you pass [...] instead of the expected {...}?}
130 set code [catch {uplevel eval $args} result]
131 if {$code != 0 && $code != 2} {
132 return -code $code $result
134 set et_cache($prop,$target) $result
137 set value $et_cache($prop,$target)
138 verbose "check_cached_effective_target $prop: returning $value for $target" 2
142 # Implements a version of check_cached_effective_target that also takes et_index
143 # into account when creating the key for the cache.
144 proc check_cached_effective_target_indexed { prop args } {
146 set key "$et_index $prop"
147 verbose "check_cached_effective_target_index $prop: returning $key" 2
149 return [check_cached_effective_target $key [list uplevel eval $args]]
152 # Clear effective-target cache. This is useful after testing
153 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
155 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
156 # do a clear_effective_target_cache at the end as the target cache can
157 # make decisions based upon the flags, and those decisions need to be
158 # redone when the flags change. An example of this is the
159 # asan_init/asan_finish pair.
161 proc clear_effective_target_cache { } {
166 # Like check_compile, but delete the output file and return true if the
167 # compiler printed no messages.
168 proc check_no_compiler_messages_nocache {args} {
169 set result [eval check_compile $args]
170 set lines [lindex $result 0]
171 set output [lindex $result 1]
172 remote_file build delete $output
173 return [string match "" $lines]
176 # Like check_no_compiler_messages_nocache, but cache the result.
177 # PROP is the property we're checking, and doubles as a prefix for
178 # temporary filenames.
179 proc check_no_compiler_messages {prop args} {
180 return [check_cached_effective_target $prop {
181 eval [list check_no_compiler_messages_nocache $prop] $args
185 # Like check_compile, but return true if the compiler printed no
186 # messages and if the contents of the output file satisfy PATTERN.
187 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
188 # don't match regular expression REGEXP, otherwise they satisfy it
189 # if they do match regular expression PATTERN. (PATTERN can start
190 # with something like "[!]" if the regular expression needs to match
191 # "!" as the first character.)
193 # Delete the output file before returning. The other arguments are
194 # as for check_compile.
195 proc check_no_messages_and_pattern_nocache {basename pattern args} {
198 set result [eval [list check_compile $basename] $args]
199 set lines [lindex $result 0]
200 set output [lindex $result 1]
203 if { [string match "" $lines] } {
204 set chan [open "$output"]
205 set invert [regexp {^!(.*)} $pattern dummy pattern]
206 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
210 remote_file build delete $output
214 # Like check_no_messages_and_pattern_nocache, but cache the result.
215 # PROP is the property we're checking, and doubles as a prefix for
216 # temporary filenames.
217 proc check_no_messages_and_pattern {prop pattern args} {
218 return [check_cached_effective_target $prop {
219 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
223 # Try to compile and run an executable from code CONTENTS. Return true
224 # if the compiler reports no messages and if execution "passes" in the
225 # usual DejaGNU sense. The arguments are as for check_compile, with
226 # TYPE implicitly being "executable".
227 proc check_runtime_nocache {basename contents args} {
230 set result [eval [list check_compile $basename executable $contents] $args]
231 set lines [lindex $result 0]
232 set output [lindex $result 1]
235 if { [string match "" $lines] } {
236 # No error messages, everything is OK.
237 set result [remote_load target "./$output" "" ""]
238 set status [lindex $result 0]
239 verbose "check_runtime_nocache $basename: status is <$status>" 2
240 if { $status == "pass" } {
244 remote_file build delete $output
248 # Like check_runtime_nocache, but cache the result. PROP is the
249 # property we're checking, and doubles as a prefix for temporary
251 proc check_runtime {prop args} {
254 return [check_cached_effective_target $prop {
255 eval [list check_runtime_nocache $prop] $args
259 # Return 1 if GCC was configured with $pattern.
260 proc check_configured_with { pattern } {
263 set options [list "additional_flags=-v"]
264 set gcc_output [${tool}_target_compile "" "" "none" $options]
265 if { [ regexp "Configured with: \[^\n\]*$pattern" $gcc_output ] } {
266 verbose "Matched: $pattern" 2
270 verbose "Failed to match: $pattern" 2
274 ###############################
275 # proc check_weak_available { }
276 ###############################
278 # weak symbols are only supported in some configs/object formats
279 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
281 proc check_weak_available { } {
284 # All mips targets should support it
286 if { [ string first "mips" $target_cpu ] >= 0 } {
290 # All AIX targets should support it
292 if { [istarget *-*-aix*] } {
296 # All solaris2 targets should support it
298 if { [istarget *-*-solaris2*] } {
302 # Windows targets Cygwin and MingW32 support it
304 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
308 # HP-UX 10.X doesn't support it
310 if { [istarget hppa*-*-hpux10*] } {
314 # nvptx (nearly) supports it
316 if { [istarget nvptx-*-*] } {
320 # pdp11 doesn't support it
322 if { [istarget pdp11*-*-*] } {
326 # ELF and ECOFF support it. a.out does with gas/gld but may also with
327 # other linkers, so we should try it
329 set objformat [gcc_target_object_format]
337 unknown { return -1 }
342 # return 1 if weak undefined symbols are supported.
344 proc check_effective_target_weak_undefined { } {
345 if { [istarget hppa*-*-hpux*] } {
348 return [check_runtime weak_undefined {
349 extern void foo () __attribute__((weak));
350 int main (void) { if (foo) return 1; return 0; }
354 ###############################
355 # proc check_weak_override_available { }
356 ###############################
358 # Like check_weak_available, but return 0 if weak symbol definitions
359 # cannot be overridden.
361 proc check_weak_override_available { } {
362 if { [istarget *-*-mingw*] } {
365 return [check_weak_available]
368 # The noinit attribute is only supported by some targets.
369 # This proc returns 1 if it's supported, 0 if it's not.
371 proc check_effective_target_noinit { } {
372 if { [istarget arm*-*-eabi]
373 || [istarget msp430-*-*] } {
380 ###############################
381 # proc check_visibility_available { what_kind }
382 ###############################
384 # The visibility attribute is only support in some object formats
385 # This proc returns 1 if it is supported, 0 if not.
386 # The argument is the kind of visibility, default/protected/hidden/internal.
388 proc check_visibility_available { what_kind } {
389 if [string match "" $what_kind] { set what_kind "hidden" }
391 return [check_no_compiler_messages visibility_available_$what_kind object "
392 void f() __attribute__((visibility(\"$what_kind\")));
397 ###############################
398 # proc check_alias_available { }
399 ###############################
401 # Determine if the target toolchain supports the alias attribute.
403 # Returns 2 if the target supports aliases. Returns 1 if the target
404 # only supports weak aliased. Returns 0 if the target does not
405 # support aliases at all. Returns -1 if support for aliases could not
408 proc check_alias_available { } {
411 return [check_cached_effective_target alias_available {
414 verbose "check_alias_available compiling testfile $src" 2
415 set f [open $src "w"]
416 # Compile a small test program. The definition of "g" is
417 # necessary to keep the Solaris assembler from complaining
419 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
420 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
422 set lines [${tool}_target_compile $src $obj object ""]
424 remote_file build delete $obj
426 if [string match "" $lines] then {
427 # No error messages, everything is OK.
430 if [regexp "alias definitions not supported" $lines] {
431 verbose "check_alias_available target does not support aliases" 2
433 set objformat [gcc_target_object_format]
435 if { $objformat == "elf" } {
436 verbose "check_alias_available but target uses ELF format, so it ought to" 2
442 if [regexp "only weak aliases are supported" $lines] {
443 verbose "check_alias_available target supports only weak aliases" 2
453 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
455 proc check_effective_target_alias { } {
456 if { [check_alias_available] < 2 } {
463 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
465 proc check_ifunc_available { } {
466 return [check_no_compiler_messages ifunc_available object {
471 typedef void F (void);
472 F* g (void) { return &f_; }
473 void f () __attribute__ ((ifunc ("g")));
480 # Returns true if --gc-sections is supported on the target.
482 proc check_gc_sections_available { } {
485 return [check_cached_effective_target gc_sections_available {
486 # Some targets don't support gc-sections despite whatever's
487 # advertised by ld's options.
488 if { [istarget alpha*-*-*]
489 || [istarget ia64-*-*] } {
493 # elf2flt uses -q (--emit-relocs), which is incompatible with
495 if { [board_info target exists ldflags]
496 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
500 # VxWorks kernel modules are relocatable objects linked with -r,
501 # while RTP executables are linked with -q (--emit-relocs).
502 # Both of these options are incompatible with --gc-sections.
503 if { [istarget *-*-vxworks*] } {
507 # Check if the ld used by gcc supports --gc-sections.
508 set options [list "additional_flags=-print-prog-name=ld"]
509 set gcc_ld [lindex [${tool}_target_compile "" "" "none" $options] 0]
510 set ld_output [remote_exec host "$gcc_ld" "--help"]
511 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
519 # Returns 1 if "dot" is supported on the host.
521 proc check_dot_available { } {
522 verbose "check_dot_available" 2
524 set status [remote_exec host "dot" "-V"]
525 verbose " status: $status" 2
526 if { [lindex $status 0] != 0 } {
532 # Return 1 if according to target_info struct and explicit target list
533 # target is supposed to support trampolines.
535 proc check_effective_target_trampolines { } {
536 if [target_info exists gcc,no_trampolines] {
539 if { [istarget avr-*-*]
540 || [istarget msp430-*-*]
541 || [istarget nvptx-*-*]
542 || [istarget hppa2.0w-hp-hpux11.23]
543 || [istarget hppa64-hp-hpux11.23]
544 || [istarget pru-*-*]
545 || [istarget bpf-*-*] } {
551 # Return 1 if target has limited stack size.
553 proc check_effective_target_stack_size { } {
554 if [target_info exists gcc,stack_size] {
560 # Return the value attribute of an effective target, otherwise return 0.
562 proc dg-effective-target-value { effective_target } {
563 if { "$effective_target" == "stack_size" } {
564 if [check_effective_target_stack_size] {
565 return [target_info gcc,stack_size]
572 # Return 1 if signal.h is supported.
574 proc check_effective_target_signal { } {
575 if [target_info exists gcc,signal_suppress] {
581 # Return 1 if according to target_info struct and explicit target list
582 # target disables -fdelete-null-pointer-checks. Targets should return 0
583 # if they simply default to -fno-delete-null-pointer-checks but obey
584 # -fdelete-null-pointer-checks when passed explicitly (and tests that
585 # depend on this option should do that).
587 proc check_effective_target_keeps_null_pointer_checks { } {
588 if [target_info exists keeps_null_pointer_checks] {
591 if { [istarget msp430-*-*] || [istarget cr16-*-*] } {
597 # Return the autofdo profile wrapper
599 # Linux by default allows 516KB of perf event buffers
600 # in /proc/sys/kernel/perf_event_mlock_kb
601 # Each individual perf tries to grab it
602 # This causes problems with parallel test suite runs. Instead
603 # limit us to 8 pages (32K), which should be good enough
604 # for the small test programs. With the default settings
605 # this allows parallelism of 16 and higher of parallel gcc-auto-profile
606 proc profopt-perf-wrapper { } {
608 return "$srcdir/../config/i386/gcc-auto-profile -o perf.data -m8 "
611 # Return true if profiling is supported on the target.
613 proc check_profiling_available { test_what } {
614 verbose "Profiling argument is <$test_what>" 1
616 # These conditions depend on the argument so examine them before
617 # looking at the cache variable.
619 # Tree profiling requires TLS runtime support.
620 if { $test_what == "-fprofile-generate" } {
621 if { ![check_effective_target_tls_runtime] } {
626 if { $test_what == "-fauto-profile" } {
627 if { !([istarget i?86-*-linux*] || [istarget x86_64-*-linux*]) } {
628 verbose "autofdo only supported on linux"
631 # not cross compiling?
633 verbose "autofdo not supported for non native builds"
636 set event [profopt-perf-wrapper]
638 verbose "autofdo not supported"
642 set status [remote_exec host "$srcdir/../config/i386/gcc-auto-profile" "true -v >/dev/null"]
643 if { [lindex $status 0] != 0 } {
644 verbose "autofdo not supported because perf does not work"
648 # no good way to check this in advance -- check later instead.
649 #set status [remote_exec host "create_gcov" "2>/dev/null"]
650 #if { [lindex $status 0] != 255 } {
651 # verbose "autofdo not supported due to missing create_gcov"
656 # Support for -p on solaris2 relies on mcrt1.o which comes with the
657 # vendor compiler. We cannot reliably predict the directory where the
658 # vendor compiler (and thus mcrt1.o) is installed so we can't
659 # necessarily find mcrt1.o even if we have it.
660 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
664 # We don't yet support profiling for MIPS16.
665 if { [istarget mips*-*-*]
666 && ![check_effective_target_nomips16]
667 && ($test_what == "-p" || $test_what == "-pg") } {
671 # MinGW does not support -p.
672 if { [istarget *-*-mingw*] && $test_what == "-p" } {
676 # cygwin does not support -p.
677 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
681 # uClibc does not have gcrt1.o.
682 if { [check_effective_target_uclibc]
683 && ($test_what == "-p" || $test_what == "-pg") } {
687 # Now examine the cache variable.
688 set profiling_working \
689 [check_cached_effective_target profiling_available {
690 # Some targets don't have any implementation of __bb_init_func or are
691 # missing other needed machinery.
692 if {[istarget aarch64*-*-elf]
693 || [istarget am3*-*-linux*]
694 || [istarget amdgcn-*-*]
695 || [istarget arm*-*-eabi*]
696 || [istarget arm*-*-elf]
697 || [istarget arm*-*-symbianelf*]
698 || [istarget avr-*-*]
699 || [istarget bfin-*-*]
700 || [istarget cris-*-*]
701 || [istarget csky-*-elf]
702 || [istarget fido-*-elf]
703 || [istarget h8300-*-*]
704 || [istarget lm32-*-*]
705 || [istarget m32c-*-elf]
706 || [istarget m68k-*-elf]
707 || [istarget m68k-*-uclinux*]
708 || [istarget mips*-*-elf*]
709 || [istarget mmix-*-*]
710 || [istarget mn10300-*-elf*]
711 || [istarget moxie-*-elf*]
712 || [istarget msp430-*-*]
713 || [istarget nds32*-*-elf]
714 || [istarget nios2-*-elf]
715 || [istarget nvptx-*-*]
716 || [istarget powerpc-*-eabi*]
717 || [istarget powerpc-*-elf]
718 || [istarget pru-*-*]
720 || [istarget tic6x-*-elf]
721 || [istarget visium-*-*]
722 || [istarget xstormy16-*]
723 || [istarget xtensa*-*-elf]
724 || [istarget *-*-rtems*]
725 || [istarget *-*-vxworks*] } {
732 # -pg link test result can't be cached since it may change between
734 if { $profiling_working == 1
735 && ![check_no_compiler_messages_nocache profiling executable {
736 int main() { return 0; } } "-pg"] } {
737 set profiling_working 0
740 return $profiling_working
743 # Check to see if a target is "freestanding". This is as per the definition
744 # in Section 4 of C99 standard. Effectively, it is a target which supports no
745 # extra headers or libraries other than what is considered essential.
746 proc check_effective_target_freestanding { } {
747 if { [istarget nvptx-*-*] } {
753 # Check to see that file I/O functions are available.
754 proc check_effective_target_fileio { } {
755 return [check_no_compiler_messages fileio_available executable {
758 char *n = tmpnam (NULL);
759 FILE *f = fopen (n, "w");
766 # Return 1 if target has packed layout of structure members by
767 # default, 0 otherwise. Note that this is slightly different than
768 # whether the target has "natural alignment": both attributes may be
771 proc check_effective_target_default_packed { } {
772 return [check_no_compiler_messages default_packed assembly {
773 struct x { char a; long b; } c;
774 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
778 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
779 # documentation, where the test also comes from.
781 proc check_effective_target_pcc_bitfield_type_matters { } {
782 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
783 # bitfields, but let's stick to the example code from the docs.
784 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
785 struct foo1 { char x; char :0; char y; };
786 struct foo2 { char x; int :0; char y; };
787 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
791 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
793 proc add_options_for_tls { flags } {
794 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
795 # libthread, so always pass -pthread for native TLS. Same for AIX.
796 # Need to duplicate native TLS check from
797 # check_effective_target_tls_native to avoid recursion.
798 if { ([istarget powerpc-ibm-aix*]) &&
799 [check_no_messages_and_pattern tls_native "!emutls" assembly {
801 int f (void) { return i; }
802 void g (int j) { i = j; }
804 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
809 # Return 1 if indirect jumps are supported, 0 otherwise.
811 proc check_effective_target_indirect_jumps {} {
812 if { [istarget nvptx-*-*] || [istarget bpf-*-*] } {
818 # Return 1 if nonlocal goto is supported, 0 otherwise.
820 proc check_effective_target_nonlocal_goto {} {
821 if { [istarget nvptx-*-*] || [istarget bpf-*-*] } {
827 # Return 1 if global constructors are supported, 0 otherwise.
829 proc check_effective_target_global_constructor {} {
830 if { [istarget nvptx-*-*]
831 || [istarget amdgcn-*-*]
832 || [istarget bpf-*-*] } {
838 # Return 1 if taking label values is supported, 0 otherwise.
840 proc check_effective_target_label_values {} {
841 if { [istarget nvptx-*-*] || [target_info exists gcc,no_label_values] } {
848 # Return 1 if builtin_return_address and builtin_frame_address are
849 # supported, 0 otherwise.
851 proc check_effective_target_return_address {} {
852 if { [istarget nvptx-*-*] } {
855 # No notion of return address in eBPF.
856 if { [istarget bpf-*-*] } {
859 # It could be supported on amdgcn, but isn't yet.
860 if { [istarget amdgcn*-*-*] } {
866 # Return 1 if the assembler does not verify function types against
867 # calls, 0 otherwise. Such verification will typically show up problems
868 # with K&R C function declarations.
870 proc check_effective_target_untyped_assembly {} {
871 if { [istarget nvptx-*-*] } {
877 # Return 1 if alloca is supported, 0 otherwise.
879 proc check_effective_target_alloca {} {
880 if { [istarget nvptx-*-*] } {
881 return [check_no_compiler_messages alloca assembly {
883 void g (int n) { f (__builtin_alloca (n)); }
889 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
891 proc check_effective_target_tls {} {
892 return [check_no_compiler_messages tls assembly {
894 int f (void) { return i; }
895 void g (int j) { i = j; }
899 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
901 proc check_effective_target_tls_native {} {
902 # VxWorks uses emulated TLS machinery, but with non-standard helper
903 # functions, so we fail to automatically detect it.
904 if { [istarget *-*-vxworks*] } {
908 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
910 int f (void) { return i; }
911 void g (int j) { i = j; }
915 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
917 proc check_effective_target_tls_emulated {} {
918 # VxWorks uses emulated TLS machinery, but with non-standard helper
919 # functions, so we fail to automatically detect it.
920 if { [istarget *-*-vxworks*] } {
924 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
926 int f (void) { return i; }
927 void g (int j) { i = j; }
931 # Return 1 if TLS executables can run correctly, 0 otherwise.
933 proc check_effective_target_tls_runtime {} {
934 return [check_runtime tls_runtime {
935 __thread int thr __attribute__((tls_model("global-dynamic"))) = 0;
936 int main (void) { return thr; }
937 } [add_options_for_tls ""]]
940 # Return 1 if atomic compare-and-swap is supported on 'int'
942 proc check_effective_target_cas_char {} {
943 return [check_no_compiler_messages cas_char assembly {
944 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
950 proc check_effective_target_cas_int {} {
951 return [check_no_compiler_messages cas_int assembly {
952 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
954 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
962 # Return 1 if -ffunction-sections is supported, 0 otherwise.
964 proc check_effective_target_function_sections {} {
965 # Darwin has its own scheme and silently accepts -ffunction-sections.
966 if { [istarget *-*-darwin*] } {
970 return [check_no_compiler_messages functionsections assembly {
972 } "-ffunction-sections"]
975 # Return 1 if instruction scheduling is available, 0 otherwise.
977 proc check_effective_target_scheduling {} {
978 return [check_no_compiler_messages scheduling object {
980 } "-fschedule-insns"]
983 # Return 1 if trapping arithmetic is available, 0 otherwise.
985 proc check_effective_target_trapping {} {
986 return [check_no_compiler_messages trapping object {
987 int add (int a, int b) { return a + b; }
991 # Return 1 if compilation with -fgraphite is error-free for trivial
994 proc check_effective_target_fgraphite {} {
995 return [check_no_compiler_messages fgraphite object {
1000 # Return 1 if compiled with --enable-offload-targets=
1001 # This affects host compilation as ENABLE_OFFLOAD then evaluates to true.
1002 proc check_effective_target_offloading_enabled {} {
1003 return [check_configured_with "--enable-offload-targets"]
1006 # Return 1 if compilation with -fopenacc is error-free for trivial
1007 # code, 0 otherwise.
1009 proc check_effective_target_fopenacc {} {
1010 # nvptx/amdgcn can be built with the device-side bits of openacc, but it
1011 # does not make sense to test it as an openacc host.
1012 if [istarget nvptx-*-*] { return 0 }
1013 if [istarget amdgcn-*-*] { return 0 }
1015 return [check_no_compiler_messages fopenacc object {
1020 # Return 1 if compilation with -fopenmp is error-free for trivial
1021 # code, 0 otherwise.
1023 proc check_effective_target_fopenmp {} {
1024 # nvptx/amdgcn can be built with the device-side bits of libgomp, but it
1025 # does not make sense to test it as an openmp host.
1026 if [istarget nvptx-*-*] { return 0 }
1027 if [istarget amdgcn-*-*] { return 0 }
1029 return [check_no_compiler_messages fopenmp object {
1034 # Return 1 if compilation with -fgnu-tm is error-free for trivial
1035 # code, 0 otherwise.
1037 proc check_effective_target_fgnu_tm {} {
1038 return [check_no_compiler_messages fgnu_tm object {
1043 # Return 1 if the target supports mmap, 0 otherwise.
1045 proc check_effective_target_mmap {} {
1046 return [check_function_available "mmap"]
1049 # Return 1 if the target supports dlopen, 0 otherwise.
1050 proc check_effective_target_dlopen {} {
1051 return [check_no_compiler_messages dlopen executable {
1053 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
1054 } [add_options_for_dlopen ""]]
1057 proc add_options_for_dlopen { flags } {
1058 return "$flags -ldl"
1061 # Return 1 if the target supports clone, 0 otherwise.
1062 proc check_effective_target_clone {} {
1063 return [check_function_available "clone"]
1066 # Return 1 if the target supports setrlimit, 0 otherwise.
1067 proc check_effective_target_setrlimit {} {
1068 # Darwin has non-posix compliant RLIMIT_AS
1069 if { [istarget *-*-darwin*] } {
1072 return [check_function_available "setrlimit"]
1075 # Return 1 if the target supports gettimeofday, 0 otherwise.
1076 proc check_effective_target_gettimeofday {} {
1077 return [check_function_available "gettimeofday"]
1080 # Return 1 if the target supports swapcontext, 0 otherwise.
1081 proc check_effective_target_swapcontext {} {
1082 return [check_no_compiler_messages swapcontext executable {
1083 #include <ucontext.h>
1086 ucontext_t orig_context,child_context;
1087 if (swapcontext(&child_context, &orig_context) < 0) { }
1092 # Return 1 if the target supports POSIX threads, 0 otherwise.
1093 proc check_effective_target_pthread {} {
1094 return [check_no_compiler_messages pthread object {
1095 #include <pthread.h>
1100 # Return 1 if compilation with -gstabs is error-free for trivial
1101 # code, 0 otherwise.
1103 proc check_effective_target_stabs {} {
1104 return [check_no_compiler_messages stabs object {
1109 # Return 1 if compilation with -mpe-aligned-commons is error-free
1110 # for trivial code, 0 otherwise.
1112 proc check_effective_target_pe_aligned_commons {} {
1113 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
1114 return [check_no_compiler_messages pe_aligned_commons object {
1116 } "-mpe-aligned-commons"]
1121 # Return 1 if the target supports -static
1122 proc check_effective_target_static {} {
1123 if { [istarget arm*-*-uclinuxfdpiceabi] } {
1126 return [check_no_compiler_messages static executable {
1127 int main (void) { return 0; }
1131 # Return 1 if the target supports -fstack-protector
1132 proc check_effective_target_fstack_protector {} {
1133 return [check_runtime fstack_protector {
1135 int main (int argc, char *argv[]) {
1137 return !strcpy (buf, strrchr (argv[0], '/'));
1139 } "-fstack-protector"]
1142 # Return 1 if the target supports -fstack-check or -fstack-check=$stack_kind
1143 proc check_stack_check_available { stack_kind } {
1144 if [string match "" $stack_kind] then {
1145 set stack_opt "-fstack-check"
1146 } else { set stack_opt "-fstack-check=$stack_kind" }
1148 return [check_no_compiler_messages stack_check_$stack_kind executable {
1149 int main (void) { return 0; }
1153 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
1154 # for trivial code, 0 otherwise. As some targets (ARM for example) only
1155 # warn when -fprofile-use is also supplied we test that combination too.
1157 proc check_effective_target_freorder {} {
1158 if { [check_no_compiler_messages freorder object {
1160 } "-freorder-blocks-and-partition"]
1161 && [check_no_compiler_messages fprofile_use_freorder object {
1163 } "-fprofile-use -freorder-blocks-and-partition -Wno-missing-profile"] } {
1169 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
1170 # emitted, 0 otherwise. Whether a shared library can actually be built is
1171 # out of scope for this test.
1173 proc check_effective_target_fpic { } {
1174 # Note that M68K has a multilib that supports -fpic but not
1175 # -fPIC, so we need to check both. We test with a program that
1176 # requires GOT references.
1177 foreach arg {fpic fPIC} {
1178 if [check_no_compiler_messages $arg object {
1179 extern int foo (void); extern int bar;
1180 int baz (void) { return foo () + bar; }
1188 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
1189 # silently. So, we can't rely on above "check_effective_target_fpic" as it
1190 # assumes compiler will give warning if -fpic not supported. Here we check
1191 # whether binutils supports those new -fpic relocation modifiers, and assume
1192 # -fpic is supported if there is binutils support. GCC configuration will
1193 # enable -fpic for AArch64 in this case.
1195 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1196 # memory model -fpic relocation types.
1198 proc check_effective_target_aarch64_small_fpic { } {
1199 if { [istarget aarch64*-*-*] } {
1200 return [check_no_compiler_messages aarch64_small_fpic object {
1201 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1208 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1209 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1210 # in binutils since 2015-03-04 as PR gas/17843.
1212 # This test directive make sure binutils support all features needed by TLS LE
1213 # under -mtls-size=32 on AArch64.
1215 proc check_effective_target_aarch64_tlsle32 { } {
1216 if { [istarget aarch64*-*-*] } {
1217 return [check_no_compiler_messages aarch64_tlsle32 object {
1218 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1225 # Return 1 if -shared is supported, as in no warnings or errors
1226 # emitted, 0 otherwise.
1228 proc check_effective_target_shared { } {
1229 # Note that M68K has a multilib that supports -fpic but not
1230 # -fPIC, so we need to check both. We test with a program that
1231 # requires GOT references.
1232 return [check_no_compiler_messages shared executable {
1233 extern int foo (void); extern int bar;
1234 int baz (void) { return foo () + bar; }
1238 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1240 proc check_effective_target_pie { } {
1241 if { [istarget *-*-darwin\[912\]*]
1242 || [istarget *-*-dragonfly*]
1243 || [istarget *-*-freebsd*]
1244 || [istarget *-*-linux*]
1245 || [istarget arm*-*-uclinuxfdpiceabi]
1246 || [istarget *-*-gnu*]
1247 || [istarget *-*-amdhsa]} {
1250 if { [istarget *-*-solaris2.1\[1-9\]*] } {
1251 # Full PIE support was added in Solaris 11.3, but gcc errors out
1252 # if missing, so check for that.
1253 return [check_no_compiler_messages pie executable {
1254 int main (void) { return 0; }
1260 # Return true if the target supports -mpaired-single (as used on MIPS).
1262 proc check_effective_target_mpaired_single { } {
1263 return [check_no_compiler_messages mpaired_single object {
1265 } "-mpaired-single"]
1268 # Return true if the target has access to FPU instructions.
1270 proc check_effective_target_hard_float { } {
1271 if { [istarget mips*-*-*] } {
1272 return [check_no_compiler_messages hard_float assembly {
1273 #if (defined __mips_soft_float || defined __mips16)
1274 #error __mips_soft_float || __mips16
1279 # This proc is actually checking the availabilty of FPU
1280 # support for doubles, so on the RX we must fail if the
1281 # 64-bit double multilib has been selected.
1282 if { [istarget rx-*-*] } {
1284 # return [check_no_compiler_messages hard_float assembly {
1285 #if defined __RX_64_BIT_DOUBLES__
1286 #error __RX_64_BIT_DOUBLES__
1291 # The generic test doesn't work for C-SKY because some cores have
1292 # hard float for single precision only.
1293 if { [istarget csky*-*-*] } {
1294 return [check_no_compiler_messages hard_float assembly {
1295 #if defined __csky_soft_float__
1296 #error __csky_soft_float__
1301 # The generic test equates hard_float with "no call for adding doubles".
1302 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1303 double a (double b, double c) { return b + c; }
1307 # Return true if the target is a 64-bit MIPS target.
1309 proc check_effective_target_mips64 { } {
1310 return [check_no_compiler_messages mips64 assembly {
1317 # Return true if the target is a MIPS target that does not produce
1320 proc check_effective_target_nomips16 { } {
1321 return [check_no_compiler_messages nomips16 object {
1325 /* A cheap way of testing for -mflip-mips16. */
1326 void foo (void) { asm ("addiu $20,$20,1"); }
1327 void bar (void) { asm ("addiu $20,$20,1"); }
1332 # Add the options needed for MIPS16 function attributes. At the moment,
1333 # we don't support MIPS16 PIC.
1335 proc add_options_for_mips16_attribute { flags } {
1336 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1339 # Return true if we can force a mode that allows MIPS16 code generation.
1340 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1343 proc check_effective_target_mips16_attribute { } {
1344 return [check_no_compiler_messages mips16_attribute assembly {
1348 #if defined __mips_hard_float \
1349 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1350 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1351 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1353 } [add_options_for_mips16_attribute ""]]
1356 # Return 1 if the target supports long double larger than double when
1357 # using the new ABI, 0 otherwise.
1359 proc check_effective_target_mips_newabi_large_long_double { } {
1360 return [check_no_compiler_messages mips_newabi_large_long_double object {
1361 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1365 # Return true if the target is a MIPS target that has access
1366 # to the LL and SC instructions.
1368 proc check_effective_target_mips_llsc { } {
1369 if { ![istarget mips*-*-*] } {
1372 # Assume that these instructions are always implemented for
1373 # non-elf* targets, via emulation if necessary.
1374 if { ![istarget *-*-elf*] } {
1377 # Otherwise assume LL/SC support for everything but MIPS I.
1378 return [check_no_compiler_messages mips_llsc assembly {
1385 # Return true if the target is a MIPS target that uses in-place relocations.
1387 proc check_effective_target_mips_rel { } {
1388 if { ![istarget mips*-*-*] } {
1391 return [check_no_compiler_messages mips_rel object {
1392 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1393 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1394 #error _ABIN32 && (_ABIN32 || _ABI64)
1399 # Return true if the target is a MIPS target that uses the EABI.
1401 proc check_effective_target_mips_eabi { } {
1402 if { ![istarget mips*-*-*] } {
1405 return [check_no_compiler_messages mips_eabi object {
1412 # Return 1 if the current multilib does not generate PIC by default.
1414 proc check_effective_target_nonpic { } {
1415 return [check_no_compiler_messages nonpic assembly {
1422 # Return 1 if the current multilib generates PIE by default.
1424 proc check_effective_target_pie_enabled { } {
1425 return [check_no_compiler_messages pie_enabled assembly {
1432 # Return 1 if the target generates -fstack-protector by default.
1434 proc check_effective_target_fstack_protector_enabled {} {
1435 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1436 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1437 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1443 # Return 1 if the target does not use a status wrapper.
1445 proc check_effective_target_unwrapped { } {
1446 if { [target_info needs_status_wrapper] != "" \
1447 && [target_info needs_status_wrapper] != "0" } {
1453 # Return true if iconv is supported on the target. In particular IBM1047.
1455 proc check_iconv_available { test_what } {
1458 # If the tool configuration file has not set libiconv, try "-liconv"
1459 if { ![info exists libiconv] } {
1460 set libiconv "-liconv"
1462 set test_what [lindex $test_what 1]
1463 return [check_runtime_nocache $test_what [subst {
1469 cd = iconv_open ("$test_what", "UTF-8");
1470 if (cd == (iconv_t) -1)
1477 # Return true if the atomic library is supported on the target.
1478 proc check_effective_target_libatomic_available { } {
1479 return [check_no_compiler_messages libatomic_available executable {
1480 int main (void) { return 0; }
1484 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1486 proc check_ascii_locale_available { } {
1490 # Return true if named sections are supported on this target.
1492 proc check_named_sections_available { } {
1493 return [check_no_compiler_messages named_sections assembly {
1494 int __attribute__ ((section("whatever"))) foo;
1498 # Return true if the "naked" function attribute is supported on this target.
1500 proc check_effective_target_naked_functions { } {
1501 return [check_no_compiler_messages naked_functions assembly {
1502 void f() __attribute__((naked));
1506 # Return 1 if the target supports Fortran real kinds larger than real(8),
1509 # When the target name changes, replace the cached result.
1511 proc check_effective_target_fortran_large_real { } {
1512 return [check_no_compiler_messages fortran_large_real executable {
1514 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1521 # Return 1 if the target supports Fortran real kind real(16),
1522 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1523 # this checks for Real(16) only; the other returned real(10) if
1524 # both real(10) and real(16) are available.
1526 # When the target name changes, replace the cached result.
1528 proc check_effective_target_fortran_real_16 { } {
1529 return [check_no_compiler_messages fortran_real_16 executable {
1537 # Return 1 if the target supports Fortran real kind 10,
1538 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1539 # this checks for real(10) only.
1541 # When the target name changes, replace the cached result.
1543 proc check_effective_target_fortran_real_10 { } {
1544 return [check_no_compiler_messages fortran_real_10 executable {
1552 # Return 1 if the target supports Fortran's IEEE modules,
1555 # When the target name changes, replace the cached result.
1557 proc check_effective_target_fortran_ieee { flags } {
1558 return [check_no_compiler_messages fortran_ieee executable {
1560 use, intrinsic :: ieee_features
1566 # Return 1 if the target supports SQRT for the largest floating-point
1567 # type. (Some targets lack the libm support for this FP type.)
1568 # On most targets, this check effectively checks either whether sqrtl is
1569 # available or on __float128 systems whether libquadmath is installed,
1570 # which provides sqrtq.
1572 # When the target name changes, replace the cached result.
1574 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1575 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1577 use iso_fortran_env, only: real_kinds
1578 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1579 real(kind=maxFP), volatile :: x
1587 # Return 1 if the target supports Fortran integer kinds larger than
1588 # integer(8), 0 otherwise.
1590 # When the target name changes, replace the cached result.
1592 proc check_effective_target_fortran_large_int { } {
1593 return [check_no_compiler_messages fortran_large_int executable {
1595 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1596 integer(kind=k) :: i
1601 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1603 # When the target name changes, replace the cached result.
1605 proc check_effective_target_fortran_integer_16 { } {
1606 return [check_no_compiler_messages fortran_integer_16 executable {
1613 # Return 1 if we can statically link libgfortran, 0 otherwise.
1615 # When the target name changes, replace the cached result.
1617 proc check_effective_target_static_libgfortran { } {
1618 return [check_no_compiler_messages static_libgfortran executable {
1625 # Return 1 if we can use the -rdynamic option, 0 otherwise.
1627 proc check_effective_target_rdynamic { } {
1628 return [check_no_compiler_messages rdynamic executable {
1629 int main() { return 0; }
1633 proc check_linker_plugin_available { } {
1634 return [check_no_compiler_messages_nocache linker_plugin executable {
1635 int main() { return 0; }
1636 } "-flto -fuse-linker-plugin"]
1639 # Return 1 if the target OS supports running SSE executables, 0
1640 # otherwise. Cache the result.
1642 proc check_sse_os_support_available { } {
1643 return [check_cached_effective_target sse_os_support_available {
1644 # If this is not the right target then we can skip the test.
1645 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1653 # Return 1 if the target OS supports running AVX executables, 0
1654 # otherwise. Cache the result.
1656 proc check_avx_os_support_available { } {
1657 return [check_cached_effective_target avx_os_support_available {
1658 # If this is not the right target then we can skip the test.
1659 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1662 # Check that OS has AVX and SSE saving enabled.
1663 check_runtime_nocache avx_os_support_available {
1666 unsigned int eax, edx;
1668 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1669 return (eax & 0x06) != 0x06;
1676 # Return 1 if the target OS supports running AVX executables, 0
1677 # otherwise. Cache the result.
1679 proc check_avx512_os_support_available { } {
1680 return [check_cached_effective_target avx512_os_support_available {
1681 # If this is not the right target then we can skip the test.
1682 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1685 # Check that OS has AVX512, AVX and SSE saving enabled.
1686 check_runtime_nocache avx512_os_support_available {
1689 unsigned int eax, edx;
1691 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1692 return (eax & 0xe6) != 0xe6;
1699 # Return 1 if the target supports executing SSE instructions, 0
1700 # otherwise. Cache the result.
1702 proc check_sse_hw_available { } {
1703 return [check_cached_effective_target sse_hw_available {
1704 # If this is not the right target then we can skip the test.
1705 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1708 check_runtime_nocache sse_hw_available {
1712 unsigned int eax, ebx, ecx, edx;
1713 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1716 return !(edx & bit_SSE);
1723 # Return 1 if the target supports executing SSE2 instructions, 0
1724 # otherwise. Cache the result.
1726 proc check_sse2_hw_available { } {
1727 return [check_cached_effective_target sse2_hw_available {
1728 # If this is not the right target then we can skip the test.
1729 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1732 check_runtime_nocache sse2_hw_available {
1736 unsigned int eax, ebx, ecx, edx;
1737 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1740 return !(edx & bit_SSE2);
1747 # Return 1 if the target supports executing SSE4 instructions, 0
1748 # otherwise. Cache the result.
1750 proc check_sse4_hw_available { } {
1751 return [check_cached_effective_target sse4_hw_available {
1752 # If this is not the right target then we can skip the test.
1753 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1756 check_runtime_nocache sse4_hw_available {
1760 unsigned int eax, ebx, ecx, edx;
1761 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1764 return !(ecx & bit_SSE4_2);
1771 # Return 1 if the target supports executing AVX instructions, 0
1772 # otherwise. Cache the result.
1774 proc check_avx_hw_available { } {
1775 return [check_cached_effective_target avx_hw_available {
1776 # If this is not the right target then we can skip the test.
1777 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1780 check_runtime_nocache avx_hw_available {
1784 unsigned int eax, ebx, ecx, edx;
1785 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1788 return ((ecx & (bit_AVX | bit_OSXSAVE))
1789 != (bit_AVX | bit_OSXSAVE));
1796 # Return 1 if the target supports executing AVX2 instructions, 0
1797 # otherwise. Cache the result.
1799 proc check_avx2_hw_available { } {
1800 return [check_cached_effective_target avx2_hw_available {
1801 # If this is not the right target then we can skip the test.
1802 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1805 check_runtime_nocache avx2_hw_available {
1810 unsigned int eax, ebx, ecx, edx;
1812 if (__get_cpuid_max (0, NULL) < 7)
1815 __cpuid (1, eax, ebx, ecx, edx);
1817 if (!(ecx & bit_OSXSAVE))
1820 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1822 return !(ebx & bit_AVX2);
1829 # Return 1 if the target supports executing AVX512 foundation instructions, 0
1830 # otherwise. Cache the result.
1832 proc check_avx512f_hw_available { } {
1833 return [check_cached_effective_target avx512f_hw_available {
1834 # If this is not the right target then we can skip the test.
1835 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1838 check_runtime_nocache avx512f_hw_available {
1843 unsigned int eax, ebx, ecx, edx;
1845 if (__get_cpuid_max (0, NULL) < 7)
1848 __cpuid (1, eax, ebx, ecx, edx);
1850 if (!(ecx & bit_OSXSAVE))
1853 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1855 return !(ebx & bit_AVX512F);
1862 # Return 1 if the target supports running SSE executables, 0 otherwise.
1864 proc check_effective_target_sse_runtime { } {
1865 if { [check_effective_target_sse]
1866 && [check_sse_hw_available]
1867 && [check_sse_os_support_available] } {
1873 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1875 proc check_effective_target_sse2_runtime { } {
1876 if { [check_effective_target_sse2]
1877 && [check_sse2_hw_available]
1878 && [check_sse_os_support_available] } {
1884 # Return 1 if the target supports running SSE4 executables, 0 otherwise.
1886 proc check_effective_target_sse4_runtime { } {
1887 if { [check_effective_target_sse4]
1888 && [check_sse4_hw_available]
1889 && [check_sse_os_support_available] } {
1895 # Return 1 if the target supports running AVX executables, 0 otherwise.
1897 proc check_effective_target_avx_runtime { } {
1898 if { [check_effective_target_avx]
1899 && [check_avx_hw_available]
1900 && [check_avx_os_support_available] } {
1906 # Return 1 if the target supports running AVX2 executables, 0 otherwise.
1908 proc check_effective_target_avx2_runtime { } {
1909 if { [check_effective_target_avx2]
1910 && [check_avx2_hw_available]
1911 && [check_avx_os_support_available] } {
1917 # Return 1 if the target supports running AVX512f executables, 0 otherwise.
1919 proc check_effective_target_avx512f_runtime { } {
1920 if { [check_effective_target_avx512f]
1921 && [check_avx512f_hw_available]
1922 && [check_avx512_os_support_available] } {
1928 # Return 1 if bmi2 instructions can be compiled.
1929 proc check_effective_target_bmi2 { } {
1930 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1933 return [check_no_compiler_messages bmi2 object {
1935 _bzhi_u32 (unsigned int __X, unsigned int __Y)
1937 return __builtin_ia32_bzhi_si (__X, __Y);
1942 # Return 1 if the target supports executing MIPS Paired-Single instructions,
1943 # 0 otherwise. Cache the result.
1945 proc check_mpaired_single_hw_available { } {
1946 return [check_cached_effective_target mpaired_single_hw_available {
1947 # If this is not the right target then we can skip the test.
1948 if { !([istarget mips*-*-*]) } {
1951 check_runtime_nocache mpaired_single_hw_available {
1954 asm volatile ("pll.ps $f2,$f4,$f6");
1962 # Return 1 if the target supports executing Loongson vector instructions,
1963 # 0 otherwise. Cache the result.
1965 proc check_mips_loongson_mmi_hw_available { } {
1966 return [check_cached_effective_target mips_loongson_mmi_hw_available {
1967 # If this is not the right target then we can skip the test.
1968 if { !([istarget mips*-*-*]) } {
1971 check_runtime_nocache mips_loongson_mmi_hw_available {
1972 #include <loongson-mmiintrin.h>
1975 asm volatile ("paddw $f2,$f4,$f6");
1983 # Return 1 if the target supports executing MIPS MSA instructions, 0
1984 # otherwise. Cache the result.
1986 proc check_mips_msa_hw_available { } {
1987 return [check_cached_effective_target mips_msa_hw_available {
1988 # If this is not the right target then we can skip the test.
1989 if { !([istarget mips*-*-*]) } {
1992 check_runtime_nocache mips_msa_hw_available {
1993 #if !defined(__mips_msa)
1994 #error "MSA NOT AVAIL"
1996 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
1997 #error "MSA NOT AVAIL FOR ISA REV < 2"
1999 #if !defined(__mips_hard_float)
2000 #error "MSA HARD_FLOAT REQUIRED"
2002 #if __mips_fpr != 64
2003 #error "MSA 64-bit FPR REQUIRED"
2009 v8i16 v = __builtin_msa_ldi_h (0);
2019 # Return 1 if the target supports running MIPS Paired-Single
2020 # executables, 0 otherwise.
2022 proc check_effective_target_mpaired_single_runtime { } {
2023 if { [check_effective_target_mpaired_single]
2024 && [check_mpaired_single_hw_available] } {
2030 # Return 1 if the target supports running Loongson executables, 0 otherwise.
2032 proc check_effective_target_mips_loongson_mmi_runtime { } {
2033 if { [check_effective_target_mips_loongson_mmi]
2034 && [check_mips_loongson_mmi_hw_available] } {
2040 # Return 1 if the target supports running MIPS MSA executables, 0 otherwise.
2042 proc check_effective_target_mips_msa_runtime { } {
2043 if { [check_effective_target_mips_msa]
2044 && [check_mips_msa_hw_available] } {
2050 # Return 1 if we are compiling for 64-bit PowerPC but we do not use direct
2051 # move instructions for moves from GPR to FPR.
2053 proc check_effective_target_powerpc64_no_dm { } {
2054 # The "mulld" checks if we are generating PowerPC64 code. The "lfd"
2055 # checks if we do not use direct moves, but use the old-fashioned
2056 # slower move-via-the-stack.
2057 return [check_no_messages_and_pattern powerpc64_no_dm \
2058 {\mmulld\M.*\mlfd} assembly {
2059 double f(long long x) { return x*x; }
2063 # Return 1 if the target supports the __builtin_cpu_supports built-in,
2064 # including having a new enough library to support the test. Cache the result.
2065 # Require at least a power7 to run on.
2067 proc check_ppc_cpu_supports_hw_available { } {
2068 return [check_cached_effective_target ppc_cpu_supports_hw_available {
2069 # Some simulators are known to not support VSX/power8 instructions.
2070 # For now, disable on Darwin
2071 if { [istarget powerpc-*-eabi]
2072 || [istarget powerpc*-*-eabispe]
2073 || [istarget *-*-darwin*]} {
2077 check_runtime_nocache ppc_cpu_supports_hw_available {
2081 asm volatile ("xxlor vs0,vs0,vs0");
2083 asm volatile ("xxlor 0,0,0");
2085 if (!__builtin_cpu_supports ("vsx"))
2094 # Return 1 if the target supports executing 750CL paired-single instructions, 0
2095 # otherwise. Cache the result.
2097 proc check_750cl_hw_available { } {
2098 return [check_cached_effective_target 750cl_hw_available {
2099 # If this is not the right target then we can skip the test.
2100 if { ![istarget powerpc-*paired*] } {
2103 check_runtime_nocache 750cl_hw_available {
2107 asm volatile ("ps_mul v0,v0,v0");
2109 asm volatile ("ps_mul 0,0,0");
2118 # Return 1 if the target supports executing power8 vector instructions, 0
2119 # otherwise. Cache the result.
2121 proc check_p8vector_hw_available { } {
2122 return [check_cached_effective_target p8vector_hw_available {
2123 # Some simulators are known to not support VSX/power8 instructions.
2124 # For now, disable on Darwin
2125 if { [istarget powerpc-*-eabi]
2126 || [istarget powerpc*-*-eabispe]
2127 || [istarget *-*-darwin*]} {
2130 set options "-mpower8-vector"
2131 check_runtime_nocache p8vector_hw_available {
2135 asm volatile ("xxlorc vs0,vs0,vs0");
2137 asm volatile ("xxlorc 0,0,0");
2146 # Return 1 if the target supports executing power9 vector instructions, 0
2147 # otherwise. Cache the result.
2149 proc check_p9vector_hw_available { } {
2150 return [check_cached_effective_target p9vector_hw_available {
2151 # Some simulators are known to not support VSX/power8/power9
2152 # instructions. For now, disable on Darwin.
2153 if { [istarget powerpc-*-eabi]
2154 || [istarget powerpc*-*-eabispe]
2155 || [istarget *-*-darwin*]} {
2158 set options "-mpower9-vector"
2159 check_runtime_nocache p9vector_hw_available {
2163 vector double v = (vector double) { 0.0, 0.0 };
2164 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
2172 # Return 1 if the PowerPC target generates PC-relative instructions
2173 # automatically for targets that support PC-relative instructions.
2174 proc check_effective_target_powerpc_pcrel { } {
2175 return [check_no_messages_and_pattern powerpc_pcrel \
2176 {\mpla\M} assembly {
2177 static unsigned short s;
2178 unsigned short *p_foo (void) { return &s; }
2179 } {-O2 -mcpu=power10}]
2182 # Return 1 if the PowerPC target generates prefixed instructions automatically
2183 # for targets that support prefixed instructions.
2184 proc check_effective_target_powerpc_prefixed_addr { } {
2185 return [check_no_messages_and_pattern powerpc_prefixed_addr \
2186 {\mplwz\M} assembly {
2187 unsigned int foo (unsigned int *p) { return p[0x12345]; }
2188 } {-O2 -mcpu=power10}]
2191 # Return 1 if the target supports executing power9 modulo instructions, 0
2192 # otherwise. Cache the result.
2194 proc check_p9modulo_hw_available { } {
2195 return [check_cached_effective_target p9modulo_hw_available {
2196 # Some simulators are known to not support VSX/power8/power9
2197 # instructions. For now, disable on Darwin.
2198 if { [istarget powerpc-*-eabi]
2199 || [istarget powerpc*-*-eabispe]
2200 || [istarget *-*-darwin*]} {
2203 set options "-mmodulo"
2204 check_runtime_nocache p9modulo_hw_available {
2207 int i = 5, j = 3, r = -1;
2208 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
2217 # Return 1 if the target supports executing power10 instructions, 0 otherwise.
2218 # Cache the result. It is assumed that if a simulator does not support the
2219 # power10 instructions, that it will generate an error and this test will fail.
2221 proc check_power10_hw_available { } {
2222 return [check_cached_effective_target power10_hw_available {
2223 check_runtime_nocache power10_hw_available {
2226 /* Set e first and use +r to check if pli actually works. */
2228 asm ("pli %0,%1" : "+r" (e) : "n" (0x12345));
2237 # Return 1 if the target supports executing MMA instructions, 0 otherwise.
2238 # Cache the result. It is assumed that if a simulator does not support the
2239 # MMA instructions, that it will generate an error and this test will fail.
2241 proc check_ppc_mma_hw_available { } {
2242 return [check_cached_effective_target ppc_mma_hw_available {
2243 check_runtime_nocache ppc_mma_hw_available {
2244 #include <altivec.h>
2245 typedef double v4sf_t __attribute__ ((vector_size (16)));
2252 __builtin_mma_xxsetaccz (&acc0);
2253 __builtin_mma_disassemble_acc (result, &acc0);
2254 if (result[0][0] != 0.0)
2262 # Return 1 if the target supports executing __float128 on PowerPC via software
2263 # emulation, 0 otherwise. Cache the result.
2265 proc check_ppc_float128_sw_available { } {
2266 return [check_cached_effective_target ppc_float128_sw_available {
2267 # Some simulators are known to not support VSX/power8/power9
2268 # instructions. For now, disable on Darwin.
2269 if { [istarget powerpc-*-eabi]
2270 || [istarget powerpc*-*-eabispe]
2271 || [istarget *-*-darwin*]} {
2274 set options "-mfloat128 -mvsx"
2275 check_runtime_nocache ppc_float128_sw_available {
2276 volatile __float128 x = 1.0q;
2277 volatile __float128 y = 2.0q;
2280 __float128 z = x + y;
2288 # Return 1 if the target supports executing __float128 on PowerPC via power9
2289 # hardware instructions, 0 otherwise. Cache the result.
2291 proc check_ppc_float128_hw_available { } {
2292 return [check_cached_effective_target ppc_float128_hw_available {
2293 # Some simulators are known to not support VSX/power8/power9
2294 # instructions. For now, disable on Darwin.
2295 if { [istarget powerpc-*-eabi]
2296 || [istarget powerpc*-*-eabispe]
2297 || [istarget *-*-darwin*]} {
2300 set options "-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
2301 check_runtime_nocache ppc_float128_hw_available {
2302 volatile __float128 x = 1.0q;
2303 volatile __float128 y = 2.0q;
2306 __float128 z = x + y;
2307 __float128 w = -1.0q;
2309 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
2310 return ((z != 3.0q) || (z != w));
2317 # See if the __ieee128 keyword is understood.
2318 proc check_effective_target_ppc_ieee128_ok { } {
2319 return [check_cached_effective_target ppc_ieee128_ok {
2321 if { [istarget *-*-aix*] } {
2324 set options "-mfloat128"
2325 check_runtime_nocache ppc_ieee128_ok {
2336 # Return 1 if the target supports executing VSX instructions, 0
2337 # otherwise. Cache the result.
2339 proc check_vsx_hw_available { } {
2340 return [check_cached_effective_target vsx_hw_available {
2341 # Some simulators are known to not support VSX instructions.
2342 # For now, disable on Darwin
2343 if { [istarget powerpc-*-eabi]
2344 || [istarget powerpc*-*-eabispe]
2345 || [istarget *-*-darwin*]} {
2349 check_runtime_nocache vsx_hw_available {
2353 asm volatile ("xxlor vs0,vs0,vs0");
2355 asm volatile ("xxlor 0,0,0");
2364 # Return 1 if the target supports executing AltiVec instructions, 0
2365 # otherwise. Cache the result.
2367 proc check_vmx_hw_available { } {
2368 return [check_cached_effective_target vmx_hw_available {
2369 # Some simulators are known to not support VMX instructions.
2370 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
2373 # Most targets don't require special flags for this test case, but
2374 # Darwin does. Just to be sure, make sure VSX is not enabled for
2375 # the altivec tests.
2376 if { [istarget *-*-darwin*]
2377 || [istarget *-*-aix*] } {
2378 set options "-maltivec -mno-vsx"
2380 set options "-mno-vsx"
2382 check_runtime_nocache vmx_hw_available {
2386 asm volatile ("vor v0,v0,v0");
2388 asm volatile ("vor 0,0,0");
2397 proc check_ppc_recip_hw_available { } {
2398 return [check_cached_effective_target ppc_recip_hw_available {
2399 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
2400 # For now, disable on Darwin
2401 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2404 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2405 check_runtime_nocache ppc_recip_hw_available {
2406 volatile double d_recip, d_rsqrt, d_four = 4.0;
2407 volatile float f_recip, f_rsqrt, f_four = 4.0f;
2410 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2411 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2412 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2413 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2421 # Return 1 if the target supports executing AltiVec and Cell PPU
2422 # instructions, 0 otherwise. Cache the result.
2424 proc check_effective_target_cell_hw { } {
2425 return [check_cached_effective_target cell_hw_available {
2426 # Some simulators are known to not support VMX and PPU instructions.
2427 if { [istarget powerpc-*-eabi*] } {
2430 # Most targets don't require special flags for this test
2431 # case, but Darwin and AIX do.
2432 if { [istarget *-*-darwin*]
2433 || [istarget *-*-aix*] } {
2434 set options "-maltivec -mcpu=cell"
2436 set options "-mcpu=cell"
2438 check_runtime_nocache cell_hw_available {
2442 asm volatile ("vor v0,v0,v0");
2443 asm volatile ("lvlx v0,r0,r0");
2445 asm volatile ("vor 0,0,0");
2446 asm volatile ("lvlx 0,0,0");
2455 # Return 1 if the target supports executing 64-bit instructions, 0
2456 # otherwise. Cache the result.
2458 proc check_effective_target_powerpc64 { } {
2459 global powerpc64_available_saved
2462 if [info exists powerpc64_available_saved] {
2463 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2465 set powerpc64_available_saved 0
2467 # Some simulators are known to not support powerpc64 instructions.
2468 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
2469 verbose "check_effective_target_powerpc64 returning 0" 2
2470 return $powerpc64_available_saved
2473 # Set up, compile, and execute a test program containing a 64-bit
2474 # instruction. Include the current process ID in the file
2475 # names to prevent conflicts with invocations for multiple
2480 set f [open $src "w"]
2481 puts $f "int main() {"
2482 puts $f "#ifdef __MACH__"
2483 puts $f " asm volatile (\"extsw r0,r0\");"
2485 puts $f " asm volatile (\"extsw 0,0\");"
2487 puts $f " return 0; }"
2490 set opts "additional_flags=-mcpu=G5"
2492 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
2493 set lines [${tool}_target_compile $src $exe executable "$opts"]
2496 if [string match "" $lines] then {
2497 # No error message, compilation succeeded.
2498 set result [${tool}_load "./$exe" "" ""]
2499 set status [lindex $result 0]
2500 remote_file build delete $exe
2501 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
2503 if { $status == "pass" } then {
2504 set powerpc64_available_saved 1
2507 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
2511 return $powerpc64_available_saved
2514 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
2515 # complex float arguments. This affects gfortran tests that call cabsf
2516 # in libm built by an earlier compiler. Return 0 if libm uses the same
2517 # argument passing as the compiler under test, 1 otherwise.
2519 proc check_effective_target_broken_cplxf_arg { } {
2520 # Skip the work for targets known not to be affected.
2521 if { ![istarget powerpc*-*-linux*] || ![is-effective-target lp64] } {
2525 return [check_cached_effective_target broken_cplxf_arg {
2526 check_runtime_nocache broken_cplxf_arg {
2527 #include <complex.h>
2528 extern void abort (void);
2529 float fabsf (float);
2530 float cabsf (_Complex float);
2537 if (fabsf (f - 5.0) > 0.0001)
2538 /* Yes, it's broken. */
2540 /* All fine, not broken. */
2547 # Return 1 is this is a TI C6X target supporting C67X instructions
2548 proc check_effective_target_ti_c67x { } {
2549 return [check_no_compiler_messages ti_c67x assembly {
2550 #if !defined(_TMS320C6700)
2551 #error !_TMS320C6700
2556 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2557 proc check_effective_target_ti_c64xp { } {
2558 return [check_no_compiler_messages ti_c64xp assembly {
2559 #if !defined(_TMS320C6400_PLUS)
2560 #error !_TMS320C6400_PLUS
2565 # Check if a -march=... option is given, as part of (earlier) options.
2566 proc check_effective_target_march_option { } {
2567 return [check-flags [list "" { *-*-* } { "-march=*" } { "" } ]]
2570 proc check_alpha_max_hw_available { } {
2571 return [check_runtime alpha_max_hw_available {
2572 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2576 # Returns true iff the FUNCTION is available on the target system.
2577 # (This is essentially a Tcl implementation of Autoconf's
2580 proc check_function_available { function } {
2581 return [check_no_compiler_messages ${function}_available \
2587 int main () { $function (); }
2591 # Returns true iff "fork" is available on the target system.
2593 proc check_fork_available {} {
2594 return [check_function_available "fork"]
2597 # Returns true iff "mkfifo" is available on the target system.
2599 proc check_mkfifo_available {} {
2600 if { [istarget *-*-cygwin*] } {
2601 # Cygwin has mkfifo, but support is incomplete.
2605 return [check_function_available "mkfifo"]
2608 # Returns true iff "__cxa_atexit" is used on the target system.
2610 proc check_cxa_atexit_available { } {
2611 return [check_cached_effective_target cxa_atexit_available {
2612 if { [istarget hppa*-*-hpux10*] } {
2613 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
2615 } elseif { [istarget *-*-vxworks] } {
2616 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2619 check_runtime_nocache cxa_atexit_available {
2622 static unsigned int count;
2639 Y() { f(); count = 2; }
2648 int main() { return 0; }
2654 proc check_effective_target_objc2 { } {
2655 return [check_no_compiler_messages objc2 object {
2664 proc check_effective_target_next_runtime { } {
2665 return [check_no_compiler_messages objc2 object {
2666 #ifdef __NEXT_RUNTIME__
2669 #error !__NEXT_RUNTIME__
2674 # Return 1 if we're generating code for big-endian memory order.
2676 proc check_effective_target_be { } {
2677 return [check_no_compiler_messages be object {
2678 int dummy[__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ ? 1 : -1];
2682 # Return 1 if we're generating code for little-endian memory order.
2684 proc check_effective_target_le { } {
2685 return [check_no_compiler_messages le object {
2686 int dummy[__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ ? 1 : -1];
2690 # Return 1 if we're generating code for only power8 platforms.
2692 proc check_effective_target_p8 { } {
2693 return [check_no_compiler_messages_nocache p8 assembly {
2694 #if !(!defined(_ARCH_PWR9) && defined(_ARCH_PWR8))
2700 # Return 1 if we're generating code for power9 or later platforms.
2702 proc check_effective_target_p9+ { } {
2703 return [check_no_compiler_messages_nocache p9+ assembly {
2704 #if !(defined(_ARCH_PWR9))
2710 # Return 1 if we're generating 32-bit code using default options, 0
2713 proc check_effective_target_ilp32 { } {
2714 return [check_no_compiler_messages ilp32 object {
2715 int dummy[sizeof (int) == 4
2716 && sizeof (void *) == 4
2717 && sizeof (long) == 4 ? 1 : -1];
2721 # Return 1 if we're generating ia32 code using default options, 0
2724 proc check_effective_target_ia32 { } {
2725 return [check_no_compiler_messages ia32 object {
2726 int dummy[sizeof (int) == 4
2727 && sizeof (void *) == 4
2728 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2732 # Return 1 if we're generating x32 code using default options, 0
2735 proc check_effective_target_x32 { } {
2736 return [check_no_compiler_messages x32 object {
2737 int dummy[sizeof (int) == 4
2738 && sizeof (void *) == 4
2739 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2743 # Return 1 if we're generating 32-bit integers using default
2744 # options, 0 otherwise.
2746 proc check_effective_target_int32 { } {
2747 return [check_no_compiler_messages int32 object {
2748 int dummy[sizeof (int) == 4 ? 1 : -1];
2752 # Return 1 if we're generating 32-bit or larger integers using default
2753 # options, 0 otherwise.
2755 proc check_effective_target_int32plus { } {
2756 return [check_no_compiler_messages int32plus object {
2757 int dummy[sizeof (int) >= 4 ? 1 : -1];
2761 # Return 1 if we're generating 64-bit long long using default options,
2764 proc check_effective_target_longlong64 { } {
2765 return [check_no_compiler_messages longlong64 object {
2766 int dummy[sizeof (long long) == 8 ? 1 : -1];
2770 # Return 1 if we're generating 32-bit or larger pointers using default
2771 # options, 0 otherwise.
2773 proc check_effective_target_ptr32plus { } {
2774 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2775 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2776 # cannot really hold a 32-bit address, so we always return false here.
2777 if { [istarget msp430-*-*] } {
2781 return [check_no_compiler_messages ptr32plus object {
2782 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2786 # Return 1 if we support 16-bit or larger array and structure sizes
2787 # using default options, 0 otherwise.
2788 # This implies at least a 20-bit address space, as no targets have an address
2789 # space between 16 and 20 bits.
2791 proc check_effective_target_size20plus { } {
2792 return [check_no_compiler_messages size20plus object {
2797 # Return 1 if target supports function pointers, 0 otherwise.
2799 proc check_effective_target_function_pointers { } {
2800 if { [istarget pru-*-*] } {
2801 return [check_no_compiler_messages func_ptr_avail assembly {
2802 #ifdef __PRU_EABI_GNU__
2810 # Return 1 if target supports arbitrarily large return values, 0 otherwise.
2812 proc check_effective_target_large_return_values { } {
2813 if { [istarget pru-*-*] } {
2814 return [check_no_compiler_messages large_return_values assembly {
2815 #ifdef __PRU_EABI_GNU__
2822 # Return 1 if we support 20-bit or larger array and structure sizes
2823 # using default options, 0 otherwise.
2824 # This implies at least a 24-bit address space, as no targets have an address
2825 # space between 20 and 24 bits.
2827 proc check_effective_target_size24plus { } {
2828 return [check_no_compiler_messages size24plus object {
2829 char dummy[524289L];
2833 # Return 1 if we support 24-bit or larger array and structure sizes
2834 # using default options, 0 otherwise.
2835 # This implies at least a 32-bit address space, as no targets have an address
2836 # space between 24 and 32 bits.
2838 proc check_effective_target_size32plus { } {
2839 return [check_no_compiler_messages size32plus object {
2840 char dummy[16777217L];
2844 # Returns 1 if we're generating 16-bit or smaller integers with the
2845 # default options, 0 otherwise.
2847 proc check_effective_target_int16 { } {
2848 return [check_no_compiler_messages int16 object {
2849 int dummy[sizeof (int) < 4 ? 1 : -1];
2853 # Return 1 if we're generating 64-bit code using default options, 0
2856 proc check_effective_target_lp64 { } {
2857 return [check_no_compiler_messages lp64 object {
2858 int dummy[sizeof (int) == 4
2859 && sizeof (void *) == 8
2860 && sizeof (long) == 8 ? 1 : -1];
2864 # Return 1 if we're generating 64-bit code using default llp64 options,
2867 proc check_effective_target_llp64 { } {
2868 return [check_no_compiler_messages llp64 object {
2869 int dummy[sizeof (int) == 4
2870 && sizeof (void *) == 8
2871 && sizeof (long long) == 8
2872 && sizeof (long) == 4 ? 1 : -1];
2876 # Return 1 if long and int have different sizes,
2879 proc check_effective_target_long_neq_int { } {
2880 return [check_no_compiler_messages long_ne_int object {
2881 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2885 # Return 1 if int size is equal to float size,
2888 proc check_effective_target_int_eq_float { } {
2889 return [check_no_compiler_messages int_eq_float object {
2890 int dummy[sizeof (int) >= sizeof (float) ? 1 : -1];
2894 # Return 1 if short size is equal to int size,
2897 proc check_effective_target_short_eq_int { } {
2898 return [check_no_compiler_messages short_eq_int object {
2899 int dummy[sizeof (short) == sizeof (int) ? 1 : -1];
2903 # Return 1 if pointer size is equal to short size,
2906 proc check_effective_target_ptr_eq_short { } {
2907 return [check_no_compiler_messages ptr_eq_short object {
2908 int dummy[sizeof (void *) == sizeof (short) ? 1 : -1];
2912 # Return 1 if pointer size is equal to long size,
2915 proc check_effective_target_ptr_eq_long { } {
2916 # sizeof (void *) == 4 for msp430-elf -mlarge which is equal to
2917 # sizeof (long). Avoid false positive.
2918 if { [istarget msp430-*-*] } {
2921 return [check_no_compiler_messages ptr_eq_long object {
2922 int dummy[sizeof (void *) == sizeof (long) ? 1 : -1];
2926 # Return 1 if the target supports long double larger than double,
2929 proc check_effective_target_large_long_double { } {
2930 return [check_no_compiler_messages large_long_double object {
2931 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2935 # Return 1 if the target supports double larger than float,
2938 proc check_effective_target_large_double { } {
2939 return [check_no_compiler_messages large_double object {
2940 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2944 # Return 1 if the target supports long double of 128 bits,
2947 proc check_effective_target_longdouble128 { } {
2948 return [check_no_compiler_messages longdouble128 object {
2949 int dummy[sizeof(long double) == 16 ? 1 : -1];
2953 # Return 1 if the target supports long double of 64 bits,
2956 proc check_effective_target_longdouble64 { } {
2957 return [check_no_compiler_messages longdouble64 object {
2958 int dummy[sizeof(long double) == 8 ? 1 : -1];
2962 # Return 1 if the target supports double of 64 bits,
2965 proc check_effective_target_double64 { } {
2966 return [check_no_compiler_messages double64 object {
2967 int dummy[sizeof(double) == 8 ? 1 : -1];
2971 # Return 1 if the target supports double of at least 64 bits,
2974 proc check_effective_target_double64plus { } {
2975 return [check_no_compiler_messages double64plus object {
2976 int dummy[sizeof(double) >= 8 ? 1 : -1];
2980 # Return 1 if the target supports 'w' suffix on floating constant
2983 proc check_effective_target_has_w_floating_suffix { } {
2985 if [check_effective_target_c++] {
2986 append opts "-std=gnu++03"
2988 return [check_no_compiler_messages w_fp_suffix object {
2993 # Return 1 if the target supports 'q' suffix on floating constant
2996 proc check_effective_target_has_q_floating_suffix { } {
2998 if [check_effective_target_c++] {
2999 append opts "-std=gnu++03"
3001 return [check_no_compiler_messages q_fp_suffix object {
3006 # Return 1 if the target supports the _FloatN / _FloatNx type
3007 # indicated in the function name, 0 otherwise.
3009 proc check_effective_target_float16 {} {
3010 return [check_no_compiler_messages_nocache float16 object {
3012 } [add_options_for_float16 ""]]
3015 proc check_effective_target_float32 {} {
3016 return [check_no_compiler_messages_nocache float32 object {
3018 } [add_options_for_float32 ""]]
3021 proc check_effective_target_float64 {} {
3022 return [check_no_compiler_messages_nocache float64 object {
3024 } [add_options_for_float64 ""]]
3027 proc check_effective_target_float128 {} {
3028 return [check_no_compiler_messages_nocache float128 object {
3030 } [add_options_for_float128 ""]]
3033 proc check_effective_target_float32x {} {
3034 return [check_no_compiler_messages_nocache float32x object {
3036 } [add_options_for_float32x ""]]
3039 proc check_effective_target_float64x {} {
3040 return [check_no_compiler_messages_nocache float64x object {
3042 } [add_options_for_float64x ""]]
3045 proc check_effective_target_float128x {} {
3046 return [check_no_compiler_messages_nocache float128x object {
3048 } [add_options_for_float128x ""]]
3051 # Likewise, but runtime support for any special options used as well
3052 # as compile-time support is required.
3054 proc check_effective_target_float16_runtime {} {
3055 return [check_effective_target_float16]
3058 proc check_effective_target_float32_runtime {} {
3059 return [check_effective_target_float32]
3062 proc check_effective_target_float64_runtime {} {
3063 return [check_effective_target_float64]
3066 proc check_effective_target_float128_runtime {} {
3067 if { ![check_effective_target_float128] } {
3070 if { [istarget powerpc*-*-*] } {
3071 return [check_effective_target_base_quadfloat_support]
3076 proc check_effective_target_float32x_runtime {} {
3077 return [check_effective_target_float32x]
3080 proc check_effective_target_float64x_runtime {} {
3081 if { ![check_effective_target_float64x] } {
3084 if { [istarget powerpc*-*-*] } {
3085 return [check_effective_target_base_quadfloat_support]
3090 proc check_effective_target_float128x_runtime {} {
3091 return [check_effective_target_float128x]
3094 # Return 1 if the target hardware supports any options added for
3095 # _FloatN and _FloatNx types, 0 otherwise.
3097 proc check_effective_target_floatn_nx_runtime {} {
3098 if { [istarget powerpc*-*-aix*] } {
3101 if { [istarget powerpc*-*-*] } {
3102 return [check_effective_target_base_quadfloat_support]
3107 # Add options needed to use the _FloatN / _FloatNx type indicated in
3108 # the function name.
3110 proc add_options_for_float16 { flags } {
3111 if { [istarget arm*-*-*] } {
3112 return "$flags -mfp16-format=ieee"
3117 proc add_options_for_float32 { flags } {
3121 proc add_options_for_float64 { flags } {
3125 proc add_options_for_float128 { flags } {
3126 return [add_options_for___float128 "$flags"]
3129 proc add_options_for_float32x { flags } {
3133 proc add_options_for_float64x { flags } {
3134 return [add_options_for___float128 "$flags"]
3137 proc add_options_for_float128x { flags } {
3141 # Return 1 if the target supports __float128,
3144 proc check_effective_target___float128 { } {
3145 if { [istarget powerpc*-*-*] } {
3146 return [check_ppc_float128_sw_available]
3148 if { [istarget ia64-*-*]
3149 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
3155 proc add_options_for___float128 { flags } {
3156 if { [istarget powerpc*-*-*] } {
3157 return "$flags -mfloat128 -mvsx"
3162 # Return 1 if the target supports any special run-time requirements
3163 # for __float128 or _Float128,
3166 proc check_effective_target_base_quadfloat_support { } {
3167 if { [istarget powerpc*-*-*] } {
3168 return [check_vsx_hw_available]
3173 # Return 1 if the target supports all four forms of fused multiply-add
3174 # (fma, fms, fnma, and fnms) for both float and double.
3176 proc check_effective_target_scalar_all_fma { } {
3177 return [istarget aarch64*-*-*]
3180 # Return 1 if the target supports compiling fixed-point,
3183 proc check_effective_target_fixed_point { } {
3184 return [check_no_compiler_messages fixed_point object {
3185 _Sat _Fract x; _Sat _Accum y;
3189 # Return 1 if the target supports compiling decimal floating point,
3192 proc check_effective_target_dfp_nocache { } {
3193 verbose "check_effective_target_dfp_nocache: compiling source" 2
3194 set ret [check_no_compiler_messages_nocache dfp object {
3195 float x __attribute__((mode(DD)));
3197 verbose "check_effective_target_dfp_nocache: returning $ret" 2
3201 proc check_effective_target_dfprt_nocache { } {
3202 return [check_runtime_nocache dfprt {
3203 typedef float d64 __attribute__((mode(DD)));
3204 d64 x = 1.2df, y = 2.3dd, z;
3205 int main () { z = x + y; return 0; }
3209 # Return 1 if the target supports compiling Decimal Floating Point,
3212 # This won't change for different subtargets so cache the result.
3214 proc check_effective_target_dfp { } {
3215 return [check_cached_effective_target dfp {
3216 check_effective_target_dfp_nocache
3220 # Return 1 if the target supports linking and executing Decimal Floating
3221 # Point, 0 otherwise.
3223 # This won't change for different subtargets so cache the result.
3225 proc check_effective_target_dfprt { } {
3226 return [check_cached_effective_target dfprt {
3227 check_effective_target_dfprt_nocache
3231 # Return 1 iff target has unsigned plain 'char' by default.
3233 proc check_effective_target_unsigned_char {} {
3234 return [check_no_compiler_messages unsigned_char assembly {
3239 proc check_effective_target_powerpc_popcntb_ok { } {
3240 return [check_cached_effective_target powerpc_popcntb_ok {
3242 # Disable on Darwin.
3243 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3246 check_runtime_nocache powerpc_popcntb_ok {
3248 volatile int a = 0x12345678;
3251 asm volatile ("popcntb %0,%1" : "=r" (r) : "r" (a));
3259 # Return 1 if the target supports executing DFP hardware instructions,
3260 # 0 otherwise. Cache the result.
3262 proc check_dfp_hw_available { } {
3263 return [check_cached_effective_target dfp_hw_available {
3264 # For now, disable on Darwin
3265 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3268 check_runtime_nocache dfp_hw_available {
3269 volatile _Decimal64 r;
3270 volatile _Decimal64 a = 4.0DD;
3271 volatile _Decimal64 b = 2.0DD;
3274 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3275 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3276 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3277 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3280 } "-mcpu=power6 -mhard-float"
3285 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
3287 proc check_effective_target_ucn_nocache { } {
3288 # -std=c99 is only valid for C
3289 if [check_effective_target_c] {
3290 set ucnopts "-std=c99"
3294 verbose "check_effective_target_ucn_nocache: compiling source" 2
3295 set ret [check_no_compiler_messages_nocache ucn object {
3298 verbose "check_effective_target_ucn_nocache: returning $ret" 2
3302 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
3304 # This won't change for different subtargets, so cache the result.
3306 proc check_effective_target_ucn { } {
3307 return [check_cached_effective_target ucn {
3308 check_effective_target_ucn_nocache
3312 # Return 1 if the target needs a command line argument to enable a SIMD
3315 proc check_effective_target_vect_cmdline_needed { } {
3316 global et_vect_cmdline_needed_target_name
3318 if { ![info exists et_vect_cmdline_needed_target_name] } {
3319 set et_vect_cmdline_needed_target_name ""
3322 # If the target has changed since we set the cached value, clear it.
3323 set current_target [current_target_name]
3324 if { $current_target != $et_vect_cmdline_needed_target_name } {
3325 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
3326 set et_vect_cmdline_needed_target_name $current_target
3327 if { [info exists et_vect_cmdline_needed_saved] } {
3328 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
3329 unset et_vect_cmdline_needed_saved
3333 return [check_cached_effective_target vect_cmdline_needed {
3334 if { [istarget alpha*-*-*]
3335 || [istarget ia64-*-*]
3336 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
3337 && ![is-effective-target ia32])
3338 || ([istarget powerpc*-*-*]
3339 && ([check_effective_target_powerpc_spe]
3340 || [check_effective_target_powerpc_altivec]))
3341 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
3342 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
3343 || [istarget aarch64*-*-*]
3344 || [istarget amdgcn*-*-*]} {
3351 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
3353 # This won't change for different subtargets so cache the result.
3355 proc check_effective_target_vect_int { } {
3356 return [check_cached_effective_target_indexed vect_int {
3358 [istarget i?86-*-*] || [istarget x86_64-*-*]
3359 || ([istarget powerpc*-*-*]
3360 && ![istarget powerpc-*-linux*paired*])
3361 || [istarget amdgcn-*-*]
3362 || [istarget sparc*-*-*]
3363 || [istarget alpha*-*-*]
3364 || [istarget ia64-*-*]
3365 || [istarget aarch64*-*-*]
3366 || [is-effective-target arm_neon]
3367 || ([istarget mips*-*-*]
3368 && ([et-is-effective-target mips_loongson_mmi]
3369 || [et-is-effective-target mips_msa]))
3370 || ([istarget s390*-*-*]
3371 && [check_effective_target_s390_vx])
3375 # Return 1 if the target supports signed int->float conversion
3378 proc check_effective_target_vect_intfloat_cvt { } {
3379 return [check_cached_effective_target_indexed vect_intfloat_cvt {
3380 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
3381 || ([istarget powerpc*-*-*]
3382 && ![istarget powerpc-*-linux*paired*])
3383 || [is-effective-target arm_neon]
3384 || ([istarget mips*-*-*]
3385 && [et-is-effective-target mips_msa])
3386 || [istarget amdgcn-*-*] }}]
3389 # Return 1 if the target supports signed double->int conversion
3392 proc check_effective_target_vect_doubleint_cvt { } {
3393 return [check_cached_effective_target_indexed vect_doubleint_cvt {
3394 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3395 && [check_no_compiler_messages vect_doubleint_cvt assembly {
3396 #ifdef __tune_atom__
3397 # error No double vectorizer support.
3400 || [istarget aarch64*-*-*]
3401 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3402 || ([istarget mips*-*-*]
3403 && [et-is-effective-target mips_msa]) }}]
3406 # Return 1 if the target supports signed int->double conversion
3409 proc check_effective_target_vect_intdouble_cvt { } {
3410 return [check_cached_effective_target_indexed vect_intdouble_cvt {
3411 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3412 && [check_no_compiler_messages vect_intdouble_cvt assembly {
3413 #ifdef __tune_atom__
3414 # error No double vectorizer support.
3417 || [istarget aarch64*-*-*]
3418 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3419 || ([istarget mips*-*-*]
3420 && [et-is-effective-target mips_msa]) }}]
3423 #Return 1 if we're supporting __int128 for target, 0 otherwise.
3425 proc check_effective_target_int128 { } {
3426 return [check_no_compiler_messages int128 object {
3428 #ifndef __SIZEOF_INT128__
3437 # Return 1 if the target supports unsigned int->float conversion
3440 proc check_effective_target_vect_uintfloat_cvt { } {
3441 return [check_cached_effective_target_indexed vect_uintfloat_cvt {
3442 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
3443 || ([istarget powerpc*-*-*]
3444 && ![istarget powerpc-*-linux*paired*])
3445 || [istarget aarch64*-*-*]
3446 || [is-effective-target arm_neon]
3447 || ([istarget mips*-*-*]
3448 && [et-is-effective-target mips_msa])
3449 || [istarget amdgcn-*-*] }}]
3453 # Return 1 if the target supports signed float->int conversion
3456 proc check_effective_target_vect_floatint_cvt { } {
3457 return [check_cached_effective_target_indexed vect_floatint_cvt {
3458 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
3459 || ([istarget powerpc*-*-*]
3460 && ![istarget powerpc-*-linux*paired*])
3461 || [is-effective-target arm_neon]
3462 || ([istarget mips*-*-*]
3463 && [et-is-effective-target mips_msa])
3464 || [istarget amdgcn-*-*] }}]
3467 # Return 1 if the target supports unsigned float->int conversion
3470 proc check_effective_target_vect_floatuint_cvt { } {
3471 return [check_cached_effective_target_indexed vect_floatuint_cvt {
3472 expr { ([istarget powerpc*-*-*]
3473 && ![istarget powerpc-*-linux*paired*])
3474 || [is-effective-target arm_neon]
3475 || ([istarget mips*-*-*]
3476 && [et-is-effective-target mips_msa])
3477 || [istarget amdgcn-*-*] }}]
3480 # Return 1 if peeling for alignment might be profitable on the target
3483 proc check_effective_target_vect_peeling_profitable { } {
3484 return [check_cached_effective_target_indexed vect_peeling_profitable {
3485 expr { ([istarget s390*-*-*]
3486 && [check_effective_target_s390_vx])
3487 || [check_effective_target_vect_element_align_preferred] }}]
3490 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
3492 # This won't change for different subtargets so cache the result.
3494 proc check_effective_target_vect_simd_clones { } {
3495 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx,
3496 # avx2 and avx512f clone. Only the right clone for the
3497 # specified arch will be chosen, but still we need to at least
3498 # be able to assemble avx512f.
3499 return [check_cached_effective_target_indexed vect_simd_clones {
3500 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3501 && [check_effective_target_avx512f])
3502 || [istarget amdgcn-*-*] }}]
3505 # Return 1 if this is a AArch64 target supporting big endian
3506 proc check_effective_target_aarch64_big_endian { } {
3507 return [check_no_compiler_messages aarch64_big_endian assembly {
3508 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
3509 #error !__aarch64__ || !__AARCH64EB__
3514 # Return 1 if this is a AArch64 target supporting little endian
3515 proc check_effective_target_aarch64_little_endian { } {
3516 if { ![istarget aarch64*-*-*] } {
3520 return [check_no_compiler_messages aarch64_little_endian assembly {
3521 #if !defined(__aarch64__) || defined(__AARCH64EB__)
3527 # Return 1 if this is an AArch64 target supporting SVE.
3528 proc check_effective_target_aarch64_sve { } {
3529 if { ![istarget aarch64*-*-*] } {
3532 return [check_no_compiler_messages aarch64_sve assembly {
3533 #if !defined (__ARM_FEATURE_SVE)
3539 # Return 1 if this is an AArch64 target supporting SVE2.
3540 proc check_effective_target_aarch64_sve2 { } {
3541 if { ![istarget aarch64*-*-*] } {
3544 return [check_no_compiler_messages aarch64_sve2 assembly {
3545 #if !defined (__ARM_FEATURE_SVE2)
3551 # Return 1 if this is an AArch64 target only supporting SVE (not SVE2).
3552 proc check_effective_target_aarch64_sve1_only { } {
3553 return [expr { [check_effective_target_aarch64_sve]
3554 && ![check_effective_target_aarch64_sve2] }]
3557 # Return the size in bits of an SVE vector, or 0 if the size is variable.
3558 proc aarch64_sve_bits { } {
3559 return [check_cached_effective_target aarch64_sve_bits {
3562 set src dummy[pid].c
3563 set f [open $src "w"]
3564 puts $f "int bits = __ARM_FEATURE_SVE_BITS;"
3566 set output [${tool}_target_compile $src "" preprocess ""]
3569 regsub {.*bits = ([^;]*);.*} $output {\1} bits
3574 # Return 1 if this is a compiler supporting ARC atomic operations
3575 proc check_effective_target_arc_atomic { } {
3576 return [check_no_compiler_messages arc_atomic assembly {
3577 #if !defined(__ARC_ATOMIC__)
3583 # Return 1 if this is an arm target using 32-bit instructions
3584 proc check_effective_target_arm32 { } {
3585 if { ![istarget arm*-*-*] } {
3589 return [check_no_compiler_messages arm32 assembly {
3590 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
3591 #error !__arm || __thumb__ && !__thumb2__
3596 # Return 1 if this is an arm target not using Thumb
3597 proc check_effective_target_arm_nothumb { } {
3598 if { ![istarget arm*-*-*] } {
3602 return [check_no_compiler_messages arm_nothumb assembly {
3603 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
3604 #error !__arm__ || __thumb || __thumb2__
3609 # Return 1 if this is a little-endian ARM target
3610 proc check_effective_target_arm_little_endian { } {
3611 if { ![istarget arm*-*-*] } {
3615 return [check_no_compiler_messages arm_little_endian assembly {
3616 #if !defined(__arm__) || !defined(__ARMEL__)
3617 #error !__arm__ || !__ARMEL__
3622 # Return 1 if this is an ARM target that only supports aligned vector accesses
3623 proc check_effective_target_arm_vect_no_misalign { } {
3624 if { ![istarget arm*-*-*] } {
3628 return [check_no_compiler_messages arm_vect_no_misalign assembly {
3629 #if !defined(__arm__) \
3630 || (defined(__ARM_FEATURE_UNALIGNED) \
3631 && defined(__ARMEL__))
3632 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
3638 # Return 1 if this is an ARM target supporting -mfloat-abi=soft. Some
3639 # multilibs may be incompatible with this option.
3641 proc check_effective_target_arm_soft_ok { } {
3642 if { [check_effective_target_arm32] } {
3643 return [check_no_compiler_messages arm_soft_ok executable {
3644 int main() { return 0;}
3645 } "-mfloat-abi=soft"]
3651 # Return 1 if this is an ARM target supporting -mfpu=vfp with an
3654 proc check_effective_target_arm_vfp_ok_nocache { } {
3655 global et_arm_vfp_flags
3656 set et_arm_vfp_flags ""
3657 if { [check_effective_target_arm32] } {
3658 foreach flags {"-mfpu=vfp" "-mfpu=vfp -mfloat-abi=softfp" "-mfpu=vfp -mfloat-abi=hard"} {
3659 if { [check_no_compiler_messages_nocache arm_vfp_ok object {
3661 #error __ARM_FP not defined
3664 set et_arm_vfp_flags $flags
3673 proc check_effective_target_arm_vfp_ok { } {
3674 return [check_cached_effective_target arm_vfp_ok \
3675 check_effective_target_arm_vfp_ok_nocache]
3678 # Add the options needed to compile code with -mfpu=vfp. We need either
3679 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3680 # specified by the multilib, use it.
3682 proc add_options_for_arm_vfp { flags } {
3683 if { ! [check_effective_target_arm_vfp_ok] } {
3686 global et_arm_vfp_flags
3687 return "$flags $et_arm_vfp_flags"
3690 # Return 1 if this is an ARM target supporting -mfpu=vfp3
3691 # -mfloat-abi=softfp.
3693 proc check_effective_target_arm_vfp3_ok { } {
3694 if { [check_effective_target_arm32] } {
3695 return [check_no_compiler_messages arm_vfp3_ok object {
3697 } "-mfpu=vfp3 -mfloat-abi=softfp"]
3703 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
3704 # -mfloat-abi=softfp.
3705 proc check_effective_target_arm_v8_vfp_ok {} {
3706 if { [check_effective_target_arm32] } {
3707 return [check_no_compiler_messages arm_v8_vfp_ok object {
3710 __asm__ volatile ("vrinta.f32.f32 s0, s0");
3713 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
3719 # Return 1 if this is an ARM target supporting -mfpu=vfp
3720 # -mfloat-abi=hard. Some multilibs may be incompatible with these
3723 proc check_effective_target_arm_hard_vfp_ok { } {
3724 if { [check_effective_target_arm32]
3725 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
3726 return [check_no_compiler_messages arm_hard_vfp_ok executable {
3727 int main() { return 0;}
3728 } "-mfpu=vfp -mfloat-abi=hard"]
3734 # Return 1 if this is an ARM target defining __ARM_FP. We may need
3735 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3736 # incompatible with these options. Also set et_arm_fp_flags to the
3737 # best options to add.
3739 proc check_effective_target_arm_fp_ok_nocache { } {
3740 global et_arm_fp_flags
3741 set et_arm_fp_flags ""
3742 if { [check_effective_target_arm32] } {
3743 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
3744 if { [check_no_compiler_messages_nocache arm_fp_ok object {
3746 #error __ARM_FP not defined
3749 set et_arm_fp_flags $flags
3758 proc check_effective_target_arm_fp_ok { } {
3759 return [check_cached_effective_target arm_fp_ok \
3760 check_effective_target_arm_fp_ok_nocache]
3763 # Add the options needed to define __ARM_FP. We need either
3764 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3765 # specified by the multilib, use it.
3767 proc add_options_for_arm_fp { flags } {
3768 if { ! [check_effective_target_arm_fp_ok] } {
3771 global et_arm_fp_flags
3772 return "$flags $et_arm_fp_flags"
3775 # Return 1 if this is an ARM target defining __ARM_FP with
3776 # double-precision support. We may need -mfloat-abi=softfp or
3777 # equivalent options. Some multilibs may be incompatible with these
3778 # options. Also set et_arm_fp_dp_flags to the best options to add.
3780 proc check_effective_target_arm_fp_dp_ok_nocache { } {
3781 global et_arm_fp_dp_flags
3782 set et_arm_fp_dp_flags ""
3783 if { [check_effective_target_arm32] } {
3784 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
3785 if { [check_no_compiler_messages_nocache arm_fp_dp_ok object {
3787 #error __ARM_FP not defined
3789 #if ((__ARM_FP & 8) == 0)
3790 #error __ARM_FP indicates that double-precision is not supported
3793 set et_arm_fp_dp_flags $flags
3802 proc check_effective_target_arm_fp_dp_ok { } {
3803 return [check_cached_effective_target arm_fp_dp_ok \
3804 check_effective_target_arm_fp_dp_ok_nocache]
3807 # Add the options needed to define __ARM_FP with double-precision
3808 # support. We need either -mfloat-abi=softfp or -mfloat-abi=hard, but
3809 # if one is already specified by the multilib, use it.
3811 proc add_options_for_arm_fp_dp { flags } {
3812 if { ! [check_effective_target_arm_fp_dp_ok] } {
3815 global et_arm_fp_dp_flags
3816 return "$flags $et_arm_fp_dp_flags"
3819 # Return 1 if this is an ARM target that supports DSP multiply with
3820 # current multilib flags.
3822 proc check_effective_target_arm_dsp { } {
3823 return [check_no_compiler_messages arm_dsp assembly {
3824 #ifndef __ARM_FEATURE_DSP
3827 #include <arm_acle.h>
3832 # Return 1 if this is an ARM target that supports unaligned word/halfword
3833 # load/store instructions.
3835 proc check_effective_target_arm_unaligned { } {
3836 return [check_no_compiler_messages arm_unaligned assembly {
3837 #ifndef __ARM_FEATURE_UNALIGNED
3838 #error no unaligned support
3844 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3845 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3846 # incompatible with these options. Also set et_arm_crypto_flags to the
3847 # best options to add.
3849 proc check_effective_target_arm_crypto_ok_nocache { } {
3850 global et_arm_crypto_flags
3851 set et_arm_crypto_flags ""
3852 if { [check_effective_target_arm_v8_neon_ok] } {
3853 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
3854 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
3855 #include "arm_neon.h"
3857 foo (uint8x16_t a, uint8x16_t b)
3859 return vaeseq_u8 (a, b);
3862 set et_arm_crypto_flags $flags
3871 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3873 proc check_effective_target_arm_crypto_ok { } {
3874 return [check_cached_effective_target arm_crypto_ok \
3875 check_effective_target_arm_crypto_ok_nocache]
3878 # Add options for crypto extensions.
3879 proc add_options_for_arm_crypto { flags } {
3880 if { ! [check_effective_target_arm_crypto_ok] } {
3883 global et_arm_crypto_flags
3884 return "$flags $et_arm_crypto_flags"
3887 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3888 # or -mfloat-abi=hard, but if one is already specified by the
3889 # multilib, use it. Similarly, if a -mfpu option already enables
3890 # NEON, do not add -mfpu=neon.
3892 proc add_options_for_arm_neon { flags } {
3893 if { ! [check_effective_target_arm_neon_ok] } {
3896 global et_arm_neon_flags
3897 return "$flags $et_arm_neon_flags"
3900 proc add_options_for_arm_v8_vfp { flags } {
3901 if { ! [check_effective_target_arm_v8_vfp_ok] } {
3904 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
3907 proc add_options_for_arm_v8_neon { flags } {
3908 if { ! [check_effective_target_arm_v8_neon_ok] } {
3911 global et_arm_v8_neon_flags
3912 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
3915 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
3916 # options for AArch64 and for ARM.
3918 proc add_options_for_arm_v8_1a_neon { flags } {
3919 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
3922 global et_arm_v8_1a_neon_flags
3923 return "$flags $et_arm_v8_1a_neon_flags"
3926 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
3927 # Also adds the ARMv8 FP options for ARM and for AArch64.
3929 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
3930 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
3933 global et_arm_v8_2a_fp16_scalar_flags
3934 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
3937 # Add the options needed for ARMv8.2 with the FP16 extension. Also adds
3938 # the ARMv8 NEON options for ARM and for AArch64.
3940 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
3941 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
3944 global et_arm_v8_2a_fp16_neon_flags
3945 return "$flags $et_arm_v8_2a_fp16_neon_flags"
3948 proc add_options_for_arm_crc { flags } {
3949 if { ! [check_effective_target_arm_crc_ok] } {
3952 global et_arm_crc_flags
3953 return "$flags $et_arm_crc_flags"
3956 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3957 # or -mfloat-abi=hard, but if one is already specified by the
3958 # multilib, use it. Similarly, if a -mfpu option already enables
3959 # NEON, do not add -mfpu=neon.
3961 proc add_options_for_arm_neonv2 { flags } {
3962 if { ! [check_effective_target_arm_neonv2_ok] } {
3965 global et_arm_neonv2_flags
3966 return "$flags $et_arm_neonv2_flags"
3969 # Add the options needed for vfp3.
3970 proc add_options_for_arm_vfp3 { flags } {
3971 if { ! [check_effective_target_arm_vfp3_ok] } {
3974 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
3977 # Return 1 if this is an ARM target supporting -mfpu=neon
3978 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3979 # incompatible with these options. Also set et_arm_neon_flags to the
3980 # best options to add.
3982 proc check_effective_target_arm_neon_ok_nocache { } {
3983 global et_arm_neon_flags
3984 set et_arm_neon_flags ""
3985 if { [check_effective_target_arm32] } {
3986 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a" "-mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard -march=armv7-a"} {
3987 if { [check_no_compiler_messages_nocache arm_neon_ok object {
3988 #include <arm_neon.h>
3990 #ifndef __ARM_NEON__
3993 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3994 configured for -mcpu=arm926ej-s, for example. */
3995 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
3996 #error Architecture does not support NEON.
3999 set et_arm_neon_flags $flags
4008 proc check_effective_target_arm_neon_ok { } {
4009 return [check_cached_effective_target arm_neon_ok \
4010 check_effective_target_arm_neon_ok_nocache]
4014 # Return 1 if this is an ARM target supporting the SIMD32 intrinsics
4015 # from arm_acle.h. Some multilibs may be incompatible with these options.
4016 # Also set et_arm_simd32_flags to the best options to add.
4017 # arm_acle.h includes stdint.h which can cause trouble with incompatible
4018 # -mfloat-abi= options.
4020 proc check_effective_target_arm_simd32_ok_nocache { } {
4021 global et_arm_simd32_flags
4022 set et_arm_simd32_flags ""
4023 foreach flags {"" "-march=armv6" "-march=armv6 -mfloat-abi=softfp" "-march=armv6 -mfloat-abi=hard"} {
4024 if { [check_no_compiler_messages_nocache arm_simd32_ok object {
4025 #include <arm_acle.h>
4027 #ifndef __ARM_FEATURE_SIMD32
4031 set et_arm_simd32_flags $flags
4039 proc check_effective_target_arm_simd32_ok { } {
4040 return [check_cached_effective_target arm_simd32_ok \
4041 check_effective_target_arm_simd32_ok_nocache]
4044 proc add_options_for_arm_simd32 { flags } {
4045 if { ! [check_effective_target_arm_simd32_ok] } {
4048 global et_arm_simd32_flags
4049 return "$flags $et_arm_simd32_flags"
4052 # Return 1 if this is an ARM target supporting the saturation intrinsics
4053 # from arm_acle.h. Some multilibs may be incompatible with these options.
4054 # Also set et_arm_qbit_flags to the best options to add.
4055 # arm_acle.h includes stdint.h which can cause trouble with incompatible
4056 # -mfloat-abi= options.
4058 proc check_effective_target_arm_qbit_ok_nocache { } {
4059 global et_arm_qbit_flags
4060 set et_arm_qbit_flags ""
4061 foreach flags {"" "-march=armv5te" "-march=armv5te -mfloat-abi=softfp" "-march=armv5te -mfloat-abi=hard"} {
4062 if { [check_no_compiler_messages_nocache et_arm_qbit_flags object {
4063 #include <arm_acle.h>
4065 #ifndef __ARM_FEATURE_QBIT
4069 set et_arm_qbit_flags $flags
4077 proc check_effective_target_arm_qbit_ok { } {
4078 return [check_cached_effective_target et_arm_qbit_flags \
4079 check_effective_target_arm_qbit_ok_nocache]
4082 proc add_options_for_arm_qbit { flags } {
4083 if { ! [check_effective_target_arm_qbit_ok] } {
4086 global et_arm_qbit_flags
4087 return "$flags $et_arm_qbit_flags"
4090 # Return 1 if this is an ARM target supporting -mfpu=neon without any
4091 # -mfloat-abi= option. Useful in tests where add_options is not
4092 # supported (such as lto tests).
4094 proc check_effective_target_arm_neon_ok_no_float_abi_nocache { } {
4095 if { [check_effective_target_arm32] } {
4096 foreach flags {"-mfpu=neon"} {
4097 if { [check_no_compiler_messages_nocache arm_neon_ok_no_float_abi object {
4098 #include <arm_neon.h>
4100 #ifndef __ARM_NEON__
4103 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
4104 configured for -mcpu=arm926ej-s, for example. */
4105 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
4106 #error Architecture does not support NEON.
4117 proc check_effective_target_arm_neon_ok_no_float_abi { } {
4118 return [check_cached_effective_target arm_neon_ok_no_float_abi \
4119 check_effective_target_arm_neon_ok_no_float_abi_nocache]
4122 proc check_effective_target_arm_crc_ok_nocache { } {
4123 global et_arm_crc_flags
4124 set et_arm_crc_flags "-march=armv8-a+crc"
4125 return [check_no_compiler_messages_nocache arm_crc_ok object {
4126 #if !defined (__ARM_FEATURE_CRC32)
4129 #include <arm_acle.h>
4130 } "$et_arm_crc_flags"]
4133 proc check_effective_target_arm_crc_ok { } {
4134 return [check_cached_effective_target arm_crc_ok \
4135 check_effective_target_arm_crc_ok_nocache]
4138 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
4139 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4140 # incompatible with these options. Also set et_arm_neon_fp16_flags to
4141 # the best options to add.
4143 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
4144 global et_arm_neon_fp16_flags
4145 global et_arm_neon_flags
4146 set et_arm_neon_fp16_flags ""
4147 if { [check_effective_target_arm32]
4148 && [check_effective_target_arm_neon_ok] } {
4149 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
4150 "-mfpu=neon-fp16 -mfloat-abi=softfp"
4151 "-mfp16-format=ieee"
4152 "-mfloat-abi=softfp -mfp16-format=ieee"
4153 "-mfpu=neon-fp16 -mfp16-format=ieee"
4154 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
4155 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
4156 #include "arm_neon.h"
4158 foo (float32x4_t arg)
4160 return vcvt_f16_f32 (arg);
4162 } "$et_arm_neon_flags $flags"] } {
4163 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
4172 proc check_effective_target_arm_neon_fp16_ok { } {
4173 return [check_cached_effective_target arm_neon_fp16_ok \
4174 check_effective_target_arm_neon_fp16_ok_nocache]
4177 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
4178 # and -mfloat-abi=softfp together. Some multilibs may be
4179 # incompatible with these options. Also set et_arm_neon_softfp_fp16_flags to
4180 # the best options to add.
4182 proc check_effective_target_arm_neon_softfp_fp16_ok_nocache { } {
4183 global et_arm_neon_softfp_fp16_flags
4184 global et_arm_neon_flags
4185 set et_arm_neon_softfp_fp16_flags ""
4186 if { [check_effective_target_arm32]
4187 && [check_effective_target_arm_neon_ok] } {
4188 foreach flags {"-mfpu=neon-fp16 -mfloat-abi=softfp"
4189 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
4190 if { [check_no_compiler_messages_nocache arm_neon_softfp_fp16_ok object {
4191 #include "arm_neon.h"
4193 foo (float32x4_t arg)
4195 return vcvt_f16_f32 (arg);
4197 } "$et_arm_neon_flags $flags"] } {
4198 set et_arm_neon_softfp_fp16_flags [concat $et_arm_neon_flags $flags]
4207 proc check_effective_target_arm_neon_softfp_fp16_ok { } {
4208 return [check_cached_effective_target arm_neon_softfp_fp16_ok \
4209 check_effective_target_arm_neon_softfp_fp16_ok_nocache]
4214 proc check_effective_target_arm_neon_fp16_hw { } {
4215 if {! [check_effective_target_arm_neon_fp16_ok] } {
4218 global et_arm_neon_fp16_flags
4219 check_runtime arm_neon_fp16_hw {
4221 main (int argc, char **argv)
4223 asm ("vcvt.f32.f16 q1, d0");
4226 } $et_arm_neon_fp16_flags
4229 proc add_options_for_arm_neon_fp16 { flags } {
4230 if { ! [check_effective_target_arm_neon_fp16_ok] } {
4233 global et_arm_neon_fp16_flags
4234 return "$flags $et_arm_neon_fp16_flags"
4237 proc add_options_for_arm_neon_softfp_fp16 { flags } {
4238 if { ! [check_effective_target_arm_neon_softfp_fp16_ok] } {
4241 global et_arm_neon_softfp_fp16_flags
4242 return "$flags $et_arm_neon_softfp_fp16_flags"
4245 proc add_options_for_aarch64_sve { flags } {
4246 if { ![istarget aarch64*-*-*] || [check_effective_target_aarch64_sve] } {
4249 return "$flags -march=armv8.2-a+sve"
4252 # Return 1 if this is an ARM target supporting the FP16 alternative
4253 # format. Some multilibs may be incompatible with the options needed. Also
4254 # set et_arm_neon_fp16_flags to the best options to add.
4256 proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
4257 global et_arm_neon_fp16_flags
4258 set et_arm_neon_fp16_flags ""
4259 if { [check_effective_target_arm32] } {
4260 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
4261 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
4262 if { [check_no_compiler_messages_nocache \
4263 arm_fp16_alternative_ok object {
4264 #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
4265 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
4267 } "$flags -mfp16-format=alternative"] } {
4268 set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
4277 proc check_effective_target_arm_fp16_alternative_ok { } {
4278 return [check_cached_effective_target arm_fp16_alternative_ok \
4279 check_effective_target_arm_fp16_alternative_ok_nocache]
4282 # Return 1 if this is an ARM target supports specifying the FP16 none
4283 # format. Some multilibs may be incompatible with the options needed.
4285 proc check_effective_target_arm_fp16_none_ok_nocache { } {
4286 if { [check_effective_target_arm32] } {
4287 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
4288 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
4289 if { [check_no_compiler_messages_nocache \
4290 arm_fp16_none_ok object {
4291 #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
4292 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
4294 #if defined (__ARM_FP16_FORMAT_IEEE)
4295 #error __ARM_FP16_FORMAT_IEEE defined
4297 } "$flags -mfp16-format=none"] } {
4306 proc check_effective_target_arm_fp16_none_ok { } {
4307 return [check_cached_effective_target arm_fp16_none_ok \
4308 check_effective_target_arm_fp16_none_ok_nocache]
4311 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
4312 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4313 # incompatible with these options. Also set et_arm_v8_neon_flags to the
4314 # best options to add.
4316 proc check_effective_target_arm_v8_neon_ok_nocache { } {
4317 global et_arm_v8_neon_flags
4318 set et_arm_v8_neon_flags ""
4319 if { [check_effective_target_arm32] } {
4320 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4321 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
4323 #error not armv8 or later
4325 #include "arm_neon.h"
4329 __asm__ volatile ("vrintn.f32 q0, q0");
4331 } "$flags -march=armv8-a"] } {
4332 set et_arm_v8_neon_flags $flags
4341 proc check_effective_target_arm_v8_neon_ok { } {
4342 return [check_cached_effective_target arm_v8_neon_ok \
4343 check_effective_target_arm_v8_neon_ok_nocache]
4346 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
4347 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
4348 # incompatible with these options. Also set et_arm_neonv2_flags to the
4349 # best options to add.
4351 proc check_effective_target_arm_neonv2_ok_nocache { } {
4352 global et_arm_neonv2_flags
4353 global et_arm_neon_flags
4354 set et_arm_neonv2_flags ""
4355 if { [check_effective_target_arm32]
4356 && [check_effective_target_arm_neon_ok] } {
4357 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
4358 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
4359 #include "arm_neon.h"
4361 foo (float32x2_t a, float32x2_t b, float32x2_t c)
4363 return vfma_f32 (a, b, c);
4365 } "$et_arm_neon_flags $flags"] } {
4366 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
4375 proc check_effective_target_arm_neonv2_ok { } {
4376 return [check_cached_effective_target arm_neonv2_ok \
4377 check_effective_target_arm_neonv2_ok_nocache]
4380 # Add the options needed for VFP FP16 support. We need either
4381 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
4382 # the multilib, use it.
4384 proc add_options_for_arm_fp16 { flags } {
4385 if { ! [check_effective_target_arm_fp16_ok] } {
4388 global et_arm_fp16_flags
4389 return "$flags $et_arm_fp16_flags"
4392 # Add the options needed to enable support for IEEE format
4393 # half-precision support. This is valid for ARM targets.
4395 proc add_options_for_arm_fp16_ieee { flags } {
4396 if { ! [check_effective_target_arm_fp16_ok] } {
4399 global et_arm_fp16_flags
4400 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
4403 # Add the options needed to enable support for ARM Alternative format
4404 # half-precision support. This is valid for ARM targets.
4406 proc add_options_for_arm_fp16_alternative { flags } {
4407 if { ! [check_effective_target_arm_fp16_ok] } {
4410 global et_arm_fp16_flags
4411 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
4414 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
4415 # Skip multilibs that are incompatible with these options and set
4416 # et_arm_fp16_flags to the best options to add. This test is valid for
4419 proc check_effective_target_arm_fp16_ok_nocache { } {
4420 global et_arm_fp16_flags
4421 set et_arm_fp16_flags ""
4422 if { ! [check_effective_target_arm32] } {
4426 [list "" { *-*-* } { "-mfpu=*" } \
4427 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
4428 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
4429 # Multilib flags would override -mfpu.
4432 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
4433 # Must generate floating-point instructions.
4436 if [check_effective_target_arm_hf_eabi] {
4437 # Use existing float-abi and force an fpu which supports fp16
4438 set et_arm_fp16_flags "-mfpu=vfpv4"
4441 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
4442 # The existing -mfpu value is OK; use it, but add softfp.
4443 set et_arm_fp16_flags "-mfloat-abi=softfp"
4446 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
4447 # macro to check for this support.
4448 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
4449 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
4452 set et_arm_fp16_flags "$flags"
4459 proc check_effective_target_arm_fp16_ok { } {
4460 return [check_cached_effective_target arm_fp16_ok \
4461 check_effective_target_arm_fp16_ok_nocache]
4464 # Return 1 if the target supports executing VFP FP16 instructions, 0
4465 # otherwise. This test is valid for ARM only.
4467 proc check_effective_target_arm_fp16_hw { } {
4468 if {! [check_effective_target_arm_fp16_ok] } {
4471 global et_arm_fp16_flags
4472 check_runtime arm_fp16_hw {
4474 main (int argc, char **argv)
4478 asm ("vcvtb.f32.f16 %0, %1"
4479 : "=w" (r) : "w" (a)
4480 : /* No clobbers. */);
4481 return (r == 1.0) ? 0 : 1;
4483 } "$et_arm_fp16_flags -mfp16-format=ieee"
4486 # Creates a series of routines that return 1 if the given architecture
4487 # can be selected and a routine to give the flags to select that architecture
4488 # Note: Extra flags may be added to disable options from newer compilers
4489 # (Thumb in particular - but others may be added in the future).
4490 # Warning: Do not use check_effective_target_arm_arch_*_ok for architecture
4491 # extension (eg. ARMv8.1-A) since there is no macro defined for them. See
4492 # how only __ARM_ARCH_8A__ is checked for ARMv8.1-A.
4493 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
4494 # /* { dg-add-options arm_arch_v5t } */
4495 # /* { dg-require-effective-target arm_arch_v5t_multilib } */
4496 foreach { armfunc armflag armdefs } {
4497 v4 "-march=armv4 -marm" __ARM_ARCH_4__
4498 v4t "-march=armv4t -mfloat-abi=softfp" __ARM_ARCH_4T__
4499 v4t_arm "-march=armv4t -marm" __ARM_ARCH_4T__
4500 v4t_thumb "-march=armv4t -mthumb -mfloat-abi=softfp" __ARM_ARCH_4T__
4501 v5t "-march=armv5t -mfloat-abi=softfp" __ARM_ARCH_5T__
4502 v5t_arm "-march=armv5t -marm" __ARM_ARCH_5T__
4503 v5t_thumb "-march=armv5t -mthumb -mfloat-abi=softfp" __ARM_ARCH_5T__
4504 v5te "-march=armv5te -mfloat-abi=softfp" __ARM_ARCH_5TE__
4505 v5te_arm "-march=armv5te -marm" __ARM_ARCH_5TE__
4506 v5te_thumb "-march=armv5te -mthumb -mfloat-abi=softfp" __ARM_ARCH_5TE__
4507 v6 "-march=armv6 -mfloat-abi=softfp" __ARM_ARCH_6__
4508 v6_arm "-march=armv6 -marm" __ARM_ARCH_6__
4509 v6_thumb "-march=armv6 -mthumb -mfloat-abi=softfp" __ARM_ARCH_6__
4510 v6k "-march=armv6k -mfloat-abi=softfp" __ARM_ARCH_6K__
4511 v6k_arm "-march=armv6k -marm" __ARM_ARCH_6K__
4512 v6k_thumb "-march=armv6k -mthumb -mfloat-abi=softfp" __ARM_ARCH_6K__
4513 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
4514 v6z "-march=armv6z -mfloat-abi=softfp" __ARM_ARCH_6Z__
4515 v6z_arm "-march=armv6z -marm" __ARM_ARCH_6Z__
4516 v6z_thumb "-march=armv6z -mthumb -mfloat-abi=softfp" __ARM_ARCH_6Z__
4517 v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
4518 v7a "-march=armv7-a" __ARM_ARCH_7A__
4519 v7r "-march=armv7-r" __ARM_ARCH_7R__
4520 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
4521 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
4522 v7ve "-march=armv7ve -marm"
4523 "__ARM_ARCH_7A__ && __ARM_FEATURE_IDIV"
4524 v8a "-march=armv8-a" __ARM_ARCH_8A__
4525 v8a_hard "-march=armv8-a -mfpu=neon-fp-armv8 -mfloat-abi=hard" __ARM_ARCH_8A__
4526 v8_1a "-march=armv8.1-a" __ARM_ARCH_8A__
4527 v8_2a "-march=armv8.2-a" __ARM_ARCH_8A__
4528 v8r "-march=armv8-r" __ARM_ARCH_8R__
4529 v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft"
4530 __ARM_ARCH_8M_BASE__
4531 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
4532 v8_1m_main "-march=armv8.1-m.main -mthumb" __ARM_ARCH_8M_MAIN__ } {
4533 eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
4534 proc check_effective_target_arm_arch_FUNC_ok { } {
4535 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
4547 proc add_options_for_arm_arch_FUNC { flags } {
4548 return "$flags FLAG"
4551 proc check_effective_target_arm_arch_FUNC_multilib { } {
4552 return [check_runtime arm_arch_FUNC_multilib {
4558 } [add_options_for_arm_arch_FUNC ""]]
4563 # Return 1 if GCC was configured with --with-mode=
4564 proc check_effective_target_default_mode { } {
4566 return [check_configured_with "with-mode="]
4569 # Return 1 if this is an ARM target where -marm causes ARM to be
4572 proc check_effective_target_arm_arm_ok { } {
4573 return [check_no_compiler_messages arm_arm_ok assembly {
4574 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
4575 #error !__arm__ || __thumb__ || __thumb2__
4581 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
4584 proc check_effective_target_arm_thumb1_ok { } {
4585 return [check_no_compiler_messages arm_thumb1_ok assembly {
4586 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4587 #error !__arm__ || !__thumb__ || __thumb2__
4589 int foo (int i) { return i; }
4593 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
4596 proc check_effective_target_arm_thumb2_ok { } {
4597 return [check_no_compiler_messages arm_thumb2_ok assembly {
4598 #if !defined(__thumb2__)
4601 int foo (int i) { return i; }
4605 # Return 1 if this is an ARM target where Thumb-1 is used without options
4606 # added by the test.
4608 proc check_effective_target_arm_thumb1 { } {
4609 return [check_no_compiler_messages arm_thumb1 assembly {
4610 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4611 #error !__arm__ || !__thumb__ || __thumb2__
4617 # Return 1 if this is an ARM target where Thumb-2 is used without options
4618 # added by the test.
4620 proc check_effective_target_arm_thumb2 { } {
4621 return [check_no_compiler_messages arm_thumb2 assembly {
4622 #if !defined(__thumb2__)
4629 # Return 1 if this is an ARM target where conditional execution is available.
4631 proc check_effective_target_arm_cond_exec { } {
4632 return [check_no_compiler_messages arm_cond_exec assembly {
4633 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
4640 # Return 1 if this is an ARM cortex-M profile cpu
4642 proc check_effective_target_arm_cortex_m { } {
4643 if { ![istarget arm*-*-*] } {
4646 return [check_no_compiler_messages arm_cortex_m assembly {
4647 #if defined(__ARM_ARCH_ISA_ARM)
4648 #error __ARM_ARCH_ISA_ARM is defined
4654 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4655 # used and MOVT/MOVW instructions to be available.
4657 proc check_effective_target_arm_thumb1_movt_ok {} {
4658 if [check_effective_target_arm_thumb1_ok] {
4659 return [check_no_compiler_messages arm_movt object {
4663 asm ("movt r0, #42");
4671 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4672 # used and CBZ and CBNZ instructions are available.
4674 proc check_effective_target_arm_thumb1_cbz_ok {} {
4675 if [check_effective_target_arm_thumb1_ok] {
4676 return [check_no_compiler_messages arm_movt object {
4680 asm ("cbz r0, 2f\n2:");
4688 # Return 1 if this is an ARM target where ARMv8-M Security Extensions is
4691 proc check_effective_target_arm_cmse_ok {} {
4692 return [check_no_compiler_messages arm_cmse object {
4701 # Return 1 if the target supports executing MVE instructions, 0
4704 proc check_effective_target_arm_mve_hw {} {
4705 return [check_runtime arm_mve_hw_available {
4711 asm ("sqrshrl %Q1, %R1, #64, %2"
4713 : "0" (a), "r" (b));
4719 # Return 1 if this is an ARM target where ARMv8-M Security Extensions with
4720 # clearing instructions (clrm, vscclrm, vstr/vldr with FPCXT) is available.
4722 proc check_effective_target_arm_cmse_clear_ok {} {
4723 return [check_no_compiler_messages arm_cmse_clear object {
4727 asm ("clrm {r1, r2}");
4732 # Return 1 if this compilation turns on string_ops_prefer_neon on.
4734 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
4735 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
4736 int foo (void) { return 0; }
4737 } "-O2 -mprint-tune-info" ]
4740 # Return 1 if the target supports executing NEON instructions, 0
4741 # otherwise. Cache the result.
4743 proc check_effective_target_arm_neon_hw { } {
4744 return [check_runtime arm_neon_hw_available {
4748 long long a = 0, b = 1;
4749 asm ("vorr %P0, %P1, %P2"
4751 : "0" (a), "w" (b));
4754 } [add_options_for_arm_neon ""]]
4757 # Return true if this is an AArch64 target that can run SVE code.
4759 proc check_effective_target_aarch64_sve_hw { } {
4760 if { ![istarget aarch64*-*-*] } {
4763 return [check_runtime aarch64_sve_hw_available {
4767 asm volatile ("ptrue p0.b");
4770 } [add_options_for_aarch64_sve ""]]
4773 # Return true if this is an AArch64 target that can run SVE2 code.
4775 proc check_effective_target_aarch64_sve2_hw { } {
4776 if { ![istarget aarch64*-*-*] } {
4779 return [check_runtime aarch64_sve2_hw_available {
4783 asm volatile ("addp z0.b, p0/m, z0.b, z1.b");
4789 # Return true if this is an AArch64 target that can run SVE code and
4790 # if its SVE vectors have exactly BITS bits.
4792 proc aarch64_sve_hw_bits { bits } {
4793 if { ![check_effective_target_aarch64_sve_hw] } {
4796 return [check_runtime aarch64_sve${bits}_hw [subst {
4801 asm volatile ("cntd %0" : "=r" (res));
4802 if (res * 64 != $bits)
4806 }] [add_options_for_aarch64_sve ""]]
4809 # Return true if this is an AArch64 target that can run SVE code and
4810 # if its SVE vectors have exactly 256 bits.
4812 foreach N { 128 256 512 1024 2048 } {
4813 eval [string map [list N $N] {
4814 proc check_effective_target_aarch64_sveN_hw { } {
4815 return [aarch64_sve_hw_bits N]
4820 proc check_effective_target_arm_neonv2_hw { } {
4821 return [check_runtime arm_neon_hwv2_available {
4822 #include "arm_neon.h"
4826 float32x2_t a, b, c;
4827 asm ("vfma.f32 %P0, %P1, %P2"
4829 : "w" (b), "w" (c));
4832 } [add_options_for_arm_neonv2 ""]]
4835 # ID_AA64PFR1_EL1.BT using bits[3:0] == 1 implies BTI implimented.
4836 proc check_effective_target_aarch64_bti_hw { } {
4837 if { ![istarget aarch64*-*-*] } {
4840 return [check_runtime aarch64_bti_hw_available {
4845 asm volatile ("mrs %0, id_aa64pfr1_el1" : "=r" (a));
4846 return !((a & 0xf) == 1);
4851 # Return 1 if the target supports executing the armv8.3-a FJCVTZS
4853 proc check_effective_target_aarch64_fjcvtzs_hw { } {
4854 if { ![istarget aarch64*-*-*] } {
4857 return [check_runtime aarch64_fjcvtzs_hw_available {
4863 asm volatile ("fjcvtzs %w0, %d1"
4866 : /* No clobbers. */);
4869 } "-march=armv8.3-a" ]
4872 # Return 1 if GCC was configured with --enable-standard-branch-protection
4873 proc check_effective_target_default_branch_protection { } {
4874 return [check_configured_with "enable-standard-branch-protection"]
4877 # Return 1 if this is an ARM target supporting -mfloat-abi=softfp.
4879 proc check_effective_target_arm_softfp_ok { } {
4880 return [check_no_compiler_messages arm_softfp_ok object {
4883 int main (void) { return 0; }
4884 } "-mfloat-abi=softfp"]
4887 # Return 1 if this is an ARM target supporting -mfloat-abi=hard.
4889 proc check_effective_target_arm_hard_ok { } {
4890 return [check_no_compiler_messages arm_hard_ok object {
4893 int main (void) { return 0; }
4894 } "-mfloat-abi=hard"]
4897 # Return 1 if the target supports ARMv8.1-M MVE with floating point
4898 # instructions, 0 otherwise. The test is valid for ARM.
4899 # Record the command line options needed.
4901 proc check_effective_target_arm_v8_1m_mve_fp_ok_nocache { } {
4902 global et_arm_v8_1m_mve_fp_flags
4903 set et_arm_v8_1m_mve_fp_flags ""
4905 if { ![istarget arm*-*-*] } {
4909 # Iterate through sets of options to find the compiler flags that
4910 # need to be added to the -march option.
4911 foreach flags {"" "-mfloat-abi=hard -mfpu=auto -march=armv8.1-m.main+mve.fp" "-mfloat-abi=softfp -mfpu=auto -march=armv8.1-m.main+mve.fp"} {
4912 if { [check_no_compiler_messages_nocache \
4913 arm_v8_1m_mve_fp_ok object {
4914 #include <arm_mve.h>
4915 #if !(__ARM_FEATURE_MVE & 2)
4916 #error "__ARM_FEATURE_MVE for floating point not defined"
4918 #if __ARM_BIG_ENDIAN
4919 #error "MVE intrinsics are not supported in Big-Endian mode."
4921 } "$flags -mthumb"] } {
4922 set et_arm_v8_1m_mve_fp_flags "$flags -mthumb --save-temps"
4930 proc check_effective_target_arm_v8_1m_mve_fp_ok { } {
4931 return [check_cached_effective_target arm_v8_1m_mve_fp_ok \
4932 check_effective_target_arm_v8_1m_mve_fp_ok_nocache]
4935 proc add_options_for_arm_v8_1m_mve_fp { flags } {
4936 if { ! [check_effective_target_arm_v8_1m_mve_fp_ok] } {
4939 global et_arm_v8_1m_mve_fp_flags
4940 return "$flags $et_arm_v8_1m_mve_fp_flags"
4943 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
4944 # otherwise. The test is valid for AArch64 and ARM. Record the command
4945 # line options needed.
4947 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
4948 global et_arm_v8_1a_neon_flags
4949 set et_arm_v8_1a_neon_flags ""
4951 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4955 # Iterate through sets of options to find the compiler flags that
4956 # need to be added to the -march option. Start with the empty set
4957 # since AArch64 only needs the -march setting.
4958 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4959 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4960 foreach arches { "-march=armv8-a+rdma" "-march=armv8.1-a" } {
4961 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
4962 #if !defined (__ARM_FEATURE_QRDMX)
4963 #error "__ARM_FEATURE_QRDMX not defined"
4965 } "$flags $arches"] } {
4966 set et_arm_v8_1a_neon_flags "$flags $arches"
4975 proc check_effective_target_arm_v8_1a_neon_ok { } {
4976 return [check_cached_effective_target arm_v8_1a_neon_ok \
4977 check_effective_target_arm_v8_1a_neon_ok_nocache]
4980 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
4981 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4982 # Record the command line options needed.
4984 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
4985 global et_arm_v8_2a_fp16_scalar_flags
4986 set et_arm_v8_2a_fp16_scalar_flags ""
4988 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4992 # Iterate through sets of options to find the compiler flags that
4993 # need to be added to the -march option.
4994 foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
4995 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
4996 if { [check_no_compiler_messages_nocache \
4997 arm_v8_2a_fp16_scalar_ok object {
4998 #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC)
4999 #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
5001 } "$flags -march=armv8.2-a+fp16"] } {
5002 set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16"
5010 proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
5011 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
5012 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache]
5015 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
5016 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
5017 # Record the command line options needed.
5019 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
5020 global et_arm_v8_2a_fp16_neon_flags
5021 set et_arm_v8_2a_fp16_neon_flags ""
5023 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5027 # Iterate through sets of options to find the compiler flags that
5028 # need to be added to the -march option.
5029 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
5030 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
5031 if { [check_no_compiler_messages_nocache \
5032 arm_v8_2a_fp16_neon_ok object {
5033 #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
5034 #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
5036 } "$flags -march=armv8.2-a+fp16"] } {
5037 set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16"
5045 proc check_effective_target_arm_v8_2a_fp16_neon_ok { } {
5046 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
5047 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache]
5050 # Return 1 if the target supports ARMv8.2 Adv.SIMD Dot Product
5051 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
5052 # Record the command line options needed.
5054 proc check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache { } {
5055 global et_arm_v8_2a_dotprod_neon_flags
5056 set et_arm_v8_2a_dotprod_neon_flags ""
5058 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5062 # Iterate through sets of options to find the compiler flags that
5063 # need to be added to the -march option.
5064 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
5065 if { [check_no_compiler_messages_nocache \
5066 arm_v8_2a_dotprod_neon_ok object {
5068 #if !defined (__ARM_FEATURE_DOTPROD)
5069 #error "__ARM_FEATURE_DOTPROD not defined"
5071 } "$flags -march=armv8.2-a+dotprod"] } {
5072 set et_arm_v8_2a_dotprod_neon_flags "$flags -march=armv8.2-a+dotprod"
5080 # Return 1 if the target supports ARMv8.1-M MVE
5081 # instructions, 0 otherwise. The test is valid for ARM.
5082 # Record the command line options needed.
5084 proc check_effective_target_arm_v8_1m_mve_ok_nocache { } {
5085 global et_arm_v8_1m_mve_flags
5086 set et_arm_v8_1m_mve_flags ""
5088 if { ![istarget arm*-*-*] } {
5092 # Iterate through sets of options to find the compiler flags that
5093 # need to be added to the -march option.
5094 foreach flags {"" "-mfloat-abi=hard -mfpu=auto -march=armv8.1-m.main+mve" "-mfloat-abi=softfp -mfpu=auto -march=armv8.1-m.main+mve"} {
5095 if { [check_no_compiler_messages_nocache \
5096 arm_v8_1m_mve_ok object {
5097 #if !defined (__ARM_FEATURE_MVE)
5098 #error "__ARM_FEATURE_MVE not defined"
5100 #if __ARM_BIG_ENDIAN
5101 #error "MVE intrinsics are not supported in Big-Endian mode."
5103 #include <arm_mve.h>
5104 } "$flags -mthumb"] } {
5105 set et_arm_v8_1m_mve_flags "$flags -mthumb --save-temps"
5113 proc check_effective_target_arm_v8_1m_mve_ok { } {
5114 return [check_cached_effective_target arm_v8_1m_mve_ok \
5115 check_effective_target_arm_v8_1m_mve_ok_nocache]
5118 proc add_options_for_arm_v8_1m_mve { flags } {
5119 if { ! [check_effective_target_arm_v8_1m_mve_ok] } {
5122 global et_arm_v8_1m_mve_flags
5123 return "$flags $et_arm_v8_1m_mve_flags"
5126 proc check_effective_target_arm_v8_2a_dotprod_neon_ok { } {
5127 return [check_cached_effective_target arm_v8_2a_dotprod_neon_ok \
5128 check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache]
5131 proc add_options_for_arm_v8_2a_dotprod_neon { flags } {
5132 if { ! [check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
5135 global et_arm_v8_2a_dotprod_neon_flags
5136 return "$flags $et_arm_v8_2a_dotprod_neon_flags"
5139 # Return 1 if the target supports ARMv8.2+i8mm Adv.SIMD Dot Product
5140 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
5141 # Record the command line options needed.
5143 proc check_effective_target_arm_v8_2a_i8mm_ok_nocache { } {
5144 global et_arm_v8_2a_i8mm_flags
5145 set et_arm_v8_2a_i8mm_flags ""
5147 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5151 # Iterate through sets of options to find the compiler flags that
5152 # need to be added to the -march option.
5153 foreach flags {"" "-mfloat-abi=hard -mfpu=neon-fp-armv8" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" } {
5154 if { [check_no_compiler_messages_nocache \
5155 arm_v8_2a_i8mm_ok object {
5156 #include <arm_neon.h>
5157 #if !defined (__ARM_FEATURE_MATMUL_INT8)
5158 #error "__ARM_FEATURE_MATMUL_INT8 not defined"
5160 } "$flags -march=armv8.2-a+i8mm"] } {
5161 set et_arm_v8_2a_i8mm_flags "$flags -march=armv8.2-a+i8mm"
5169 proc check_effective_target_arm_v8_2a_i8mm_ok { } {
5170 return [check_cached_effective_target arm_v8_2a_i8mm_ok \
5171 check_effective_target_arm_v8_2a_i8mm_ok_nocache]
5174 proc add_options_for_arm_v8_2a_i8mm { flags } {
5175 if { ! [check_effective_target_arm_v8_2a_i8mm_ok] } {
5178 global et_arm_v8_2a_i8mm_flags
5179 return "$flags $et_arm_v8_2a_i8mm_flags"
5182 # Return 1 if the target supports FP16 VFMAL and VFMSL
5183 # instructions, 0 otherwise.
5184 # Record the command line options needed.
5186 proc check_effective_target_arm_fp16fml_neon_ok_nocache { } {
5187 global et_arm_fp16fml_neon_flags
5188 set et_arm_fp16fml_neon_flags ""
5190 if { ![istarget arm*-*-*] } {
5194 # Iterate through sets of options to find the compiler flags that
5195 # need to be added to the -march option.
5196 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
5197 if { [check_no_compiler_messages_nocache \
5198 arm_fp16fml_neon_ok assembly {
5199 #include <arm_neon.h>
5201 foo (float32x2_t r, float16x4_t a, float16x4_t b)
5203 return vfmlal_high_f16 (r, a, b);
5205 } "$flags -march=armv8.2-a+fp16fml"] } {
5206 set et_arm_fp16fml_neon_flags "$flags -march=armv8.2-a+fp16fml"
5214 proc check_effective_target_arm_fp16fml_neon_ok { } {
5215 return [check_cached_effective_target arm_fp16fml_neon_ok \
5216 check_effective_target_arm_fp16fml_neon_ok_nocache]
5219 proc add_options_for_arm_fp16fml_neon { flags } {
5220 if { ! [check_effective_target_arm_fp16fml_neon_ok] } {
5223 global et_arm_fp16fml_neon_flags
5224 return "$flags $et_arm_fp16fml_neon_flags"
5227 # Return 1 if the target supports BFloat16 SIMD instructions, 0 otherwise.
5228 # The test is valid for ARM and for AArch64.
5230 proc check_effective_target_arm_v8_2a_bf16_neon_ok_nocache { } {
5231 global et_arm_v8_2a_bf16_neon_flags
5232 set et_arm_v8_2a_bf16_neon_flags ""
5234 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
5238 foreach flags {"" "-mfloat-abi=hard -mfpu=neon-fp-armv8" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" } {
5239 if { [check_no_compiler_messages_nocache arm_v8_2a_bf16_neon_ok object {
5240 #include <arm_neon.h>
5241 #if !defined (__ARM_FEATURE_BF16_VECTOR_ARITHMETIC)
5242 #error "__ARM_FEATURE_BF16_VECTOR_ARITHMETIC not defined"
5244 } "$flags -march=armv8.2-a+bf16"] } {
5245 set et_arm_v8_2a_bf16_neon_flags "$flags -march=armv8.2-a+bf16"
5253 proc check_effective_target_arm_v8_2a_bf16_neon_ok { } {
5254 return [check_cached_effective_target arm_v8_2a_bf16_neon_ok \
5255 check_effective_target_arm_v8_2a_bf16_neon_ok_nocache]
5258 proc add_options_for_arm_v8_2a_bf16_neon { flags } {
5259 if { ! [check_effective_target_arm_v8_2a_bf16_neon_ok] } {
5262 global et_arm_v8_2a_bf16_neon_flags
5263 return "$flags $et_arm_v8_2a_bf16_neon_flags"
5266 # A series of routines are created to 1) check if a given architecture is
5267 # effective (check_effective_target_*_ok) and then 2) give the corresponding
5268 # flags that enable the architecture (add_options_for_*).
5269 # The series includes:
5270 # arm_v8m_main_cde: Armv8-m CDE (Custom Datapath Extension).
5271 # arm_v8m_main_cde_fp: Armv8-m CDE with FP registers.
5272 # arm_v8_1m_main_cde_mve: Armv8.1-m CDE with MVE.
5274 # /* { dg-require-effective-target arm_v8m_main_cde_ok } */
5275 # /* { dg-add-options arm_v8m_main_cde } */
5276 # The tests are valid for Arm.
5278 foreach { armfunc armflag armdef arminc } {
5280 "-march=armv8-m.main+cdecp0+cdecp6 -mthumb"
5281 "defined (__ARM_FEATURE_CDE)"
5284 "-march=armv8-m.main+fp+cdecp0+cdecp6 -mthumb -mfpu=auto"
5285 "defined (__ARM_FEATURE_CDE) && defined (__ARM_FP)"
5287 arm_v8_1m_main_cde_mve
5288 "-march=armv8.1-m.main+mve+cdecp0+cdecp6 -mthumb -mfpu=auto"
5289 "defined (__ARM_FEATURE_CDE) && defined (__ARM_FEATURE_MVE)"
5290 "#include <arm_mve.h>"
5291 arm_v8_1m_main_cde_mve_fp
5292 "-march=armv8.1-m.main+mve.fp+cdecp0+cdecp6 -mthumb -mfpu=auto"
5293 "defined (__ARM_FEATURE_CDE) || __ARM_FEATURE_MVE == 3"
5294 "#include <arm_mve.h>"
5296 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef INC $arminc ] {
5297 proc check_effective_target_FUNC_ok_nocache { } {
5298 global et_FUNC_flags
5299 set et_FUNC_flags ""
5301 if { ![istarget arm*-*-*] } {
5305 if { [check_no_compiler_messages_nocache FUNC_ok assembly {
5309 #include <arm_cde.h>
5312 set et_FUNC_flags "FLAG"
5319 proc check_effective_target_FUNC_ok { } {
5320 return [check_cached_effective_target FUNC_ok \
5321 check_effective_target_FUNC_ok_nocache]
5324 proc add_options_for_FUNC { flags } {
5325 if { ! [check_effective_target_FUNC_ok] } {
5328 global et_FUNC_flags
5329 return "$flags $et_FUNC_flags"
5334 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
5337 proc check_effective_target_arm_v8_neon_hw { } {
5338 return [check_runtime arm_v8_neon_hw_available {
5339 #include "arm_neon.h"
5343 float32x2_t a = { 1.0f, 2.0f };
5344 #ifdef __ARM_ARCH_ISA_A64
5345 asm ("frinta %0.2s, %1.2s"
5349 asm ("vrinta.f32 %P0, %P1"
5353 return a[0] == 2.0f;
5355 } [add_options_for_arm_v8_neon ""]]
5358 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
5359 # otherwise. The test is valid for AArch64 and ARM.
5361 proc check_effective_target_arm_v8_1a_neon_hw { } {
5362 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
5365 return [check_runtime arm_v8_1a_neon_hw_available {
5369 #ifdef __ARM_ARCH_ISA_A64
5370 __Int32x2_t a = {0, 1};
5371 __Int32x2_t b = {0, 2};
5374 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
5377 : /* No clobbers. */);
5381 __simd64_int32_t a = {0, 1};
5382 __simd64_int32_t b = {0, 2};
5383 __simd64_int32_t result;
5385 asm ("vqrdmlah.s32 %P0, %P1, %P2"
5388 : /* No clobbers. */);
5393 } [add_options_for_arm_v8_1a_neon ""]]
5396 # Return 1 if the target supports executing floating point instructions from
5397 # ARMv8.2 with the FP16 extension, 0 otherwise. The test is valid for ARM and
5400 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
5401 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
5404 return [check_runtime arm_v8_2a_fp16_scalar_hw_available {
5411 #ifdef __ARM_ARCH_ISA_A64
5413 asm ("fabs %h0, %h1"
5416 : /* No clobbers. */);
5420 asm ("vabs.f16 %0, %1"
5423 : /* No clobbers. */);
5427 return (result == 1.0) ? 0 : 1;
5429 } [add_options_for_arm_v8_2a_fp16_scalar ""]]
5432 # Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
5433 # with the FP16 extension, 0 otherwise. The test is valid for ARM and for
5436 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
5437 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
5440 return [check_runtime arm_v8_2a_fp16_neon_hw_available {
5444 #ifdef __ARM_ARCH_ISA_A64
5446 __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
5447 __Float16x4_t result;
5449 asm ("fabs %0.4h, %1.4h"
5452 : /* No clobbers. */);
5456 __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
5457 __simd64_float16_t result;
5459 asm ("vabs.f16 %P0, %P1"
5462 : /* No clobbers. */);
5466 return (result[0] == 1.0) ? 0 : 1;
5468 } [add_options_for_arm_v8_2a_fp16_neon ""]]
5471 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.2
5472 # with the Dot Product extension, 0 otherwise. The test is valid for ARM and for
5475 proc check_effective_target_arm_v8_2a_dotprod_neon_hw { } {
5476 if { ![check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
5479 return [check_runtime arm_v8_2a_dotprod_neon_hw_available {
5480 #include "arm_neon.h"
5485 uint32x2_t results = {0,0};
5486 uint8x8_t a = {1,1,1,1,2,2,2,2};
5487 uint8x8_t b = {2,2,2,2,3,3,3,3};
5489 #ifdef __ARM_ARCH_ISA_A64
5490 asm ("udot %0.2s, %1.8b, %2.8b"
5493 : /* No clobbers. */);
5496 asm ("vudot.u8 %P0, %P1, %P2"
5499 : /* No clobbers. */);
5502 return (results[0] == 8 && results[1] == 24) ? 1 : 0;
5504 } [add_options_for_arm_v8_2a_dotprod_neon ""]]
5507 # Return 1 if this is a ARM target with NEON enabled.
5509 proc check_effective_target_arm_neon { } {
5510 if { [check_effective_target_arm32] } {
5511 return [check_no_compiler_messages arm_neon object {
5512 #ifndef __ARM_NEON__
5523 proc check_effective_target_arm_neonv2 { } {
5524 if { [check_effective_target_arm32] } {
5525 return [check_no_compiler_messages arm_neon object {
5526 #ifndef __ARM_NEON__
5529 #ifndef __ARM_FEATURE_FMA
5541 # Return 1 if this is an ARM target with load acquire and store release
5542 # instructions for 8-, 16- and 32-bit types.
5544 proc check_effective_target_arm_acq_rel { } {
5545 return [check_no_compiler_messages arm_acq_rel object {
5547 load_acquire_store_release (void)
5549 asm ("lda r0, [r1]\n\t"
5555 : : : "r0", "memory");
5560 # Add the options needed for MIPS Paired-Single.
5562 proc add_options_for_mpaired_single { flags } {
5563 if { ! [check_effective_target_mpaired_single] } {
5566 return "$flags -mpaired-single"
5569 # Add the options needed for MIPS SIMD Architecture.
5571 proc add_options_for_mips_msa { flags } {
5572 if { ! [check_effective_target_mips_msa] } {
5575 return "$flags -mmsa"
5578 # Add the options needed for MIPS Loongson MMI Architecture.
5580 proc add_options_for_mips_loongson_mmi { flags } {
5581 if { ! [check_effective_target_mips_loongson_mmi] } {
5584 return "$flags -mloongson-mmi"
5588 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
5589 # the Loongson vector modes.
5591 proc check_effective_target_mips_loongson_mmi { } {
5592 return [check_no_compiler_messages loongson assembly {
5593 #if !defined(__mips_loongson_mmi)
5594 #error !__mips_loongson_mmi
5596 #if !defined(__mips_loongson_vector_rev)
5597 #error !__mips_loongson_vector_rev
5602 # Return 1 if this is a MIPS target that supports the legacy NAN.
5604 proc check_effective_target_mips_nanlegacy { } {
5605 return [check_no_compiler_messages nanlegacy assembly {
5607 int main () { return 0; }
5611 # Return 1 if an MSA program can be compiled to object
5613 proc check_effective_target_mips_msa { } {
5614 if ![check_effective_target_nomips16] {
5617 return [check_no_compiler_messages msa object {
5618 #if !defined(__mips_msa)
5619 #error "MSA NOT AVAIL"
5621 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
5622 #error "MSA NOT AVAIL FOR ISA REV < 2"
5624 #if !defined(__mips_hard_float)
5625 #error "MSA HARD_FLOAT REQUIRED"
5627 #if __mips_fpr != 64
5628 #error "MSA 64-bit FPR REQUIRED"
5634 v8i16 v = __builtin_msa_ldi_h (1);
5642 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
5645 proc check_effective_target_arm_eabi { } {
5646 return [check_no_compiler_messages arm_eabi object {
5647 #ifndef __ARM_EABI__
5655 # Return 1 if this is an ARM target that adheres to the hard-float variant of
5656 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
5658 proc check_effective_target_arm_hf_eabi { } {
5659 return [check_no_compiler_messages arm_hf_eabi object {
5660 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
5661 #error not hard-float EABI
5668 # Return 1 if this is an ARM target that uses the soft float ABI
5669 # with no floating-point instructions at all (e.g. -mfloat-abi=soft).
5671 proc check_effective_target_arm_softfloat { } {
5672 return [check_no_compiler_messages arm_softfloat object {
5673 #if !defined(__SOFTFP__)
5674 #error not soft-float EABI
5681 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
5682 # Some multilibs may be incompatible with this option.
5684 proc check_effective_target_arm_iwmmxt_ok { } {
5685 if { [check_effective_target_arm32] } {
5686 return [check_no_compiler_messages arm_iwmmxt_ok object {
5694 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
5695 # for an ARM target.
5696 proc check_effective_target_arm_prefer_ldrd_strd { } {
5697 if { ![check_effective_target_arm32] } {
5701 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
5702 void foo (void) { __asm__ ("" ::: "r4", "r5"); }
5706 # Return true if LDRD/STRD instructions are available on this target.
5707 proc check_effective_target_arm_ldrd_strd_ok { } {
5708 if { ![check_effective_target_arm32] } {
5712 return [check_no_compiler_messages arm_ldrd_strd_ok object {
5715 __UINT64_TYPE__ a = 1, b = 10;
5716 __UINT64_TYPE__ *c = &b;
5717 // `a` will be in a valid register since it's a DImode quantity.
5726 # Return 1 if this is a PowerPC target supporting -meabi.
5728 proc check_effective_target_powerpc_eabi_ok { } {
5729 if { [istarget powerpc*-*-*] } {
5730 return [check_no_compiler_messages powerpc_eabi_ok object {
5738 # Return 1 if this is a PowerPC target with floating-point registers.
5740 proc check_effective_target_powerpc_fprs { } {
5741 if { [istarget powerpc*-*-*]
5742 || [istarget rs6000-*-*] } {
5743 return [check_no_compiler_messages powerpc_fprs object {
5755 # Return 1 if this is a PowerPC target with hardware double-precision
5758 proc check_effective_target_powerpc_hard_double { } {
5759 if { [istarget powerpc*-*-*]
5760 || [istarget rs6000-*-*] } {
5761 return [check_no_compiler_messages powerpc_hard_double object {
5773 # Return 1 if this is a PowerPC target supporting -maltivec.
5775 proc check_effective_target_powerpc_altivec_ok { } {
5776 if { ([istarget powerpc*-*-*]
5777 && ![istarget powerpc-*-linux*paired*])
5778 || [istarget rs6000-*-*] } {
5779 # AltiVec is not supported on AIX before 5.3.
5780 if { [istarget powerpc*-*-aix4*]
5781 || [istarget powerpc*-*-aix5.1*]
5782 || [istarget powerpc*-*-aix5.2*] } {
5785 return [check_no_compiler_messages powerpc_altivec_ok object {
5793 # Return 1 if this is a PowerPC target supporting -mpower8-vector
5795 proc check_effective_target_powerpc_p8vector_ok { } {
5796 if { ([istarget powerpc*-*-*]
5797 && ![istarget powerpc-*-linux*paired*])
5798 || [istarget rs6000-*-*] } {
5799 # AltiVec is not supported on AIX before 5.3.
5800 if { [istarget powerpc*-*-aix4*]
5801 || [istarget powerpc*-*-aix5.1*]
5802 || [istarget powerpc*-*-aix5.2*] } {
5805 # Darwin doesn't run on power8, so far.
5806 if { [istarget *-*-darwin*] } {
5809 return [check_no_compiler_messages powerpc_p8vector_ok object {
5811 asm volatile ("xxlorc 0,0,0");
5814 } "-mpower8-vector"]
5820 # Return 1 if this is a PowerPC target supporting -mpower9-vector
5822 proc check_effective_target_powerpc_p9vector_ok { } {
5823 if { ([istarget powerpc*-*-*]
5824 && ![istarget powerpc-*-linux*paired*])
5825 || [istarget rs6000-*-*] } {
5826 # AltiVec is not supported on AIX before 5.3.
5827 if { [istarget powerpc*-*-aix4*]
5828 || [istarget powerpc*-*-aix5.1*]
5829 || [istarget powerpc*-*-aix5.2*] } {
5832 # Darwin doesn't run on power9, so far.
5833 if { [istarget *-*-darwin*] } {
5836 return [check_no_compiler_messages powerpc_p9vector_ok object {
5839 vector double v = (vector double) { 0.0, 0.0 };
5840 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
5843 } "-mpower9-vector"]
5849 # Return 1 if this is a PowerPC target supporting -mmodulo
5851 proc check_effective_target_powerpc_p9modulo_ok { } {
5852 if { ([istarget powerpc*-*-*]
5853 && ![istarget powerpc-*-linux*paired*])
5854 || [istarget rs6000-*-*] } {
5855 # AltiVec is not supported on AIX before 5.3.
5856 if { [istarget powerpc*-*-aix4*]
5857 || [istarget powerpc*-*-aix5.1*]
5858 || [istarget powerpc*-*-aix5.2*] } {
5861 return [check_no_compiler_messages powerpc_p9modulo_ok object {
5863 int i = 5, j = 3, r = -1;
5864 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
5873 # return 1 if our compiler returns the ARCH_PWR defines with the options
5874 # as provided by the test.
5875 proc check_effective_target_has_arch_pwr5 { } {
5876 return [check_no_compiler_messages arch_pwr5 assembly {
5878 #error does not have power5 support.
5880 /* "has power5 support" */
5885 proc check_effective_target_has_arch_pwr6 { } {
5886 return [check_no_compiler_messages arch_pwr6 assembly {
5888 #error does not have power6 support.
5890 /* "has power6 support" */
5895 proc check_effective_target_has_arch_pwr7 { } {
5896 return [check_no_compiler_messages arch_pwr7 assembly {
5898 #error does not have power7 support.
5900 /* "has power7 support" */
5905 proc check_effective_target_has_arch_pwr8 { } {
5906 return [check_no_compiler_messages arch_pwr8 assembly {
5908 #error does not have power8 support.
5910 /* "has power8 support" */
5915 proc check_effective_target_has_arch_pwr9 { } {
5916 return [check_no_compiler_messages arch_pwr9 assembly {
5918 #error does not have power9 support.
5920 /* "has power9 support" */
5925 # Return 1 if this is a PowerPC target supporting -mcpu=power10.
5926 # Limit this to 64-bit linux systems for now until other targets support
5929 proc check_effective_target_power10_ok { } {
5930 if { ([istarget powerpc64*-*-linux*]) } {
5931 return [check_no_compiler_messages power10_ok object {
5934 asm ("pli %0,%1" : "=r" (e) : "n" (0x12345));
5943 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
5944 # software emulation on power7/power8 systems or hardware support on power9.
5946 proc check_effective_target_powerpc_float128_sw_ok { } {
5947 if { ([istarget powerpc*-*-*]
5948 && ![istarget powerpc-*-linux*paired*])
5949 || [istarget rs6000-*-*] } {
5950 # AltiVec is not supported on AIX before 5.3.
5951 if { [istarget powerpc*-*-aix4*]
5952 || [istarget powerpc*-*-aix5.1*]
5953 || [istarget powerpc*-*-aix5.2*] } {
5956 # Darwin doesn't have VSX, so no soft support for float128.
5957 if { [istarget *-*-darwin*] } {
5960 return [check_no_compiler_messages powerpc_float128_sw_ok object {
5961 volatile __float128 x = 1.0q;
5962 volatile __float128 y = 2.0q;
5964 __float128 z = x + y;
5967 } "-mfloat128 -mvsx"]
5973 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
5974 # support on power9.
5976 proc check_effective_target_powerpc_float128_hw_ok { } {
5977 if { ([istarget powerpc*-*-*]
5978 && ![istarget powerpc-*-linux*paired*])
5979 || [istarget rs6000-*-*] } {
5980 # AltiVec is not supported on AIX before 5.3.
5981 if { [istarget powerpc*-*-aix4*]
5982 || [istarget powerpc*-*-aix5.1*]
5983 || [istarget powerpc*-*-aix5.2*] } {
5986 # Darwin doesn't run on any machine with float128 h/w so far.
5987 if { [istarget *-*-darwin*] } {
5990 return [check_no_compiler_messages powerpc_float128_hw_ok object {
5991 volatile __float128 x = 1.0q;
5992 volatile __float128 y = 2.0q;
5995 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
5998 } "-mfloat128-hardware"]
6004 # Return 1 if current options define float128, 0 otherwise.
6006 proc check_effective_target_ppc_float128 { } {
6007 return [check_no_compiler_messages_nocache ppc_float128 object {
6008 #ifndef __FLOAT128__
6014 # Return 1 if current options generate float128 insns, 0 otherwise.
6016 proc check_effective_target_ppc_float128_insns { } {
6017 return [check_no_compiler_messages_nocache ppc_float128 object {
6018 #ifndef __FLOAT128_HARDWARE__
6024 # Return 1 if current options generate VSX instructions, 0 otherwise.
6026 proc check_effective_target_powerpc_vsx { } {
6027 return [check_no_compiler_messages_nocache powerpc_vsx object {
6034 # Return 1 if this is a PowerPC target supporting -mvsx
6036 proc check_effective_target_powerpc_vsx_ok { } {
6037 if { ([istarget powerpc*-*-*]
6038 && ![istarget powerpc-*-linux*paired*])
6039 || [istarget rs6000-*-*] } {
6040 # VSX is not supported on AIX before 7.1.
6041 if { [istarget powerpc*-*-aix4*]
6042 || [istarget powerpc*-*-aix5*]
6043 || [istarget powerpc*-*-aix6*] } {
6046 # Darwin doesn't have VSX, even if it's used with an assembler
6047 #Â which recognises the insns.
6048 if { [istarget *-*-darwin*] } {
6051 return [check_no_compiler_messages powerpc_vsx_ok object {
6053 asm volatile ("xxlor 0,0,0");
6062 # Return 1 if this is a PowerPC target supporting -mhtm
6064 proc check_effective_target_powerpc_htm_ok { } {
6065 if { ([istarget powerpc*-*-*]
6066 && ![istarget powerpc-*-linux*paired*])
6067 || [istarget rs6000-*-*] } {
6068 # HTM is not supported on AIX yet.
6069 if { [istarget powerpc*-*-aix*] } {
6072 return [check_no_compiler_messages powerpc_htm_ok object {
6074 asm volatile ("tbegin. 0");
6083 # Return 1 if the target supports executing HTM hardware instructions,
6084 # 0 otherwise. Cache the result.
6086 proc check_htm_hw_available { } {
6087 return [check_cached_effective_target htm_hw_available {
6088 # For now, disable on Darwin
6089 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
6092 check_runtime_nocache htm_hw_available {
6102 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
6104 proc check_effective_target_powerpc_ppu_ok { } {
6105 if [check_effective_target_powerpc_altivec_ok] {
6106 return [check_no_compiler_messages cell_asm_available object {
6109 asm volatile ("lvlx v0,v0,v0");
6111 asm volatile ("lvlx 0,0,0");
6121 # Return 1 if this is a PowerPC target that supports SPU.
6123 proc check_effective_target_powerpc_spu { } {
6124 if { [istarget powerpc*-*-linux*] } {
6125 return [check_effective_target_powerpc_altivec_ok]
6131 # Return 1 if this is a PowerPC SPE target. The check includes options
6132 # specified by dg-options for this test, so don't cache the result.
6134 proc check_effective_target_powerpc_spe_nocache { } {
6135 if { [istarget powerpc*-*-*] } {
6136 return [check_no_compiler_messages_nocache powerpc_spe object {
6142 } [current_compiler_flags]]
6148 # Return 1 if this is a PowerPC target with SPE enabled.
6150 proc check_effective_target_powerpc_spe { } {
6151 if { [istarget powerpc*-*-*] } {
6152 return [check_no_compiler_messages powerpc_spe object {
6164 # Return 1 if this is a PowerPC target with Altivec enabled.
6166 proc check_effective_target_powerpc_altivec { } {
6167 if { [istarget powerpc*-*-*] } {
6168 return [check_no_compiler_messages powerpc_altivec object {
6180 # Return 1 if this is a PowerPC 405 target. The check includes options
6181 # specified by dg-options for this test, so don't cache the result.
6183 proc check_effective_target_powerpc_405_nocache { } {
6184 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
6185 return [check_no_compiler_messages_nocache powerpc_405 object {
6191 } [current_compiler_flags]]
6197 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
6199 proc check_effective_target_powerpc_elfv2 { } {
6200 if { [istarget powerpc*-*-*] } {
6201 return [check_no_compiler_messages powerpc_elfv2 object {
6203 #error not ELF v2 ABI
6213 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
6214 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
6215 # test environment appears to run executables on such a simulator.
6217 proc check_effective_target_ultrasparc_hw { } {
6218 return [check_runtime ultrasparc_hw {
6219 int main() { return 0; }
6220 } "-mcpu=ultrasparc"]
6223 # Return 1 if the test environment supports executing UltraSPARC VIS2
6224 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
6226 proc check_effective_target_ultrasparc_vis2_hw { } {
6227 return [check_runtime ultrasparc_vis2_hw {
6228 int main() { __asm__(".word 0x81b00320"); return 0; }
6229 } "-mcpu=ultrasparc3"]
6232 # Return 1 if the test environment supports executing UltraSPARC VIS3
6233 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
6235 proc check_effective_target_ultrasparc_vis3_hw { } {
6236 return [check_runtime ultrasparc_vis3_hw {
6237 int main() { __asm__(".word 0x81b00220"); return 0; }
6241 # Return 1 if this is a SPARC-V9 target.
6243 proc check_effective_target_sparc_v9 { } {
6244 if { [istarget sparc*-*-*] } {
6245 return [check_no_compiler_messages sparc_v9 object {
6247 asm volatile ("return %i7+8");
6256 # Return 1 if this is a SPARC target with VIS enabled.
6258 proc check_effective_target_sparc_vis { } {
6259 if { [istarget sparc*-*-*] } {
6260 return [check_no_compiler_messages sparc_vis object {
6272 # Return 1 if the target supports hardware vector shift operation.
6274 proc check_effective_target_vect_shift { } {
6275 return [check_cached_effective_target_indexed vect_shift {
6276 expr {([istarget powerpc*-*-*]
6277 && ![istarget powerpc-*-linux*paired*])
6278 || [istarget ia64-*-*]
6279 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6280 || [istarget aarch64*-*-*]
6281 || [is-effective-target arm_neon]
6282 || ([istarget mips*-*-*]
6283 && ([et-is-effective-target mips_msa]
6284 || [et-is-effective-target mips_loongson_mmi]))
6285 || ([istarget s390*-*-*]
6286 && [check_effective_target_s390_vx])
6287 || [istarget amdgcn-*-*] }}]
6290 # Return 1 if the target supports hardware vector shift by register operation.
6292 proc check_effective_target_vect_var_shift { } {
6293 return [check_cached_effective_target_indexed vect_var_shift {
6294 expr {(([istarget i?86-*-*] || [istarget x86_64-*-*])
6295 && [check_avx2_available])
6299 proc check_effective_target_whole_vector_shift { } {
6300 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6301 || [istarget ia64-*-*]
6302 || [istarget aarch64*-*-*]
6303 || [istarget powerpc64*-*-*]
6304 || ([is-effective-target arm_neon]
6305 && [check_effective_target_arm_little_endian])
6306 || ([istarget mips*-*-*]
6307 && [et-is-effective-target mips_loongson_mmi])
6308 || ([istarget s390*-*-*]
6309 && [check_effective_target_s390_vx])
6310 || [istarget amdgcn-*-*] } {
6316 verbose "check_effective_target_vect_long: returning $answer" 2
6320 # Return 1 if the target supports vector bswap operations.
6322 proc check_effective_target_vect_bswap { } {
6323 return [check_cached_effective_target_indexed vect_bswap {
6324 expr { [istarget aarch64*-*-*]
6325 || [is-effective-target arm_neon]
6326 || [istarget amdgcn-*-*] }}]
6329 # Return 1 if the target supports comparison of bool vectors for at
6330 # least one vector length.
6332 proc check_effective_target_vect_bool_cmp { } {
6333 return [check_cached_effective_target_indexed vect_bool_cmp {
6334 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
6335 || [istarget aarch64*-*-*]
6336 || [is-effective-target arm_neon] }}]
6339 # Return 1 if the target supports addition of char vectors for at least
6340 # one vector length.
6342 proc check_effective_target_vect_char_add { } {
6343 return [check_cached_effective_target_indexed vect_char_add {
6345 [istarget i?86-*-*] || [istarget x86_64-*-*]
6346 || ([istarget powerpc*-*-*]
6347 && ![istarget powerpc-*-linux*paired*])
6348 || [istarget amdgcn-*-*]
6349 || [istarget ia64-*-*]
6350 || [istarget aarch64*-*-*]
6351 || [is-effective-target arm_neon]
6352 || ([istarget mips*-*-*]
6353 && ([et-is-effective-target mips_loongson_mmi]
6354 || [et-is-effective-target mips_msa]))
6355 || ([istarget s390*-*-*]
6356 && [check_effective_target_s390_vx])
6360 # Return 1 if the target supports hardware vector shift operation for char.
6362 proc check_effective_target_vect_shift_char { } {
6363 return [check_cached_effective_target_indexed vect_shift_char {
6364 expr { ([istarget powerpc*-*-*]
6365 && ![istarget powerpc-*-linux*paired*])
6366 || [is-effective-target arm_neon]
6367 || ([istarget mips*-*-*]
6368 && [et-is-effective-target mips_msa])
6369 || ([istarget s390*-*-*]
6370 && [check_effective_target_s390_vx])
6371 || [istarget amdgcn-*-*] }}]
6374 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
6376 # This can change for different subtargets so do not cache the result.
6378 proc check_effective_target_vect_long { } {
6379 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6380 || (([istarget powerpc*-*-*]
6381 && ![istarget powerpc-*-linux*paired*])
6382 && [check_effective_target_ilp32])
6383 || [is-effective-target arm_neon]
6384 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
6385 || [istarget aarch64*-*-*]
6386 || ([istarget mips*-*-*]
6387 && [et-is-effective-target mips_msa])
6388 || ([istarget s390*-*-*]
6389 && [check_effective_target_s390_vx])
6390 || [istarget amdgcn-*-*] } {
6396 verbose "check_effective_target_vect_long: returning $answer" 2
6400 # Return 1 if the target supports hardware vectors of float when
6401 # -funsafe-math-optimizations is enabled, 0 otherwise.
6403 # This won't change for different subtargets so cache the result.
6405 proc check_effective_target_vect_float { } {
6406 return [check_cached_effective_target_indexed vect_float {
6407 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
6408 || [istarget powerpc*-*-*]
6409 || [istarget mips-sde-elf]
6410 || [istarget mipsisa64*-*-*]
6411 || [istarget ia64-*-*]
6412 || [istarget aarch64*-*-*]
6413 || ([istarget mips*-*-*]
6414 && [et-is-effective-target mips_msa])
6415 || [is-effective-target arm_neon]
6416 || ([istarget s390*-*-*]
6417 && [check_effective_target_s390_vxe])
6418 || [istarget amdgcn-*-*] }}]
6421 # Return 1 if the target supports hardware vectors of float without
6422 # -funsafe-math-optimizations being enabled, 0 otherwise.
6424 proc check_effective_target_vect_float_strict { } {
6425 return [expr { [check_effective_target_vect_float]
6426 && ![istarget arm*-*-*] }]
6429 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
6431 # This won't change for different subtargets so cache the result.
6433 proc check_effective_target_vect_double { } {
6434 return [check_cached_effective_target_indexed vect_double {
6435 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6436 && [check_no_compiler_messages vect_double assembly {
6437 #ifdef __tune_atom__
6438 # error No double vectorizer support.
6441 || [istarget aarch64*-*-*]
6442 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
6443 || ([istarget mips*-*-*]
6444 && [et-is-effective-target mips_msa])
6445 || ([istarget s390*-*-*]
6446 && [check_effective_target_s390_vx])
6447 || [istarget amdgcn-*-*]} }]
6450 # Return 1 if the target supports conditional addition, subtraction,
6451 # multiplication, division, minimum and maximum on vectors of double,
6452 # via the cond_ optabs. Return 0 otherwise.
6454 proc check_effective_target_vect_double_cond_arith { } {
6455 return [check_effective_target_aarch64_sve]
6458 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
6460 # This won't change for different subtargets so cache the result.
6462 proc check_effective_target_vect_long_long { } {
6463 return [check_cached_effective_target_indexed vect_long_long {
6464 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
6465 || ([istarget mips*-*-*]
6466 && [et-is-effective-target mips_msa])
6467 || ([istarget s390*-*-*]
6468 && [check_effective_target_s390_vx]) }}]
6472 # Return 1 if the target plus current options does not support a vector
6473 # max instruction on "int", 0 otherwise.
6475 # This won't change for different subtargets so cache the result.
6477 proc check_effective_target_vect_no_int_min_max { } {
6478 return [check_cached_effective_target_indexed vect_no_int_min_max {
6479 expr { [istarget sparc*-*-*]
6480 || [istarget alpha*-*-*]
6481 || ([istarget mips*-*-*]
6482 && [et-is-effective-target mips_loongson_mmi]) }}]
6485 # Return 1 if the target plus current options does not support a vector
6486 # add instruction on "int", 0 otherwise.
6488 # This won't change for different subtargets so cache the result.
6490 proc check_effective_target_vect_no_int_add { } {
6491 # Alpha only supports vector add on V8QI and V4HI.
6492 return [check_cached_effective_target_indexed vect_no_int_add {
6493 expr { [istarget alpha*-*-*] }}]
6496 # Return 1 if the target plus current options does not support vector
6497 # bitwise instructions, 0 otherwise.
6499 # This won't change for different subtargets so cache the result.
6501 proc check_effective_target_vect_no_bitwise { } {
6502 return [check_cached_effective_target_indexed vect_no_bitwise { return 0 }]
6505 # Return 1 if the target plus current options supports vector permutation,
6508 # This won't change for different subtargets so cache the result.
6510 proc check_effective_target_vect_perm { } {
6511 return [check_cached_effective_target_indexed vect_perm {
6512 expr { [is-effective-target arm_neon]
6513 || [istarget aarch64*-*-*]
6514 || [istarget powerpc*-*-*]
6515 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6516 || ([istarget mips*-*-*]
6517 && ([et-is-effective-target mpaired_single]
6518 || [et-is-effective-target mips_msa]))
6519 || ([istarget s390*-*-*]
6520 && [check_effective_target_s390_vx])
6521 || [istarget amdgcn-*-*] }}]
6524 # Return 1 if, for some VF:
6526 # - the target's default vector size is VF * ELEMENT_BITS bits
6528 # - it is possible to implement the equivalent of:
6530 # int<ELEMENT_BITS>_t s1[COUNT][COUNT * VF], s2[COUNT * VF];
6531 # for (int i = 0; i < COUNT; ++i)
6532 # for (int j = 0; j < COUNT * VF; ++j)
6533 # s1[i][j] = s2[j - j % COUNT + i]
6535 # using only a single 2-vector permute for each vector in s1.
6537 # E.g. for COUNT == 3 and vector length 4, the two arrays would be:
6539 # s2 | a0 a1 a2 a3 | b0 b1 b2 b3 | c0 c1 c2 c3
6540 # ------+-------------+-------------+------------
6541 # s1[0] | a0 a0 a0 a3 | a3 a3 b2 b2 | b2 c1 c1 c1
6542 # s1[1] | a1 a1 a1 b0 | b0 b0 b3 b3 | b3 c2 c2 c2
6543 # s1[2] | a2 a2 a2 b1 | b1 b1 c0 c0 | c0 c3 c3 c3
6545 # Each s1 permute requires only two of a, b and c.
6547 # The distance between the start of vector n in s1[0] and the start
6548 # of vector n in s2 is:
6550 # A = (n * VF) % COUNT
6552 # The corresponding value for the end of vector n is:
6554 # B = (n * VF + VF - 1) % COUNT
6556 # Subtracting i from each value gives the corresponding difference
6557 # for s1[i]. The condition being tested by this function is false
6558 # iff A - i > 0 and B - i < 0 for some i and n, such that the first
6559 # element for s1[i] comes from vector n - 1 of s2 and the last element
6560 # comes from vector n + 1 of s2. The condition is therefore true iff
6561 # A <= B for all n. This is turn means the condition is true iff:
6563 # (n * VF) % COUNT + (VF - 1) % COUNT < COUNT
6565 # for all n. COUNT - (n * VF) % COUNT is bounded by gcd (VF, COUNT),
6566 # and will be that value for at least one n in [0, COUNT), so we want:
6568 # (VF - 1) % COUNT < gcd (VF, COUNT)
6570 proc vect_perm_supported { count element_bits } {
6571 set vector_bits [lindex [available_vector_sizes] 0]
6572 # The number of vectors has to be a power of 2 when permuting
6573 # variable-length vectors.
6574 if { $vector_bits <= 0 && ($count & -$count) != $count } {
6577 set vf [expr { $vector_bits / $element_bits }]
6579 # Compute gcd (VF, COUNT).
6582 while { $temp1 > 0 } {
6583 set temp2 [expr { $gcd % $temp1 }]
6587 return [expr { ($vf - 1) % $count < $gcd }]
6590 # Return 1 if the target supports SLP permutation of 3 vectors when each
6591 # element has 32 bits.
6593 proc check_effective_target_vect_perm3_int { } {
6594 return [expr { [check_effective_target_vect_perm]
6595 && [vect_perm_supported 3 32] }]
6598 # Return 1 if the target plus current options supports vector permutation
6599 # on byte-sized elements, 0 otherwise.
6601 # This won't change for different subtargets so cache the result.
6603 proc check_effective_target_vect_perm_byte { } {
6604 return [check_cached_effective_target_indexed vect_perm_byte {
6605 expr { ([is-effective-target arm_neon]
6606 && [is-effective-target arm_little_endian])
6607 || ([istarget aarch64*-*-*]
6608 && [is-effective-target aarch64_little_endian])
6609 || [istarget powerpc*-*-*]
6610 || ([istarget mips-*.*]
6611 && [et-is-effective-target mips_msa])
6612 || ([istarget s390*-*-*]
6613 && [check_effective_target_s390_vx])
6614 || [istarget amdgcn-*-*] }}]
6617 # Return 1 if the target supports SLP permutation of 3 vectors when each
6618 # element has 8 bits.
6620 proc check_effective_target_vect_perm3_byte { } {
6621 return [expr { [check_effective_target_vect_perm_byte]
6622 && [vect_perm_supported 3 8] }]
6625 # Return 1 if the target plus current options supports vector permutation
6626 # on short-sized elements, 0 otherwise.
6628 # This won't change for different subtargets so cache the result.
6630 proc check_effective_target_vect_perm_short { } {
6631 return [check_cached_effective_target_indexed vect_perm_short {
6632 expr { ([is-effective-target arm_neon]
6633 && [is-effective-target arm_little_endian])
6634 || ([istarget aarch64*-*-*]
6635 && [is-effective-target aarch64_little_endian])
6636 || [istarget powerpc*-*-*]
6637 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
6638 && [check_ssse3_available])
6639 || ([istarget mips*-*-*]
6640 && [et-is-effective-target mips_msa])
6641 || ([istarget s390*-*-*]
6642 && [check_effective_target_s390_vx])
6643 || [istarget amdgcn-*-*] }}]
6646 # Return 1 if the target supports SLP permutation of 3 vectors when each
6647 # element has 16 bits.
6649 proc check_effective_target_vect_perm3_short { } {
6650 return [expr { [check_effective_target_vect_perm_short]
6651 && [vect_perm_supported 3 16] }]
6654 # Return 1 if the target plus current options supports folding of
6655 # copysign into XORSIGN.
6657 # This won't change for different subtargets so cache the result.
6659 proc check_effective_target_xorsign { } {
6660 return [check_cached_effective_target_indexed xorsign {
6661 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
6662 || [istarget aarch64*-*-*] || [istarget arm*-*-*] }}]
6665 # Return 1 if the target plus current options supports a vector
6666 # widening summation of *short* args into *int* result, 0 otherwise.
6668 # This won't change for different subtargets so cache the result.
6670 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
6671 return [check_cached_effective_target_indexed vect_widen_sum_hi_to_si_pattern {
6672 expr { [istarget powerpc*-*-*]
6673 || ([istarget aarch64*-*-*]
6674 && ![check_effective_target_aarch64_sve])
6675 || [is-effective-target arm_neon]
6676 || [istarget ia64-*-*] }}]
6679 # Return 1 if the target plus current options supports a vector
6680 # widening summation of *short* args into *int* result, 0 otherwise.
6681 # A target can also support this widening summation if it can support
6682 # promotion (unpacking) from shorts to ints.
6684 # This won't change for different subtargets so cache the result.
6686 proc check_effective_target_vect_widen_sum_hi_to_si { } {
6687 return [check_cached_effective_target_indexed vect_widen_sum_hi_to_si {
6688 expr { [check_effective_target_vect_unpack]
6689 || [istarget powerpc*-*-*]
6690 || [istarget ia64-*-*] }}]
6693 # Return 1 if the target plus current options supports a vector
6694 # widening summation of *char* args into *short* result, 0 otherwise.
6695 # A target can also support this widening summation if it can support
6696 # promotion (unpacking) from chars to shorts.
6698 # This won't change for different subtargets so cache the result.
6700 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
6701 return [check_cached_effective_target_indexed vect_widen_sum_qi_to_hi {
6702 expr { [check_effective_target_vect_unpack]
6703 || [is-effective-target arm_neon]
6704 || [istarget ia64-*-*] }}]
6707 # Return 1 if the target plus current options supports a vector
6708 # widening summation of *char* args into *int* result, 0 otherwise.
6710 # This won't change for different subtargets so cache the result.
6712 proc check_effective_target_vect_widen_sum_qi_to_si { } {
6713 return [check_cached_effective_target_indexed vect_widen_sum_qi_to_si {
6714 expr { [istarget powerpc*-*-*] }}]
6717 # Return 1 if the target plus current options supports a vector
6718 # widening multiplication of *char* args into *short* result, 0 otherwise.
6719 # A target can also support this widening multplication if it can support
6720 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
6721 # multiplication of shorts).
6723 # This won't change for different subtargets so cache the result.
6726 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
6727 return [check_cached_effective_target_indexed vect_widen_mult_qi_to_hi {
6728 expr { ([check_effective_target_vect_unpack]
6729 && [check_effective_target_vect_short_mult])
6730 || ([istarget powerpc*-*-*]
6731 || ([istarget aarch64*-*-*]
6732 && ![check_effective_target_aarch64_sve])
6733 || [is-effective-target arm_neon]
6734 || ([istarget s390*-*-*]
6735 && [check_effective_target_s390_vx]))
6736 || [istarget amdgcn-*-*] }}]
6739 # Return 1 if the target plus current options supports a vector
6740 # widening multiplication of *short* args into *int* result, 0 otherwise.
6741 # A target can also support this widening multplication if it can support
6742 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
6743 # multiplication of ints).
6745 # This won't change for different subtargets so cache the result.
6748 proc check_effective_target_vect_widen_mult_hi_to_si { } {
6749 return [check_cached_effective_target_indexed vect_widen_mult_hi_to_si {
6750 expr { ([check_effective_target_vect_unpack]
6751 && [check_effective_target_vect_int_mult])
6752 || ([istarget powerpc*-*-*]
6753 || [istarget ia64-*-*]
6754 || ([istarget aarch64*-*-*]
6755 && ![check_effective_target_aarch64_sve])
6756 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6757 || [is-effective-target arm_neon]
6758 || ([istarget s390*-*-*]
6759 && [check_effective_target_s390_vx]))
6760 || [istarget amdgcn-*-*] }}]
6763 # Return 1 if the target plus current options supports a vector
6764 # widening multiplication of *char* args into *short* result, 0 otherwise.
6766 # This won't change for different subtargets so cache the result.
6768 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
6769 return [check_cached_effective_target_indexed vect_widen_mult_qi_to_hi_pattern {
6770 expr { [istarget powerpc*-*-*]
6771 || ([is-effective-target arm_neon]
6772 && [check_effective_target_arm_little_endian])
6773 || ([istarget s390*-*-*]
6774 && [check_effective_target_s390_vx])
6775 || [istarget amdgcn-*-*] }}]
6778 # Return 1 if the target plus current options supports a vector
6779 # widening multiplication of *short* args into *int* result, 0 otherwise.
6781 # This won't change for different subtargets so cache the result.
6783 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
6784 return [check_cached_effective_target_indexed vect_widen_mult_hi_to_si_pattern {
6785 expr { [istarget powerpc*-*-*]
6786 || [istarget ia64-*-*]
6787 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6788 || ([is-effective-target arm_neon]
6789 && [check_effective_target_arm_little_endian])
6790 || ([istarget s390*-*-*]
6791 && [check_effective_target_s390_vx])
6792 || [istarget amdgcn-*-*] }}]
6795 # Return 1 if the target plus current options supports a vector
6796 # widening multiplication of *int* args into *long* result, 0 otherwise.
6798 # This won't change for different subtargets so cache the result.
6800 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
6801 return [check_cached_effective_target_indexed vect_widen_mult_si_to_di_pattern {
6802 expr { [istarget ia64-*-*]
6803 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6804 || ([istarget s390*-*-*]
6805 && [check_effective_target_s390_vx]) }}]
6808 # Return 1 if the target plus current options supports a vector
6809 # widening shift, 0 otherwise.
6811 # This won't change for different subtargets so cache the result.
6813 proc check_effective_target_vect_widen_shift { } {
6814 return [check_cached_effective_target_indexed vect_widen_shift {
6815 expr { [is-effective-target arm_neon] }}]
6818 # Return 1 if the target plus current options supports a vector
6819 # dot-product of signed chars, 0 otherwise.
6821 # This won't change for different subtargets so cache the result.
6823 proc check_effective_target_vect_sdot_qi { } {
6824 return [check_cached_effective_target_indexed vect_sdot_qi {
6825 expr { [istarget ia64-*-*]
6826 || [istarget aarch64*-*-*]
6827 || [istarget arm*-*-*]
6828 || ([istarget mips*-*-*]
6829 && [et-is-effective-target mips_msa]) }}]
6832 # Return 1 if the target plus current options supports a vector
6833 # dot-product of unsigned chars, 0 otherwise.
6835 # This won't change for different subtargets so cache the result.
6837 proc check_effective_target_vect_udot_qi { } {
6838 return [check_cached_effective_target_indexed vect_udot_qi {
6839 expr { [istarget powerpc*-*-*]
6840 || [istarget aarch64*-*-*]
6841 || [istarget arm*-*-*]
6842 || [istarget ia64-*-*]
6843 || ([istarget mips*-*-*]
6844 && [et-is-effective-target mips_msa]) }}]
6847 # Return 1 if the target plus current options supports a vector
6848 # dot-product of signed shorts, 0 otherwise.
6850 # This won't change for different subtargets so cache the result.
6852 proc check_effective_target_vect_sdot_hi { } {
6853 return [check_cached_effective_target_indexed vect_sdot_hi {
6854 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6855 || [istarget ia64-*-*]
6856 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6857 || ([istarget mips*-*-*]
6858 && [et-is-effective-target mips_msa]) }}]
6861 # Return 1 if the target plus current options supports a vector
6862 # dot-product of unsigned shorts, 0 otherwise.
6864 # This won't change for different subtargets so cache the result.
6866 proc check_effective_target_vect_udot_hi { } {
6867 return [check_cached_effective_target_indexed vect_udot_hi {
6868 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6869 || ([istarget mips*-*-*]
6870 && [et-is-effective-target mips_msa]) }}]
6873 # Return 1 if the target plus current options supports a vector
6874 # sad operation of unsigned chars, 0 otherwise.
6876 # This won't change for different subtargets so cache the result.
6878 proc check_effective_target_vect_usad_char { } {
6879 return [check_cached_effective_target_indexed vect_usad_char {
6880 expr { [istarget i?86-*-*]
6881 || [istarget x86_64-*-*]
6882 || ([istarget aarch64*-*-*]
6883 && ![check_effective_target_aarch64_sve])
6884 || ([istarget powerpc*-*-*]
6885 && [check_p9vector_hw_available])}}]
6888 # Return 1 if the target plus current options supports both signed
6889 # and unsigned average operations on vectors of bytes.
6891 proc check_effective_target_vect_avg_qi {} {
6892 return [expr { [istarget aarch64*-*-*]
6893 && ![check_effective_target_aarch64_sve1_only] }]
6896 # Return 1 if the target plus current options supports both signed
6897 # and unsigned multiply-high-with-round-and-scale operations
6898 # on vectors of half-words.
6900 proc check_effective_target_vect_mulhrs_hi {} {
6901 return [expr { [istarget aarch64*-*-*]
6902 && [check_effective_target_aarch64_sve2] }]
6905 # Return 1 if the target plus current options supports signed division
6906 # by power-of-2 operations on vectors of 4-byte integers.
6908 proc check_effective_target_vect_sdiv_pow2_si {} {
6909 return [expr { [istarget aarch64*-*-*]
6910 && [check_effective_target_aarch64_sve] }]
6913 # Return 1 if the target plus current options supports a vector
6914 # demotion (packing) of shorts (to chars) and ints (to shorts)
6915 # using modulo arithmetic, 0 otherwise.
6917 # This won't change for different subtargets so cache the result.
6919 proc check_effective_target_vect_pack_trunc { } {
6920 return [check_cached_effective_target_indexed vect_pack_trunc {
6921 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6922 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6923 || [istarget aarch64*-*-*]
6924 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
6925 && [check_effective_target_arm_little_endian])
6926 || ([istarget mips*-*-*]
6927 && [et-is-effective-target mips_msa])
6928 || ([istarget s390*-*-*]
6929 && [check_effective_target_s390_vx])
6930 || [istarget amdgcn*-*-*] }}]
6933 # Return 1 if the target plus current options supports a vector
6934 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
6936 # This won't change for different subtargets so cache the result.
6938 proc check_effective_target_vect_unpack { } {
6939 return [check_cached_effective_target_indexed vect_unpack {
6940 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
6941 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6942 || [istarget ia64-*-*]
6943 || [istarget aarch64*-*-*]
6944 || ([istarget mips*-*-*]
6945 && [et-is-effective-target mips_msa])
6946 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
6947 && [check_effective_target_arm_little_endian])
6948 || ([istarget s390*-*-*]
6949 && [check_effective_target_s390_vx])
6950 || [istarget amdgcn*-*-*] }}]
6953 # Return 1 if the target plus current options does not guarantee
6954 # that its STACK_BOUNDARY is >= the reguired vector alignment.
6956 # This won't change for different subtargets so cache the result.
6958 proc check_effective_target_unaligned_stack { } {
6959 return [check_cached_effective_target_indexed unaligned_stack { expr 0 }]
6962 # Return 1 if the target plus current options does not support a vector
6963 # alignment mechanism, 0 otherwise.
6965 # This won't change for different subtargets so cache the result.
6967 proc check_effective_target_vect_no_align { } {
6968 return [check_cached_effective_target_indexed vect_no_align {
6969 expr { [istarget mipsisa64*-*-*]
6970 || [istarget mips-sde-elf]
6971 || [istarget sparc*-*-*]
6972 || [istarget ia64-*-*]
6973 || [check_effective_target_arm_vect_no_misalign]
6974 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
6975 || ([istarget mips*-*-*]
6976 && [et-is-effective-target mips_loongson_mmi]) }}]
6979 # Return 1 if the target supports a vector misalign access, 0 otherwise.
6981 # This won't change for different subtargets so cache the result.
6983 proc check_effective_target_vect_hw_misalign { } {
6984 return [check_cached_effective_target_indexed vect_hw_misalign {
6985 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6986 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
6987 || [istarget aarch64*-*-*]
6988 || ([istarget mips*-*-*] && [et-is-effective-target mips_msa])
6989 || ([istarget s390*-*-*]
6990 && [check_effective_target_s390_vx]) } {
6993 if { [istarget arm*-*-*]
6994 && ![check_effective_target_arm_vect_no_misalign] } {
7002 # Return 1 if arrays are aligned to the vector alignment
7003 # boundary, 0 otherwise.
7005 proc check_effective_target_vect_aligned_arrays { } {
7006 set et_vect_aligned_arrays 0
7007 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
7008 && !([is-effective-target ia32]
7009 || ([check_avx_available] && ![check_prefer_avx128]))) } {
7010 set et_vect_aligned_arrays 1
7013 verbose "check_effective_target_vect_aligned_arrays:\
7014 returning $et_vect_aligned_arrays" 2
7015 return $et_vect_aligned_arrays
7018 # Return 1 if types of size 32 bit or less are naturally aligned
7019 # (aligned to their type-size), 0 otherwise.
7021 # This won't change for different subtargets so cache the result.
7023 proc check_effective_target_natural_alignment_32 { } {
7024 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
7025 # FIXME: m68k has -malign-int
7026 return [check_cached_effective_target_indexed natural_alignment_32 {
7027 if { ([istarget *-*-darwin*] && [is-effective-target lp64])
7028 || [istarget avr-*-*]
7029 || [istarget m68k-*-linux*]
7030 || [istarget pru-*-*]
7031 || [istarget stormy16-*-*]
7032 || [istarget rl78-*-*]
7033 || [istarget pdp11-*-*]
7034 || [istarget msp430-*-*]
7035 || [istarget m32c-*-*]
7036 || [istarget cris-*-*] } {
7044 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
7045 # type-size), 0 otherwise.
7047 # This won't change for different subtargets so cache the result.
7049 proc check_effective_target_natural_alignment_64 { } {
7050 return [check_cached_effective_target_indexed natural_alignment_64 {
7051 expr { [is-effective-target natural_alignment_32]
7052 && [is-effective-target lp64] && ![istarget *-*-darwin*] }
7056 # Return 1 if all vector types are naturally aligned (aligned to their
7057 # type-size), 0 otherwise.
7059 proc check_effective_target_vect_natural_alignment { } {
7060 set et_vect_natural_alignment 1
7061 if { [check_effective_target_arm_eabi]
7062 || [istarget nvptx-*-*]
7063 || [istarget s390*-*-*]
7064 || [istarget amdgcn-*-*] } {
7065 set et_vect_natural_alignment 0
7067 verbose "check_effective_target_vect_natural_alignment:\
7068 returning $et_vect_natural_alignment" 2
7069 return $et_vect_natural_alignment
7072 # Return true if the target supports the check_raw_ptrs and check_war_ptrs
7073 # optabs on vectors.
7075 proc check_effective_target_vect_check_ptrs { } {
7076 return [check_effective_target_aarch64_sve2]
7079 # Return true if fully-masked loops are supported.
7081 proc check_effective_target_vect_fully_masked { } {
7082 return [expr { [check_effective_target_aarch64_sve]
7083 || [istarget amdgcn*-*-*] }]
7086 # Return 1 if the target doesn't prefer any alignment beyond element
7087 # alignment during vectorization.
7089 proc check_effective_target_vect_element_align_preferred { } {
7090 return [expr { [check_effective_target_aarch64_sve]
7091 && [check_effective_target_vect_variable_length] }]
7094 # Return 1 if we can align stack data to the preferred vector alignment.
7096 proc check_effective_target_vect_align_stack_vars { } {
7097 if { [check_effective_target_aarch64_sve] } {
7098 return [check_effective_target_vect_variable_length]
7103 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
7105 proc check_effective_target_vector_alignment_reachable { } {
7106 set et_vector_alignment_reachable 0
7107 if { [check_effective_target_vect_aligned_arrays]
7108 || [check_effective_target_natural_alignment_32] } {
7109 set et_vector_alignment_reachable 1
7111 verbose "check_effective_target_vector_alignment_reachable:\
7112 returning $et_vector_alignment_reachable" 2
7113 return $et_vector_alignment_reachable
7116 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
7118 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
7119 set et_vector_alignment_reachable_for_64bit 0
7120 if { [check_effective_target_vect_aligned_arrays]
7121 || [check_effective_target_natural_alignment_64] } {
7122 set et_vector_alignment_reachable_for_64bit 1
7124 verbose "check_effective_target_vector_alignment_reachable_for_64bit:\
7125 returning $et_vector_alignment_reachable_for_64bit" 2
7126 return $et_vector_alignment_reachable_for_64bit
7129 # Return 1 if the target only requires element alignment for vector accesses
7131 proc check_effective_target_vect_element_align { } {
7132 return [check_cached_effective_target_indexed vect_element_align {
7133 expr { ([istarget arm*-*-*]
7134 && ![check_effective_target_arm_vect_no_misalign])
7135 || [check_effective_target_vect_hw_misalign]
7136 || [istarget amdgcn-*-*] }}]
7139 # Return 1 if we expect to see unaligned accesses in at least some
7142 proc check_effective_target_vect_unaligned_possible { } {
7143 return [expr { ![check_effective_target_vect_element_align_preferred]
7144 && (![check_effective_target_vect_no_align]
7145 || [check_effective_target_vect_hw_misalign]) }]
7148 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
7150 proc check_effective_target_vect_load_lanes { } {
7151 # We don't support load_lanes correctly on big-endian arm.
7152 return [check_cached_effective_target vect_load_lanes {
7153 expr { ([check_effective_target_arm_little_endian]
7154 && [check_effective_target_arm_neon_ok])
7155 || [istarget aarch64*-*-*] }}]
7158 # Return 1 if the target supports vector masked stores.
7160 proc check_effective_target_vect_masked_store { } {
7161 return [expr { [check_effective_target_aarch64_sve]
7162 || [istarget amdgcn*-*-*] }]
7165 # Return 1 if the target supports vector scatter stores.
7167 proc check_effective_target_vect_scatter_store { } {
7168 return [expr { [check_effective_target_aarch64_sve]
7169 || [istarget amdgcn*-*-*] }]
7172 # Return 1 if the target supports vector conditional operations, 0 otherwise.
7174 proc check_effective_target_vect_condition { } {
7175 return [check_cached_effective_target_indexed vect_condition {
7176 expr { [istarget aarch64*-*-*]
7177 || [istarget powerpc*-*-*]
7178 || [istarget ia64-*-*]
7179 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7180 || ([istarget mips*-*-*]
7181 && [et-is-effective-target mips_msa])
7182 || ([istarget arm*-*-*]
7183 && [check_effective_target_arm_neon_ok])
7184 || ([istarget s390*-*-*]
7185 && [check_effective_target_s390_vx])
7186 || [istarget amdgcn-*-*] }}]
7189 # Return 1 if the target supports vector conditional operations where
7190 # the comparison has different type from the lhs, 0 otherwise.
7192 proc check_effective_target_vect_cond_mixed { } {
7193 return [check_cached_effective_target_indexed vect_cond_mixed {
7194 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
7195 || [istarget aarch64*-*-*]
7196 || [istarget powerpc*-*-*]
7197 || ([istarget mips*-*-*]
7198 && [et-is-effective-target mips_msa])
7199 || ([istarget s390*-*-*]
7200 && [check_effective_target_s390_vx])
7201 || [istarget amdgcn-*-*] }}]
7204 # Return 1 if the target supports vector char multiplication, 0 otherwise.
7206 proc check_effective_target_vect_char_mult { } {
7207 return [check_cached_effective_target_indexed vect_char_mult {
7208 expr { [istarget aarch64*-*-*]
7209 || [istarget ia64-*-*]
7210 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7211 || [check_effective_target_arm32]
7212 || [check_effective_target_powerpc_altivec]
7213 || ([istarget mips*-*-*]
7214 && [et-is-effective-target mips_msa])
7215 || ([istarget s390*-*-*]
7216 && [check_effective_target_s390_vx])
7217 || [istarget amdgcn-*-*] }}]
7220 # Return 1 if the target supports vector short multiplication, 0 otherwise.
7222 proc check_effective_target_vect_short_mult { } {
7223 return [check_cached_effective_target_indexed vect_short_mult {
7224 expr { [istarget ia64-*-*]
7225 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7226 || [istarget powerpc*-*-*]
7227 || [istarget aarch64*-*-*]
7228 || [check_effective_target_arm32]
7229 || ([istarget mips*-*-*]
7230 && ([et-is-effective-target mips_msa]
7231 || [et-is-effective-target mips_loongson_mmi]))
7232 || ([istarget s390*-*-*]
7233 && [check_effective_target_s390_vx])
7234 || [istarget amdgcn-*-*] }}]
7237 # Return 1 if the target supports vector int multiplication, 0 otherwise.
7239 proc check_effective_target_vect_int_mult { } {
7240 return [check_cached_effective_target_indexed vect_int_mult {
7241 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
7242 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7243 || [istarget ia64-*-*]
7244 || [istarget aarch64*-*-*]
7245 || ([istarget mips*-*-*]
7246 && [et-is-effective-target mips_msa])
7247 || [check_effective_target_arm32]
7248 || ([istarget s390*-*-*]
7249 && [check_effective_target_s390_vx])
7250 || [istarget amdgcn-*-*] }}]
7253 # Return 1 if the target supports 64 bit hardware vector
7254 # multiplication of long operands with a long result, 0 otherwise.
7256 # This can change for different subtargets so do not cache the result.
7258 proc check_effective_target_vect_long_mult { } {
7259 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
7260 || (([istarget powerpc*-*-*]
7261 && ![istarget powerpc-*-linux*paired*])
7262 && [check_effective_target_ilp32])
7263 || [is-effective-target arm_neon]
7264 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
7265 || [istarget aarch64*-*-*]
7266 || ([istarget mips*-*-*]
7267 && [et-is-effective-target mips_msa]) } {
7273 verbose "check_effective_target_vect_long_mult: returning $answer" 2
7277 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
7279 proc check_effective_target_vect_extract_even_odd { } {
7280 return [check_cached_effective_target_indexed extract_even_odd {
7281 expr { [istarget aarch64*-*-*]
7282 || [istarget powerpc*-*-*]
7283 || [is-effective-target arm_neon]
7284 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7285 || [istarget ia64-*-*]
7286 || ([istarget mips*-*-*]
7287 && ([et-is-effective-target mips_msa]
7288 || [et-is-effective-target mpaired_single]))
7289 || ([istarget s390*-*-*]
7290 && [check_effective_target_s390_vx]) }}]
7293 # Return 1 if the target supports vector interleaving, 0 otherwise.
7295 proc check_effective_target_vect_interleave { } {
7296 return [check_cached_effective_target_indexed vect_interleave {
7297 expr { [istarget aarch64*-*-*]
7298 || [istarget powerpc*-*-*]
7299 || [is-effective-target arm_neon]
7300 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7301 || [istarget ia64-*-*]
7302 || ([istarget mips*-*-*]
7303 && ([et-is-effective-target mpaired_single]
7304 || [et-is-effective-target mips_msa]))
7305 || ([istarget s390*-*-*]
7306 && [check_effective_target_s390_vx]) }}]
7309 foreach N {2 3 4 8} {
7310 eval [string map [list N $N] {
7311 # Return 1 if the target supports 2-vector interleaving
7312 proc check_effective_target_vect_stridedN { } {
7313 return [check_cached_effective_target_indexed vect_stridedN {
7315 && [check_effective_target_vect_interleave]
7316 && [check_effective_target_vect_extract_even_odd] } {
7319 if { ([istarget arm*-*-*]
7320 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
7323 if [check_effective_target_vect_fully_masked] {
7332 # Return the list of vector sizes (in bits) that each target supports.
7333 # A vector length of "0" indicates variable-length vectors.
7335 proc available_vector_sizes { } {
7337 if { [istarget aarch64*-*-*] } {
7338 if { [check_effective_target_aarch64_sve] } {
7339 lappend result [aarch64_sve_bits]
7341 lappend result 128 64
7342 } elseif { [istarget arm*-*-*]
7343 && [check_effective_target_arm_neon_ok] } {
7344 lappend result 128 64
7345 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
7346 if { [check_avx_available] && ![check_prefer_avx128] } {
7350 if { ![is-effective-target ia32] } {
7353 } elseif { [istarget sparc*-*-*] } {
7355 } elseif { [istarget amdgcn*-*-*] } {
7358 # The traditional default asumption.
7364 # Return 1 if the target supports multiple vector sizes
7366 proc check_effective_target_vect_multiple_sizes { } {
7367 return [expr { [llength [available_vector_sizes]] > 1 }]
7370 # Return true if variable-length vectors are supported.
7372 proc check_effective_target_vect_variable_length { } {
7373 return [expr { [lindex [available_vector_sizes] 0] == 0 }]
7376 # Return 1 if the target supports vectors of 64 bits.
7378 proc check_effective_target_vect64 { } {
7379 return [expr { [lsearch -exact [available_vector_sizes] 64] >= 0 }]
7382 # Return 1 if the target supports vector copysignf calls.
7384 proc check_effective_target_vect_call_copysignf { } {
7385 return [check_cached_effective_target_indexed vect_call_copysignf {
7386 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
7387 || [istarget powerpc*-*-*]
7388 || [istarget aarch64*-*-*] }}]
7391 # Return 1 if the target supports hardware square root instructions.
7393 proc check_effective_target_sqrt_insn { } {
7394 return [check_cached_effective_target sqrt_insn {
7395 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
7396 || [istarget powerpc*-*-*]
7397 || [istarget aarch64*-*-*]
7398 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok])
7399 || ([istarget s390*-*-*]
7400 && [check_effective_target_s390_vx])
7401 || [istarget amdgcn-*-*] }}]
7404 # Return any additional options to enable square root intructions.
7406 proc add_options_for_sqrt_insn { flags } {
7407 if { [istarget amdgcn*-*-*] } {
7408 return "$flags -ffast-math"
7410 if { [istarget arm*-*-*] } {
7411 return [add_options_for_arm_vfp "$flags"]
7416 # Return 1 if the target supports vector sqrtf calls.
7418 proc check_effective_target_vect_call_sqrtf { } {
7419 return [check_cached_effective_target_indexed vect_call_sqrtf {
7420 expr { [istarget aarch64*-*-*]
7421 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7422 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
7423 || ([istarget s390*-*-*]
7424 && [check_effective_target_s390_vx]) }}]
7427 # Return 1 if the target supports vector lrint calls.
7429 proc check_effective_target_vect_call_lrint { } {
7430 set et_vect_call_lrint 0
7431 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
7432 && [check_effective_target_ilp32])
7433 || [istarget amdgcn-*-*] } {
7434 set et_vect_call_lrint 1
7437 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
7438 return $et_vect_call_lrint
7441 # Return 1 if the target supports vector btrunc calls.
7443 proc check_effective_target_vect_call_btrunc { } {
7444 return [check_cached_effective_target_indexed vect_call_btrunc {
7445 expr { [istarget aarch64*-*-*]
7446 || [istarget amdgcn-*-*] }}]
7449 # Return 1 if the target supports vector btruncf calls.
7451 proc check_effective_target_vect_call_btruncf { } {
7452 return [check_cached_effective_target_indexed vect_call_btruncf {
7453 expr { [istarget aarch64*-*-*]
7454 || [istarget amdgcn-*-*] }}]
7457 # Return 1 if the target supports vector ceil calls.
7459 proc check_effective_target_vect_call_ceil { } {
7460 return [check_cached_effective_target_indexed vect_call_ceil {
7461 expr { [istarget aarch64*-*-*]
7462 || [istarget amdgcn-*-*] }}]
7465 # Return 1 if the target supports vector ceilf calls.
7467 proc check_effective_target_vect_call_ceilf { } {
7468 return [check_cached_effective_target_indexed vect_call_ceilf {
7469 expr { [istarget aarch64*-*-*] }}]
7472 # Return 1 if the target supports vector floor calls.
7474 proc check_effective_target_vect_call_floor { } {
7475 return [check_cached_effective_target_indexed vect_call_floor {
7476 expr { [istarget aarch64*-*-*] }}]
7479 # Return 1 if the target supports vector floorf calls.
7481 proc check_effective_target_vect_call_floorf { } {
7482 return [check_cached_effective_target_indexed vect_call_floorf {
7483 expr { [istarget aarch64*-*-*]
7484 || [istarget amdgcn-*-*] }}]
7487 # Return 1 if the target supports vector lceil calls.
7489 proc check_effective_target_vect_call_lceil { } {
7490 return [check_cached_effective_target_indexed vect_call_lceil {
7491 expr { [istarget aarch64*-*-*] }}]
7494 # Return 1 if the target supports vector lfloor calls.
7496 proc check_effective_target_vect_call_lfloor { } {
7497 return [check_cached_effective_target_indexed vect_call_lfloor {
7498 expr { [istarget aarch64*-*-*] }}]
7501 # Return 1 if the target supports vector nearbyint calls.
7503 proc check_effective_target_vect_call_nearbyint { } {
7504 return [check_cached_effective_target_indexed vect_call_nearbyint {
7505 expr { [istarget aarch64*-*-*] }}]
7508 # Return 1 if the target supports vector nearbyintf calls.
7510 proc check_effective_target_vect_call_nearbyintf { } {
7511 return [check_cached_effective_target_indexed vect_call_nearbyintf {
7512 expr { [istarget aarch64*-*-*] }}]
7515 # Return 1 if the target supports vector round calls.
7517 proc check_effective_target_vect_call_round { } {
7518 return [check_cached_effective_target_indexed vect_call_round {
7519 expr { [istarget aarch64*-*-*] }}]
7522 # Return 1 if the target supports vector roundf calls.
7524 proc check_effective_target_vect_call_roundf { } {
7525 return [check_cached_effective_target_indexed vect_call_roundf {
7526 expr { [istarget aarch64*-*-*] }}]
7529 # Return 1 if the target supports AND, OR and XOR reduction.
7531 proc check_effective_target_vect_logical_reduc { } {
7532 return [check_effective_target_aarch64_sve]
7535 # Return 1 if the target supports the fold_extract_last optab.
7537 proc check_effective_target_vect_fold_extract_last { } {
7538 return [expr { [check_effective_target_aarch64_sve]
7539 || [istarget amdgcn*-*-*] }]
7542 # Return 1 if the target supports section-anchors
7544 proc check_effective_target_section_anchors { } {
7545 return [check_cached_effective_target section_anchors {
7546 expr { [istarget powerpc*-*-*]
7547 || [istarget arm*-*-*]
7548 || [istarget aarch64*-*-*] }}]
7551 # Return 1 if the target supports atomic operations on "int_128" values.
7553 proc check_effective_target_sync_int_128 { } {
7557 # Return 1 if the target supports atomic operations on "int_128" values
7558 # and can execute them.
7559 # This requires support for both compare-and-swap and true atomic loads.
7561 proc check_effective_target_sync_int_128_runtime { } {
7565 # Return 1 if the target supports atomic operations on "long long".
7567 # Note: 32bit x86 targets require -march=pentium in dg-options.
7568 # Note: 32bit s390 targets require -mzarch in dg-options.
7570 proc check_effective_target_sync_long_long { } {
7571 if { [istarget i?86-*-*] || [istarget x86_64-*-*])
7572 || [istarget aarch64*-*-*]
7573 || [istarget arm*-*-*]
7574 || [istarget alpha*-*-*]
7575 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
7576 || [istarget s390*-*-*] } {
7583 # Return 1 if the target supports popcount on long.
7585 proc check_effective_target_popcountl { } {
7586 return [check_no_messages_and_pattern popcountl "!\\(call" rtl-expand {
7589 return __builtin_popcountl (b);
7594 # Return 1 if the target supports popcount on long long.
7596 proc check_effective_target_popcountll { } {
7597 return [check_no_messages_and_pattern popcountll "!\\(call" rtl-expand {
7598 int foo (long long b)
7600 return __builtin_popcountll (b);
7606 # Return 1 if the target supports popcount on int.
7608 proc check_effective_target_popcount { } {
7609 return [check_no_messages_and_pattern popcount "!\\(call" rtl-expand {
7612 return __builtin_popcount (b);
7617 # Return 1 if the target supports atomic operations on "long long"
7618 # and can execute them.
7620 # Note: 32bit x86 targets require -march=pentium in dg-options.
7622 proc check_effective_target_sync_long_long_runtime { } {
7623 if { (([istarget x86_64-*-*] || [istarget i?86-*-*])
7624 && [check_cached_effective_target sync_long_long_available {
7625 check_runtime_nocache sync_long_long_available {
7629 unsigned int eax, ebx, ecx, edx;
7630 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
7631 return !(edx & bit_CMPXCHG8B);
7636 || [istarget aarch64*-*-*]
7637 || [istarget arm*-*-uclinuxfdpiceabi]
7638 || ([istarget arm*-*-linux-*]
7639 && [check_runtime sync_longlong_runtime {
7645 if (sizeof (long long) != 8)
7648 /* Just check for native;
7649 checking for kernel fallback is tricky. */
7650 asm volatile ("ldrexd r0,r1, [%0]"
7651 : : "r" (&l1) : "r0", "r1");
7655 || [istarget alpha*-*-*]
7656 || ([istarget sparc*-*-*]
7657 && [check_effective_target_lp64]
7658 && [check_effective_target_ultrasparc_hw])
7659 || ([istarget powerpc*-*-*] && [check_effective_target_lp64]) } {
7666 # Return 1 if the target supports byte swap instructions.
7668 proc check_effective_target_bswap { } {
7669 return [check_cached_effective_target bswap {
7670 expr { [istarget aarch64*-*-*]
7671 || [istarget alpha*-*-*]
7672 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7673 || [istarget m68k-*-*]
7674 || [istarget powerpc*-*-*]
7675 || [istarget rs6000-*-*]
7676 || [istarget s390*-*-*]
7677 || ([istarget arm*-*-*]
7678 && [check_no_compiler_messages_nocache arm_v6_or_later object {
7680 #error not armv6 or later
7686 # Return 1 if the target supports atomic operations on "int" and "long".
7688 proc check_effective_target_sync_int_long { } {
7689 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
7690 # load-reserved/store-conditional instructions.
7691 return [check_cached_effective_target sync_int_long {
7692 expr { [istarget ia64-*-*]
7693 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7694 || [istarget aarch64*-*-*]
7695 || [istarget alpha*-*-*]
7696 || [istarget arm*-*-linux-*]
7697 || [istarget arm*-*-uclinuxfdpiceabi]
7698 || ([istarget arm*-*-*]
7699 && [check_effective_target_arm_acq_rel])
7700 || [istarget bfin*-*linux*]
7701 || [istarget hppa*-*linux*]
7702 || [istarget s390*-*-*]
7703 || [istarget powerpc*-*-*]
7704 || [istarget cris-*-*]
7705 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
7706 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
7707 || [check_effective_target_mips_llsc] }}]
7710 # Return 1 if the target supports atomic operations on "char" and "short".
7712 proc check_effective_target_sync_char_short { } {
7713 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
7714 # load-reserved/store-conditional instructions.
7715 return [check_cached_effective_target sync_char_short {
7716 expr { [istarget aarch64*-*-*]
7717 || [istarget ia64-*-*]
7718 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7719 || [istarget alpha*-*-*]
7720 || [istarget arm*-*-linux-*]
7721 || [istarget arm*-*-uclinuxfdpiceabi]
7722 || ([istarget arm*-*-*]
7723 && [check_effective_target_arm_acq_rel])
7724 || [istarget hppa*-*linux*]
7725 || [istarget s390*-*-*]
7726 || [istarget powerpc*-*-*]
7727 || [istarget cris-*-*]
7728 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
7729 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
7730 || [check_effective_target_mips_llsc] }}]
7733 # Return 1 if the target uses a ColdFire FPU.
7735 proc check_effective_target_coldfire_fpu { } {
7736 return [check_no_compiler_messages coldfire_fpu assembly {
7743 # Return true if this is a uClibc target.
7745 proc check_effective_target_uclibc {} {
7746 return [check_no_compiler_messages uclibc object {
7747 #include <features.h>
7748 #if !defined (__UCLIBC__)
7754 # Return true if this is a uclibc target and if the uclibc feature
7755 # described by __$feature__ is not present.
7757 proc check_missing_uclibc_feature {feature} {
7758 return [check_no_compiler_messages $feature object "
7759 #include <features.h>
7760 #if !defined (__UCLIBC) || defined (__${feature}__)
7766 # Return true if this is a Newlib target.
7768 proc check_effective_target_newlib {} {
7769 return [check_no_compiler_messages newlib object {
7774 # Return true if GCC was configured with --enable-newlib-nano-formatted-io
7775 proc check_effective_target_newlib_nano_io { } {
7776 return [check_configured_with "--enable-newlib-nano-formatted-io"]
7779 # Some newlib versions don't provide a frexpl and instead depend
7780 # on frexp to implement long double conversions in their printf-like
7781 # functions. This leads to broken results. Detect such versions here.
7783 proc check_effective_target_newlib_broken_long_double_io {} {
7784 if { [is-effective-target newlib] && ![is-effective-target frexpl] } {
7790 # Return true if this is NOT a Bionic target.
7792 proc check_effective_target_non_bionic {} {
7793 return [check_no_compiler_messages non_bionic object {
7795 #if defined (__BIONIC__)
7801 # Return true if this target has error.h header.
7803 proc check_effective_target_error_h {} {
7804 return [check_no_compiler_messages error_h object {
7809 # Return true if this target has tgmath.h header.
7811 proc check_effective_target_tgmath_h {} {
7812 return [check_no_compiler_messages tgmath_h object {
7817 # Return true if target's libc supports complex functions.
7819 proc check_effective_target_libc_has_complex_functions {} {
7820 return [check_no_compiler_messages libc_has_complex_functions object {
7821 #include <complex.h>
7826 # (a) an error of a few ULP is expected in string to floating-point
7827 # conversion functions; and
7828 # (b) overflow is not always detected correctly by those functions.
7830 proc check_effective_target_lax_strtofp {} {
7831 # By default, assume that all uClibc targets suffer from this.
7832 return [check_effective_target_uclibc]
7835 # Return 1 if this is a target for which wcsftime is a dummy
7836 # function that always returns 0.
7838 proc check_effective_target_dummy_wcsftime {} {
7839 # By default, assume that all uClibc targets suffer from this.
7840 return [check_effective_target_uclibc]
7843 # Return 1 if constructors with initialization priority arguments are
7844 # supposed on this target.
7846 proc check_effective_target_init_priority {} {
7847 return [check_no_compiler_messages init_priority assembly "
7848 void f() __attribute__((constructor (1000)));
7853 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
7854 # This can be used with any check_* proc that takes no argument and
7855 # returns only 1 or 0. It could be used with check_* procs that take
7856 # arguments with keywords that pass particular arguments.
7858 proc is-effective-target { arg } {
7861 if { ![info exists et_index] } {
7862 # Initialize the effective target index that is used in some
7863 # check_effective_target_* procs.
7866 if { [info procs check_effective_target_${arg}] != [list] } {
7867 set selected [check_effective_target_${arg}]
7870 "vmx_hw" { set selected [check_vmx_hw_available] }
7871 "vsx_hw" { set selected [check_vsx_hw_available] }
7872 "p8vector_hw" { set selected [check_p8vector_hw_available] }
7873 "p9vector_hw" { set selected [check_p9vector_hw_available] }
7874 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
7875 "power10_hw" { set selected [check_power10_hw_available] }
7876 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
7877 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
7878 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
7879 "ppc_cpu_supports_hw" { set selected [check_ppc_cpu_supports_hw_available] }
7880 "ppc_mma_hw" { set selected [check_ppc_mma_hw_available] }
7881 "dfp_hw" { set selected [check_dfp_hw_available] }
7882 "htm_hw" { set selected [check_htm_hw_available] }
7883 "named_sections" { set selected [check_named_sections_available] }
7884 "gc_sections" { set selected [check_gc_sections_available] }
7885 "cxa_atexit" { set selected [check_cxa_atexit_available] }
7886 default { error "unknown effective target keyword `$arg'" }
7890 verbose "is-effective-target: $arg $selected" 2
7894 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
7896 proc is-effective-target-keyword { arg } {
7897 if { [info procs check_effective_target_${arg}] != [list] } {
7900 # These have different names for their check_* procs.
7902 "vmx_hw" { return 1 }
7903 "vsx_hw" { return 1 }
7904 "p8vector_hw" { return 1 }
7905 "p9vector_hw" { return 1 }
7906 "p9modulo_hw" { return 1 }
7907 "power10_hw" { return 1 }
7908 "ppc_float128_sw" { return 1 }
7909 "ppc_float128_hw" { return 1 }
7910 "ppc_recip_hw" { return 1 }
7911 "ppc_mma_hw" { return 1 }
7912 "dfp_hw" { return 1 }
7913 "htm_hw" { return 1 }
7914 "named_sections" { return 1 }
7915 "gc_sections" { return 1 }
7916 "cxa_atexit" { return 1 }
7917 default { return 0 }
7922 # Execute tests for all targets in EFFECTIVE_TARGETS list. Set et_index to
7923 # indicate what target is currently being processed. This is for
7924 # the vectorizer tests, e.g. vect_int, to keep track what target supports
7927 proc et-dg-runtest { runtest testcases flags default-extra-flags } {
7928 global dg-do-what-default
7929 global EFFECTIVE_TARGETS
7932 if { [llength $EFFECTIVE_TARGETS] > 0 } {
7933 foreach target $EFFECTIVE_TARGETS {
7934 set target_flags $flags
7935 set dg-do-what-default compile
7936 set et_index [lsearch -exact $EFFECTIVE_TARGETS $target]
7937 if { [info procs add_options_for_${target}] != [list] } {
7938 set target_flags [add_options_for_${target} "$flags"]
7940 if { [info procs check_effective_target_${target}_runtime]
7941 != [list] && [check_effective_target_${target}_runtime] } {
7942 set dg-do-what-default run
7944 $runtest $testcases $target_flags ${default-extra-flags}
7948 $runtest $testcases $flags ${default-extra-flags}
7952 # Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
7953 # et_index, 0 otherwise.
7955 proc et-is-effective-target { target } {
7956 global EFFECTIVE_TARGETS
7959 if { [llength $EFFECTIVE_TARGETS] > $et_index
7960 && [lindex $EFFECTIVE_TARGETS $et_index] == $target } {
7966 # Return 1 if target default to short enums
7968 proc check_effective_target_short_enums { } {
7969 return [check_no_compiler_messages short_enums assembly {
7971 int s[sizeof (enum foo) == 1 ? 1 : -1];
7975 # Return 1 if target supports merging string constants at link time.
7977 proc check_effective_target_string_merging { } {
7978 return [check_no_messages_and_pattern string_merging \
7979 "rodata\\.str" assembly {
7980 const char *var = "String";
7984 # Return 1 if target has the basic signed and unsigned types in
7985 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
7986 # working <stdint.h> for all targets.
7988 proc check_effective_target_stdint_types { } {
7989 return [check_no_compiler_messages stdint_types assembly {
7991 int8_t a; int16_t b; int32_t c; int64_t d;
7992 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
7996 # Return 1 if target has the basic signed and unsigned types in
7997 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
7998 # these types agree with those in the header, as some systems have
7999 # only <inttypes.h>.
8001 proc check_effective_target_inttypes_types { } {
8002 return [check_no_compiler_messages inttypes_types assembly {
8003 #include <inttypes.h>
8004 int8_t a; int16_t b; int32_t c; int64_t d;
8005 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
8009 # Return 1 if programs are intended to be run on a simulator
8010 # (i.e. slowly) rather than hardware (i.e. fast).
8012 proc check_effective_target_simulator { } {
8014 # All "src/sim" simulators set this one.
8015 if [board_info target exists is_simulator] {
8016 return [board_info target is_simulator]
8019 # The "sid" simulators don't set that one, but at least they set
8021 if [board_info target exists slow_simulator] {
8022 return [board_info target slow_simulator]
8028 # Return 1 if programs are intended to be run on hardware rather than
8031 proc check_effective_target_hw { } {
8033 # All "src/sim" simulators set this one.
8034 if [board_info target exists is_simulator] {
8035 if [board_info target is_simulator] {
8042 # The "sid" simulators don't set that one, but at least they set
8044 if [board_info target exists slow_simulator] {
8045 if [board_info target slow_simulator] {
8055 # Return 1 if the target is a VxWorks kernel.
8057 proc check_effective_target_vxworks_kernel { } {
8058 return [check_no_compiler_messages vxworks_kernel assembly {
8059 #if !defined __vxworks || defined __RTP__
8065 # Return 1 if the target is a VxWorks RTP.
8067 proc check_effective_target_vxworks_rtp { } {
8068 return [check_no_compiler_messages vxworks_rtp assembly {
8069 #if !defined __vxworks || !defined __RTP__
8075 # Return 1 if the target is expected to provide wide character support.
8077 proc check_effective_target_wchar { } {
8078 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
8081 return [check_no_compiler_messages wchar assembly {
8086 # Return 1 if the target has <pthread.h>.
8088 proc check_effective_target_pthread_h { } {
8089 return [check_no_compiler_messages pthread_h assembly {
8090 #include <pthread.h>
8094 # Return 1 if the target can truncate a file from a file-descriptor,
8095 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
8096 # chsize. We test for a trivially functional truncation; no stubs.
8097 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
8098 # different function to be used.
8100 proc check_effective_target_fd_truncate { } {
8102 #define _FILE_OFFSET_BITS 64
8109 FILE *f = fopen ("tst.tmp", "wb");
8111 const char t[] = "test writing more than ten characters";
8115 write (fd, t, sizeof (t) - 1);
8117 if (ftruncate (fd, 10) != 0)
8126 f = fopen ("tst.tmp", "rb");
8127 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
8135 if { [check_runtime ftruncate $prog] } {
8139 regsub "ftruncate" $prog "chsize" prog
8140 return [check_runtime chsize $prog]
8143 # Add to FLAGS all the target-specific flags needed to enable
8144 # full IEEE compliance mode.
8146 proc add_options_for_ieee { flags } {
8147 if { [istarget alpha*-*-*]
8148 || [istarget sh*-*-*] } {
8149 return "$flags -mieee"
8151 if { [istarget rx-*-*] } {
8152 return "$flags -mnofpu"
8157 if {![info exists flags_to_postpone]} {
8158 set flags_to_postpone ""
8161 # Add to FLAGS the flags needed to enable functions to bind locally
8162 # when using pic/PIC passes in the testsuite.
8163 proc add_options_for_bind_pic_locally { flags } {
8164 global flags_to_postpone
8166 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
8167 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
8168 # order to make sure that the multilib_flags doesn't override this.
8170 if {[check_no_compiler_messages using_pic2 assembly {
8175 set flags_to_postpone "-fPIE"
8178 if {[check_no_compiler_messages using_pic1 assembly {
8183 set flags_to_postpone "-fpie"
8189 # Add to FLAGS the flags needed to enable 64-bit vectors.
8191 proc add_options_for_double_vectors { flags } {
8192 if [is-effective-target arm_neon_ok] {
8193 return "$flags -mvectorize-with-neon-double"
8199 # Add to FLAGS the flags needed to define the STACK_SIZE macro.
8201 proc add_options_for_stack_size { flags } {
8202 if [is-effective-target stack_size] {
8203 set stack_size [dg-effective-target-value stack_size]
8204 return "$flags -DSTACK_SIZE=$stack_size"
8210 # Return 1 if the target provides a full C99 runtime.
8212 proc check_effective_target_c99_runtime { } {
8213 return [check_cached_effective_target c99_runtime {
8216 set file [open "$srcdir/gcc.dg/builtins-config.h"]
8217 set contents [read $file]
8220 #ifndef HAVE_C99_RUNTIME
8221 #error !HAVE_C99_RUNTIME
8224 check_no_compiler_messages_nocache c99_runtime assembly $contents
8228 # Return 1 if the target provides the D runtime.
8230 proc check_effective_target_d_runtime { } {
8231 return [check_no_compiler_messages d_runtime executable {
8235 extern(C) int main() {
8241 # Return 1 if the target provides the D standard library.
8243 proc check_effective_target_d_runtime_has_std_library { } {
8244 return [check_no_compiler_messages d_runtime_has_std_library executable {
8248 extern(C) int main() {
8250 real function(real) pcos = &cos;
8256 # Return 1 if target wchar_t is at least 4 bytes.
8258 proc check_effective_target_4byte_wchar_t { } {
8259 return [check_no_compiler_messages 4byte_wchar_t object {
8260 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
8264 # Return 1 if the target supports automatic stack alignment.
8266 proc check_effective_target_automatic_stack_alignment { } {
8267 # Ordinarily x86 supports automatic stack alignment ...
8268 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
8269 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
8270 # ... except Win64 SEH doesn't. Succeed for Win32 though.
8271 return [check_effective_target_ilp32];
8278 # Return true if we are compiling for AVX target.
8280 proc check_avx_available { } {
8281 if { [check_no_compiler_messages avx_available assembly {
8291 # Return true if we are compiling for AVX2 target.
8293 proc check_avx2_available { } {
8294 if { [check_no_compiler_messages avx2_available assembly {
8304 # Return true if we are compiling for SSSE3 target.
8306 proc check_ssse3_available { } {
8307 if { [check_no_compiler_messages sse3a_available assembly {
8317 # Return true if 32- and 16-bytes vectors are available.
8319 proc check_effective_target_vect_sizes_32B_16B { } {
8320 return [expr { [available_vector_sizes] == [list 256 128] }]
8323 # Return true if 16- and 8-bytes vectors are available.
8325 proc check_effective_target_vect_sizes_16B_8B { } {
8326 if { [check_avx_available]
8327 || [is-effective-target arm_neon]
8328 || [istarget aarch64*-*-*] } {
8336 # Return true if 128-bits vectors are preferred even if 256-bits vectors
8339 proc check_prefer_avx128 { } {
8340 if ![check_avx_available] {
8343 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
8344 float a[1024],b[1024],c[1024];
8345 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
8346 } "-O2 -ftree-vectorize"]
8350 # Return 1 if avx512f instructions can be compiled.
8352 proc check_effective_target_avx512f { } {
8353 return [check_no_compiler_messages avx512f object {
8354 typedef double __m512d __attribute__ ((__vector_size__ (64)));
8355 typedef double __m128d __attribute__ ((__vector_size__ (16)));
8357 __m512d _mm512_add (__m512d a)
8359 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
8362 __m128d _mm128_add (__m128d a)
8364 return __builtin_ia32_addsd_round (a, a, 8);
8367 __m128d _mm128_getmant (__m128d a)
8369 return __builtin_ia32_getmantsd_round (a, a, 0, 8);
8374 # Return 1 if avx instructions can be compiled.
8376 proc check_effective_target_avx { } {
8377 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8380 return [check_no_compiler_messages avx object {
8381 void _mm256_zeroall (void)
8383 __builtin_ia32_vzeroall ();
8388 # Return 1 if avx2 instructions can be compiled.
8389 proc check_effective_target_avx2 { } {
8390 return [check_no_compiler_messages avx2 object {
8391 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
8393 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
8395 return __builtin_ia32_andnotsi256 (__X, __Y);
8400 # Return 1 if sse instructions can be compiled.
8401 proc check_effective_target_sse { } {
8402 return [check_no_compiler_messages sse object {
8405 __builtin_ia32_stmxcsr ();
8411 # Return 1 if sse2 instructions can be compiled.
8412 proc check_effective_target_sse2 { } {
8413 return [check_no_compiler_messages sse2 object {
8414 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8416 __m128i _mm_srli_si128 (__m128i __A, int __N)
8418 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
8423 # Return 1 if sse4.1 instructions can be compiled.
8424 proc check_effective_target_sse4 { } {
8425 return [check_no_compiler_messages sse4.1 object {
8426 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8427 typedef int __v4si __attribute__ ((__vector_size__ (16)));
8429 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
8431 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
8437 # Return 1 if F16C instructions can be compiled.
8439 proc check_effective_target_f16c { } {
8440 return [check_no_compiler_messages f16c object {
8441 #include "immintrin.h"
8443 foo (unsigned short val)
8445 return _cvtsh_ss (val);
8450 proc check_effective_target_ms_hook_prologue { } {
8451 if { [check_no_compiler_messages ms_hook_prologue object {
8452 void __attribute__ ((__ms_hook_prologue__)) foo ();
8460 # Return 1 if 3dnow instructions can be compiled.
8461 proc check_effective_target_3dnow { } {
8462 return [check_no_compiler_messages 3dnow object {
8463 typedef int __m64 __attribute__ ((__vector_size__ (8)));
8464 typedef float __v2sf __attribute__ ((__vector_size__ (8)));
8466 __m64 _m_pfadd (__m64 __A, __m64 __B)
8468 return (__m64) __builtin_ia32_pfadd ((__v2sf)__A, (__v2sf)__B);
8473 # Return 1 if sse3 instructions can be compiled.
8474 proc check_effective_target_sse3 { } {
8475 return [check_no_compiler_messages sse3 object {
8476 typedef double __m128d __attribute__ ((__vector_size__ (16)));
8477 typedef double __v2df __attribute__ ((__vector_size__ (16)));
8479 __m128d _mm_addsub_pd (__m128d __X, __m128d __Y)
8481 return (__m128d) __builtin_ia32_addsubpd ((__v2df)__X, (__v2df)__Y);
8486 # Return 1 if ssse3 instructions can be compiled.
8487 proc check_effective_target_ssse3 { } {
8488 return [check_no_compiler_messages ssse3 object {
8489 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8490 typedef int __v4si __attribute__ ((__vector_size__ (16)));
8492 __m128i _mm_abs_epi32 (__m128i __X)
8494 return (__m128i) __builtin_ia32_pabsd128 ((__v4si)__X);
8499 # Return 1 if aes instructions can be compiled.
8500 proc check_effective_target_aes { } {
8501 return [check_no_compiler_messages aes object {
8502 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8503 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
8505 __m128i _mm_aesimc_si128 (__m128i __X)
8507 return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
8512 # Return 1 if vaes instructions can be compiled.
8513 proc check_effective_target_vaes { } {
8514 return [check_no_compiler_messages vaes object {
8515 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8516 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
8518 __m128i _mm_aesimc_si128 (__m128i __X)
8520 return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
8522 } "-O2 -maes -mavx" ]
8525 # Return 1 if pclmul instructions can be compiled.
8526 proc check_effective_target_pclmul { } {
8527 return [check_no_compiler_messages pclmul object {
8528 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8529 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
8531 __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
8533 return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
8540 # Return 1 if vpclmul instructions can be compiled.
8541 proc check_effective_target_vpclmul { } {
8542 return [check_no_compiler_messages vpclmul object {
8543 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8544 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
8546 __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
8548 return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
8552 } "-O2 -mpclmul -mavx" ]
8555 # Return 1 if sse4a instructions can be compiled.
8556 proc check_effective_target_sse4a { } {
8557 return [check_no_compiler_messages sse4a object {
8558 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8559 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
8561 __m128i _mm_insert_si64 (__m128i __X,__m128i __Y)
8563 return (__m128i) __builtin_ia32_insertq ((__v2di)__X, (__v2di)__Y);
8568 # Return 1 if fma4 instructions can be compiled.
8569 proc check_effective_target_fma4 { } {
8570 return [check_no_compiler_messages fma4 object {
8571 typedef float __m128 __attribute__ ((__vector_size__ (16)));
8572 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
8573 __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
8575 return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,
8582 # Return 1 if fma instructions can be compiled.
8583 proc check_effective_target_fma { } {
8584 return [check_no_compiler_messages fma object {
8585 typedef float __m128 __attribute__ ((__vector_size__ (16)));
8586 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
8587 __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
8589 return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,
8596 # Return 1 if xop instructions can be compiled.
8597 proc check_effective_target_xop { } {
8598 return [check_no_compiler_messages xop object {
8599 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8600 typedef short __v8hi __attribute__ ((__vector_size__ (16)));
8601 __m128i _mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C)
8603 return (__m128i) __builtin_ia32_vpmacssww ((__v8hi)__A,
8610 # Return 1 if lzcnt instruction can be compiled.
8611 proc check_effective_target_lzcnt { } {
8612 return [check_no_compiler_messages lzcnt object {
8613 unsigned short _lzcnt (unsigned short __X)
8615 return __builtin_clzs (__X);
8620 # Return 1 if bmi instructions can be compiled.
8621 proc check_effective_target_bmi { } {
8622 return [check_no_compiler_messages bmi object {
8623 unsigned int __bextr_u32 (unsigned int __X, unsigned int __Y)
8625 return __builtin_ia32_bextr_u32 (__X, __Y);
8630 # Return 1 if ADX instructions can be compiled.
8631 proc check_effective_target_adx { } {
8632 return [check_no_compiler_messages adx object {
8634 _adxcarry_u32 (unsigned char __CF, unsigned int __X,
8635 unsigned int __Y, unsigned int *__P)
8637 return __builtin_ia32_addcarryx_u32 (__CF, __X, __Y, __P);
8642 # Return 1 if rtm instructions can be compiled.
8643 proc check_effective_target_rtm { } {
8644 return [check_no_compiler_messages rtm object {
8648 return __builtin_ia32_xend ();
8653 # Return 1 if avx512vl instructions can be compiled.
8654 proc check_effective_target_avx512vl { } {
8655 return [check_no_compiler_messages avx512vl object {
8656 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
8658 mm256_and_epi64 (__v4di __X, __v4di __Y)
8661 return __builtin_ia32_pandq256_mask (__X, __Y, __W, -1);
8666 # Return 1 if avx512cd instructions can be compiled.
8667 proc check_effective_target_avx512cd { } {
8668 return [check_no_compiler_messages avx512cd_trans object {
8669 typedef long long __v8di __attribute__ ((__vector_size__ (64)));
8671 _mm512_conflict_epi64 (__v8di __W, __v8di __A)
8673 return (__v8di) __builtin_ia32_vpconflictdi_512_mask ((__v8di) __A,
8677 } "-Wno-psabi -mavx512cd" ]
8680 # Return 1 if avx512er instructions can be compiled.
8681 proc check_effective_target_avx512er { } {
8682 return [check_no_compiler_messages avx512er_trans object {
8683 typedef float __v16sf __attribute__ ((__vector_size__ (64)));
8685 mm512_exp2a23_ps (__v16sf __X)
8687 return __builtin_ia32_exp2ps_mask (__X, __X, -1, 4);
8689 } "-Wno-psabi -mavx512er" ]
8692 # Return 1 if sha instructions can be compiled.
8693 proc check_effective_target_sha { } {
8694 return [check_no_compiler_messages sha object {
8695 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8696 typedef int __v4si __attribute__ ((__vector_size__ (16)));
8698 __m128i _mm_sha1msg1_epu32 (__m128i __X, __m128i __Y)
8700 return (__m128i) __builtin_ia32_sha1msg1 ((__v4si)__X,
8706 # Return 1 if avx512dq instructions can be compiled.
8707 proc check_effective_target_avx512dq { } {
8708 return [check_no_compiler_messages avx512dq object {
8709 typedef long long __v8di __attribute__ ((__vector_size__ (64)));
8711 _mm512_mask_mullo_epi64 (__v8di __W, __v8di __A, __v8di __B)
8713 return (__v8di) __builtin_ia32_pmullq512_mask ((__v8di) __A,
8721 # Return 1 if avx512bw instructions can be compiled.
8722 proc check_effective_target_avx512bw { } {
8723 return [check_no_compiler_messages avx512bw object {
8724 typedef short __v32hi __attribute__ ((__vector_size__ (64)));
8726 _mm512_mask_mulhrs_epi16 (__v32hi __W, __v32hi __A, __v32hi __B)
8728 return (__v32hi) __builtin_ia32_pmulhrsw512_mask ((__v32hi) __A,
8736 # Return 1 if avx512vp2intersect instructions can be compiled.
8737 proc check_effective_target_avx512vp2intersect { } {
8738 return [check_no_compiler_messages avx512vp2intersect object {
8739 typedef int __v16si __attribute__ ((__vector_size__ (64)));
8740 typedef short __mmask16;
8742 _mm512_2intersect_epi32 (__v16si __A, __v16si __B, __mmask16 *__U,
8745 __builtin_ia32_2intersectd512 (__U, __M, (__v16si) __A, (__v16si) __B);
8747 } "-mavx512vp2intersect" ]
8750 # Return 1 if avx512ifma instructions can be compiled.
8751 proc check_effective_target_avx512ifma { } {
8752 return [check_no_compiler_messages avx512ifma object {
8753 typedef long long __v8di __attribute__ ((__vector_size__ (64)));
8755 _mm512_madd52lo_epu64 (__v8di __X, __v8di __Y, __v8di __Z)
8757 return (__v8di) __builtin_ia32_vpmadd52luq512_mask ((__v8di) __X,
8765 # Return 1 if avx512vbmi instructions can be compiled.
8766 proc check_effective_target_avx512vbmi { } {
8767 return [check_no_compiler_messages avx512vbmi object {
8768 typedef char __v64qi __attribute__ ((__vector_size__ (64)));
8770 _mm512_multishift_epi64_epi8 (__v64qi __X, __v64qi __Y)
8772 return (__v64qi) __builtin_ia32_vpmultishiftqb512_mask ((__v64qi) __X,
8780 # Return 1 if avx512_4fmaps instructions can be compiled.
8781 proc check_effective_target_avx5124fmaps { } {
8782 return [check_no_compiler_messages avx5124fmaps object {
8783 typedef float __v16sf __attribute__ ((__vector_size__ (64)));
8784 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
8787 _mm512_mask_4fmadd_ps (__v16sf __DEST, __v16sf __A, __v16sf __B, __v16sf __C,
8788 __v16sf __D, __v16sf __E, __v4sf *__F)
8790 return (__v16sf) __builtin_ia32_4fmaddps_mask ((__v16sf) __A,
8795 (const __v4sf *) __F,
8799 } "-mavx5124fmaps" ]
8802 # Return 1 if avx512_4vnniw instructions can be compiled.
8803 proc check_effective_target_avx5124vnniw { } {
8804 return [check_no_compiler_messages avx5124vnniw object {
8805 typedef int __v16si __attribute__ ((__vector_size__ (64)));
8806 typedef int __v4si __attribute__ ((__vector_size__ (16)));
8809 _mm512_4dpwssd_epi32 (__v16si __A, __v16si __B, __v16si __C,
8810 __v16si __D, __v16si __E, __v4si *__F)
8812 return (__v16si) __builtin_ia32_vp4dpwssd ((__v16si) __B,
8817 (const __v4si *) __F);
8819 } "-mavx5124vnniw" ]
8822 # Return 1 if avx512_vpopcntdq instructions can be compiled.
8823 proc check_effective_target_avx512vpopcntdq { } {
8824 return [check_no_compiler_messages avx512vpopcntdq object {
8825 typedef int __v16si __attribute__ ((__vector_size__ (64)));
8828 _mm512_popcnt_epi32 (__v16si __A)
8830 return (__v16si) __builtin_ia32_vpopcountd_v16si ((__v16si) __A);
8832 } "-mavx512vpopcntdq" ]
8835 # Return 1 if 128 or 256-bit avx512_vpopcntdq instructions can be compiled.
8836 proc check_effective_target_avx512vpopcntdqvl { } {
8837 return [check_no_compiler_messages avx512vpopcntdqvl object {
8838 typedef int __v8si __attribute__ ((__vector_size__ (32)));
8841 _mm256_popcnt_epi32 (__v8si __A)
8843 return (__v8si) __builtin_ia32_vpopcountd_v8si ((__v8si) __A);
8845 } "-mavx512vpopcntdq -mavx512vl" ]
8848 # Return 1 if gfni instructions can be compiled.
8849 proc check_effective_target_gfni { } {
8850 return [check_no_compiler_messages gfni object {
8851 typedef char __v16qi __attribute__ ((__vector_size__ (16)));
8854 _mm_gf2p8affineinv_epi64_epi8 (__v16qi __A, __v16qi __B, const int __C)
8856 return (__v16qi) __builtin_ia32_vgf2p8affineinvqb_v16qi ((__v16qi) __A,
8863 # Return 1 if avx512vbmi2 instructions can be compiled.
8864 proc check_effective_target_avx512vbmi2 { } {
8865 return [check_no_compiler_messages avx512vbmi2 object {
8866 typedef char __v16qi __attribute__ ((__vector_size__ (16)));
8867 typedef unsigned long long __mmask16;
8870 _mm_mask_compress_epi8 (__v16qi __A, __mmask16 __B, __v16qi __C)
8872 return (__v16qi) __builtin_ia32_compressqi128_mask((__v16qi)__C,
8876 } "-mavx512vbmi2 -mavx512vl" ]
8879 # Return 1 if avx512vbmi2 instructions can be compiled.
8880 proc check_effective_target_avx512vnni { } {
8881 return [check_no_compiler_messages avx512vnni object {
8882 typedef int __v16si __attribute__ ((__vector_size__ (64)));
8885 _mm_mask_compress_epi8 (__v16si __A, __v16si __B, __v16si __C)
8887 return (__v16si) __builtin_ia32_vpdpbusd_v16si ((__v16si)__A,
8891 } "-mavx512vnni -mavx512f" ]
8894 # Return 1 if vaes instructions can be compiled.
8895 proc check_effective_target_avx512vaes { } {
8896 return [check_no_compiler_messages avx512vaes object {
8898 typedef int __v16si __attribute__ ((__vector_size__ (64)));
8901 _mm256_aesdec_epi128 (__v32qi __A, __v32qi __B)
8903 return (__v32qi)__builtin_ia32_vaesdec_v32qi ((__v32qi) __A, (__v32qi) __B);
8908 # Return 1 if vpclmulqdq instructions can be compiled.
8909 proc check_effective_target_vpclmulqdq { } {
8910 return [check_no_compiler_messages vpclmulqdq object {
8911 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
8914 _mm256_clmulepi64_epi128 (__v4di __A, __v4di __B)
8916 return (__v4di) __builtin_ia32_vpclmulqdq_v4di (__A, __B, 0);
8918 } "-mvpclmulqdq -mavx512vl" ]
8921 # Return 1 if avx512_bitalg instructions can be compiled.
8922 proc check_effective_target_avx512bitalg { } {
8923 return [check_no_compiler_messages avx512bitalg object {
8924 typedef short int __v32hi __attribute__ ((__vector_size__ (64)));
8927 _mm512_popcnt_epi16 (__v32hi __A)
8929 return (__v32hi) __builtin_ia32_vpopcountw_v32hi ((__v32hi) __A);
8931 } "-mavx512bitalg" ]
8934 # Return 1 if C wchar_t type is compatible with char16_t.
8936 proc check_effective_target_wchar_t_char16_t_compatible { } {
8937 return [check_no_compiler_messages wchar_t_char16_t object {
8939 __CHAR16_TYPE__ *p16 = &wc;
8940 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
8944 # Return 1 if C wchar_t type is compatible with char32_t.
8946 proc check_effective_target_wchar_t_char32_t_compatible { } {
8947 return [check_no_compiler_messages wchar_t_char32_t object {
8949 __CHAR32_TYPE__ *p32 = &wc;
8950 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
8954 # Return 1 if pow10 function exists.
8956 proc check_effective_target_pow10 { } {
8957 return [check_runtime pow10 {
8967 # Return 1 if frexpl function exists.
8969 proc check_effective_target_frexpl { } {
8970 return [check_runtime frexpl {
8975 x = frexpl (5.0, &y);
8982 # Return 1 if issignaling function exists.
8983 proc check_effective_target_issignaling {} {
8984 return [check_runtime issignaling {
8989 return issignaling (0.0);
8994 # Return 1 if current options generate DFP instructions, 0 otherwise.
8995 proc check_effective_target_hard_dfp {} {
8996 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
8997 typedef float d64 __attribute__((mode(DD)));
8999 void foo (void) { z = x + y; }
9003 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
9004 # for strchr etc. functions.
9006 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
9007 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
9010 #if !defined(__cplusplus) \
9011 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
9012 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
9013 ISO C++ correct string.h and wchar.h protos not supported.
9020 # Return 1 if GNU as is used.
9022 proc check_effective_target_gas { } {
9023 global use_gas_saved
9026 if {![info exists use_gas_saved]} {
9027 # Check if the as used by gcc is GNU as.
9028 set options [list "additional_flags=-print-prog-name=as"]
9029 set gcc_as [lindex [${tool}_target_compile "" "" "none" $options] 0]
9030 # Provide /dev/null as input, otherwise gas times out reading from
9032 set status [remote_exec host "$gcc_as" "-v /dev/null"]
9033 set as_output [lindex $status 1]
9034 if { [ string first "GNU" $as_output ] >= 0 } {
9040 return $use_gas_saved
9043 # Return 1 if GNU ld is used.
9045 proc check_effective_target_gld { } {
9046 global use_gld_saved
9049 if {![info exists use_gld_saved]} {
9050 # Check if the ld used by gcc is GNU ld.
9051 set options [list "additional_flags=-print-prog-name=ld"]
9052 set gcc_ld [lindex [${tool}_target_compile "" "" "none" $options] 0]
9053 set status [remote_exec host "$gcc_ld" "--version"]
9054 set ld_output [lindex $status 1]
9055 if { [ string first "GNU" $ld_output ] >= 0 } {
9061 return $use_gld_saved
9064 # Return 1 if the compiler has been configure with link-time optimization
9067 proc check_effective_target_lto { } {
9068 if { [istarget nvptx-*-*]
9069 || [istarget amdgcn-*-*] } {
9072 return [check_no_compiler_messages lto object {
9077 # Return 1 if the compiler and linker support incremental link-time
9080 proc check_effective_target_lto_incremental { } {
9081 if ![check_effective_target_lto] {
9084 return [check_no_compiler_messages lto_incremental executable {
9085 int main () { return 0; }
9086 } "-flto -r -nostdlib"]
9089 # Return 1 if the compiler has been configured with analyzer support.
9091 proc check_effective_target_analyzer { } {
9092 return [check_no_compiler_messages analyzer object {
9097 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
9099 proc check_effective_target_maybe_x32 { } {
9100 return [check_no_compiler_messages maybe_x32 object {
9102 } "-mx32 -maddress-mode=short"]
9105 # Return 1 if this target supports the -fsplit-stack option, 0
9108 proc check_effective_target_split_stack {} {
9109 return [check_no_compiler_messages split_stack object {
9114 # Return 1 if this target supports the -masm=intel option, 0
9117 proc check_effective_target_masm_intel {} {
9118 return [check_no_compiler_messages masm_intel object {
9119 extern void abort (void);
9123 # Return 1 if the language for the compiler under test is C.
9125 proc check_effective_target_c { } {
9127 if [string match $tool "gcc"] {
9133 # Return 1 if the language for the compiler under test is C++.
9135 proc check_effective_target_c++ { } {
9137 if { [string match $tool "g++"] || [string match $tool "libstdc++"] } {
9143 set cxx_default "c++17"
9144 # Check whether the current active language standard supports the features
9145 # of C++11/C++14 by checking for the presence of one of the -std flags.
9146 # This assumes that the default for the compiler is $cxx_default, and that
9147 # there will never be multiple -std= arguments on the command line.
9148 proc check_effective_target_c++11_only { } {
9150 if ![check_effective_target_c++] {
9153 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
9156 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
9161 proc check_effective_target_c++11 { } {
9162 if [check_effective_target_c++11_only] {
9165 return [check_effective_target_c++14]
9167 proc check_effective_target_c++11_down { } {
9168 if ![check_effective_target_c++] {
9171 return [expr ![check_effective_target_c++14] ]
9174 proc check_effective_target_c++14_only { } {
9176 if ![check_effective_target_c++] {
9179 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
9182 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
9188 proc check_effective_target_c++14 { } {
9189 if [check_effective_target_c++14_only] {
9192 return [check_effective_target_c++17]
9194 proc check_effective_target_c++14_down { } {
9195 if ![check_effective_target_c++] {
9198 return [expr ![check_effective_target_c++17] ]
9201 proc check_effective_target_c++98_only { } {
9203 if ![check_effective_target_c++] {
9206 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
9209 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
9215 proc check_effective_target_c++17_only { } {
9217 if ![check_effective_target_c++] {
9220 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
9223 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
9229 proc check_effective_target_c++17 { } {
9230 if [check_effective_target_c++17_only] {
9233 return [check_effective_target_c++2a]
9235 proc check_effective_target_c++17_down { } {
9236 if ![check_effective_target_c++] {
9239 return [expr ![check_effective_target_c++2a] ]
9242 proc check_effective_target_c++2a_only { } {
9244 if ![check_effective_target_c++] {
9247 if [check-flags { { } { } { -std=c++2a -std=gnu++2a -std=c++20 -std=gnu++20 } }] {
9250 if { $cxx_default == "c++20" && [check-flags { { } { } { } { -std=* } }] } {
9255 proc check_effective_target_c++2a { } {
9256 return [check_effective_target_c++2a_only]
9259 proc check_effective_target_c++20_only { } {
9260 return [check_effective_target_c++2a_only]
9263 proc check_effective_target_c++20 { } {
9264 return [check_effective_target_c++2a]
9267 # Check for C++ Concepts support, i.e. -fconcepts flag.
9268 proc check_effective_target_concepts { } {
9269 if [check_effective_target_c++2a] {
9272 return [check-flags { "" { } { -fconcepts } }]
9275 # Return 1 if expensive testcases should be run.
9277 proc check_effective_target_run_expensive_tests { } {
9278 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
9284 # Returns 1 if "mempcpy" is available on the target system.
9286 proc check_effective_target_mempcpy {} {
9287 return [check_function_available "mempcpy"]
9290 # Returns 1 if "stpcpy" is available on the target system.
9292 proc check_effective_target_stpcpy {} {
9293 return [check_function_available "stpcpy"]
9296 # Returns 1 if "sigsetjmp" is available on the target system.
9297 # Also check if "__sigsetjmp" is defined since that's what glibc
9300 proc check_effective_target_sigsetjmp {} {
9301 if { [check_function_available "sigsetjmp"]
9302 || [check_function_available "__sigsetjmp"] } {
9308 # Check whether the vectorizer tests are supported by the target and
9309 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
9310 # If a port wants to execute the tests more than once it should append
9311 # the supported target to EFFECTIVE_TARGETS instead, and the compile flags
9312 # will be added by a call to add_options_for_<target>.
9313 # Set dg-do-what-default to either compile or run, depending on target
9314 # capabilities. Do not set this if the supported target is appended to
9315 # EFFECTIVE_TARGETS. Flags and this variable will be set by et-dg-runtest
9316 # automatically. Return the number of effective targets if vectorizer tests
9317 # are supported, 0 otherwise.
9319 proc check_vect_support_and_set_flags { } {
9320 global DEFAULT_VECTCFLAGS
9321 global dg-do-what-default
9322 global EFFECTIVE_TARGETS
9324 if [istarget powerpc-*paired*] {
9325 lappend DEFAULT_VECTCFLAGS "-mpaired"
9326 if [check_750cl_hw_available] {
9327 set dg-do-what-default run
9329 set dg-do-what-default compile
9331 } elseif [istarget powerpc*-*-*] {
9332 # Skip targets not supporting -maltivec.
9333 if ![is-effective-target powerpc_altivec_ok] {
9337 lappend DEFAULT_VECTCFLAGS "-maltivec"
9338 if [check_p9vector_hw_available] {
9339 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
9340 } elseif [check_p8vector_hw_available] {
9341 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
9342 } elseif [check_vsx_hw_available] {
9343 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
9346 if [check_vmx_hw_available] {
9347 set dg-do-what-default run
9349 if [is-effective-target ilp32] {
9350 # Specify a cpu that supports VMX for compile-only tests.
9351 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
9353 set dg-do-what-default compile
9355 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
9356 lappend DEFAULT_VECTCFLAGS "-msse2"
9357 if { [check_effective_target_sse2_runtime] } {
9358 set dg-do-what-default run
9360 set dg-do-what-default compile
9362 } elseif { [istarget mips*-*-*]
9363 && [check_effective_target_nomips16] } {
9364 if { [check_effective_target_mpaired_single] } {
9365 lappend EFFECTIVE_TARGETS mpaired_single
9367 if { [check_effective_target_mips_loongson_mmi] } {
9368 lappend EFFECTIVE_TARGETS mips_loongson_mmi
9370 if { [check_effective_target_mips_msa] } {
9371 lappend EFFECTIVE_TARGETS mips_msa
9373 return [llength $EFFECTIVE_TARGETS]
9374 } elseif [istarget sparc*-*-*] {
9375 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
9376 if [check_effective_target_ultrasparc_hw] {
9377 set dg-do-what-default run
9379 set dg-do-what-default compile
9381 } elseif [istarget alpha*-*-*] {
9382 # Alpha's vectorization capabilities are extremely limited.
9383 # It's more effort than its worth disabling all of the tests
9384 # that it cannot pass. But if you actually want to see what
9385 # does work, command out the return.
9388 lappend DEFAULT_VECTCFLAGS "-mmax"
9389 if [check_alpha_max_hw_available] {
9390 set dg-do-what-default run
9392 set dg-do-what-default compile
9394 } elseif [istarget ia64-*-*] {
9395 set dg-do-what-default run
9396 } elseif [is-effective-target arm_neon_ok] {
9397 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
9398 # NEON does not support denormals, so is not used for vectorization by
9399 # default to avoid loss of precision. We must pass -ffast-math to test
9400 # vectorization of float operations.
9401 lappend DEFAULT_VECTCFLAGS "-ffast-math"
9402 if [is-effective-target arm_neon_hw] {
9403 set dg-do-what-default run
9405 set dg-do-what-default compile
9407 } elseif [istarget "aarch64*-*-*"] {
9408 set dg-do-what-default run
9409 } elseif [istarget s390*-*-*] {
9410 # The S/390 backend set a default of 2 for that value.
9411 # Override it to have the same situation as with other
9413 lappend DEFAULT_VECTCFLAGS "--param" "min-vect-loop-bound=1"
9414 lappend DEFAULT_VECTCFLAGS "--param" "max-unrolled-insns=200"
9415 lappend DEFAULT_VECTCFLAGS "--param" "max-unroll-times=8"
9416 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peeled-insns=200"
9417 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peel-times=16"
9418 if [check_effective_target_s390_vxe] {
9419 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
9420 set dg-do-what-default run
9421 } elseif [check_effective_target_s390_vx] {
9422 lappend DEFAULT_VECTCFLAGS "-march=z13" "-mzarch"
9423 set dg-do-what-default run
9425 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
9426 set dg-do-what-default compile
9428 } elseif [istarget amdgcn-*-*] {
9429 set dg-do-what-default run
9437 # Return 1 if the target does *not* require strict alignment.
9439 proc check_effective_target_non_strict_align {} {
9441 # On ARM, the default is to use STRICT_ALIGNMENT, but there
9442 # are interfaces defined for misaligned access and thus
9443 # depending on the architecture levels unaligned access is
9445 if [istarget "arm*-*-*"] {
9446 return [check_effective_target_arm_unaligned]
9449 return [check_no_compiler_messages non_strict_align assembly {
9451 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
9453 void foo(void) { z = (c *) y; }
9457 # Return 1 if the target has <ucontext.h>.
9459 proc check_effective_target_ucontext_h { } {
9460 return [check_no_compiler_messages ucontext_h assembly {
9461 #include <ucontext.h>
9465 proc check_effective_target_aarch64_tiny { } {
9466 if { [istarget aarch64*-*-*] } {
9467 return [check_no_compiler_messages aarch64_tiny object {
9468 #ifdef __AARCH64_CMODEL_TINY__
9471 #error target not AArch64 tiny code model
9479 # Create functions to check that the AArch64 assembler supports the
9480 # various architecture extensions via the .arch_extension pseudo-op.
9482 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve"
9483 "i8mm" "f32mm" "f64mm" "bf16" "sb" } {
9484 eval [string map [list FUNC $aarch64_ext] {
9485 proc check_effective_target_aarch64_asm_FUNC_ok { } {
9486 if { [istarget aarch64*-*-*] } {
9487 return [check_no_compiler_messages aarch64_FUNC_assembler object {
9488 __asm__ (".arch_extension FUNC");
9489 } "-march=armv8-a+FUNC"]
9497 proc check_effective_target_aarch64_small { } {
9498 if { [istarget aarch64*-*-*] } {
9499 return [check_no_compiler_messages aarch64_small object {
9500 #ifdef __AARCH64_CMODEL_SMALL__
9503 #error target not AArch64 small code model
9511 proc check_effective_target_aarch64_large { } {
9512 if { [istarget aarch64*-*-*] } {
9513 return [check_no_compiler_messages aarch64_large object {
9514 #ifdef __AARCH64_CMODEL_LARGE__
9517 #error target not AArch64 large code model
9525 # Return 1 if the assembler accepts the aarch64 .variant_pcs directive.
9527 proc check_effective_target_aarch64_variant_pcs { } {
9528 if { [istarget aarch64*-*-*] } {
9529 return [check_no_compiler_messages aarch64_variant_pcs object {
9530 __asm__ (".variant_pcs foo");
9537 # Return 1 if this is a reduced AVR Tiny core. Such cores have different
9538 # register set, instruction set, addressing capabilities and ABI.
9540 proc check_effective_target_avr_tiny { } {
9541 if { [istarget avr*-*-*] } {
9542 return [check_no_compiler_messages avr_tiny object {
9546 #error target not a reduced AVR Tiny core
9554 # Return 1 if <fenv.h> is available.
9556 proc check_effective_target_fenv {} {
9557 return [check_no_compiler_messages fenv object {
9559 } [add_options_for_ieee "-std=gnu99"]]
9562 # Return 1 if <fenv.h> is available with all the standard IEEE
9563 # exceptions and floating-point exceptions are raised by arithmetic
9564 # operations. (If the target requires special options for "inexact"
9565 # exceptions, those need to be specified in the testcases.)
9567 proc check_effective_target_fenv_exceptions {} {
9568 return [check_runtime fenv_exceptions {
9571 #ifndef FE_DIVBYZERO
9572 # error Missing FE_DIVBYZERO
9575 # error Missing FE_INEXACT
9578 # error Missing FE_INVALID
9581 # error Missing FE_OVERFLOW
9583 #ifndef FE_UNDERFLOW
9584 # error Missing FE_UNDERFLOW
9586 volatile float a = 0.0f, r;
9591 if (fetestexcept (FE_INVALID))
9596 } [add_options_for_ieee "-std=gnu99"]]
9599 # Return 1 if -fexceptions is supported.
9601 proc check_effective_target_exceptions {} {
9602 if { [istarget amdgcn*-*-*] } {
9608 # Used to check if the testing configuration supports exceptions.
9609 # Returns 0 if exceptions are unsupported or disabled (e.g. by passing
9610 # -fno-exceptions). Returns 1 if exceptions are enabled.
9611 proc check_effective_target_exceptions_enabled {} {
9612 return [check_cached_effective_target exceptions_enabled {
9613 if { [check_effective_target_exceptions] } {
9614 return [check_no_compiler_messages exceptions_enabled assembly {
9622 # If exceptions aren't supported, then they're not enabled.
9628 proc check_effective_target_tiny {} {
9629 return [check_cached_effective_target tiny {
9630 if { [istarget aarch64*-*-*]
9631 && [check_effective_target_aarch64_tiny] } {
9634 if { [istarget avr-*-*]
9635 && [check_effective_target_avr_tiny] } {
9638 # PRU Program Counter is 16-bits, and trampolines are not supported.
9639 # Hence directly declare as a tiny target.
9640 if [istarget pru-*-*] {
9647 # Return 1 if the target supports -mbranch-cost=N option.
9649 proc check_effective_target_branch_cost {} {
9650 if { [ istarget arm*-*-*]
9651 || [istarget avr*-*-*]
9652 || [istarget csky*-*-*]
9653 || [istarget epiphany*-*-*]
9654 || [istarget frv*-*-*]
9655 || [istarget i?86-*-*] || [istarget x86_64-*-*]
9656 || [istarget mips*-*-*]
9657 || [istarget s390*-*-*]
9658 || [istarget riscv*-*-*]
9659 || [istarget sh*-*-*] } {
9665 # Record that dg-final test TEST requires convential compilation.
9667 proc force_conventional_output_for { test } {
9668 if { [info proc $test] == "" } {
9669 perror "$test does not exist"
9672 proc ${test}_required_options {} {
9673 global gcc_force_conventional_output
9674 upvar 1 extra_tool_flags extra_tool_flags
9675 if {[regexp -- "^scan-assembler" [info level 0]]
9676 && ![string match "*-fident*" $extra_tool_flags]} {
9677 # Do not let .ident confuse assembler scan tests
9678 return [list $gcc_force_conventional_output "-fno-ident"]
9680 return $gcc_force_conventional_output
9684 # Record that dg-final test scan-ltrans-tree-dump* requires -flto-partition=one
9685 # in order to force a single partition, allowing scan-ltrans-tree-dump* to scan
9686 # a dump file *.exe.ltrans0.*.
9688 proc scan-ltrans-tree-dump_required_options {} {
9689 return "-flto-partition=one"
9691 proc scan-ltrans-tree-dump-times_required_options {} {
9692 return "-flto-partition=one"
9694 proc scan-ltrans-tree-dump-not_required_options {} {
9695 return "-flto-partition=one"
9697 proc scan-ltrans-tree-dump-dem_required_options {} {
9698 return "-flto-partition=one"
9700 proc scan-ltrans-tree-dump-dem-not_required_options {} {
9701 return "-flto-partition=one"
9704 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
9705 # otherwise. Cache the result.
9707 proc check_effective_target_pie_copyreloc { } {
9709 global GCC_UNDER_TEST
9711 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
9715 # Need auto-host.h to check linker support.
9716 if { ![file exists ../../auto-host.h ] } {
9720 return [check_cached_effective_target pie_copyreloc {
9721 # Set up and compile to see if linker supports PIE with copy
9722 # reloc. Include the current process ID in the file names to
9723 # prevent conflicts with invocations for multiple testsuites.
9728 set f [open $src "w"]
9729 puts $f "#include \"../../auto-host.h\""
9730 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
9731 puts $f "# error Linker does not support PIE with copy reloc."
9735 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
9736 set lines [${tool}_target_compile $src $obj object ""]
9741 if [string match "" $lines] then {
9742 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
9745 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
9751 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
9752 # otherwise. Cache the result.
9754 proc check_effective_target_got32x_reloc { } {
9756 global GCC_UNDER_TEST
9758 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
9762 # Need auto-host.h to check linker support.
9763 if { ![file exists ../../auto-host.h ] } {
9767 return [check_cached_effective_target got32x_reloc {
9768 # Include the current process ID in the file names to prevent
9769 # conflicts with invocations for multiple testsuites.
9771 set src got32x[pid].c
9772 set obj got32x[pid].o
9774 set f [open $src "w"]
9775 puts $f "#include \"../../auto-host.h\""
9776 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
9777 puts $f "# error Assembler does not support R_386_GOT32X."
9781 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
9782 set lines [${tool}_target_compile $src $obj object ""]
9787 if [string match "" $lines] then {
9788 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
9791 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
9796 return $got32x_reloc_available_saved
9799 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
9800 # 0 otherwise. Cache the result.
9802 proc check_effective_target_tls_get_addr_via_got { } {
9804 global GCC_UNDER_TEST
9806 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
9810 # Need auto-host.h to check linker support.
9811 if { ![file exists ../../auto-host.h ] } {
9815 return [check_cached_effective_target tls_get_addr_via_got {
9816 # Include the current process ID in the file names to prevent
9817 # conflicts with invocations for multiple testsuites.
9819 set src tls_get_addr_via_got[pid].c
9820 set obj tls_get_addr_via_got[pid].o
9822 set f [open $src "w"]
9823 puts $f "#include \"../../auto-host.h\""
9824 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
9825 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
9829 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
9830 set lines [${tool}_target_compile $src $obj object ""]
9835 if [string match "" $lines] then {
9836 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
9839 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
9845 # Return 1 if the target uses comdat groups.
9847 proc check_effective_target_comdat_group {} {
9848 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat|\.group\[^\n\r]*,#comdat" assembly {
9850 inline int foo () { return 1; }
9855 # Return 1 if target supports __builtin_eh_return
9856 proc check_effective_target_builtin_eh_return { } {
9857 return [check_no_compiler_messages builtin_eh_return object {
9858 void test (long l, void *p)
9860 __builtin_eh_return (l, p);
9865 # Return 1 if the target supports max reduction for vectors.
9867 proc check_effective_target_vect_max_reduc { } {
9868 if { [istarget aarch64*-*-*] || [is-effective-target arm_neon] } {
9874 # Return 1 if the compiler has been configured with nvptx offloading.
9876 proc check_effective_target_offload_nvptx { } {
9877 return [check_no_compiler_messages offload_nvptx assembly {
9878 int main () {return 0;}
9879 } "-foffload=nvptx-none" ]
9882 # Return 1 if the compiler has been configured with gcn offloading.
9884 proc check_effective_target_offload_gcn { } {
9885 return [check_no_compiler_messages offload_gcn assembly {
9886 int main () {return 0;}
9887 } "-foffload=amdgcn-amdhsa" ]
9890 # Return 1 if the target support -fprofile-update=atomic
9891 proc check_effective_target_profile_update_atomic {} {
9892 return [check_no_compiler_messages profile_update_atomic assembly {
9893 int main (void) { return 0; }
9894 } "-fprofile-update=atomic -fprofile-generate"]
9897 # Return 1 if vector (va - vector add) instructions are understood by
9898 # the assembler and can be executed. This also covers checking for
9899 # the VX kernel feature. A kernel without that feature does not
9900 # enable the vector facility and the following check will die with a
9902 proc check_effective_target_s390_vx { } {
9903 if ![istarget s390*-*-*] then {
9907 return [check_runtime s390_check_vx {
9910 asm ("va %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
9913 } "-march=z13 -mzarch" ]
9916 # Same as above but for the z14 vector enhancement facility. Test
9917 # is performed with the vector nand instruction.
9918 proc check_effective_target_s390_vxe { } {
9919 if ![istarget s390*-*-*] then {
9923 return [check_runtime s390_check_vxe {
9926 asm ("vnn %%v24, %%v26, %%v28" : : : "v24", "v26", "v28");
9929 } "-march=z14 -mzarch" ]
9932 # Same as above but for the arch13 vector enhancement facility. Test
9933 # is performed with the vector shift left double by bit instruction.
9934 proc check_effective_target_s390_vxe2 { } {
9935 if ![istarget s390*-*-*] then {
9939 return [check_runtime s390_check_vxe2 {
9942 asm ("vsld %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
9945 } "-march=arch13 -mzarch" ]
9948 #For versions of ARM architectures that have hardware div insn,
9949 #disable the divmod transform
9951 proc check_effective_target_arm_divmod_simode { } {
9952 return [check_no_compiler_messages arm_divmod assembly {
9953 #ifdef __ARM_ARCH_EXT_IDIV__
9960 # Return 1 if target supports divmod hardware insn or divmod libcall.
9962 proc check_effective_target_divmod { } {
9963 #TODO: Add checks for all targets that have either hardware divmod insn
9964 # or define libfunc for divmod.
9965 if { [istarget arm*-*-*]
9966 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
9972 # Return 1 if target supports divmod for SImode. The reason for
9973 # separating this from check_effective_target_divmod is that
9974 # some versions of ARM architecture define div instruction
9975 # only for simode, and for these archs, we do not want to enable
9976 # divmod transform for simode.
9978 proc check_effective_target_divmod_simode { } {
9979 if { [istarget arm*-*-*] } {
9980 return [check_effective_target_arm_divmod_simode]
9983 return [check_effective_target_divmod]
9986 # Return 1 if store merging optimization is applicable for target.
9987 # Store merging is not profitable for targets like the avr which
9988 # can load/store only one byte at a time. Use int size as a proxy
9989 # for the number of bytes the target can write, and skip for targets
9990 # with a smallish (< 32) size.
9992 proc check_effective_target_store_merge { } {
9993 if { [is-effective-target non_strict_align ] && [is-effective-target int32plus] } {
10000 # Return 1 if we're able to assemble rdrand
10002 proc check_effective_target_rdrand { } {
10003 return [check_no_compiler_messages_nocache rdrand object {
10008 __builtin_ia32_rdrand32_step(&val);
10014 # Return 1 if the target supports coprocessor instructions: cdp, ldc, ldcl,
10015 # stc, stcl, mcr and mrc.
10016 proc check_effective_target_arm_coproc1_ok_nocache { } {
10017 if { ![istarget arm*-*-*] } {
10020 return [check_no_compiler_messages_nocache arm_coproc1_ok assembly {
10021 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 4
10024 #include <arm_acle.h>
10028 proc check_effective_target_arm_coproc1_ok { } {
10029 return [check_cached_effective_target arm_coproc1_ok \
10030 check_effective_target_arm_coproc1_ok_nocache]
10033 # Return 1 if the target supports all coprocessor instructions checked by
10034 # check_effective_target_arm_coproc1_ok in addition to the following: cdp2,
10035 # ldc2, ldc2l, stc2, stc2l, mcr2 and mrc2.
10036 proc check_effective_target_arm_coproc2_ok_nocache { } {
10037 if { ![check_effective_target_arm_coproc1_ok] } {
10040 return [check_no_compiler_messages_nocache arm_coproc2_ok assembly {
10041 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 5
10044 #include <arm_acle.h>
10048 proc check_effective_target_arm_coproc2_ok { } {
10049 return [check_cached_effective_target arm_coproc2_ok \
10050 check_effective_target_arm_coproc2_ok_nocache]
10053 # Return 1 if the target supports all coprocessor instructions checked by
10054 # check_effective_target_arm_coproc2_ok in addition the following: mcrr and
10056 proc check_effective_target_arm_coproc3_ok_nocache { } {
10057 if { ![check_effective_target_arm_coproc2_ok] } {
10060 return [check_no_compiler_messages_nocache arm_coproc3_ok assembly {
10061 #if (__thumb__ && !__thumb2__) \
10062 || (__ARM_ARCH < 6 && !defined (__ARM_ARCH_5TE__))
10065 #include <arm_acle.h>
10069 proc check_effective_target_arm_coproc3_ok { } {
10070 return [check_cached_effective_target arm_coproc3_ok \
10071 check_effective_target_arm_coproc3_ok_nocache]
10074 # Return 1 if the target supports all coprocessor instructions checked by
10075 # check_effective_target_arm_coproc3_ok in addition the following: mcrr2 and
10077 proc check_effective_target_arm_coproc4_ok_nocache { } {
10078 if { ![check_effective_target_arm_coproc3_ok] } {
10081 return [check_no_compiler_messages_nocache arm_coproc4_ok assembly {
10082 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 6
10085 #include <arm_acle.h>
10089 proc check_effective_target_arm_coproc4_ok { } {
10090 return [check_cached_effective_target arm_coproc4_ok \
10091 check_effective_target_arm_coproc4_ok_nocache]
10094 # Return 1 if the target supports the auto_inc_dec optimization pass.
10095 proc check_effective_target_autoincdec { } {
10096 if { ![check_no_compiler_messages auto_incdec assembly { void f () { }
10097 } "-O2 -fdump-rtl-auto_inc_dec" ] } {
10101 set dumpfile [glob -nocomplain "auto_incdec[pid].c.\[0-9\]\[0-9\]\[0-9\]r.auto_inc_dec"]
10102 if { [file exists $dumpfile ] } {
10103 file delete $dumpfile
10109 # Return 1 if the target has support for stack probing designed
10110 # to avoid stack-clash style attacks.
10112 # This is used to restrict the stack-clash mitigation tests to
10113 # just those targets that have been explicitly supported.
10115 # In addition to the prologue work on those targets, each target's
10116 # properties should be described in the functions below so that
10117 # tests do not become a mess of unreadable target conditions.
10119 proc check_effective_target_supports_stack_clash_protection { } {
10121 if { [istarget x86_64-*-*] || [istarget i?86-*-*]
10122 || [istarget powerpc*-*-*] || [istarget rs6000*-*-*]
10123 || [istarget aarch64*-**] || [istarget s390*-*-*] } {
10129 # Return 1 if the target creates a frame pointer for non-leaf functions
10130 # Note we ignore cases where we apply tail call optimization here.
10131 proc check_effective_target_frame_pointer_for_non_leaf { } {
10132 # Solaris/x86 defaults to -fno-omit-frame-pointer.
10133 if { [istarget i?86-*-solaris*] || [istarget x86_64-*-solaris*] } {
10140 # Return 1 if the target's calling sequence or its ABI
10141 # create implicit stack probes at or prior to function entry.
10142 proc check_effective_target_caller_implicit_probes { } {
10144 # On x86/x86_64 the call instruction itself pushes the return
10145 # address onto the stack. That is an implicit probe of *sp.
10146 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
10150 # On PPC, the ABI mandates that the address of the outer
10151 # frame be stored at *sp. Thus each allocation of stack
10152 # space is itself an implicit probe of *sp.
10153 if { [istarget powerpc*-*-*] || [istarget rs6000*-*-*] } {
10157 # s390's ABI has a register save area allocated by the
10158 # caller for use by the callee. The mere existence does
10159 # not constitute a probe by the caller, but when the slots
10160 # used by the callee those stores are implicit probes.
10161 if { [istarget s390*-*-*] } {
10165 # Not strictly true on aarch64, but we have agreed that we will
10166 # consider any function that pushes SP more than 3kbytes into
10167 # the guard page as broken. This essentially means that we can
10168 # consider the aarch64 as having a caller implicit probe at
10170 if { [istarget aarch64*-*-*] } {
10177 # Targets that potentially realign the stack pointer often cause residual
10178 # stack allocations and make it difficult to elimination loops or residual
10179 # allocations for dynamic stack allocations
10180 proc check_effective_target_callee_realigns_stack { } {
10181 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
10187 # Return 1 if CET instructions can be compiled.
10188 proc check_effective_target_cet { } {
10189 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
10192 return [check_no_compiler_messages cet object {
10197 } "-O2 -fcf-protection" ]
10200 # Return 1 if target supports floating point "infinite"
10201 proc check_effective_target_inf { } {
10202 return [check_no_compiler_messages supports_inf assembly {
10203 const double pinf = __builtin_inf ();
10207 # Return 1 if the target supports ARMv8.3 Adv.SIMD Complex instructions
10208 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
10209 # Record the command line options needed.
10211 proc check_effective_target_arm_v8_3a_complex_neon_ok_nocache { } {
10212 global et_arm_v8_3a_complex_neon_flags
10213 set et_arm_v8_3a_complex_neon_flags ""
10215 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
10219 # Iterate through sets of options to find the compiler flags that
10220 # need to be added to the -march option.
10221 foreach flags {"" "-mfloat-abi=softfp -mfpu=auto" "-mfloat-abi=hard -mfpu=auto"} {
10222 if { [check_no_compiler_messages_nocache \
10223 arm_v8_3a_complex_neon_ok object {
10224 #if !defined (__ARM_FEATURE_COMPLEX)
10225 #error "__ARM_FEATURE_COMPLEX not defined"
10227 } "$flags -march=armv8.3-a"] } {
10228 set et_arm_v8_3a_complex_neon_flags "$flags -march=armv8.3-a"
10236 proc check_effective_target_arm_v8_3a_complex_neon_ok { } {
10237 return [check_cached_effective_target arm_v8_3a_complex_neon_ok \
10238 check_effective_target_arm_v8_3a_complex_neon_ok_nocache]
10241 proc add_options_for_arm_v8_3a_complex_neon { flags } {
10242 if { ! [check_effective_target_arm_v8_3a_complex_neon_ok] } {
10245 global et_arm_v8_3a_complex_neon_flags
10246 return "$flags $et_arm_v8_3a_complex_neon_flags"
10249 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.3
10250 # with the complex instruction extension, 0 otherwise. The test is valid for
10251 # ARM and for AArch64.
10253 proc check_effective_target_arm_v8_3a_complex_neon_hw { } {
10254 if { ![check_effective_target_arm_v8_3a_complex_neon_ok] } {
10257 return [check_runtime arm_v8_3a_complex_neon_hw_available {
10258 #include "arm_neon.h"
10263 float32x2_t results = {-4.0,5.0};
10264 float32x2_t a = {1.0,3.0};
10265 float32x2_t b = {2.0,5.0};
10267 #ifdef __ARM_ARCH_ISA_A64
10268 asm ("fcadd %0.2s, %1.2s, %2.2s, #90"
10271 : /* No clobbers. */);
10274 asm ("vcadd.f32 %P0, %P1, %P2, #90"
10277 : /* No clobbers. */);
10280 return (results[0] == 8 && results[1] == 24) ? 1 : 0;
10282 } [add_options_for_arm_v8_3a_complex_neon ""]]
10285 # Return 1 if the assembler supports assembling the Armv8.3 pointer authentication B key directive
10286 proc check_effective_target_arm_v8_3a_bkey_directive { } {
10287 return [check_no_compiler_messages cet object {
10289 asm (".cfi_b_key_frame");
10295 # Return 1 if the target supports executing the Armv8.1-M Mainline Low
10296 # Overhead Loop, 0 otherwise. The test is valid for ARM.
10298 proc check_effective_target_arm_v8_1_lob_ok { } {
10299 if { ![istarget arm*-*-*] } {
10302 return [check_runtime arm_v8_1_lob_hw_available {
10306 asm ("movw r3, #10\n\t" /* movs? */
10307 "dls lr, r3" : : : "r3", "lr");
10310 asm goto ("le lr, %l0" : : : "lr" : loop);
10313 } "-march=armv8.1-m.main" ]
10317 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
10318 # used and the target does not support executing the Armv8.1-M
10319 # Mainline Low Overhead Loop, 0 otherwise. The test is valid for ARM.
10321 proc check_effective_target_arm_thumb2_ok_no_arm_v8_1_lob { } {
10322 if { [check_effective_target_arm_thumb2_ok]
10323 && ![check_effective_target_arm_v8_1_lob_ok] } {
10329 # Returns 1 if the target is using glibc, 0 otherwise.
10331 proc check_effective_target_glibc { } {
10332 return [check_no_compiler_messages glibc_object assembly {
10333 #include <stdlib.h>
10334 #if !defined(__GLIBC__)
10340 # Return 1 if the target plus current options supports a vector
10341 # complex addition with rotate of half and single float modes, 0 otherwise.
10343 # This won't change for different subtargets so cache the result.
10345 foreach N {hf sf} {
10346 eval [string map [list N $N] {
10347 proc check_effective_target_vect_complex_rot_N { } {
10348 return [check_cached_effective_target_indexed vect_complex_rot_N {
10349 expr { [istarget aarch64*-*-*]
10350 || [istarget arm*-*-*] }}]
10355 # Return 1 if the target plus current options supports a vector
10356 # complex addition with rotate of double float modes, 0 otherwise.
10358 # This won't change for different subtargets so cache the result.
10361 eval [string map [list N $N] {
10362 proc check_effective_target_vect_complex_rot_N { } {
10363 return [check_cached_effective_target_indexed vect_complex_rot_N {
10364 expr { [istarget aarch64*-*-*] }}]
10369 # Return 1 if this target uses an LLVM assembler and/or linker
10370 proc check_effective_target_llvm_binutils { } {
10371 return [check_cached_effective_target llvm_binutils {
10372 expr { [istarget amdgcn*-*-*]
10373 || [check_effective_target_offload_gcn] }}]
10376 # Return 1 if the compiler supports '-mfentry'.
10378 proc check_effective_target_mfentry { } {
10379 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
10382 return [check_no_compiler_messages mfentry object {
10383 void foo (void) { }
10387 # Return 1 if this target supports indirect calls
10388 proc check_effective_target_indirect_calls { } {
10389 if { [istarget bpf-*-*] } {
10395 # Return 1 if we can use the -lgccjit option, 0 otherwise.
10397 proc check_effective_target_lgccjit { } {
10398 if { [info procs jit_target_compile] == "" } then {
10399 global GCC_UNDER_TEST
10400 if ![info exists GCC_UNDER_TEST] {
10401 set GCC_UNDER_TEST "[find_gcc]"
10403 proc jit_target_compile { source dest type options } [info body gcc_target_compile]
10405 return [check_no_compiler_messages lgccjit executable {
10406 int main() { return 0; }
10410 # Return 1 if the MSP430 small memory model is in use.
10411 proc check_effective_target_msp430_small {} {
10412 return [check_no_compiler_messages msp430_small assembly {
10413 #if (!defined __MSP430__ || defined __MSP430X_LARGE__)
10414 #error !msp430 || __MSP430X_LARGE__
10419 # Return 1 if the MSP430 large memory model is in use.
10420 proc check_effective_target_msp430_large {} {
10421 return [check_no_compiler_messages msp430_large assembly {
10422 #ifndef __MSP430X_LARGE__
10423 #error __MSP430X_LARGE__
10428 # Return 1 if the target has an efficient means to encode large initializers
10431 proc check_effective_target_large_initializer { } {
10432 if { [istarget nvptx*-*-*] } {