target-supports.exp (check_effective_target_shared): New function.
[gcc.git] / gcc / testsuite / lib / target-supports.exp
1 # Copyright (C) 1999-2014 Free Software Foundation, Inc.
2
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
7 #
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
12 #
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
16
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
19
20 # This file defines procs for determining features supported by the target.
21
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
26 #
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
30 #
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
33 # "// C++" for c++,
34 # "! Fortran" for Fortran code,
35 # "/* ObjC", for ObjC
36 # "// ObjC++" for ObjC++
37 # and "// Go" for Go
38 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
39 # allow for ObjC/ObjC++ specific flags.
40 proc check_compile {basename type contents args} {
41 global tool
42 verbose "check_compile tool: $tool for $basename"
43
44 if { [llength $args] > 0 } {
45 set options [list "additional_flags=[lindex $args 0]"]
46 } else {
47 set options ""
48 }
49 switch -glob -- $contents {
50 "*! Fortran*" { set src ${basename}[pid].f90 }
51 "*// C++*" { set src ${basename}[pid].cc }
52 "*// ObjC++*" { set src ${basename}[pid].mm }
53 "*/* ObjC*" { set src ${basename}[pid].m }
54 "*// Go*" { set src ${basename}[pid].go }
55 default {
56 switch -- $tool {
57 "objc" { set src ${basename}[pid].m }
58 "obj-c++" { set src ${basename}[pid].mm }
59 default { set src ${basename}[pid].c }
60 }
61 }
62 }
63
64 set compile_type $type
65 switch -glob $type {
66 assembly { set output ${basename}[pid].s }
67 object { set output ${basename}[pid].o }
68 executable { set output ${basename}[pid].exe }
69 "rtl-*" {
70 set output ${basename}[pid].s
71 lappend options "additional_flags=-fdump-$type"
72 set compile_type assembly
73 }
74 }
75 set f [open $src "w"]
76 puts $f $contents
77 close $f
78 set lines [${tool}_target_compile $src $output $compile_type "$options"]
79 file delete $src
80
81 set scan_output $output
82 # Don't try folding this into the switch above; calling "glob" before the
83 # file is created won't work.
84 if [regexp "rtl-(.*)" $type dummy rtl_type] {
85 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
86 file delete $output
87 }
88
89 return [list $lines $scan_output]
90 }
91
92 proc current_target_name { } {
93 global target_info
94 if [info exists target_info(target,name)] {
95 set answer $target_info(target,name)
96 } else {
97 set answer ""
98 }
99 return $answer
100 }
101
102 # Implement an effective-target check for property PROP by invoking
103 # the Tcl command ARGS and seeing if it returns true.
104
105 proc check_cached_effective_target { prop args } {
106 global et_cache
107
108 set target [current_target_name]
109 if {![info exists et_cache($prop,target)]
110 || $et_cache($prop,target) != $target} {
111 verbose "check_cached_effective_target $prop: checking $target" 2
112 set et_cache($prop,target) $target
113 set et_cache($prop,value) [uplevel eval $args]
114 }
115 set value $et_cache($prop,value)
116 verbose "check_cached_effective_target $prop: returning $value for $target" 2
117 return $value
118 }
119
120 # Like check_compile, but delete the output file and return true if the
121 # compiler printed no messages.
122 proc check_no_compiler_messages_nocache {args} {
123 set result [eval check_compile $args]
124 set lines [lindex $result 0]
125 set output [lindex $result 1]
126 remote_file build delete $output
127 return [string match "" $lines]
128 }
129
130 # Like check_no_compiler_messages_nocache, but cache the result.
131 # PROP is the property we're checking, and doubles as a prefix for
132 # temporary filenames.
133 proc check_no_compiler_messages {prop args} {
134 return [check_cached_effective_target $prop {
135 eval [list check_no_compiler_messages_nocache $prop] $args
136 }]
137 }
138
139 # Like check_compile, but return true if the compiler printed no
140 # messages and if the contents of the output file satisfy PATTERN.
141 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
142 # don't match regular expression REGEXP, otherwise they satisfy it
143 # if they do match regular expression PATTERN. (PATTERN can start
144 # with something like "[!]" if the regular expression needs to match
145 # "!" as the first character.)
146 #
147 # Delete the output file before returning. The other arguments are
148 # as for check_compile.
149 proc check_no_messages_and_pattern_nocache {basename pattern args} {
150 global tool
151
152 set result [eval [list check_compile $basename] $args]
153 set lines [lindex $result 0]
154 set output [lindex $result 1]
155
156 set ok 0
157 if { [string match "" $lines] } {
158 set chan [open "$output"]
159 set invert [regexp {^!(.*)} $pattern dummy pattern]
160 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
161 close $chan
162 }
163
164 remote_file build delete $output
165 return $ok
166 }
167
168 # Like check_no_messages_and_pattern_nocache, but cache the result.
169 # PROP is the property we're checking, and doubles as a prefix for
170 # temporary filenames.
171 proc check_no_messages_and_pattern {prop pattern args} {
172 return [check_cached_effective_target $prop {
173 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
174 }]
175 }
176
177 # Try to compile and run an executable from code CONTENTS. Return true
178 # if the compiler reports no messages and if execution "passes" in the
179 # usual DejaGNU sense. The arguments are as for check_compile, with
180 # TYPE implicitly being "executable".
181 proc check_runtime_nocache {basename contents args} {
182 global tool
183
184 set result [eval [list check_compile $basename executable $contents] $args]
185 set lines [lindex $result 0]
186 set output [lindex $result 1]
187
188 set ok 0
189 if { [string match "" $lines] } {
190 # No error messages, everything is OK.
191 set result [remote_load target "./$output" "" ""]
192 set status [lindex $result 0]
193 verbose "check_runtime_nocache $basename: status is <$status>" 2
194 if { $status == "pass" } {
195 set ok 1
196 }
197 }
198 remote_file build delete $output
199 return $ok
200 }
201
202 # Like check_runtime_nocache, but cache the result. PROP is the
203 # property we're checking, and doubles as a prefix for temporary
204 # filenames.
205 proc check_runtime {prop args} {
206 global tool
207
208 return [check_cached_effective_target $prop {
209 eval [list check_runtime_nocache $prop] $args
210 }]
211 }
212
213 ###############################
214 # proc check_weak_available { }
215 ###############################
216
217 # weak symbols are only supported in some configs/object formats
218 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
219
220 proc check_weak_available { } {
221 global target_cpu
222
223 # All mips targets should support it
224
225 if { [ string first "mips" $target_cpu ] >= 0 } {
226 return 1
227 }
228
229 # All AIX targets should support it
230
231 if { [istarget *-*-aix*] } {
232 return 1
233 }
234
235 # All solaris2 targets should support it
236
237 if { [istarget *-*-solaris2*] } {
238 return 1
239 }
240
241 # Windows targets Cygwin and MingW32 support it
242
243 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
244 return 1
245 }
246
247 # HP-UX 10.X doesn't support it
248
249 if { [istarget hppa*-*-hpux10*] } {
250 return 0
251 }
252
253 # ELF and ECOFF support it. a.out does with gas/gld but may also with
254 # other linkers, so we should try it
255
256 set objformat [gcc_target_object_format]
257
258 switch $objformat {
259 elf { return 1 }
260 ecoff { return 1 }
261 a.out { return 1 }
262 mach-o { return 1 }
263 som { return 1 }
264 unknown { return -1 }
265 default { return 0 }
266 }
267 }
268
269 ###############################
270 # proc check_weak_override_available { }
271 ###############################
272
273 # Like check_weak_available, but return 0 if weak symbol definitions
274 # cannot be overridden.
275
276 proc check_weak_override_available { } {
277 if { [istarget *-*-mingw*] } {
278 return 0
279 }
280 return [check_weak_available]
281 }
282
283 ###############################
284 # proc check_visibility_available { what_kind }
285 ###############################
286
287 # The visibility attribute is only support in some object formats
288 # This proc returns 1 if it is supported, 0 if not.
289 # The argument is the kind of visibility, default/protected/hidden/internal.
290
291 proc check_visibility_available { what_kind } {
292 if [string match "" $what_kind] { set what_kind "hidden" }
293
294 return [check_no_compiler_messages visibility_available_$what_kind object "
295 void f() __attribute__((visibility(\"$what_kind\")));
296 void f() {}
297 "]
298 }
299
300 ###############################
301 # proc check_alias_available { }
302 ###############################
303
304 # Determine if the target toolchain supports the alias attribute.
305
306 # Returns 2 if the target supports aliases. Returns 1 if the target
307 # only supports weak aliased. Returns 0 if the target does not
308 # support aliases at all. Returns -1 if support for aliases could not
309 # be determined.
310
311 proc check_alias_available { } {
312 global alias_available_saved
313 global tool
314
315 if [info exists alias_available_saved] {
316 verbose "check_alias_available returning saved $alias_available_saved" 2
317 } else {
318 set src alias[pid].c
319 set obj alias[pid].o
320 verbose "check_alias_available compiling testfile $src" 2
321 set f [open $src "w"]
322 # Compile a small test program. The definition of "g" is
323 # necessary to keep the Solaris assembler from complaining
324 # about the program.
325 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
326 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
327 close $f
328 set lines [${tool}_target_compile $src $obj object ""]
329 file delete $src
330 remote_file build delete $obj
331
332 if [string match "" $lines] then {
333 # No error messages, everything is OK.
334 set alias_available_saved 2
335 } else {
336 if [regexp "alias definitions not supported" $lines] {
337 verbose "check_alias_available target does not support aliases" 2
338
339 set objformat [gcc_target_object_format]
340
341 if { $objformat == "elf" } {
342 verbose "check_alias_available but target uses ELF format, so it ought to" 2
343 set alias_available_saved -1
344 } else {
345 set alias_available_saved 0
346 }
347 } else {
348 if [regexp "only weak aliases are supported" $lines] {
349 verbose "check_alias_available target supports only weak aliases" 2
350 set alias_available_saved 1
351 } else {
352 set alias_available_saved -1
353 }
354 }
355 }
356
357 verbose "check_alias_available returning $alias_available_saved" 2
358 }
359
360 return $alias_available_saved
361 }
362
363 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
364
365 proc check_effective_target_alias { } {
366 if { [check_alias_available] < 2 } {
367 return 0
368 } else {
369 return 1
370 }
371 }
372
373 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
374
375 proc check_ifunc_available { } {
376 return [check_no_compiler_messages ifunc_available object {
377 #ifdef __cplusplus
378 extern "C"
379 #endif
380 void g() {}
381 void f() __attribute__((ifunc("g")));
382 }]
383 }
384
385 # Returns true if --gc-sections is supported on the target.
386
387 proc check_gc_sections_available { } {
388 global gc_sections_available_saved
389 global tool
390
391 if {![info exists gc_sections_available_saved]} {
392 # Some targets don't support gc-sections despite whatever's
393 # advertised by ld's options.
394 if { [istarget alpha*-*-*]
395 || [istarget ia64-*-*] } {
396 set gc_sections_available_saved 0
397 return 0
398 }
399
400 # elf2flt uses -q (--emit-relocs), which is incompatible with
401 # --gc-sections.
402 if { [board_info target exists ldflags]
403 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
404 set gc_sections_available_saved 0
405 return 0
406 }
407
408 # VxWorks kernel modules are relocatable objects linked with -r,
409 # while RTP executables are linked with -q (--emit-relocs).
410 # Both of these options are incompatible with --gc-sections.
411 if { [istarget *-*-vxworks*] } {
412 set gc_sections_available_saved 0
413 return 0
414 }
415
416 # Check if the ld used by gcc supports --gc-sections.
417 set gcc_spec [${tool}_target_compile "-dumpspecs" "" "none" ""]
418 regsub ".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
419 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=$linker" "" "none" ""] 0]
420 set ld_output [remote_exec host "$gcc_ld" "--help"]
421 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
422 set gc_sections_available_saved 1
423 } else {
424 set gc_sections_available_saved 0
425 }
426 }
427 return $gc_sections_available_saved
428 }
429
430 # Return 1 if according to target_info struct and explicit target list
431 # target is supposed to support trampolines.
432
433 proc check_effective_target_trampolines { } {
434 if [target_info exists no_trampolines] {
435 return 0
436 }
437 if { [istarget avr-*-*]
438 || [istarget msp430-*-*]
439 || [istarget hppa2.0w-hp-hpux11.23]
440 || [istarget hppa64-hp-hpux11.23] } {
441 return 0;
442 }
443 return 1
444 }
445
446 # Return 1 if according to target_info struct and explicit target list
447 # target is supposed to keep null pointer checks. This could be due to
448 # use of option fno-delete-null-pointer-checks or hardwired in target.
449
450 proc check_effective_target_keeps_null_pointer_checks { } {
451 if [target_info exists keeps_null_pointer_checks] {
452 return 1
453 }
454 if { [istarget avr-*-*] } {
455 return 1;
456 }
457 return 0
458 }
459
460 # Return true if profiling is supported on the target.
461
462 proc check_profiling_available { test_what } {
463 global profiling_available_saved
464
465 verbose "Profiling argument is <$test_what>" 1
466
467 # These conditions depend on the argument so examine them before
468 # looking at the cache variable.
469
470 # Tree profiling requires TLS runtime support.
471 if { $test_what == "-fprofile-generate" } {
472 if { ![check_effective_target_tls_runtime] } {
473 return 0
474 }
475 }
476
477 # Support for -p on solaris2 relies on mcrt1.o which comes with the
478 # vendor compiler. We cannot reliably predict the directory where the
479 # vendor compiler (and thus mcrt1.o) is installed so we can't
480 # necessarily find mcrt1.o even if we have it.
481 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
482 return 0
483 }
484
485 # We don't yet support profiling for MIPS16.
486 if { [istarget mips*-*-*]
487 && ![check_effective_target_nomips16]
488 && ($test_what == "-p" || $test_what == "-pg") } {
489 return 0
490 }
491
492 # MinGW does not support -p.
493 if { [istarget *-*-mingw*] && $test_what == "-p" } {
494 return 0
495 }
496
497 # cygwin does not support -p.
498 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
499 return 0
500 }
501
502 # uClibc does not have gcrt1.o.
503 if { [check_effective_target_uclibc]
504 && ($test_what == "-p" || $test_what == "-pg") } {
505 return 0
506 }
507
508 # Now examine the cache variable.
509 if {![info exists profiling_available_saved]} {
510 # Some targets don't have any implementation of __bb_init_func or are
511 # missing other needed machinery.
512 if { [istarget aarch64*-*-elf]
513 || [istarget am3*-*-linux*]
514 || [istarget arm*-*-eabi*]
515 || [istarget arm*-*-elf]
516 || [istarget arm*-*-symbianelf*]
517 || [istarget avr-*-*]
518 || [istarget bfin-*-*]
519 || [istarget cris-*-*]
520 || [istarget crisv32-*-*]
521 || [istarget fido-*-elf]
522 || [istarget h8300-*-*]
523 || [istarget lm32-*-*]
524 || [istarget m32c-*-elf]
525 || [istarget m68k-*-elf]
526 || [istarget m68k-*-uclinux*]
527 || [istarget mep-*-elf]
528 || [istarget mips*-*-elf*]
529 || [istarget mmix-*-*]
530 || [istarget mn10300-*-elf*]
531 || [istarget moxie-*-elf*]
532 || [istarget msp430-*-*]
533 || [istarget nds32*-*-elf]
534 || [istarget nios2-*-elf]
535 || [istarget powerpc-*-eabi*]
536 || [istarget powerpc-*-elf]
537 || [istarget rx-*-*]
538 || [istarget tic6x-*-elf]
539 || [istarget xstormy16-*]
540 || [istarget xtensa*-*-elf]
541 || [istarget *-*-rtems*]
542 || [istarget *-*-vxworks*] } {
543 set profiling_available_saved 0
544 } else {
545 set profiling_available_saved 1
546 }
547 }
548
549 return $profiling_available_saved
550 }
551
552 # Check to see if a target is "freestanding". This is as per the definition
553 # in Section 4 of C99 standard. Effectively, it is a target which supports no
554 # extra headers or libraries other than what is considered essential.
555 proc check_effective_target_freestanding { } {
556 return 0
557 }
558
559 # Return 1 if target has packed layout of structure members by
560 # default, 0 otherwise. Note that this is slightly different than
561 # whether the target has "natural alignment": both attributes may be
562 # false.
563
564 proc check_effective_target_default_packed { } {
565 return [check_no_compiler_messages default_packed assembly {
566 struct x { char a; long b; } c;
567 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
568 }]
569 }
570
571 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
572 # documentation, where the test also comes from.
573
574 proc check_effective_target_pcc_bitfield_type_matters { } {
575 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
576 # bitfields, but let's stick to the example code from the docs.
577 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
578 struct foo1 { char x; char :0; char y; };
579 struct foo2 { char x; int :0; char y; };
580 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
581 }]
582 }
583
584 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
585
586 proc add_options_for_tls { flags } {
587 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
588 # libthread, so always pass -pthread for native TLS. Same for AIX.
589 # Need to duplicate native TLS check from
590 # check_effective_target_tls_native to avoid recursion.
591 if { ([istarget powerpc-ibm-aix*]) &&
592 [check_no_messages_and_pattern tls_native "!emutls" assembly {
593 __thread int i;
594 int f (void) { return i; }
595 void g (int j) { i = j; }
596 }] } {
597 return "$flags -pthread"
598 }
599 return $flags
600 }
601
602 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
603
604 proc check_effective_target_tls {} {
605 return [check_no_compiler_messages tls assembly {
606 __thread int i;
607 int f (void) { return i; }
608 void g (int j) { i = j; }
609 }]
610 }
611
612 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
613
614 proc check_effective_target_tls_native {} {
615 # VxWorks uses emulated TLS machinery, but with non-standard helper
616 # functions, so we fail to automatically detect it.
617 if { [istarget *-*-vxworks*] } {
618 return 0
619 }
620
621 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
622 __thread int i;
623 int f (void) { return i; }
624 void g (int j) { i = j; }
625 }]
626 }
627
628 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
629
630 proc check_effective_target_tls_emulated {} {
631 # VxWorks uses emulated TLS machinery, but with non-standard helper
632 # functions, so we fail to automatically detect it.
633 if { [istarget *-*-vxworks*] } {
634 return 1
635 }
636
637 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
638 __thread int i;
639 int f (void) { return i; }
640 void g (int j) { i = j; }
641 }]
642 }
643
644 # Return 1 if TLS executables can run correctly, 0 otherwise.
645
646 proc check_effective_target_tls_runtime {} {
647 # MSP430 runtime does not have TLS support, but just
648 # running the test below is insufficient to show this.
649 if { [istarget msp430-*-*] } {
650 return 0
651 }
652 return [check_runtime tls_runtime {
653 __thread int thr = 0;
654 int main (void) { return thr; }
655 } [add_options_for_tls ""]]
656 }
657
658 # Return 1 if atomic compare-and-swap is supported on 'int'
659
660 proc check_effective_target_cas_char {} {
661 return [check_no_compiler_messages cas_char assembly {
662 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
663 #error unsupported
664 #endif
665 } ""]
666 }
667
668 proc check_effective_target_cas_int {} {
669 return [check_no_compiler_messages cas_int assembly {
670 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
671 /* ok */
672 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
673 /* ok */
674 #else
675 #error unsupported
676 #endif
677 } ""]
678 }
679
680 # Return 1 if -ffunction-sections is supported, 0 otherwise.
681
682 proc check_effective_target_function_sections {} {
683 # Darwin has its own scheme and silently accepts -ffunction-sections.
684 if { [istarget *-*-darwin*] } {
685 return 0
686 }
687
688 return [check_no_compiler_messages functionsections assembly {
689 void foo (void) { }
690 } "-ffunction-sections"]
691 }
692
693 # Return 1 if instruction scheduling is available, 0 otherwise.
694
695 proc check_effective_target_scheduling {} {
696 return [check_no_compiler_messages scheduling object {
697 void foo (void) { }
698 } "-fschedule-insns"]
699 }
700
701 # Return 1 if trapping arithmetic is available, 0 otherwise.
702
703 proc check_effective_target_trapping {} {
704 return [check_no_compiler_messages trapping object {
705 int add (int a, int b) { return a + b; }
706 } "-ftrapv"]
707 }
708
709 # Return 1 if compilation with -fgraphite is error-free for trivial
710 # code, 0 otherwise.
711
712 proc check_effective_target_fgraphite {} {
713 return [check_no_compiler_messages fgraphite object {
714 void foo (void) { }
715 } "-O1 -fgraphite"]
716 }
717
718 # Return 1 if compilation with -fopenmp is error-free for trivial
719 # code, 0 otherwise.
720
721 proc check_effective_target_fopenmp {} {
722 return [check_no_compiler_messages fopenmp object {
723 void foo (void) { }
724 } "-fopenmp"]
725 }
726
727 # Return 1 if compilation with -fgnu-tm is error-free for trivial
728 # code, 0 otherwise.
729
730 proc check_effective_target_fgnu_tm {} {
731 return [check_no_compiler_messages fgnu_tm object {
732 void foo (void) { }
733 } "-fgnu-tm"]
734 }
735
736 # Return 1 if the target supports mmap, 0 otherwise.
737
738 proc check_effective_target_mmap {} {
739 return [check_function_available "mmap"]
740 }
741
742 # Return 1 if the target supports dlopen, 0 otherwise.
743 proc check_effective_target_dlopen {} {
744 return [check_no_compiler_messages dlopen executable {
745 #include <dlfcn.h>
746 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
747 } [add_options_for_dlopen ""]]
748 }
749
750 proc add_options_for_dlopen { flags } {
751 return "$flags -ldl"
752 }
753
754 # Return 1 if the target supports clone, 0 otherwise.
755 proc check_effective_target_clone {} {
756 return [check_function_available "clone"]
757 }
758
759 # Return 1 if the target supports setrlimit, 0 otherwise.
760 proc check_effective_target_setrlimit {} {
761 # Darwin has non-posix compliant RLIMIT_AS
762 if { [istarget *-*-darwin*] } {
763 return 0
764 }
765 return [check_function_available "setrlimit"]
766 }
767
768 # Return 1 if the target supports swapcontext, 0 otherwise.
769 proc check_effective_target_swapcontext {} {
770 return [check_no_compiler_messages swapcontext executable {
771 #include <ucontext.h>
772 int main (void)
773 {
774 ucontext_t orig_context,child_context;
775 if (swapcontext(&child_context, &orig_context) < 0) { }
776 }
777 }]
778 }
779
780 # Return 1 if compilation with -pthread is error-free for trivial
781 # code, 0 otherwise.
782
783 proc check_effective_target_pthread {} {
784 return [check_no_compiler_messages pthread object {
785 void foo (void) { }
786 } "-pthread"]
787 }
788
789 # Return 1 if compilation with -mpe-aligned-commons is error-free
790 # for trivial code, 0 otherwise.
791
792 proc check_effective_target_pe_aligned_commons {} {
793 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
794 return [check_no_compiler_messages pe_aligned_commons object {
795 int foo;
796 } "-mpe-aligned-commons"]
797 }
798 return 0
799 }
800
801 # Return 1 if the target supports -static
802 proc check_effective_target_static {} {
803 return [check_no_compiler_messages static executable {
804 int main (void) { return 0; }
805 } "-static"]
806 }
807
808 # Return 1 if the target supports -fstack-protector
809 proc check_effective_target_fstack_protector {} {
810 return [check_runtime fstack_protector {
811 int main (void) { return 0; }
812 } "-fstack-protector"]
813 }
814
815 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
816 # for trivial code, 0 otherwise.
817
818 proc check_effective_target_freorder {} {
819 return [check_no_compiler_messages freorder object {
820 void foo (void) { }
821 } "-freorder-blocks-and-partition"]
822 }
823
824 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
825 # emitted, 0 otherwise. Whether a shared library can actually be built is
826 # out of scope for this test.
827
828 proc check_effective_target_fpic { } {
829 # Note that M68K has a multilib that supports -fpic but not
830 # -fPIC, so we need to check both. We test with a program that
831 # requires GOT references.
832 foreach arg {fpic fPIC} {
833 if [check_no_compiler_messages $arg object {
834 extern int foo (void); extern int bar;
835 int baz (void) { return foo () + bar; }
836 } "-$arg"] {
837 return 1
838 }
839 }
840 return 0
841 }
842
843 # Return 1 if -shared is supported, as in no warnings or errors
844 # emitted, 0 otherwise.
845
846 proc check_effective_target_shared { } {
847 # Note that M68K has a multilib that supports -fpic but not
848 # -fPIC, so we need to check both. We test with a program that
849 # requires GOT references.
850 return [check_no_compiler_messages shared executable {
851 extern int foo (void); extern int bar;
852 int baz (void) { return foo () + bar; }
853 } "-shared -fpic"]
854 }
855
856 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
857
858 proc check_effective_target_pie { } {
859 if { [istarget *-*-darwin\[912\]*]
860 || [istarget *-*-linux*]
861 || [istarget *-*-gnu*] } {
862 return 1;
863 }
864 return 0
865 }
866
867 # Return true if the target supports -mpaired-single (as used on MIPS).
868
869 proc check_effective_target_mpaired_single { } {
870 return [check_no_compiler_messages mpaired_single object {
871 void foo (void) { }
872 } "-mpaired-single"]
873 }
874
875 # Return true if the target has access to FPU instructions.
876
877 proc check_effective_target_hard_float { } {
878 if { [istarget mips*-*-*] } {
879 return [check_no_compiler_messages hard_float assembly {
880 #if (defined __mips_soft_float || defined __mips16)
881 #error __mips_soft_float || __mips16
882 #endif
883 }]
884 }
885
886 # This proc is actually checking the availabilty of FPU
887 # support for doubles, so on the RX we must fail if the
888 # 64-bit double multilib has been selected.
889 if { [istarget rx-*-*] } {
890 return 0
891 # return [check_no_compiler_messages hard_float assembly {
892 #if defined __RX_64_BIT_DOUBLES__
893 #error __RX_64_BIT_DOUBLES__
894 #endif
895 # }]
896 }
897
898 # The generic test equates hard_float with "no call for adding doubles".
899 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
900 double a (double b, double c) { return b + c; }
901 }]
902 }
903
904 # Return true if the target is a 64-bit MIPS target.
905
906 proc check_effective_target_mips64 { } {
907 return [check_no_compiler_messages mips64 assembly {
908 #ifndef __mips64
909 #error !__mips64
910 #endif
911 }]
912 }
913
914 # Return true if the target is a MIPS target that does not produce
915 # MIPS16 code.
916
917 proc check_effective_target_nomips16 { } {
918 return [check_no_compiler_messages nomips16 object {
919 #ifndef __mips
920 #error !__mips
921 #else
922 /* A cheap way of testing for -mflip-mips16. */
923 void foo (void) { asm ("addiu $20,$20,1"); }
924 void bar (void) { asm ("addiu $20,$20,1"); }
925 #endif
926 }]
927 }
928
929 # Add the options needed for MIPS16 function attributes. At the moment,
930 # we don't support MIPS16 PIC.
931
932 proc add_options_for_mips16_attribute { flags } {
933 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
934 }
935
936 # Return true if we can force a mode that allows MIPS16 code generation.
937 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
938 # for o32 and o64.
939
940 proc check_effective_target_mips16_attribute { } {
941 return [check_no_compiler_messages mips16_attribute assembly {
942 #ifdef PIC
943 #error PIC
944 #endif
945 #if defined __mips_hard_float \
946 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
947 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
948 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
949 #endif
950 } [add_options_for_mips16_attribute ""]]
951 }
952
953 # Return 1 if the target supports long double larger than double when
954 # using the new ABI, 0 otherwise.
955
956 proc check_effective_target_mips_newabi_large_long_double { } {
957 return [check_no_compiler_messages mips_newabi_large_long_double object {
958 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
959 } "-mabi=64"]
960 }
961
962 # Return true if the target is a MIPS target that has access
963 # to the LL and SC instructions.
964
965 proc check_effective_target_mips_llsc { } {
966 if { ![istarget mips*-*-*] } {
967 return 0
968 }
969 # Assume that these instructions are always implemented for
970 # non-elf* targets, via emulation if necessary.
971 if { ![istarget *-*-elf*] } {
972 return 1
973 }
974 # Otherwise assume LL/SC support for everything but MIPS I.
975 return [check_no_compiler_messages mips_llsc assembly {
976 #if __mips == 1
977 #error __mips == 1
978 #endif
979 }]
980 }
981
982 # Return true if the target is a MIPS target that uses in-place relocations.
983
984 proc check_effective_target_mips_rel { } {
985 if { ![istarget mips*-*-*] } {
986 return 0
987 }
988 return [check_no_compiler_messages mips_rel object {
989 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
990 || (defined _ABI64 && _MIPS_SIM == _ABI64)
991 #error _ABIN32 && (_ABIN32 || _ABI64)
992 #endif
993 }]
994 }
995
996 # Return true if the target is a MIPS target that uses the EABI.
997
998 proc check_effective_target_mips_eabi { } {
999 if { ![istarget mips*-*-*] } {
1000 return 0
1001 }
1002 return [check_no_compiler_messages mips_eabi object {
1003 #ifndef __mips_eabi
1004 #error !__mips_eabi
1005 #endif
1006 }]
1007 }
1008
1009 # Return 1 if the current multilib does not generate PIC by default.
1010
1011 proc check_effective_target_nonpic { } {
1012 return [check_no_compiler_messages nonpic assembly {
1013 #if __PIC__
1014 #error __PIC__
1015 #endif
1016 }]
1017 }
1018
1019 # Return 1 if the target does not use a status wrapper.
1020
1021 proc check_effective_target_unwrapped { } {
1022 if { [target_info needs_status_wrapper] != "" \
1023 && [target_info needs_status_wrapper] != "0" } {
1024 return 0
1025 }
1026 return 1
1027 }
1028
1029 # Return true if iconv is supported on the target. In particular IBM1047.
1030
1031 proc check_iconv_available { test_what } {
1032 global libiconv
1033
1034 # If the tool configuration file has not set libiconv, try "-liconv"
1035 if { ![info exists libiconv] } {
1036 set libiconv "-liconv"
1037 }
1038 set test_what [lindex $test_what 1]
1039 return [check_runtime_nocache $test_what [subst {
1040 #include <iconv.h>
1041 int main (void)
1042 {
1043 iconv_t cd;
1044
1045 cd = iconv_open ("$test_what", "UTF-8");
1046 if (cd == (iconv_t) -1)
1047 return 1;
1048 return 0;
1049 }
1050 }] $libiconv]
1051 }
1052
1053 # Return true if Cilk Library is supported on the target.
1054 proc check_libcilkrts_available { } {
1055 return [ check_no_compiler_messages_nocache libcilkrts_available executable {
1056 #ifdef __cplusplus
1057 extern "C"
1058 #endif
1059 int __cilkrts_set_param (const char *, const char *);
1060 int main (void) {
1061 int x = __cilkrts_set_param ("nworkers", "0");
1062 return x;
1063 }
1064 } "-fcilkplus -lcilkrts" ]
1065 }
1066
1067 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1068
1069 proc check_ascii_locale_available { } {
1070 return 1
1071 }
1072
1073 # Return true if named sections are supported on this target.
1074
1075 proc check_named_sections_available { } {
1076 return [check_no_compiler_messages named_sections assembly {
1077 int __attribute__ ((section("whatever"))) foo;
1078 }]
1079 }
1080
1081 # Return true if the "naked" function attribute is supported on this target.
1082
1083 proc check_effective_target_naked_functions { } {
1084 return [check_no_compiler_messages naked_functions assembly {
1085 void f() __attribute__((naked));
1086 }]
1087 }
1088
1089 # Return 1 if the target supports Fortran real kinds larger than real(8),
1090 # 0 otherwise.
1091 #
1092 # When the target name changes, replace the cached result.
1093
1094 proc check_effective_target_fortran_large_real { } {
1095 return [check_no_compiler_messages fortran_large_real executable {
1096 ! Fortran
1097 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1098 real(kind=k) :: x
1099 x = cos (x)
1100 end
1101 }]
1102 }
1103
1104 # Return 1 if the target supports Fortran real kind real(16),
1105 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1106 # this checks for Real(16) only; the other returned real(10) if
1107 # both real(10) and real(16) are available.
1108 #
1109 # When the target name changes, replace the cached result.
1110
1111 proc check_effective_target_fortran_real_16 { } {
1112 return [check_no_compiler_messages fortran_real_16 executable {
1113 ! Fortran
1114 real(kind=16) :: x
1115 x = cos (x)
1116 end
1117 }]
1118 }
1119
1120
1121 # Return 1 if the target supports Fortran's IEEE modules,
1122 # 0 otherwise.
1123 #
1124 # When the target name changes, replace the cached result.
1125
1126 proc check_effective_target_fortran_ieee { flags } {
1127 return [check_no_compiler_messages fortran_ieee executable {
1128 ! Fortran
1129 use, intrinsic :: ieee_features
1130 end
1131 } $flags ]
1132 }
1133
1134
1135 # Return 1 if the target supports SQRT for the largest floating-point
1136 # type. (Some targets lack the libm support for this FP type.)
1137 # On most targets, this check effectively checks either whether sqrtl is
1138 # available or on __float128 systems whether libquadmath is installed,
1139 # which provides sqrtq.
1140 #
1141 # When the target name changes, replace the cached result.
1142
1143 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1144 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1145 ! Fortran
1146 use iso_fortran_env, only: real_kinds
1147 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1148 real(kind=maxFP), volatile :: x
1149 x = 2.0_maxFP
1150 x = sqrt (x)
1151 end
1152 }]
1153 }
1154
1155
1156 # Return 1 if the target supports Fortran integer kinds larger than
1157 # integer(8), 0 otherwise.
1158 #
1159 # When the target name changes, replace the cached result.
1160
1161 proc check_effective_target_fortran_large_int { } {
1162 return [check_no_compiler_messages fortran_large_int executable {
1163 ! Fortran
1164 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1165 integer(kind=k) :: i
1166 end
1167 }]
1168 }
1169
1170 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1171 #
1172 # When the target name changes, replace the cached result.
1173
1174 proc check_effective_target_fortran_integer_16 { } {
1175 return [check_no_compiler_messages fortran_integer_16 executable {
1176 ! Fortran
1177 integer(16) :: i
1178 end
1179 }]
1180 }
1181
1182 # Return 1 if we can statically link libgfortran, 0 otherwise.
1183 #
1184 # When the target name changes, replace the cached result.
1185
1186 proc check_effective_target_static_libgfortran { } {
1187 return [check_no_compiler_messages static_libgfortran executable {
1188 ! Fortran
1189 print *, 'test'
1190 end
1191 } "-static"]
1192 }
1193
1194 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1195
1196 proc check_effective_target_cilkplus { } {
1197 # Skip cilk-plus tests on int16 and size16 targets for now.
1198 # The cilk-plus tests are not generic enough to cover these
1199 # cases and would throw hundreds of FAILs.
1200 if { [check_effective_target_int16]
1201 || ![check_effective_target_size32plus] } {
1202 return 0;
1203 }
1204
1205 # Skip AVR, its RAM is too small and too many tests would fail.
1206 if { [istarget avr-*-*] } {
1207 return 0;
1208 }
1209 return 1
1210 }
1211
1212 proc check_linker_plugin_available { } {
1213 return [check_no_compiler_messages_nocache linker_plugin executable {
1214 int main() { return 0; }
1215 } "-flto -fuse-linker-plugin"]
1216 }
1217
1218 # Return 1 if the target supports executing 750CL paired-single instructions, 0
1219 # otherwise. Cache the result.
1220
1221 proc check_750cl_hw_available { } {
1222 return [check_cached_effective_target 750cl_hw_available {
1223 # If this is not the right target then we can skip the test.
1224 if { ![istarget powerpc-*paired*] } {
1225 expr 0
1226 } else {
1227 check_runtime_nocache 750cl_hw_available {
1228 int main()
1229 {
1230 #ifdef __MACH__
1231 asm volatile ("ps_mul v0,v0,v0");
1232 #else
1233 asm volatile ("ps_mul 0,0,0");
1234 #endif
1235 return 0;
1236 }
1237 } "-mpaired"
1238 }
1239 }]
1240 }
1241
1242 # Return 1 if the target OS supports running SSE executables, 0
1243 # otherwise. Cache the result.
1244
1245 proc check_sse_os_support_available { } {
1246 return [check_cached_effective_target sse_os_support_available {
1247 # If this is not the right target then we can skip the test.
1248 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1249 expr 0
1250 } elseif { [istarget i?86-*-solaris2*] } {
1251 # The Solaris 2 kernel doesn't save and restore SSE registers
1252 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1253 check_runtime_nocache sse_os_support_available {
1254 int main ()
1255 {
1256 asm volatile ("movaps %xmm0,%xmm0");
1257 return 0;
1258 }
1259 } "-msse"
1260 } else {
1261 expr 1
1262 }
1263 }]
1264 }
1265
1266 # Return 1 if the target OS supports running AVX executables, 0
1267 # otherwise. Cache the result.
1268
1269 proc check_avx_os_support_available { } {
1270 return [check_cached_effective_target avx_os_support_available {
1271 # If this is not the right target then we can skip the test.
1272 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1273 expr 0
1274 } else {
1275 # Check that OS has AVX and SSE saving enabled.
1276 check_runtime_nocache avx_os_support_available {
1277 int main ()
1278 {
1279 unsigned int eax, edx;
1280
1281 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1282 return (eax & 6) != 6;
1283 }
1284 } ""
1285 }
1286 }]
1287 }
1288
1289 # Return 1 if the target supports executing SSE instructions, 0
1290 # otherwise. Cache the result.
1291
1292 proc check_sse_hw_available { } {
1293 return [check_cached_effective_target sse_hw_available {
1294 # If this is not the right target then we can skip the test.
1295 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1296 expr 0
1297 } else {
1298 check_runtime_nocache sse_hw_available {
1299 #include "cpuid.h"
1300 int main ()
1301 {
1302 unsigned int eax, ebx, ecx, edx;
1303 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1304 return !(edx & bit_SSE);
1305 return 1;
1306 }
1307 } ""
1308 }
1309 }]
1310 }
1311
1312 # Return 1 if the target supports executing SSE2 instructions, 0
1313 # otherwise. Cache the result.
1314
1315 proc check_sse2_hw_available { } {
1316 return [check_cached_effective_target sse2_hw_available {
1317 # If this is not the right target then we can skip the test.
1318 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1319 expr 0
1320 } else {
1321 check_runtime_nocache sse2_hw_available {
1322 #include "cpuid.h"
1323 int main ()
1324 {
1325 unsigned int eax, ebx, ecx, edx;
1326 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1327 return !(edx & bit_SSE2);
1328 return 1;
1329 }
1330 } ""
1331 }
1332 }]
1333 }
1334
1335 # Return 1 if the target supports executing AVX instructions, 0
1336 # otherwise. Cache the result.
1337
1338 proc check_avx_hw_available { } {
1339 return [check_cached_effective_target avx_hw_available {
1340 # If this is not the right target then we can skip the test.
1341 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1342 expr 0
1343 } else {
1344 check_runtime_nocache avx_hw_available {
1345 #include "cpuid.h"
1346 int main ()
1347 {
1348 unsigned int eax, ebx, ecx, edx;
1349 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1350 return ((ecx & (bit_AVX | bit_OSXSAVE))
1351 != (bit_AVX | bit_OSXSAVE));
1352 return 1;
1353 }
1354 } ""
1355 }
1356 }]
1357 }
1358
1359 # Return 1 if the target supports running SSE executables, 0 otherwise.
1360
1361 proc check_effective_target_sse_runtime { } {
1362 if { [check_effective_target_sse]
1363 && [check_sse_hw_available]
1364 && [check_sse_os_support_available] } {
1365 return 1
1366 }
1367 return 0
1368 }
1369
1370 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1371
1372 proc check_effective_target_sse2_runtime { } {
1373 if { [check_effective_target_sse2]
1374 && [check_sse2_hw_available]
1375 && [check_sse_os_support_available] } {
1376 return 1
1377 }
1378 return 0
1379 }
1380
1381 # Return 1 if the target supports running AVX executables, 0 otherwise.
1382
1383 proc check_effective_target_avx_runtime { } {
1384 if { [check_effective_target_avx]
1385 && [check_avx_hw_available]
1386 && [check_avx_os_support_available] } {
1387 return 1
1388 }
1389 return 0
1390 }
1391
1392 # Return 1 if the target supports executing power8 vector instructions, 0
1393 # otherwise. Cache the result.
1394
1395 proc check_p8vector_hw_available { } {
1396 return [check_cached_effective_target p8vector_hw_available {
1397 # Some simulators are known to not support VSX/power8 instructions.
1398 # For now, disable on Darwin
1399 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1400 expr 0
1401 } else {
1402 set options "-mpower8-vector"
1403 check_runtime_nocache p8vector_hw_available {
1404 int main()
1405 {
1406 #ifdef __MACH__
1407 asm volatile ("xxlorc vs0,vs0,vs0");
1408 #else
1409 asm volatile ("xxlorc 0,0,0");
1410 #endif
1411 return 0;
1412 }
1413 } $options
1414 }
1415 }]
1416 }
1417
1418 # Return 1 if the target supports executing VSX instructions, 0
1419 # otherwise. Cache the result.
1420
1421 proc check_vsx_hw_available { } {
1422 return [check_cached_effective_target vsx_hw_available {
1423 # Some simulators are known to not support VSX instructions.
1424 # For now, disable on Darwin
1425 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1426 expr 0
1427 } else {
1428 set options "-mvsx"
1429 check_runtime_nocache vsx_hw_available {
1430 int main()
1431 {
1432 #ifdef __MACH__
1433 asm volatile ("xxlor vs0,vs0,vs0");
1434 #else
1435 asm volatile ("xxlor 0,0,0");
1436 #endif
1437 return 0;
1438 }
1439 } $options
1440 }
1441 }]
1442 }
1443
1444 # Return 1 if the target supports executing AltiVec instructions, 0
1445 # otherwise. Cache the result.
1446
1447 proc check_vmx_hw_available { } {
1448 return [check_cached_effective_target vmx_hw_available {
1449 # Some simulators are known to not support VMX instructions.
1450 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
1451 expr 0
1452 } else {
1453 # Most targets don't require special flags for this test case, but
1454 # Darwin does. Just to be sure, make sure VSX is not enabled for
1455 # the altivec tests.
1456 if { [istarget *-*-darwin*]
1457 || [istarget *-*-aix*] } {
1458 set options "-maltivec -mno-vsx"
1459 } else {
1460 set options "-mno-vsx"
1461 }
1462 check_runtime_nocache vmx_hw_available {
1463 int main()
1464 {
1465 #ifdef __MACH__
1466 asm volatile ("vor v0,v0,v0");
1467 #else
1468 asm volatile ("vor 0,0,0");
1469 #endif
1470 return 0;
1471 }
1472 } $options
1473 }
1474 }]
1475 }
1476
1477 proc check_ppc_recip_hw_available { } {
1478 return [check_cached_effective_target ppc_recip_hw_available {
1479 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
1480 # For now, disable on Darwin
1481 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1482 expr 0
1483 } else {
1484 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
1485 check_runtime_nocache ppc_recip_hw_available {
1486 volatile double d_recip, d_rsqrt, d_four = 4.0;
1487 volatile float f_recip, f_rsqrt, f_four = 4.0f;
1488 int main()
1489 {
1490 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
1491 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
1492 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
1493 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
1494 return 0;
1495 }
1496 } $options
1497 }
1498 }]
1499 }
1500
1501 # Return 1 if the target supports executing AltiVec and Cell PPU
1502 # instructions, 0 otherwise. Cache the result.
1503
1504 proc check_effective_target_cell_hw { } {
1505 return [check_cached_effective_target cell_hw_available {
1506 # Some simulators are known to not support VMX and PPU instructions.
1507 if { [istarget powerpc-*-eabi*] } {
1508 expr 0
1509 } else {
1510 # Most targets don't require special flags for this test
1511 # case, but Darwin and AIX do.
1512 if { [istarget *-*-darwin*]
1513 || [istarget *-*-aix*] } {
1514 set options "-maltivec -mcpu=cell"
1515 } else {
1516 set options "-mcpu=cell"
1517 }
1518 check_runtime_nocache cell_hw_available {
1519 int main()
1520 {
1521 #ifdef __MACH__
1522 asm volatile ("vor v0,v0,v0");
1523 asm volatile ("lvlx v0,r0,r0");
1524 #else
1525 asm volatile ("vor 0,0,0");
1526 asm volatile ("lvlx 0,0,0");
1527 #endif
1528 return 0;
1529 }
1530 } $options
1531 }
1532 }]
1533 }
1534
1535 # Return 1 if the target supports executing 64-bit instructions, 0
1536 # otherwise. Cache the result.
1537
1538 proc check_effective_target_powerpc64 { } {
1539 global powerpc64_available_saved
1540 global tool
1541
1542 if [info exists powerpc64_available_saved] {
1543 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
1544 } else {
1545 set powerpc64_available_saved 0
1546
1547 # Some simulators are known to not support powerpc64 instructions.
1548 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
1549 verbose "check_effective_target_powerpc64 returning 0" 2
1550 return $powerpc64_available_saved
1551 }
1552
1553 # Set up, compile, and execute a test program containing a 64-bit
1554 # instruction. Include the current process ID in the file
1555 # names to prevent conflicts with invocations for multiple
1556 # testsuites.
1557 set src ppc[pid].c
1558 set exe ppc[pid].x
1559
1560 set f [open $src "w"]
1561 puts $f "int main() {"
1562 puts $f "#ifdef __MACH__"
1563 puts $f " asm volatile (\"extsw r0,r0\");"
1564 puts $f "#else"
1565 puts $f " asm volatile (\"extsw 0,0\");"
1566 puts $f "#endif"
1567 puts $f " return 0; }"
1568 close $f
1569
1570 set opts "additional_flags=-mcpu=G5"
1571
1572 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
1573 set lines [${tool}_target_compile $src $exe executable "$opts"]
1574 file delete $src
1575
1576 if [string match "" $lines] then {
1577 # No error message, compilation succeeded.
1578 set result [${tool}_load "./$exe" "" ""]
1579 set status [lindex $result 0]
1580 remote_file build delete $exe
1581 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
1582
1583 if { $status == "pass" } then {
1584 set powerpc64_available_saved 1
1585 }
1586 } else {
1587 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
1588 }
1589 }
1590
1591 return $powerpc64_available_saved
1592 }
1593
1594 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
1595 # complex float arguments. This affects gfortran tests that call cabsf
1596 # in libm built by an earlier compiler. Return 1 if libm uses the same
1597 # argument passing as the compiler under test, 0 otherwise.
1598 #
1599 # When the target name changes, replace the cached result.
1600
1601 proc check_effective_target_broken_cplxf_arg { } {
1602 return [check_cached_effective_target broken_cplxf_arg {
1603 # Skip the work for targets known not to be affected.
1604 if { ![istarget powerpc64-*-linux*] } {
1605 expr 0
1606 } elseif { ![is-effective-target lp64] } {
1607 expr 0
1608 } else {
1609 check_runtime_nocache broken_cplxf_arg {
1610 #include <complex.h>
1611 extern void abort (void);
1612 float fabsf (float);
1613 float cabsf (_Complex float);
1614 int main ()
1615 {
1616 _Complex float cf;
1617 float f;
1618 cf = 3 + 4.0fi;
1619 f = cabsf (cf);
1620 if (fabsf (f - 5.0) > 0.0001)
1621 abort ();
1622 return 0;
1623 }
1624 } "-lm"
1625 }
1626 }]
1627 }
1628
1629 # Return 1 is this is a TI C6X target supporting C67X instructions
1630 proc check_effective_target_ti_c67x { } {
1631 return [check_no_compiler_messages ti_c67x assembly {
1632 #if !defined(_TMS320C6700)
1633 #error !_TMS320C6700
1634 #endif
1635 }]
1636 }
1637
1638 # Return 1 is this is a TI C6X target supporting C64X+ instructions
1639 proc check_effective_target_ti_c64xp { } {
1640 return [check_no_compiler_messages ti_c64xp assembly {
1641 #if !defined(_TMS320C6400_PLUS)
1642 #error !_TMS320C6400_PLUS
1643 #endif
1644 }]
1645 }
1646
1647
1648 proc check_alpha_max_hw_available { } {
1649 return [check_runtime alpha_max_hw_available {
1650 int main() { return __builtin_alpha_amask(1<<8) != 0; }
1651 }]
1652 }
1653
1654 # Returns true iff the FUNCTION is available on the target system.
1655 # (This is essentially a Tcl implementation of Autoconf's
1656 # AC_CHECK_FUNC.)
1657
1658 proc check_function_available { function } {
1659 return [check_no_compiler_messages ${function}_available \
1660 executable [subst {
1661 #ifdef __cplusplus
1662 extern "C"
1663 #endif
1664 char $function ();
1665 int main () { $function (); }
1666 }] "-fno-builtin" ]
1667 }
1668
1669 # Returns true iff "fork" is available on the target system.
1670
1671 proc check_fork_available {} {
1672 return [check_function_available "fork"]
1673 }
1674
1675 # Returns true iff "mkfifo" is available on the target system.
1676
1677 proc check_mkfifo_available {} {
1678 if { [istarget *-*-cygwin*] } {
1679 # Cygwin has mkfifo, but support is incomplete.
1680 return 0
1681 }
1682
1683 return [check_function_available "mkfifo"]
1684 }
1685
1686 # Returns true iff "__cxa_atexit" is used on the target system.
1687
1688 proc check_cxa_atexit_available { } {
1689 return [check_cached_effective_target cxa_atexit_available {
1690 if { [istarget hppa*-*-hpux10*] } {
1691 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
1692 expr 0
1693 } elseif { [istarget *-*-vxworks] } {
1694 # vxworks doesn't have __cxa_atexit but subsequent test passes.
1695 expr 0
1696 } else {
1697 check_runtime_nocache cxa_atexit_available {
1698 // C++
1699 #include <stdlib.h>
1700 static unsigned int count;
1701 struct X
1702 {
1703 X() { count = 1; }
1704 ~X()
1705 {
1706 if (count != 3)
1707 exit(1);
1708 count = 4;
1709 }
1710 };
1711 void f()
1712 {
1713 static X x;
1714 }
1715 struct Y
1716 {
1717 Y() { f(); count = 2; }
1718 ~Y()
1719 {
1720 if (count != 2)
1721 exit(1);
1722 count = 3;
1723 }
1724 };
1725 Y y;
1726 int main() { return 0; }
1727 }
1728 }
1729 }]
1730 }
1731
1732 proc check_effective_target_objc2 { } {
1733 return [check_no_compiler_messages objc2 object {
1734 #ifdef __OBJC2__
1735 int dummy[1];
1736 #else
1737 #error !__OBJC2__
1738 #endif
1739 }]
1740 }
1741
1742 proc check_effective_target_next_runtime { } {
1743 return [check_no_compiler_messages objc2 object {
1744 #ifdef __NEXT_RUNTIME__
1745 int dummy[1];
1746 #else
1747 #error !__NEXT_RUNTIME__
1748 #endif
1749 }]
1750 }
1751
1752 # Return 1 if we're generating 32-bit code using default options, 0
1753 # otherwise.
1754
1755 proc check_effective_target_ilp32 { } {
1756 return [check_no_compiler_messages ilp32 object {
1757 int dummy[sizeof (int) == 4
1758 && sizeof (void *) == 4
1759 && sizeof (long) == 4 ? 1 : -1];
1760 }]
1761 }
1762
1763 # Return 1 if we're generating ia32 code using default options, 0
1764 # otherwise.
1765
1766 proc check_effective_target_ia32 { } {
1767 return [check_no_compiler_messages ia32 object {
1768 int dummy[sizeof (int) == 4
1769 && sizeof (void *) == 4
1770 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
1771 }]
1772 }
1773
1774 # Return 1 if we're generating x32 code using default options, 0
1775 # otherwise.
1776
1777 proc check_effective_target_x32 { } {
1778 return [check_no_compiler_messages x32 object {
1779 int dummy[sizeof (int) == 4
1780 && sizeof (void *) == 4
1781 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
1782 }]
1783 }
1784
1785 # Return 1 if we're generating 32-bit integers using default
1786 # options, 0 otherwise.
1787
1788 proc check_effective_target_int32 { } {
1789 return [check_no_compiler_messages int32 object {
1790 int dummy[sizeof (int) == 4 ? 1 : -1];
1791 }]
1792 }
1793
1794 # Return 1 if we're generating 32-bit or larger integers using default
1795 # options, 0 otherwise.
1796
1797 proc check_effective_target_int32plus { } {
1798 return [check_no_compiler_messages int32plus object {
1799 int dummy[sizeof (int) >= 4 ? 1 : -1];
1800 }]
1801 }
1802
1803 # Return 1 if we're generating 32-bit or larger pointers using default
1804 # options, 0 otherwise.
1805
1806 proc check_effective_target_ptr32plus { } {
1807 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
1808 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
1809 # cannot really hold a 32-bit address, so we always return false here.
1810 if { [istarget msp430-*-*] } {
1811 return 0
1812 }
1813
1814 return [check_no_compiler_messages ptr32plus object {
1815 int dummy[sizeof (void *) >= 4 ? 1 : -1];
1816 }]
1817 }
1818
1819 # Return 1 if we support 32-bit or larger array and structure sizes
1820 # using default options, 0 otherwise. Avoid false positive on
1821 # targets with 20 or 24 bit address spaces.
1822
1823 proc check_effective_target_size32plus { } {
1824 return [check_no_compiler_messages size32plus object {
1825 char dummy[16777217L];
1826 }]
1827 }
1828
1829 # Returns 1 if we're generating 16-bit or smaller integers with the
1830 # default options, 0 otherwise.
1831
1832 proc check_effective_target_int16 { } {
1833 return [check_no_compiler_messages int16 object {
1834 int dummy[sizeof (int) < 4 ? 1 : -1];
1835 }]
1836 }
1837
1838 # Return 1 if we're generating 64-bit code using default options, 0
1839 # otherwise.
1840
1841 proc check_effective_target_lp64 { } {
1842 return [check_no_compiler_messages lp64 object {
1843 int dummy[sizeof (int) == 4
1844 && sizeof (void *) == 8
1845 && sizeof (long) == 8 ? 1 : -1];
1846 }]
1847 }
1848
1849 # Return 1 if we're generating 64-bit code using default llp64 options,
1850 # 0 otherwise.
1851
1852 proc check_effective_target_llp64 { } {
1853 return [check_no_compiler_messages llp64 object {
1854 int dummy[sizeof (int) == 4
1855 && sizeof (void *) == 8
1856 && sizeof (long long) == 8
1857 && sizeof (long) == 4 ? 1 : -1];
1858 }]
1859 }
1860
1861 # Return 1 if long and int have different sizes,
1862 # 0 otherwise.
1863
1864 proc check_effective_target_long_neq_int { } {
1865 return [check_no_compiler_messages long_ne_int object {
1866 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
1867 }]
1868 }
1869
1870 # Return 1 if the target supports long double larger than double,
1871 # 0 otherwise.
1872
1873 proc check_effective_target_large_long_double { } {
1874 return [check_no_compiler_messages large_long_double object {
1875 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1876 }]
1877 }
1878
1879 # Return 1 if the target supports double larger than float,
1880 # 0 otherwise.
1881
1882 proc check_effective_target_large_double { } {
1883 return [check_no_compiler_messages large_double object {
1884 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
1885 }]
1886 }
1887
1888 # Return 1 if the target supports long double of 128 bits,
1889 # 0 otherwise.
1890
1891 proc check_effective_target_longdouble128 { } {
1892 return [check_no_compiler_messages longdouble128 object {
1893 int dummy[sizeof(long double) == 16 ? 1 : -1];
1894 }]
1895 }
1896
1897 # Return 1 if the target supports double of 64 bits,
1898 # 0 otherwise.
1899
1900 proc check_effective_target_double64 { } {
1901 return [check_no_compiler_messages double64 object {
1902 int dummy[sizeof(double) == 8 ? 1 : -1];
1903 }]
1904 }
1905
1906 # Return 1 if the target supports double of at least 64 bits,
1907 # 0 otherwise.
1908
1909 proc check_effective_target_double64plus { } {
1910 return [check_no_compiler_messages double64plus object {
1911 int dummy[sizeof(double) >= 8 ? 1 : -1];
1912 }]
1913 }
1914
1915 # Return 1 if the target supports 'w' suffix on floating constant
1916 # 0 otherwise.
1917
1918 proc check_effective_target_has_w_floating_suffix { } {
1919 set opts ""
1920 if [check_effective_target_c++] {
1921 append opts "-std=gnu++03"
1922 }
1923 return [check_no_compiler_messages w_fp_suffix object {
1924 float dummy = 1.0w;
1925 } "$opts"]
1926 }
1927
1928 # Return 1 if the target supports 'q' suffix on floating constant
1929 # 0 otherwise.
1930
1931 proc check_effective_target_has_q_floating_suffix { } {
1932 set opts ""
1933 if [check_effective_target_c++] {
1934 append opts "-std=gnu++03"
1935 }
1936 return [check_no_compiler_messages q_fp_suffix object {
1937 float dummy = 1.0q;
1938 } "$opts"]
1939 }
1940 # Return 1 if the target supports compiling fixed-point,
1941 # 0 otherwise.
1942
1943 proc check_effective_target_fixed_point { } {
1944 return [check_no_compiler_messages fixed_point object {
1945 _Sat _Fract x; _Sat _Accum y;
1946 }]
1947 }
1948
1949 # Return 1 if the target supports compiling decimal floating point,
1950 # 0 otherwise.
1951
1952 proc check_effective_target_dfp_nocache { } {
1953 verbose "check_effective_target_dfp_nocache: compiling source" 2
1954 set ret [check_no_compiler_messages_nocache dfp object {
1955 float x __attribute__((mode(DD)));
1956 }]
1957 verbose "check_effective_target_dfp_nocache: returning $ret" 2
1958 return $ret
1959 }
1960
1961 proc check_effective_target_dfprt_nocache { } {
1962 return [check_runtime_nocache dfprt {
1963 typedef float d64 __attribute__((mode(DD)));
1964 d64 x = 1.2df, y = 2.3dd, z;
1965 int main () { z = x + y; return 0; }
1966 }]
1967 }
1968
1969 # Return 1 if the target supports compiling Decimal Floating Point,
1970 # 0 otherwise.
1971 #
1972 # This won't change for different subtargets so cache the result.
1973
1974 proc check_effective_target_dfp { } {
1975 return [check_cached_effective_target dfp {
1976 check_effective_target_dfp_nocache
1977 }]
1978 }
1979
1980 # Return 1 if the target supports linking and executing Decimal Floating
1981 # Point, 0 otherwise.
1982 #
1983 # This won't change for different subtargets so cache the result.
1984
1985 proc check_effective_target_dfprt { } {
1986 return [check_cached_effective_target dfprt {
1987 check_effective_target_dfprt_nocache
1988 }]
1989 }
1990
1991 # Return 1 if the target supports executing DFP hardware instructions,
1992 # 0 otherwise. Cache the result.
1993
1994 proc check_dfp_hw_available { } {
1995 return [check_cached_effective_target dfp_hw_available {
1996 # For now, disable on Darwin
1997 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1998 expr 0
1999 } else {
2000 check_runtime_nocache dfp_hw_available {
2001 volatile _Decimal64 r;
2002 volatile _Decimal64 a = 4.0DD;
2003 volatile _Decimal64 b = 2.0DD;
2004 int main()
2005 {
2006 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2007 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2008 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2009 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2010 return 0;
2011 }
2012 } "-mcpu=power6 -mhard-float"
2013 }
2014 }]
2015 }
2016
2017 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2018
2019 proc check_effective_target_ucn_nocache { } {
2020 # -std=c99 is only valid for C
2021 if [check_effective_target_c] {
2022 set ucnopts "-std=c99"
2023 }
2024 append ucnopts " -fextended-identifiers"
2025 verbose "check_effective_target_ucn_nocache: compiling source" 2
2026 set ret [check_no_compiler_messages_nocache ucn object {
2027 int \u00C0;
2028 } $ucnopts]
2029 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2030 return $ret
2031 }
2032
2033 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2034 #
2035 # This won't change for different subtargets, so cache the result.
2036
2037 proc check_effective_target_ucn { } {
2038 return [check_cached_effective_target ucn {
2039 check_effective_target_ucn_nocache
2040 }]
2041 }
2042
2043 # Return 1 if the target needs a command line argument to enable a SIMD
2044 # instruction set.
2045
2046 proc check_effective_target_vect_cmdline_needed { } {
2047 global et_vect_cmdline_needed_saved
2048 global et_vect_cmdline_needed_target_name
2049
2050 if { ![info exists et_vect_cmdline_needed_target_name] } {
2051 set et_vect_cmdline_needed_target_name ""
2052 }
2053
2054 # If the target has changed since we set the cached value, clear it.
2055 set current_target [current_target_name]
2056 if { $current_target != $et_vect_cmdline_needed_target_name } {
2057 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2058 set et_vect_cmdline_needed_target_name $current_target
2059 if { [info exists et_vect_cmdline_needed_saved] } {
2060 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
2061 unset et_vect_cmdline_needed_saved
2062 }
2063 }
2064
2065 if [info exists et_vect_cmdline_needed_saved] {
2066 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
2067 } else {
2068 set et_vect_cmdline_needed_saved 1
2069 if { [istarget alpha*-*-*]
2070 || [istarget ia64-*-*]
2071 || (([istarget x86_64-*-*] || [istarget i?86-*-*])
2072 && ([check_effective_target_x32]
2073 || [check_effective_target_lp64]))
2074 || ([istarget powerpc*-*-*]
2075 && ([check_effective_target_powerpc_spe]
2076 || [check_effective_target_powerpc_altivec]))
2077 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
2078 || [istarget spu-*-*]
2079 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
2080 || [istarget aarch64*-*-*] } {
2081 set et_vect_cmdline_needed_saved 0
2082 }
2083 }
2084
2085 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2086 return $et_vect_cmdline_needed_saved
2087 }
2088
2089 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
2090 #
2091 # This won't change for different subtargets so cache the result.
2092
2093 proc check_effective_target_vect_int { } {
2094 global et_vect_int_saved
2095
2096 if [info exists et_vect_int_saved] {
2097 verbose "check_effective_target_vect_int: using cached result" 2
2098 } else {
2099 set et_vect_int_saved 0
2100 if { [istarget i?86-*-*]
2101 || ([istarget powerpc*-*-*]
2102 && ![istarget powerpc-*-linux*paired*])
2103 || [istarget spu-*-*]
2104 || [istarget x86_64-*-*]
2105 || [istarget sparc*-*-*]
2106 || [istarget alpha*-*-*]
2107 || [istarget ia64-*-*]
2108 || [istarget aarch64*-*-*]
2109 || [check_effective_target_arm32]
2110 || ([istarget mips*-*-*]
2111 && [check_effective_target_mips_loongson]) } {
2112 set et_vect_int_saved 1
2113 }
2114 }
2115
2116 verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
2117 return $et_vect_int_saved
2118 }
2119
2120 # Return 1 if the target supports signed int->float conversion
2121 #
2122
2123 proc check_effective_target_vect_intfloat_cvt { } {
2124 global et_vect_intfloat_cvt_saved
2125
2126 if [info exists et_vect_intfloat_cvt_saved] {
2127 verbose "check_effective_target_vect_intfloat_cvt: using cached result" 2
2128 } else {
2129 set et_vect_intfloat_cvt_saved 0
2130 if { [istarget i?86-*-*]
2131 || ([istarget powerpc*-*-*]
2132 && ![istarget powerpc-*-linux*paired*])
2133 || [istarget x86_64-*-*]
2134 || ([istarget arm*-*-*]
2135 && [check_effective_target_arm_neon_ok])} {
2136 set et_vect_intfloat_cvt_saved 1
2137 }
2138 }
2139
2140 verbose "check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
2141 return $et_vect_intfloat_cvt_saved
2142 }
2143
2144 #Return 1 if we're supporting __int128 for target, 0 otherwise.
2145
2146 proc check_effective_target_int128 { } {
2147 return [check_no_compiler_messages int128 object {
2148 int dummy[
2149 #ifndef __SIZEOF_INT128__
2150 -1
2151 #else
2152 1
2153 #endif
2154 ];
2155 }]
2156 }
2157
2158 # Return 1 if the target supports unsigned int->float conversion
2159 #
2160
2161 proc check_effective_target_vect_uintfloat_cvt { } {
2162 global et_vect_uintfloat_cvt_saved
2163
2164 if [info exists et_vect_uintfloat_cvt_saved] {
2165 verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2
2166 } else {
2167 set et_vect_uintfloat_cvt_saved 0
2168 if { [istarget i?86-*-*]
2169 || ([istarget powerpc*-*-*]
2170 && ![istarget powerpc-*-linux*paired*])
2171 || [istarget x86_64-*-*]
2172 || [istarget aarch64*-*-*]
2173 || ([istarget arm*-*-*]
2174 && [check_effective_target_arm_neon_ok])} {
2175 set et_vect_uintfloat_cvt_saved 1
2176 }
2177 }
2178
2179 verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
2180 return $et_vect_uintfloat_cvt_saved
2181 }
2182
2183
2184 # Return 1 if the target supports signed float->int conversion
2185 #
2186
2187 proc check_effective_target_vect_floatint_cvt { } {
2188 global et_vect_floatint_cvt_saved
2189
2190 if [info exists et_vect_floatint_cvt_saved] {
2191 verbose "check_effective_target_vect_floatint_cvt: using cached result" 2
2192 } else {
2193 set et_vect_floatint_cvt_saved 0
2194 if { [istarget i?86-*-*]
2195 || ([istarget powerpc*-*-*]
2196 && ![istarget powerpc-*-linux*paired*])
2197 || [istarget x86_64-*-*]
2198 || ([istarget arm*-*-*]
2199 && [check_effective_target_arm_neon_ok])} {
2200 set et_vect_floatint_cvt_saved 1
2201 }
2202 }
2203
2204 verbose "check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
2205 return $et_vect_floatint_cvt_saved
2206 }
2207
2208 # Return 1 if the target supports unsigned float->int conversion
2209 #
2210
2211 proc check_effective_target_vect_floatuint_cvt { } {
2212 global et_vect_floatuint_cvt_saved
2213
2214 if [info exists et_vect_floatuint_cvt_saved] {
2215 verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2
2216 } else {
2217 set et_vect_floatuint_cvt_saved 0
2218 if { ([istarget powerpc*-*-*]
2219 && ![istarget powerpc-*-linux*paired*])
2220 || ([istarget arm*-*-*]
2221 && [check_effective_target_arm_neon_ok])} {
2222 set et_vect_floatuint_cvt_saved 1
2223 }
2224 }
2225
2226 verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
2227 return $et_vect_floatuint_cvt_saved
2228 }
2229
2230 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
2231 #
2232 # This won't change for different subtargets so cache the result.
2233
2234 proc check_effective_target_vect_simd_clones { } {
2235 global et_vect_simd_clones_saved
2236
2237 if [info exists et_vect_simd_clones_saved] {
2238 verbose "check_effective_target_vect_simd_clones: using cached result" 2
2239 } else {
2240 set et_vect_simd_clones_saved 0
2241 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2242 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx and
2243 # avx2 clone. Only the right clone for the specified arch will be
2244 # chosen, but still we need to at least be able to assemble
2245 # avx2.
2246 if { [check_effective_target_avx2] } {
2247 set et_vect_simd_clones_saved 1
2248 }
2249 }
2250 }
2251
2252 verbose "check_effective_target_vect_simd_clones: returning $et_vect_simd_clones_saved" 2
2253 return $et_vect_simd_clones_saved
2254 }
2255
2256 # Return 1 if this is a AArch64 target supporting big endian
2257 proc check_effective_target_aarch64_big_endian { } {
2258 return [check_no_compiler_messages aarch64_big_endian assembly {
2259 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
2260 #error !__aarch64__ || !__AARCH64EB__
2261 #endif
2262 }]
2263 }
2264
2265 # Return 1 if this is a AArch64 target supporting little endian
2266 proc check_effective_target_aarch64_little_endian { } {
2267 return [check_no_compiler_messages aarch64_little_endian assembly {
2268 #if !defined(__aarch64__) || defined(__AARCH64EB__)
2269 #error FOO
2270 #endif
2271 }]
2272 }
2273
2274 # Return 1 if this is an arm target using 32-bit instructions
2275 proc check_effective_target_arm32 { } {
2276 return [check_no_compiler_messages arm32 assembly {
2277 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
2278 #error !__arm || __thumb__ && !__thumb2__
2279 #endif
2280 }]
2281 }
2282
2283 # Return 1 if this is an arm target not using Thumb
2284 proc check_effective_target_arm_nothumb { } {
2285 return [check_no_compiler_messages arm_nothumb assembly {
2286 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
2287 #error !__arm__ || __thumb || __thumb2__
2288 #endif
2289 }]
2290 }
2291
2292 # Return 1 if this is a little-endian ARM target
2293 proc check_effective_target_arm_little_endian { } {
2294 return [check_no_compiler_messages arm_little_endian assembly {
2295 #if !defined(__arm__) || !defined(__ARMEL__)
2296 #error !__arm__ || !__ARMEL__
2297 #endif
2298 }]
2299 }
2300
2301 # Return 1 if this is an ARM target that only supports aligned vector accesses
2302 proc check_effective_target_arm_vect_no_misalign { } {
2303 return [check_no_compiler_messages arm_vect_no_misalign assembly {
2304 #if !defined(__arm__) \
2305 || (defined(__ARM_FEATURE_UNALIGNED) \
2306 && defined(__ARMEL__))
2307 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
2308 #endif
2309 }]
2310 }
2311
2312
2313 # Return 1 if this is an ARM target supporting -mfpu=vfp
2314 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
2315 # options.
2316
2317 proc check_effective_target_arm_vfp_ok { } {
2318 if { [check_effective_target_arm32] } {
2319 return [check_no_compiler_messages arm_vfp_ok object {
2320 int dummy;
2321 } "-mfpu=vfp -mfloat-abi=softfp"]
2322 } else {
2323 return 0
2324 }
2325 }
2326
2327 # Return 1 if this is an ARM target supporting -mfpu=vfp3
2328 # -mfloat-abi=softfp.
2329
2330 proc check_effective_target_arm_vfp3_ok { } {
2331 if { [check_effective_target_arm32] } {
2332 return [check_no_compiler_messages arm_vfp3_ok object {
2333 int dummy;
2334 } "-mfpu=vfp3 -mfloat-abi=softfp"]
2335 } else {
2336 return 0
2337 }
2338 }
2339
2340 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
2341 # -mfloat-abi=softfp.
2342 proc check_effective_target_arm_v8_vfp_ok {} {
2343 if { [check_effective_target_arm32] } {
2344 return [check_no_compiler_messages arm_v8_vfp_ok object {
2345 int foo (void)
2346 {
2347 __asm__ volatile ("vrinta.f32.f32 s0, s0");
2348 return 0;
2349 }
2350 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
2351 } else {
2352 return 0
2353 }
2354 }
2355
2356 # Return 1 if this is an ARM target supporting -mfpu=vfp
2357 # -mfloat-abi=hard. Some multilibs may be incompatible with these
2358 # options.
2359
2360 proc check_effective_target_arm_hard_vfp_ok { } {
2361 if { [check_effective_target_arm32]
2362 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
2363 return [check_no_compiler_messages arm_hard_vfp_ok executable {
2364 int main() { return 0;}
2365 } "-mfpu=vfp -mfloat-abi=hard"]
2366 } else {
2367 return 0
2368 }
2369 }
2370
2371 # Return 1 if this is an ARM target that supports DSP multiply with
2372 # current multilib flags.
2373
2374 proc check_effective_target_arm_dsp { } {
2375 return [check_no_compiler_messages arm_dsp assembly {
2376 #ifndef __ARM_FEATURE_DSP
2377 #error not DSP
2378 #endif
2379 int i;
2380 }]
2381 }
2382
2383 # Return 1 if this is an ARM target that supports unaligned word/halfword
2384 # load/store instructions.
2385
2386 proc check_effective_target_arm_unaligned { } {
2387 return [check_no_compiler_messages arm_unaligned assembly {
2388 #ifndef __ARM_FEATURE_UNALIGNED
2389 #error no unaligned support
2390 #endif
2391 int i;
2392 }]
2393 }
2394
2395 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2396 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2397 # incompatible with these options. Also set et_arm_crypto_flags to the
2398 # best options to add.
2399
2400 proc check_effective_target_arm_crypto_ok_nocache { } {
2401 global et_arm_crypto_flags
2402 set et_arm_crypto_flags ""
2403 if { [check_effective_target_arm32] } {
2404 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
2405 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
2406 #include "arm_neon.h"
2407 uint8x16_t
2408 foo (uint8x16_t a, uint8x16_t b)
2409 {
2410 return vaeseq_u8 (a, b);
2411 }
2412 } "$flags"] } {
2413 set et_arm_crypto_flags $flags
2414 return 1
2415 }
2416 }
2417 }
2418
2419 return 0
2420 }
2421
2422 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2423
2424 proc check_effective_target_arm_crypto_ok { } {
2425 return [check_cached_effective_target arm_crypto_ok \
2426 check_effective_target_arm_crypto_ok_nocache]
2427 }
2428
2429 # Add options for crypto extensions.
2430 proc add_options_for_arm_crypto { flags } {
2431 if { ! [check_effective_target_arm_crypto_ok] } {
2432 return "$flags"
2433 }
2434 global et_arm_crypto_flags
2435 return "$flags $et_arm_crypto_flags"
2436 }
2437
2438 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2439 # or -mfloat-abi=hard, but if one is already specified by the
2440 # multilib, use it. Similarly, if a -mfpu option already enables
2441 # NEON, do not add -mfpu=neon.
2442
2443 proc add_options_for_arm_neon { flags } {
2444 if { ! [check_effective_target_arm_neon_ok] } {
2445 return "$flags"
2446 }
2447 global et_arm_neon_flags
2448 return "$flags $et_arm_neon_flags"
2449 }
2450
2451 proc add_options_for_arm_v8_vfp { flags } {
2452 if { ! [check_effective_target_arm_v8_vfp_ok] } {
2453 return "$flags"
2454 }
2455 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
2456 }
2457
2458 proc add_options_for_arm_v8_neon { flags } {
2459 if { ! [check_effective_target_arm_v8_neon_ok] } {
2460 return "$flags"
2461 }
2462 global et_arm_v8_neon_flags
2463 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
2464 }
2465
2466 proc add_options_for_arm_crc { flags } {
2467 if { ! [check_effective_target_arm_crc_ok] } {
2468 return "$flags"
2469 }
2470 global et_arm_crc_flags
2471 return "$flags $et_arm_crc_flags"
2472 }
2473
2474 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2475 # or -mfloat-abi=hard, but if one is already specified by the
2476 # multilib, use it. Similarly, if a -mfpu option already enables
2477 # NEON, do not add -mfpu=neon.
2478
2479 proc add_options_for_arm_neonv2 { flags } {
2480 if { ! [check_effective_target_arm_neonv2_ok] } {
2481 return "$flags"
2482 }
2483 global et_arm_neonv2_flags
2484 return "$flags $et_arm_neonv2_flags"
2485 }
2486
2487 # Add the options needed for vfp3.
2488 proc add_options_for_arm_vfp3 { flags } {
2489 if { ! [check_effective_target_arm_vfp3_ok] } {
2490 return "$flags"
2491 }
2492 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
2493 }
2494
2495 # Return 1 if this is an ARM target supporting -mfpu=neon
2496 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2497 # incompatible with these options. Also set et_arm_neon_flags to the
2498 # best options to add.
2499
2500 proc check_effective_target_arm_neon_ok_nocache { } {
2501 global et_arm_neon_flags
2502 set et_arm_neon_flags ""
2503 if { [check_effective_target_arm32] } {
2504 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp"} {
2505 if { [check_no_compiler_messages_nocache arm_neon_ok object {
2506 #include "arm_neon.h"
2507 int dummy;
2508 } "$flags"] } {
2509 set et_arm_neon_flags $flags
2510 return 1
2511 }
2512 }
2513 }
2514
2515 return 0
2516 }
2517
2518 proc check_effective_target_arm_neon_ok { } {
2519 return [check_cached_effective_target arm_neon_ok \
2520 check_effective_target_arm_neon_ok_nocache]
2521 }
2522
2523 proc check_effective_target_arm_crc_ok_nocache { } {
2524 global et_arm_crc_flags
2525 set et_arm_crc_flags "-march=armv8-a+crc"
2526 return [check_no_compiler_messages_nocache arm_crc_ok object {
2527 #if !defined (__ARM_FEATURE_CRC32)
2528 #error FOO
2529 #endif
2530 } "$et_arm_crc_flags"]
2531 }
2532
2533 proc check_effective_target_arm_crc_ok { } {
2534 return [check_cached_effective_target arm_crc_ok \
2535 check_effective_target_arm_crc_ok_nocache]
2536 }
2537
2538 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
2539 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2540 # incompatible with these options. Also set et_arm_neon_flags to the
2541 # best options to add.
2542
2543 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
2544 global et_arm_neon_fp16_flags
2545 set et_arm_neon_fp16_flags ""
2546 if { [check_effective_target_arm32] } {
2547 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
2548 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
2549 if { [check_no_compiler_messages_nocache arm_neon_fp_16_ok object {
2550 #include "arm_neon.h"
2551 float16x4_t
2552 foo (float32x4_t arg)
2553 {
2554 return vcvt_f16_f32 (arg);
2555 }
2556 } "$flags"] } {
2557 set et_arm_neon_fp16_flags $flags
2558 return 1
2559 }
2560 }
2561 }
2562
2563 return 0
2564 }
2565
2566 proc check_effective_target_arm_neon_fp16_ok { } {
2567 return [check_cached_effective_target arm_neon_fp16_ok \
2568 check_effective_target_arm_neon_fp16_ok_nocache]
2569 }
2570
2571 proc add_options_for_arm_neon_fp16 { flags } {
2572 if { ! [check_effective_target_arm_neon_fp16_ok] } {
2573 return "$flags"
2574 }
2575 global et_arm_neon_fp16_flags
2576 return "$flags $et_arm_neon_fp16_flags"
2577 }
2578
2579 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
2580 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2581 # incompatible with these options. Also set et_arm_v8_neon_flags to the
2582 # best options to add.
2583
2584 proc check_effective_target_arm_v8_neon_ok_nocache { } {
2585 global et_arm_v8_neon_flags
2586 set et_arm_v8_neon_flags ""
2587 if { [check_effective_target_arm32] } {
2588 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
2589 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
2590 #if __ARM_ARCH < 8
2591 #error not armv8 or later
2592 #endif
2593 #include "arm_neon.h"
2594 void
2595 foo ()
2596 {
2597 __asm__ volatile ("vrintn.f32 q0, q0");
2598 }
2599 } "$flags -march=armv8-a"] } {
2600 set et_arm_v8_neon_flags $flags
2601 return 1
2602 }
2603 }
2604 }
2605
2606 return 0
2607 }
2608
2609 proc check_effective_target_arm_v8_neon_ok { } {
2610 return [check_cached_effective_target arm_v8_neon_ok \
2611 check_effective_target_arm_v8_neon_ok_nocache]
2612 }
2613
2614 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
2615 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2616 # incompatible with these options. Also set et_arm_neonv2_flags to the
2617 # best options to add.
2618
2619 proc check_effective_target_arm_neonv2_ok_nocache { } {
2620 global et_arm_neonv2_flags
2621 set et_arm_neonv2_flags ""
2622 if { [check_effective_target_arm32] } {
2623 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
2624 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
2625 #include "arm_neon.h"
2626 float32x2_t
2627 foo (float32x2_t a, float32x2_t b, float32x2_t c)
2628 {
2629 return vfma_f32 (a, b, c);
2630 }
2631 } "$flags"] } {
2632 set et_arm_neonv2_flags $flags
2633 return 1
2634 }
2635 }
2636 }
2637
2638 return 0
2639 }
2640
2641 proc check_effective_target_arm_neonv2_ok { } {
2642 return [check_cached_effective_target arm_neonv2_ok \
2643 check_effective_target_arm_neonv2_ok_nocache]
2644 }
2645
2646 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2647 # or -mfloat-abi=hard, but if one is already specified by the
2648 # multilib, use it.
2649
2650 proc add_options_for_arm_fp16 { flags } {
2651 if { ! [check_effective_target_arm_fp16_ok] } {
2652 return "$flags"
2653 }
2654 global et_arm_fp16_flags
2655 return "$flags $et_arm_fp16_flags"
2656 }
2657
2658 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
2659 # Skip multilibs that are incompatible with these options and set
2660 # et_arm_fp16_flags to the best options to add.
2661
2662 proc check_effective_target_arm_fp16_ok_nocache { } {
2663 global et_arm_fp16_flags
2664 set et_arm_fp16_flags ""
2665 if { ! [check_effective_target_arm32] } {
2666 return 0;
2667 }
2668 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
2669 # Multilib flags would override -mfpu.
2670 return 0
2671 }
2672 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
2673 # Must generate floating-point instructions.
2674 return 0
2675 }
2676 if [check_effective_target_arm_hf_eabi] {
2677 # Use existing float-abi and force an fpu which supports fp16
2678 set et_arm_fp16_flags "-mfpu=vfpv4"
2679 return 1;
2680 }
2681 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
2682 # The existing -mfpu value is OK; use it, but add softfp.
2683 set et_arm_fp16_flags "-mfloat-abi=softfp"
2684 return 1;
2685 }
2686 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
2687 # macro to check for this support.
2688 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
2689 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
2690 int dummy;
2691 } "$flags"] } {
2692 set et_arm_fp16_flags "$flags"
2693 return 1
2694 }
2695
2696 return 0
2697 }
2698
2699 proc check_effective_target_arm_fp16_ok { } {
2700 return [check_cached_effective_target arm_fp16_ok \
2701 check_effective_target_arm_fp16_ok_nocache]
2702 }
2703
2704 # Creates a series of routines that return 1 if the given architecture
2705 # can be selected and a routine to give the flags to select that architecture
2706 # Note: Extra flags may be added to disable options from newer compilers
2707 # (Thumb in particular - but others may be added in the future)
2708 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
2709 # /* { dg-add-options arm_arch_v5 } */
2710 # /* { dg-require-effective-target arm_arch_v5_multilib } */
2711 foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
2712 v4t "-march=armv4t" __ARM_ARCH_4T__
2713 v5 "-march=armv5 -marm" __ARM_ARCH_5__
2714 v5t "-march=armv5t" __ARM_ARCH_5T__
2715 v5te "-march=armv5te" __ARM_ARCH_5TE__
2716 v6 "-march=armv6" __ARM_ARCH_6__
2717 v6k "-march=armv6k" __ARM_ARCH_6K__
2718 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
2719 v6z "-march=armv6z" __ARM_ARCH_6Z__
2720 v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
2721 v7a "-march=armv7-a" __ARM_ARCH_7A__
2722 v7ve "-march=armv7ve" __ARM_ARCH_7A__
2723 v7r "-march=armv7-r" __ARM_ARCH_7R__
2724 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
2725 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
2726 v8a "-march=armv8-a" __ARM_ARCH_8A__ } {
2727 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
2728 proc check_effective_target_arm_arch_FUNC_ok { } {
2729 if { [ string match "*-marm*" "FLAG" ] &&
2730 ![check_effective_target_arm_arm_ok] } {
2731 return 0
2732 }
2733 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
2734 #if !defined (DEF)
2735 #error !DEF
2736 #endif
2737 } "FLAG" ]
2738 }
2739
2740 proc add_options_for_arm_arch_FUNC { flags } {
2741 return "$flags FLAG"
2742 }
2743
2744 proc check_effective_target_arm_arch_FUNC_multilib { } {
2745 return [check_runtime arm_arch_FUNC_multilib {
2746 int
2747 main (void)
2748 {
2749 return 0;
2750 }
2751 } [add_options_for_arm_arch_FUNC ""]]
2752 }
2753 }]
2754 }
2755
2756 # Return 1 if this is an ARM target where -marm causes ARM to be
2757 # used (not Thumb)
2758
2759 proc check_effective_target_arm_arm_ok { } {
2760 return [check_no_compiler_messages arm_arm_ok assembly {
2761 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
2762 #error !__arm__ || __thumb__ || __thumb2__
2763 #endif
2764 } "-marm"]
2765 }
2766
2767
2768 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
2769 # used.
2770
2771 proc check_effective_target_arm_thumb1_ok { } {
2772 return [check_no_compiler_messages arm_thumb1_ok assembly {
2773 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
2774 #error !__arm__ || !__thumb__ || __thumb2__
2775 #endif
2776 int foo (int i) { return i; }
2777 } "-mthumb"]
2778 }
2779
2780 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
2781 # used.
2782
2783 proc check_effective_target_arm_thumb2_ok { } {
2784 return [check_no_compiler_messages arm_thumb2_ok assembly {
2785 #if !defined(__thumb2__)
2786 #error !__thumb2__
2787 #endif
2788 int foo (int i) { return i; }
2789 } "-mthumb"]
2790 }
2791
2792 # Return 1 if this is an ARM target where Thumb-1 is used without options
2793 # added by the test.
2794
2795 proc check_effective_target_arm_thumb1 { } {
2796 return [check_no_compiler_messages arm_thumb1 assembly {
2797 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
2798 #error !__arm__ || !__thumb__ || __thumb2__
2799 #endif
2800 int i;
2801 } ""]
2802 }
2803
2804 # Return 1 if this is an ARM target where Thumb-2 is used without options
2805 # added by the test.
2806
2807 proc check_effective_target_arm_thumb2 { } {
2808 return [check_no_compiler_messages arm_thumb2 assembly {
2809 #if !defined(__thumb2__)
2810 #error !__thumb2__
2811 #endif
2812 int i;
2813 } ""]
2814 }
2815
2816 # Return 1 if this is an ARM target where conditional execution is available.
2817
2818 proc check_effective_target_arm_cond_exec { } {
2819 return [check_no_compiler_messages arm_cond_exec assembly {
2820 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
2821 #error FOO
2822 #endif
2823 int i;
2824 } ""]
2825 }
2826
2827 # Return 1 if this is an ARM cortex-M profile cpu
2828
2829 proc check_effective_target_arm_cortex_m { } {
2830 if { ![istarget arm*-*-*] } {
2831 return 0
2832 }
2833 return [check_no_compiler_messages arm_cortex_m assembly {
2834 #if !defined(__ARM_ARCH_7M__) \
2835 && !defined (__ARM_ARCH_7EM__) \
2836 && !defined (__ARM_ARCH_6M__)
2837 #error !__ARM_ARCH_7M__ && !__ARM_ARCH_7EM__ && !__ARM_ARCH_6M__
2838 #endif
2839 int i;
2840 } "-mthumb"]
2841 }
2842
2843 # Return 1 if the target supports executing NEON instructions, 0
2844 # otherwise. Cache the result.
2845
2846 proc check_effective_target_arm_neon_hw { } {
2847 return [check_runtime arm_neon_hw_available {
2848 int
2849 main (void)
2850 {
2851 long long a = 0, b = 1;
2852 asm ("vorr %P0, %P1, %P2"
2853 : "=w" (a)
2854 : "0" (a), "w" (b));
2855 return (a != 1);
2856 }
2857 } [add_options_for_arm_neon ""]]
2858 }
2859
2860 proc check_effective_target_arm_neonv2_hw { } {
2861 return [check_runtime arm_neon_hwv2_available {
2862 #include "arm_neon.h"
2863 int
2864 main (void)
2865 {
2866 float32x2_t a, b, c;
2867 asm ("vfma.f32 %P0, %P1, %P2"
2868 : "=w" (a)
2869 : "w" (b), "w" (c));
2870 return 0;
2871 }
2872 } [add_options_for_arm_neonv2 ""]]
2873 }
2874
2875 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
2876 # otherwise.
2877
2878 proc check_effective_target_arm_v8_neon_hw { } {
2879 return [check_runtime arm_v8_neon_hw_available {
2880 #include "arm_neon.h"
2881 int
2882 main (void)
2883 {
2884 float32x2_t a;
2885 asm ("vrinta.f32 %P0, %P1"
2886 : "=w" (a)
2887 : "0" (a));
2888 return 0;
2889 }
2890 } [add_options_for_arm_v8_neon ""]]
2891 }
2892
2893 # Return 1 if this is a ARM target with NEON enabled.
2894
2895 proc check_effective_target_arm_neon { } {
2896 if { [check_effective_target_arm32] } {
2897 return [check_no_compiler_messages arm_neon object {
2898 #ifndef __ARM_NEON__
2899 #error not NEON
2900 #else
2901 int dummy;
2902 #endif
2903 }]
2904 } else {
2905 return 0
2906 }
2907 }
2908
2909 proc check_effective_target_arm_neonv2 { } {
2910 if { [check_effective_target_arm32] } {
2911 return [check_no_compiler_messages arm_neon object {
2912 #ifndef __ARM_NEON__
2913 #error not NEON
2914 #else
2915 #ifndef __ARM_FEATURE_FMA
2916 #error not NEONv2
2917 #else
2918 int dummy;
2919 #endif
2920 #endif
2921 }]
2922 } else {
2923 return 0
2924 }
2925 }
2926
2927 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
2928 # the Loongson vector modes.
2929
2930 proc check_effective_target_mips_loongson { } {
2931 return [check_no_compiler_messages loongson assembly {
2932 #if !defined(__mips_loongson_vector_rev)
2933 #error !__mips_loongson_vector_rev
2934 #endif
2935 }]
2936 }
2937
2938 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
2939 # Architecture.
2940
2941 proc check_effective_target_arm_eabi { } {
2942 return [check_no_compiler_messages arm_eabi object {
2943 #ifndef __ARM_EABI__
2944 #error not EABI
2945 #else
2946 int dummy;
2947 #endif
2948 }]
2949 }
2950
2951 # Return 1 if this is an ARM target that adheres to the hard-float variant of
2952 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
2953
2954 proc check_effective_target_arm_hf_eabi { } {
2955 return [check_no_compiler_messages arm_hf_eabi object {
2956 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
2957 #error not hard-float EABI
2958 #else
2959 int dummy;
2960 #endif
2961 }]
2962 }
2963
2964 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
2965 # Some multilibs may be incompatible with this option.
2966
2967 proc check_effective_target_arm_iwmmxt_ok { } {
2968 if { [check_effective_target_arm32] } {
2969 return [check_no_compiler_messages arm_iwmmxt_ok object {
2970 int dummy;
2971 } "-mcpu=iwmmxt"]
2972 } else {
2973 return 0
2974 }
2975 }
2976
2977 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
2978 # for an ARM target.
2979 proc check_effective_target_arm_prefer_ldrd_strd { } {
2980 if { ![check_effective_target_arm32] } {
2981 return 0;
2982 }
2983
2984 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
2985 void foo (int *p) { p[0] = 1; p[1] = 0;}
2986 } "-O2 -mthumb" ]
2987 }
2988
2989 # Return 1 if this is a PowerPC target supporting -meabi.
2990
2991 proc check_effective_target_powerpc_eabi_ok { } {
2992 if { [istarget powerpc*-*-*] } {
2993 return [check_no_compiler_messages powerpc_eabi_ok object {
2994 int dummy;
2995 } "-meabi"]
2996 } else {
2997 return 0
2998 }
2999 }
3000
3001 # Return 1 if this is a PowerPC target with floating-point registers.
3002
3003 proc check_effective_target_powerpc_fprs { } {
3004 if { [istarget powerpc*-*-*]
3005 || [istarget rs6000-*-*] } {
3006 return [check_no_compiler_messages powerpc_fprs object {
3007 #ifdef __NO_FPRS__
3008 #error no FPRs
3009 #else
3010 int dummy;
3011 #endif
3012 }]
3013 } else {
3014 return 0
3015 }
3016 }
3017
3018 # Return 1 if this is a PowerPC target with hardware double-precision
3019 # floating point.
3020
3021 proc check_effective_target_powerpc_hard_double { } {
3022 if { [istarget powerpc*-*-*]
3023 || [istarget rs6000-*-*] } {
3024 return [check_no_compiler_messages powerpc_hard_double object {
3025 #ifdef _SOFT_DOUBLE
3026 #error soft double
3027 #else
3028 int dummy;
3029 #endif
3030 }]
3031 } else {
3032 return 0
3033 }
3034 }
3035
3036 # Return 1 if this is a PowerPC target supporting -maltivec.
3037
3038 proc check_effective_target_powerpc_altivec_ok { } {
3039 if { ([istarget powerpc*-*-*]
3040 && ![istarget powerpc-*-linux*paired*])
3041 || [istarget rs6000-*-*] } {
3042 # AltiVec is not supported on AIX before 5.3.
3043 if { [istarget powerpc*-*-aix4*]
3044 || [istarget powerpc*-*-aix5.1*]
3045 || [istarget powerpc*-*-aix5.2*] } {
3046 return 0
3047 }
3048 return [check_no_compiler_messages powerpc_altivec_ok object {
3049 int dummy;
3050 } "-maltivec"]
3051 } else {
3052 return 0
3053 }
3054 }
3055
3056 # Return 1 if this is a PowerPC target supporting -mpower8-vector
3057
3058 proc check_effective_target_powerpc_p8vector_ok { } {
3059 if { ([istarget powerpc*-*-*]
3060 && ![istarget powerpc-*-linux*paired*])
3061 || [istarget rs6000-*-*] } {
3062 # AltiVec is not supported on AIX before 5.3.
3063 if { [istarget powerpc*-*-aix4*]
3064 || [istarget powerpc*-*-aix5.1*]
3065 || [istarget powerpc*-*-aix5.2*] } {
3066 return 0
3067 }
3068 return [check_no_compiler_messages powerpc_p8vector_ok object {
3069 int main (void) {
3070 #ifdef __MACH__
3071 asm volatile ("xxlorc vs0,vs0,vs0");
3072 #else
3073 asm volatile ("xxlorc 0,0,0");
3074 #endif
3075 return 0;
3076 }
3077 } "-mpower8-vector"]
3078 } else {
3079 return 0
3080 }
3081 }
3082
3083 # Return 1 if this is a PowerPC target supporting -mvsx
3084
3085 proc check_effective_target_powerpc_vsx_ok { } {
3086 if { ([istarget powerpc*-*-*]
3087 && ![istarget powerpc-*-linux*paired*])
3088 || [istarget rs6000-*-*] } {
3089 # VSX is not supported on AIX before 7.1.
3090 if { [istarget powerpc*-*-aix4*]
3091 || [istarget powerpc*-*-aix5*]
3092 || [istarget powerpc*-*-aix6*] } {
3093 return 0
3094 }
3095 return [check_no_compiler_messages powerpc_vsx_ok object {
3096 int main (void) {
3097 #ifdef __MACH__
3098 asm volatile ("xxlor vs0,vs0,vs0");
3099 #else
3100 asm volatile ("xxlor 0,0,0");
3101 #endif
3102 return 0;
3103 }
3104 } "-mvsx"]
3105 } else {
3106 return 0
3107 }
3108 }
3109
3110 # Return 1 if this is a PowerPC target supporting -mhtm
3111
3112 proc check_effective_target_powerpc_htm_ok { } {
3113 if { ([istarget powerpc*-*-*]
3114 && ![istarget powerpc-*-linux*paired*])
3115 || [istarget rs6000-*-*] } {
3116 # HTM is not supported on AIX yet.
3117 if { [istarget powerpc*-*-aix*] } {
3118 return 0
3119 }
3120 return [check_no_compiler_messages powerpc_htm_ok object {
3121 int main (void) {
3122 asm volatile ("tbegin. 0");
3123 return 0;
3124 }
3125 } "-mhtm"]
3126 } else {
3127 return 0
3128 }
3129 }
3130
3131 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
3132
3133 proc check_effective_target_powerpc_ppu_ok { } {
3134 if [check_effective_target_powerpc_altivec_ok] {
3135 return [check_no_compiler_messages cell_asm_available object {
3136 int main (void) {
3137 #ifdef __MACH__
3138 asm volatile ("lvlx v0,v0,v0");
3139 #else
3140 asm volatile ("lvlx 0,0,0");
3141 #endif
3142 return 0;
3143 }
3144 }]
3145 } else {
3146 return 0
3147 }
3148 }
3149
3150 # Return 1 if this is a PowerPC target that supports SPU.
3151
3152 proc check_effective_target_powerpc_spu { } {
3153 if { [istarget powerpc*-*-linux*] } {
3154 return [check_effective_target_powerpc_altivec_ok]
3155 } else {
3156 return 0
3157 }
3158 }
3159
3160 # Return 1 if this is a PowerPC SPE target. The check includes options
3161 # specified by dg-options for this test, so don't cache the result.
3162
3163 proc check_effective_target_powerpc_spe_nocache { } {
3164 if { [istarget powerpc*-*-*] } {
3165 return [check_no_compiler_messages_nocache powerpc_spe object {
3166 #ifndef __SPE__
3167 #error not SPE
3168 #else
3169 int dummy;
3170 #endif
3171 } [current_compiler_flags]]
3172 } else {
3173 return 0
3174 }
3175 }
3176
3177 # Return 1 if this is a PowerPC target with SPE enabled.
3178
3179 proc check_effective_target_powerpc_spe { } {
3180 if { [istarget powerpc*-*-*] } {
3181 return [check_no_compiler_messages powerpc_spe object {
3182 #ifndef __SPE__
3183 #error not SPE
3184 #else
3185 int dummy;
3186 #endif
3187 }]
3188 } else {
3189 return 0
3190 }
3191 }
3192
3193 # Return 1 if this is a PowerPC target with Altivec enabled.
3194
3195 proc check_effective_target_powerpc_altivec { } {
3196 if { [istarget powerpc*-*-*] } {
3197 return [check_no_compiler_messages powerpc_altivec object {
3198 #ifndef __ALTIVEC__
3199 #error not Altivec
3200 #else
3201 int dummy;
3202 #endif
3203 }]
3204 } else {
3205 return 0
3206 }
3207 }
3208
3209 # Return 1 if this is a PowerPC 405 target. The check includes options
3210 # specified by dg-options for this test, so don't cache the result.
3211
3212 proc check_effective_target_powerpc_405_nocache { } {
3213 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
3214 return [check_no_compiler_messages_nocache powerpc_405 object {
3215 #ifdef __PPC405__
3216 int dummy;
3217 #else
3218 #error not a PPC405
3219 #endif
3220 } [current_compiler_flags]]
3221 } else {
3222 return 0
3223 }
3224 }
3225
3226 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
3227
3228 proc check_effective_target_powerpc_elfv2 { } {
3229 if { [istarget powerpc*-*-*] } {
3230 return [check_no_compiler_messages powerpc_elfv2 object {
3231 #if _CALL_ELF != 2
3232 #error not ELF v2 ABI
3233 #else
3234 int dummy;
3235 #endif
3236 }]
3237 } else {
3238 return 0
3239 }
3240 }
3241
3242 # Return 1 if this is a SPU target with a toolchain that
3243 # supports automatic overlay generation.
3244
3245 proc check_effective_target_spu_auto_overlay { } {
3246 if { [istarget spu*-*-elf*] } {
3247 return [check_no_compiler_messages spu_auto_overlay executable {
3248 int main (void) { }
3249 } "-Wl,--auto-overlay" ]
3250 } else {
3251 return 0
3252 }
3253 }
3254
3255 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
3256 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
3257 # test environment appears to run executables on such a simulator.
3258
3259 proc check_effective_target_ultrasparc_hw { } {
3260 return [check_runtime ultrasparc_hw {
3261 int main() { return 0; }
3262 } "-mcpu=ultrasparc"]
3263 }
3264
3265 # Return 1 if the test environment supports executing UltraSPARC VIS2
3266 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
3267
3268 proc check_effective_target_ultrasparc_vis2_hw { } {
3269 return [check_runtime ultrasparc_vis2_hw {
3270 int main() { __asm__(".word 0x81b00320"); return 0; }
3271 } "-mcpu=ultrasparc3"]
3272 }
3273
3274 # Return 1 if the test environment supports executing UltraSPARC VIS3
3275 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
3276
3277 proc check_effective_target_ultrasparc_vis3_hw { } {
3278 return [check_runtime ultrasparc_vis3_hw {
3279 int main() { __asm__(".word 0x81b00220"); return 0; }
3280 } "-mcpu=niagara3"]
3281 }
3282
3283 # Return 1 if this is a SPARC-V9 target.
3284
3285 proc check_effective_target_sparc_v9 { } {
3286 if { [istarget sparc*-*-*] } {
3287 return [check_no_compiler_messages sparc_v9 object {
3288 int main (void) {
3289 asm volatile ("return %i7+8");
3290 return 0;
3291 }
3292 }]
3293 } else {
3294 return 0
3295 }
3296 }
3297
3298 # Return 1 if this is a SPARC target with VIS enabled.
3299
3300 proc check_effective_target_sparc_vis { } {
3301 if { [istarget sparc*-*-*] } {
3302 return [check_no_compiler_messages sparc_vis object {
3303 #ifndef __VIS__
3304 #error not VIS
3305 #else
3306 int dummy;
3307 #endif
3308 }]
3309 } else {
3310 return 0
3311 }
3312 }
3313
3314 # Return 1 if the target supports hardware vector shift operation.
3315
3316 proc check_effective_target_vect_shift { } {
3317 global et_vect_shift_saved
3318
3319 if [info exists et_vect_shift_saved] {
3320 verbose "check_effective_target_vect_shift: using cached result" 2
3321 } else {
3322 set et_vect_shift_saved 0
3323 if { ([istarget powerpc*-*-*]
3324 && ![istarget powerpc-*-linux*paired*])
3325 || [istarget ia64-*-*]
3326 || [istarget i?86-*-*]
3327 || [istarget x86_64-*-*]
3328 || [istarget aarch64*-*-*]
3329 || [check_effective_target_arm32]
3330 || ([istarget mips*-*-*]
3331 && [check_effective_target_mips_loongson]) } {
3332 set et_vect_shift_saved 1
3333 }
3334 }
3335
3336 verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
3337 return $et_vect_shift_saved
3338 }
3339
3340 proc check_effective_target_whole_vector_shift { } {
3341 if { [istarget x86_64-*-*]
3342 || [istarget ia64-*-*]
3343 || ([check_effective_target_arm32]
3344 && [check_effective_target_arm_little_endian])
3345 || ([istarget mips*-*-*]
3346 && [check_effective_target_mips_loongson]) } {
3347 set answer 1
3348 } else {
3349 set answer 0
3350 }
3351
3352 verbose "check_effective_target_vect_long: returning $answer" 2
3353 return $answer
3354 }
3355
3356 # Return 1 if the target supports vector bswap operations.
3357
3358 proc check_effective_target_vect_bswap { } {
3359 global et_vect_bswap_saved
3360
3361 if [info exists et_vect_bswap_saved] {
3362 verbose "check_effective_target_vect_bswap: using cached result" 2
3363 } else {
3364 set et_vect_bswap_saved 0
3365 if { [istarget aarch64*-*-*]
3366 || ([istarget arm*-*-*]
3367 && [check_effective_target_arm_neon])
3368 } {
3369 set et_vect_bswap_saved 1
3370 }
3371 }
3372
3373 verbose "check_effective_target_vect_bswap: returning $et_vect_bswap_saved" 2
3374 return $et_vect_bswap_saved
3375 }
3376
3377 # Return 1 if the target supports hardware vector shift operation for char.
3378
3379 proc check_effective_target_vect_shift_char { } {
3380 global et_vect_shift_char_saved
3381
3382 if [info exists et_vect_shift_char_saved] {
3383 verbose "check_effective_target_vect_shift_char: using cached result" 2
3384 } else {
3385 set et_vect_shift_char_saved 0
3386 if { ([istarget powerpc*-*-*]
3387 && ![istarget powerpc-*-linux*paired*])
3388 || [check_effective_target_arm32] } {
3389 set et_vect_shift_char_saved 1
3390 }
3391 }
3392
3393 verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
3394 return $et_vect_shift_char_saved
3395 }
3396
3397 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
3398 #
3399 # This can change for different subtargets so do not cache the result.
3400
3401 proc check_effective_target_vect_long { } {
3402 if { [istarget i?86-*-*]
3403 || (([istarget powerpc*-*-*]
3404 && ![istarget powerpc-*-linux*paired*])
3405 && [check_effective_target_ilp32])
3406 || [istarget x86_64-*-*]
3407 || [check_effective_target_arm32]
3408 || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } {
3409 set answer 1
3410 } else {
3411 set answer 0
3412 }
3413
3414 verbose "check_effective_target_vect_long: returning $answer" 2
3415 return $answer
3416 }
3417
3418 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
3419 #
3420 # This won't change for different subtargets so cache the result.
3421
3422 proc check_effective_target_vect_float { } {
3423 global et_vect_float_saved
3424
3425 if [info exists et_vect_float_saved] {
3426 verbose "check_effective_target_vect_float: using cached result" 2
3427 } else {
3428 set et_vect_float_saved 0
3429 if { [istarget i?86-*-*]
3430 || [istarget powerpc*-*-*]
3431 || [istarget spu-*-*]
3432 || [istarget mips-sde-elf]
3433 || [istarget mipsisa64*-*-*]
3434 || [istarget x86_64-*-*]
3435 || [istarget ia64-*-*]
3436 || [istarget aarch64*-*-*]
3437 || [check_effective_target_arm32] } {
3438 set et_vect_float_saved 1
3439 }
3440 }
3441
3442 verbose "check_effective_target_vect_float: returning $et_vect_float_saved" 2
3443 return $et_vect_float_saved
3444 }
3445
3446 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
3447 #
3448 # This won't change for different subtargets so cache the result.
3449
3450 proc check_effective_target_vect_double { } {
3451 global et_vect_double_saved
3452
3453 if [info exists et_vect_double_saved] {
3454 verbose "check_effective_target_vect_double: using cached result" 2
3455 } else {
3456 set et_vect_double_saved 0
3457 if { [istarget i?86-*-*]
3458 || [istarget aarch64*-*-*]
3459 || [istarget x86_64-*-*] } {
3460 if { [check_no_compiler_messages vect_double assembly {
3461 #ifdef __tune_atom__
3462 # error No double vectorizer support.
3463 #endif
3464 }] } {
3465 set et_vect_double_saved 1
3466 } else {
3467 set et_vect_double_saved 0
3468 }
3469 } elseif { [istarget spu-*-*] } {
3470 set et_vect_double_saved 1
3471 }
3472 }
3473
3474 verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
3475 return $et_vect_double_saved
3476 }
3477
3478 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
3479 #
3480 # This won't change for different subtargets so cache the result.
3481
3482 proc check_effective_target_vect_long_long { } {
3483 global et_vect_long_long_saved
3484
3485 if [info exists et_vect_long_long_saved] {
3486 verbose "check_effective_target_vect_long_long: using cached result" 2
3487 } else {
3488 set et_vect_long_long_saved 0
3489 if { [istarget i?86-*-*]
3490 || [istarget x86_64-*-*] } {
3491 set et_vect_long_long_saved 1
3492 }
3493 }
3494
3495 verbose "check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
3496 return $et_vect_long_long_saved
3497 }
3498
3499
3500 # Return 1 if the target plus current options does not support a vector
3501 # max instruction on "int", 0 otherwise.
3502 #
3503 # This won't change for different subtargets so cache the result.
3504
3505 proc check_effective_target_vect_no_int_max { } {
3506 global et_vect_no_int_max_saved
3507
3508 if [info exists et_vect_no_int_max_saved] {
3509 verbose "check_effective_target_vect_no_int_max: using cached result" 2
3510 } else {
3511 set et_vect_no_int_max_saved 0
3512 if { [istarget sparc*-*-*]
3513 || [istarget spu-*-*]
3514 || [istarget alpha*-*-*]
3515 || ([istarget mips*-*-*]
3516 && [check_effective_target_mips_loongson]) } {
3517 set et_vect_no_int_max_saved 1
3518 }
3519 }
3520 verbose "check_effective_target_vect_no_int_max: returning $et_vect_no_int_max_saved" 2
3521 return $et_vect_no_int_max_saved
3522 }
3523
3524 # Return 1 if the target plus current options does not support a vector
3525 # add instruction on "int", 0 otherwise.
3526 #
3527 # This won't change for different subtargets so cache the result.
3528
3529 proc check_effective_target_vect_no_int_add { } {
3530 global et_vect_no_int_add_saved
3531
3532 if [info exists et_vect_no_int_add_saved] {
3533 verbose "check_effective_target_vect_no_int_add: using cached result" 2
3534 } else {
3535 set et_vect_no_int_add_saved 0
3536 # Alpha only supports vector add on V8QI and V4HI.
3537 if { [istarget alpha*-*-*] } {
3538 set et_vect_no_int_add_saved 1
3539 }
3540 }
3541 verbose "check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
3542 return $et_vect_no_int_add_saved
3543 }
3544
3545 # Return 1 if the target plus current options does not support vector
3546 # bitwise instructions, 0 otherwise.
3547 #
3548 # This won't change for different subtargets so cache the result.
3549
3550 proc check_effective_target_vect_no_bitwise { } {
3551 global et_vect_no_bitwise_saved
3552
3553 if [info exists et_vect_no_bitwise_saved] {
3554 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
3555 } else {
3556 set et_vect_no_bitwise_saved 0
3557 }
3558 verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
3559 return $et_vect_no_bitwise_saved
3560 }
3561
3562 # Return 1 if the target plus current options supports vector permutation,
3563 # 0 otherwise.
3564 #
3565 # This won't change for different subtargets so cache the result.
3566
3567 proc check_effective_target_vect_perm { } {
3568 global et_vect_perm
3569
3570 if [info exists et_vect_perm_saved] {
3571 verbose "check_effective_target_vect_perm: using cached result" 2
3572 } else {
3573 set et_vect_perm_saved 0
3574 if { [is-effective-target arm_neon_ok]
3575 || [istarget aarch64*-*-*]
3576 || [istarget powerpc*-*-*]
3577 || [istarget spu-*-*]
3578 || [istarget i?86-*-*]
3579 || [istarget x86_64-*-*]
3580 || ([istarget mips*-*-*]
3581 && [check_effective_target_mpaired_single]) } {
3582 set et_vect_perm_saved 1
3583 }
3584 }
3585 verbose "check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
3586 return $et_vect_perm_saved
3587 }
3588
3589 # Return 1 if the target plus current options supports vector permutation
3590 # on byte-sized elements, 0 otherwise.
3591 #
3592 # This won't change for different subtargets so cache the result.
3593
3594 proc check_effective_target_vect_perm_byte { } {
3595 global et_vect_perm_byte
3596
3597 if [info exists et_vect_perm_byte_saved] {
3598 verbose "check_effective_target_vect_perm_byte: using cached result" 2
3599 } else {
3600 set et_vect_perm_byte_saved 0
3601 if { ([is-effective-target arm_neon_ok]
3602 && [is-effective-target arm_little_endian])
3603 || ([istarget aarch64*-*-*]
3604 && [is-effective-target aarch64_little_endian])
3605 || [istarget powerpc*-*-*]
3606 || [istarget spu-*-*] } {
3607 set et_vect_perm_byte_saved 1
3608 }
3609 }
3610 verbose "check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
3611 return $et_vect_perm_byte_saved
3612 }
3613
3614 # Return 1 if the target plus current options supports vector permutation
3615 # on short-sized elements, 0 otherwise.
3616 #
3617 # This won't change for different subtargets so cache the result.
3618
3619 proc check_effective_target_vect_perm_short { } {
3620 global et_vect_perm_short
3621
3622 if [info exists et_vect_perm_short_saved] {
3623 verbose "check_effective_target_vect_perm_short: using cached result" 2
3624 } else {
3625 set et_vect_perm_short_saved 0
3626 if { ([is-effective-target arm_neon_ok]
3627 && [is-effective-target arm_little_endian])
3628 || ([istarget aarch64*-*-*]
3629 && [is-effective-target aarch64_little_endian])
3630 || [istarget powerpc*-*-*]
3631 || [istarget spu-*-*] } {
3632 set et_vect_perm_short_saved 1
3633 }
3634 }
3635 verbose "check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
3636 return $et_vect_perm_short_saved
3637 }
3638
3639 # Return 1 if the target plus current options supports a vector
3640 # widening summation of *short* args into *int* result, 0 otherwise.
3641 #
3642 # This won't change for different subtargets so cache the result.
3643
3644 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
3645 global et_vect_widen_sum_hi_to_si_pattern
3646
3647 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved] {
3648 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
3649 } else {
3650 set et_vect_widen_sum_hi_to_si_pattern_saved 0
3651 if { [istarget powerpc*-*-*]
3652 || [istarget ia64-*-*] } {
3653 set et_vect_widen_sum_hi_to_si_pattern_saved 1
3654 }
3655 }
3656 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
3657 return $et_vect_widen_sum_hi_to_si_pattern_saved
3658 }
3659
3660 # Return 1 if the target plus current options supports a vector
3661 # widening summation of *short* args into *int* result, 0 otherwise.
3662 # A target can also support this widening summation if it can support
3663 # promotion (unpacking) from shorts to ints.
3664 #
3665 # This won't change for different subtargets so cache the result.
3666
3667 proc check_effective_target_vect_widen_sum_hi_to_si { } {
3668 global et_vect_widen_sum_hi_to_si
3669
3670 if [info exists et_vect_widen_sum_hi_to_si_saved] {
3671 verbose "check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
3672 } else {
3673 set et_vect_widen_sum_hi_to_si_saved [check_effective_target_vect_unpack]
3674 if { [istarget powerpc*-*-*]
3675 || [istarget ia64-*-*] } {
3676 set et_vect_widen_sum_hi_to_si_saved 1
3677 }
3678 }
3679 verbose "check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
3680 return $et_vect_widen_sum_hi_to_si_saved
3681 }
3682
3683 # Return 1 if the target plus current options supports a vector
3684 # widening summation of *char* args into *short* result, 0 otherwise.
3685 # A target can also support this widening summation if it can support
3686 # promotion (unpacking) from chars to shorts.
3687 #
3688 # This won't change for different subtargets so cache the result.
3689
3690 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
3691 global et_vect_widen_sum_qi_to_hi
3692
3693 if [info exists et_vect_widen_sum_qi_to_hi_saved] {
3694 verbose "check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
3695 } else {
3696 set et_vect_widen_sum_qi_to_hi_saved 0
3697 if { [check_effective_target_vect_unpack]
3698 || [check_effective_target_arm_neon_ok]
3699 || [istarget ia64-*-*] } {
3700 set et_vect_widen_sum_qi_to_hi_saved 1
3701 }
3702 }
3703 verbose "check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
3704 return $et_vect_widen_sum_qi_to_hi_saved
3705 }
3706
3707 # Return 1 if the target plus current options supports a vector
3708 # widening summation of *char* args into *int* result, 0 otherwise.
3709 #
3710 # This won't change for different subtargets so cache the result.
3711
3712 proc check_effective_target_vect_widen_sum_qi_to_si { } {
3713 global et_vect_widen_sum_qi_to_si
3714
3715 if [info exists et_vect_widen_sum_qi_to_si_saved] {
3716 verbose "check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
3717 } else {
3718 set et_vect_widen_sum_qi_to_si_saved 0
3719 if { [istarget powerpc*-*-*] } {
3720 set et_vect_widen_sum_qi_to_si_saved 1
3721 }
3722 }
3723 verbose "check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
3724 return $et_vect_widen_sum_qi_to_si_saved
3725 }
3726
3727 # Return 1 if the target plus current options supports a vector
3728 # widening multiplication of *char* args into *short* result, 0 otherwise.
3729 # A target can also support this widening multplication if it can support
3730 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
3731 # multiplication of shorts).
3732 #
3733 # This won't change for different subtargets so cache the result.
3734
3735
3736 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
3737 global et_vect_widen_mult_qi_to_hi
3738
3739 if [info exists et_vect_widen_mult_qi_to_hi_saved] {
3740 verbose "check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
3741 } else {
3742 if { [check_effective_target_vect_unpack]
3743 && [check_effective_target_vect_short_mult] } {
3744 set et_vect_widen_mult_qi_to_hi_saved 1
3745 } else {
3746 set et_vect_widen_mult_qi_to_hi_saved 0
3747 }
3748 if { [istarget powerpc*-*-*]
3749 || [istarget aarch64*-*-*]
3750 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
3751 set et_vect_widen_mult_qi_to_hi_saved 1
3752 }
3753 }
3754 verbose "check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
3755 return $et_vect_widen_mult_qi_to_hi_saved
3756 }
3757
3758 # Return 1 if the target plus current options supports a vector
3759 # widening multiplication of *short* args into *int* result, 0 otherwise.
3760 # A target can also support this widening multplication if it can support
3761 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
3762 # multiplication of ints).
3763 #
3764 # This won't change for different subtargets so cache the result.
3765
3766
3767 proc check_effective_target_vect_widen_mult_hi_to_si { } {
3768 global et_vect_widen_mult_hi_to_si
3769
3770 if [info exists et_vect_widen_mult_hi_to_si_saved] {
3771 verbose "check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
3772 } else {
3773 if { [check_effective_target_vect_unpack]
3774 && [check_effective_target_vect_int_mult] } {
3775 set et_vect_widen_mult_hi_to_si_saved 1
3776 } else {
3777 set et_vect_widen_mult_hi_to_si_saved 0
3778 }
3779 if { [istarget powerpc*-*-*]
3780 || [istarget spu-*-*]
3781 || [istarget ia64-*-*]
3782 || [istarget aarch64*-*-*]
3783 || [istarget i?86-*-*]
3784 || [istarget x86_64-*-*]
3785 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
3786 set et_vect_widen_mult_hi_to_si_saved 1
3787 }
3788 }
3789 verbose "check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
3790 return $et_vect_widen_mult_hi_to_si_saved
3791 }
3792
3793 # Return 1 if the target plus current options supports a vector
3794 # widening multiplication of *char* args into *short* result, 0 otherwise.
3795 #
3796 # This won't change for different subtargets so cache the result.
3797
3798 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
3799 global et_vect_widen_mult_qi_to_hi_pattern
3800
3801 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] {
3802 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
3803 } else {
3804 set et_vect_widen_mult_qi_to_hi_pattern_saved 0
3805 if { [istarget powerpc*-*-*]
3806 || ([istarget arm*-*-*]
3807 && [check_effective_target_arm_neon_ok]
3808 && [check_effective_target_arm_little_endian]) } {
3809 set et_vect_widen_mult_qi_to_hi_pattern_saved 1
3810 }
3811 }
3812 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
3813 return $et_vect_widen_mult_qi_to_hi_pattern_saved
3814 }
3815
3816 # Return 1 if the target plus current options supports a vector
3817 # widening multiplication of *short* args into *int* result, 0 otherwise.
3818 #
3819 # This won't change for different subtargets so cache the result.
3820
3821 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
3822 global et_vect_widen_mult_hi_to_si_pattern
3823
3824 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved] {
3825 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
3826 } else {
3827 set et_vect_widen_mult_hi_to_si_pattern_saved 0
3828 if { [istarget powerpc*-*-*]
3829 || [istarget spu-*-*]
3830 || [istarget ia64-*-*]
3831 || [istarget i?86-*-*]
3832 || [istarget x86_64-*-*]
3833 || ([istarget arm*-*-*]
3834 && [check_effective_target_arm_neon_ok]
3835 && [check_effective_target_arm_little_endian]) } {
3836 set et_vect_widen_mult_hi_to_si_pattern_saved 1
3837 }
3838 }
3839 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
3840 return $et_vect_widen_mult_hi_to_si_pattern_saved
3841 }
3842
3843 # Return 1 if the target plus current options supports a vector
3844 # widening multiplication of *int* args into *long* result, 0 otherwise.
3845 #
3846 # This won't change for different subtargets so cache the result.
3847
3848 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
3849 global et_vect_widen_mult_si_to_di_pattern
3850
3851 if [info exists et_vect_widen_mult_si_to_di_pattern_saved] {
3852 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: using cached result" 2
3853 } else {
3854 set et_vect_widen_mult_si_to_di_pattern_saved 0
3855 if {[istarget ia64-*-*]
3856 || [istarget i?86-*-*]
3857 || [istarget x86_64-*-*] } {
3858 set et_vect_widen_mult_si_to_di_pattern_saved 1
3859 }
3860 }
3861 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: returning $et_vect_widen_mult_si_to_di_pattern_saved" 2
3862 return $et_vect_widen_mult_si_to_di_pattern_saved
3863 }
3864
3865 # Return 1 if the target plus current options supports a vector
3866 # widening shift, 0 otherwise.
3867 #
3868 # This won't change for different subtargets so cache the result.
3869
3870 proc check_effective_target_vect_widen_shift { } {
3871 global et_vect_widen_shift_saved
3872
3873 if [info exists et_vect_shift_saved] {
3874 verbose "check_effective_target_vect_widen_shift: using cached result" 2
3875 } else {
3876 set et_vect_widen_shift_saved 0
3877 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
3878 set et_vect_widen_shift_saved 1
3879 }
3880 }
3881 verbose "check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2
3882 return $et_vect_widen_shift_saved
3883 }
3884
3885 # Return 1 if the target plus current options supports a vector
3886 # dot-product of signed chars, 0 otherwise.
3887 #
3888 # This won't change for different subtargets so cache the result.
3889
3890 proc check_effective_target_vect_sdot_qi { } {
3891 global et_vect_sdot_qi
3892
3893 if [info exists et_vect_sdot_qi_saved] {
3894 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
3895 } else {
3896 set et_vect_sdot_qi_saved 0
3897 if { [istarget ia64-*-*] } {
3898 set et_vect_udot_qi_saved 1
3899 }
3900 }
3901 verbose "check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
3902 return $et_vect_sdot_qi_saved
3903 }
3904
3905 # Return 1 if the target plus current options supports a vector
3906 # dot-product of unsigned chars, 0 otherwise.
3907 #
3908 # This won't change for different subtargets so cache the result.
3909
3910 proc check_effective_target_vect_udot_qi { } {
3911 global et_vect_udot_qi
3912
3913 if [info exists et_vect_udot_qi_saved] {
3914 verbose "check_effective_target_vect_udot_qi: using cached result" 2
3915 } else {
3916 set et_vect_udot_qi_saved 0
3917 if { [istarget powerpc*-*-*]
3918 || [istarget ia64-*-*] } {
3919 set et_vect_udot_qi_saved 1
3920 }
3921 }
3922 verbose "check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
3923 return $et_vect_udot_qi_saved
3924 }
3925
3926 # Return 1 if the target plus current options supports a vector
3927 # dot-product of signed shorts, 0 otherwise.
3928 #
3929 # This won't change for different subtargets so cache the result.
3930
3931 proc check_effective_target_vect_sdot_hi { } {
3932 global et_vect_sdot_hi
3933
3934 if [info exists et_vect_sdot_hi_saved] {
3935 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
3936 } else {
3937 set et_vect_sdot_hi_saved 0
3938 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
3939 || [istarget ia64-*-*]
3940 || [istarget i?86-*-*]
3941 || [istarget x86_64-*-*] } {
3942 set et_vect_sdot_hi_saved 1
3943 }
3944 }
3945 verbose "check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
3946 return $et_vect_sdot_hi_saved
3947 }
3948
3949 # Return 1 if the target plus current options supports a vector
3950 # dot-product of unsigned shorts, 0 otherwise.
3951 #
3952 # This won't change for different subtargets so cache the result.
3953
3954 proc check_effective_target_vect_udot_hi { } {
3955 global et_vect_udot_hi
3956
3957 if [info exists et_vect_udot_hi_saved] {
3958 verbose "check_effective_target_vect_udot_hi: using cached result" 2
3959 } else {
3960 set et_vect_udot_hi_saved 0
3961 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) } {
3962 set et_vect_udot_hi_saved 1
3963 }
3964 }
3965 verbose "check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
3966 return $et_vect_udot_hi_saved
3967 }
3968
3969 # Return 1 if the target plus current options supports a vector
3970 # sad operation of unsigned chars, 0 otherwise.
3971 #
3972 # This won't change for different subtargets so cache the result.
3973
3974 proc check_effective_target_vect_usad_char { } {
3975 global et_vect_usad_char
3976
3977 if [info exists et_vect_usad_char_saved] {
3978 verbose "check_effective_target_vect_usad_char: using cached result" 2
3979 } else {
3980 set et_vect_usad_char_saved 0
3981 if { ([istarget i?86-*-*]
3982 || [istarget x86_64-*-*]) } {
3983 set et_vect_usad_char_saved 1
3984 }
3985 }
3986 verbose "check_effective_target_vect_usad_char: returning $et_vect_usad_char_saved" 2
3987 return $et_vect_usad_char_saved
3988 }
3989
3990 # Return 1 if the target plus current options supports a vector
3991 # demotion (packing) of shorts (to chars) and ints (to shorts)
3992 # using modulo arithmetic, 0 otherwise.
3993 #
3994 # This won't change for different subtargets so cache the result.
3995
3996 proc check_effective_target_vect_pack_trunc { } {
3997 global et_vect_pack_trunc
3998
3999 if [info exists et_vect_pack_trunc_saved] {
4000 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
4001 } else {
4002 set et_vect_pack_trunc_saved 0
4003 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4004 || [istarget i?86-*-*]
4005 || [istarget x86_64-*-*]
4006 || [istarget aarch64*-*-*]
4007 || [istarget spu-*-*]
4008 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4009 && [check_effective_target_arm_little_endian]) } {
4010 set et_vect_pack_trunc_saved 1
4011 }
4012 }
4013 verbose "check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
4014 return $et_vect_pack_trunc_saved
4015 }
4016
4017 # Return 1 if the target plus current options supports a vector
4018 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
4019 #
4020 # This won't change for different subtargets so cache the result.
4021
4022 proc check_effective_target_vect_unpack { } {
4023 global et_vect_unpack
4024
4025 if [info exists et_vect_unpack_saved] {
4026 verbose "check_effective_target_vect_unpack: using cached result" 2
4027 } else {
4028 set et_vect_unpack_saved 0
4029 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
4030 || [istarget i?86-*-*]
4031 || [istarget x86_64-*-*]
4032 || [istarget spu-*-*]
4033 || [istarget ia64-*-*]
4034 || [istarget aarch64*-*-*]
4035 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4036 && [check_effective_target_arm_little_endian]) } {
4037 set et_vect_unpack_saved 1
4038 }
4039 }
4040 verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
4041 return $et_vect_unpack_saved
4042 }
4043
4044 # Return 1 if the target plus current options does not guarantee
4045 # that its STACK_BOUNDARY is >= the reguired vector alignment.
4046 #
4047 # This won't change for different subtargets so cache the result.
4048
4049 proc check_effective_target_unaligned_stack { } {
4050 global et_unaligned_stack_saved
4051
4052 if [info exists et_unaligned_stack_saved] {
4053 verbose "check_effective_target_unaligned_stack: using cached result" 2
4054 } else {
4055 set et_unaligned_stack_saved 0
4056 }
4057 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
4058 return $et_unaligned_stack_saved
4059 }
4060
4061 # Return 1 if the target plus current options does not support a vector
4062 # alignment mechanism, 0 otherwise.
4063 #
4064 # This won't change for different subtargets so cache the result.
4065
4066 proc check_effective_target_vect_no_align { } {
4067 global et_vect_no_align_saved
4068
4069 if [info exists et_vect_no_align_saved] {
4070 verbose "check_effective_target_vect_no_align: using cached result" 2
4071 } else {
4072 set et_vect_no_align_saved 0
4073 if { [istarget mipsisa64*-*-*]
4074 || [istarget mips-sde-elf]
4075 || [istarget sparc*-*-*]
4076 || [istarget ia64-*-*]
4077 || [check_effective_target_arm_vect_no_misalign]
4078 || ([istarget mips*-*-*]
4079 && [check_effective_target_mips_loongson]) } {
4080 set et_vect_no_align_saved 1
4081 }
4082 }
4083 verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
4084 return $et_vect_no_align_saved
4085 }
4086
4087 # Return 1 if the target supports a vector misalign access, 0 otherwise.
4088 #
4089 # This won't change for different subtargets so cache the result.
4090
4091 proc check_effective_target_vect_hw_misalign { } {
4092 global et_vect_hw_misalign_saved
4093
4094 if [info exists et_vect_hw_misalign_saved] {
4095 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
4096 } else {
4097 set et_vect_hw_misalign_saved 0
4098 if { ([istarget x86_64-*-*]
4099 || [istarget aarch64*-*-*]
4100 || [istarget i?86-*-*]) } {
4101 set et_vect_hw_misalign_saved 1
4102 }
4103 }
4104 verbose "check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
4105 return $et_vect_hw_misalign_saved
4106 }
4107
4108
4109 # Return 1 if arrays are aligned to the vector alignment
4110 # boundary, 0 otherwise.
4111 #
4112 # This won't change for different subtargets so cache the result.
4113
4114 proc check_effective_target_vect_aligned_arrays { } {
4115 global et_vect_aligned_arrays
4116
4117 if [info exists et_vect_aligned_arrays_saved] {
4118 verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
4119 } else {
4120 set et_vect_aligned_arrays_saved 0
4121 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4122 if { ([is-effective-target lp64]
4123 && ( ![check_avx_available]
4124 || [check_prefer_avx128])) } {
4125 set et_vect_aligned_arrays_saved 1
4126 }
4127 }
4128 if [istarget spu-*-*] {
4129 set et_vect_aligned_arrays_saved 1
4130 }
4131 }
4132 verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
4133 return $et_vect_aligned_arrays_saved
4134 }
4135
4136 # Return 1 if types of size 32 bit or less are naturally aligned
4137 # (aligned to their type-size), 0 otherwise.
4138 #
4139 # This won't change for different subtargets so cache the result.
4140
4141 proc check_effective_target_natural_alignment_32 { } {
4142 global et_natural_alignment_32
4143
4144 if [info exists et_natural_alignment_32_saved] {
4145 verbose "check_effective_target_natural_alignment_32: using cached result" 2
4146 } else {
4147 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
4148 set et_natural_alignment_32_saved 1
4149 if { ([istarget *-*-darwin*] && [is-effective-target lp64]) } {
4150 set et_natural_alignment_32_saved 0
4151 }
4152 }
4153 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
4154 return $et_natural_alignment_32_saved
4155 }
4156
4157 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
4158 # type-size), 0 otherwise.
4159 #
4160 # This won't change for different subtargets so cache the result.
4161
4162 proc check_effective_target_natural_alignment_64 { } {
4163 global et_natural_alignment_64
4164
4165 if [info exists et_natural_alignment_64_saved] {
4166 verbose "check_effective_target_natural_alignment_64: using cached result" 2
4167 } else {
4168 set et_natural_alignment_64_saved 0
4169 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
4170 || [istarget spu-*-*] } {
4171 set et_natural_alignment_64_saved 1
4172 }
4173 }
4174 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
4175 return $et_natural_alignment_64_saved
4176 }
4177
4178 # Return 1 if all vector types are naturally aligned (aligned to their
4179 # type-size), 0 otherwise.
4180 #
4181 # This won't change for different subtargets so cache the result.
4182
4183 proc check_effective_target_vect_natural_alignment { } {
4184 global et_vect_natural_alignment
4185
4186 if [info exists et_vect_natural_alignment_saved] {
4187 verbose "check_effective_target_vect_natural_alignment: using cached result" 2
4188 } else {
4189 set et_vect_natural_alignment_saved 1
4190 if { [check_effective_target_arm_eabi] } {
4191 set et_vect_natural_alignment_saved 0
4192 }
4193 }
4194 verbose "check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2
4195 return $et_vect_natural_alignment_saved
4196 }
4197
4198 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
4199 #
4200 # This won't change for different subtargets so cache the result.
4201
4202 proc check_effective_target_vector_alignment_reachable { } {
4203 global et_vector_alignment_reachable
4204
4205 if [info exists et_vector_alignment_reachable_saved] {
4206 verbose "check_effective_target_vector_alignment_reachable: using cached result" 2
4207 } else {
4208 if { [check_effective_target_vect_aligned_arrays]
4209 || [check_effective_target_natural_alignment_32] } {
4210 set et_vector_alignment_reachable_saved 1
4211 } else {
4212 set et_vector_alignment_reachable_saved 0
4213 }
4214 }
4215 verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
4216 return $et_vector_alignment_reachable_saved
4217 }
4218
4219 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
4220 #
4221 # This won't change for different subtargets so cache the result.
4222
4223 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
4224 global et_vector_alignment_reachable_for_64bit
4225
4226 if [info exists et_vector_alignment_reachable_for_64bit_saved] {
4227 verbose "check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
4228 } else {
4229 if { [check_effective_target_vect_aligned_arrays]
4230 || [check_effective_target_natural_alignment_64] } {
4231 set et_vector_alignment_reachable_for_64bit_saved 1
4232 } else {
4233 set et_vector_alignment_reachable_for_64bit_saved 0
4234 }
4235 }
4236 verbose "check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
4237 return $et_vector_alignment_reachable_for_64bit_saved
4238 }
4239
4240 # Return 1 if the target only requires element alignment for vector accesses
4241
4242 proc check_effective_target_vect_element_align { } {
4243 global et_vect_element_align
4244
4245 if [info exists et_vect_element_align] {
4246 verbose "check_effective_target_vect_element_align: using cached result" 2
4247 } else {
4248 set et_vect_element_align 0
4249 if { ([istarget arm*-*-*]
4250 && ![check_effective_target_arm_vect_no_misalign])
4251 || [check_effective_target_vect_hw_misalign] } {
4252 set et_vect_element_align 1
4253 }
4254 }
4255
4256 verbose "check_effective_target_vect_element_align: returning $et_vect_element_align" 2
4257 return $et_vect_element_align
4258 }
4259
4260 # Return 1 if the target supports vector conditional operations, 0 otherwise.
4261
4262 proc check_effective_target_vect_condition { } {
4263 global et_vect_cond_saved
4264
4265 if [info exists et_vect_cond_saved] {
4266 verbose "check_effective_target_vect_cond: using cached result" 2
4267 } else {
4268 set et_vect_cond_saved 0
4269 if { [istarget aarch64*-*-*]
4270 || [istarget powerpc*-*-*]
4271 || [istarget ia64-*-*]
4272 || [istarget i?86-*-*]
4273 || [istarget spu-*-*]
4274 || [istarget x86_64-*-*]
4275 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4276 set et_vect_cond_saved 1
4277 }
4278 }
4279
4280 verbose "check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
4281 return $et_vect_cond_saved
4282 }
4283
4284 # Return 1 if the target supports vector conditional operations where
4285 # the comparison has different type from the lhs, 0 otherwise.
4286
4287 proc check_effective_target_vect_cond_mixed { } {
4288 global et_vect_cond_mixed_saved
4289
4290 if [info exists et_vect_cond_mixed_saved] {
4291 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
4292 } else {
4293 set et_vect_cond_mixed_saved 0
4294 if { [istarget i?86-*-*]
4295 || [istarget x86_64-*-*]
4296 || [istarget powerpc*-*-*] } {
4297 set et_vect_cond_mixed_saved 1
4298 }
4299 }
4300
4301 verbose "check_effective_target_vect_cond_mixed: returning $et_vect_cond_mixed_saved" 2
4302 return $et_vect_cond_mixed_saved
4303 }
4304
4305 # Return 1 if the target supports vector char multiplication, 0 otherwise.
4306
4307 proc check_effective_target_vect_char_mult { } {
4308 global et_vect_char_mult_saved
4309
4310 if [info exists et_vect_char_mult_saved] {
4311 verbose "check_effective_target_vect_char_mult: using cached result" 2
4312 } else {
4313 set et_vect_char_mult_saved 0
4314 if { [istarget aarch64*-*-*]
4315 || [istarget ia64-*-*]
4316 || [istarget i?86-*-*]
4317 || [istarget x86_64-*-*]
4318 || [check_effective_target_arm32] } {
4319 set et_vect_char_mult_saved 1
4320 }
4321 }
4322
4323 verbose "check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
4324 return $et_vect_char_mult_saved
4325 }
4326
4327 # Return 1 if the target supports vector short multiplication, 0 otherwise.
4328
4329 proc check_effective_target_vect_short_mult { } {
4330 global et_vect_short_mult_saved
4331
4332 if [info exists et_vect_short_mult_saved] {
4333 verbose "check_effective_target_vect_short_mult: using cached result" 2
4334 } else {
4335 set et_vect_short_mult_saved 0
4336 if { [istarget ia64-*-*]
4337 || [istarget spu-*-*]
4338 || [istarget i?86-*-*]
4339 || [istarget x86_64-*-*]
4340 || [istarget powerpc*-*-*]
4341 || [istarget aarch64*-*-*]
4342 || [check_effective_target_arm32]
4343 || ([istarget mips*-*-*]
4344 && [check_effective_target_mips_loongson]) } {
4345 set et_vect_short_mult_saved 1
4346 }
4347 }
4348
4349 verbose "check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
4350 return $et_vect_short_mult_saved
4351 }
4352
4353 # Return 1 if the target supports vector int multiplication, 0 otherwise.
4354
4355 proc check_effective_target_vect_int_mult { } {
4356 global et_vect_int_mult_saved
4357
4358 if [info exists et_vect_int_mult_saved] {
4359 verbose "check_effective_target_vect_int_mult: using cached result" 2
4360 } else {
4361 set et_vect_int_mult_saved 0
4362 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4363 || [istarget spu-*-*]
4364 || [istarget i?86-*-*]
4365 || [istarget x86_64-*-*]
4366 || [istarget ia64-*-*]
4367 || [istarget aarch64*-*-*]
4368 || [check_effective_target_arm32] } {
4369 set et_vect_int_mult_saved 1
4370 }
4371 }
4372
4373 verbose "check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
4374 return $et_vect_int_mult_saved
4375 }
4376
4377 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
4378
4379 proc check_effective_target_vect_extract_even_odd { } {
4380 global et_vect_extract_even_odd_saved
4381
4382 if [info exists et_vect_extract_even_odd_saved] {
4383 verbose "check_effective_target_vect_extract_even_odd: using cached result" 2
4384 } else {
4385 set et_vect_extract_even_odd_saved 0
4386 if { [istarget aarch64*-*-*]
4387 || [istarget powerpc*-*-*]
4388 || [is-effective-target arm_neon_ok]
4389 || [istarget i?86-*-*]
4390 || [istarget x86_64-*-*]
4391 || [istarget ia64-*-*]
4392 || [istarget spu-*-*]
4393 || ([istarget mips*-*-*]
4394 && [check_effective_target_mpaired_single]) } {
4395 set et_vect_extract_even_odd_saved 1
4396 }
4397 }
4398
4399 verbose "check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
4400 return $et_vect_extract_even_odd_saved
4401 }
4402
4403 # Return 1 if the target supports vector interleaving, 0 otherwise.
4404
4405 proc check_effective_target_vect_interleave { } {
4406 global et_vect_interleave_saved
4407
4408 if [info exists et_vect_interleave_saved] {
4409 verbose "check_effective_target_vect_interleave: using cached result" 2
4410 } else {
4411 set et_vect_interleave_saved 0
4412 if { [istarget aarch64*-*-*]
4413 || [istarget powerpc*-*-*]
4414 || [is-effective-target arm_neon_ok]
4415 || [istarget i?86-*-*]
4416 || [istarget x86_64-*-*]
4417 || [istarget ia64-*-*]
4418 || [istarget spu-*-*]
4419 || ([istarget mips*-*-*]
4420 && [check_effective_target_mpaired_single]) } {
4421 set et_vect_interleave_saved 1
4422 }
4423 }
4424
4425 verbose "check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
4426 return $et_vect_interleave_saved
4427 }
4428
4429 foreach N {2 3 4 8} {
4430 eval [string map [list N $N] {
4431 # Return 1 if the target supports 2-vector interleaving
4432 proc check_effective_target_vect_stridedN { } {
4433 global et_vect_stridedN_saved
4434
4435 if [info exists et_vect_stridedN_saved] {
4436 verbose "check_effective_target_vect_stridedN: using cached result" 2
4437 } else {
4438 set et_vect_stridedN_saved 0
4439 if { (N & -N) == N
4440 && [check_effective_target_vect_interleave]
4441 && [check_effective_target_vect_extract_even_odd] } {
4442 set et_vect_stridedN_saved 1
4443 }
4444 if { ([istarget arm*-*-*]
4445 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
4446 set et_vect_stridedN_saved 1
4447 }
4448 }
4449
4450 verbose "check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
4451 return $et_vect_stridedN_saved
4452 }
4453 }]
4454 }
4455
4456 # Return 1 if the target supports multiple vector sizes
4457
4458 proc check_effective_target_vect_multiple_sizes { } {
4459 global et_vect_multiple_sizes_saved
4460
4461 set et_vect_multiple_sizes_saved 0
4462 if { ([istarget aarch64*-*-*]
4463 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])) } {
4464 set et_vect_multiple_sizes_saved 1
4465 }
4466 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4467 if { ([check_avx_available] && ![check_prefer_avx128]) } {
4468 set et_vect_multiple_sizes_saved 1
4469 }
4470 }
4471
4472 verbose "check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
4473 return $et_vect_multiple_sizes_saved
4474 }
4475
4476 # Return 1 if the target supports vectors of 64 bits.
4477
4478 proc check_effective_target_vect64 { } {
4479 global et_vect64_saved
4480
4481 if [info exists et_vect64_saved] {
4482 verbose "check_effective_target_vect64: using cached result" 2
4483 } else {
4484 set et_vect64_saved 0
4485 if { ([istarget arm*-*-*]
4486 && [check_effective_target_arm_neon_ok]
4487 && [check_effective_target_arm_little_endian]) } {
4488 set et_vect64_saved 1
4489 }
4490 }
4491
4492 verbose "check_effective_target_vect64: returning $et_vect64_saved" 2
4493 return $et_vect64_saved
4494 }
4495
4496 # Return 1 if the target supports vector copysignf calls.
4497
4498 proc check_effective_target_vect_call_copysignf { } {
4499 global et_vect_call_copysignf_saved
4500
4501 if [info exists et_vect_call_copysignf_saved] {
4502 verbose "check_effective_target_vect_call_copysignf: using cached result" 2
4503 } else {
4504 set et_vect_call_copysignf_saved 0
4505 if { [istarget i?86-*-*]
4506 || [istarget x86_64-*-*]
4507 || [istarget powerpc*-*-*] } {
4508 set et_vect_call_copysignf_saved 1
4509 }
4510 }
4511
4512 verbose "check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
4513 return $et_vect_call_copysignf_saved
4514 }
4515
4516 # Return 1 if the target supports vector sqrtf calls.
4517
4518 proc check_effective_target_vect_call_sqrtf { } {
4519 global et_vect_call_sqrtf_saved
4520
4521 if [info exists et_vect_call_sqrtf_saved] {
4522 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
4523 } else {
4524 set et_vect_call_sqrtf_saved 0
4525 if { [istarget aarch64*-*-*]
4526 || [istarget i?86-*-*]
4527 || [istarget x86_64-*-*]
4528 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
4529 set et_vect_call_sqrtf_saved 1
4530 }
4531 }
4532
4533 verbose "check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
4534 return $et_vect_call_sqrtf_saved
4535 }
4536
4537 # Return 1 if the target supports vector lrint calls.
4538
4539 proc check_effective_target_vect_call_lrint { } {
4540 set et_vect_call_lrint 0
4541 if { ([istarget i?86-*-*] || [istarget x86_64-*-*]) && [check_effective_target_ilp32] } {
4542 set et_vect_call_lrint 1
4543 }
4544
4545 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
4546 return $et_vect_call_lrint
4547 }
4548
4549 # Return 1 if the target supports vector btrunc calls.
4550
4551 proc check_effective_target_vect_call_btrunc { } {
4552 global et_vect_call_btrunc_saved
4553
4554 if [info exists et_vect_call_btrunc_saved] {
4555 verbose "check_effective_target_vect_call_btrunc: using cached result" 2
4556 } else {
4557 set et_vect_call_btrunc_saved 0
4558 if { [istarget aarch64*-*-*] } {
4559 set et_vect_call_btrunc_saved 1
4560 }
4561 }
4562
4563 verbose "check_effective_target_vect_call_btrunc: returning $et_vect_call_btrunc_saved" 2
4564 return $et_vect_call_btrunc_saved
4565 }
4566
4567 # Return 1 if the target supports vector btruncf calls.
4568
4569 proc check_effective_target_vect_call_btruncf { } {
4570 global et_vect_call_btruncf_saved
4571
4572 if [info exists et_vect_call_btruncf_saved] {
4573 verbose "check_effective_target_vect_call_btruncf: using cached result" 2
4574 } else {
4575 set et_vect_call_btruncf_saved 0
4576 if { [istarget aarch64*-*-*] } {
4577 set et_vect_call_btruncf_saved 1
4578 }
4579 }
4580
4581 verbose "check_effective_target_vect_call_btruncf: returning $et_vect_call_btruncf_saved" 2
4582 return $et_vect_call_btruncf_saved
4583 }
4584
4585 # Return 1 if the target supports vector ceil calls.
4586
4587 proc check_effective_target_vect_call_ceil { } {
4588 global et_vect_call_ceil_saved
4589
4590 if [info exists et_vect_call_ceil_saved] {
4591 verbose "check_effective_target_vect_call_ceil: using cached result" 2
4592 } else {
4593 set et_vect_call_ceil_saved 0
4594 if { [istarget aarch64*-*-*] } {
4595 set et_vect_call_ceil_saved 1
4596 }
4597 }
4598
4599 verbose "check_effective_target_vect_call_ceil: returning $et_vect_call_ceil_saved" 2
4600 return $et_vect_call_ceil_saved
4601 }
4602
4603 # Return 1 if the target supports vector ceilf calls.
4604
4605 proc check_effective_target_vect_call_ceilf { } {
4606 global et_vect_call_ceilf_saved
4607
4608 if [info exists et_vect_call_ceilf_saved] {
4609 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
4610 } else {
4611 set et_vect_call_ceilf_saved 0
4612 if { [istarget aarch64*-*-*] } {
4613 set et_vect_call_ceilf_saved 1
4614 }
4615 }
4616
4617 verbose "check_effective_target_vect_call_ceilf: returning $et_vect_call_ceilf_saved" 2
4618 return $et_vect_call_ceilf_saved
4619 }
4620
4621 # Return 1 if the target supports vector floor calls.
4622
4623 proc check_effective_target_vect_call_floor { } {
4624 global et_vect_call_floor_saved
4625
4626 if [info exists et_vect_call_floor_saved] {
4627 verbose "check_effective_target_vect_call_floor: using cached result" 2
4628 } else {
4629 set et_vect_call_floor_saved 0
4630 if { [istarget aarch64*-*-*] } {
4631 set et_vect_call_floor_saved 1
4632 }
4633 }
4634
4635 verbose "check_effective_target_vect_call_floor: returning $et_vect_call_floor_saved" 2
4636 return $et_vect_call_floor_saved
4637 }
4638
4639 # Return 1 if the target supports vector floorf calls.
4640
4641 proc check_effective_target_vect_call_floorf { } {
4642 global et_vect_call_floorf_saved
4643
4644 if [info exists et_vect_call_floorf_saved] {
4645 verbose "check_effective_target_vect_call_floorf: using cached result" 2
4646 } else {
4647 set et_vect_call_floorf_saved 0
4648 if { [istarget aarch64*-*-*] } {
4649 set et_vect_call_floorf_saved 1
4650 }
4651 }
4652
4653 verbose "check_effective_target_vect_call_floorf: returning $et_vect_call_floorf_saved" 2
4654 return $et_vect_call_floorf_saved
4655 }
4656
4657 # Return 1 if the target supports vector lceil calls.
4658
4659 proc check_effective_target_vect_call_lceil { } {
4660 global et_vect_call_lceil_saved
4661
4662 if [info exists et_vect_call_lceil_saved] {
4663 verbose "check_effective_target_vect_call_lceil: using cached result" 2
4664 } else {
4665 set et_vect_call_lceil_saved 0
4666 if { [istarget aarch64*-*-*] } {
4667 set et_vect_call_lceil_saved 1
4668 }
4669 }
4670
4671 verbose "check_effective_target_vect_call_lceil: returning $et_vect_call_lceil_saved" 2
4672 return $et_vect_call_lceil_saved
4673 }
4674
4675 # Return 1 if the target supports vector lfloor calls.
4676
4677 proc check_effective_target_vect_call_lfloor { } {
4678 global et_vect_call_lfloor_saved
4679
4680 if [info exists et_vect_call_lfloor_saved] {
4681 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
4682 } else {
4683 set et_vect_call_lfloor_saved 0
4684 if { [istarget aarch64*-*-*] } {
4685 set et_vect_call_lfloor_saved 1
4686 }
4687 }
4688
4689 verbose "check_effective_target_vect_call_lfloor: returning $et_vect_call_lfloor_saved" 2
4690 return $et_vect_call_lfloor_saved
4691 }
4692
4693 # Return 1 if the target supports vector nearbyint calls.
4694
4695 proc check_effective_target_vect_call_nearbyint { } {
4696 global et_vect_call_nearbyint_saved
4697
4698 if [info exists et_vect_call_nearbyint_saved] {
4699 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
4700 } else {
4701 set et_vect_call_nearbyint_saved 0
4702 if { [istarget aarch64*-*-*] } {
4703 set et_vect_call_nearbyint_saved 1
4704 }
4705 }
4706
4707 verbose "check_effective_target_vect_call_nearbyint: returning $et_vect_call_nearbyint_saved" 2
4708 return $et_vect_call_nearbyint_saved
4709 }
4710
4711 # Return 1 if the target supports vector nearbyintf calls.
4712
4713 proc check_effective_target_vect_call_nearbyintf { } {
4714 global et_vect_call_nearbyintf_saved
4715
4716 if [info exists et_vect_call_nearbyintf_saved] {
4717 verbose "check_effective_target_vect_call_nearbyintf: using cached result" 2
4718 } else {
4719 set et_vect_call_nearbyintf_saved 0
4720 if { [istarget aarch64*-*-*] } {
4721 set et_vect_call_nearbyintf_saved 1
4722 }
4723 }
4724
4725 verbose "check_effective_target_vect_call_nearbyintf: returning $et_vect_call_nearbyintf_saved" 2
4726 return $et_vect_call_nearbyintf_saved
4727 }
4728
4729 # Return 1 if the target supports vector round calls.
4730
4731 proc check_effective_target_vect_call_round { } {
4732 global et_vect_call_round_saved
4733
4734 if [info exists et_vect_call_round_saved] {
4735 verbose "check_effective_target_vect_call_round: using cached result" 2
4736 } else {
4737 set et_vect_call_round_saved 0
4738 if { [istarget aarch64*-*-*] } {
4739 set et_vect_call_round_saved 1
4740 }
4741 }
4742
4743 verbose "check_effective_target_vect_call_round: returning $et_vect_call_round_saved" 2
4744 return $et_vect_call_round_saved
4745 }
4746
4747 # Return 1 if the target supports vector roundf calls.
4748
4749 proc check_effective_target_vect_call_roundf { } {
4750 global et_vect_call_roundf_saved
4751
4752 if [info exists et_vect_call_roundf_saved] {
4753 verbose "check_effective_target_vect_call_roundf: using cached result" 2
4754 } else {
4755 set et_vect_call_roundf_saved 0
4756 if { [istarget aarch64*-*-*] } {
4757 set et_vect_call_roundf_saved 1
4758 }
4759 }
4760
4761 verbose "check_effective_target_vect_call_roundf: returning $et_vect_call_roundf_saved" 2
4762 return $et_vect_call_roundf_saved
4763 }
4764
4765 # Return 1 if the target supports section-anchors
4766
4767 proc check_effective_target_section_anchors { } {
4768 global et_section_anchors_saved
4769
4770 if [info exists et_section_anchors_saved] {
4771 verbose "check_effective_target_section_anchors: using cached result" 2
4772 } else {
4773 set et_section_anchors_saved 0
4774 if { [istarget powerpc*-*-*]
4775 || [istarget arm*-*-*] } {
4776 set et_section_anchors_saved 1
4777 }
4778 }
4779
4780 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
4781 return $et_section_anchors_saved
4782 }
4783
4784 # Return 1 if the target supports atomic operations on "int_128" values.
4785
4786 proc check_effective_target_sync_int_128 { } {
4787 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
4788 && ![is-effective-target ia32] } {
4789 return 1
4790 } else {
4791 return 0
4792 }
4793 }
4794
4795 # Return 1 if the target supports atomic operations on "int_128" values
4796 # and can execute them.
4797
4798 proc check_effective_target_sync_int_128_runtime { } {
4799 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
4800 && ![is-effective-target ia32] } {
4801 return [check_cached_effective_target sync_int_128_available {
4802 check_runtime_nocache sync_int_128_available {
4803 #include "cpuid.h"
4804 int main ()
4805 {
4806 unsigned int eax, ebx, ecx, edx;
4807 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
4808 return !(ecx & bit_CMPXCHG16B);
4809 return 1;
4810 }
4811 } ""
4812 }]
4813 } else {
4814 return 0
4815 }
4816 }
4817
4818 # Return 1 if the target supports atomic operations on "long long".
4819 #
4820 # Note: 32bit x86 targets require -march=pentium in dg-options.
4821
4822 proc check_effective_target_sync_long_long { } {
4823 if { [istarget x86_64-*-*]
4824 || [istarget i?86-*-*])
4825 || [istarget aarch64*-*-*]
4826 || [istarget arm*-*-*]
4827 || [istarget alpha*-*-*]
4828 || ([istarget sparc*-*-*] && [check_effective_target_lp64]) } {
4829 return 1
4830 } else {
4831 return 0
4832 }
4833 }
4834
4835 # Return 1 if the target supports atomic operations on "long long"
4836 # and can execute them.
4837 #
4838 # Note: 32bit x86 targets require -march=pentium in dg-options.
4839
4840 proc check_effective_target_sync_long_long_runtime { } {
4841 if { [istarget x86_64-*-*]
4842 || [istarget i?86-*-*] } {
4843 return [check_cached_effective_target sync_long_long_available {
4844 check_runtime_nocache sync_long_long_available {
4845 #include "cpuid.h"
4846 int main ()
4847 {
4848 unsigned int eax, ebx, ecx, edx;
4849 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
4850 return !(edx & bit_CMPXCHG8B);
4851 return 1;
4852 }
4853 } ""
4854 }]
4855 } elseif { [istarget aarch64*-*-*] } {
4856 return 1
4857 } elseif { [istarget arm*-*-linux-*] } {
4858 return [check_runtime sync_longlong_runtime {
4859 #include <stdlib.h>
4860 int main ()
4861 {
4862 long long l1;
4863
4864 if (sizeof (long long) != 8)
4865 exit (1);
4866
4867 /* Just check for native; checking for kernel fallback is tricky. */
4868 asm volatile ("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
4869
4870 exit (0);
4871 }
4872 } "" ]
4873 } elseif { [istarget alpha*-*-*] } {
4874 return 1
4875 } elseif { ([istarget sparc*-*-*]
4876 && [check_effective_target_lp64]
4877 && [check_effective_target_ultrasparc_hw]) } {
4878 return 1
4879 } elseif { [istarget powerpc*-*-*] && [check_effective_target_lp64] } {
4880 return 1
4881 } else {
4882 return 0
4883 }
4884 }
4885
4886 # Return 1 if the target supports byte swap instructions.
4887
4888 proc check_effective_target_bswap { } {
4889 global et_bswap_saved
4890
4891 if [info exists et_bswap_saved] {
4892 verbose "check_effective_target_bswap: using cached result" 2
4893 } else {
4894 set et_bswap_saved 0
4895 if { [istarget aarch64-*-*]
4896 || [istarget alpha*-*-*]
4897 || [istarget arm*-*-*]
4898 || [istarget i?86-*-*]
4899 || [istarget m68k-*-*]
4900 || [istarget powerpc*-*-*]
4901 || [istarget rs6000-*-*]
4902 || [istarget s390*-*-*]
4903 || [istarget x86_64-*-*] } {
4904 set et_bswap_saved 1
4905 }
4906 }
4907
4908 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
4909 return $et_bswap_saved
4910 }
4911
4912 # Return 1 if the target supports 16-bit byte swap instructions.
4913
4914 proc check_effective_target_bswap16 { } {
4915 global et_bswap16_saved
4916
4917 if [info exists et_bswap16_saved] {
4918 verbose "check_effective_target_bswap16: using cached result" 2
4919 } else {
4920 set et_bswap16_saved 0
4921 if { [is-effective-target bswap]
4922 && ![istarget alpha*-*-*]
4923 && ![istarget i?86-*-*]
4924 && ![istarget x86_64-*-*] } {
4925 set et_bswap16_saved 1
4926 }
4927 }
4928
4929 verbose "check_effective_target_bswap16: returning $et_bswap16_saved" 2
4930 return $et_bswap16_saved
4931 }
4932
4933 # Return 1 if the target supports 32-bit byte swap instructions.
4934
4935 proc check_effective_target_bswap32 { } {
4936 global et_bswap32_saved
4937
4938 if [info exists et_bswap32_saved] {
4939 verbose "check_effective_target_bswap32: using cached result" 2
4940 } else {
4941 set et_bswap32_saved 0
4942 if { [is-effective-target bswap] } {
4943 set et_bswap32_saved 1
4944 }
4945 }
4946
4947 verbose "check_effective_target_bswap32: returning $et_bswap32_saved" 2
4948 return $et_bswap32_saved
4949 }
4950
4951 # Return 1 if the target supports 64-bit byte swap instructions.
4952
4953 proc check_effective_target_bswap64 { } {
4954 global et_bswap64_saved
4955
4956 if [info exists et_bswap64_saved] {
4957 verbose "check_effective_target_bswap64: using cached result" 2
4958 } else {
4959 set et_bswap64_saved 0
4960 if { [is-effective-target bswap]
4961 && [is-effective-target lp64] } {
4962 set et_bswap64_saved 1
4963 }
4964 }
4965
4966 verbose "check_effective_target_bswap64: returning $et_bswap64_saved" 2
4967 return $et_bswap64_saved
4968 }
4969
4970 # Return 1 if the target supports atomic operations on "int" and "long".
4971
4972 proc check_effective_target_sync_int_long { } {
4973 global et_sync_int_long_saved
4974
4975 if [info exists et_sync_int_long_saved] {
4976 verbose "check_effective_target_sync_int_long: using cached result" 2
4977 } else {
4978 set et_sync_int_long_saved 0
4979 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
4980 # load-reserved/store-conditional instructions.
4981 if { [istarget ia64-*-*]
4982 || [istarget i?86-*-*]
4983 || [istarget x86_64-*-*]
4984 || [istarget aarch64*-*-*]
4985 || [istarget alpha*-*-*]
4986 || [istarget arm*-*-linux-*]
4987 || [istarget bfin*-*linux*]
4988 || [istarget hppa*-*linux*]
4989 || [istarget s390*-*-*]
4990 || [istarget powerpc*-*-*]
4991 || [istarget crisv32-*-*] || [istarget cris-*-*]
4992 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
4993 || [check_effective_target_mips_llsc] } {
4994 set et_sync_int_long_saved 1
4995 }
4996 }
4997
4998 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
4999 return $et_sync_int_long_saved
5000 }
5001
5002 # Return 1 if the target supports atomic operations on "char" and "short".
5003
5004 proc check_effective_target_sync_char_short { } {
5005 global et_sync_char_short_saved
5006
5007 if [info exists et_sync_char_short_saved] {
5008 verbose "check_effective_target_sync_char_short: using cached result" 2
5009 } else {
5010 set et_sync_char_short_saved 0
5011 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5012 # load-reserved/store-conditional instructions.
5013 if { [istarget aarch64*-*-*]
5014 || [istarget ia64-*-*]
5015 || [istarget i?86-*-*]
5016 || [istarget x86_64-*-*]
5017 || [istarget alpha*-*-*]
5018 || [istarget arm*-*-linux-*]
5019 || [istarget hppa*-*linux*]
5020 || [istarget s390*-*-*]
5021 || [istarget powerpc*-*-*]
5022 || [istarget crisv32-*-*] || [istarget cris-*-*]
5023 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5024 || [check_effective_target_mips_llsc] } {
5025 set et_sync_char_short_saved 1
5026 }
5027 }
5028
5029 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
5030 return $et_sync_char_short_saved
5031 }
5032
5033 # Return 1 if the target uses a ColdFire FPU.
5034
5035 proc check_effective_target_coldfire_fpu { } {
5036 return [check_no_compiler_messages coldfire_fpu assembly {
5037 #ifndef __mcffpu__
5038 #error !__mcffpu__
5039 #endif
5040 }]
5041 }
5042
5043 # Return true if this is a uClibc target.
5044
5045 proc check_effective_target_uclibc {} {
5046 return [check_no_compiler_messages uclibc object {
5047 #include <features.h>
5048 #if !defined (__UCLIBC__)
5049 #error !__UCLIBC__
5050 #endif
5051 }]
5052 }
5053
5054 # Return true if this is a uclibc target and if the uclibc feature
5055 # described by __$feature__ is not present.
5056
5057 proc check_missing_uclibc_feature {feature} {
5058 return [check_no_compiler_messages $feature object "
5059 #include <features.h>
5060 #if !defined (__UCLIBC) || defined (__${feature}__)
5061 #error FOO
5062 #endif
5063 "]
5064 }
5065
5066 # Return true if this is a Newlib target.
5067
5068 proc check_effective_target_newlib {} {
5069 return [check_no_compiler_messages newlib object {
5070 #include <newlib.h>
5071 }]
5072 }
5073
5074 # Return true if this is NOT a Bionic target.
5075
5076 proc check_effective_target_non_bionic {} {
5077 return [check_no_compiler_messages non_bionic object {
5078 #include <ctype.h>
5079 #if defined (__BIONIC__)
5080 #error FOO
5081 #endif
5082 }]
5083 }
5084
5085 # Return 1 if
5086 # (a) an error of a few ULP is expected in string to floating-point
5087 # conversion functions; and
5088 # (b) overflow is not always detected correctly by those functions.
5089
5090 proc check_effective_target_lax_strtofp {} {
5091 # By default, assume that all uClibc targets suffer from this.
5092 return [check_effective_target_uclibc]
5093 }
5094
5095 # Return 1 if this is a target for which wcsftime is a dummy
5096 # function that always returns 0.
5097
5098 proc check_effective_target_dummy_wcsftime {} {
5099 # By default, assume that all uClibc targets suffer from this.
5100 return [check_effective_target_uclibc]
5101 }
5102
5103 # Return 1 if constructors with initialization priority arguments are
5104 # supposed on this target.
5105
5106 proc check_effective_target_init_priority {} {
5107 return [check_no_compiler_messages init_priority assembly "
5108 void f() __attribute__((constructor (1000)));
5109 void f() \{\}
5110 "]
5111 }
5112
5113 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
5114 # This can be used with any check_* proc that takes no argument and
5115 # returns only 1 or 0. It could be used with check_* procs that take
5116 # arguments with keywords that pass particular arguments.
5117
5118 proc is-effective-target { arg } {
5119 set selected 0
5120 if { [info procs check_effective_target_${arg}] != [list] } {
5121 set selected [check_effective_target_${arg}]
5122 } else {
5123 switch $arg {
5124 "vmx_hw" { set selected [check_vmx_hw_available] }
5125 "vsx_hw" { set selected [check_vsx_hw_available] }
5126 "p8vector_hw" { set selected [check_p8vector_hw_available] }
5127 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
5128 "dfp_hw" { set selected [check_dfp_hw_available] }
5129 "named_sections" { set selected [check_named_sections_available] }
5130 "gc_sections" { set selected [check_gc_sections_available] }
5131 "cxa_atexit" { set selected [check_cxa_atexit_available] }
5132 default { error "unknown effective target keyword `$arg'" }
5133 }
5134 }
5135 verbose "is-effective-target: $arg $selected" 2
5136 return $selected
5137 }
5138
5139 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
5140
5141 proc is-effective-target-keyword { arg } {
5142 if { [info procs check_effective_target_${arg}] != [list] } {
5143 return 1
5144 } else {
5145 # These have different names for their check_* procs.
5146 switch $arg {
5147 "vmx_hw" { return 1 }
5148 "vsx_hw" { return 1 }
5149 "p8vector_hw" { return 1 }
5150 "ppc_recip_hw" { return 1 }
5151 "dfp_hw" { return 1 }
5152 "named_sections" { return 1 }
5153 "gc_sections" { return 1 }
5154 "cxa_atexit" { return 1 }
5155 default { return 0 }
5156 }
5157 }
5158 }
5159
5160 # Return 1 if target default to short enums
5161
5162 proc check_effective_target_short_enums { } {
5163 return [check_no_compiler_messages short_enums assembly {
5164 enum foo { bar };
5165 int s[sizeof (enum foo) == 1 ? 1 : -1];
5166 }]
5167 }
5168
5169 # Return 1 if target supports merging string constants at link time.
5170
5171 proc check_effective_target_string_merging { } {
5172 return [check_no_messages_and_pattern string_merging \
5173 "rodata\\.str" assembly {
5174 const char *var = "String";
5175 } {-O2}]
5176 }
5177
5178 # Return 1 if target has the basic signed and unsigned types in
5179 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
5180 # working <stdint.h> for all targets.
5181
5182 proc check_effective_target_stdint_types { } {
5183 return [check_no_compiler_messages stdint_types assembly {
5184 #include <stdint.h>
5185 int8_t a; int16_t b; int32_t c; int64_t d;
5186 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5187 }]
5188 }
5189
5190 # Return 1 if target has the basic signed and unsigned types in
5191 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
5192 # these types agree with those in the header, as some systems have
5193 # only <inttypes.h>.
5194
5195 proc check_effective_target_inttypes_types { } {
5196 return [check_no_compiler_messages inttypes_types assembly {
5197 #include <inttypes.h>
5198 int8_t a; int16_t b; int32_t c; int64_t d;
5199 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5200 }]
5201 }
5202
5203 # Return 1 if programs are intended to be run on a simulator
5204 # (i.e. slowly) rather than hardware (i.e. fast).
5205
5206 proc check_effective_target_simulator { } {
5207
5208 # All "src/sim" simulators set this one.
5209 if [board_info target exists is_simulator] {
5210 return [board_info target is_simulator]
5211 }
5212
5213 # The "sid" simulators don't set that one, but at least they set
5214 # this one.
5215 if [board_info target exists slow_simulator] {
5216 return [board_info target slow_simulator]
5217 }
5218
5219 return 0
5220 }
5221
5222 # Return 1 if programs are intended to be run on hardware rather than
5223 # on a simulator
5224
5225 proc check_effective_target_hw { } {
5226
5227 # All "src/sim" simulators set this one.
5228 if [board_info target exists is_simulator] {
5229 if [board_info target is_simulator] {
5230 return 0
5231 } else {
5232 return 1
5233 }
5234 }
5235
5236 # The "sid" simulators don't set that one, but at least they set
5237 # this one.
5238 if [board_info target exists slow_simulator] {
5239 if [board_info target slow_simulator] {
5240 return 0
5241 } else {
5242 return 1
5243 }
5244 }
5245
5246 return 1
5247 }
5248
5249 # Return 1 if the target is a VxWorks kernel.
5250
5251 proc check_effective_target_vxworks_kernel { } {
5252 return [check_no_compiler_messages vxworks_kernel assembly {
5253 #if !defined __vxworks || defined __RTP__
5254 #error NO
5255 #endif
5256 }]
5257 }
5258
5259 # Return 1 if the target is a VxWorks RTP.
5260
5261 proc check_effective_target_vxworks_rtp { } {
5262 return [check_no_compiler_messages vxworks_rtp assembly {
5263 #if !defined __vxworks || !defined __RTP__
5264 #error NO
5265 #endif
5266 }]
5267 }
5268
5269 # Return 1 if the target is expected to provide wide character support.
5270
5271 proc check_effective_target_wchar { } {
5272 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
5273 return 0
5274 }
5275 return [check_no_compiler_messages wchar assembly {
5276 #include <wchar.h>
5277 }]
5278 }
5279
5280 # Return 1 if the target has <pthread.h>.
5281
5282 proc check_effective_target_pthread_h { } {
5283 return [check_no_compiler_messages pthread_h assembly {
5284 #include <pthread.h>
5285 }]
5286 }
5287
5288 # Return 1 if the target can truncate a file from a file-descriptor,
5289 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
5290 # chsize. We test for a trivially functional truncation; no stubs.
5291 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
5292 # different function to be used.
5293
5294 proc check_effective_target_fd_truncate { } {
5295 set prog {
5296 #define _FILE_OFFSET_BITS 64
5297 #include <unistd.h>
5298 #include <stdio.h>
5299 #include <stdlib.h>
5300 #include <string.h>
5301 int main ()
5302 {
5303 FILE *f = fopen ("tst.tmp", "wb");
5304 int fd;
5305 const char t[] = "test writing more than ten characters";
5306 char s[11];
5307 int status = 0;
5308 fd = fileno (f);
5309 write (fd, t, sizeof (t) - 1);
5310 lseek (fd, 0, 0);
5311 if (ftruncate (fd, 10) != 0)
5312 status = 1;
5313 close (fd);
5314 fclose (f);
5315 if (status)
5316 {
5317 unlink ("tst.tmp");
5318 exit (status);
5319 }
5320 f = fopen ("tst.tmp", "rb");
5321 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
5322 status = 1;
5323 fclose (f);
5324 unlink ("tst.tmp");
5325 exit (status);
5326 }
5327 }
5328
5329 if { [check_runtime ftruncate $prog] } {
5330 return 1;
5331 }
5332
5333 regsub "ftruncate" $prog "chsize" prog
5334 return [check_runtime chsize $prog]
5335 }
5336
5337 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
5338
5339 proc add_options_for_c99_runtime { flags } {
5340 if { [istarget *-*-solaris2*] } {
5341 return "$flags -std=c99"
5342 }
5343 if { [istarget powerpc-*-darwin*] } {
5344 return "$flags -mmacosx-version-min=10.3"
5345 }
5346 return $flags
5347 }
5348
5349 # Add to FLAGS all the target-specific flags needed to enable
5350 # full IEEE compliance mode.
5351
5352 proc add_options_for_ieee { flags } {
5353 if { [istarget alpha*-*-*]
5354 || [istarget sh*-*-*] } {
5355 return "$flags -mieee"
5356 }
5357 if { [istarget rx-*-*] } {
5358 return "$flags -mnofpu"
5359 }
5360 return $flags
5361 }
5362
5363 if {![info exists flags_to_postpone]} {
5364 set flags_to_postpone ""
5365 }
5366
5367 # Add to FLAGS the flags needed to enable functions to bind locally
5368 # when using pic/PIC passes in the testsuite.
5369 proc add_options_for_bind_pic_locally { flags } {
5370 global flags_to_postpone
5371
5372 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
5373 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
5374 # order to make sure that the multilib_flags doesn't override this.
5375
5376 if {[check_no_compiler_messages using_pic2 assembly {
5377 #if __PIC__ != 2
5378 #error __PIC__ != 2
5379 #endif
5380 }]} {
5381 set flags_to_postpone "-fPIE"
5382 return $flags
5383 }
5384 if {[check_no_compiler_messages using_pic1 assembly {
5385 #if __PIC__ != 1
5386 #error __PIC__ != 1
5387 #endif
5388 }]} {
5389 set flags_to_postpone "-fpie"
5390 return $flags
5391 }
5392 return $flags
5393 }
5394
5395 # Add to FLAGS the flags needed to enable 64-bit vectors.
5396
5397 proc add_options_for_double_vectors { flags } {
5398 if [is-effective-target arm_neon_ok] {
5399 return "$flags -mvectorize-with-neon-double"
5400 }
5401
5402 return $flags
5403 }
5404
5405 # Return 1 if the target provides a full C99 runtime.
5406
5407 proc check_effective_target_c99_runtime { } {
5408 return [check_cached_effective_target c99_runtime {
5409 global srcdir
5410
5411 set file [open "$srcdir/gcc.dg/builtins-config.h"]
5412 set contents [read $file]
5413 close $file
5414 append contents {
5415 #ifndef HAVE_C99_RUNTIME
5416 #error !HAVE_C99_RUNTIME
5417 #endif
5418 }
5419 check_no_compiler_messages_nocache c99_runtime assembly \
5420 $contents [add_options_for_c99_runtime ""]
5421 }]
5422 }
5423
5424 # Return 1 if target wchar_t is at least 4 bytes.
5425
5426 proc check_effective_target_4byte_wchar_t { } {
5427 return [check_no_compiler_messages 4byte_wchar_t object {
5428 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
5429 }]
5430 }
5431
5432 # Return 1 if the target supports automatic stack alignment.
5433
5434 proc check_effective_target_automatic_stack_alignment { } {
5435 # Ordinarily x86 supports automatic stack alignment ...
5436 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
5437 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
5438 # ... except Win64 SEH doesn't. Succeed for Win32 though.
5439 return [check_effective_target_ilp32];
5440 }
5441 return 1;
5442 }
5443 return 0;
5444 }
5445
5446 # Return true if we are compiling for AVX target.
5447
5448 proc check_avx_available { } {
5449 if { [check_no_compiler_messages avx_available assembly {
5450 #ifndef __AVX__
5451 #error unsupported
5452 #endif
5453 } ""] } {
5454 return 1;
5455 }
5456 return 0;
5457 }
5458
5459 # Return true if 32- and 16-bytes vectors are available.
5460
5461 proc check_effective_target_vect_sizes_32B_16B { } {
5462 if { [check_avx_available] && ![check_prefer_avx128] } {
5463 return 1;
5464 } else {
5465 return 0;
5466 }
5467 }
5468
5469 # Return true if 128-bits vectors are preferred even if 256-bits vectors
5470 # are available.
5471
5472 proc check_prefer_avx128 { } {
5473 if ![check_avx_available] {
5474 return 0;
5475 }
5476 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
5477 float a[1024],b[1024],c[1024];
5478 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
5479 } "-O2 -ftree-vectorize"]
5480 }
5481
5482
5483 # Return 1 if avx512f instructions can be compiled.
5484
5485 proc check_effective_target_avx512f { } {
5486 return [check_no_compiler_messages avx512f object {
5487 typedef double __m512d __attribute__ ((__vector_size__ (64)));
5488
5489 __m512d _mm512_add (__m512d a)
5490 {
5491 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
5492 }
5493 } "-O2 -mavx512f" ]
5494 }
5495
5496 # Return 1 if avx instructions can be compiled.
5497
5498 proc check_effective_target_avx { } {
5499 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
5500 return 0
5501 }
5502 return [check_no_compiler_messages avx object {
5503 void _mm256_zeroall (void)
5504 {
5505 __builtin_ia32_vzeroall ();
5506 }
5507 } "-O2 -mavx" ]
5508 }
5509
5510 # Return 1 if avx2 instructions can be compiled.
5511 proc check_effective_target_avx2 { } {
5512 return [check_no_compiler_messages avx2 object {
5513 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
5514 __v4di
5515 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
5516 {
5517 return __builtin_ia32_andnotsi256 (__X, __Y);
5518 }
5519 } "-O0 -mavx2" ]
5520 }
5521
5522 # Return 1 if sse instructions can be compiled.
5523 proc check_effective_target_sse { } {
5524 return [check_no_compiler_messages sse object {
5525 int main ()
5526 {
5527 __builtin_ia32_stmxcsr ();
5528 return 0;
5529 }
5530 } "-O2 -msse" ]
5531 }
5532
5533 # Return 1 if sse2 instructions can be compiled.
5534 proc check_effective_target_sse2 { } {
5535 return [check_no_compiler_messages sse2 object {
5536 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
5537
5538 __m128i _mm_srli_si128 (__m128i __A, int __N)
5539 {
5540 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
5541 }
5542 } "-O2 -msse2" ]
5543 }
5544
5545 # Return 1 if F16C instructions can be compiled.
5546
5547 proc check_effective_target_f16c { } {
5548 return [check_no_compiler_messages f16c object {
5549 #include "immintrin.h"
5550 float
5551 foo (unsigned short val)
5552 {
5553 return _cvtsh_ss (val);
5554 }
5555 } "-O2 -mf16c" ]
5556 }
5557
5558 # Return 1 if C wchar_t type is compatible with char16_t.
5559
5560 proc check_effective_target_wchar_t_char16_t_compatible { } {
5561 return [check_no_compiler_messages wchar_t_char16_t object {
5562 __WCHAR_TYPE__ wc;
5563 __CHAR16_TYPE__ *p16 = &wc;
5564 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
5565 }]
5566 }
5567
5568 # Return 1 if C wchar_t type is compatible with char32_t.
5569
5570 proc check_effective_target_wchar_t_char32_t_compatible { } {
5571 return [check_no_compiler_messages wchar_t_char32_t object {
5572 __WCHAR_TYPE__ wc;
5573 __CHAR32_TYPE__ *p32 = &wc;
5574 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
5575 }]
5576 }
5577
5578 # Return 1 if pow10 function exists.
5579
5580 proc check_effective_target_pow10 { } {
5581 return [check_runtime pow10 {
5582 #include <math.h>
5583 int main () {
5584 double x;
5585 x = pow10 (1);
5586 return 0;
5587 }
5588 } "-lm" ]
5589 }
5590
5591 # Return 1 if current options generate DFP instructions, 0 otherwise.
5592
5593 proc check_effective_target_hard_dfp {} {
5594 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
5595 typedef float d64 __attribute__((mode(DD)));
5596 d64 x, y, z;
5597 void foo (void) { z = x + y; }
5598 }]
5599 }
5600
5601 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
5602 # for strchr etc. functions.
5603
5604 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
5605 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
5606 #include <string.h>
5607 #include <wchar.h>
5608 #if !defined(__cplusplus) \
5609 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
5610 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
5611 ISO C++ correct string.h and wchar.h protos not supported.
5612 #else
5613 int i;
5614 #endif
5615 }]
5616 }
5617
5618 # Return 1 if GNU as is used.
5619
5620 proc check_effective_target_gas { } {
5621 global use_gas_saved
5622 global tool
5623
5624 if {![info exists use_gas_saved]} {
5625 # Check if the as used by gcc is GNU as.
5626 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
5627 # Provide /dev/null as input, otherwise gas times out reading from
5628 # stdin.
5629 set status [remote_exec host "$gcc_as" "-v /dev/null"]
5630 set as_output [lindex $status 1]
5631 if { [ string first "GNU" $as_output ] >= 0 } {
5632 set use_gas_saved 1
5633 } else {
5634 set use_gas_saved 0
5635 }
5636 }
5637 return $use_gas_saved
5638 }
5639
5640 # Return 1 if GNU ld is used.
5641
5642 proc check_effective_target_gld { } {
5643 global use_gld_saved
5644 global tool
5645
5646 if {![info exists use_gld_saved]} {
5647 # Check if the ld used by gcc is GNU ld.
5648 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
5649 set status [remote_exec host "$gcc_ld" "--version"]
5650 set ld_output [lindex $status 1]
5651 if { [ string first "GNU" $ld_output ] >= 0 } {
5652 set use_gld_saved 1
5653 } else {
5654 set use_gld_saved 0
5655 }
5656 }
5657 return $use_gld_saved
5658 }
5659
5660 # Return 1 if the compiler has been configure with link-time optimization
5661 # (LTO) support.
5662
5663 proc check_effective_target_lto { } {
5664 global ENABLE_LTO
5665 return [info exists ENABLE_LTO]
5666 }
5667
5668 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
5669
5670 proc check_effective_target_maybe_x32 { } {
5671 return [check_no_compiler_messages maybe_x32 object {
5672 void foo (void) {}
5673 } "-mx32 -maddress-mode=short"]
5674 }
5675
5676 # Return 1 if this target supports the -fsplit-stack option, 0
5677 # otherwise.
5678
5679 proc check_effective_target_split_stack {} {
5680 return [check_no_compiler_messages split_stack object {
5681 void foo (void) { }
5682 } "-fsplit-stack"]
5683 }
5684
5685 # Return 1 if this target supports the -masm=intel option, 0
5686 # otherwise
5687
5688 proc check_effective_target_masm_intel {} {
5689 return [check_no_compiler_messages masm_intel object {
5690 extern void abort (void);
5691 } "-masm=intel"]
5692 }
5693
5694 # Return 1 if the language for the compiler under test is C.
5695
5696 proc check_effective_target_c { } {
5697 global tool
5698 if [string match $tool "gcc"] {
5699 return 1
5700 }
5701 return 0
5702 }
5703
5704 # Return 1 if the language for the compiler under test is C++.
5705
5706 proc check_effective_target_c++ { } {
5707 global tool
5708 if [string match $tool "g++"] {
5709 return 1
5710 }
5711 return 0
5712 }
5713
5714 # Check whether the current active language standard supports the features
5715 # of C++11/C++14 by checking for the presence of one of the -std
5716 # flags. This assumes that the default for the compiler is C++98, and that
5717 # there will never be multiple -std= arguments on the command line.
5718 proc check_effective_target_c++11_only { } {
5719 if ![check_effective_target_c++] {
5720 return 0
5721 }
5722 return [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }]
5723 }
5724 proc check_effective_target_c++11 { } {
5725 if [check_effective_target_c++11_only] {
5726 return 1
5727 }
5728 return [check_effective_target_c++14]
5729 }
5730 proc check_effective_target_c++11_down { } {
5731 if ![check_effective_target_c++] {
5732 return 0
5733 }
5734 return ![check_effective_target_c++14]
5735 }
5736
5737 proc check_effective_target_c++14_only { } {
5738 if ![check_effective_target_c++] {
5739 return 0
5740 }
5741 return [check-flags { { } { } { -std=c++1y -std=gnu++1y -std=c++14 -std=gnu++14 } }]
5742 }
5743
5744 proc check_effective_target_c++14 { } {
5745 if [check_effective_target_c++14_only] {
5746 return 1
5747 }
5748 return [check_effective_target_c++1z]
5749 }
5750 proc check_effective_target_c++14_down { } {
5751 if ![check_effective_target_c++] {
5752 return 0
5753 }
5754 return ![check_effective_target_c++1z]
5755 }
5756
5757 proc check_effective_target_c++98_only { } {
5758 if ![check_effective_target_c++] {
5759 return 0
5760 }
5761 return ![check_effective_target_c++11]
5762 }
5763
5764 proc check_effective_target_c++1z_only { } {
5765 if ![check_effective_target_c++] {
5766 return 0
5767 }
5768 return [check-flags { { } { } { -std=c++1z -std=gnu++1z } }]
5769 }
5770 proc check_effective_target_c++1z { } {
5771 return [check_effective_target_c++1z_only]
5772 }
5773
5774 # Return 1 if expensive testcases should be run.
5775
5776 proc check_effective_target_run_expensive_tests { } {
5777 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
5778 return 1
5779 }
5780 return 0
5781 }
5782
5783 # Returns 1 if "mempcpy" is available on the target system.
5784
5785 proc check_effective_target_mempcpy {} {
5786 return [check_function_available "mempcpy"]
5787 }
5788
5789 # Check whether the vectorizer tests are supported by the target and
5790 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
5791 # Set dg-do-what-default to either compile or run, depending on target
5792 # capabilities. Return 1 if vectorizer tests are supported by
5793 # target, 0 otherwise.
5794
5795 proc check_vect_support_and_set_flags { } {
5796 global DEFAULT_VECTCFLAGS
5797 global dg-do-what-default
5798
5799 if [istarget powerpc-*paired*] {
5800 lappend DEFAULT_VECTCFLAGS "-mpaired"
5801 if [check_750cl_hw_available] {
5802 set dg-do-what-default run
5803 } else {
5804 set dg-do-what-default compile
5805 }
5806 } elseif [istarget powerpc*-*-*] {
5807 # Skip targets not supporting -maltivec.
5808 if ![is-effective-target powerpc_altivec_ok] {
5809 return 0
5810 }
5811
5812 lappend DEFAULT_VECTCFLAGS "-maltivec"
5813 if [check_p8vector_hw_available] {
5814 lappend DEFAULT_VECTCFLAGS "-mpower8-vector" "-mno-allow-movmisalign"
5815 } elseif [check_vsx_hw_available] {
5816 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
5817 }
5818
5819 if [check_vmx_hw_available] {
5820 set dg-do-what-default run
5821 } else {
5822 if [is-effective-target ilp32] {
5823 # Specify a cpu that supports VMX for compile-only tests.
5824 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
5825 }
5826 set dg-do-what-default compile
5827 }
5828 } elseif { [istarget spu-*-*] } {
5829 set dg-do-what-default run
5830 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
5831 lappend DEFAULT_VECTCFLAGS "-msse2"
5832 if { [check_effective_target_sse2_runtime] } {
5833 set dg-do-what-default run
5834 } else {
5835 set dg-do-what-default compile
5836 }
5837 } elseif { [istarget mips*-*-*]
5838 && ([check_effective_target_mpaired_single]
5839 || [check_effective_target_mips_loongson])
5840 && [check_effective_target_nomips16] } {
5841 if { [check_effective_target_mpaired_single] } {
5842 lappend DEFAULT_VECTCFLAGS "-mpaired-single"
5843 }
5844 set dg-do-what-default run
5845 } elseif [istarget sparc*-*-*] {
5846 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
5847 if [check_effective_target_ultrasparc_hw] {
5848 set dg-do-what-default run
5849 } else {
5850 set dg-do-what-default compile
5851 }
5852 } elseif [istarget alpha*-*-*] {
5853 # Alpha's vectorization capabilities are extremely limited.
5854 # It's more effort than its worth disabling all of the tests
5855 # that it cannot pass. But if you actually want to see what
5856 # does work, command out the return.
5857 return 0
5858
5859 lappend DEFAULT_VECTCFLAGS "-mmax"
5860 if [check_alpha_max_hw_available] {
5861 set dg-do-what-default run
5862 } else {
5863 set dg-do-what-default compile
5864 }
5865 } elseif [istarget ia64-*-*] {
5866 set dg-do-what-default run
5867 } elseif [is-effective-target arm_neon_ok] {
5868 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
5869 # NEON does not support denormals, so is not used for vectorization by
5870 # default to avoid loss of precision. We must pass -ffast-math to test
5871 # vectorization of float operations.
5872 lappend DEFAULT_VECTCFLAGS "-ffast-math"
5873 if [is-effective-target arm_neon_hw] {
5874 set dg-do-what-default run
5875 } else {
5876 set dg-do-what-default compile
5877 }
5878 } elseif [istarget "aarch64*-*-*"] {
5879 set dg-do-what-default run
5880 } else {
5881 return 0
5882 }
5883
5884 return 1
5885 }
5886
5887 # Return 1 if the target does *not* require strict alignment.
5888
5889 proc check_effective_target_non_strict_align {} {
5890 return [check_no_compiler_messages non_strict_align assembly {
5891 char *y;
5892 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
5893 c *z;
5894 void foo(void) { z = (c *) y; }
5895 } "-Wcast-align"]
5896 }
5897
5898 # Return 1 if the target has <ucontext.h>.
5899
5900 proc check_effective_target_ucontext_h { } {
5901 return [check_no_compiler_messages ucontext_h assembly {
5902 #include <ucontext.h>
5903 }]
5904 }
5905
5906 proc check_effective_target_aarch64_tiny { } {
5907 if { [istarget aarch64*-*-*] } {
5908 return [check_no_compiler_messages aarch64_tiny object {
5909 #ifdef __AARCH64_CMODEL_TINY__
5910 int dummy;
5911 #else
5912 #error target not AArch64 tiny code model
5913 #endif
5914 }]
5915 } else {
5916 return 0
5917 }
5918 }
5919
5920 proc check_effective_target_aarch64_small { } {
5921 if { [istarget aarch64*-*-*] } {
5922 return [check_no_compiler_messages aarch64_small object {
5923 #ifdef __AARCH64_CMODEL_SMALL__
5924 int dummy;
5925 #else
5926 #error target not AArch64 small code model
5927 #endif
5928 }]
5929 } else {
5930 return 0
5931 }
5932 }
5933
5934 proc check_effective_target_aarch64_large { } {
5935 if { [istarget aarch64*-*-*] } {
5936 return [check_no_compiler_messages aarch64_large object {
5937 #ifdef __AARCH64_CMODEL_LARGE__
5938 int dummy;
5939 #else
5940 #error target not AArch64 large code model
5941 #endif
5942 }]
5943 } else {
5944 return 0
5945 }
5946 }
5947
5948 # Return 1 if <fenv.h> is available with all the standard IEEE
5949 # exceptions and floating-point exceptions are raised by arithmetic
5950 # operations. (If the target requires special options for "inexact"
5951 # exceptions, those need to be specified in the testcases.)
5952
5953 proc check_effective_target_fenv_exceptions {} {
5954 return [check_runtime fenv_exceptions {
5955 #include <fenv.h>
5956 #include <stdlib.h>
5957 #ifndef FE_DIVBYZERO
5958 # error Missing FE_DIVBYZERO
5959 #endif
5960 #ifndef FE_INEXACT
5961 # error Missing FE_INEXACT
5962 #endif
5963 #ifndef FE_INVALID
5964 # error Missing FE_INVALID
5965 #endif
5966 #ifndef FE_OVERFLOW
5967 # error Missing FE_OVERFLOW
5968 #endif
5969 #ifndef FE_UNDERFLOW
5970 # error Missing FE_UNDERFLOW
5971 #endif
5972 volatile float a = 0.0f, r;
5973 int
5974 main (void)
5975 {
5976 r = a / a;
5977 if (fetestexcept (FE_INVALID))
5978 exit (0);
5979 else
5980 abort ();
5981 }
5982 } [add_options_for_ieee "-std=gnu99"]]
5983 }
5984
5985 proc check_effective_target_tiny {} {
5986 if { [istarget aarch64*-*-*]
5987 && [check_effective_target_aarch64_tiny] } {
5988 return 1
5989 }
5990 return 0
5991 }
5992
5993 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
5994
5995 proc check_effective_target_logical_op_short_circuit {} {
5996 if { [istarget mips*-*-*]
5997 || [istarget arc*-*-*]
5998 || [istarget avr*-*-*]
5999 || [istarget crisv32-*-*] || [istarget cris-*-*]
6000 || [istarget mmix-*-*]
6001 || [istarget s390*-*-*]
6002 || [istarget powerpc*-*-*]
6003 || [istarget nios2*-*-*]
6004 || [check_effective_target_arm_cortex_m] } {
6005 return 1
6006 }
6007 return 0
6008 }
6009
6010 # Record that dg-final test TEST requires convential compilation.
6011
6012 proc force_conventional_output_for { test } {
6013 if { [info proc $test] == "" } {
6014 perror "$test does not exist"
6015 exit 1
6016 }
6017 proc ${test}_required_options {} {
6018 global gcc_force_conventional_output
6019 return $gcc_force_conventional_output
6020 }
6021 }
6022