ssa-dom-thread-4.c: Remove s390 special option.
[gcc.git] / gcc / testsuite / lib / target-supports.exp
1 # Copyright (C) 1999-2014 Free Software Foundation, Inc.
2
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
7 #
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
12 #
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
16
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
19
20 # This file defines procs for determining features supported by the target.
21
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
26 #
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
30 #
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
33 # "// C++" for c++,
34 # "! Fortran" for Fortran code,
35 # "/* ObjC", for ObjC
36 # "// ObjC++" for ObjC++
37 # and "// Go" for Go
38 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
39 # allow for ObjC/ObjC++ specific flags.
40 proc check_compile {basename type contents args} {
41 global tool
42 verbose "check_compile tool: $tool for $basename"
43
44 if { [llength $args] > 0 } {
45 set options [list "additional_flags=[lindex $args 0]"]
46 } else {
47 set options ""
48 }
49 switch -glob -- $contents {
50 "*! Fortran*" { set src ${basename}[pid].f90 }
51 "*// C++*" { set src ${basename}[pid].cc }
52 "*// ObjC++*" { set src ${basename}[pid].mm }
53 "*/* ObjC*" { set src ${basename}[pid].m }
54 "*// Go*" { set src ${basename}[pid].go }
55 default {
56 switch -- $tool {
57 "objc" { set src ${basename}[pid].m }
58 "obj-c++" { set src ${basename}[pid].mm }
59 default { set src ${basename}[pid].c }
60 }
61 }
62 }
63
64 set compile_type $type
65 switch -glob $type {
66 assembly { set output ${basename}[pid].s }
67 object { set output ${basename}[pid].o }
68 executable { set output ${basename}[pid].exe }
69 "rtl-*" {
70 set output ${basename}[pid].s
71 lappend options "additional_flags=-fdump-$type"
72 set compile_type assembly
73 }
74 }
75 set f [open $src "w"]
76 puts $f $contents
77 close $f
78 set lines [${tool}_target_compile $src $output $compile_type "$options"]
79 file delete $src
80
81 set scan_output $output
82 # Don't try folding this into the switch above; calling "glob" before the
83 # file is created won't work.
84 if [regexp "rtl-(.*)" $type dummy rtl_type] {
85 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
86 file delete $output
87 }
88
89 return [list $lines $scan_output]
90 }
91
92 proc current_target_name { } {
93 global target_info
94 if [info exists target_info(target,name)] {
95 set answer $target_info(target,name)
96 } else {
97 set answer ""
98 }
99 return $answer
100 }
101
102 # Implement an effective-target check for property PROP by invoking
103 # the Tcl command ARGS and seeing if it returns true.
104
105 proc check_cached_effective_target { prop args } {
106 global et_cache
107
108 set target [current_target_name]
109 if {![info exists et_cache($prop,target)]
110 || $et_cache($prop,target) != $target} {
111 verbose "check_cached_effective_target $prop: checking $target" 2
112 set et_cache($prop,target) $target
113 set et_cache($prop,value) [uplevel eval $args]
114 }
115 set value $et_cache($prop,value)
116 verbose "check_cached_effective_target $prop: returning $value for $target" 2
117 return $value
118 }
119
120 # Like check_compile, but delete the output file and return true if the
121 # compiler printed no messages.
122 proc check_no_compiler_messages_nocache {args} {
123 set result [eval check_compile $args]
124 set lines [lindex $result 0]
125 set output [lindex $result 1]
126 remote_file build delete $output
127 return [string match "" $lines]
128 }
129
130 # Like check_no_compiler_messages_nocache, but cache the result.
131 # PROP is the property we're checking, and doubles as a prefix for
132 # temporary filenames.
133 proc check_no_compiler_messages {prop args} {
134 return [check_cached_effective_target $prop {
135 eval [list check_no_compiler_messages_nocache $prop] $args
136 }]
137 }
138
139 # Like check_compile, but return true if the compiler printed no
140 # messages and if the contents of the output file satisfy PATTERN.
141 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
142 # don't match regular expression REGEXP, otherwise they satisfy it
143 # if they do match regular expression PATTERN. (PATTERN can start
144 # with something like "[!]" if the regular expression needs to match
145 # "!" as the first character.)
146 #
147 # Delete the output file before returning. The other arguments are
148 # as for check_compile.
149 proc check_no_messages_and_pattern_nocache {basename pattern args} {
150 global tool
151
152 set result [eval [list check_compile $basename] $args]
153 set lines [lindex $result 0]
154 set output [lindex $result 1]
155
156 set ok 0
157 if { [string match "" $lines] } {
158 set chan [open "$output"]
159 set invert [regexp {^!(.*)} $pattern dummy pattern]
160 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
161 close $chan
162 }
163
164 remote_file build delete $output
165 return $ok
166 }
167
168 # Like check_no_messages_and_pattern_nocache, but cache the result.
169 # PROP is the property we're checking, and doubles as a prefix for
170 # temporary filenames.
171 proc check_no_messages_and_pattern {prop pattern args} {
172 return [check_cached_effective_target $prop {
173 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
174 }]
175 }
176
177 # Try to compile and run an executable from code CONTENTS. Return true
178 # if the compiler reports no messages and if execution "passes" in the
179 # usual DejaGNU sense. The arguments are as for check_compile, with
180 # TYPE implicitly being "executable".
181 proc check_runtime_nocache {basename contents args} {
182 global tool
183
184 set result [eval [list check_compile $basename executable $contents] $args]
185 set lines [lindex $result 0]
186 set output [lindex $result 1]
187
188 set ok 0
189 if { [string match "" $lines] } {
190 # No error messages, everything is OK.
191 set result [remote_load target "./$output" "" ""]
192 set status [lindex $result 0]
193 verbose "check_runtime_nocache $basename: status is <$status>" 2
194 if { $status == "pass" } {
195 set ok 1
196 }
197 }
198 remote_file build delete $output
199 return $ok
200 }
201
202 # Like check_runtime_nocache, but cache the result. PROP is the
203 # property we're checking, and doubles as a prefix for temporary
204 # filenames.
205 proc check_runtime {prop args} {
206 global tool
207
208 return [check_cached_effective_target $prop {
209 eval [list check_runtime_nocache $prop] $args
210 }]
211 }
212
213 ###############################
214 # proc check_weak_available { }
215 ###############################
216
217 # weak symbols are only supported in some configs/object formats
218 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
219
220 proc check_weak_available { } {
221 global target_cpu
222
223 # All mips targets should support it
224
225 if { [ string first "mips" $target_cpu ] >= 0 } {
226 return 1
227 }
228
229 # All AIX targets should support it
230
231 if { [istarget *-*-aix*] } {
232 return 1
233 }
234
235 # All solaris2 targets should support it
236
237 if { [istarget *-*-solaris2*] } {
238 return 1
239 }
240
241 # Windows targets Cygwin and MingW32 support it
242
243 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
244 return 1
245 }
246
247 # HP-UX 10.X doesn't support it
248
249 if { [istarget hppa*-*-hpux10*] } {
250 return 0
251 }
252
253 # ELF and ECOFF support it. a.out does with gas/gld but may also with
254 # other linkers, so we should try it
255
256 set objformat [gcc_target_object_format]
257
258 switch $objformat {
259 elf { return 1 }
260 ecoff { return 1 }
261 a.out { return 1 }
262 mach-o { return 1 }
263 som { return 1 }
264 unknown { return -1 }
265 default { return 0 }
266 }
267 }
268
269 ###############################
270 # proc check_weak_override_available { }
271 ###############################
272
273 # Like check_weak_available, but return 0 if weak symbol definitions
274 # cannot be overridden.
275
276 proc check_weak_override_available { } {
277 if { [istarget *-*-mingw*] } {
278 return 0
279 }
280 return [check_weak_available]
281 }
282
283 ###############################
284 # proc check_visibility_available { what_kind }
285 ###############################
286
287 # The visibility attribute is only support in some object formats
288 # This proc returns 1 if it is supported, 0 if not.
289 # The argument is the kind of visibility, default/protected/hidden/internal.
290
291 proc check_visibility_available { what_kind } {
292 if [string match "" $what_kind] { set what_kind "hidden" }
293
294 return [check_no_compiler_messages visibility_available_$what_kind object "
295 void f() __attribute__((visibility(\"$what_kind\")));
296 void f() {}
297 "]
298 }
299
300 ###############################
301 # proc check_alias_available { }
302 ###############################
303
304 # Determine if the target toolchain supports the alias attribute.
305
306 # Returns 2 if the target supports aliases. Returns 1 if the target
307 # only supports weak aliased. Returns 0 if the target does not
308 # support aliases at all. Returns -1 if support for aliases could not
309 # be determined.
310
311 proc check_alias_available { } {
312 global alias_available_saved
313 global tool
314
315 if [info exists alias_available_saved] {
316 verbose "check_alias_available returning saved $alias_available_saved" 2
317 } else {
318 set src alias[pid].c
319 set obj alias[pid].o
320 verbose "check_alias_available compiling testfile $src" 2
321 set f [open $src "w"]
322 # Compile a small test program. The definition of "g" is
323 # necessary to keep the Solaris assembler from complaining
324 # about the program.
325 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
326 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
327 close $f
328 set lines [${tool}_target_compile $src $obj object ""]
329 file delete $src
330 remote_file build delete $obj
331
332 if [string match "" $lines] then {
333 # No error messages, everything is OK.
334 set alias_available_saved 2
335 } else {
336 if [regexp "alias definitions not supported" $lines] {
337 verbose "check_alias_available target does not support aliases" 2
338
339 set objformat [gcc_target_object_format]
340
341 if { $objformat == "elf" } {
342 verbose "check_alias_available but target uses ELF format, so it ought to" 2
343 set alias_available_saved -1
344 } else {
345 set alias_available_saved 0
346 }
347 } else {
348 if [regexp "only weak aliases are supported" $lines] {
349 verbose "check_alias_available target supports only weak aliases" 2
350 set alias_available_saved 1
351 } else {
352 set alias_available_saved -1
353 }
354 }
355 }
356
357 verbose "check_alias_available returning $alias_available_saved" 2
358 }
359
360 return $alias_available_saved
361 }
362
363 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
364
365 proc check_effective_target_alias { } {
366 if { [check_alias_available] < 2 } {
367 return 0
368 } else {
369 return 1
370 }
371 }
372
373 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
374
375 proc check_ifunc_available { } {
376 return [check_no_compiler_messages ifunc_available object {
377 #ifdef __cplusplus
378 extern "C"
379 #endif
380 void g() {}
381 void f() __attribute__((ifunc("g")));
382 }]
383 }
384
385 # Returns true if --gc-sections is supported on the target.
386
387 proc check_gc_sections_available { } {
388 global gc_sections_available_saved
389 global tool
390
391 if {![info exists gc_sections_available_saved]} {
392 # Some targets don't support gc-sections despite whatever's
393 # advertised by ld's options.
394 if { [istarget alpha*-*-*]
395 || [istarget ia64-*-*] } {
396 set gc_sections_available_saved 0
397 return 0
398 }
399
400 # elf2flt uses -q (--emit-relocs), which is incompatible with
401 # --gc-sections.
402 if { [board_info target exists ldflags]
403 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
404 set gc_sections_available_saved 0
405 return 0
406 }
407
408 # VxWorks kernel modules are relocatable objects linked with -r,
409 # while RTP executables are linked with -q (--emit-relocs).
410 # Both of these options are incompatible with --gc-sections.
411 if { [istarget *-*-vxworks*] } {
412 set gc_sections_available_saved 0
413 return 0
414 }
415
416 # Check if the ld used by gcc supports --gc-sections.
417 set gcc_spec [${tool}_target_compile "-dumpspecs" "" "none" ""]
418 regsub ".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
419 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=$linker" "" "none" ""] 0]
420 set ld_output [remote_exec host "$gcc_ld" "--help"]
421 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
422 set gc_sections_available_saved 1
423 } else {
424 set gc_sections_available_saved 0
425 }
426 }
427 return $gc_sections_available_saved
428 }
429
430 # Return 1 if according to target_info struct and explicit target list
431 # target is supposed to support trampolines.
432
433 proc check_effective_target_trampolines { } {
434 if [target_info exists no_trampolines] {
435 return 0
436 }
437 if { [istarget avr-*-*]
438 || [istarget msp430-*-*]
439 || [istarget hppa2.0w-hp-hpux11.23]
440 || [istarget hppa64-hp-hpux11.23] } {
441 return 0;
442 }
443 return 1
444 }
445
446 # Return 1 if according to target_info struct and explicit target list
447 # target is supposed to keep null pointer checks. This could be due to
448 # use of option fno-delete-null-pointer-checks or hardwired in target.
449
450 proc check_effective_target_keeps_null_pointer_checks { } {
451 if [target_info exists keeps_null_pointer_checks] {
452 return 1
453 }
454 if { [istarget avr-*-*] } {
455 return 1;
456 }
457 return 0
458 }
459
460 # Return true if profiling is supported on the target.
461
462 proc check_profiling_available { test_what } {
463 global profiling_available_saved
464
465 verbose "Profiling argument is <$test_what>" 1
466
467 # These conditions depend on the argument so examine them before
468 # looking at the cache variable.
469
470 # Tree profiling requires TLS runtime support.
471 if { $test_what == "-fprofile-generate" } {
472 if { ![check_effective_target_tls_runtime] } {
473 return 0
474 }
475 }
476
477 # Support for -p on solaris2 relies on mcrt1.o which comes with the
478 # vendor compiler. We cannot reliably predict the directory where the
479 # vendor compiler (and thus mcrt1.o) is installed so we can't
480 # necessarily find mcrt1.o even if we have it.
481 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
482 return 0
483 }
484
485 # We don't yet support profiling for MIPS16.
486 if { [istarget mips*-*-*]
487 && ![check_effective_target_nomips16]
488 && ($test_what == "-p" || $test_what == "-pg") } {
489 return 0
490 }
491
492 # MinGW does not support -p.
493 if { [istarget *-*-mingw*] && $test_what == "-p" } {
494 return 0
495 }
496
497 # cygwin does not support -p.
498 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
499 return 0
500 }
501
502 # uClibc does not have gcrt1.o.
503 if { [check_effective_target_uclibc]
504 && ($test_what == "-p" || $test_what == "-pg") } {
505 return 0
506 }
507
508 # Now examine the cache variable.
509 if {![info exists profiling_available_saved]} {
510 # Some targets don't have any implementation of __bb_init_func or are
511 # missing other needed machinery.
512 if { [istarget aarch64*-*-elf]
513 || [istarget am3*-*-linux*]
514 || [istarget arm*-*-eabi*]
515 || [istarget arm*-*-elf]
516 || [istarget arm*-*-symbianelf*]
517 || [istarget avr-*-*]
518 || [istarget bfin-*-*]
519 || [istarget cris-*-*]
520 || [istarget crisv32-*-*]
521 || [istarget fido-*-elf]
522 || [istarget h8300-*-*]
523 || [istarget lm32-*-*]
524 || [istarget m32c-*-elf]
525 || [istarget m68k-*-elf]
526 || [istarget m68k-*-uclinux*]
527 || [istarget mep-*-elf]
528 || [istarget mips*-*-elf*]
529 || [istarget mmix-*-*]
530 || [istarget mn10300-*-elf*]
531 || [istarget moxie-*-elf*]
532 || [istarget msp430-*-*]
533 || [istarget nds32*-*-elf]
534 || [istarget nios2-*-elf]
535 || [istarget picochip-*-*]
536 || [istarget powerpc-*-eabi*]
537 || [istarget powerpc-*-elf]
538 || [istarget rx-*-*]
539 || [istarget tic6x-*-elf]
540 || [istarget xstormy16-*]
541 || [istarget xtensa*-*-elf]
542 || [istarget *-*-rtems*]
543 || [istarget *-*-vxworks*] } {
544 set profiling_available_saved 0
545 } else {
546 set profiling_available_saved 1
547 }
548 }
549
550 return $profiling_available_saved
551 }
552
553 # Check to see if a target is "freestanding". This is as per the definition
554 # in Section 4 of C99 standard. Effectively, it is a target which supports no
555 # extra headers or libraries other than what is considered essential.
556 proc check_effective_target_freestanding { } {
557 if { [istarget picochip-*-*] } then {
558 return 1
559 } else {
560 return 0
561 }
562 }
563
564 # Return 1 if target has packed layout of structure members by
565 # default, 0 otherwise. Note that this is slightly different than
566 # whether the target has "natural alignment": both attributes may be
567 # false.
568
569 proc check_effective_target_default_packed { } {
570 return [check_no_compiler_messages default_packed assembly {
571 struct x { char a; long b; } c;
572 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
573 }]
574 }
575
576 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
577 # documentation, where the test also comes from.
578
579 proc check_effective_target_pcc_bitfield_type_matters { } {
580 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
581 # bitfields, but let's stick to the example code from the docs.
582 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
583 struct foo1 { char x; char :0; char y; };
584 struct foo2 { char x; int :0; char y; };
585 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
586 }]
587 }
588
589 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
590
591 proc add_options_for_tls { flags } {
592 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
593 # libthread, so always pass -pthread for native TLS. Same for AIX.
594 # Need to duplicate native TLS check from
595 # check_effective_target_tls_native to avoid recursion.
596 if { ([istarget *-*-solaris2.9*] || [istarget powerpc-ibm-aix*]) &&
597 [check_no_messages_and_pattern tls_native "!emutls" assembly {
598 __thread int i;
599 int f (void) { return i; }
600 void g (int j) { i = j; }
601 }] } {
602 return "$flags -pthread"
603 }
604 return $flags
605 }
606
607 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
608
609 proc check_effective_target_tls {} {
610 return [check_no_compiler_messages tls assembly {
611 __thread int i;
612 int f (void) { return i; }
613 void g (int j) { i = j; }
614 }]
615 }
616
617 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
618
619 proc check_effective_target_tls_native {} {
620 # VxWorks uses emulated TLS machinery, but with non-standard helper
621 # functions, so we fail to automatically detect it.
622 if { [istarget *-*-vxworks*] } {
623 return 0
624 }
625
626 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
627 __thread int i;
628 int f (void) { return i; }
629 void g (int j) { i = j; }
630 }]
631 }
632
633 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
634
635 proc check_effective_target_tls_emulated {} {
636 # VxWorks uses emulated TLS machinery, but with non-standard helper
637 # functions, so we fail to automatically detect it.
638 if { [istarget *-*-vxworks*] } {
639 return 1
640 }
641
642 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
643 __thread int i;
644 int f (void) { return i; }
645 void g (int j) { i = j; }
646 }]
647 }
648
649 # Return 1 if TLS executables can run correctly, 0 otherwise.
650
651 proc check_effective_target_tls_runtime {} {
652 # MSP430 runtime does not have TLS support, but just
653 # running the test below is insufficient to show this.
654 if { [istarget msp430-*-*] } {
655 return 0
656 }
657 return [check_runtime tls_runtime {
658 __thread int thr = 0;
659 int main (void) { return thr; }
660 } [add_options_for_tls ""]]
661 }
662
663 # Return 1 if atomic compare-and-swap is supported on 'int'
664
665 proc check_effective_target_cas_char {} {
666 return [check_no_compiler_messages cas_char assembly {
667 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
668 #error unsupported
669 #endif
670 } ""]
671 }
672
673 proc check_effective_target_cas_int {} {
674 return [check_no_compiler_messages cas_int assembly {
675 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
676 /* ok */
677 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
678 /* ok */
679 #else
680 #error unsupported
681 #endif
682 } ""]
683 }
684
685 # Return 1 if -ffunction-sections is supported, 0 otherwise.
686
687 proc check_effective_target_function_sections {} {
688 # Darwin has its own scheme and silently accepts -ffunction-sections.
689 if { [istarget *-*-darwin*] } {
690 return 0
691 }
692
693 return [check_no_compiler_messages functionsections assembly {
694 void foo (void) { }
695 } "-ffunction-sections"]
696 }
697
698 # Return 1 if instruction scheduling is available, 0 otherwise.
699
700 proc check_effective_target_scheduling {} {
701 return [check_no_compiler_messages scheduling object {
702 void foo (void) { }
703 } "-fschedule-insns"]
704 }
705
706 # Return 1 if trapping arithmetic is available, 0 otherwise.
707
708 proc check_effective_target_trapping {} {
709 return [check_no_compiler_messages scheduling object {
710 add (int a, int b) { return a + b; }
711 } "-ftrapv"]
712 }
713
714 # Return 1 if compilation with -fgraphite is error-free for trivial
715 # code, 0 otherwise.
716
717 proc check_effective_target_fgraphite {} {
718 return [check_no_compiler_messages fgraphite object {
719 void foo (void) { }
720 } "-O1 -fgraphite"]
721 }
722
723 # Return 1 if compilation with -fopenmp is error-free for trivial
724 # code, 0 otherwise.
725
726 proc check_effective_target_fopenmp {} {
727 return [check_no_compiler_messages fopenmp object {
728 void foo (void) { }
729 } "-fopenmp"]
730 }
731
732 # Return 1 if compilation with -fgnu-tm is error-free for trivial
733 # code, 0 otherwise.
734
735 proc check_effective_target_fgnu_tm {} {
736 return [check_no_compiler_messages fgnu_tm object {
737 void foo (void) { }
738 } "-fgnu-tm"]
739 }
740
741 # Return 1 if the target supports mmap, 0 otherwise.
742
743 proc check_effective_target_mmap {} {
744 return [check_function_available "mmap"]
745 }
746
747 # Return 1 if the target supports dlopen, 0 otherwise.
748 proc check_effective_target_dlopen {} {
749 return [check_function_available "dlopen"]
750 }
751
752 # Return 1 if the target supports clone, 0 otherwise.
753 proc check_effective_target_clone {} {
754 return [check_function_available "clone"]
755 }
756
757 # Return 1 if the target supports setrlimit, 0 otherwise.
758 proc check_effective_target_setrlimit {} {
759 # Darwin has non-posix compliant RLIMIT_AS
760 if { [istarget *-*-darwin*] } {
761 return 0
762 }
763 return [check_function_available "setrlimit"]
764 }
765
766 # Return 1 if the target supports swapcontext, 0 otherwise.
767 proc check_effective_target_swapcontext {} {
768 return [check_no_compiler_messages swapcontext executable {
769 #include <ucontext.h>
770 int main (void)
771 {
772 ucontext_t orig_context,child_context;
773 if (swapcontext(&child_context, &orig_context) < 0) { }
774 }
775 }]
776 }
777
778 # Return 1 if compilation with -pthread is error-free for trivial
779 # code, 0 otherwise.
780
781 proc check_effective_target_pthread {} {
782 return [check_no_compiler_messages pthread object {
783 void foo (void) { }
784 } "-pthread"]
785 }
786
787 # Return 1 if compilation with -mpe-aligned-commons is error-free
788 # for trivial code, 0 otherwise.
789
790 proc check_effective_target_pe_aligned_commons {} {
791 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
792 return [check_no_compiler_messages pe_aligned_commons object {
793 int foo;
794 } "-mpe-aligned-commons"]
795 }
796 return 0
797 }
798
799 # Return 1 if the target supports -static
800 proc check_effective_target_static {} {
801 return [check_no_compiler_messages static executable {
802 int main (void) { return 0; }
803 } "-static"]
804 }
805
806 # Return 1 if the target supports -fstack-protector
807 proc check_effective_target_fstack_protector {} {
808 return [check_runtime fstack_protector {
809 int main (void) { return 0; }
810 } "-fstack-protector"]
811 }
812
813 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
814 # for trivial code, 0 otherwise.
815
816 proc check_effective_target_freorder {} {
817 return [check_no_compiler_messages freorder object {
818 void foo (void) { }
819 } "-freorder-blocks-and-partition"]
820 }
821
822 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
823 # emitted, 0 otherwise. Whether a shared library can actually be built is
824 # out of scope for this test.
825
826 proc check_effective_target_fpic { } {
827 # Note that M68K has a multilib that supports -fpic but not
828 # -fPIC, so we need to check both. We test with a program that
829 # requires GOT references.
830 foreach arg {fpic fPIC} {
831 if [check_no_compiler_messages $arg object {
832 extern int foo (void); extern int bar;
833 int baz (void) { return foo () + bar; }
834 } "-$arg"] {
835 return 1
836 }
837 }
838 return 0
839 }
840
841 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
842
843 proc check_effective_target_pie { } {
844 if { [istarget *-*-darwin\[912\]*]
845 || [istarget *-*-linux*]
846 || [istarget *-*-gnu*] } {
847 return 1;
848 }
849 return 0
850 }
851
852 # Return true if the target supports -mpaired-single (as used on MIPS).
853
854 proc check_effective_target_mpaired_single { } {
855 return [check_no_compiler_messages mpaired_single object {
856 void foo (void) { }
857 } "-mpaired-single"]
858 }
859
860 # Return true if the target has access to FPU instructions.
861
862 proc check_effective_target_hard_float { } {
863 if { [istarget mips*-*-*] } {
864 return [check_no_compiler_messages hard_float assembly {
865 #if (defined __mips_soft_float || defined __mips16)
866 #error FOO
867 #endif
868 }]
869 }
870
871 # This proc is actually checking the availabilty of FPU
872 # support for doubles, so on the RX we must fail if the
873 # 64-bit double multilib has been selected.
874 if { [istarget rx-*-*] } {
875 return 0
876 # return [check_no_compiler_messages hard_float assembly {
877 #if defined __RX_64_BIT_DOUBLES__
878 #error FOO
879 #endif
880 # }]
881 }
882
883 # The generic test equates hard_float with "no call for adding doubles".
884 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
885 double a (double b, double c) { return b + c; }
886 }]
887 }
888
889 # Return true if the target is a 64-bit MIPS target.
890
891 proc check_effective_target_mips64 { } {
892 return [check_no_compiler_messages mips64 assembly {
893 #ifndef __mips64
894 #error FOO
895 #endif
896 }]
897 }
898
899 # Return true if the target is a MIPS target that does not produce
900 # MIPS16 code.
901
902 proc check_effective_target_nomips16 { } {
903 return [check_no_compiler_messages nomips16 object {
904 #ifndef __mips
905 #error FOO
906 #else
907 /* A cheap way of testing for -mflip-mips16. */
908 void foo (void) { asm ("addiu $20,$20,1"); }
909 void bar (void) { asm ("addiu $20,$20,1"); }
910 #endif
911 }]
912 }
913
914 # Add the options needed for MIPS16 function attributes. At the moment,
915 # we don't support MIPS16 PIC.
916
917 proc add_options_for_mips16_attribute { flags } {
918 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
919 }
920
921 # Return true if we can force a mode that allows MIPS16 code generation.
922 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
923 # for o32 and o64.
924
925 proc check_effective_target_mips16_attribute { } {
926 return [check_no_compiler_messages mips16_attribute assembly {
927 #ifdef PIC
928 #error FOO
929 #endif
930 #if defined __mips_hard_float \
931 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
932 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
933 #error FOO
934 #endif
935 } [add_options_for_mips16_attribute ""]]
936 }
937
938 # Return 1 if the target supports long double larger than double when
939 # using the new ABI, 0 otherwise.
940
941 proc check_effective_target_mips_newabi_large_long_double { } {
942 return [check_no_compiler_messages mips_newabi_large_long_double object {
943 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
944 } "-mabi=64"]
945 }
946
947 # Return true if the target is a MIPS target that has access
948 # to the LL and SC instructions.
949
950 proc check_effective_target_mips_llsc { } {
951 if { ![istarget mips*-*-*] } {
952 return 0
953 }
954 # Assume that these instructions are always implemented for
955 # non-elf* targets, via emulation if necessary.
956 if { ![istarget *-*-elf*] } {
957 return 1
958 }
959 # Otherwise assume LL/SC support for everything but MIPS I.
960 return [check_no_compiler_messages mips_llsc assembly {
961 #if __mips == 1
962 #error FOO
963 #endif
964 }]
965 }
966
967 # Return true if the target is a MIPS target that uses in-place relocations.
968
969 proc check_effective_target_mips_rel { } {
970 if { ![istarget mips*-*-*] } {
971 return 0
972 }
973 return [check_no_compiler_messages mips_rel object {
974 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
975 || (defined _ABI64 && _MIPS_SIM == _ABI64)
976 #error FOO
977 #endif
978 }]
979 }
980
981 # Return true if the target is a MIPS target that uses the EABI.
982
983 proc check_effective_target_mips_eabi { } {
984 if { ![istarget mips*-*-*] } {
985 return 0
986 }
987 return [check_no_compiler_messages mips_eabi object {
988 #ifndef __mips_eabi
989 #error FOO
990 #endif
991 }]
992 }
993
994 # Return 1 if the current multilib does not generate PIC by default.
995
996 proc check_effective_target_nonpic { } {
997 return [check_no_compiler_messages nonpic assembly {
998 #if __PIC__
999 #error FOO
1000 #endif
1001 }]
1002 }
1003
1004 # Return 1 if the target does not use a status wrapper.
1005
1006 proc check_effective_target_unwrapped { } {
1007 if { [target_info needs_status_wrapper] != "" \
1008 && [target_info needs_status_wrapper] != "0" } {
1009 return 0
1010 }
1011 return 1
1012 }
1013
1014 # Return true if iconv is supported on the target. In particular IBM1047.
1015
1016 proc check_iconv_available { test_what } {
1017 global libiconv
1018
1019 # If the tool configuration file has not set libiconv, try "-liconv"
1020 if { ![info exists libiconv] } {
1021 set libiconv "-liconv"
1022 }
1023 set test_what [lindex $test_what 1]
1024 return [check_runtime_nocache $test_what [subst {
1025 #include <iconv.h>
1026 int main (void)
1027 {
1028 iconv_t cd;
1029
1030 cd = iconv_open ("$test_what", "UTF-8");
1031 if (cd == (iconv_t) -1)
1032 return 1;
1033 return 0;
1034 }
1035 }] $libiconv]
1036 }
1037
1038 # Return true if Cilk Library is supported on the target.
1039 proc check_libcilkrts_available { } {
1040 return [ check_no_compiler_messages_nocache libcilkrts_available executable {
1041 #ifdef __cplusplus
1042 extern "C"
1043 #endif
1044 int __cilkrts_set_param (const char *, const char *);
1045 int main (void) {
1046 int x = __cilkrts_set_param ("nworkers", "0");
1047 return x;
1048 }
1049 } "-fcilkplus -lcilkrts" ]
1050 }
1051
1052 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1053
1054 proc check_ascii_locale_available { } {
1055 return 1
1056 }
1057
1058 # Return true if named sections are supported on this target.
1059
1060 proc check_named_sections_available { } {
1061 return [check_no_compiler_messages named_sections assembly {
1062 int __attribute__ ((section("whatever"))) foo;
1063 }]
1064 }
1065
1066 # Return true if the "naked" function attribute is supported on this target.
1067
1068 proc check_effective_target_naked_functions { } {
1069 return [check_no_compiler_messages naked_functions assembly {
1070 void f() __attribute__((naked));
1071 }]
1072 }
1073
1074 # Return 1 if the target supports Fortran real kinds larger than real(8),
1075 # 0 otherwise.
1076 #
1077 # When the target name changes, replace the cached result.
1078
1079 proc check_effective_target_fortran_large_real { } {
1080 return [check_no_compiler_messages fortran_large_real executable {
1081 ! Fortran
1082 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1083 real(kind=k) :: x
1084 x = cos (x)
1085 end
1086 }]
1087 }
1088
1089 # Return 1 if the target supports Fortran real kind real(16),
1090 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1091 # this checks for Real(16) only; the other returned real(10) if
1092 # both real(10) and real(16) are available.
1093 #
1094 # When the target name changes, replace the cached result.
1095
1096 proc check_effective_target_fortran_real_16 { } {
1097 return [check_no_compiler_messages fortran_real_16 executable {
1098 ! Fortran
1099 real(kind=16) :: x
1100 x = cos (x)
1101 end
1102 }]
1103 }
1104
1105
1106 # Return 1 if the target supports SQRT for the largest floating-point
1107 # type. (Some targets lack the libm support for this FP type.)
1108 # On most targets, this check effectively checks either whether sqrtl is
1109 # available or on __float128 systems whether libquadmath is installed,
1110 # which provides sqrtq.
1111 #
1112 # When the target name changes, replace the cached result.
1113
1114 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1115 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1116 ! Fortran
1117 use iso_fortran_env, only: real_kinds
1118 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1119 real(kind=maxFP), volatile :: x
1120 x = 2.0_maxFP
1121 x = sqrt (x)
1122 end
1123 }]
1124 }
1125
1126
1127 # Return 1 if the target supports Fortran integer kinds larger than
1128 # integer(8), 0 otherwise.
1129 #
1130 # When the target name changes, replace the cached result.
1131
1132 proc check_effective_target_fortran_large_int { } {
1133 return [check_no_compiler_messages fortran_large_int executable {
1134 ! Fortran
1135 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1136 integer(kind=k) :: i
1137 end
1138 }]
1139 }
1140
1141 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1142 #
1143 # When the target name changes, replace the cached result.
1144
1145 proc check_effective_target_fortran_integer_16 { } {
1146 return [check_no_compiler_messages fortran_integer_16 executable {
1147 ! Fortran
1148 integer(16) :: i
1149 end
1150 }]
1151 }
1152
1153 # Return 1 if we can statically link libgfortran, 0 otherwise.
1154 #
1155 # When the target name changes, replace the cached result.
1156
1157 proc check_effective_target_static_libgfortran { } {
1158 return [check_no_compiler_messages static_libgfortran executable {
1159 ! Fortran
1160 print *, 'test'
1161 end
1162 } "-static"]
1163 }
1164
1165 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1166
1167 proc check_effective_target_cilkplus { } {
1168 # Skip cilk-plus tests on int16 and size16 targets for now.
1169 # The cilk-plus tests are not generic enough to cover these
1170 # cases and would throw hundreds of FAILs.
1171 if { [check_effective_target_int16]
1172 || ![check_effective_target_size32plus] } {
1173 return 0;
1174 }
1175
1176 # Skip AVR, its RAM is too small and too many tests would fail.
1177 if { [istarget avr-*-*] } {
1178 return 0;
1179 }
1180 return 1
1181 }
1182
1183 proc check_linker_plugin_available { } {
1184 return [check_no_compiler_messages_nocache linker_plugin executable {
1185 int main() { return 0; }
1186 } "-flto -fuse-linker-plugin"]
1187 }
1188
1189 # Return 1 if the target supports executing 750CL paired-single instructions, 0
1190 # otherwise. Cache the result.
1191
1192 proc check_750cl_hw_available { } {
1193 return [check_cached_effective_target 750cl_hw_available {
1194 # If this is not the right target then we can skip the test.
1195 if { ![istarget powerpc-*paired*] } {
1196 expr 0
1197 } else {
1198 check_runtime_nocache 750cl_hw_available {
1199 int main()
1200 {
1201 #ifdef __MACH__
1202 asm volatile ("ps_mul v0,v0,v0");
1203 #else
1204 asm volatile ("ps_mul 0,0,0");
1205 #endif
1206 return 0;
1207 }
1208 } "-mpaired"
1209 }
1210 }]
1211 }
1212
1213 # Return 1 if the target OS supports running SSE executables, 0
1214 # otherwise. Cache the result.
1215
1216 proc check_sse_os_support_available { } {
1217 return [check_cached_effective_target sse_os_support_available {
1218 # If this is not the right target then we can skip the test.
1219 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1220 expr 0
1221 } elseif { [istarget i?86-*-solaris2*] } {
1222 # The Solaris 2 kernel doesn't save and restore SSE registers
1223 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1224 check_runtime_nocache sse_os_support_available {
1225 int main ()
1226 {
1227 asm volatile ("movaps %xmm0,%xmm0");
1228 return 0;
1229 }
1230 } "-msse"
1231 } else {
1232 expr 1
1233 }
1234 }]
1235 }
1236
1237 # Return 1 if the target OS supports running AVX executables, 0
1238 # otherwise. Cache the result.
1239
1240 proc check_avx_os_support_available { } {
1241 return [check_cached_effective_target avx_os_support_available {
1242 # If this is not the right target then we can skip the test.
1243 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1244 expr 0
1245 } else {
1246 # Check that OS has AVX and SSE saving enabled.
1247 check_runtime_nocache avx_os_support_available {
1248 int main ()
1249 {
1250 unsigned int eax, edx;
1251
1252 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1253 return (eax & 6) != 6;
1254 }
1255 } ""
1256 }
1257 }]
1258 }
1259
1260 # Return 1 if the target supports executing SSE instructions, 0
1261 # otherwise. Cache the result.
1262
1263 proc check_sse_hw_available { } {
1264 return [check_cached_effective_target sse_hw_available {
1265 # If this is not the right target then we can skip the test.
1266 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1267 expr 0
1268 } else {
1269 check_runtime_nocache sse_hw_available {
1270 #include "cpuid.h"
1271 int main ()
1272 {
1273 unsigned int eax, ebx, ecx, edx;
1274 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1275 return !(edx & bit_SSE);
1276 return 1;
1277 }
1278 } ""
1279 }
1280 }]
1281 }
1282
1283 # Return 1 if the target supports executing SSE2 instructions, 0
1284 # otherwise. Cache the result.
1285
1286 proc check_sse2_hw_available { } {
1287 return [check_cached_effective_target sse2_hw_available {
1288 # If this is not the right target then we can skip the test.
1289 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1290 expr 0
1291 } else {
1292 check_runtime_nocache sse2_hw_available {
1293 #include "cpuid.h"
1294 int main ()
1295 {
1296 unsigned int eax, ebx, ecx, edx;
1297 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1298 return !(edx & bit_SSE2);
1299 return 1;
1300 }
1301 } ""
1302 }
1303 }]
1304 }
1305
1306 # Return 1 if the target supports executing AVX instructions, 0
1307 # otherwise. Cache the result.
1308
1309 proc check_avx_hw_available { } {
1310 return [check_cached_effective_target avx_hw_available {
1311 # If this is not the right target then we can skip the test.
1312 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1313 expr 0
1314 } else {
1315 check_runtime_nocache avx_hw_available {
1316 #include "cpuid.h"
1317 int main ()
1318 {
1319 unsigned int eax, ebx, ecx, edx;
1320 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1321 return ((ecx & (bit_AVX | bit_OSXSAVE))
1322 != (bit_AVX | bit_OSXSAVE));
1323 return 1;
1324 }
1325 } ""
1326 }
1327 }]
1328 }
1329
1330 # Return 1 if the target supports running SSE executables, 0 otherwise.
1331
1332 proc check_effective_target_sse_runtime { } {
1333 if { [check_effective_target_sse]
1334 && [check_sse_hw_available]
1335 && [check_sse_os_support_available] } {
1336 return 1
1337 }
1338 return 0
1339 }
1340
1341 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1342
1343 proc check_effective_target_sse2_runtime { } {
1344 if { [check_effective_target_sse2]
1345 && [check_sse2_hw_available]
1346 && [check_sse_os_support_available] } {
1347 return 1
1348 }
1349 return 0
1350 }
1351
1352 # Return 1 if the target supports running AVX executables, 0 otherwise.
1353
1354 proc check_effective_target_avx_runtime { } {
1355 if { [check_effective_target_avx]
1356 && [check_avx_hw_available]
1357 && [check_avx_os_support_available] } {
1358 return 1
1359 }
1360 return 0
1361 }
1362
1363 # Return 1 if the target supports executing power8 vector instructions, 0
1364 # otherwise. Cache the result.
1365
1366 proc check_p8vector_hw_available { } {
1367 return [check_cached_effective_target p8vector_hw_available {
1368 # Some simulators are known to not support VSX/power8 instructions.
1369 # For now, disable on Darwin
1370 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1371 expr 0
1372 } else {
1373 set options "-mpower8-vector"
1374 check_runtime_nocache p8vector_hw_available {
1375 int main()
1376 {
1377 #ifdef __MACH__
1378 asm volatile ("xxlorc vs0,vs0,vs0");
1379 #else
1380 asm volatile ("xxlorc 0,0,0");
1381 #endif
1382 return 0;
1383 }
1384 } $options
1385 }
1386 }]
1387 }
1388
1389 # Return 1 if the target supports executing VSX instructions, 0
1390 # otherwise. Cache the result.
1391
1392 proc check_vsx_hw_available { } {
1393 return [check_cached_effective_target vsx_hw_available {
1394 # Some simulators are known to not support VSX instructions.
1395 # For now, disable on Darwin
1396 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1397 expr 0
1398 } else {
1399 set options "-mvsx"
1400 check_runtime_nocache vsx_hw_available {
1401 int main()
1402 {
1403 #ifdef __MACH__
1404 asm volatile ("xxlor vs0,vs0,vs0");
1405 #else
1406 asm volatile ("xxlor 0,0,0");
1407 #endif
1408 return 0;
1409 }
1410 } $options
1411 }
1412 }]
1413 }
1414
1415 # Return 1 if the target supports executing AltiVec instructions, 0
1416 # otherwise. Cache the result.
1417
1418 proc check_vmx_hw_available { } {
1419 return [check_cached_effective_target vmx_hw_available {
1420 # Some simulators are known to not support VMX instructions.
1421 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
1422 expr 0
1423 } else {
1424 # Most targets don't require special flags for this test case, but
1425 # Darwin does. Just to be sure, make sure VSX is not enabled for
1426 # the altivec tests.
1427 if { [istarget *-*-darwin*]
1428 || [istarget *-*-aix*] } {
1429 set options "-maltivec -mno-vsx"
1430 } else {
1431 set options "-mno-vsx"
1432 }
1433 check_runtime_nocache vmx_hw_available {
1434 int main()
1435 {
1436 #ifdef __MACH__
1437 asm volatile ("vor v0,v0,v0");
1438 #else
1439 asm volatile ("vor 0,0,0");
1440 #endif
1441 return 0;
1442 }
1443 } $options
1444 }
1445 }]
1446 }
1447
1448 proc check_ppc_recip_hw_available { } {
1449 return [check_cached_effective_target ppc_recip_hw_available {
1450 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
1451 # For now, disable on Darwin
1452 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1453 expr 0
1454 } else {
1455 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
1456 check_runtime_nocache ppc_recip_hw_available {
1457 volatile double d_recip, d_rsqrt, d_four = 4.0;
1458 volatile float f_recip, f_rsqrt, f_four = 4.0f;
1459 int main()
1460 {
1461 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
1462 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
1463 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
1464 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
1465 return 0;
1466 }
1467 } $options
1468 }
1469 }]
1470 }
1471
1472 # Return 1 if the target supports executing AltiVec and Cell PPU
1473 # instructions, 0 otherwise. Cache the result.
1474
1475 proc check_effective_target_cell_hw { } {
1476 return [check_cached_effective_target cell_hw_available {
1477 # Some simulators are known to not support VMX and PPU instructions.
1478 if { [istarget powerpc-*-eabi*] } {
1479 expr 0
1480 } else {
1481 # Most targets don't require special flags for this test
1482 # case, but Darwin and AIX do.
1483 if { [istarget *-*-darwin*]
1484 || [istarget *-*-aix*] } {
1485 set options "-maltivec -mcpu=cell"
1486 } else {
1487 set options "-mcpu=cell"
1488 }
1489 check_runtime_nocache cell_hw_available {
1490 int main()
1491 {
1492 #ifdef __MACH__
1493 asm volatile ("vor v0,v0,v0");
1494 asm volatile ("lvlx v0,r0,r0");
1495 #else
1496 asm volatile ("vor 0,0,0");
1497 asm volatile ("lvlx 0,0,0");
1498 #endif
1499 return 0;
1500 }
1501 } $options
1502 }
1503 }]
1504 }
1505
1506 # Return 1 if the target supports executing 64-bit instructions, 0
1507 # otherwise. Cache the result.
1508
1509 proc check_effective_target_powerpc64 { } {
1510 global powerpc64_available_saved
1511 global tool
1512
1513 if [info exists powerpc64_available_saved] {
1514 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
1515 } else {
1516 set powerpc64_available_saved 0
1517
1518 # Some simulators are known to not support powerpc64 instructions.
1519 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
1520 verbose "check_effective_target_powerpc64 returning 0" 2
1521 return $powerpc64_available_saved
1522 }
1523
1524 # Set up, compile, and execute a test program containing a 64-bit
1525 # instruction. Include the current process ID in the file
1526 # names to prevent conflicts with invocations for multiple
1527 # testsuites.
1528 set src ppc[pid].c
1529 set exe ppc[pid].x
1530
1531 set f [open $src "w"]
1532 puts $f "int main() {"
1533 puts $f "#ifdef __MACH__"
1534 puts $f " asm volatile (\"extsw r0,r0\");"
1535 puts $f "#else"
1536 puts $f " asm volatile (\"extsw 0,0\");"
1537 puts $f "#endif"
1538 puts $f " return 0; }"
1539 close $f
1540
1541 set opts "additional_flags=-mcpu=G5"
1542
1543 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
1544 set lines [${tool}_target_compile $src $exe executable "$opts"]
1545 file delete $src
1546
1547 if [string match "" $lines] then {
1548 # No error message, compilation succeeded.
1549 set result [${tool}_load "./$exe" "" ""]
1550 set status [lindex $result 0]
1551 remote_file build delete $exe
1552 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
1553
1554 if { $status == "pass" } then {
1555 set powerpc64_available_saved 1
1556 }
1557 } else {
1558 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
1559 }
1560 }
1561
1562 return $powerpc64_available_saved
1563 }
1564
1565 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
1566 # complex float arguments. This affects gfortran tests that call cabsf
1567 # in libm built by an earlier compiler. Return 1 if libm uses the same
1568 # argument passing as the compiler under test, 0 otherwise.
1569 #
1570 # When the target name changes, replace the cached result.
1571
1572 proc check_effective_target_broken_cplxf_arg { } {
1573 return [check_cached_effective_target broken_cplxf_arg {
1574 # Skip the work for targets known not to be affected.
1575 if { ![istarget powerpc64-*-linux*] } {
1576 expr 0
1577 } elseif { ![is-effective-target lp64] } {
1578 expr 0
1579 } else {
1580 check_runtime_nocache broken_cplxf_arg {
1581 #include <complex.h>
1582 extern void abort (void);
1583 float fabsf (float);
1584 float cabsf (_Complex float);
1585 int main ()
1586 {
1587 _Complex float cf;
1588 float f;
1589 cf = 3 + 4.0fi;
1590 f = cabsf (cf);
1591 if (fabsf (f - 5.0) > 0.0001)
1592 abort ();
1593 return 0;
1594 }
1595 } "-lm"
1596 }
1597 }]
1598 }
1599
1600 # Return 1 is this is a TI C6X target supporting C67X instructions
1601 proc check_effective_target_ti_c67x { } {
1602 return [check_no_compiler_messages ti_c67x assembly {
1603 #if !defined(_TMS320C6700)
1604 #error FOO
1605 #endif
1606 }]
1607 }
1608
1609 # Return 1 is this is a TI C6X target supporting C64X+ instructions
1610 proc check_effective_target_ti_c64xp { } {
1611 return [check_no_compiler_messages ti_c64xp assembly {
1612 #if !defined(_TMS320C6400_PLUS)
1613 #error FOO
1614 #endif
1615 }]
1616 }
1617
1618
1619 proc check_alpha_max_hw_available { } {
1620 return [check_runtime alpha_max_hw_available {
1621 int main() { return __builtin_alpha_amask(1<<8) != 0; }
1622 }]
1623 }
1624
1625 # Returns true iff the FUNCTION is available on the target system.
1626 # (This is essentially a Tcl implementation of Autoconf's
1627 # AC_CHECK_FUNC.)
1628
1629 proc check_function_available { function } {
1630 return [check_no_compiler_messages ${function}_available \
1631 executable [subst {
1632 #ifdef __cplusplus
1633 extern "C"
1634 #endif
1635 char $function ();
1636 int main () { $function (); }
1637 }] "-fno-builtin" ]
1638 }
1639
1640 # Returns true iff "fork" is available on the target system.
1641
1642 proc check_fork_available {} {
1643 return [check_function_available "fork"]
1644 }
1645
1646 # Returns true iff "mkfifo" is available on the target system.
1647
1648 proc check_mkfifo_available {} {
1649 if { [istarget *-*-cygwin*] } {
1650 # Cygwin has mkfifo, but support is incomplete.
1651 return 0
1652 }
1653
1654 return [check_function_available "mkfifo"]
1655 }
1656
1657 # Returns true iff "__cxa_atexit" is used on the target system.
1658
1659 proc check_cxa_atexit_available { } {
1660 return [check_cached_effective_target cxa_atexit_available {
1661 if { [istarget hppa*-*-hpux10*] } {
1662 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
1663 expr 0
1664 } elseif { [istarget *-*-vxworks] } {
1665 # vxworks doesn't have __cxa_atexit but subsequent test passes.
1666 expr 0
1667 } else {
1668 check_runtime_nocache cxa_atexit_available {
1669 // C++
1670 #include <stdlib.h>
1671 static unsigned int count;
1672 struct X
1673 {
1674 X() { count = 1; }
1675 ~X()
1676 {
1677 if (count != 3)
1678 exit(1);
1679 count = 4;
1680 }
1681 };
1682 void f()
1683 {
1684 static X x;
1685 }
1686 struct Y
1687 {
1688 Y() { f(); count = 2; }
1689 ~Y()
1690 {
1691 if (count != 2)
1692 exit(1);
1693 count = 3;
1694 }
1695 };
1696 Y y;
1697 int main() { return 0; }
1698 }
1699 }
1700 }]
1701 }
1702
1703 proc check_effective_target_objc2 { } {
1704 return [check_no_compiler_messages objc2 object {
1705 #ifdef __OBJC2__
1706 int dummy[1];
1707 #else
1708 #error
1709 #endif
1710 }]
1711 }
1712
1713 proc check_effective_target_next_runtime { } {
1714 return [check_no_compiler_messages objc2 object {
1715 #ifdef __NEXT_RUNTIME__
1716 int dummy[1];
1717 #else
1718 #error
1719 #endif
1720 }]
1721 }
1722
1723 # Return 1 if we're generating 32-bit code using default options, 0
1724 # otherwise.
1725
1726 proc check_effective_target_ilp32 { } {
1727 return [check_no_compiler_messages ilp32 object {
1728 int dummy[sizeof (int) == 4
1729 && sizeof (void *) == 4
1730 && sizeof (long) == 4 ? 1 : -1];
1731 }]
1732 }
1733
1734 # Return 1 if we're generating ia32 code using default options, 0
1735 # otherwise.
1736
1737 proc check_effective_target_ia32 { } {
1738 return [check_no_compiler_messages ia32 object {
1739 int dummy[sizeof (int) == 4
1740 && sizeof (void *) == 4
1741 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
1742 }]
1743 }
1744
1745 # Return 1 if we're generating x32 code using default options, 0
1746 # otherwise.
1747
1748 proc check_effective_target_x32 { } {
1749 return [check_no_compiler_messages x32 object {
1750 int dummy[sizeof (int) == 4
1751 && sizeof (void *) == 4
1752 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
1753 }]
1754 }
1755
1756 # Return 1 if we're generating 32-bit integers using default
1757 # options, 0 otherwise.
1758
1759 proc check_effective_target_int32 { } {
1760 return [check_no_compiler_messages int32 object {
1761 int dummy[sizeof (int) == 4 ? 1 : -1];
1762 }]
1763 }
1764
1765 # Return 1 if we're generating 32-bit or larger integers using default
1766 # options, 0 otherwise.
1767
1768 proc check_effective_target_int32plus { } {
1769 return [check_no_compiler_messages int32plus object {
1770 int dummy[sizeof (int) >= 4 ? 1 : -1];
1771 }]
1772 }
1773
1774 # Return 1 if we're generating 32-bit or larger pointers using default
1775 # options, 0 otherwise.
1776
1777 proc check_effective_target_ptr32plus { } {
1778 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
1779 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
1780 # cannot really hold a 32-bit address, so we always return false here.
1781 if { [istarget msp430-*-*] } {
1782 return 0
1783 }
1784
1785 return [check_no_compiler_messages ptr32plus object {
1786 int dummy[sizeof (void *) >= 4 ? 1 : -1];
1787 }]
1788 }
1789
1790 # Return 1 if we support 32-bit or larger array and structure sizes
1791 # using default options, 0 otherwise.
1792
1793 proc check_effective_target_size32plus { } {
1794 return [check_no_compiler_messages size32plus object {
1795 char dummy[65537];
1796 }]
1797 }
1798
1799 # Returns 1 if we're generating 16-bit or smaller integers with the
1800 # default options, 0 otherwise.
1801
1802 proc check_effective_target_int16 { } {
1803 return [check_no_compiler_messages int16 object {
1804 int dummy[sizeof (int) < 4 ? 1 : -1];
1805 }]
1806 }
1807
1808 # Return 1 if we're generating 64-bit code using default options, 0
1809 # otherwise.
1810
1811 proc check_effective_target_lp64 { } {
1812 return [check_no_compiler_messages lp64 object {
1813 int dummy[sizeof (int) == 4
1814 && sizeof (void *) == 8
1815 && sizeof (long) == 8 ? 1 : -1];
1816 }]
1817 }
1818
1819 # Return 1 if we're generating 64-bit code using default llp64 options,
1820 # 0 otherwise.
1821
1822 proc check_effective_target_llp64 { } {
1823 return [check_no_compiler_messages llp64 object {
1824 int dummy[sizeof (int) == 4
1825 && sizeof (void *) == 8
1826 && sizeof (long long) == 8
1827 && sizeof (long) == 4 ? 1 : -1];
1828 }]
1829 }
1830
1831 # Return 1 if long and int have different sizes,
1832 # 0 otherwise.
1833
1834 proc check_effective_target_long_neq_int { } {
1835 return [check_no_compiler_messages long_ne_int object {
1836 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
1837 }]
1838 }
1839
1840 # Return 1 if the target supports long double larger than double,
1841 # 0 otherwise.
1842
1843 proc check_effective_target_large_long_double { } {
1844 return [check_no_compiler_messages large_long_double object {
1845 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1846 }]
1847 }
1848
1849 # Return 1 if the target supports double larger than float,
1850 # 0 otherwise.
1851
1852 proc check_effective_target_large_double { } {
1853 return [check_no_compiler_messages large_double object {
1854 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
1855 }]
1856 }
1857
1858 # Return 1 if the target supports double of 64 bits,
1859 # 0 otherwise.
1860
1861 proc check_effective_target_double64 { } {
1862 return [check_no_compiler_messages double64 object {
1863 int dummy[sizeof(double) == 8 ? 1 : -1];
1864 }]
1865 }
1866
1867 # Return 1 if the target supports double of at least 64 bits,
1868 # 0 otherwise.
1869
1870 proc check_effective_target_double64plus { } {
1871 return [check_no_compiler_messages double64plus object {
1872 int dummy[sizeof(double) >= 8 ? 1 : -1];
1873 }]
1874 }
1875
1876 # Return 1 if the target supports 'w' suffix on floating constant
1877 # 0 otherwise.
1878
1879 proc check_effective_target_has_w_floating_suffix { } {
1880 set opts ""
1881 if [check_effective_target_c++] {
1882 append opts "-std=gnu++03"
1883 }
1884 return [check_no_compiler_messages w_fp_suffix object {
1885 float dummy = 1.0w;
1886 } "$opts"]
1887 }
1888
1889 # Return 1 if the target supports 'q' suffix on floating constant
1890 # 0 otherwise.
1891
1892 proc check_effective_target_has_q_floating_suffix { } {
1893 set opts ""
1894 if [check_effective_target_c++] {
1895 append opts "-std=gnu++03"
1896 }
1897 return [check_no_compiler_messages q_fp_suffix object {
1898 float dummy = 1.0q;
1899 } "$opts"]
1900 }
1901 # Return 1 if the target supports compiling fixed-point,
1902 # 0 otherwise.
1903
1904 proc check_effective_target_fixed_point { } {
1905 return [check_no_compiler_messages fixed_point object {
1906 _Sat _Fract x; _Sat _Accum y;
1907 }]
1908 }
1909
1910 # Return 1 if the target supports compiling decimal floating point,
1911 # 0 otherwise.
1912
1913 proc check_effective_target_dfp_nocache { } {
1914 verbose "check_effective_target_dfp_nocache: compiling source" 2
1915 set ret [check_no_compiler_messages_nocache dfp object {
1916 float x __attribute__((mode(DD)));
1917 }]
1918 verbose "check_effective_target_dfp_nocache: returning $ret" 2
1919 return $ret
1920 }
1921
1922 proc check_effective_target_dfprt_nocache { } {
1923 return [check_runtime_nocache dfprt {
1924 typedef float d64 __attribute__((mode(DD)));
1925 d64 x = 1.2df, y = 2.3dd, z;
1926 int main () { z = x + y; return 0; }
1927 }]
1928 }
1929
1930 # Return 1 if the target supports compiling Decimal Floating Point,
1931 # 0 otherwise.
1932 #
1933 # This won't change for different subtargets so cache the result.
1934
1935 proc check_effective_target_dfp { } {
1936 return [check_cached_effective_target dfp {
1937 check_effective_target_dfp_nocache
1938 }]
1939 }
1940
1941 # Return 1 if the target supports linking and executing Decimal Floating
1942 # Point, 0 otherwise.
1943 #
1944 # This won't change for different subtargets so cache the result.
1945
1946 proc check_effective_target_dfprt { } {
1947 return [check_cached_effective_target dfprt {
1948 check_effective_target_dfprt_nocache
1949 }]
1950 }
1951
1952 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
1953
1954 proc check_effective_target_ucn_nocache { } {
1955 # -std=c99 is only valid for C
1956 if [check_effective_target_c] {
1957 set ucnopts "-std=c99"
1958 }
1959 append ucnopts " -fextended-identifiers"
1960 verbose "check_effective_target_ucn_nocache: compiling source" 2
1961 set ret [check_no_compiler_messages_nocache ucn object {
1962 int \u00C0;
1963 } $ucnopts]
1964 verbose "check_effective_target_ucn_nocache: returning $ret" 2
1965 return $ret
1966 }
1967
1968 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
1969 #
1970 # This won't change for different subtargets, so cache the result.
1971
1972 proc check_effective_target_ucn { } {
1973 return [check_cached_effective_target ucn {
1974 check_effective_target_ucn_nocache
1975 }]
1976 }
1977
1978 # Return 1 if the target needs a command line argument to enable a SIMD
1979 # instruction set.
1980
1981 proc check_effective_target_vect_cmdline_needed { } {
1982 global et_vect_cmdline_needed_saved
1983 global et_vect_cmdline_needed_target_name
1984
1985 if { ![info exists et_vect_cmdline_needed_target_name] } {
1986 set et_vect_cmdline_needed_target_name ""
1987 }
1988
1989 # If the target has changed since we set the cached value, clear it.
1990 set current_target [current_target_name]
1991 if { $current_target != $et_vect_cmdline_needed_target_name } {
1992 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
1993 set et_vect_cmdline_needed_target_name $current_target
1994 if { [info exists et_vect_cmdline_needed_saved] } {
1995 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
1996 unset et_vect_cmdline_needed_saved
1997 }
1998 }
1999
2000 if [info exists et_vect_cmdline_needed_saved] {
2001 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
2002 } else {
2003 set et_vect_cmdline_needed_saved 1
2004 if { [istarget alpha*-*-*]
2005 || [istarget ia64-*-*]
2006 || (([istarget x86_64-*-*] || [istarget i?86-*-*])
2007 && ([check_effective_target_x32]
2008 || [check_effective_target_lp64]))
2009 || ([istarget powerpc*-*-*]
2010 && ([check_effective_target_powerpc_spe]
2011 || [check_effective_target_powerpc_altivec]))
2012 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
2013 || [istarget spu-*-*]
2014 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
2015 || [istarget aarch64*-*-*] } {
2016 set et_vect_cmdline_needed_saved 0
2017 }
2018 }
2019
2020 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2021 return $et_vect_cmdline_needed_saved
2022 }
2023
2024 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
2025 #
2026 # This won't change for different subtargets so cache the result.
2027
2028 proc check_effective_target_vect_int { } {
2029 global et_vect_int_saved
2030
2031 if [info exists et_vect_int_saved] {
2032 verbose "check_effective_target_vect_int: using cached result" 2
2033 } else {
2034 set et_vect_int_saved 0
2035 if { [istarget i?86-*-*]
2036 || ([istarget powerpc*-*-*]
2037 && ![istarget powerpc-*-linux*paired*])
2038 || [istarget spu-*-*]
2039 || [istarget x86_64-*-*]
2040 || [istarget sparc*-*-*]
2041 || [istarget alpha*-*-*]
2042 || [istarget ia64-*-*]
2043 || [istarget aarch64*-*-*]
2044 || [check_effective_target_arm32]
2045 || ([istarget mips*-*-*]
2046 && [check_effective_target_mips_loongson]) } {
2047 set et_vect_int_saved 1
2048 }
2049 }
2050
2051 verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
2052 return $et_vect_int_saved
2053 }
2054
2055 # Return 1 if the target supports signed int->float conversion
2056 #
2057
2058 proc check_effective_target_vect_intfloat_cvt { } {
2059 global et_vect_intfloat_cvt_saved
2060
2061 if [info exists et_vect_intfloat_cvt_saved] {
2062 verbose "check_effective_target_vect_intfloat_cvt: using cached result" 2
2063 } else {
2064 set et_vect_intfloat_cvt_saved 0
2065 if { [istarget i?86-*-*]
2066 || ([istarget powerpc*-*-*]
2067 && ![istarget powerpc-*-linux*paired*])
2068 || [istarget x86_64-*-*]
2069 || ([istarget arm*-*-*]
2070 && [check_effective_target_arm_neon_ok])} {
2071 set et_vect_intfloat_cvt_saved 1
2072 }
2073 }
2074
2075 verbose "check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
2076 return $et_vect_intfloat_cvt_saved
2077 }
2078
2079 #Return 1 if we're supporting __int128 for target, 0 otherwise.
2080
2081 proc check_effective_target_int128 { } {
2082 return [check_no_compiler_messages int128 object {
2083 int dummy[
2084 #ifndef __SIZEOF_INT128__
2085 -1
2086 #else
2087 1
2088 #endif
2089 ];
2090 }]
2091 }
2092
2093 # Return 1 if the target supports unsigned int->float conversion
2094 #
2095
2096 proc check_effective_target_vect_uintfloat_cvt { } {
2097 global et_vect_uintfloat_cvt_saved
2098
2099 if [info exists et_vect_uintfloat_cvt_saved] {
2100 verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2
2101 } else {
2102 set et_vect_uintfloat_cvt_saved 0
2103 if { [istarget i?86-*-*]
2104 || ([istarget powerpc*-*-*]
2105 && ![istarget powerpc-*-linux*paired*])
2106 || [istarget x86_64-*-*]
2107 || [istarget aarch64*-*-*]
2108 || ([istarget arm*-*-*]
2109 && [check_effective_target_arm_neon_ok])} {
2110 set et_vect_uintfloat_cvt_saved 1
2111 }
2112 }
2113
2114 verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
2115 return $et_vect_uintfloat_cvt_saved
2116 }
2117
2118
2119 # Return 1 if the target supports signed float->int conversion
2120 #
2121
2122 proc check_effective_target_vect_floatint_cvt { } {
2123 global et_vect_floatint_cvt_saved
2124
2125 if [info exists et_vect_floatint_cvt_saved] {
2126 verbose "check_effective_target_vect_floatint_cvt: using cached result" 2
2127 } else {
2128 set et_vect_floatint_cvt_saved 0
2129 if { [istarget i?86-*-*]
2130 || ([istarget powerpc*-*-*]
2131 && ![istarget powerpc-*-linux*paired*])
2132 || [istarget x86_64-*-*]
2133 || ([istarget arm*-*-*]
2134 && [check_effective_target_arm_neon_ok])} {
2135 set et_vect_floatint_cvt_saved 1
2136 }
2137 }
2138
2139 verbose "check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
2140 return $et_vect_floatint_cvt_saved
2141 }
2142
2143 # Return 1 if the target supports unsigned float->int conversion
2144 #
2145
2146 proc check_effective_target_vect_floatuint_cvt { } {
2147 global et_vect_floatuint_cvt_saved
2148
2149 if [info exists et_vect_floatuint_cvt_saved] {
2150 verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2
2151 } else {
2152 set et_vect_floatuint_cvt_saved 0
2153 if { ([istarget powerpc*-*-*]
2154 && ![istarget powerpc-*-linux*paired*])
2155 || ([istarget arm*-*-*]
2156 && [check_effective_target_arm_neon_ok])} {
2157 set et_vect_floatuint_cvt_saved 1
2158 }
2159 }
2160
2161 verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
2162 return $et_vect_floatuint_cvt_saved
2163 }
2164
2165 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
2166 #
2167 # This won't change for different subtargets so cache the result.
2168
2169 proc check_effective_target_vect_simd_clones { } {
2170 global et_vect_simd_clones_saved
2171
2172 if [info exists et_vect_simd_clones_saved] {
2173 verbose "check_effective_target_vect_simd_clones: using cached result" 2
2174 } else {
2175 set et_vect_simd_clones_saved 0
2176 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2177 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx and
2178 # avx2 clone. Only the right clone for the specified arch will be
2179 # chosen, but still we need to at least be able to assemble
2180 # avx2.
2181 if { [check_effective_target_avx2] } {
2182 set et_vect_simd_clones_saved 1
2183 }
2184 }
2185 }
2186
2187 verbose "check_effective_target_vect_simd_clones: returning $et_vect_simd_clones_saved" 2
2188 return $et_vect_simd_clones_saved
2189 }
2190
2191 # Return 1 if this is a AArch64 target supporting big endian
2192 proc check_effective_target_aarch64_big_endian { } {
2193 return [check_no_compiler_messages aarch64_big_endian assembly {
2194 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
2195 #error FOO
2196 #endif
2197 }]
2198 }
2199
2200 # Return 1 if this is a AArch64 target supporting little endian
2201 proc check_effective_target_aarch64_little_endian { } {
2202 return [check_no_compiler_messages aarch64_little_endian assembly {
2203 #if !defined(__aarch64__) || defined(__AARCH64EB__)
2204 #error FOO
2205 #endif
2206 }]
2207 }
2208
2209 # Return 1 is this is an arm target using 32-bit instructions
2210 proc check_effective_target_arm32 { } {
2211 return [check_no_compiler_messages arm32 assembly {
2212 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
2213 #error FOO
2214 #endif
2215 }]
2216 }
2217
2218 # Return 1 is this is an arm target not using Thumb
2219 proc check_effective_target_arm_nothumb { } {
2220 return [check_no_compiler_messages arm_nothumb assembly {
2221 #if (defined(__thumb__) || defined(__thumb2__))
2222 #error FOO
2223 #endif
2224 }]
2225 }
2226
2227 # Return 1 if this is a little-endian ARM target
2228 proc check_effective_target_arm_little_endian { } {
2229 return [check_no_compiler_messages arm_little_endian assembly {
2230 #if !defined(__arm__) || !defined(__ARMEL__)
2231 #error FOO
2232 #endif
2233 }]
2234 }
2235
2236 # Return 1 if this is an ARM target that only supports aligned vector accesses
2237 proc check_effective_target_arm_vect_no_misalign { } {
2238 return [check_no_compiler_messages arm_vect_no_misalign assembly {
2239 #if !defined(__arm__) \
2240 || (defined(__ARMEL__) \
2241 && (!defined(__thumb__) || defined(__thumb2__)))
2242 #error FOO
2243 #endif
2244 }]
2245 }
2246
2247
2248 # Return 1 if this is an ARM target supporting -mfpu=vfp
2249 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
2250 # options.
2251
2252 proc check_effective_target_arm_vfp_ok { } {
2253 if { [check_effective_target_arm32] } {
2254 return [check_no_compiler_messages arm_vfp_ok object {
2255 int dummy;
2256 } "-mfpu=vfp -mfloat-abi=softfp"]
2257 } else {
2258 return 0
2259 }
2260 }
2261
2262 # Return 1 if this is an ARM target supporting -mfpu=vfp3
2263 # -mfloat-abi=softfp.
2264
2265 proc check_effective_target_arm_vfp3_ok { } {
2266 if { [check_effective_target_arm32] } {
2267 return [check_no_compiler_messages arm_vfp3_ok object {
2268 int dummy;
2269 } "-mfpu=vfp3 -mfloat-abi=softfp"]
2270 } else {
2271 return 0
2272 }
2273 }
2274
2275 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
2276 # -mfloat-abi=softfp.
2277 proc check_effective_target_arm_v8_vfp_ok {} {
2278 if { [check_effective_target_arm32] } {
2279 return [check_no_compiler_messages arm_v8_vfp_ok object {
2280 int foo (void)
2281 {
2282 __asm__ volatile ("vrinta.f32.f32 s0, s0");
2283 return 0;
2284 }
2285 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
2286 } else {
2287 return 0
2288 }
2289 }
2290
2291 # Return 1 if this is an ARM target supporting -mfpu=vfp
2292 # -mfloat-abi=hard. Some multilibs may be incompatible with these
2293 # options.
2294
2295 proc check_effective_target_arm_hard_vfp_ok { } {
2296 if { [check_effective_target_arm32]
2297 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
2298 return [check_no_compiler_messages arm_hard_vfp_ok executable {
2299 int main() { return 0;}
2300 } "-mfpu=vfp -mfloat-abi=hard"]
2301 } else {
2302 return 0
2303 }
2304 }
2305
2306 # Return 1 if this is an ARM target that supports DSP multiply with
2307 # current multilib flags.
2308
2309 proc check_effective_target_arm_dsp { } {
2310 return [check_no_compiler_messages arm_dsp assembly {
2311 #ifndef __ARM_FEATURE_DSP
2312 #error not DSP
2313 #endif
2314 int i;
2315 }]
2316 }
2317
2318 # Return 1 if this is an ARM target that supports unaligned word/halfword
2319 # load/store instructions.
2320
2321 proc check_effective_target_arm_unaligned { } {
2322 return [check_no_compiler_messages arm_unaligned assembly {
2323 #ifndef __ARM_FEATURE_UNALIGNED
2324 #error no unaligned support
2325 #endif
2326 int i;
2327 }]
2328 }
2329
2330 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2331 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2332 # incompatible with these options. Also set et_arm_crypto_flags to the
2333 # best options to add.
2334
2335 proc check_effective_target_arm_crypto_ok_nocache { } {
2336 global et_arm_crypto_flags
2337 set et_arm_crypto_flags ""
2338 if { [check_effective_target_arm32] } {
2339 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
2340 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
2341 #include "arm_neon.h"
2342 uint8x16_t
2343 foo (uint8x16_t a, uint8x16_t b)
2344 {
2345 return vaeseq_u8 (a, b);
2346 }
2347 } "$flags"] } {
2348 set et_arm_crypto_flags $flags
2349 return 1
2350 }
2351 }
2352 }
2353
2354 return 0
2355 }
2356
2357 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2358
2359 proc check_effective_target_arm_crypto_ok { } {
2360 return [check_cached_effective_target arm_crypto_ok \
2361 check_effective_target_arm_crypto_ok_nocache]
2362 }
2363
2364 # Add options for crypto extensions.
2365 proc add_options_for_arm_crypto { flags } {
2366 if { ! [check_effective_target_arm_crypto_ok] } {
2367 return "$flags"
2368 }
2369 global et_arm_crypto_flags
2370 return "$flags $et_arm_crypto_flags"
2371 }
2372
2373 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2374 # or -mfloat-abi=hard, but if one is already specified by the
2375 # multilib, use it. Similarly, if a -mfpu option already enables
2376 # NEON, do not add -mfpu=neon.
2377
2378 proc add_options_for_arm_neon { flags } {
2379 if { ! [check_effective_target_arm_neon_ok] } {
2380 return "$flags"
2381 }
2382 global et_arm_neon_flags
2383 return "$flags $et_arm_neon_flags"
2384 }
2385
2386 proc add_options_for_arm_v8_vfp { flags } {
2387 if { ! [check_effective_target_arm_v8_vfp_ok] } {
2388 return "$flags"
2389 }
2390 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
2391 }
2392
2393 proc add_options_for_arm_v8_neon { flags } {
2394 if { ! [check_effective_target_arm_v8_neon_ok] } {
2395 return "$flags"
2396 }
2397 global et_arm_v8_neon_flags
2398 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
2399 }
2400
2401 proc add_options_for_arm_crc { flags } {
2402 if { ! [check_effective_target_arm_crc_ok] } {
2403 return "$flags"
2404 }
2405 global et_arm_crc_flags
2406 return "$flags $et_arm_crc_flags"
2407 }
2408
2409 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2410 # or -mfloat-abi=hard, but if one is already specified by the
2411 # multilib, use it. Similarly, if a -mfpu option already enables
2412 # NEON, do not add -mfpu=neon.
2413
2414 proc add_options_for_arm_neonv2 { flags } {
2415 if { ! [check_effective_target_arm_neonv2_ok] } {
2416 return "$flags"
2417 }
2418 global et_arm_neonv2_flags
2419 return "$flags $et_arm_neonv2_flags"
2420 }
2421
2422 # Add the options needed for vfp3.
2423 proc add_options_for_arm_vfp3 { flags } {
2424 if { ! [check_effective_target_arm_vfp3_ok] } {
2425 return "$flags"
2426 }
2427 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
2428 }
2429
2430 # Return 1 if this is an ARM target supporting -mfpu=neon
2431 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2432 # incompatible with these options. Also set et_arm_neon_flags to the
2433 # best options to add.
2434
2435 proc check_effective_target_arm_neon_ok_nocache { } {
2436 global et_arm_neon_flags
2437 set et_arm_neon_flags ""
2438 if { [check_effective_target_arm32] } {
2439 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp"} {
2440 if { [check_no_compiler_messages_nocache arm_neon_ok object {
2441 #include "arm_neon.h"
2442 int dummy;
2443 } "$flags"] } {
2444 set et_arm_neon_flags $flags
2445 return 1
2446 }
2447 }
2448 }
2449
2450 return 0
2451 }
2452
2453 proc check_effective_target_arm_neon_ok { } {
2454 return [check_cached_effective_target arm_neon_ok \
2455 check_effective_target_arm_neon_ok_nocache]
2456 }
2457
2458 proc check_effective_target_arm_crc_ok_nocache { } {
2459 global et_arm_crc_flags
2460 set et_arm_crc_flags "-march=armv8-a+crc"
2461 return [check_no_compiler_messages_nocache arm_crc_ok object {
2462 #if !defined (__ARM_FEATURE_CRC32)
2463 #error FOO
2464 #endif
2465 } "$et_arm_crc_flags"]
2466 }
2467
2468 proc check_effective_target_arm_crc_ok { } {
2469 return [check_cached_effective_target arm_crc_ok \
2470 check_effective_target_arm_crc_ok_nocache]
2471 }
2472
2473 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
2474 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2475 # incompatible with these options. Also set et_arm_neon_flags to the
2476 # best options to add.
2477
2478 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
2479 global et_arm_neon_fp16_flags
2480 set et_arm_neon_fp16_flags ""
2481 if { [check_effective_target_arm32] } {
2482 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
2483 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
2484 if { [check_no_compiler_messages_nocache arm_neon_fp_16_ok object {
2485 #include "arm_neon.h"
2486 float16x4_t
2487 foo (float32x4_t arg)
2488 {
2489 return vcvt_f16_f32 (arg);
2490 }
2491 } "$flags"] } {
2492 set et_arm_neon_fp16_flags $flags
2493 return 1
2494 }
2495 }
2496 }
2497
2498 return 0
2499 }
2500
2501 proc check_effective_target_arm_neon_fp16_ok { } {
2502 return [check_cached_effective_target arm_neon_fp16_ok \
2503 check_effective_target_arm_neon_fp16_ok_nocache]
2504 }
2505
2506 proc add_options_for_arm_neon_fp16 { flags } {
2507 if { ! [check_effective_target_arm_neon_fp16_ok] } {
2508 return "$flags"
2509 }
2510 global et_arm_neon_fp16_flags
2511 return "$flags $et_arm_neon_fp16_flags"
2512 }
2513
2514 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
2515 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2516 # incompatible with these options. Also set et_arm_v8_neon_flags to the
2517 # best options to add.
2518
2519 proc check_effective_target_arm_v8_neon_ok_nocache { } {
2520 global et_arm_v8_neon_flags
2521 set et_arm_v8_neon_flags ""
2522 if { [check_effective_target_arm32] } {
2523 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
2524 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
2525 #include "arm_neon.h"
2526 void
2527 foo ()
2528 {
2529 __asm__ volatile ("vrintn.f32 q0, q0");
2530 }
2531 } "$flags"] } {
2532 set et_arm_v8_neon_flags $flags
2533 return 1
2534 }
2535 }
2536 }
2537
2538 return 0
2539 }
2540
2541 proc check_effective_target_arm_v8_neon_ok { } {
2542 return [check_cached_effective_target arm_v8_neon_ok \
2543 check_effective_target_arm_v8_neon_ok_nocache]
2544 }
2545
2546 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
2547 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2548 # incompatible with these options. Also set et_arm_neonv2_flags to the
2549 # best options to add.
2550
2551 proc check_effective_target_arm_neonv2_ok_nocache { } {
2552 global et_arm_neonv2_flags
2553 set et_arm_neonv2_flags ""
2554 if { [check_effective_target_arm32] } {
2555 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
2556 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
2557 #include "arm_neon.h"
2558 float32x2_t
2559 foo (float32x2_t a, float32x2_t b, float32x2_t c)
2560 {
2561 return vfma_f32 (a, b, c);
2562 }
2563 } "$flags"] } {
2564 set et_arm_neonv2_flags $flags
2565 return 1
2566 }
2567 }
2568 }
2569
2570 return 0
2571 }
2572
2573 proc check_effective_target_arm_neonv2_ok { } {
2574 return [check_cached_effective_target arm_neonv2_ok \
2575 check_effective_target_arm_neonv2_ok_nocache]
2576 }
2577
2578 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2579 # or -mfloat-abi=hard, but if one is already specified by the
2580 # multilib, use it.
2581
2582 proc add_options_for_arm_fp16 { flags } {
2583 if { ! [check_effective_target_arm_fp16_ok] } {
2584 return "$flags"
2585 }
2586 global et_arm_fp16_flags
2587 return "$flags $et_arm_fp16_flags"
2588 }
2589
2590 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
2591 # Skip multilibs that are incompatible with these options and set
2592 # et_arm_fp16_flags to the best options to add.
2593
2594 proc check_effective_target_arm_fp16_ok_nocache { } {
2595 global et_arm_fp16_flags
2596 set et_arm_fp16_flags ""
2597 if { ! [check_effective_target_arm32] } {
2598 return 0;
2599 }
2600 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
2601 # Multilib flags would override -mfpu.
2602 return 0
2603 }
2604 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
2605 # Must generate floating-point instructions.
2606 return 0
2607 }
2608 if [check_effective_target_arm_hf_eabi] {
2609 # Use existing float-abi and force an fpu which supports fp16
2610 set et_arm_fp16_flags "-mfpu=vfpv4"
2611 return 1;
2612 }
2613 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
2614 # The existing -mfpu value is OK; use it, but add softfp.
2615 set et_arm_fp16_flags "-mfloat-abi=softfp"
2616 return 1;
2617 }
2618 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
2619 # macro to check for this support.
2620 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
2621 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
2622 int dummy;
2623 } "$flags"] } {
2624 set et_arm_fp16_flags "$flags"
2625 return 1
2626 }
2627
2628 return 0
2629 }
2630
2631 proc check_effective_target_arm_fp16_ok { } {
2632 return [check_cached_effective_target arm_fp16_ok \
2633 check_effective_target_arm_fp16_ok_nocache]
2634 }
2635
2636 # Creates a series of routines that return 1 if the given architecture
2637 # can be selected and a routine to give the flags to select that architecture
2638 # Note: Extra flags may be added to disable options from newer compilers
2639 # (Thumb in particular - but others may be added in the future)
2640 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
2641 # /* { dg-add-options arm_arch_v5 } */
2642 # /* { dg-require-effective-target arm_arch_v5_multilib } */
2643 foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
2644 v4t "-march=armv4t" __ARM_ARCH_4T__
2645 v5 "-march=armv5 -marm" __ARM_ARCH_5__
2646 v5t "-march=armv5t" __ARM_ARCH_5T__
2647 v5te "-march=armv5te" __ARM_ARCH_5TE__
2648 v6 "-march=armv6" __ARM_ARCH_6__
2649 v6k "-march=armv6k" __ARM_ARCH_6K__
2650 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
2651 v6z "-march=armv6z" __ARM_ARCH_6Z__
2652 v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
2653 v7a "-march=armv7-a" __ARM_ARCH_7A__
2654 v7ve "-march=armv7ve" __ARM_ARCH_7A__
2655 v7r "-march=armv7-r" __ARM_ARCH_7R__
2656 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
2657 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
2658 v8a "-march=armv8-a" __ARM_ARCH_8A__ } {
2659 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
2660 proc check_effective_target_arm_arch_FUNC_ok { } {
2661 if { [ string match "*-marm*" "FLAG" ] &&
2662 ![check_effective_target_arm_arm_ok] } {
2663 return 0
2664 }
2665 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
2666 #if !defined (DEF)
2667 #error FOO
2668 #endif
2669 } "FLAG" ]
2670 }
2671
2672 proc add_options_for_arm_arch_FUNC { flags } {
2673 return "$flags FLAG"
2674 }
2675
2676 proc check_effective_target_arm_arch_FUNC_multilib { } {
2677 return [check_runtime arm_arch_FUNC_multilib {
2678 int
2679 main (void)
2680 {
2681 return 0;
2682 }
2683 } [add_options_for_arm_arch_FUNC ""]]
2684 }
2685 }]
2686 }
2687
2688 # Return 1 if this is an ARM target where -marm causes ARM to be
2689 # used (not Thumb)
2690
2691 proc check_effective_target_arm_arm_ok { } {
2692 return [check_no_compiler_messages arm_arm_ok assembly {
2693 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
2694 #error FOO
2695 #endif
2696 } "-marm"]
2697 }
2698
2699
2700 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
2701 # used.
2702
2703 proc check_effective_target_arm_thumb1_ok { } {
2704 return [check_no_compiler_messages arm_thumb1_ok assembly {
2705 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
2706 #error FOO
2707 #endif
2708 } "-mthumb"]
2709 }
2710
2711 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
2712 # used.
2713
2714 proc check_effective_target_arm_thumb2_ok { } {
2715 return [check_no_compiler_messages arm_thumb2_ok assembly {
2716 #if !defined(__thumb2__)
2717 #error FOO
2718 #endif
2719 } "-mthumb"]
2720 }
2721
2722 # Return 1 if this is an ARM target where Thumb-1 is used without options
2723 # added by the test.
2724
2725 proc check_effective_target_arm_thumb1 { } {
2726 return [check_no_compiler_messages arm_thumb1 assembly {
2727 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
2728 #error not thumb1
2729 #endif
2730 int i;
2731 } ""]
2732 }
2733
2734 # Return 1 if this is an ARM target where Thumb-2 is used without options
2735 # added by the test.
2736
2737 proc check_effective_target_arm_thumb2 { } {
2738 return [check_no_compiler_messages arm_thumb2 assembly {
2739 #if !defined(__thumb2__)
2740 #error FOO
2741 #endif
2742 int i;
2743 } ""]
2744 }
2745
2746 # Return 1 if this is an ARM target where conditional execution is available.
2747
2748 proc check_effective_target_arm_cond_exec { } {
2749 return [check_no_compiler_messages arm_cond_exec assembly {
2750 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
2751 #error FOO
2752 #endif
2753 int i;
2754 } ""]
2755 }
2756
2757 # Return 1 if this is an ARM cortex-M profile cpu
2758
2759 proc check_effective_target_arm_cortex_m { } {
2760 return [check_no_compiler_messages arm_cortex_m assembly {
2761 #if !defined(__ARM_ARCH_7M__) \
2762 && !defined (__ARM_ARCH_7EM__) \
2763 && !defined (__ARM_ARCH_6M__)
2764 #error FOO
2765 #endif
2766 int i;
2767 } "-mthumb"]
2768 }
2769
2770 # Return 1 if the target supports executing NEON instructions, 0
2771 # otherwise. Cache the result.
2772
2773 proc check_effective_target_arm_neon_hw { } {
2774 return [check_runtime arm_neon_hw_available {
2775 int
2776 main (void)
2777 {
2778 long long a = 0, b = 1;
2779 asm ("vorr %P0, %P1, %P2"
2780 : "=w" (a)
2781 : "0" (a), "w" (b));
2782 return (a != 1);
2783 }
2784 } [add_options_for_arm_neon ""]]
2785 }
2786
2787 proc check_effective_target_arm_neonv2_hw { } {
2788 return [check_runtime arm_neon_hwv2_available {
2789 #include "arm_neon.h"
2790 int
2791 main (void)
2792 {
2793 float32x2_t a, b, c;
2794 asm ("vfma.f32 %P0, %P1, %P2"
2795 : "=w" (a)
2796 : "w" (b), "w" (c));
2797 return 0;
2798 }
2799 } [add_options_for_arm_neonv2 ""]]
2800 }
2801
2802 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
2803 # otherwise.
2804
2805 proc check_effective_target_arm_v8_neon_hw { } {
2806 return [check_runtime arm_v8_neon_hw_available {
2807 #include "arm_neon.h"
2808 int
2809 main (void)
2810 {
2811 float32x2_t a;
2812 asm ("vrinta.f32 %P0, %P1"
2813 : "=w" (a)
2814 : "0" (a));
2815 return 0;
2816 }
2817 } [add_options_for_arm_v8_neon ""]]
2818 }
2819
2820 # Return 1 if this is a ARM target with NEON enabled.
2821
2822 proc check_effective_target_arm_neon { } {
2823 if { [check_effective_target_arm32] } {
2824 return [check_no_compiler_messages arm_neon object {
2825 #ifndef __ARM_NEON__
2826 #error not NEON
2827 #else
2828 int dummy;
2829 #endif
2830 }]
2831 } else {
2832 return 0
2833 }
2834 }
2835
2836 proc check_effective_target_arm_neonv2 { } {
2837 if { [check_effective_target_arm32] } {
2838 return [check_no_compiler_messages arm_neon object {
2839 #ifndef __ARM_NEON__
2840 #error not NEON
2841 #else
2842 #ifndef __ARM_FEATURE_FMA
2843 #error not NEONv2
2844 #else
2845 int dummy;
2846 #endif
2847 #endif
2848 }]
2849 } else {
2850 return 0
2851 }
2852 }
2853
2854 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
2855 # the Loongson vector modes.
2856
2857 proc check_effective_target_mips_loongson { } {
2858 return [check_no_compiler_messages loongson assembly {
2859 #if !defined(__mips_loongson_vector_rev)
2860 #error FOO
2861 #endif
2862 }]
2863 }
2864
2865 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
2866 # Architecture.
2867
2868 proc check_effective_target_arm_eabi { } {
2869 return [check_no_compiler_messages arm_eabi object {
2870 #ifndef __ARM_EABI__
2871 #error not EABI
2872 #else
2873 int dummy;
2874 #endif
2875 }]
2876 }
2877
2878 # Return 1 if this is an ARM target that adheres to the hard-float variant of
2879 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
2880
2881 proc check_effective_target_arm_hf_eabi { } {
2882 return [check_no_compiler_messages arm_hf_eabi object {
2883 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
2884 #error not hard-float EABI
2885 #else
2886 int dummy;
2887 #endif
2888 }]
2889 }
2890
2891 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
2892 # Some multilibs may be incompatible with this option.
2893
2894 proc check_effective_target_arm_iwmmxt_ok { } {
2895 if { [check_effective_target_arm32] } {
2896 return [check_no_compiler_messages arm_iwmmxt_ok object {
2897 int dummy;
2898 } "-mcpu=iwmmxt"]
2899 } else {
2900 return 0
2901 }
2902 }
2903
2904 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
2905 # for an ARM target.
2906 proc check_effective_target_arm_prefer_ldrd_strd { } {
2907 if { ![check_effective_target_arm32] } {
2908 return 0;
2909 }
2910
2911 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
2912 void foo (int *p) { p[0] = 1; p[1] = 0;}
2913 } "-O2 -mthumb" ]
2914 }
2915
2916 # Return 1 if this is a PowerPC target supporting -meabi.
2917
2918 proc check_effective_target_powerpc_eabi_ok { } {
2919 if { [istarget powerpc*-*-*] } {
2920 return [check_no_compiler_messages powerpc_eabi_ok object {
2921 int dummy;
2922 } "-meabi"]
2923 } else {
2924 return 0
2925 }
2926 }
2927
2928 # Return 1 if this is a PowerPC target with floating-point registers.
2929
2930 proc check_effective_target_powerpc_fprs { } {
2931 if { [istarget powerpc*-*-*]
2932 || [istarget rs6000-*-*] } {
2933 return [check_no_compiler_messages powerpc_fprs object {
2934 #ifdef __NO_FPRS__
2935 #error no FPRs
2936 #else
2937 int dummy;
2938 #endif
2939 }]
2940 } else {
2941 return 0
2942 }
2943 }
2944
2945 # Return 1 if this is a PowerPC target with hardware double-precision
2946 # floating point.
2947
2948 proc check_effective_target_powerpc_hard_double { } {
2949 if { [istarget powerpc*-*-*]
2950 || [istarget rs6000-*-*] } {
2951 return [check_no_compiler_messages powerpc_hard_double object {
2952 #ifdef _SOFT_DOUBLE
2953 #error soft double
2954 #else
2955 int dummy;
2956 #endif
2957 }]
2958 } else {
2959 return 0
2960 }
2961 }
2962
2963 # Return 1 if this is a PowerPC target supporting -maltivec.
2964
2965 proc check_effective_target_powerpc_altivec_ok { } {
2966 if { ([istarget powerpc*-*-*]
2967 && ![istarget powerpc-*-linux*paired*])
2968 || [istarget rs6000-*-*] } {
2969 # AltiVec is not supported on AIX before 5.3.
2970 if { [istarget powerpc*-*-aix4*]
2971 || [istarget powerpc*-*-aix5.1*]
2972 || [istarget powerpc*-*-aix5.2*] } {
2973 return 0
2974 }
2975 return [check_no_compiler_messages powerpc_altivec_ok object {
2976 int dummy;
2977 } "-maltivec"]
2978 } else {
2979 return 0
2980 }
2981 }
2982
2983 # Return 1 if this is a PowerPC target supporting -mpower8-vector
2984
2985 proc check_effective_target_powerpc_p8vector_ok { } {
2986 if { ([istarget powerpc*-*-*]
2987 && ![istarget powerpc-*-linux*paired*])
2988 || [istarget rs6000-*-*] } {
2989 # AltiVec is not supported on AIX before 5.3.
2990 if { [istarget powerpc*-*-aix4*]
2991 || [istarget powerpc*-*-aix5.1*]
2992 || [istarget powerpc*-*-aix5.2*] } {
2993 return 0
2994 }
2995 return [check_no_compiler_messages powerpc_p8vector_ok object {
2996 int main (void) {
2997 #ifdef __MACH__
2998 asm volatile ("xxlorc vs0,vs0,vs0");
2999 #else
3000 asm volatile ("xxlorc 0,0,0");
3001 #endif
3002 return 0;
3003 }
3004 } "-mpower8-vector"]
3005 } else {
3006 return 0
3007 }
3008 }
3009
3010 # Return 1 if this is a PowerPC target supporting -mvsx
3011
3012 proc check_effective_target_powerpc_vsx_ok { } {
3013 if { ([istarget powerpc*-*-*]
3014 && ![istarget powerpc-*-linux*paired*])
3015 || [istarget rs6000-*-*] } {
3016 # VSX is not supported on AIX before 7.1.
3017 if { [istarget powerpc*-*-aix4*]
3018 || [istarget powerpc*-*-aix5*]
3019 || [istarget powerpc*-*-aix6*] } {
3020 return 0
3021 }
3022 return [check_no_compiler_messages powerpc_vsx_ok object {
3023 int main (void) {
3024 #ifdef __MACH__
3025 asm volatile ("xxlor vs0,vs0,vs0");
3026 #else
3027 asm volatile ("xxlor 0,0,0");
3028 #endif
3029 return 0;
3030 }
3031 } "-mvsx"]
3032 } else {
3033 return 0
3034 }
3035 }
3036
3037 # Return 1 if this is a PowerPC target supporting -mhtm
3038
3039 proc check_effective_target_powerpc_htm_ok { } {
3040 if { ([istarget powerpc*-*-*]
3041 && ![istarget powerpc-*-linux*paired*])
3042 || [istarget rs6000-*-*] } {
3043 # HTM is not supported on AIX yet.
3044 if { [istarget powerpc*-*-aix*] } {
3045 return 0
3046 }
3047 return [check_no_compiler_messages powerpc_htm_ok object {
3048 int main (void) {
3049 asm volatile ("tbegin. 0");
3050 return 0;
3051 }
3052 } "-mhtm"]
3053 } else {
3054 return 0
3055 }
3056 }
3057
3058 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
3059
3060 proc check_effective_target_powerpc_ppu_ok { } {
3061 if [check_effective_target_powerpc_altivec_ok] {
3062 return [check_no_compiler_messages cell_asm_available object {
3063 int main (void) {
3064 #ifdef __MACH__
3065 asm volatile ("lvlx v0,v0,v0");
3066 #else
3067 asm volatile ("lvlx 0,0,0");
3068 #endif
3069 return 0;
3070 }
3071 }]
3072 } else {
3073 return 0
3074 }
3075 }
3076
3077 # Return 1 if this is a PowerPC target that supports SPU.
3078
3079 proc check_effective_target_powerpc_spu { } {
3080 if { [istarget powerpc*-*-linux*] } {
3081 return [check_effective_target_powerpc_altivec_ok]
3082 } else {
3083 return 0
3084 }
3085 }
3086
3087 # Return 1 if this is a PowerPC SPE target. The check includes options
3088 # specified by dg-options for this test, so don't cache the result.
3089
3090 proc check_effective_target_powerpc_spe_nocache { } {
3091 if { [istarget powerpc*-*-*] } {
3092 return [check_no_compiler_messages_nocache powerpc_spe object {
3093 #ifndef __SPE__
3094 #error not SPE
3095 #else
3096 int dummy;
3097 #endif
3098 } [current_compiler_flags]]
3099 } else {
3100 return 0
3101 }
3102 }
3103
3104 # Return 1 if this is a PowerPC target with SPE enabled.
3105
3106 proc check_effective_target_powerpc_spe { } {
3107 if { [istarget powerpc*-*-*] } {
3108 return [check_no_compiler_messages powerpc_spe object {
3109 #ifndef __SPE__
3110 #error not SPE
3111 #else
3112 int dummy;
3113 #endif
3114 }]
3115 } else {
3116 return 0
3117 }
3118 }
3119
3120 # Return 1 if this is a PowerPC target with Altivec enabled.
3121
3122 proc check_effective_target_powerpc_altivec { } {
3123 if { [istarget powerpc*-*-*] } {
3124 return [check_no_compiler_messages powerpc_altivec object {
3125 #ifndef __ALTIVEC__
3126 #error not Altivec
3127 #else
3128 int dummy;
3129 #endif
3130 }]
3131 } else {
3132 return 0
3133 }
3134 }
3135
3136 # Return 1 if this is a PowerPC 405 target. The check includes options
3137 # specified by dg-options for this test, so don't cache the result.
3138
3139 proc check_effective_target_powerpc_405_nocache { } {
3140 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
3141 return [check_no_compiler_messages_nocache powerpc_405 object {
3142 #ifdef __PPC405__
3143 int dummy;
3144 #else
3145 #error not a PPC405
3146 #endif
3147 } [current_compiler_flags]]
3148 } else {
3149 return 0
3150 }
3151 }
3152
3153 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
3154
3155 proc check_effective_target_powerpc_elfv2 { } {
3156 if { [istarget powerpc*-*-*] } {
3157 return [check_no_compiler_messages powerpc_elfv2 object {
3158 #if _CALL_ELF != 2
3159 #error not ELF v2 ABI
3160 #else
3161 int dummy;
3162 #endif
3163 }]
3164 } else {
3165 return 0
3166 }
3167 }
3168
3169 # Return 1 if this is a SPU target with a toolchain that
3170 # supports automatic overlay generation.
3171
3172 proc check_effective_target_spu_auto_overlay { } {
3173 if { [istarget spu*-*-elf*] } {
3174 return [check_no_compiler_messages spu_auto_overlay executable {
3175 int main (void) { }
3176 } "-Wl,--auto-overlay" ]
3177 } else {
3178 return 0
3179 }
3180 }
3181
3182 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
3183 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
3184 # test environment appears to run executables on such a simulator.
3185
3186 proc check_effective_target_ultrasparc_hw { } {
3187 return [check_runtime ultrasparc_hw {
3188 int main() { return 0; }
3189 } "-mcpu=ultrasparc"]
3190 }
3191
3192 # Return 1 if the test environment supports executing UltraSPARC VIS2
3193 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
3194
3195 proc check_effective_target_ultrasparc_vis2_hw { } {
3196 return [check_runtime ultrasparc_vis2_hw {
3197 int main() { __asm__(".word 0x81b00320"); return 0; }
3198 } "-mcpu=ultrasparc3"]
3199 }
3200
3201 # Return 1 if the test environment supports executing UltraSPARC VIS3
3202 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
3203
3204 proc check_effective_target_ultrasparc_vis3_hw { } {
3205 return [check_runtime ultrasparc_vis3_hw {
3206 int main() { __asm__(".word 0x81b00220"); return 0; }
3207 } "-mcpu=niagara3"]
3208 }
3209
3210 # Return 1 if this is a SPARC-V9 target.
3211
3212 proc check_effective_target_sparc_v9 { } {
3213 if { [istarget sparc*-*-*] } {
3214 return [check_no_compiler_messages sparc_v9 object {
3215 int main (void) {
3216 asm volatile ("return %i7+8");
3217 return 0;
3218 }
3219 }]
3220 } else {
3221 return 0
3222 }
3223 }
3224
3225 # Return 1 if this is a SPARC target with VIS enabled.
3226
3227 proc check_effective_target_sparc_vis { } {
3228 if { [istarget sparc*-*-*] } {
3229 return [check_no_compiler_messages sparc_vis object {
3230 #ifndef __VIS__
3231 #error not VIS
3232 #else
3233 int dummy;
3234 #endif
3235 }]
3236 } else {
3237 return 0
3238 }
3239 }
3240
3241 # Return 1 if the target supports hardware vector shift operation.
3242
3243 proc check_effective_target_vect_shift { } {
3244 global et_vect_shift_saved
3245
3246 if [info exists et_vect_shift_saved] {
3247 verbose "check_effective_target_vect_shift: using cached result" 2
3248 } else {
3249 set et_vect_shift_saved 0
3250 if { ([istarget powerpc*-*-*]
3251 && ![istarget powerpc-*-linux*paired*])
3252 || [istarget ia64-*-*]
3253 || [istarget i?86-*-*]
3254 || [istarget x86_64-*-*]
3255 || [istarget aarch64*-*-*]
3256 || [check_effective_target_arm32]
3257 || ([istarget mips*-*-*]
3258 && [check_effective_target_mips_loongson]) } {
3259 set et_vect_shift_saved 1
3260 }
3261 }
3262
3263 verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
3264 return $et_vect_shift_saved
3265 }
3266
3267 # Return 1 if the target supports hardware vector shift operation for char.
3268
3269 proc check_effective_target_vect_shift_char { } {
3270 global et_vect_shift_char_saved
3271
3272 if [info exists et_vect_shift_char_saved] {
3273 verbose "check_effective_target_vect_shift_char: using cached result" 2
3274 } else {
3275 set et_vect_shift_char_saved 0
3276 if { ([istarget powerpc*-*-*]
3277 && ![istarget powerpc-*-linux*paired*])
3278 || [check_effective_target_arm32] } {
3279 set et_vect_shift_char_saved 1
3280 }
3281 }
3282
3283 verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
3284 return $et_vect_shift_char_saved
3285 }
3286
3287 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
3288 #
3289 # This can change for different subtargets so do not cache the result.
3290
3291 proc check_effective_target_vect_long { } {
3292 if { [istarget i?86-*-*]
3293 || (([istarget powerpc*-*-*]
3294 && ![istarget powerpc-*-linux*paired*])
3295 && [check_effective_target_ilp32])
3296 || [istarget x86_64-*-*]
3297 || [check_effective_target_arm32]
3298 || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } {
3299 set answer 1
3300 } else {
3301 set answer 0
3302 }
3303
3304 verbose "check_effective_target_vect_long: returning $answer" 2
3305 return $answer
3306 }
3307
3308 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
3309 #
3310 # This won't change for different subtargets so cache the result.
3311
3312 proc check_effective_target_vect_float { } {
3313 global et_vect_float_saved
3314
3315 if [info exists et_vect_float_saved] {
3316 verbose "check_effective_target_vect_float: using cached result" 2
3317 } else {
3318 set et_vect_float_saved 0
3319 if { [istarget i?86-*-*]
3320 || [istarget powerpc*-*-*]
3321 || [istarget spu-*-*]
3322 || [istarget mips-sde-elf]
3323 || [istarget mipsisa64*-*-*]
3324 || [istarget x86_64-*-*]
3325 || [istarget ia64-*-*]
3326 || [istarget aarch64*-*-*]
3327 || [check_effective_target_arm32] } {
3328 set et_vect_float_saved 1
3329 }
3330 }
3331
3332 verbose "check_effective_target_vect_float: returning $et_vect_float_saved" 2
3333 return $et_vect_float_saved
3334 }
3335
3336 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
3337 #
3338 # This won't change for different subtargets so cache the result.
3339
3340 proc check_effective_target_vect_double { } {
3341 global et_vect_double_saved
3342
3343 if [info exists et_vect_double_saved] {
3344 verbose "check_effective_target_vect_double: using cached result" 2
3345 } else {
3346 set et_vect_double_saved 0
3347 if { [istarget i?86-*-*]
3348 || [istarget aarch64*-*-*]
3349 || [istarget x86_64-*-*] } {
3350 if { [check_no_compiler_messages vect_double assembly {
3351 #ifdef __tune_atom__
3352 # error No double vectorizer support.
3353 #endif
3354 }] } {
3355 set et_vect_double_saved 1
3356 } else {
3357 set et_vect_double_saved 0
3358 }
3359 } elseif { [istarget spu-*-*] } {
3360 set et_vect_double_saved 1
3361 }
3362 }
3363
3364 verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
3365 return $et_vect_double_saved
3366 }
3367
3368 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
3369 #
3370 # This won't change for different subtargets so cache the result.
3371
3372 proc check_effective_target_vect_long_long { } {
3373 global et_vect_long_long_saved
3374
3375 if [info exists et_vect_long_long_saved] {
3376 verbose "check_effective_target_vect_long_long: using cached result" 2
3377 } else {
3378 set et_vect_long_long_saved 0
3379 if { [istarget i?86-*-*]
3380 || [istarget x86_64-*-*] } {
3381 set et_vect_long_long_saved 1
3382 }
3383 }
3384
3385 verbose "check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
3386 return $et_vect_long_long_saved
3387 }
3388
3389
3390 # Return 1 if the target plus current options does not support a vector
3391 # max instruction on "int", 0 otherwise.
3392 #
3393 # This won't change for different subtargets so cache the result.
3394
3395 proc check_effective_target_vect_no_int_max { } {
3396 global et_vect_no_int_max_saved
3397
3398 if [info exists et_vect_no_int_max_saved] {
3399 verbose "check_effective_target_vect_no_int_max: using cached result" 2
3400 } else {
3401 set et_vect_no_int_max_saved 0
3402 if { [istarget sparc*-*-*]
3403 || [istarget spu-*-*]
3404 || [istarget alpha*-*-*]
3405 || ([istarget mips*-*-*]
3406 && [check_effective_target_mips_loongson]) } {
3407 set et_vect_no_int_max_saved 1
3408 }
3409 }
3410 verbose "check_effective_target_vect_no_int_max: returning $et_vect_no_int_max_saved" 2
3411 return $et_vect_no_int_max_saved
3412 }
3413
3414 # Return 1 if the target plus current options does not support a vector
3415 # add instruction on "int", 0 otherwise.
3416 #
3417 # This won't change for different subtargets so cache the result.
3418
3419 proc check_effective_target_vect_no_int_add { } {
3420 global et_vect_no_int_add_saved
3421
3422 if [info exists et_vect_no_int_add_saved] {
3423 verbose "check_effective_target_vect_no_int_add: using cached result" 2
3424 } else {
3425 set et_vect_no_int_add_saved 0
3426 # Alpha only supports vector add on V8QI and V4HI.
3427 if { [istarget alpha*-*-*] } {
3428 set et_vect_no_int_add_saved 1
3429 }
3430 }
3431 verbose "check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
3432 return $et_vect_no_int_add_saved
3433 }
3434
3435 # Return 1 if the target plus current options does not support vector
3436 # bitwise instructions, 0 otherwise.
3437 #
3438 # This won't change for different subtargets so cache the result.
3439
3440 proc check_effective_target_vect_no_bitwise { } {
3441 global et_vect_no_bitwise_saved
3442
3443 if [info exists et_vect_no_bitwise_saved] {
3444 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
3445 } else {
3446 set et_vect_no_bitwise_saved 0
3447 }
3448 verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
3449 return $et_vect_no_bitwise_saved
3450 }
3451
3452 # Return 1 if the target plus current options supports vector permutation,
3453 # 0 otherwise.
3454 #
3455 # This won't change for different subtargets so cache the result.
3456
3457 proc check_effective_target_vect_perm { } {
3458 global et_vect_perm
3459
3460 if [info exists et_vect_perm_saved] {
3461 verbose "check_effective_target_vect_perm: using cached result" 2
3462 } else {
3463 set et_vect_perm_saved 0
3464 if { [is-effective-target arm_neon_ok]
3465 || ([istarget aarch64*-*-*]
3466 && [is-effective-target aarch64_little_endian])
3467 || [istarget powerpc*-*-*]
3468 || [istarget spu-*-*]
3469 || [istarget i?86-*-*]
3470 || [istarget x86_64-*-*]
3471 || ([istarget mips*-*-*]
3472 && [check_effective_target_mpaired_single]) } {
3473 set et_vect_perm_saved 1
3474 }
3475 }
3476 verbose "check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
3477 return $et_vect_perm_saved
3478 }
3479
3480 # Return 1 if the target plus current options supports vector permutation
3481 # on byte-sized elements, 0 otherwise.
3482 #
3483 # This won't change for different subtargets so cache the result.
3484
3485 proc check_effective_target_vect_perm_byte { } {
3486 global et_vect_perm_byte
3487
3488 if [info exists et_vect_perm_byte_saved] {
3489 verbose "check_effective_target_vect_perm_byte: using cached result" 2
3490 } else {
3491 set et_vect_perm_byte_saved 0
3492 if { ([is-effective-target arm_neon_ok]
3493 && [is-effective-target arm_little_endian])
3494 || ([istarget aarch64*-*-*]
3495 && [is-effective-target aarch64_little_endian])
3496 || [istarget powerpc*-*-*]
3497 || [istarget spu-*-*] } {
3498 set et_vect_perm_byte_saved 1
3499 }
3500 }
3501 verbose "check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
3502 return $et_vect_perm_byte_saved
3503 }
3504
3505 # Return 1 if the target plus current options supports vector permutation
3506 # on short-sized elements, 0 otherwise.
3507 #
3508 # This won't change for different subtargets so cache the result.
3509
3510 proc check_effective_target_vect_perm_short { } {
3511 global et_vect_perm_short
3512
3513 if [info exists et_vect_perm_short_saved] {
3514 verbose "check_effective_target_vect_perm_short: using cached result" 2
3515 } else {
3516 set et_vect_perm_short_saved 0
3517 if { ([is-effective-target arm_neon_ok]
3518 && [is-effective-target arm_little_endian])
3519 || ([istarget aarch64*-*-*]
3520 && [is-effective-target aarch64_little_endian])
3521 || [istarget powerpc*-*-*]
3522 || [istarget spu-*-*] } {
3523 set et_vect_perm_short_saved 1
3524 }
3525 }
3526 verbose "check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
3527 return $et_vect_perm_short_saved
3528 }
3529
3530 # Return 1 if the target plus current options supports a vector
3531 # widening summation of *short* args into *int* result, 0 otherwise.
3532 #
3533 # This won't change for different subtargets so cache the result.
3534
3535 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
3536 global et_vect_widen_sum_hi_to_si_pattern
3537
3538 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved] {
3539 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
3540 } else {
3541 set et_vect_widen_sum_hi_to_si_pattern_saved 0
3542 if { [istarget powerpc*-*-*]
3543 || [istarget ia64-*-*] } {
3544 set et_vect_widen_sum_hi_to_si_pattern_saved 1
3545 }
3546 }
3547 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
3548 return $et_vect_widen_sum_hi_to_si_pattern_saved
3549 }
3550
3551 # Return 1 if the target plus current options supports a vector
3552 # widening summation of *short* args into *int* result, 0 otherwise.
3553 # A target can also support this widening summation if it can support
3554 # promotion (unpacking) from shorts to ints.
3555 #
3556 # This won't change for different subtargets so cache the result.
3557
3558 proc check_effective_target_vect_widen_sum_hi_to_si { } {
3559 global et_vect_widen_sum_hi_to_si
3560
3561 if [info exists et_vect_widen_sum_hi_to_si_saved] {
3562 verbose "check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
3563 } else {
3564 set et_vect_widen_sum_hi_to_si_saved [check_effective_target_vect_unpack]
3565 if { [istarget powerpc*-*-*]
3566 || [istarget ia64-*-*] } {
3567 set et_vect_widen_sum_hi_to_si_saved 1
3568 }
3569 }
3570 verbose "check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
3571 return $et_vect_widen_sum_hi_to_si_saved
3572 }
3573
3574 # Return 1 if the target plus current options supports a vector
3575 # widening summation of *char* args into *short* result, 0 otherwise.
3576 # A target can also support this widening summation if it can support
3577 # promotion (unpacking) from chars to shorts.
3578 #
3579 # This won't change for different subtargets so cache the result.
3580
3581 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
3582 global et_vect_widen_sum_qi_to_hi
3583
3584 if [info exists et_vect_widen_sum_qi_to_hi_saved] {
3585 verbose "check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
3586 } else {
3587 set et_vect_widen_sum_qi_to_hi_saved 0
3588 if { [check_effective_target_vect_unpack]
3589 || [check_effective_target_arm_neon_ok]
3590 || [istarget ia64-*-*] } {
3591 set et_vect_widen_sum_qi_to_hi_saved 1
3592 }
3593 }
3594 verbose "check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
3595 return $et_vect_widen_sum_qi_to_hi_saved
3596 }
3597
3598 # Return 1 if the target plus current options supports a vector
3599 # widening summation of *char* args into *int* result, 0 otherwise.
3600 #
3601 # This won't change for different subtargets so cache the result.
3602
3603 proc check_effective_target_vect_widen_sum_qi_to_si { } {
3604 global et_vect_widen_sum_qi_to_si
3605
3606 if [info exists et_vect_widen_sum_qi_to_si_saved] {
3607 verbose "check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
3608 } else {
3609 set et_vect_widen_sum_qi_to_si_saved 0
3610 if { [istarget powerpc*-*-*] } {
3611 set et_vect_widen_sum_qi_to_si_saved 1
3612 }
3613 }
3614 verbose "check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
3615 return $et_vect_widen_sum_qi_to_si_saved
3616 }
3617
3618 # Return 1 if the target plus current options supports a vector
3619 # widening multiplication of *char* args into *short* result, 0 otherwise.
3620 # A target can also support this widening multplication if it can support
3621 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
3622 # multiplication of shorts).
3623 #
3624 # This won't change for different subtargets so cache the result.
3625
3626
3627 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
3628 global et_vect_widen_mult_qi_to_hi
3629
3630 if [info exists et_vect_widen_mult_qi_to_hi_saved] {
3631 verbose "check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
3632 } else {
3633 if { [check_effective_target_vect_unpack]
3634 && [check_effective_target_vect_short_mult] } {
3635 set et_vect_widen_mult_qi_to_hi_saved 1
3636 } else {
3637 set et_vect_widen_mult_qi_to_hi_saved 0
3638 }
3639 if { [istarget powerpc*-*-*]
3640 || [istarget aarch64*-*-*]
3641 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
3642 set et_vect_widen_mult_qi_to_hi_saved 1
3643 }
3644 }
3645 verbose "check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
3646 return $et_vect_widen_mult_qi_to_hi_saved
3647 }
3648
3649 # Return 1 if the target plus current options supports a vector
3650 # widening multiplication of *short* args into *int* result, 0 otherwise.
3651 # A target can also support this widening multplication if it can support
3652 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
3653 # multiplication of ints).
3654 #
3655 # This won't change for different subtargets so cache the result.
3656
3657
3658 proc check_effective_target_vect_widen_mult_hi_to_si { } {
3659 global et_vect_widen_mult_hi_to_si
3660
3661 if [info exists et_vect_widen_mult_hi_to_si_saved] {
3662 verbose "check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
3663 } else {
3664 if { [check_effective_target_vect_unpack]
3665 && [check_effective_target_vect_int_mult] } {
3666 set et_vect_widen_mult_hi_to_si_saved 1
3667 } else {
3668 set et_vect_widen_mult_hi_to_si_saved 0
3669 }
3670 if { [istarget powerpc*-*-*]
3671 || [istarget spu-*-*]
3672 || [istarget ia64-*-*]
3673 || [istarget aarch64*-*-*]
3674 || [istarget i?86-*-*]
3675 || [istarget x86_64-*-*]
3676 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
3677 set et_vect_widen_mult_hi_to_si_saved 1
3678 }
3679 }
3680 verbose "check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
3681 return $et_vect_widen_mult_hi_to_si_saved
3682 }
3683
3684 # Return 1 if the target plus current options supports a vector
3685 # widening multiplication of *char* args into *short* result, 0 otherwise.
3686 #
3687 # This won't change for different subtargets so cache the result.
3688
3689 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
3690 global et_vect_widen_mult_qi_to_hi_pattern
3691
3692 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] {
3693 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
3694 } else {
3695 set et_vect_widen_mult_qi_to_hi_pattern_saved 0
3696 if { [istarget powerpc*-*-*]
3697 || ([istarget arm*-*-*]
3698 && [check_effective_target_arm_neon_ok]
3699 && [check_effective_target_arm_little_endian]) } {
3700 set et_vect_widen_mult_qi_to_hi_pattern_saved 1
3701 }
3702 }
3703 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
3704 return $et_vect_widen_mult_qi_to_hi_pattern_saved
3705 }
3706
3707 # Return 1 if the target plus current options supports a vector
3708 # widening multiplication of *short* args into *int* result, 0 otherwise.
3709 #
3710 # This won't change for different subtargets so cache the result.
3711
3712 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
3713 global et_vect_widen_mult_hi_to_si_pattern
3714
3715 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved] {
3716 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
3717 } else {
3718 set et_vect_widen_mult_hi_to_si_pattern_saved 0
3719 if { [istarget powerpc*-*-*]
3720 || [istarget spu-*-*]
3721 || [istarget ia64-*-*]
3722 || [istarget i?86-*-*]
3723 || [istarget x86_64-*-*]
3724 || ([istarget arm*-*-*]
3725 && [check_effective_target_arm_neon_ok]
3726 && [check_effective_target_arm_little_endian]) } {
3727 set et_vect_widen_mult_hi_to_si_pattern_saved 1
3728 }
3729 }
3730 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
3731 return $et_vect_widen_mult_hi_to_si_pattern_saved
3732 }
3733
3734 # Return 1 if the target plus current options supports a vector
3735 # widening shift, 0 otherwise.
3736 #
3737 # This won't change for different subtargets so cache the result.
3738
3739 proc check_effective_target_vect_widen_shift { } {
3740 global et_vect_widen_shift_saved
3741
3742 if [info exists et_vect_shift_saved] {
3743 verbose "check_effective_target_vect_widen_shift: using cached result" 2
3744 } else {
3745 set et_vect_widen_shift_saved 0
3746 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
3747 set et_vect_widen_shift_saved 1
3748 }
3749 }
3750 verbose "check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2
3751 return $et_vect_widen_shift_saved
3752 }
3753
3754 # Return 1 if the target plus current options supports a vector
3755 # dot-product of signed chars, 0 otherwise.
3756 #
3757 # This won't change for different subtargets so cache the result.
3758
3759 proc check_effective_target_vect_sdot_qi { } {
3760 global et_vect_sdot_qi
3761
3762 if [info exists et_vect_sdot_qi_saved] {
3763 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
3764 } else {
3765 set et_vect_sdot_qi_saved 0
3766 if { [istarget ia64-*-*] } {
3767 set et_vect_udot_qi_saved 1
3768 }
3769 }
3770 verbose "check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
3771 return $et_vect_sdot_qi_saved
3772 }
3773
3774 # Return 1 if the target plus current options supports a vector
3775 # dot-product of unsigned chars, 0 otherwise.
3776 #
3777 # This won't change for different subtargets so cache the result.
3778
3779 proc check_effective_target_vect_udot_qi { } {
3780 global et_vect_udot_qi
3781
3782 if [info exists et_vect_udot_qi_saved] {
3783 verbose "check_effective_target_vect_udot_qi: using cached result" 2
3784 } else {
3785 set et_vect_udot_qi_saved 0
3786 if { [istarget powerpc*-*-*]
3787 || [istarget ia64-*-*] } {
3788 set et_vect_udot_qi_saved 1
3789 }
3790 }
3791 verbose "check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
3792 return $et_vect_udot_qi_saved
3793 }
3794
3795 # Return 1 if the target plus current options supports a vector
3796 # dot-product of signed shorts, 0 otherwise.
3797 #
3798 # This won't change for different subtargets so cache the result.
3799
3800 proc check_effective_target_vect_sdot_hi { } {
3801 global et_vect_sdot_hi
3802
3803 if [info exists et_vect_sdot_hi_saved] {
3804 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
3805 } else {
3806 set et_vect_sdot_hi_saved 0
3807 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
3808 || [istarget ia64-*-*]
3809 || [istarget i?86-*-*]
3810 || [istarget x86_64-*-*] } {
3811 set et_vect_sdot_hi_saved 1
3812 }
3813 }
3814 verbose "check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
3815 return $et_vect_sdot_hi_saved
3816 }
3817
3818 # Return 1 if the target plus current options supports a vector
3819 # dot-product of unsigned shorts, 0 otherwise.
3820 #
3821 # This won't change for different subtargets so cache the result.
3822
3823 proc check_effective_target_vect_udot_hi { } {
3824 global et_vect_udot_hi
3825
3826 if [info exists et_vect_udot_hi_saved] {
3827 verbose "check_effective_target_vect_udot_hi: using cached result" 2
3828 } else {
3829 set et_vect_udot_hi_saved 0
3830 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) } {
3831 set et_vect_udot_hi_saved 1
3832 }
3833 }
3834 verbose "check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
3835 return $et_vect_udot_hi_saved
3836 }
3837
3838
3839 # Return 1 if the target plus current options supports a vector
3840 # demotion (packing) of shorts (to chars) and ints (to shorts)
3841 # using modulo arithmetic, 0 otherwise.
3842 #
3843 # This won't change for different subtargets so cache the result.
3844
3845 proc check_effective_target_vect_pack_trunc { } {
3846 global et_vect_pack_trunc
3847
3848 if [info exists et_vect_pack_trunc_saved] {
3849 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
3850 } else {
3851 set et_vect_pack_trunc_saved 0
3852 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
3853 || [istarget i?86-*-*]
3854 || [istarget x86_64-*-*]
3855 || [istarget aarch64*-*-*]
3856 || [istarget spu-*-*]
3857 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
3858 && [check_effective_target_arm_little_endian]) } {
3859 set et_vect_pack_trunc_saved 1
3860 }
3861 }
3862 verbose "check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
3863 return $et_vect_pack_trunc_saved
3864 }
3865
3866 # Return 1 if the target plus current options supports a vector
3867 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
3868 #
3869 # This won't change for different subtargets so cache the result.
3870
3871 proc check_effective_target_vect_unpack { } {
3872 global et_vect_unpack
3873
3874 if [info exists et_vect_unpack_saved] {
3875 verbose "check_effective_target_vect_unpack: using cached result" 2
3876 } else {
3877 set et_vect_unpack_saved 0
3878 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
3879 || [istarget i?86-*-*]
3880 || [istarget x86_64-*-*]
3881 || [istarget spu-*-*]
3882 || [istarget ia64-*-*]
3883 || [istarget aarch64*-*-*]
3884 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
3885 && [check_effective_target_arm_little_endian]) } {
3886 set et_vect_unpack_saved 1
3887 }
3888 }
3889 verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
3890 return $et_vect_unpack_saved
3891 }
3892
3893 # Return 1 if the target plus current options does not guarantee
3894 # that its STACK_BOUNDARY is >= the reguired vector alignment.
3895 #
3896 # This won't change for different subtargets so cache the result.
3897
3898 proc check_effective_target_unaligned_stack { } {
3899 global et_unaligned_stack_saved
3900
3901 if [info exists et_unaligned_stack_saved] {
3902 verbose "check_effective_target_unaligned_stack: using cached result" 2
3903 } else {
3904 set et_unaligned_stack_saved 0
3905 }
3906 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
3907 return $et_unaligned_stack_saved
3908 }
3909
3910 # Return 1 if the target plus current options does not support a vector
3911 # alignment mechanism, 0 otherwise.
3912 #
3913 # This won't change for different subtargets so cache the result.
3914
3915 proc check_effective_target_vect_no_align { } {
3916 global et_vect_no_align_saved
3917
3918 if [info exists et_vect_no_align_saved] {
3919 verbose "check_effective_target_vect_no_align: using cached result" 2
3920 } else {
3921 set et_vect_no_align_saved 0
3922 if { [istarget mipsisa64*-*-*]
3923 || [istarget mips-sde-elf]
3924 || [istarget sparc*-*-*]
3925 || [istarget ia64-*-*]
3926 || [check_effective_target_arm_vect_no_misalign]
3927 || ([istarget mips*-*-*]
3928 && [check_effective_target_mips_loongson]) } {
3929 set et_vect_no_align_saved 1
3930 }
3931 }
3932 verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
3933 return $et_vect_no_align_saved
3934 }
3935
3936 # Return 1 if the target supports a vector misalign access, 0 otherwise.
3937 #
3938 # This won't change for different subtargets so cache the result.
3939
3940 proc check_effective_target_vect_hw_misalign { } {
3941 global et_vect_hw_misalign_saved
3942
3943 if [info exists et_vect_hw_misalign_saved] {
3944 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
3945 } else {
3946 set et_vect_hw_misalign_saved 0
3947 if { ([istarget x86_64-*-*]
3948 || [istarget aarch64*-*-*]
3949 || [istarget i?86-*-*]) } {
3950 set et_vect_hw_misalign_saved 1
3951 }
3952 }
3953 verbose "check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
3954 return $et_vect_hw_misalign_saved
3955 }
3956
3957
3958 # Return 1 if arrays are aligned to the vector alignment
3959 # boundary, 0 otherwise.
3960 #
3961 # This won't change for different subtargets so cache the result.
3962
3963 proc check_effective_target_vect_aligned_arrays { } {
3964 global et_vect_aligned_arrays
3965
3966 if [info exists et_vect_aligned_arrays_saved] {
3967 verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
3968 } else {
3969 set et_vect_aligned_arrays_saved 0
3970 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
3971 if { ([is-effective-target lp64]
3972 && ( ![check_avx_available]
3973 || [check_prefer_avx128])) } {
3974 set et_vect_aligned_arrays_saved 1
3975 }
3976 }
3977 if [istarget spu-*-*] {
3978 set et_vect_aligned_arrays_saved 1
3979 }
3980 }
3981 verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
3982 return $et_vect_aligned_arrays_saved
3983 }
3984
3985 # Return 1 if types of size 32 bit or less are naturally aligned
3986 # (aligned to their type-size), 0 otherwise.
3987 #
3988 # This won't change for different subtargets so cache the result.
3989
3990 proc check_effective_target_natural_alignment_32 { } {
3991 global et_natural_alignment_32
3992
3993 if [info exists et_natural_alignment_32_saved] {
3994 verbose "check_effective_target_natural_alignment_32: using cached result" 2
3995 } else {
3996 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
3997 set et_natural_alignment_32_saved 1
3998 if { ([istarget *-*-darwin*] && [is-effective-target lp64]) } {
3999 set et_natural_alignment_32_saved 0
4000 }
4001 }
4002 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
4003 return $et_natural_alignment_32_saved
4004 }
4005
4006 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
4007 # type-size), 0 otherwise.
4008 #
4009 # This won't change for different subtargets so cache the result.
4010
4011 proc check_effective_target_natural_alignment_64 { } {
4012 global et_natural_alignment_64
4013
4014 if [info exists et_natural_alignment_64_saved] {
4015 verbose "check_effective_target_natural_alignment_64: using cached result" 2
4016 } else {
4017 set et_natural_alignment_64_saved 0
4018 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
4019 || [istarget spu-*-*] } {
4020 set et_natural_alignment_64_saved 1
4021 }
4022 }
4023 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
4024 return $et_natural_alignment_64_saved
4025 }
4026
4027 # Return 1 if all vector types are naturally aligned (aligned to their
4028 # type-size), 0 otherwise.
4029 #
4030 # This won't change for different subtargets so cache the result.
4031
4032 proc check_effective_target_vect_natural_alignment { } {
4033 global et_vect_natural_alignment
4034
4035 if [info exists et_vect_natural_alignment_saved] {
4036 verbose "check_effective_target_vect_natural_alignment: using cached result" 2
4037 } else {
4038 set et_vect_natural_alignment_saved 1
4039 if { [check_effective_target_arm_eabi] } {
4040 set et_vect_natural_alignment_saved 0
4041 }
4042 }
4043 verbose "check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2
4044 return $et_vect_natural_alignment_saved
4045 }
4046
4047 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
4048 #
4049 # This won't change for different subtargets so cache the result.
4050
4051 proc check_effective_target_vector_alignment_reachable { } {
4052 global et_vector_alignment_reachable
4053
4054 if [info exists et_vector_alignment_reachable_saved] {
4055 verbose "check_effective_target_vector_alignment_reachable: using cached result" 2
4056 } else {
4057 if { [check_effective_target_vect_aligned_arrays]
4058 || [check_effective_target_natural_alignment_32] } {
4059 set et_vector_alignment_reachable_saved 1
4060 } else {
4061 set et_vector_alignment_reachable_saved 0
4062 }
4063 }
4064 verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
4065 return $et_vector_alignment_reachable_saved
4066 }
4067
4068 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
4069 #
4070 # This won't change for different subtargets so cache the result.
4071
4072 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
4073 global et_vector_alignment_reachable_for_64bit
4074
4075 if [info exists et_vector_alignment_reachable_for_64bit_saved] {
4076 verbose "check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
4077 } else {
4078 if { [check_effective_target_vect_aligned_arrays]
4079 || [check_effective_target_natural_alignment_64] } {
4080 set et_vector_alignment_reachable_for_64bit_saved 1
4081 } else {
4082 set et_vector_alignment_reachable_for_64bit_saved 0
4083 }
4084 }
4085 verbose "check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
4086 return $et_vector_alignment_reachable_for_64bit_saved
4087 }
4088
4089 # Return 1 if the target only requires element alignment for vector accesses
4090
4091 proc check_effective_target_vect_element_align { } {
4092 global et_vect_element_align
4093
4094 if [info exists et_vect_element_align] {
4095 verbose "check_effective_target_vect_element_align: using cached result" 2
4096 } else {
4097 set et_vect_element_align 0
4098 if { ([istarget arm*-*-*]
4099 && ![check_effective_target_arm_vect_no_misalign])
4100 || [check_effective_target_vect_hw_misalign] } {
4101 set et_vect_element_align 1
4102 }
4103 }
4104
4105 verbose "check_effective_target_vect_element_align: returning $et_vect_element_align" 2
4106 return $et_vect_element_align
4107 }
4108
4109 # Return 1 if the target supports vector conditional operations, 0 otherwise.
4110
4111 proc check_effective_target_vect_condition { } {
4112 global et_vect_cond_saved
4113
4114 if [info exists et_vect_cond_saved] {
4115 verbose "check_effective_target_vect_cond: using cached result" 2
4116 } else {
4117 set et_vect_cond_saved 0
4118 if { [istarget aarch64*-*-*]
4119 || [istarget powerpc*-*-*]
4120 || [istarget ia64-*-*]
4121 || [istarget i?86-*-*]
4122 || [istarget spu-*-*]
4123 || [istarget x86_64-*-*]
4124 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4125 set et_vect_cond_saved 1
4126 }
4127 }
4128
4129 verbose "check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
4130 return $et_vect_cond_saved
4131 }
4132
4133 # Return 1 if the target supports vector conditional operations where
4134 # the comparison has different type from the lhs, 0 otherwise.
4135
4136 proc check_effective_target_vect_cond_mixed { } {
4137 global et_vect_cond_mixed_saved
4138
4139 if [info exists et_vect_cond_mixed_saved] {
4140 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
4141 } else {
4142 set et_vect_cond_mixed_saved 0
4143 if { [istarget i?86-*-*]
4144 || [istarget x86_64-*-*]
4145 || [istarget powerpc*-*-*] } {
4146 set et_vect_cond_mixed_saved 1
4147 }
4148 }
4149
4150 verbose "check_effective_target_vect_cond_mixed: returning $et_vect_cond_mixed_saved" 2
4151 return $et_vect_cond_mixed_saved
4152 }
4153
4154 # Return 1 if the target supports vector char multiplication, 0 otherwise.
4155
4156 proc check_effective_target_vect_char_mult { } {
4157 global et_vect_char_mult_saved
4158
4159 if [info exists et_vect_char_mult_saved] {
4160 verbose "check_effective_target_vect_char_mult: using cached result" 2
4161 } else {
4162 set et_vect_char_mult_saved 0
4163 if { [istarget aarch64*-*-*]
4164 || [istarget ia64-*-*]
4165 || [istarget i?86-*-*]
4166 || [istarget x86_64-*-*]
4167 || [check_effective_target_arm32] } {
4168 set et_vect_char_mult_saved 1
4169 }
4170 }
4171
4172 verbose "check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
4173 return $et_vect_char_mult_saved
4174 }
4175
4176 # Return 1 if the target supports vector short multiplication, 0 otherwise.
4177
4178 proc check_effective_target_vect_short_mult { } {
4179 global et_vect_short_mult_saved
4180
4181 if [info exists et_vect_short_mult_saved] {
4182 verbose "check_effective_target_vect_short_mult: using cached result" 2
4183 } else {
4184 set et_vect_short_mult_saved 0
4185 if { [istarget ia64-*-*]
4186 || [istarget spu-*-*]
4187 || [istarget i?86-*-*]
4188 || [istarget x86_64-*-*]
4189 || [istarget powerpc*-*-*]
4190 || [istarget aarch64*-*-*]
4191 || [check_effective_target_arm32]
4192 || ([istarget mips*-*-*]
4193 && [check_effective_target_mips_loongson]) } {
4194 set et_vect_short_mult_saved 1
4195 }
4196 }
4197
4198 verbose "check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
4199 return $et_vect_short_mult_saved
4200 }
4201
4202 # Return 1 if the target supports vector int multiplication, 0 otherwise.
4203
4204 proc check_effective_target_vect_int_mult { } {
4205 global et_vect_int_mult_saved
4206
4207 if [info exists et_vect_int_mult_saved] {
4208 verbose "check_effective_target_vect_int_mult: using cached result" 2
4209 } else {
4210 set et_vect_int_mult_saved 0
4211 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4212 || [istarget spu-*-*]
4213 || [istarget i?86-*-*]
4214 || [istarget x86_64-*-*]
4215 || [istarget ia64-*-*]
4216 || [istarget aarch64*-*-*]
4217 || [check_effective_target_arm32] } {
4218 set et_vect_int_mult_saved 1
4219 }
4220 }
4221
4222 verbose "check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
4223 return $et_vect_int_mult_saved
4224 }
4225
4226 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
4227
4228 proc check_effective_target_vect_extract_even_odd { } {
4229 global et_vect_extract_even_odd_saved
4230
4231 if [info exists et_vect_extract_even_odd_saved] {
4232 verbose "check_effective_target_vect_extract_even_odd: using cached result" 2
4233 } else {
4234 set et_vect_extract_even_odd_saved 0
4235 if { [istarget aarch64*-*-*]
4236 || [istarget powerpc*-*-*]
4237 || [is-effective-target arm_neon_ok]
4238 || [istarget i?86-*-*]
4239 || [istarget x86_64-*-*]
4240 || [istarget ia64-*-*]
4241 || [istarget spu-*-*]
4242 || ([istarget mips*-*-*]
4243 && [check_effective_target_mpaired_single]) } {
4244 set et_vect_extract_even_odd_saved 1
4245 }
4246 }
4247
4248 verbose "check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
4249 return $et_vect_extract_even_odd_saved
4250 }
4251
4252 # Return 1 if the target supports vector interleaving, 0 otherwise.
4253
4254 proc check_effective_target_vect_interleave { } {
4255 global et_vect_interleave_saved
4256
4257 if [info exists et_vect_interleave_saved] {
4258 verbose "check_effective_target_vect_interleave: using cached result" 2
4259 } else {
4260 set et_vect_interleave_saved 0
4261 if { [istarget aarch64*-*-*]
4262 || [istarget powerpc*-*-*]
4263 || [is-effective-target arm_neon_ok]
4264 || [istarget i?86-*-*]
4265 || [istarget x86_64-*-*]
4266 || [istarget ia64-*-*]
4267 || [istarget spu-*-*]
4268 || ([istarget mips*-*-*]
4269 && [check_effective_target_mpaired_single]) } {
4270 set et_vect_interleave_saved 1
4271 }
4272 }
4273
4274 verbose "check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
4275 return $et_vect_interleave_saved
4276 }
4277
4278 foreach N {2 3 4 8} {
4279 eval [string map [list N $N] {
4280 # Return 1 if the target supports 2-vector interleaving
4281 proc check_effective_target_vect_stridedN { } {
4282 global et_vect_stridedN_saved
4283
4284 if [info exists et_vect_stridedN_saved] {
4285 verbose "check_effective_target_vect_stridedN: using cached result" 2
4286 } else {
4287 set et_vect_stridedN_saved 0
4288 if { (N & -N) == N
4289 && [check_effective_target_vect_interleave]
4290 && [check_effective_target_vect_extract_even_odd] } {
4291 set et_vect_stridedN_saved 1
4292 }
4293 if { ([istarget arm*-*-*]
4294 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
4295 set et_vect_stridedN_saved 1
4296 }
4297 }
4298
4299 verbose "check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
4300 return $et_vect_stridedN_saved
4301 }
4302 }]
4303 }
4304
4305 # Return 1 if the target supports multiple vector sizes
4306
4307 proc check_effective_target_vect_multiple_sizes { } {
4308 global et_vect_multiple_sizes_saved
4309
4310 set et_vect_multiple_sizes_saved 0
4311 if { ([istarget aarch64*-*-*]
4312 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])) } {
4313 set et_vect_multiple_sizes_saved 1
4314 }
4315 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4316 if { ([check_avx_available] && ![check_prefer_avx128]) } {
4317 set et_vect_multiple_sizes_saved 1
4318 }
4319 }
4320
4321 verbose "check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
4322 return $et_vect_multiple_sizes_saved
4323 }
4324
4325 # Return 1 if the target supports vectors of 64 bits.
4326
4327 proc check_effective_target_vect64 { } {
4328 global et_vect64_saved
4329
4330 if [info exists et_vect64_saved] {
4331 verbose "check_effective_target_vect64: using cached result" 2
4332 } else {
4333 set et_vect64_saved 0
4334 if { ([istarget arm*-*-*]
4335 && [check_effective_target_arm_neon_ok]
4336 && [check_effective_target_arm_little_endian]) } {
4337 set et_vect64_saved 1
4338 }
4339 }
4340
4341 verbose "check_effective_target_vect64: returning $et_vect64_saved" 2
4342 return $et_vect64_saved
4343 }
4344
4345 # Return 1 if the target supports vector copysignf calls.
4346
4347 proc check_effective_target_vect_call_copysignf { } {
4348 global et_vect_call_copysignf_saved
4349
4350 if [info exists et_vect_call_copysignf_saved] {
4351 verbose "check_effective_target_vect_call_copysignf: using cached result" 2
4352 } else {
4353 set et_vect_call_copysignf_saved 0
4354 if { [istarget i?86-*-*]
4355 || [istarget x86_64-*-*]
4356 || [istarget powerpc*-*-*] } {
4357 set et_vect_call_copysignf_saved 1
4358 }
4359 }
4360
4361 verbose "check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
4362 return $et_vect_call_copysignf_saved
4363 }
4364
4365 # Return 1 if the target supports vector sqrtf calls.
4366
4367 proc check_effective_target_vect_call_sqrtf { } {
4368 global et_vect_call_sqrtf_saved
4369
4370 if [info exists et_vect_call_sqrtf_saved] {
4371 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
4372 } else {
4373 set et_vect_call_sqrtf_saved 0
4374 if { [istarget aarch64*-*-*]
4375 || [istarget i?86-*-*]
4376 || [istarget x86_64-*-*]
4377 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
4378 set et_vect_call_sqrtf_saved 1
4379 }
4380 }
4381
4382 verbose "check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
4383 return $et_vect_call_sqrtf_saved
4384 }
4385
4386 # Return 1 if the target supports vector lrint calls.
4387
4388 proc check_effective_target_vect_call_lrint { } {
4389 set et_vect_call_lrint 0
4390 if { ([istarget i?86-*-*] || [istarget x86_64-*-*]) && [check_effective_target_ilp32] } {
4391 set et_vect_call_lrint 1
4392 }
4393
4394 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
4395 return $et_vect_call_lrint
4396 }
4397
4398 # Return 1 if the target supports vector btrunc calls.
4399
4400 proc check_effective_target_vect_call_btrunc { } {
4401 global et_vect_call_btrunc_saved
4402
4403 if [info exists et_vect_call_btrunc_saved] {
4404 verbose "check_effective_target_vect_call_btrunc: using cached result" 2
4405 } else {
4406 set et_vect_call_btrunc_saved 0
4407 if { [istarget aarch64*-*-*] } {
4408 set et_vect_call_btrunc_saved 1
4409 }
4410 }
4411
4412 verbose "check_effective_target_vect_call_btrunc: returning $et_vect_call_btrunc_saved" 2
4413 return $et_vect_call_btrunc_saved
4414 }
4415
4416 # Return 1 if the target supports vector btruncf calls.
4417
4418 proc check_effective_target_vect_call_btruncf { } {
4419 global et_vect_call_btruncf_saved
4420
4421 if [info exists et_vect_call_btruncf_saved] {
4422 verbose "check_effective_target_vect_call_btruncf: using cached result" 2
4423 } else {
4424 set et_vect_call_btruncf_saved 0
4425 if { [istarget aarch64*-*-*] } {
4426 set et_vect_call_btruncf_saved 1
4427 }
4428 }
4429
4430 verbose "check_effective_target_vect_call_btruncf: returning $et_vect_call_btruncf_saved" 2
4431 return $et_vect_call_btruncf_saved
4432 }
4433
4434 # Return 1 if the target supports vector ceil calls.
4435
4436 proc check_effective_target_vect_call_ceil { } {
4437 global et_vect_call_ceil_saved
4438
4439 if [info exists et_vect_call_ceil_saved] {
4440 verbose "check_effective_target_vect_call_ceil: using cached result" 2
4441 } else {
4442 set et_vect_call_ceil_saved 0
4443 if { [istarget aarch64*-*-*] } {
4444 set et_vect_call_ceil_saved 1
4445 }
4446 }
4447
4448 verbose "check_effective_target_vect_call_ceil: returning $et_vect_call_ceil_saved" 2
4449 return $et_vect_call_ceil_saved
4450 }
4451
4452 # Return 1 if the target supports vector ceilf calls.
4453
4454 proc check_effective_target_vect_call_ceilf { } {
4455 global et_vect_call_ceilf_saved
4456
4457 if [info exists et_vect_call_ceilf_saved] {
4458 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
4459 } else {
4460 set et_vect_call_ceilf_saved 0
4461 if { [istarget aarch64*-*-*] } {
4462 set et_vect_call_ceilf_saved 1
4463 }
4464 }
4465
4466 verbose "check_effective_target_vect_call_ceilf: returning $et_vect_call_ceilf_saved" 2
4467 return $et_vect_call_ceilf_saved
4468 }
4469
4470 # Return 1 if the target supports vector floor calls.
4471
4472 proc check_effective_target_vect_call_floor { } {
4473 global et_vect_call_floor_saved
4474
4475 if [info exists et_vect_call_floor_saved] {
4476 verbose "check_effective_target_vect_call_floor: using cached result" 2
4477 } else {
4478 set et_vect_call_floor_saved 0
4479 if { [istarget aarch64*-*-*] } {
4480 set et_vect_call_floor_saved 1
4481 }
4482 }
4483
4484 verbose "check_effective_target_vect_call_floor: returning $et_vect_call_floor_saved" 2
4485 return $et_vect_call_floor_saved
4486 }
4487
4488 # Return 1 if the target supports vector floorf calls.
4489
4490 proc check_effective_target_vect_call_floorf { } {
4491 global et_vect_call_floorf_saved
4492
4493 if [info exists et_vect_call_floorf_saved] {
4494 verbose "check_effective_target_vect_call_floorf: using cached result" 2
4495 } else {
4496 set et_vect_call_floorf_saved 0
4497 if { [istarget aarch64*-*-*] } {
4498 set et_vect_call_floorf_saved 1
4499 }
4500 }
4501
4502 verbose "check_effective_target_vect_call_floorf: returning $et_vect_call_floorf_saved" 2
4503 return $et_vect_call_floorf_saved
4504 }
4505
4506 # Return 1 if the target supports vector lceil calls.
4507
4508 proc check_effective_target_vect_call_lceil { } {
4509 global et_vect_call_lceil_saved
4510
4511 if [info exists et_vect_call_lceil_saved] {
4512 verbose "check_effective_target_vect_call_lceil: using cached result" 2
4513 } else {
4514 set et_vect_call_lceil_saved 0
4515 if { [istarget aarch64*-*-*] } {
4516 set et_vect_call_lceil_saved 1
4517 }
4518 }
4519
4520 verbose "check_effective_target_vect_call_lceil: returning $et_vect_call_lceil_saved" 2
4521 return $et_vect_call_lceil_saved
4522 }
4523
4524 # Return 1 if the target supports vector lfloor calls.
4525
4526 proc check_effective_target_vect_call_lfloor { } {
4527 global et_vect_call_lfloor_saved
4528
4529 if [info exists et_vect_call_lfloor_saved] {
4530 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
4531 } else {
4532 set et_vect_call_lfloor_saved 0
4533 if { [istarget aarch64*-*-*] } {
4534 set et_vect_call_lfloor_saved 1
4535 }
4536 }
4537
4538 verbose "check_effective_target_vect_call_lfloor: returning $et_vect_call_lfloor_saved" 2
4539 return $et_vect_call_lfloor_saved
4540 }
4541
4542 # Return 1 if the target supports vector nearbyint calls.
4543
4544 proc check_effective_target_vect_call_nearbyint { } {
4545 global et_vect_call_nearbyint_saved
4546
4547 if [info exists et_vect_call_nearbyint_saved] {
4548 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
4549 } else {
4550 set et_vect_call_nearbyint_saved 0
4551 if { [istarget aarch64*-*-*] } {
4552 set et_vect_call_nearbyint_saved 1
4553 }
4554 }
4555
4556 verbose "check_effective_target_vect_call_nearbyint: returning $et_vect_call_nearbyint_saved" 2
4557 return $et_vect_call_nearbyint_saved
4558 }
4559
4560 # Return 1 if the target supports vector nearbyintf calls.
4561
4562 proc check_effective_target_vect_call_nearbyintf { } {
4563 global et_vect_call_nearbyintf_saved
4564
4565 if [info exists et_vect_call_nearbyintf_saved] {
4566 verbose "check_effective_target_vect_call_nearbyintf: using cached result" 2
4567 } else {
4568 set et_vect_call_nearbyintf_saved 0
4569 if { [istarget aarch64*-*-*] } {
4570 set et_vect_call_nearbyintf_saved 1
4571 }
4572 }
4573
4574 verbose "check_effective_target_vect_call_nearbyintf: returning $et_vect_call_nearbyintf_saved" 2
4575 return $et_vect_call_nearbyintf_saved
4576 }
4577
4578 # Return 1 if the target supports vector round calls.
4579
4580 proc check_effective_target_vect_call_round { } {
4581 global et_vect_call_round_saved
4582
4583 if [info exists et_vect_call_round_saved] {
4584 verbose "check_effective_target_vect_call_round: using cached result" 2
4585 } else {
4586 set et_vect_call_round_saved 0
4587 if { [istarget aarch64*-*-*] } {
4588 set et_vect_call_round_saved 1
4589 }
4590 }
4591
4592 verbose "check_effective_target_vect_call_round: returning $et_vect_call_round_saved" 2
4593 return $et_vect_call_round_saved
4594 }
4595
4596 # Return 1 if the target supports vector roundf calls.
4597
4598 proc check_effective_target_vect_call_roundf { } {
4599 global et_vect_call_roundf_saved
4600
4601 if [info exists et_vect_call_roundf_saved] {
4602 verbose "check_effective_target_vect_call_roundf: using cached result" 2
4603 } else {
4604 set et_vect_call_roundf_saved 0
4605 if { [istarget aarch64*-*-*] } {
4606 set et_vect_call_roundf_saved 1
4607 }
4608 }
4609
4610 verbose "check_effective_target_vect_call_roundf: returning $et_vect_call_roundf_saved" 2
4611 return $et_vect_call_roundf_saved
4612 }
4613
4614 # Return 1 if the target supports section-anchors
4615
4616 proc check_effective_target_section_anchors { } {
4617 global et_section_anchors_saved
4618
4619 if [info exists et_section_anchors_saved] {
4620 verbose "check_effective_target_section_anchors: using cached result" 2
4621 } else {
4622 set et_section_anchors_saved 0
4623 if { [istarget powerpc*-*-*]
4624 || [istarget arm*-*-*] } {
4625 set et_section_anchors_saved 1
4626 }
4627 }
4628
4629 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
4630 return $et_section_anchors_saved
4631 }
4632
4633 # Return 1 if the target supports atomic operations on "int_128" values.
4634
4635 proc check_effective_target_sync_int_128 { } {
4636 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
4637 && ![is-effective-target ia32] } {
4638 return 1
4639 } else {
4640 return 0
4641 }
4642 }
4643
4644 # Return 1 if the target supports atomic operations on "int_128" values
4645 # and can execute them.
4646
4647 proc check_effective_target_sync_int_128_runtime { } {
4648 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
4649 && ![is-effective-target ia32] } {
4650 return [check_cached_effective_target sync_int_128_available {
4651 check_runtime_nocache sync_int_128_available {
4652 #include "cpuid.h"
4653 int main ()
4654 {
4655 unsigned int eax, ebx, ecx, edx;
4656 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
4657 return !(ecx & bit_CMPXCHG16B);
4658 return 1;
4659 }
4660 } ""
4661 }]
4662 } else {
4663 return 0
4664 }
4665 }
4666
4667 # Return 1 if the target supports atomic operations on "long long".
4668 #
4669 # Note: 32bit x86 targets require -march=pentium in dg-options.
4670
4671 proc check_effective_target_sync_long_long { } {
4672 if { [istarget x86_64-*-*]
4673 || [istarget i?86-*-*])
4674 || [istarget aarch64*-*-*]
4675 || [istarget arm*-*-*]
4676 || [istarget alpha*-*-*]
4677 || ([istarget sparc*-*-*] && [check_effective_target_lp64]) } {
4678 return 1
4679 } else {
4680 return 0
4681 }
4682 }
4683
4684 # Return 1 if the target supports atomic operations on "long long"
4685 # and can execute them.
4686 #
4687 # Note: 32bit x86 targets require -march=pentium in dg-options.
4688
4689 proc check_effective_target_sync_long_long_runtime { } {
4690 if { [istarget x86_64-*-*]
4691 || [istarget i?86-*-*] } {
4692 return [check_cached_effective_target sync_long_long_available {
4693 check_runtime_nocache sync_long_long_available {
4694 #include "cpuid.h"
4695 int main ()
4696 {
4697 unsigned int eax, ebx, ecx, edx;
4698 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
4699 return !(edx & bit_CMPXCHG8B);
4700 return 1;
4701 }
4702 } ""
4703 }]
4704 } elseif { [istarget aarch64*-*-*] } {
4705 return 1
4706 } elseif { [istarget arm*-*-linux-*] } {
4707 return [check_runtime sync_longlong_runtime {
4708 #include <stdlib.h>
4709 int main ()
4710 {
4711 long long l1;
4712
4713 if (sizeof (long long) != 8)
4714 exit (1);
4715
4716 /* Just check for native; checking for kernel fallback is tricky. */
4717 asm volatile ("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
4718
4719 exit (0);
4720 }
4721 } "" ]
4722 } elseif { [istarget alpha*-*-*] } {
4723 return 1
4724 } elseif { ([istarget sparc*-*-*]
4725 && [check_effective_target_lp64]
4726 && [check_effective_target_ultrasparc_hw]) } {
4727 return 1
4728 } elseif { [istarget powerpc*-*-*] && [check_effective_target_lp64] } {
4729 return 1
4730 } else {
4731 return 0
4732 }
4733 }
4734
4735 # Return 1 if the target supports atomic operations on "int" and "long".
4736
4737 proc check_effective_target_sync_int_long { } {
4738 global et_sync_int_long_saved
4739
4740 if [info exists et_sync_int_long_saved] {
4741 verbose "check_effective_target_sync_int_long: using cached result" 2
4742 } else {
4743 set et_sync_int_long_saved 0
4744 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
4745 # load-reserved/store-conditional instructions.
4746 if { [istarget ia64-*-*]
4747 || [istarget i?86-*-*]
4748 || [istarget x86_64-*-*]
4749 || [istarget aarch64*-*-*]
4750 || [istarget alpha*-*-*]
4751 || [istarget arm*-*-linux-*]
4752 || [istarget bfin*-*linux*]
4753 || [istarget hppa*-*linux*]
4754 || [istarget s390*-*-*]
4755 || [istarget powerpc*-*-*]
4756 || [istarget crisv32-*-*] || [istarget cris-*-*]
4757 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
4758 || [check_effective_target_mips_llsc] } {
4759 set et_sync_int_long_saved 1
4760 }
4761 }
4762
4763 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
4764 return $et_sync_int_long_saved
4765 }
4766
4767 # Return 1 if the target supports atomic operations on "char" and "short".
4768
4769 proc check_effective_target_sync_char_short { } {
4770 global et_sync_char_short_saved
4771
4772 if [info exists et_sync_char_short_saved] {
4773 verbose "check_effective_target_sync_char_short: using cached result" 2
4774 } else {
4775 set et_sync_char_short_saved 0
4776 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
4777 # load-reserved/store-conditional instructions.
4778 if { [istarget aarch64*-*-*]
4779 || [istarget ia64-*-*]
4780 || [istarget i?86-*-*]
4781 || [istarget x86_64-*-*]
4782 || [istarget alpha*-*-*]
4783 || [istarget arm*-*-linux-*]
4784 || [istarget hppa*-*linux*]
4785 || [istarget s390*-*-*]
4786 || [istarget powerpc*-*-*]
4787 || [istarget crisv32-*-*] || [istarget cris-*-*]
4788 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
4789 || [check_effective_target_mips_llsc] } {
4790 set et_sync_char_short_saved 1
4791 }
4792 }
4793
4794 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
4795 return $et_sync_char_short_saved
4796 }
4797
4798 # Return 1 if the target uses a ColdFire FPU.
4799
4800 proc check_effective_target_coldfire_fpu { } {
4801 return [check_no_compiler_messages coldfire_fpu assembly {
4802 #ifndef __mcffpu__
4803 #error FOO
4804 #endif
4805 }]
4806 }
4807
4808 # Return true if this is a uClibc target.
4809
4810 proc check_effective_target_uclibc {} {
4811 return [check_no_compiler_messages uclibc object {
4812 #include <features.h>
4813 #if !defined (__UCLIBC__)
4814 #error FOO
4815 #endif
4816 }]
4817 }
4818
4819 # Return true if this is a uclibc target and if the uclibc feature
4820 # described by __$feature__ is not present.
4821
4822 proc check_missing_uclibc_feature {feature} {
4823 return [check_no_compiler_messages $feature object "
4824 #include <features.h>
4825 #if !defined (__UCLIBC) || defined (__${feature}__)
4826 #error FOO
4827 #endif
4828 "]
4829 }
4830
4831 # Return true if this is a Newlib target.
4832
4833 proc check_effective_target_newlib {} {
4834 return [check_no_compiler_messages newlib object {
4835 #include <newlib.h>
4836 }]
4837 }
4838
4839 # Return true if this is NOT a Bionic target.
4840
4841 proc check_effective_target_non_bionic {} {
4842 return [check_no_compiler_messages non_bionic object {
4843 #include <ctype.h>
4844 #if defined (__BIONIC__)
4845 #error FOO
4846 #endif
4847 }]
4848 }
4849
4850 # Return 1 if
4851 # (a) an error of a few ULP is expected in string to floating-point
4852 # conversion functions; and
4853 # (b) overflow is not always detected correctly by those functions.
4854
4855 proc check_effective_target_lax_strtofp {} {
4856 # By default, assume that all uClibc targets suffer from this.
4857 return [check_effective_target_uclibc]
4858 }
4859
4860 # Return 1 if this is a target for which wcsftime is a dummy
4861 # function that always returns 0.
4862
4863 proc check_effective_target_dummy_wcsftime {} {
4864 # By default, assume that all uClibc targets suffer from this.
4865 return [check_effective_target_uclibc]
4866 }
4867
4868 # Return 1 if constructors with initialization priority arguments are
4869 # supposed on this target.
4870
4871 proc check_effective_target_init_priority {} {
4872 return [check_no_compiler_messages init_priority assembly "
4873 void f() __attribute__((constructor (1000)));
4874 void f() \{\}
4875 "]
4876 }
4877
4878 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
4879 # This can be used with any check_* proc that takes no argument and
4880 # returns only 1 or 0. It could be used with check_* procs that take
4881 # arguments with keywords that pass particular arguments.
4882
4883 proc is-effective-target { arg } {
4884 set selected 0
4885 if { [info procs check_effective_target_${arg}] != [list] } {
4886 set selected [check_effective_target_${arg}]
4887 } else {
4888 switch $arg {
4889 "vmx_hw" { set selected [check_vmx_hw_available] }
4890 "vsx_hw" { set selected [check_vsx_hw_available] }
4891 "p8vector_hw" { set selected [check_p8vector_hw_available] }
4892 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
4893 "named_sections" { set selected [check_named_sections_available] }
4894 "gc_sections" { set selected [check_gc_sections_available] }
4895 "cxa_atexit" { set selected [check_cxa_atexit_available] }
4896 default { error "unknown effective target keyword `$arg'" }
4897 }
4898 }
4899 verbose "is-effective-target: $arg $selected" 2
4900 return $selected
4901 }
4902
4903 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
4904
4905 proc is-effective-target-keyword { arg } {
4906 if { [info procs check_effective_target_${arg}] != [list] } {
4907 return 1
4908 } else {
4909 # These have different names for their check_* procs.
4910 switch $arg {
4911 "vmx_hw" { return 1 }
4912 "vsx_hw" { return 1 }
4913 "p8vector_hw" { return 1 }
4914 "ppc_recip_hw" { return 1 }
4915 "named_sections" { return 1 }
4916 "gc_sections" { return 1 }
4917 "cxa_atexit" { return 1 }
4918 default { return 0 }
4919 }
4920 }
4921 }
4922
4923 # Return 1 if target default to short enums
4924
4925 proc check_effective_target_short_enums { } {
4926 return [check_no_compiler_messages short_enums assembly {
4927 enum foo { bar };
4928 int s[sizeof (enum foo) == 1 ? 1 : -1];
4929 }]
4930 }
4931
4932 # Return 1 if target supports merging string constants at link time.
4933
4934 proc check_effective_target_string_merging { } {
4935 return [check_no_messages_and_pattern string_merging \
4936 "rodata\\.str" assembly {
4937 const char *var = "String";
4938 } {-O2}]
4939 }
4940
4941 # Return 1 if target has the basic signed and unsigned types in
4942 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
4943 # working <stdint.h> for all targets.
4944
4945 proc check_effective_target_stdint_types { } {
4946 return [check_no_compiler_messages stdint_types assembly {
4947 #include <stdint.h>
4948 int8_t a; int16_t b; int32_t c; int64_t d;
4949 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
4950 }]
4951 }
4952
4953 # Return 1 if target has the basic signed and unsigned types in
4954 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
4955 # these types agree with those in the header, as some systems have
4956 # only <inttypes.h>.
4957
4958 proc check_effective_target_inttypes_types { } {
4959 return [check_no_compiler_messages inttypes_types assembly {
4960 #include <inttypes.h>
4961 int8_t a; int16_t b; int32_t c; int64_t d;
4962 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
4963 }]
4964 }
4965
4966 # Return 1 if programs are intended to be run on a simulator
4967 # (i.e. slowly) rather than hardware (i.e. fast).
4968
4969 proc check_effective_target_simulator { } {
4970
4971 # All "src/sim" simulators set this one.
4972 if [board_info target exists is_simulator] {
4973 return [board_info target is_simulator]
4974 }
4975
4976 # The "sid" simulators don't set that one, but at least they set
4977 # this one.
4978 if [board_info target exists slow_simulator] {
4979 return [board_info target slow_simulator]
4980 }
4981
4982 return 0
4983 }
4984
4985 # Return 1 if programs are intended to be run on hardware rather than
4986 # on a simulator
4987
4988 proc check_effective_target_hw { } {
4989
4990 # All "src/sim" simulators set this one.
4991 if [board_info target exists is_simulator] {
4992 if [board_info target is_simulator] {
4993 return 0
4994 } else {
4995 return 1
4996 }
4997 }
4998
4999 # The "sid" simulators don't set that one, but at least they set
5000 # this one.
5001 if [board_info target exists slow_simulator] {
5002 if [board_info target slow_simulator] {
5003 return 0
5004 } else {
5005 return 1
5006 }
5007 }
5008
5009 return 1
5010 }
5011
5012 # Return 1 if the target is a VxWorks kernel.
5013
5014 proc check_effective_target_vxworks_kernel { } {
5015 return [check_no_compiler_messages vxworks_kernel assembly {
5016 #if !defined __vxworks || defined __RTP__
5017 #error NO
5018 #endif
5019 }]
5020 }
5021
5022 # Return 1 if the target is a VxWorks RTP.
5023
5024 proc check_effective_target_vxworks_rtp { } {
5025 return [check_no_compiler_messages vxworks_rtp assembly {
5026 #if !defined __vxworks || !defined __RTP__
5027 #error NO
5028 #endif
5029 }]
5030 }
5031
5032 # Return 1 if the target is expected to provide wide character support.
5033
5034 proc check_effective_target_wchar { } {
5035 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
5036 return 0
5037 }
5038 return [check_no_compiler_messages wchar assembly {
5039 #include <wchar.h>
5040 }]
5041 }
5042
5043 # Return 1 if the target has <pthread.h>.
5044
5045 proc check_effective_target_pthread_h { } {
5046 return [check_no_compiler_messages pthread_h assembly {
5047 #include <pthread.h>
5048 }]
5049 }
5050
5051 # Return 1 if the target can truncate a file from a file-descriptor,
5052 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
5053 # chsize. We test for a trivially functional truncation; no stubs.
5054 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
5055 # different function to be used.
5056
5057 proc check_effective_target_fd_truncate { } {
5058 set prog {
5059 #define _FILE_OFFSET_BITS 64
5060 #include <unistd.h>
5061 #include <stdio.h>
5062 #include <stdlib.h>
5063 int main ()
5064 {
5065 FILE *f = fopen ("tst.tmp", "wb");
5066 int fd;
5067 const char t[] = "test writing more than ten characters";
5068 char s[11];
5069 int status = 0;
5070 fd = fileno (f);
5071 write (fd, t, sizeof (t) - 1);
5072 lseek (fd, 0, 0);
5073 if (ftruncate (fd, 10) != 0)
5074 status = 1;
5075 close (fd);
5076 fclose (f);
5077 if (status)
5078 {
5079 unlink ("tst.tmp");
5080 exit (status);
5081 }
5082 f = fopen ("tst.tmp", "rb");
5083 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
5084 status = 1;
5085 fclose (f);
5086 unlink ("tst.tmp");
5087 exit (status);
5088 }
5089 }
5090
5091 if { [check_runtime ftruncate $prog] } {
5092 return 1;
5093 }
5094
5095 regsub "ftruncate" $prog "chsize" prog
5096 return [check_runtime chsize $prog]
5097 }
5098
5099 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
5100
5101 proc add_options_for_c99_runtime { flags } {
5102 if { [istarget *-*-solaris2*] } {
5103 return "$flags -std=c99"
5104 }
5105 if { [istarget powerpc-*-darwin*] } {
5106 return "$flags -mmacosx-version-min=10.3"
5107 }
5108 return $flags
5109 }
5110
5111 # Add to FLAGS all the target-specific flags needed to enable
5112 # full IEEE compliance mode.
5113
5114 proc add_options_for_ieee { flags } {
5115 if { [istarget alpha*-*-*]
5116 || [istarget sh*-*-*] } {
5117 return "$flags -mieee"
5118 }
5119 if { [istarget rx-*-*] } {
5120 return "$flags -mnofpu"
5121 }
5122 return $flags
5123 }
5124
5125 # Add to FLAGS the flags needed to enable functions to bind locally
5126 # when using pic/PIC passes in the testsuite.
5127
5128 proc add_options_for_bind_pic_locally { flags } {
5129 if {[check_no_compiler_messages using_pic2 assembly {
5130 #if __PIC__ != 2
5131 #error FOO
5132 #endif
5133 }]} {
5134 return "$flags -fPIE"
5135 }
5136 if {[check_no_compiler_messages using_pic1 assembly {
5137 #if __PIC__ != 1
5138 #error FOO
5139 #endif
5140 }]} {
5141 return "$flags -fpie"
5142 }
5143
5144 return $flags
5145 }
5146
5147 # Add to FLAGS the flags needed to enable 64-bit vectors.
5148
5149 proc add_options_for_double_vectors { flags } {
5150 if [is-effective-target arm_neon_ok] {
5151 return "$flags -mvectorize-with-neon-double"
5152 }
5153
5154 return $flags
5155 }
5156
5157 # Return 1 if the target provides a full C99 runtime.
5158
5159 proc check_effective_target_c99_runtime { } {
5160 return [check_cached_effective_target c99_runtime {
5161 global srcdir
5162
5163 set file [open "$srcdir/gcc.dg/builtins-config.h"]
5164 set contents [read $file]
5165 close $file
5166 append contents {
5167 #ifndef HAVE_C99_RUNTIME
5168 #error FOO
5169 #endif
5170 }
5171 check_no_compiler_messages_nocache c99_runtime assembly \
5172 $contents [add_options_for_c99_runtime ""]
5173 }]
5174 }
5175
5176 # Return 1 if target wchar_t is at least 4 bytes.
5177
5178 proc check_effective_target_4byte_wchar_t { } {
5179 return [check_no_compiler_messages 4byte_wchar_t object {
5180 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
5181 }]
5182 }
5183
5184 # Return 1 if the target supports automatic stack alignment.
5185
5186 proc check_effective_target_automatic_stack_alignment { } {
5187 # Ordinarily x86 supports automatic stack alignment ...
5188 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
5189 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
5190 # ... except Win64 SEH doesn't. Succeed for Win32 though.
5191 return [check_effective_target_ilp32];
5192 }
5193 return 1;
5194 }
5195 return 0;
5196 }
5197
5198 # Return true if we are compiling for AVX target.
5199
5200 proc check_avx_available { } {
5201 if { [check_no_compiler_messages avx_available assembly {
5202 #ifndef __AVX__
5203 #error unsupported
5204 #endif
5205 } ""] } {
5206 return 1;
5207 }
5208 return 0;
5209 }
5210
5211 # Return true if 32- and 16-bytes vectors are available.
5212
5213 proc check_effective_target_vect_sizes_32B_16B { } {
5214 return [check_avx_available];
5215 }
5216
5217 # Return true if 128-bits vectors are preferred even if 256-bits vectors
5218 # are available.
5219
5220 proc check_prefer_avx128 { } {
5221 if ![check_avx_available] {
5222 return 0;
5223 }
5224 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
5225 float a[1024],b[1024],c[1024];
5226 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
5227 } "-O2 -ftree-vectorize"]
5228 }
5229
5230
5231 # Return 1 if avx512f instructions can be compiled.
5232
5233 proc check_effective_target_avx512f { } {
5234 return [check_no_compiler_messages avx512f object {
5235 typedef double __m512d __attribute__ ((__vector_size__ (64)));
5236
5237 __m512d _mm512_add (__m512d a)
5238 {
5239 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
5240 }
5241 } "-O2 -mavx512f" ]
5242 }
5243
5244 # Return 1 if avx instructions can be compiled.
5245
5246 proc check_effective_target_avx { } {
5247 return [check_no_compiler_messages avx object {
5248 void _mm256_zeroall (void)
5249 {
5250 __builtin_ia32_vzeroall ();
5251 }
5252 } "-O2 -mavx" ]
5253 }
5254
5255 # Return 1 if avx2 instructions can be compiled.
5256 proc check_effective_target_avx2 { } {
5257 return [check_no_compiler_messages avx2 object {
5258 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
5259 __v4di
5260 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
5261 {
5262 return __builtin_ia32_andnotsi256 (__X, __Y);
5263 }
5264 } "-O0 -mavx2" ]
5265 }
5266
5267 # Return 1 if sse instructions can be compiled.
5268 proc check_effective_target_sse { } {
5269 return [check_no_compiler_messages sse object {
5270 int main ()
5271 {
5272 __builtin_ia32_stmxcsr ();
5273 return 0;
5274 }
5275 } "-O2 -msse" ]
5276 }
5277
5278 # Return 1 if sse2 instructions can be compiled.
5279 proc check_effective_target_sse2 { } {
5280 return [check_no_compiler_messages sse2 object {
5281 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
5282
5283 __m128i _mm_srli_si128 (__m128i __A, int __N)
5284 {
5285 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
5286 }
5287 } "-O2 -msse2" ]
5288 }
5289
5290 # Return 1 if F16C instructions can be compiled.
5291
5292 proc check_effective_target_f16c { } {
5293 return [check_no_compiler_messages f16c object {
5294 #include "immintrin.h"
5295 float
5296 foo (unsigned short val)
5297 {
5298 return _cvtsh_ss (val);
5299 }
5300 } "-O2 -mf16c" ]
5301 }
5302
5303 # Return 1 if C wchar_t type is compatible with char16_t.
5304
5305 proc check_effective_target_wchar_t_char16_t_compatible { } {
5306 return [check_no_compiler_messages wchar_t_char16_t object {
5307 __WCHAR_TYPE__ wc;
5308 __CHAR16_TYPE__ *p16 = &wc;
5309 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
5310 }]
5311 }
5312
5313 # Return 1 if C wchar_t type is compatible with char32_t.
5314
5315 proc check_effective_target_wchar_t_char32_t_compatible { } {
5316 return [check_no_compiler_messages wchar_t_char32_t object {
5317 __WCHAR_TYPE__ wc;
5318 __CHAR32_TYPE__ *p32 = &wc;
5319 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
5320 }]
5321 }
5322
5323 # Return 1 if pow10 function exists.
5324
5325 proc check_effective_target_pow10 { } {
5326 return [check_runtime pow10 {
5327 #include <math.h>
5328 int main () {
5329 double x;
5330 x = pow10 (1);
5331 return 0;
5332 }
5333 } "-lm" ]
5334 }
5335
5336 # Return 1 if current options generate DFP instructions, 0 otherwise.
5337
5338 proc check_effective_target_hard_dfp {} {
5339 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
5340 typedef float d64 __attribute__((mode(DD)));
5341 d64 x, y, z;
5342 void foo (void) { z = x + y; }
5343 }]
5344 }
5345
5346 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
5347 # for strchr etc. functions.
5348
5349 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
5350 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
5351 #include <string.h>
5352 #include <wchar.h>
5353 #if !defined(__cplusplus) \
5354 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
5355 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
5356 ISO C++ correct string.h and wchar.h protos not supported.
5357 #else
5358 int i;
5359 #endif
5360 }]
5361 }
5362
5363 # Return 1 if GNU as is used.
5364
5365 proc check_effective_target_gas { } {
5366 global use_gas_saved
5367 global tool
5368
5369 if {![info exists use_gas_saved]} {
5370 # Check if the as used by gcc is GNU as.
5371 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
5372 # Provide /dev/null as input, otherwise gas times out reading from
5373 # stdin.
5374 set status [remote_exec host "$gcc_as" "-v /dev/null"]
5375 set as_output [lindex $status 1]
5376 if { [ string first "GNU" $as_output ] >= 0 } {
5377 set use_gas_saved 1
5378 } else {
5379 set use_gas_saved 0
5380 }
5381 }
5382 return $use_gas_saved
5383 }
5384
5385 # Return 1 if GNU ld is used.
5386
5387 proc check_effective_target_gld { } {
5388 global use_gld_saved
5389 global tool
5390
5391 if {![info exists use_gld_saved]} {
5392 # Check if the ld used by gcc is GNU ld.
5393 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
5394 set status [remote_exec host "$gcc_ld" "--version"]
5395 set ld_output [lindex $status 1]
5396 if { [ string first "GNU" $ld_output ] >= 0 } {
5397 set use_gld_saved 1
5398 } else {
5399 set use_gld_saved 0
5400 }
5401 }
5402 return $use_gld_saved
5403 }
5404
5405 # Return 1 if the compiler has been configure with link-time optimization
5406 # (LTO) support.
5407
5408 proc check_effective_target_lto { } {
5409 global ENABLE_LTO
5410 return [info exists ENABLE_LTO]
5411 }
5412
5413 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
5414
5415 proc check_effective_target_maybe_x32 { } {
5416 return [check_no_compiler_messages maybe_x32 object {
5417 void foo (void) {}
5418 } "-mx32 -maddress-mode=short"]
5419 }
5420
5421 # Return 1 if this target supports the -fsplit-stack option, 0
5422 # otherwise.
5423
5424 proc check_effective_target_split_stack {} {
5425 return [check_no_compiler_messages split_stack object {
5426 void foo (void) { }
5427 } "-fsplit-stack"]
5428 }
5429
5430 # Return 1 if this target supports the -masm=intel option, 0
5431 # otherwise
5432
5433 proc check_effective_target_masm_intel {} {
5434 return [check_no_compiler_messages masm_intel object {
5435 extern void abort (void);
5436 } "-masm=intel"]
5437 }
5438
5439 # Return 1 if the language for the compiler under test is C.
5440
5441 proc check_effective_target_c { } {
5442 global tool
5443 if [string match $tool "gcc"] {
5444 return 1
5445 }
5446 return 0
5447 }
5448
5449 # Return 1 if the language for the compiler under test is C++.
5450
5451 proc check_effective_target_c++ { } {
5452 global tool
5453 if [string match $tool "g++"] {
5454 return 1
5455 }
5456 return 0
5457 }
5458
5459 # Check whether the current active language standard supports the features
5460 # of C++11/C++1y by checking for the presence of one of the -std
5461 # flags. This assumes that the default for the compiler is C++98, and that
5462 # there will never be multiple -std= arguments on the command line.
5463 proc check_effective_target_c++11_only { } {
5464 if ![check_effective_target_c++] {
5465 return 0
5466 }
5467 return [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }]
5468 }
5469 proc check_effective_target_c++11 { } {
5470 if [check_effective_target_c++11_only] {
5471 return 1
5472 }
5473 return [check_effective_target_c++1y]
5474 }
5475 proc check_effective_target_c++11_down { } {
5476 if ![check_effective_target_c++] {
5477 return 0
5478 }
5479 return ![check_effective_target_c++1y]
5480 }
5481
5482 proc check_effective_target_c++1y_only { } {
5483 if ![check_effective_target_c++] {
5484 return 0
5485 }
5486 return [check-flags { { } { } { -std=c++1y -std=gnu++1y -std=c++14 -std=gnu++14 } }]
5487 }
5488 proc check_effective_target_c++1y { } {
5489 return [check_effective_target_c++1y_only]
5490 }
5491
5492 proc check_effective_target_c++98_only { } {
5493 if ![check_effective_target_c++] {
5494 return 0
5495 }
5496 return ![check_effective_target_c++11]
5497 }
5498
5499 # Return 1 if expensive testcases should be run.
5500
5501 proc check_effective_target_run_expensive_tests { } {
5502 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
5503 return 1
5504 }
5505 return 0
5506 }
5507
5508 # Returns 1 if "mempcpy" is available on the target system.
5509
5510 proc check_effective_target_mempcpy {} {
5511 return [check_function_available "mempcpy"]
5512 }
5513
5514 # Check whether the vectorizer tests are supported by the target and
5515 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
5516 # Set dg-do-what-default to either compile or run, depending on target
5517 # capabilities. Return 1 if vectorizer tests are supported by
5518 # target, 0 otherwise.
5519
5520 proc check_vect_support_and_set_flags { } {
5521 global DEFAULT_VECTCFLAGS
5522 global dg-do-what-default
5523
5524 if [istarget powerpc-*paired*] {
5525 lappend DEFAULT_VECTCFLAGS "-mpaired"
5526 if [check_750cl_hw_available] {
5527 set dg-do-what-default run
5528 } else {
5529 set dg-do-what-default compile
5530 }
5531 } elseif [istarget powerpc*-*-*] {
5532 # Skip targets not supporting -maltivec.
5533 if ![is-effective-target powerpc_altivec_ok] {
5534 return 0
5535 }
5536
5537 lappend DEFAULT_VECTCFLAGS "-maltivec"
5538 if [check_p8vector_hw_available] {
5539 lappend DEFAULT_VECTCFLAGS "-mpower8-vector" "-mno-allow-movmisalign"
5540 } elseif [check_vsx_hw_available] {
5541 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
5542 }
5543
5544 if [check_vmx_hw_available] {
5545 set dg-do-what-default run
5546 } else {
5547 if [is-effective-target ilp32] {
5548 # Specify a cpu that supports VMX for compile-only tests.
5549 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
5550 }
5551 set dg-do-what-default compile
5552 }
5553 } elseif { [istarget spu-*-*] } {
5554 set dg-do-what-default run
5555 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
5556 lappend DEFAULT_VECTCFLAGS "-msse2"
5557 if { [check_effective_target_sse2_runtime] } {
5558 set dg-do-what-default run
5559 } else {
5560 set dg-do-what-default compile
5561 }
5562 } elseif { [istarget mips*-*-*]
5563 && ([check_effective_target_mpaired_single]
5564 || [check_effective_target_mips_loongson])
5565 && [check_effective_target_nomips16] } {
5566 if { [check_effective_target_mpaired_single] } {
5567 lappend DEFAULT_VECTCFLAGS "-mpaired-single"
5568 }
5569 set dg-do-what-default run
5570 } elseif [istarget sparc*-*-*] {
5571 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
5572 if [check_effective_target_ultrasparc_hw] {
5573 set dg-do-what-default run
5574 } else {
5575 set dg-do-what-default compile
5576 }
5577 } elseif [istarget alpha*-*-*] {
5578 # Alpha's vectorization capabilities are extremely limited.
5579 # It's more effort than its worth disabling all of the tests
5580 # that it cannot pass. But if you actually want to see what
5581 # does work, command out the return.
5582 return 0
5583
5584 lappend DEFAULT_VECTCFLAGS "-mmax"
5585 if [check_alpha_max_hw_available] {
5586 set dg-do-what-default run
5587 } else {
5588 set dg-do-what-default compile
5589 }
5590 } elseif [istarget ia64-*-*] {
5591 set dg-do-what-default run
5592 } elseif [is-effective-target arm_neon_ok] {
5593 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
5594 # NEON does not support denormals, so is not used for vectorization by
5595 # default to avoid loss of precision. We must pass -ffast-math to test
5596 # vectorization of float operations.
5597 lappend DEFAULT_VECTCFLAGS "-ffast-math"
5598 if [is-effective-target arm_neon_hw] {
5599 set dg-do-what-default run
5600 } else {
5601 set dg-do-what-default compile
5602 }
5603 } elseif [istarget "aarch64*-*-*"] {
5604 set dg-do-what-default run
5605 } else {
5606 return 0
5607 }
5608
5609 return 1
5610 }
5611
5612 proc check_effective_target_non_strict_align {} {
5613 return [check_no_compiler_messages non_strict_align assembly {
5614 char *y;
5615 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
5616 c *z;
5617 void foo(void) { z = (c *) y; }
5618 } "-Wcast-align"]
5619 }
5620
5621 # Return 1 if the target has <ucontext.h>.
5622
5623 proc check_effective_target_ucontext_h { } {
5624 return [check_no_compiler_messages ucontext_h assembly {
5625 #include <ucontext.h>
5626 }]
5627 }
5628
5629 proc check_effective_target_aarch64_tiny { } {
5630 if { [istarget aarch64*-*-*] } {
5631 return [check_no_compiler_messages aarch64_tiny object {
5632 #ifdef __AARCH64_CMODEL_TINY__
5633 int dummy;
5634 #else
5635 #error target not AArch64 tiny code model
5636 #endif
5637 }]
5638 } else {
5639 return 0
5640 }
5641 }
5642
5643 proc check_effective_target_aarch64_small { } {
5644 if { [istarget aarch64*-*-*] } {
5645 return [check_no_compiler_messages aarch64_small object {
5646 #ifdef __AARCH64_CMODEL_SMALL__
5647 int dummy;
5648 #else
5649 #error target not AArch64 small code model
5650 #endif
5651 }]
5652 } else {
5653 return 0
5654 }
5655 }
5656
5657 proc check_effective_target_aarch64_large { } {
5658 if { [istarget aarch64*-*-*] } {
5659 return [check_no_compiler_messages aarch64_large object {
5660 #ifdef __AARCH64_CMODEL_LARGE__
5661 int dummy;
5662 #else
5663 #error target not AArch64 large code model
5664 #endif
5665 }]
5666 } else {
5667 return 0
5668 }
5669 }
5670
5671 # Return 1 if <fenv.h> is available with all the standard IEEE
5672 # exceptions and floating-point exceptions are raised by arithmetic
5673 # operations. (If the target requires special options for "inexact"
5674 # exceptions, those need to be specified in the testcases.)
5675
5676 proc check_effective_target_fenv_exceptions {} {
5677 return [check_runtime fenv_exceptions {
5678 #include <fenv.h>
5679 #include <stdlib.h>
5680 #ifndef FE_DIVBYZERO
5681 # error Missing FE_DIVBYZERO
5682 #endif
5683 #ifndef FE_INEXACT
5684 # error Missing FE_INEXACT
5685 #endif
5686 #ifndef FE_INVALID
5687 # error Missing FE_INVALID
5688 #endif
5689 #ifndef FE_OVERFLOW
5690 # error Missing FE_OVERFLOW
5691 #endif
5692 #ifndef FE_UNDERFLOW
5693 # error Missing FE_UNDERFLOW
5694 #endif
5695 volatile float a = 0.0f, r;
5696 int
5697 main (void)
5698 {
5699 r = a / a;
5700 if (fetestexcept (FE_INVALID))
5701 exit (0);
5702 else
5703 abort ();
5704 }
5705 } "-std=gnu99"]
5706 }
5707
5708 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
5709
5710 proc check_effective_target_logical_op_short_circuit {} {
5711 if { [istarget mips*-*-*]
5712 || [istarget arc*-*-*]
5713 || [istarget avr*-*-*]
5714 || [istarget crisv32-*-*] || [istarget cris-*-*]
5715 || [istarget s390*-*-*]
5716 || [check_effective_target_arm_cortex_m] } {
5717 return 1
5718 }
5719 return 0
5720 }
5721
5722 # Record that dg-final test TEST requires convential compilation.
5723
5724 proc force_conventional_output_for { test } {
5725 if { [info proc $test] == "" } {
5726 perror "$test does not exist"
5727 exit 1
5728 }
5729 proc ${test}_required_options {} {
5730 global gcc_force_conventional_output
5731 return $gcc_force_conventional_output
5732 }
5733 }
5734