1 # Copyright (C) 1999-2017 Free Software Foundation, Inc.
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
20 # This file defines procs for determining features supported by the target.
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
34 # "! Fortran" for Fortran code,
36 # "// ObjC++" for ObjC++
38 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
39 # allow for ObjC/ObjC++ specific flags.
40 proc check_compile {basename type contents args} {
42 verbose "check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources] {
48 set tmp_additional_sources "$additional_sources"
49 set additional_sources ""
52 if { [llength $args] > 0 } {
53 set options [list "additional_flags=[lindex $args 0]"]
57 switch -glob -- $contents {
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default { set src ${basename}[pid].c }
72 set compile_type $type
74 assembly { set output ${basename}[pid].s }
75 object { set output ${basename}[pid].o }
76 executable { set output ${basename}[pid].exe }
78 set output ${basename}[pid].s
79 lappend options "additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines [${tool}_target_compile $src $output $compile_type "$options"]
89 set scan_output $output
90 # Don't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp "rtl-(.*)" $type dummy rtl_type] {
93 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources] {
99 set additional_sources "$tmp_additional_sources"
102 return [list $lines $scan_output]
105 proc current_target_name { } {
107 if [info exists target_info(target,name)] {
108 set answer $target_info(target,name)
115 # Implement an effective-target check for property PROP by invoking
116 # the Tcl command ARGS and seeing if it returns true.
118 proc check_cached_effective_target { prop args } {
122 set target [current_target_name]
123 if {![info exists et_cache($prop,target)]
124 || $et_cache($prop,target) != $target} {
125 verbose "check_cached_effective_target $prop: checking $target" 2
126 set et_cache($prop,target) $target
127 set et_cache($prop,value) [uplevel eval $args]
128 if {![info exists et_prop_list]
129 || [lsearch $et_prop_list $prop] < 0} {
130 lappend et_prop_list $prop
132 verbose "check_cached_effective_target cached list is now: $et_prop_list" 2
134 set value $et_cache($prop,value)
135 verbose "check_cached_effective_target $prop: returning $value for $target" 2
139 # Clear effective-target cache. This is useful after testing
140 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
142 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
143 # do a clear_effective_target_cache at the end as the target cache can
144 # make decisions based upon the flags, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init/asan_finish pair.
148 proc clear_effective_target_cache { } {
152 if {[info exists et_prop_list]} {
153 verbose "clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list {
155 unset et_cache($prop,value)
156 unset et_cache($prop,target)
162 # Like check_compile, but delete the output file and return true if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache {args} {
165 set result [eval check_compile $args]
166 set lines [lindex $result 0]
167 set output [lindex $result 1]
168 remote_file build delete $output
169 return [string match "" $lines]
172 # Like check_no_compiler_messages_nocache, but cache the result.
173 # PROP is the property we're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP, otherwise they satisfy it
185 # if they do match regular expression PATTERN. (PATTERN can start
186 # with something like "[!]" if the regular expression needs to match
187 # "!" as the first character.)
189 # Delete the output file before returning. The other arguments are
190 # as for check_compile.
191 proc check_no_messages_and_pattern_nocache {basename pattern args} {
194 set result [eval [list check_compile $basename] $args]
195 set lines [lindex $result 0]
196 set output [lindex $result 1]
199 if { [string match "" $lines] } {
200 set chan [open "$output"]
201 set invert [regexp {^!(.*)} $pattern dummy pattern]
202 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
206 remote_file build delete $output
210 # Like check_no_messages_and_pattern_nocache, but cache the result.
211 # PROP is the property we're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
240 remote_file build delete $output
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking, and doubles as a prefix for temporary
247 proc check_runtime {prop args} {
250 return [check_cached_effective_target $prop {
251 eval [list check_runtime_nocache $prop] $args
255 # Return 1 if GCC was configured with $pattern.
256 proc check_configured_with { pattern } {
259 set gcc_output [${tool}_target_compile "-v" "" "none" ""]
260 if { [ regexp "Configured with: \[^\n\]*$pattern" $gcc_output ] } {
261 verbose "Matched: $pattern" 2
265 verbose "Failed to match: $pattern" 2
269 ###############################
270 # proc check_weak_available { }
271 ###############################
273 # weak symbols are only supported in some configs/object formats
274 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
276 proc check_weak_available { } {
279 # All mips targets should support it
281 if { [ string first "mips" $target_cpu ] >= 0 } {
285 # All AIX targets should support it
287 if { [istarget *-*-aix*] } {
291 # All solaris2 targets should support it
293 if { [istarget *-*-solaris2*] } {
297 # Windows targets Cygwin and MingW32 support it
299 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
303 # HP-UX 10.X doesn't support it
305 if { [istarget hppa*-*-hpux10*] } {
309 # nvptx (nearly) supports it
311 if { [istarget nvptx-*-*] } {
315 # ELF and ECOFF support it. a.out does with gas/gld but may also with
316 # other linkers, so we should try it
318 set objformat [gcc_target_object_format]
326 unknown { return -1 }
331 ###############################
332 # proc check_weak_override_available { }
333 ###############################
335 # Like check_weak_available, but return 0 if weak symbol definitions
336 # cannot be overridden.
338 proc check_weak_override_available { } {
339 if { [istarget *-*-mingw*] } {
342 return [check_weak_available]
345 ###############################
346 # proc check_visibility_available { what_kind }
347 ###############################
349 # The visibility attribute is only support in some object formats
350 # This proc returns 1 if it is supported, 0 if not.
351 # The argument is the kind of visibility, default/protected/hidden/internal.
353 proc check_visibility_available { what_kind } {
354 if [string match "" $what_kind] { set what_kind "hidden" }
356 return [check_no_compiler_messages visibility_available_$what_kind object "
357 void f() __attribute__((visibility(\"$what_kind\")));
362 ###############################
363 # proc check_alias_available { }
364 ###############################
366 # Determine if the target toolchain supports the alias attribute.
368 # Returns 2 if the target supports aliases. Returns 1 if the target
369 # only supports weak aliased. Returns 0 if the target does not
370 # support aliases at all. Returns -1 if support for aliases could not
373 proc check_alias_available { } {
374 global alias_available_saved
377 if [info exists alias_available_saved] {
378 verbose "check_alias_available returning saved $alias_available_saved" 2
382 verbose "check_alias_available compiling testfile $src" 2
383 set f [open $src "w"]
384 # Compile a small test program. The definition of "g" is
385 # necessary to keep the Solaris assembler from complaining
387 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
388 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
390 set lines [${tool}_target_compile $src $obj object ""]
392 remote_file build delete $obj
394 if [string match "" $lines] then {
395 # No error messages, everything is OK.
396 set alias_available_saved 2
398 if [regexp "alias definitions not supported" $lines] {
399 verbose "check_alias_available target does not support aliases" 2
401 set objformat [gcc_target_object_format]
403 if { $objformat == "elf" } {
404 verbose "check_alias_available but target uses ELF format, so it ought to" 2
405 set alias_available_saved -1
407 set alias_available_saved 0
410 if [regexp "only weak aliases are supported" $lines] {
411 verbose "check_alias_available target supports only weak aliases" 2
412 set alias_available_saved 1
414 set alias_available_saved -1
419 verbose "check_alias_available returning $alias_available_saved" 2
422 return $alias_available_saved
425 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
427 proc check_effective_target_alias { } {
428 if { [check_alias_available] < 2 } {
435 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
437 proc check_ifunc_available { } {
438 return [check_no_compiler_messages ifunc_available object {
443 void f() __attribute__((ifunc("g")));
447 # Returns true if --gc-sections is supported on the target.
449 proc check_gc_sections_available { } {
450 global gc_sections_available_saved
453 if {![info exists gc_sections_available_saved]} {
454 # Some targets don't support gc-sections despite whatever's
455 # advertised by ld's options.
456 if { [istarget alpha*-*-*]
457 || [istarget ia64-*-*] } {
458 set gc_sections_available_saved 0
462 # elf2flt uses -q (--emit-relocs), which is incompatible with
464 if { [board_info target exists ldflags]
465 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
466 set gc_sections_available_saved 0
470 # VxWorks kernel modules are relocatable objects linked with -r,
471 # while RTP executables are linked with -q (--emit-relocs).
472 # Both of these options are incompatible with --gc-sections.
473 if { [istarget *-*-vxworks*] } {
474 set gc_sections_available_saved 0
478 # Check if the ld used by gcc supports --gc-sections.
479 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
480 set ld_output [remote_exec host "$gcc_ld" "--help"]
481 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
482 set gc_sections_available_saved 1
484 set gc_sections_available_saved 0
487 return $gc_sections_available_saved
490 # Return 1 if according to target_info struct and explicit target list
491 # target is supposed to support trampolines.
493 proc check_effective_target_trampolines { } {
494 if [target_info exists no_trampolines] {
497 if { [istarget avr-*-*]
498 || [istarget msp430-*-*]
499 || [istarget nvptx-*-*]
500 || [istarget hppa2.0w-hp-hpux11.23]
501 || [istarget hppa64-hp-hpux11.23] } {
507 # Return 1 if according to target_info struct and explicit target list
508 # target disables -fdelete-null-pointer-checks. Targets should return 0
509 # if they simply default to -fno-delete-null-pointer-checks but obey
510 # -fdelete-null-pointer-checks when passed explicitly (and tests that
511 # depend on this option should do that).
513 proc check_effective_target_keeps_null_pointer_checks { } {
514 if [target_info exists keeps_null_pointer_checks] {
517 if { [istarget avr-*-*] } {
523 # Return the autofdo profile wrapper
525 # Linux by default allows 516KB of perf event buffers
526 # in /proc/sys/kernel/perf_event_mlock_kb
527 # Each individual perf tries to grab it
528 # This causes problems with parallel test suite runs. Instead
529 # limit us to 8 pages (32K), which should be good enough
530 # for the small test programs. With the default settings
531 # this allows parallelism of 16 and higher of parallel gcc-auto-profile
532 proc profopt-perf-wrapper { } {
534 return "$srcdir/../config/i386/gcc-auto-profile -o perf.data -m8 "
537 # Return true if profiling is supported on the target.
539 proc check_profiling_available { test_what } {
540 global profiling_available_saved
542 verbose "Profiling argument is <$test_what>" 1
544 # These conditions depend on the argument so examine them before
545 # looking at the cache variable.
547 # Tree profiling requires TLS runtime support.
548 if { $test_what == "-fprofile-generate" } {
549 if { ![check_effective_target_tls_runtime] } {
554 if { $test_what == "-fauto-profile" } {
555 if { !([istarget i?86-*-linux*] || [istarget x86_64-*-linux*]) } {
556 verbose "autofdo only supported on linux"
559 # not cross compiling?
561 verbose "autofdo not supported for non native builds"
564 set event [profopt-perf-wrapper]
566 verbose "autofdo not supported"
570 set status [remote_exec host "$srcdir/../config/i386/gcc-auto-profile" "true -v >/dev/null"]
571 if { [lindex $status 0] != 0 } {
572 verbose "autofdo not supported because perf does not work"
576 # no good way to check this in advance -- check later instead.
577 #set status [remote_exec host "create_gcov" "2>/dev/null"]
578 #if { [lindex $status 0] != 255 } {
579 # verbose "autofdo not supported due to missing create_gcov"
584 # Support for -p on solaris2 relies on mcrt1.o which comes with the
585 # vendor compiler. We cannot reliably predict the directory where the
586 # vendor compiler (and thus mcrt1.o) is installed so we can't
587 # necessarily find mcrt1.o even if we have it.
588 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
592 # We don't yet support profiling for MIPS16.
593 if { [istarget mips*-*-*]
594 && ![check_effective_target_nomips16]
595 && ($test_what == "-p" || $test_what == "-pg") } {
599 # MinGW does not support -p.
600 if { [istarget *-*-mingw*] && $test_what == "-p" } {
604 # cygwin does not support -p.
605 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
609 # uClibc does not have gcrt1.o.
610 if { [check_effective_target_uclibc]
611 && ($test_what == "-p" || $test_what == "-pg") } {
615 # Now examine the cache variable.
616 if {![info exists profiling_available_saved]} {
617 # Some targets don't have any implementation of __bb_init_func or are
618 # missing other needed machinery.
619 if {[istarget aarch64*-*-elf]
620 || [istarget am3*-*-linux*]
621 || [istarget arm*-*-eabi*]
622 || [istarget arm*-*-elf]
623 || [istarget arm*-*-symbianelf*]
624 || [istarget avr-*-*]
625 || [istarget bfin-*-*]
626 || [istarget cris-*-*]
627 || [istarget crisv32-*-*]
628 || [istarget fido-*-elf]
629 || [istarget h8300-*-*]
630 || [istarget lm32-*-*]
631 || [istarget m32c-*-elf]
632 || [istarget m68k-*-elf]
633 || [istarget m68k-*-uclinux*]
634 || [istarget mips*-*-elf*]
635 || [istarget mmix-*-*]
636 || [istarget mn10300-*-elf*]
637 || [istarget moxie-*-elf*]
638 || [istarget msp430-*-*]
639 || [istarget nds32*-*-elf]
640 || [istarget nios2-*-elf]
641 || [istarget nvptx-*-*]
642 || [istarget powerpc-*-eabi*]
643 || [istarget powerpc-*-elf]
645 || [istarget tic6x-*-elf]
646 || [istarget visium-*-*]
647 || [istarget xstormy16-*]
648 || [istarget xtensa*-*-elf]
649 || [istarget *-*-rtems*]
650 || [istarget *-*-vxworks*] } {
651 set profiling_available_saved 0
653 set profiling_available_saved 1
657 # -pg link test result can't be cached since it may change between
659 set profiling_working $profiling_available_saved
660 if { $profiling_available_saved == 1
661 && ![check_no_compiler_messages_nocache profiling executable {
662 int main() { return 0; } } "-pg"] } {
663 set profiling_working 0
666 return $profiling_working
669 # Check to see if a target is "freestanding". This is as per the definition
670 # in Section 4 of C99 standard. Effectively, it is a target which supports no
671 # extra headers or libraries other than what is considered essential.
672 proc check_effective_target_freestanding { } {
673 if { [istarget nvptx-*-*] } {
679 # Return 1 if target has packed layout of structure members by
680 # default, 0 otherwise. Note that this is slightly different than
681 # whether the target has "natural alignment": both attributes may be
684 proc check_effective_target_default_packed { } {
685 return [check_no_compiler_messages default_packed assembly {
686 struct x { char a; long b; } c;
687 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
691 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
692 # documentation, where the test also comes from.
694 proc check_effective_target_pcc_bitfield_type_matters { } {
695 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
696 # bitfields, but let's stick to the example code from the docs.
697 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
698 struct foo1 { char x; char :0; char y; };
699 struct foo2 { char x; int :0; char y; };
700 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
704 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
706 proc add_options_for_tls { flags } {
707 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
708 # libthread, so always pass -pthread for native TLS. Same for AIX.
709 # Need to duplicate native TLS check from
710 # check_effective_target_tls_native to avoid recursion.
711 if { ([istarget powerpc-ibm-aix*]) &&
712 [check_no_messages_and_pattern tls_native "!emutls" assembly {
714 int f (void) { return i; }
715 void g (int j) { i = j; }
717 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
722 # Return 1 if indirect jumps are supported, 0 otherwise.
724 proc check_effective_target_indirect_jumps {} {
725 if { [istarget nvptx-*-*] } {
731 # Return 1 if nonlocal goto is supported, 0 otherwise.
733 proc check_effective_target_nonlocal_goto {} {
734 if { [istarget nvptx-*-*] } {
740 # Return 1 if global constructors are supported, 0 otherwise.
742 proc check_effective_target_global_constructor {} {
743 if { [istarget nvptx-*-*] } {
749 # Return 1 if taking label values is supported, 0 otherwise.
751 proc check_effective_target_label_values {} {
752 if { [istarget nvptx-*-*] || [target_info exists gcc,no_label_values] } {
759 # Return 1 if builtin_return_address and builtin_frame_address are
760 # supported, 0 otherwise.
762 proc check_effective_target_return_address {} {
763 if { [istarget nvptx-*-*] } {
769 # Return 1 if the assembler does not verify function types against
770 # calls, 0 otherwise. Such verification will typically show up problems
771 # with K&R C function declarations.
773 proc check_effective_target_untyped_assembly {} {
774 if { [istarget nvptx-*-*] } {
780 # Return 1 if alloca is supported, 0 otherwise.
782 proc check_effective_target_alloca {} {
783 if { [istarget nvptx-*-*] } {
784 return [check_no_compiler_messages alloca assembly {
786 void g (int n) { f (__builtin_alloca (n)); }
792 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
794 proc check_effective_target_tls {} {
795 return [check_no_compiler_messages tls assembly {
797 int f (void) { return i; }
798 void g (int j) { i = j; }
802 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
804 proc check_effective_target_tls_native {} {
805 # VxWorks uses emulated TLS machinery, but with non-standard helper
806 # functions, so we fail to automatically detect it.
807 if { [istarget *-*-vxworks*] } {
811 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
813 int f (void) { return i; }
814 void g (int j) { i = j; }
818 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
820 proc check_effective_target_tls_emulated {} {
821 # VxWorks uses emulated TLS machinery, but with non-standard helper
822 # functions, so we fail to automatically detect it.
823 if { [istarget *-*-vxworks*] } {
827 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
829 int f (void) { return i; }
830 void g (int j) { i = j; }
834 # Return 1 if TLS executables can run correctly, 0 otherwise.
836 proc check_effective_target_tls_runtime {} {
837 # The runtime does not have TLS support, but just
838 # running the test below is insufficient to show this.
839 if { [istarget msp430-*-*] || [istarget visium-*-*] } {
842 return [check_runtime tls_runtime {
843 __thread int thr = 0;
844 int main (void) { return thr; }
845 } [add_options_for_tls ""]]
848 # Return 1 if atomic compare-and-swap is supported on 'int'
850 proc check_effective_target_cas_char {} {
851 return [check_no_compiler_messages cas_char assembly {
852 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
858 proc check_effective_target_cas_int {} {
859 return [check_no_compiler_messages cas_int assembly {
860 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
862 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
870 # Return 1 if -ffunction-sections is supported, 0 otherwise.
872 proc check_effective_target_function_sections {} {
873 # Darwin has its own scheme and silently accepts -ffunction-sections.
874 if { [istarget *-*-darwin*] } {
878 return [check_no_compiler_messages functionsections assembly {
880 } "-ffunction-sections"]
883 # Return 1 if instruction scheduling is available, 0 otherwise.
885 proc check_effective_target_scheduling {} {
886 return [check_no_compiler_messages scheduling object {
888 } "-fschedule-insns"]
891 # Return 1 if trapping arithmetic is available, 0 otherwise.
893 proc check_effective_target_trapping {} {
894 return [check_no_compiler_messages trapping object {
895 int add (int a, int b) { return a + b; }
899 # Return 1 if compilation with -fgraphite is error-free for trivial
902 proc check_effective_target_fgraphite {} {
903 return [check_no_compiler_messages fgraphite object {
908 # Return 1 if compilation with -fopenacc is error-free for trivial
911 proc check_effective_target_fopenacc {} {
912 # nvptx can be built with the device-side bits of openacc, but it
913 # does not make sense to test it as an openacc host.
914 if [istarget nvptx-*-*] { return 0 }
916 return [check_no_compiler_messages fopenacc object {
921 # Return 1 if compilation with -fopenmp is error-free for trivial
924 proc check_effective_target_fopenmp {} {
925 # nvptx can be built with the device-side bits of libgomp, but it
926 # does not make sense to test it as an openmp host.
927 if [istarget nvptx-*-*] { return 0 }
929 return [check_no_compiler_messages fopenmp object {
934 # Return 1 if compilation with -fgnu-tm is error-free for trivial
937 proc check_effective_target_fgnu_tm {} {
938 return [check_no_compiler_messages fgnu_tm object {
943 # Return 1 if the target supports mmap, 0 otherwise.
945 proc check_effective_target_mmap {} {
946 return [check_function_available "mmap"]
949 # Return 1 if the target supports dlopen, 0 otherwise.
950 proc check_effective_target_dlopen {} {
951 return [check_no_compiler_messages dlopen executable {
953 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
954 } [add_options_for_dlopen ""]]
957 proc add_options_for_dlopen { flags } {
961 # Return 1 if the target supports clone, 0 otherwise.
962 proc check_effective_target_clone {} {
963 return [check_function_available "clone"]
966 # Return 1 if the target supports setrlimit, 0 otherwise.
967 proc check_effective_target_setrlimit {} {
968 # Darwin has non-posix compliant RLIMIT_AS
969 if { [istarget *-*-darwin*] } {
972 return [check_function_available "setrlimit"]
975 # Return 1 if the target supports gettimeofday, 0 otherwise.
976 proc check_effective_target_gettimeofday {} {
977 return [check_function_available "gettimeofday"]
980 # Return 1 if the target supports swapcontext, 0 otherwise.
981 proc check_effective_target_swapcontext {} {
982 return [check_no_compiler_messages swapcontext executable {
983 #include <ucontext.h>
986 ucontext_t orig_context,child_context;
987 if (swapcontext(&child_context, &orig_context) < 0) { }
992 # Return 1 if compilation with -pthread is error-free for trivial
995 proc check_effective_target_pthread {} {
996 return [check_no_compiler_messages pthread object {
1001 # Return 1 if compilation with -gstabs is error-free for trivial
1002 # code, 0 otherwise.
1004 proc check_effective_target_stabs {} {
1005 return [check_no_compiler_messages stabs object {
1010 # Return 1 if compilation with -mpe-aligned-commons is error-free
1011 # for trivial code, 0 otherwise.
1013 proc check_effective_target_pe_aligned_commons {} {
1014 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
1015 return [check_no_compiler_messages pe_aligned_commons object {
1017 } "-mpe-aligned-commons"]
1022 # Return 1 if the target supports -static
1023 proc check_effective_target_static {} {
1024 return [check_no_compiler_messages static executable {
1025 int main (void) { return 0; }
1029 # Return 1 if the target supports -fstack-protector
1030 proc check_effective_target_fstack_protector {} {
1031 return [check_runtime fstack_protector {
1032 int main (void) { return 0; }
1033 } "-fstack-protector"]
1036 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
1037 # for trivial code, 0 otherwise. As some targets (ARM for example) only
1038 # warn when -fprofile-use is also supplied we test that combination too.
1040 proc check_effective_target_freorder {} {
1041 if { [check_no_compiler_messages freorder object {
1043 } "-freorder-blocks-and-partition"]
1044 && [check_no_compiler_messages fprofile_use_freorder object {
1046 } "-fprofile-use -freorder-blocks-and-partition"] } {
1052 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
1053 # emitted, 0 otherwise. Whether a shared library can actually be built is
1054 # out of scope for this test.
1056 proc check_effective_target_fpic { } {
1057 # Note that M68K has a multilib that supports -fpic but not
1058 # -fPIC, so we need to check both. We test with a program that
1059 # requires GOT references.
1060 foreach arg {fpic fPIC} {
1061 if [check_no_compiler_messages $arg object {
1062 extern int foo (void); extern int bar;
1063 int baz (void) { return foo () + bar; }
1071 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
1072 # silently. So, we can't rely on above "check_effective_target_fpic" as it
1073 # assumes compiler will give warning if -fpic not supported. Here we check
1074 # whether binutils supports those new -fpic relocation modifiers, and assume
1075 # -fpic is supported if there is binutils support. GCC configuration will
1076 # enable -fpic for AArch64 in this case.
1078 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1079 # memory model -fpic relocation types.
1081 proc check_effective_target_aarch64_small_fpic { } {
1082 if { [istarget aarch64*-*-*] } {
1083 return [check_no_compiler_messages aarch64_small_fpic object {
1084 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1091 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1092 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1093 # in binutils since 2015-03-04 as PR gas/17843.
1095 # This test directive make sure binutils support all features needed by TLS LE
1096 # under -mtls-size=32 on AArch64.
1098 proc check_effective_target_aarch64_tlsle32 { } {
1099 if { [istarget aarch64*-*-*] } {
1100 return [check_no_compiler_messages aarch64_tlsle32 object {
1101 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1108 # Return 1 if -shared is supported, as in no warnings or errors
1109 # emitted, 0 otherwise.
1111 proc check_effective_target_shared { } {
1112 # Note that M68K has a multilib that supports -fpic but not
1113 # -fPIC, so we need to check both. We test with a program that
1114 # requires GOT references.
1115 return [check_no_compiler_messages shared executable {
1116 extern int foo (void); extern int bar;
1117 int baz (void) { return foo () + bar; }
1121 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1123 proc check_effective_target_pie { } {
1124 if { [istarget *-*-darwin\[912\]*]
1125 || [istarget *-*-dragonfly*]
1126 || [istarget *-*-freebsd*]
1127 || [istarget *-*-linux*]
1128 || [istarget *-*-gnu*] } {
1131 if { [istarget *-*-solaris2.1\[1-9\]*] } {
1132 # Full PIE support was added in Solaris 11.x and Solaris 12, but gcc
1133 # errors out if missing, so check for that.
1134 return [check_no_compiler_messages pie executable {
1135 int main (void) { return 0; }
1141 # Return true if the target supports -mpaired-single (as used on MIPS).
1143 proc check_effective_target_mpaired_single { } {
1144 return [check_no_compiler_messages mpaired_single object {
1146 } "-mpaired-single"]
1149 # Return true if the target has access to FPU instructions.
1151 proc check_effective_target_hard_float { } {
1152 if { [istarget mips*-*-*] } {
1153 return [check_no_compiler_messages hard_float assembly {
1154 #if (defined __mips_soft_float || defined __mips16)
1155 #error __mips_soft_float || __mips16
1160 # This proc is actually checking the availabilty of FPU
1161 # support for doubles, so on the RX we must fail if the
1162 # 64-bit double multilib has been selected.
1163 if { [istarget rx-*-*] } {
1165 # return [check_no_compiler_messages hard_float assembly {
1166 #if defined __RX_64_BIT_DOUBLES__
1167 #error __RX_64_BIT_DOUBLES__
1172 # The generic test equates hard_float with "no call for adding doubles".
1173 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1174 double a (double b, double c) { return b + c; }
1178 # Return true if the target is a 64-bit MIPS target.
1180 proc check_effective_target_mips64 { } {
1181 return [check_no_compiler_messages mips64 assembly {
1188 # Return true if the target is a MIPS target that does not produce
1191 proc check_effective_target_nomips16 { } {
1192 return [check_no_compiler_messages nomips16 object {
1196 /* A cheap way of testing for -mflip-mips16. */
1197 void foo (void) { asm ("addiu $20,$20,1"); }
1198 void bar (void) { asm ("addiu $20,$20,1"); }
1203 # Add the options needed for MIPS16 function attributes. At the moment,
1204 # we don't support MIPS16 PIC.
1206 proc add_options_for_mips16_attribute { flags } {
1207 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1210 # Return true if we can force a mode that allows MIPS16 code generation.
1211 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1214 proc check_effective_target_mips16_attribute { } {
1215 return [check_no_compiler_messages mips16_attribute assembly {
1219 #if defined __mips_hard_float \
1220 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1221 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1222 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1224 } [add_options_for_mips16_attribute ""]]
1227 # Return 1 if the target supports long double larger than double when
1228 # using the new ABI, 0 otherwise.
1230 proc check_effective_target_mips_newabi_large_long_double { } {
1231 return [check_no_compiler_messages mips_newabi_large_long_double object {
1232 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1236 # Return true if the target is a MIPS target that has access
1237 # to the LL and SC instructions.
1239 proc check_effective_target_mips_llsc { } {
1240 if { ![istarget mips*-*-*] } {
1243 # Assume that these instructions are always implemented for
1244 # non-elf* targets, via emulation if necessary.
1245 if { ![istarget *-*-elf*] } {
1248 # Otherwise assume LL/SC support for everything but MIPS I.
1249 return [check_no_compiler_messages mips_llsc assembly {
1256 # Return true if the target is a MIPS target that uses in-place relocations.
1258 proc check_effective_target_mips_rel { } {
1259 if { ![istarget mips*-*-*] } {
1262 return [check_no_compiler_messages mips_rel object {
1263 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1264 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1265 #error _ABIN32 && (_ABIN32 || _ABI64)
1270 # Return true if the target is a MIPS target that uses the EABI.
1272 proc check_effective_target_mips_eabi { } {
1273 if { ![istarget mips*-*-*] } {
1276 return [check_no_compiler_messages mips_eabi object {
1283 # Return 1 if the current multilib does not generate PIC by default.
1285 proc check_effective_target_nonpic { } {
1286 return [check_no_compiler_messages nonpic assembly {
1293 # Return 1 if the current multilib generates PIE by default.
1295 proc check_effective_target_pie_enabled { } {
1296 return [check_no_compiler_messages pie_enabled assembly {
1303 # Return 1 if the target generates -fstack-protector by default.
1305 proc check_effective_target_fstack_protector_enabled {} {
1306 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1307 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1308 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1314 # Return 1 if the target does not use a status wrapper.
1316 proc check_effective_target_unwrapped { } {
1317 if { [target_info needs_status_wrapper] != "" \
1318 && [target_info needs_status_wrapper] != "0" } {
1324 # Return true if iconv is supported on the target. In particular IBM1047.
1326 proc check_iconv_available { test_what } {
1329 # If the tool configuration file has not set libiconv, try "-liconv"
1330 if { ![info exists libiconv] } {
1331 set libiconv "-liconv"
1333 set test_what [lindex $test_what 1]
1334 return [check_runtime_nocache $test_what [subst {
1340 cd = iconv_open ("$test_what", "UTF-8");
1341 if (cd == (iconv_t) -1)
1348 # Return true if Cilk Library is supported on the target.
1349 proc check_effective_target_cilkplus_runtime { } {
1350 return [ check_no_compiler_messages_nocache cilkplus_runtime executable {
1354 int __cilkrts_set_param (const char *, const char *);
1356 int x = __cilkrts_set_param ("nworkers", "0");
1359 } "-fcilkplus -lcilkrts" ]
1362 # Return true if the atomic library is supported on the target.
1363 proc check_effective_target_libatomic_available { } {
1364 return [check_no_compiler_messages libatomic_available executable {
1365 int main (void) { return 0; }
1369 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1371 proc check_ascii_locale_available { } {
1375 # Return true if named sections are supported on this target.
1377 proc check_named_sections_available { } {
1378 return [check_no_compiler_messages named_sections assembly {
1379 int __attribute__ ((section("whatever"))) foo;
1383 # Return true if the "naked" function attribute is supported on this target.
1385 proc check_effective_target_naked_functions { } {
1386 return [check_no_compiler_messages naked_functions assembly {
1387 void f() __attribute__((naked));
1391 # Return 1 if the target supports Fortran real kinds larger than real(8),
1394 # When the target name changes, replace the cached result.
1396 proc check_effective_target_fortran_large_real { } {
1397 return [check_no_compiler_messages fortran_large_real executable {
1399 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1406 # Return 1 if the target supports Fortran real kind real(16),
1407 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1408 # this checks for Real(16) only; the other returned real(10) if
1409 # both real(10) and real(16) are available.
1411 # When the target name changes, replace the cached result.
1413 proc check_effective_target_fortran_real_16 { } {
1414 return [check_no_compiler_messages fortran_real_16 executable {
1423 # Return 1 if the target supports Fortran's IEEE modules,
1426 # When the target name changes, replace the cached result.
1428 proc check_effective_target_fortran_ieee { flags } {
1429 return [check_no_compiler_messages fortran_ieee executable {
1431 use, intrinsic :: ieee_features
1437 # Return 1 if the target supports SQRT for the largest floating-point
1438 # type. (Some targets lack the libm support for this FP type.)
1439 # On most targets, this check effectively checks either whether sqrtl is
1440 # available or on __float128 systems whether libquadmath is installed,
1441 # which provides sqrtq.
1443 # When the target name changes, replace the cached result.
1445 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1446 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1448 use iso_fortran_env, only: real_kinds
1449 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1450 real(kind=maxFP), volatile :: x
1458 # Return 1 if the target supports Fortran integer kinds larger than
1459 # integer(8), 0 otherwise.
1461 # When the target name changes, replace the cached result.
1463 proc check_effective_target_fortran_large_int { } {
1464 return [check_no_compiler_messages fortran_large_int executable {
1466 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1467 integer(kind=k) :: i
1472 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1474 # When the target name changes, replace the cached result.
1476 proc check_effective_target_fortran_integer_16 { } {
1477 return [check_no_compiler_messages fortran_integer_16 executable {
1484 # Return 1 if we can statically link libgfortran, 0 otherwise.
1486 # When the target name changes, replace the cached result.
1488 proc check_effective_target_static_libgfortran { } {
1489 return [check_no_compiler_messages static_libgfortran executable {
1496 # Return 1 if we can use the -rdynamic option, 0 otherwise.
1498 proc check_effective_target_rdynamic { } {
1499 return [check_no_compiler_messages rdynamic executable {
1500 int main() { return 0; }
1504 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1506 proc check_effective_target_cilkplus { } {
1507 # Skip cilk-plus tests on int16 and size16 targets for now.
1508 # The cilk-plus tests are not generic enough to cover these
1509 # cases and would throw hundreds of FAILs.
1510 if { [check_effective_target_int16]
1511 || ![check_effective_target_size32plus] } {
1515 # Skip AVR, its RAM is too small and too many tests would fail.
1516 if { [istarget avr-*-*] } {
1520 if { ! [check_effective_target_pthread] } {
1527 proc check_linker_plugin_available { } {
1528 return [check_no_compiler_messages_nocache linker_plugin executable {
1529 int main() { return 0; }
1530 } "-flto -fuse-linker-plugin"]
1533 # Return 1 if the target supports executing 750CL paired-single instructions, 0
1534 # otherwise. Cache the result.
1536 proc check_750cl_hw_available { } {
1537 return [check_cached_effective_target 750cl_hw_available {
1538 # If this is not the right target then we can skip the test.
1539 if { ![istarget powerpc-*paired*] } {
1542 check_runtime_nocache 750cl_hw_available {
1546 asm volatile ("ps_mul v0,v0,v0");
1548 asm volatile ("ps_mul 0,0,0");
1557 # Return 1 if the target OS supports running SSE executables, 0
1558 # otherwise. Cache the result.
1560 proc check_sse_os_support_available { } {
1561 return [check_cached_effective_target sse_os_support_available {
1562 # If this is not the right target then we can skip the test.
1563 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1565 } elseif { [istarget i?86-*-solaris2*] } {
1566 # The Solaris 2 kernel doesn't save and restore SSE registers
1567 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1568 check_runtime_nocache sse_os_support_available {
1571 asm volatile ("movaps %xmm0,%xmm0");
1581 # Return 1 if the target OS supports running AVX executables, 0
1582 # otherwise. Cache the result.
1584 proc check_avx_os_support_available { } {
1585 return [check_cached_effective_target avx_os_support_available {
1586 # If this is not the right target then we can skip the test.
1587 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1590 # Check that OS has AVX and SSE saving enabled.
1591 check_runtime_nocache avx_os_support_available {
1594 unsigned int eax, edx;
1596 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1597 return (eax & 6) != 6;
1604 # Return 1 if the target supports executing SSE instructions, 0
1605 # otherwise. Cache the result.
1607 proc check_sse_hw_available { } {
1608 return [check_cached_effective_target sse_hw_available {
1609 # If this is not the right target then we can skip the test.
1610 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1613 check_runtime_nocache sse_hw_available {
1617 unsigned int eax, ebx, ecx, edx;
1618 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1619 return !(edx & bit_SSE);
1627 # Return 1 if the target supports executing MIPS Paired-Single instructions,
1628 # 0 otherwise. Cache the result.
1630 proc check_mpaired_single_hw_available { } {
1631 return [check_cached_effective_target mpaired_single_hw_available {
1632 # If this is not the right target then we can skip the test.
1633 if { !([istarget mips*-*-*]) } {
1636 check_runtime_nocache mpaired_single_hw_available {
1639 asm volatile ("pll.ps $f2,$f4,$f6");
1647 # Return 1 if the target supports executing Loongson vector instructions,
1648 # 0 otherwise. Cache the result.
1650 proc check_mips_loongson_hw_available { } {
1651 return [check_cached_effective_target mips_loongson_hw_available {
1652 # If this is not the right target then we can skip the test.
1653 if { !([istarget mips*-*-*]) } {
1656 check_runtime_nocache mips_loongson_hw_available {
1657 #include <loongson.h>
1660 asm volatile ("paddw $f2,$f4,$f6");
1668 # Return 1 if the target supports executing MIPS MSA instructions, 0
1669 # otherwise. Cache the result.
1671 proc check_mips_msa_hw_available { } {
1672 return [check_cached_effective_target mips_msa_hw_available {
1673 # If this is not the right target then we can skip the test.
1674 if { !([istarget mips*-*-*]) } {
1677 check_runtime_nocache mips_msa_hw_available {
1678 #if !defined(__mips_msa)
1679 #error "MSA NOT AVAIL"
1681 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
1682 #error "MSA NOT AVAIL FOR ISA REV < 2"
1684 #if !defined(__mips_hard_float)
1685 #error "MSA HARD_FLOAT REQUIRED"
1687 #if __mips_fpr != 64
1688 #error "MSA 64-bit FPR REQUIRED"
1694 v8i16 v = __builtin_msa_ldi_h (0);
1704 # Return 1 if the target supports executing SSE2 instructions, 0
1705 # otherwise. Cache the result.
1707 proc check_sse2_hw_available { } {
1708 return [check_cached_effective_target sse2_hw_available {
1709 # If this is not the right target then we can skip the test.
1710 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1713 check_runtime_nocache sse2_hw_available {
1717 unsigned int eax, ebx, ecx, edx;
1718 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1719 return !(edx & bit_SSE2);
1727 # Return 1 if the target supports executing SSE4 instructions, 0
1728 # otherwise. Cache the result.
1730 proc check_sse4_hw_available { } {
1731 return [check_cached_effective_target sse4_hw_available {
1732 # If this is not the right target then we can skip the test.
1733 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1736 check_runtime_nocache sse4_hw_available {
1740 unsigned int eax, ebx, ecx, edx;
1741 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1742 return !(ecx & bit_SSE4_2);
1750 # Return 1 if the target supports executing AVX instructions, 0
1751 # otherwise. Cache the result.
1753 proc check_avx_hw_available { } {
1754 return [check_cached_effective_target avx_hw_available {
1755 # If this is not the right target then we can skip the test.
1756 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1759 check_runtime_nocache avx_hw_available {
1763 unsigned int eax, ebx, ecx, edx;
1764 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1765 return ((ecx & (bit_AVX | bit_OSXSAVE))
1766 != (bit_AVX | bit_OSXSAVE));
1774 # Return 1 if the target supports executing AVX2 instructions, 0
1775 # otherwise. Cache the result.
1777 proc check_avx2_hw_available { } {
1778 return [check_cached_effective_target avx2_hw_available {
1779 # If this is not the right target then we can skip the test.
1780 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1783 check_runtime_nocache avx2_hw_available {
1787 unsigned int eax, ebx, ecx, edx;
1788 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx)
1789 || ((ecx & bit_OSXSAVE) != bit_OSXSAVE))
1792 if (__get_cpuid_max (0, NULL) < 7)
1795 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1797 return (ebx & bit_AVX2) != bit_AVX2;
1804 # Return 1 if the target supports running SSE executables, 0 otherwise.
1806 proc check_effective_target_sse_runtime { } {
1807 if { [check_effective_target_sse]
1808 && [check_sse_hw_available]
1809 && [check_sse_os_support_available] } {
1815 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1817 proc check_effective_target_sse2_runtime { } {
1818 if { [check_effective_target_sse2]
1819 && [check_sse2_hw_available]
1820 && [check_sse_os_support_available] } {
1826 # Return 1 if the target supports running SSE4 executables, 0 otherwise.
1828 proc check_effective_target_sse4_runtime { } {
1829 if { [check_effective_target_sse4]
1830 && [check_sse4_hw_available]
1831 && [check_sse_os_support_available] } {
1837 # Return 1 if the target supports running MIPS Paired-Single
1838 # executables, 0 otherwise.
1840 proc check_effective_target_mpaired_single_runtime { } {
1841 if { [check_effective_target_mpaired_single]
1842 && [check_mpaired_single_hw_available] } {
1848 # Return 1 if the target supports running Loongson executables, 0 otherwise.
1850 proc check_effective_target_mips_loongson_runtime { } {
1851 if { [check_effective_target_mips_loongson]
1852 && [check_mips_loongson_hw_available] } {
1858 # Return 1 if the target supports running MIPS MSA executables, 0 otherwise.
1860 proc check_effective_target_mips_msa_runtime { } {
1861 if { [check_effective_target_mips_msa]
1862 && [check_mips_msa_hw_available] } {
1868 # Return 1 if the target supports running AVX executables, 0 otherwise.
1870 proc check_effective_target_avx_runtime { } {
1871 if { [check_effective_target_avx]
1872 && [check_avx_hw_available]
1873 && [check_avx_os_support_available] } {
1879 # Return 1 if the target supports running AVX2 executables, 0 otherwise.
1881 proc check_effective_target_avx2_runtime { } {
1882 if { [check_effective_target_avx2]
1883 && [check_avx2_hw_available]
1884 && [check_avx_os_support_available] } {
1890 # Return 1 if we are compiling for 64-bit PowerPC but we do not use direct
1891 # move instructions for moves from GPR to FPR.
1893 proc check_effective_target_powerpc64_no_dm { } {
1894 # The "mulld" checks if we are generating PowerPC64 code. The "lfd"
1895 # checks if we do not use direct moves, but use the old-fashioned
1896 # slower move-via-the-stack.
1897 return [check_no_messages_and_pattern powerpc64_no_dm \
1898 {\mmulld\M.*\mlfd} assembly {
1899 double f(long long x) { return x*x; }
1903 # Return 1 if the target supports executing power8 vector instructions, 0
1904 # otherwise. Cache the result.
1906 proc check_p8vector_hw_available { } {
1907 return [check_cached_effective_target p8vector_hw_available {
1908 # Some simulators are known to not support VSX/power8 instructions.
1909 # For now, disable on Darwin
1910 if { [istarget powerpc-*-eabi]
1911 || [istarget powerpc*-*-eabispe]
1912 || [istarget *-*-darwin*]} {
1915 set options "-mpower8-vector"
1916 check_runtime_nocache p8vector_hw_available {
1920 asm volatile ("xxlorc vs0,vs0,vs0");
1922 asm volatile ("xxlorc 0,0,0");
1931 # Return 1 if the target supports executing power9 vector instructions, 0
1932 # otherwise. Cache the result.
1934 proc check_p9vector_hw_available { } {
1935 return [check_cached_effective_target p9vector_hw_available {
1936 # Some simulators are known to not support VSX/power8/power9
1937 # instructions. For now, disable on Darwin.
1938 if { [istarget powerpc-*-eabi]
1939 || [istarget powerpc*-*-eabispe]
1940 || [istarget *-*-darwin*]} {
1943 set options "-mpower9-vector"
1944 check_runtime_nocache p9vector_hw_available {
1948 vector double v = (vector double) { 0.0, 0.0 };
1949 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
1957 # Return 1 if the target supports executing power9 modulo instructions, 0
1958 # otherwise. Cache the result.
1960 proc check_p9modulo_hw_available { } {
1961 return [check_cached_effective_target p9modulo_hw_available {
1962 # Some simulators are known to not support VSX/power8/power9
1963 # instructions. For now, disable on Darwin.
1964 if { [istarget powerpc-*-eabi]
1965 || [istarget powerpc*-*-eabispe]
1966 || [istarget *-*-darwin*]} {
1969 set options "-mmodulo"
1970 check_runtime_nocache p9modulo_hw_available {
1973 int i = 5, j = 3, r = -1;
1974 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
1982 # Return 1 if the target supports executing __float128 on PowerPC via software
1983 # emulation, 0 otherwise. Cache the result.
1985 proc check_ppc_float128_sw_available { } {
1986 return [check_cached_effective_target ppc_float128_sw_available {
1987 # Some simulators are known to not support VSX/power8/power9
1988 # instructions. For now, disable on Darwin.
1989 if { [istarget powerpc-*-eabi]
1990 || [istarget powerpc*-*-eabispe]
1991 || [istarget *-*-darwin*]} {
1994 set options "-mfloat128 -mvsx"
1995 check_runtime_nocache ppc_float128_sw_available {
1996 volatile __float128 x = 1.0q;
1997 volatile __float128 y = 2.0q;
2000 __float128 z = x + y;
2008 # Return 1 if the target supports executing __float128 on PowerPC via power9
2009 # hardware instructions, 0 otherwise. Cache the result.
2011 proc check_ppc_float128_hw_available { } {
2012 return [check_cached_effective_target ppc_float128_hw_available {
2013 # Some simulators are known to not support VSX/power8/power9
2014 # instructions. For now, disable on Darwin.
2015 if { [istarget powerpc-*-eabi]
2016 || [istarget powerpc*-*-eabispe]
2017 || [istarget *-*-darwin*]} {
2020 set options "-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
2021 check_runtime_nocache ppc_float128_hw_available {
2022 volatile __float128 x = 1.0q;
2023 volatile __float128 y = 2.0q;
2026 __float128 z = x + y;
2027 __float128 w = -1.0q;
2029 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
2030 return ((z != 3.0q) || (z != w);
2037 # Return 1 if the target supports executing VSX instructions, 0
2038 # otherwise. Cache the result.
2040 proc check_vsx_hw_available { } {
2041 return [check_cached_effective_target vsx_hw_available {
2042 # Some simulators are known to not support VSX instructions.
2043 # For now, disable on Darwin
2044 if { [istarget powerpc-*-eabi]
2045 || [istarget powerpc*-*-eabispe]
2046 || [istarget *-*-darwin*]} {
2050 check_runtime_nocache vsx_hw_available {
2054 asm volatile ("xxlor vs0,vs0,vs0");
2056 asm volatile ("xxlor 0,0,0");
2065 # Return 1 if the target supports executing AltiVec instructions, 0
2066 # otherwise. Cache the result.
2068 proc check_vmx_hw_available { } {
2069 return [check_cached_effective_target vmx_hw_available {
2070 # Some simulators are known to not support VMX instructions.
2071 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
2074 # Most targets don't require special flags for this test case, but
2075 # Darwin does. Just to be sure, make sure VSX is not enabled for
2076 # the altivec tests.
2077 if { [istarget *-*-darwin*]
2078 || [istarget *-*-aix*] } {
2079 set options "-maltivec -mno-vsx"
2081 set options "-mno-vsx"
2083 check_runtime_nocache vmx_hw_available {
2087 asm volatile ("vor v0,v0,v0");
2089 asm volatile ("vor 0,0,0");
2098 proc check_ppc_recip_hw_available { } {
2099 return [check_cached_effective_target ppc_recip_hw_available {
2100 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
2101 # For now, disable on Darwin
2102 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2105 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2106 check_runtime_nocache ppc_recip_hw_available {
2107 volatile double d_recip, d_rsqrt, d_four = 4.0;
2108 volatile float f_recip, f_rsqrt, f_four = 4.0f;
2111 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2112 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2113 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2114 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2122 # Return 1 if the target supports executing AltiVec and Cell PPU
2123 # instructions, 0 otherwise. Cache the result.
2125 proc check_effective_target_cell_hw { } {
2126 return [check_cached_effective_target cell_hw_available {
2127 # Some simulators are known to not support VMX and PPU instructions.
2128 if { [istarget powerpc-*-eabi*] } {
2131 # Most targets don't require special flags for this test
2132 # case, but Darwin and AIX do.
2133 if { [istarget *-*-darwin*]
2134 || [istarget *-*-aix*] } {
2135 set options "-maltivec -mcpu=cell"
2137 set options "-mcpu=cell"
2139 check_runtime_nocache cell_hw_available {
2143 asm volatile ("vor v0,v0,v0");
2144 asm volatile ("lvlx v0,r0,r0");
2146 asm volatile ("vor 0,0,0");
2147 asm volatile ("lvlx 0,0,0");
2156 # Return 1 if the target supports executing 64-bit instructions, 0
2157 # otherwise. Cache the result.
2159 proc check_effective_target_powerpc64 { } {
2160 global powerpc64_available_saved
2163 if [info exists powerpc64_available_saved] {
2164 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2166 set powerpc64_available_saved 0
2168 # Some simulators are known to not support powerpc64 instructions.
2169 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
2170 verbose "check_effective_target_powerpc64 returning 0" 2
2171 return $powerpc64_available_saved
2174 # Set up, compile, and execute a test program containing a 64-bit
2175 # instruction. Include the current process ID in the file
2176 # names to prevent conflicts with invocations for multiple
2181 set f [open $src "w"]
2182 puts $f "int main() {"
2183 puts $f "#ifdef __MACH__"
2184 puts $f " asm volatile (\"extsw r0,r0\");"
2186 puts $f " asm volatile (\"extsw 0,0\");"
2188 puts $f " return 0; }"
2191 set opts "additional_flags=-mcpu=G5"
2193 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
2194 set lines [${tool}_target_compile $src $exe executable "$opts"]
2197 if [string match "" $lines] then {
2198 # No error message, compilation succeeded.
2199 set result [${tool}_load "./$exe" "" ""]
2200 set status [lindex $result 0]
2201 remote_file build delete $exe
2202 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
2204 if { $status == "pass" } then {
2205 set powerpc64_available_saved 1
2208 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
2212 return $powerpc64_available_saved
2215 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
2216 # complex float arguments. This affects gfortran tests that call cabsf
2217 # in libm built by an earlier compiler. Return 0 if libm uses the same
2218 # argument passing as the compiler under test, 1 otherwise.
2220 proc check_effective_target_broken_cplxf_arg { } {
2221 # Skip the work for targets known not to be affected.
2222 if { ![istarget powerpc*-*-linux*] || ![is-effective-target lp64] } {
2226 return [check_cached_effective_target broken_cplxf_arg {
2227 check_runtime_nocache broken_cplxf_arg {
2228 #include <complex.h>
2229 extern void abort (void);
2230 float fabsf (float);
2231 float cabsf (_Complex float);
2238 if (fabsf (f - 5.0) > 0.0001)
2239 /* Yes, it's broken. */
2241 /* All fine, not broken. */
2248 # Return 1 is this is a TI C6X target supporting C67X instructions
2249 proc check_effective_target_ti_c67x { } {
2250 return [check_no_compiler_messages ti_c67x assembly {
2251 #if !defined(_TMS320C6700)
2252 #error !_TMS320C6700
2257 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2258 proc check_effective_target_ti_c64xp { } {
2259 return [check_no_compiler_messages ti_c64xp assembly {
2260 #if !defined(_TMS320C6400_PLUS)
2261 #error !_TMS320C6400_PLUS
2267 proc check_alpha_max_hw_available { } {
2268 return [check_runtime alpha_max_hw_available {
2269 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2273 # Returns true iff the FUNCTION is available on the target system.
2274 # (This is essentially a Tcl implementation of Autoconf's
2277 proc check_function_available { function } {
2278 return [check_no_compiler_messages ${function}_available \
2284 int main () { $function (); }
2288 # Returns true iff "fork" is available on the target system.
2290 proc check_fork_available {} {
2291 return [check_function_available "fork"]
2294 # Returns true iff "mkfifo" is available on the target system.
2296 proc check_mkfifo_available {} {
2297 if { [istarget *-*-cygwin*] } {
2298 # Cygwin has mkfifo, but support is incomplete.
2302 return [check_function_available "mkfifo"]
2305 # Returns true iff "__cxa_atexit" is used on the target system.
2307 proc check_cxa_atexit_available { } {
2308 return [check_cached_effective_target cxa_atexit_available {
2309 if { [istarget hppa*-*-hpux10*] } {
2310 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
2312 } elseif { [istarget *-*-vxworks] } {
2313 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2316 check_runtime_nocache cxa_atexit_available {
2319 static unsigned int count;
2336 Y() { f(); count = 2; }
2345 int main() { return 0; }
2351 proc check_effective_target_objc2 { } {
2352 return [check_no_compiler_messages objc2 object {
2361 proc check_effective_target_next_runtime { } {
2362 return [check_no_compiler_messages objc2 object {
2363 #ifdef __NEXT_RUNTIME__
2366 #error !__NEXT_RUNTIME__
2371 # Return 1 if we're generating 32-bit code using default options, 0
2374 proc check_effective_target_ilp32 { } {
2375 return [check_no_compiler_messages ilp32 object {
2376 int dummy[sizeof (int) == 4
2377 && sizeof (void *) == 4
2378 && sizeof (long) == 4 ? 1 : -1];
2382 # Return 1 if we're generating ia32 code using default options, 0
2385 proc check_effective_target_ia32 { } {
2386 return [check_no_compiler_messages ia32 object {
2387 int dummy[sizeof (int) == 4
2388 && sizeof (void *) == 4
2389 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2393 # Return 1 if we're generating x32 code using default options, 0
2396 proc check_effective_target_x32 { } {
2397 return [check_no_compiler_messages x32 object {
2398 int dummy[sizeof (int) == 4
2399 && sizeof (void *) == 4
2400 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2404 # Return 1 if we're generating 32-bit integers using default
2405 # options, 0 otherwise.
2407 proc check_effective_target_int32 { } {
2408 return [check_no_compiler_messages int32 object {
2409 int dummy[sizeof (int) == 4 ? 1 : -1];
2413 # Return 1 if we're generating 32-bit or larger integers using default
2414 # options, 0 otherwise.
2416 proc check_effective_target_int32plus { } {
2417 return [check_no_compiler_messages int32plus object {
2418 int dummy[sizeof (int) >= 4 ? 1 : -1];
2422 # Return 1 if we're generating 32-bit or larger pointers using default
2423 # options, 0 otherwise.
2425 proc check_effective_target_ptr32plus { } {
2426 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2427 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2428 # cannot really hold a 32-bit address, so we always return false here.
2429 if { [istarget msp430-*-*] } {
2433 return [check_no_compiler_messages ptr32plus object {
2434 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2438 # Return 1 if we support 32-bit or larger array and structure sizes
2439 # using default options, 0 otherwise. Avoid false positive on
2440 # targets with 20 or 24 bit address spaces.
2442 proc check_effective_target_size32plus { } {
2443 return [check_no_compiler_messages size32plus object {
2444 char dummy[16777217L];
2448 # Returns 1 if we're generating 16-bit or smaller integers with the
2449 # default options, 0 otherwise.
2451 proc check_effective_target_int16 { } {
2452 return [check_no_compiler_messages int16 object {
2453 int dummy[sizeof (int) < 4 ? 1 : -1];
2457 # Return 1 if we're generating 64-bit code using default options, 0
2460 proc check_effective_target_lp64 { } {
2461 return [check_no_compiler_messages lp64 object {
2462 int dummy[sizeof (int) == 4
2463 && sizeof (void *) == 8
2464 && sizeof (long) == 8 ? 1 : -1];
2468 # Return 1 if we're generating 64-bit code using default llp64 options,
2471 proc check_effective_target_llp64 { } {
2472 return [check_no_compiler_messages llp64 object {
2473 int dummy[sizeof (int) == 4
2474 && sizeof (void *) == 8
2475 && sizeof (long long) == 8
2476 && sizeof (long) == 4 ? 1 : -1];
2480 # Return 1 if long and int have different sizes,
2483 proc check_effective_target_long_neq_int { } {
2484 return [check_no_compiler_messages long_ne_int object {
2485 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2489 # Return 1 if the target supports long double larger than double,
2492 proc check_effective_target_large_long_double { } {
2493 return [check_no_compiler_messages large_long_double object {
2494 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2498 # Return 1 if the target supports double larger than float,
2501 proc check_effective_target_large_double { } {
2502 return [check_no_compiler_messages large_double object {
2503 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2507 # Return 1 if the target supports long double of 128 bits,
2510 proc check_effective_target_longdouble128 { } {
2511 return [check_no_compiler_messages longdouble128 object {
2512 int dummy[sizeof(long double) == 16 ? 1 : -1];
2516 # Return 1 if the target supports double of 64 bits,
2519 proc check_effective_target_double64 { } {
2520 return [check_no_compiler_messages double64 object {
2521 int dummy[sizeof(double) == 8 ? 1 : -1];
2525 # Return 1 if the target supports double of at least 64 bits,
2528 proc check_effective_target_double64plus { } {
2529 return [check_no_compiler_messages double64plus object {
2530 int dummy[sizeof(double) >= 8 ? 1 : -1];
2534 # Return 1 if the target supports 'w' suffix on floating constant
2537 proc check_effective_target_has_w_floating_suffix { } {
2539 if [check_effective_target_c++] {
2540 append opts "-std=gnu++03"
2542 return [check_no_compiler_messages w_fp_suffix object {
2547 # Return 1 if the target supports 'q' suffix on floating constant
2550 proc check_effective_target_has_q_floating_suffix { } {
2552 if [check_effective_target_c++] {
2553 append opts "-std=gnu++03"
2555 return [check_no_compiler_messages q_fp_suffix object {
2560 # Return 1 if the target supports the _FloatN / _FloatNx type
2561 # indicated in the function name, 0 otherwise.
2563 proc check_effective_target_float16 {} {
2564 return [check_no_compiler_messages_nocache float16 object {
2566 } [add_options_for_float16 ""]]
2569 proc check_effective_target_float32 {} {
2570 return [check_no_compiler_messages_nocache float32 object {
2572 } [add_options_for_float32 ""]]
2575 proc check_effective_target_float64 {} {
2576 return [check_no_compiler_messages_nocache float64 object {
2578 } [add_options_for_float64 ""]]
2581 proc check_effective_target_float128 {} {
2582 return [check_no_compiler_messages_nocache float128 object {
2584 } [add_options_for_float128 ""]]
2587 proc check_effective_target_float32x {} {
2588 return [check_no_compiler_messages_nocache float32x object {
2590 } [add_options_for_float32x ""]]
2593 proc check_effective_target_float64x {} {
2594 return [check_no_compiler_messages_nocache float64x object {
2596 } [add_options_for_float64x ""]]
2599 proc check_effective_target_float128x {} {
2600 return [check_no_compiler_messages_nocache float128x object {
2602 } [add_options_for_float128x ""]]
2605 # Likewise, but runtime support for any special options used as well
2606 # as compile-time support is required.
2608 proc check_effective_target_float16_runtime {} {
2609 return [check_effective_target_float16]
2612 proc check_effective_target_float32_runtime {} {
2613 return [check_effective_target_float32]
2616 proc check_effective_target_float64_runtime {} {
2617 return [check_effective_target_float64]
2620 proc check_effective_target_float128_runtime {} {
2621 if { ![check_effective_target_float128] } {
2624 if { [istarget powerpc*-*-*] } {
2625 return [check_effective_target_base_quadfloat_support]
2630 proc check_effective_target_float32x_runtime {} {
2631 return [check_effective_target_float32x]
2634 proc check_effective_target_float64x_runtime {} {
2635 if { ![check_effective_target_float64x] } {
2638 if { [istarget powerpc*-*-*] } {
2639 return [check_effective_target_base_quadfloat_support]
2644 proc check_effective_target_float128x_runtime {} {
2645 return [check_effective_target_float128x]
2648 # Return 1 if the target hardware supports any options added for
2649 # _FloatN and _FloatNx types, 0 otherwise.
2651 proc check_effective_target_floatn_nx_runtime {} {
2652 if { [istarget powerpc*-*-aix*] } {
2655 if { [istarget powerpc*-*-*] } {
2656 return [check_effective_target_base_quadfloat_support]
2661 # Add options needed to use the _FloatN / _FloatNx type indicated in
2662 # the function name.
2664 proc add_options_for_float16 { flags } {
2665 if { [istarget arm*-*-*] } {
2666 return "$flags -mfp16-format=ieee"
2671 proc add_options_for_float32 { flags } {
2675 proc add_options_for_float64 { flags } {
2679 proc add_options_for_float128 { flags } {
2680 return [add_options_for___float128 "$flags"]
2683 proc add_options_for_float32x { flags } {
2687 proc add_options_for_float64x { flags } {
2688 return [add_options_for___float128 "$flags"]
2691 proc add_options_for_float128x { flags } {
2695 # Return 1 if the target supports __float128,
2698 proc check_effective_target___float128 { } {
2699 if { [istarget powerpc*-*-*] } {
2700 return [check_ppc_float128_sw_available]
2702 if { [istarget ia64-*-*]
2703 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2709 proc add_options_for___float128 { flags } {
2710 if { [istarget powerpc*-*-*] } {
2711 return "$flags -mfloat128 -mvsx"
2716 # Return 1 if the target supports any special run-time requirements
2717 # for __float128 or _Float128,
2720 proc check_effective_target_base_quadfloat_support { } {
2721 if { [istarget powerpc*-*-*] } {
2722 return [check_vsx_hw_available]
2727 # Return 1 if the target supports compiling fixed-point,
2730 proc check_effective_target_fixed_point { } {
2731 return [check_no_compiler_messages fixed_point object {
2732 _Sat _Fract x; _Sat _Accum y;
2736 # Return 1 if the target supports compiling decimal floating point,
2739 proc check_effective_target_dfp_nocache { } {
2740 verbose "check_effective_target_dfp_nocache: compiling source" 2
2741 set ret [check_no_compiler_messages_nocache dfp object {
2742 float x __attribute__((mode(DD)));
2744 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2748 proc check_effective_target_dfprt_nocache { } {
2749 return [check_runtime_nocache dfprt {
2750 typedef float d64 __attribute__((mode(DD)));
2751 d64 x = 1.2df, y = 2.3dd, z;
2752 int main () { z = x + y; return 0; }
2756 # Return 1 if the target supports compiling Decimal Floating Point,
2759 # This won't change for different subtargets so cache the result.
2761 proc check_effective_target_dfp { } {
2762 return [check_cached_effective_target dfp {
2763 check_effective_target_dfp_nocache
2767 # Return 1 if the target supports linking and executing Decimal Floating
2768 # Point, 0 otherwise.
2770 # This won't change for different subtargets so cache the result.
2772 proc check_effective_target_dfprt { } {
2773 return [check_cached_effective_target dfprt {
2774 check_effective_target_dfprt_nocache
2778 proc check_effective_target_powerpc_popcntb_ok { } {
2779 return [check_cached_effective_target powerpc_popcntb_ok {
2781 # Disable on Darwin.
2782 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2785 check_runtime_nocache powerpc_popcntb_ok {
2787 volatile int a = 0x12345678;
2790 asm volatile ("popcntb %0,%1" : "=r" (r) : "r" (a));
2798 # Return 1 if the target supports executing DFP hardware instructions,
2799 # 0 otherwise. Cache the result.
2801 proc check_dfp_hw_available { } {
2802 return [check_cached_effective_target dfp_hw_available {
2803 # For now, disable on Darwin
2804 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2807 check_runtime_nocache dfp_hw_available {
2808 volatile _Decimal64 r;
2809 volatile _Decimal64 a = 4.0DD;
2810 volatile _Decimal64 b = 2.0DD;
2813 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2814 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2815 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2816 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2819 } "-mcpu=power6 -mhard-float"
2824 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2826 proc check_effective_target_ucn_nocache { } {
2827 # -std=c99 is only valid for C
2828 if [check_effective_target_c] {
2829 set ucnopts "-std=c99"
2833 verbose "check_effective_target_ucn_nocache: compiling source" 2
2834 set ret [check_no_compiler_messages_nocache ucn object {
2837 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2841 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2843 # This won't change for different subtargets, so cache the result.
2845 proc check_effective_target_ucn { } {
2846 return [check_cached_effective_target ucn {
2847 check_effective_target_ucn_nocache
2851 # Return 1 if the target needs a command line argument to enable a SIMD
2854 proc check_effective_target_vect_cmdline_needed { } {
2855 global et_vect_cmdline_needed_saved
2856 global et_vect_cmdline_needed_target_name
2858 if { ![info exists et_vect_cmdline_needed_target_name] } {
2859 set et_vect_cmdline_needed_target_name ""
2862 # If the target has changed since we set the cached value, clear it.
2863 set current_target [current_target_name]
2864 if { $current_target != $et_vect_cmdline_needed_target_name } {
2865 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2866 set et_vect_cmdline_needed_target_name $current_target
2867 if { [info exists et_vect_cmdline_needed_saved] } {
2868 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
2869 unset et_vect_cmdline_needed_saved
2873 if [info exists et_vect_cmdline_needed_saved] {
2874 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
2876 set et_vect_cmdline_needed_saved 1
2877 if { [istarget alpha*-*-*]
2878 || [istarget ia64-*-*]
2879 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
2880 && ![is-effective-target ia32])
2881 || ([istarget powerpc*-*-*]
2882 && ([check_effective_target_powerpc_spe]
2883 || [check_effective_target_powerpc_altivec]))
2884 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
2885 || [istarget spu-*-*]
2886 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
2887 || [istarget aarch64*-*-*] } {
2888 set et_vect_cmdline_needed_saved 0
2892 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2893 return $et_vect_cmdline_needed_saved
2896 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
2898 # This won't change for different subtargets so cache the result.
2900 proc check_effective_target_vect_int { } {
2901 global et_vect_int_saved
2904 if [info exists et_vect_int_saved($et_index)] {
2905 verbose "check_effective_target_vect_int: using cached result" 2
2907 set et_vect_int_saved($et_index) 0
2908 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2909 || ([istarget powerpc*-*-*]
2910 && ![istarget powerpc-*-linux*paired*])
2911 || [istarget spu-*-*]
2912 || [istarget sparc*-*-*]
2913 || [istarget alpha*-*-*]
2914 || [istarget ia64-*-*]
2915 || [istarget aarch64*-*-*]
2916 || [check_effective_target_arm32]
2917 || ([istarget mips*-*-*]
2918 && ([et-is-effective-target mips_loongson]
2919 || [et-is-effective-target mips_msa])) } {
2920 set et_vect_int_saved($et_index) 1
2924 verbose "check_effective_target_vect_int:\
2925 returning $et_vect_int_saved($et_index)" 2
2926 return $et_vect_int_saved($et_index)
2929 # Return 1 if the target supports signed int->float conversion
2932 proc check_effective_target_vect_intfloat_cvt { } {
2933 global et_vect_intfloat_cvt_saved
2936 if [info exists et_vect_intfloat_cvt_saved($et_index)] {
2937 verbose "check_effective_target_vect_intfloat_cvt:\
2938 using cached result" 2
2940 set et_vect_intfloat_cvt_saved($et_index) 0
2941 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2942 || ([istarget powerpc*-*-*]
2943 && ![istarget powerpc-*-linux*paired*])
2944 || ([istarget arm*-*-*]
2945 && [check_effective_target_arm_neon_ok])
2946 || ([istarget mips*-*-*]
2947 && [et-is-effective-target mips_msa]) } {
2948 set et_vect_intfloat_cvt_saved($et_index) 1
2952 verbose "check_effective_target_vect_intfloat_cvt:\
2953 returning $et_vect_intfloat_cvt_saved($et_index)" 2
2954 return $et_vect_intfloat_cvt_saved($et_index)
2957 #Return 1 if we're supporting __int128 for target, 0 otherwise.
2959 proc check_effective_target_int128 { } {
2960 return [check_no_compiler_messages int128 object {
2962 #ifndef __SIZEOF_INT128__
2971 # Return 1 if the target supports unsigned int->float conversion
2974 proc check_effective_target_vect_uintfloat_cvt { } {
2975 global et_vect_uintfloat_cvt_saved
2978 if [info exists et_vect_uintfloat_cvt_saved($et_index)] {
2979 verbose "check_effective_target_vect_uintfloat_cvt:\
2980 using cached result" 2
2982 set et_vect_uintfloat_cvt_saved($et_index) 0
2983 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2984 || ([istarget powerpc*-*-*]
2985 && ![istarget powerpc-*-linux*paired*])
2986 || [istarget aarch64*-*-*]
2987 || ([istarget arm*-*-*]
2988 && [check_effective_target_arm_neon_ok])
2989 || ([istarget mips*-*-*]
2990 && [et-is-effective-target mips_msa]) } {
2991 set et_vect_uintfloat_cvt_saved($et_index) 1
2995 verbose "check_effective_target_vect_uintfloat_cvt:\
2996 returning $et_vect_uintfloat_cvt_saved($et_index)" 2
2997 return $et_vect_uintfloat_cvt_saved($et_index)
3001 # Return 1 if the target supports signed float->int conversion
3004 proc check_effective_target_vect_floatint_cvt { } {
3005 global et_vect_floatint_cvt_saved
3008 if [info exists et_vect_floatint_cvt_saved($et_index)] {
3009 verbose "check_effective_target_vect_floatint_cvt:\
3010 using cached result" 2
3012 set et_vect_floatint_cvt_saved($et_index) 0
3013 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3014 || ([istarget powerpc*-*-*]
3015 && ![istarget powerpc-*-linux*paired*])
3016 || ([istarget arm*-*-*]
3017 && [check_effective_target_arm_neon_ok])
3018 || ([istarget mips*-*-*]
3019 && [et-is-effective-target mips_msa]) } {
3020 set et_vect_floatint_cvt_saved($et_index) 1
3024 verbose "check_effective_target_vect_floatint_cvt:\
3025 returning $et_vect_floatint_cvt_saved($et_index)" 2
3026 return $et_vect_floatint_cvt_saved($et_index)
3029 # Return 1 if the target supports unsigned float->int conversion
3032 proc check_effective_target_vect_floatuint_cvt { } {
3033 global et_vect_floatuint_cvt_saved
3036 if [info exists et_vect_floatuint_cvt_saved($et_index)] {
3037 verbose "check_effective_target_vect_floatuint_cvt:\
3038 using cached result" 2
3040 set et_vect_floatuint_cvt_saved($et_index) 0
3041 if { ([istarget powerpc*-*-*]
3042 && ![istarget powerpc-*-linux*paired*])
3043 || ([istarget arm*-*-*]
3044 && [check_effective_target_arm_neon_ok])
3045 || ([istarget mips*-*-*]
3046 && [et-is-effective-target mips_msa]) } {
3047 set et_vect_floatuint_cvt_saved($et_index) 1
3051 verbose "check_effective_target_vect_floatuint_cvt:\
3052 returning $et_vect_floatuint_cvt_saved($et_index)" 2
3053 return $et_vect_floatuint_cvt_saved($et_index)
3056 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
3058 # This won't change for different subtargets so cache the result.
3060 proc check_effective_target_vect_simd_clones { } {
3061 global et_vect_simd_clones_saved
3064 if [info exists et_vect_simd_clones_saved($et_index)] {
3065 verbose "check_effective_target_vect_simd_clones: using cached result" 2
3067 set et_vect_simd_clones_saved($et_index) 0
3068 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx,
3069 # avx2 and avx512f clone. Only the right clone for the
3070 # specified arch will be chosen, but still we need to at least
3071 # be able to assemble avx512f.
3072 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3073 && [check_effective_target_avx512f]) } {
3074 set et_vect_simd_clones_saved($et_index) 1
3078 verbose "check_effective_target_vect_simd_clones:\
3079 returning $et_vect_simd_clones_saved($et_index)" 2
3080 return $et_vect_simd_clones_saved($et_index)
3083 # Return 1 if this is a AArch64 target supporting big endian
3084 proc check_effective_target_aarch64_big_endian { } {
3085 return [check_no_compiler_messages aarch64_big_endian assembly {
3086 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
3087 #error !__aarch64__ || !__AARCH64EB__
3092 # Return 1 if this is a AArch64 target supporting little endian
3093 proc check_effective_target_aarch64_little_endian { } {
3094 if { ![istarget aarch64*-*-*] } {
3098 return [check_no_compiler_messages aarch64_little_endian assembly {
3099 #if !defined(__aarch64__) || defined(__AARCH64EB__)
3105 # Return 1 if this is a compiler supporting ARC atomic operations
3106 proc check_effective_target_arc_atomic { } {
3107 return [check_no_compiler_messages arc_atomic assembly {
3108 #if !defined(__ARC_ATOMIC__)
3114 # Return 1 if this is an arm target using 32-bit instructions
3115 proc check_effective_target_arm32 { } {
3116 if { ![istarget arm*-*-*] } {
3120 return [check_no_compiler_messages arm32 assembly {
3121 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
3122 #error !__arm || __thumb__ && !__thumb2__
3127 # Return 1 if this is an arm target not using Thumb
3128 proc check_effective_target_arm_nothumb { } {
3129 if { ![istarget arm*-*-*] } {
3133 return [check_no_compiler_messages arm_nothumb assembly {
3134 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
3135 #error !__arm__ || __thumb || __thumb2__
3140 # Return 1 if this is a little-endian ARM target
3141 proc check_effective_target_arm_little_endian { } {
3142 if { ![istarget arm*-*-*] } {
3146 return [check_no_compiler_messages arm_little_endian assembly {
3147 #if !defined(__arm__) || !defined(__ARMEL__)
3148 #error !__arm__ || !__ARMEL__
3153 # Return 1 if this is an ARM target that only supports aligned vector accesses
3154 proc check_effective_target_arm_vect_no_misalign { } {
3155 if { ![istarget arm*-*-*] } {
3159 return [check_no_compiler_messages arm_vect_no_misalign assembly {
3160 #if !defined(__arm__) \
3161 || (defined(__ARM_FEATURE_UNALIGNED) \
3162 && defined(__ARMEL__))
3163 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
3169 # Return 1 if this is an ARM target supporting -mfpu=vfp
3170 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
3173 proc check_effective_target_arm_vfp_ok { } {
3174 if { [check_effective_target_arm32] } {
3175 return [check_no_compiler_messages arm_vfp_ok object {
3177 } "-mfpu=vfp -mfloat-abi=softfp"]
3183 # Return 1 if this is an ARM target supporting -mfpu=vfp3
3184 # -mfloat-abi=softfp.
3186 proc check_effective_target_arm_vfp3_ok { } {
3187 if { [check_effective_target_arm32] } {
3188 return [check_no_compiler_messages arm_vfp3_ok object {
3190 } "-mfpu=vfp3 -mfloat-abi=softfp"]
3196 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
3197 # -mfloat-abi=softfp.
3198 proc check_effective_target_arm_v8_vfp_ok {} {
3199 if { [check_effective_target_arm32] } {
3200 return [check_no_compiler_messages arm_v8_vfp_ok object {
3203 __asm__ volatile ("vrinta.f32.f32 s0, s0");
3206 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
3212 # Return 1 if this is an ARM target supporting -mfpu=vfp
3213 # -mfloat-abi=hard. Some multilibs may be incompatible with these
3216 proc check_effective_target_arm_hard_vfp_ok { } {
3217 if { [check_effective_target_arm32]
3218 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
3219 return [check_no_compiler_messages arm_hard_vfp_ok executable {
3220 int main() { return 0;}
3221 } "-mfpu=vfp -mfloat-abi=hard"]
3227 # Return 1 if this is an ARM target defining __ARM_FP. We may need
3228 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3229 # incompatible with these options. Also set et_arm_fp_flags to the
3230 # best options to add.
3232 proc check_effective_target_arm_fp_ok_nocache { } {
3233 global et_arm_fp_flags
3234 set et_arm_fp_flags ""
3235 if { [check_effective_target_arm32] } {
3236 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
3237 if { [check_no_compiler_messages_nocache arm_fp_ok object {
3239 #error __ARM_FP not defined
3242 set et_arm_fp_flags $flags
3251 proc check_effective_target_arm_fp_ok { } {
3252 return [check_cached_effective_target arm_fp_ok \
3253 check_effective_target_arm_fp_ok_nocache]
3256 # Add the options needed to define __ARM_FP. We need either
3257 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3258 # specified by the multilib, use it.
3260 proc add_options_for_arm_fp { flags } {
3261 if { ! [check_effective_target_arm_fp_ok] } {
3264 global et_arm_fp_flags
3265 return "$flags $et_arm_fp_flags"
3268 # Return 1 if this is an ARM target that supports DSP multiply with
3269 # current multilib flags.
3271 proc check_effective_target_arm_dsp { } {
3272 return [check_no_compiler_messages arm_dsp assembly {
3273 #ifndef __ARM_FEATURE_DSP
3280 # Return 1 if this is an ARM target that supports unaligned word/halfword
3281 # load/store instructions.
3283 proc check_effective_target_arm_unaligned { } {
3284 return [check_no_compiler_messages arm_unaligned assembly {
3285 #ifndef __ARM_FEATURE_UNALIGNED
3286 #error no unaligned support
3292 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3293 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3294 # incompatible with these options. Also set et_arm_crypto_flags to the
3295 # best options to add.
3297 proc check_effective_target_arm_crypto_ok_nocache { } {
3298 global et_arm_crypto_flags
3299 set et_arm_crypto_flags ""
3300 if { [check_effective_target_arm_v8_neon_ok] } {
3301 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
3302 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
3303 #include "arm_neon.h"
3305 foo (uint8x16_t a, uint8x16_t b)
3307 return vaeseq_u8 (a, b);
3310 set et_arm_crypto_flags $flags
3319 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3321 proc check_effective_target_arm_crypto_ok { } {
3322 return [check_cached_effective_target arm_crypto_ok \
3323 check_effective_target_arm_crypto_ok_nocache]
3326 # Add options for crypto extensions.
3327 proc add_options_for_arm_crypto { flags } {
3328 if { ! [check_effective_target_arm_crypto_ok] } {
3331 global et_arm_crypto_flags
3332 return "$flags $et_arm_crypto_flags"
3335 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3336 # or -mfloat-abi=hard, but if one is already specified by the
3337 # multilib, use it. Similarly, if a -mfpu option already enables
3338 # NEON, do not add -mfpu=neon.
3340 proc add_options_for_arm_neon { flags } {
3341 if { ! [check_effective_target_arm_neon_ok] } {
3344 global et_arm_neon_flags
3345 return "$flags $et_arm_neon_flags"
3348 proc add_options_for_arm_v8_vfp { flags } {
3349 if { ! [check_effective_target_arm_v8_vfp_ok] } {
3352 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
3355 proc add_options_for_arm_v8_neon { flags } {
3356 if { ! [check_effective_target_arm_v8_neon_ok] } {
3359 global et_arm_v8_neon_flags
3360 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
3363 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
3364 # options for AArch64 and for ARM.
3366 proc add_options_for_arm_v8_1a_neon { flags } {
3367 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
3370 global et_arm_v8_1a_neon_flags
3371 return "$flags $et_arm_v8_1a_neon_flags -march=armv8.1-a"
3374 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
3375 # Also adds the ARMv8 FP options for ARM and for AArch64.
3377 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
3378 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
3381 global et_arm_v8_2a_fp16_scalar_flags
3382 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
3385 # Add the options needed for ARMv8.2 with the FP16 extension. Also adds
3386 # the ARMv8 NEON options for ARM and for AArch64.
3388 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
3389 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
3392 global et_arm_v8_2a_fp16_neon_flags
3393 return "$flags $et_arm_v8_2a_fp16_neon_flags"
3396 proc add_options_for_arm_crc { flags } {
3397 if { ! [check_effective_target_arm_crc_ok] } {
3400 global et_arm_crc_flags
3401 return "$flags $et_arm_crc_flags"
3404 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3405 # or -mfloat-abi=hard, but if one is already specified by the
3406 # multilib, use it. Similarly, if a -mfpu option already enables
3407 # NEON, do not add -mfpu=neon.
3409 proc add_options_for_arm_neonv2 { flags } {
3410 if { ! [check_effective_target_arm_neonv2_ok] } {
3413 global et_arm_neonv2_flags
3414 return "$flags $et_arm_neonv2_flags"
3417 # Add the options needed for vfp3.
3418 proc add_options_for_arm_vfp3 { flags } {
3419 if { ! [check_effective_target_arm_vfp3_ok] } {
3422 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
3425 # Return 1 if this is an ARM target supporting -mfpu=neon
3426 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3427 # incompatible with these options. Also set et_arm_neon_flags to the
3428 # best options to add.
3430 proc check_effective_target_arm_neon_ok_nocache { } {
3431 global et_arm_neon_flags
3432 set et_arm_neon_flags ""
3433 if { [check_effective_target_arm32] } {
3434 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a"} {
3435 if { [check_no_compiler_messages_nocache arm_neon_ok object {
3437 #ifndef __ARM_NEON__
3440 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3441 configured for -mcpu=arm926ej-s, for example. */
3442 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
3443 #error Architecture does not support NEON.
3446 set et_arm_neon_flags $flags
3455 proc check_effective_target_arm_neon_ok { } {
3456 return [check_cached_effective_target arm_neon_ok \
3457 check_effective_target_arm_neon_ok_nocache]
3460 proc check_effective_target_arm_crc_ok_nocache { } {
3461 global et_arm_crc_flags
3462 set et_arm_crc_flags "-march=armv8-a+crc"
3463 return [check_no_compiler_messages_nocache arm_crc_ok object {
3464 #if !defined (__ARM_FEATURE_CRC32)
3467 } "$et_arm_crc_flags"]
3470 proc check_effective_target_arm_crc_ok { } {
3471 return [check_cached_effective_target arm_crc_ok \
3472 check_effective_target_arm_crc_ok_nocache]
3475 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
3476 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3477 # incompatible with these options. Also set et_arm_neon_fp16_flags to
3478 # the best options to add.
3480 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
3481 global et_arm_neon_fp16_flags
3482 global et_arm_neon_flags
3483 set et_arm_neon_fp16_flags ""
3484 if { [check_effective_target_arm32]
3485 && [check_effective_target_arm_neon_ok] } {
3486 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3487 "-mfpu=neon-fp16 -mfloat-abi=softfp"
3488 "-mfp16-format=ieee"
3489 "-mfloat-abi=softfp -mfp16-format=ieee"
3490 "-mfpu=neon-fp16 -mfp16-format=ieee"
3491 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
3492 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
3493 #include "arm_neon.h"
3495 foo (float32x4_t arg)
3497 return vcvt_f16_f32 (arg);
3499 } "$et_arm_neon_flags $flags"] } {
3500 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
3509 proc check_effective_target_arm_neon_fp16_ok { } {
3510 return [check_cached_effective_target arm_neon_fp16_ok \
3511 check_effective_target_arm_neon_fp16_ok_nocache]
3514 proc check_effective_target_arm_neon_fp16_hw { } {
3515 if {! [check_effective_target_arm_neon_fp16_ok] } {
3518 global et_arm_neon_fp16_flags
3519 check_runtime_nocache arm_neon_fp16_hw {
3521 main (int argc, char **argv)
3523 asm ("vcvt.f32.f16 q1, d0");
3526 } $et_arm_neon_fp16_flags
3529 proc add_options_for_arm_neon_fp16 { flags } {
3530 if { ! [check_effective_target_arm_neon_fp16_ok] } {
3533 global et_arm_neon_fp16_flags
3534 return "$flags $et_arm_neon_fp16_flags"
3537 # Return 1 if this is an ARM target supporting the FP16 alternative
3538 # format. Some multilibs may be incompatible with the options needed. Also
3539 # set et_arm_neon_fp16_flags to the best options to add.
3541 proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
3542 global et_arm_neon_fp16_flags
3543 set et_arm_neon_fp16_flags ""
3544 if { [check_effective_target_arm32] } {
3545 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3546 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3547 if { [check_no_compiler_messages_nocache \
3548 arm_fp16_alternative_ok object {
3549 #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3550 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
3552 } "$flags -mfp16-format=alternative"] } {
3553 set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
3562 proc check_effective_target_arm_fp16_alternative_ok { } {
3563 return [check_cached_effective_target arm_fp16_alternative_ok \
3564 check_effective_target_arm_fp16_alternative_ok_nocache]
3567 # Return 1 if this is an ARM target supports specifying the FP16 none
3568 # format. Some multilibs may be incompatible with the options needed.
3570 proc check_effective_target_arm_fp16_none_ok_nocache { } {
3571 if { [check_effective_target_arm32] } {
3572 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3573 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3574 if { [check_no_compiler_messages_nocache \
3575 arm_fp16_none_ok object {
3576 #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3577 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
3579 #if defined (__ARM_FP16_FORMAT_IEEE)
3580 #error __ARM_FP16_FORMAT_IEEE defined
3582 } "$flags -mfp16-format=none"] } {
3591 proc check_effective_target_arm_fp16_none_ok { } {
3592 return [check_cached_effective_target arm_fp16_none_ok \
3593 check_effective_target_arm_fp16_none_ok_nocache]
3596 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
3597 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3598 # incompatible with these options. Also set et_arm_v8_neon_flags to the
3599 # best options to add.
3601 proc check_effective_target_arm_v8_neon_ok_nocache { } {
3602 global et_arm_v8_neon_flags
3603 set et_arm_v8_neon_flags ""
3604 if { [check_effective_target_arm32] } {
3605 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3606 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
3608 #error not armv8 or later
3610 #include "arm_neon.h"
3614 __asm__ volatile ("vrintn.f32 q0, q0");
3616 } "$flags -march=armv8-a"] } {
3617 set et_arm_v8_neon_flags $flags
3626 proc check_effective_target_arm_v8_neon_ok { } {
3627 return [check_cached_effective_target arm_v8_neon_ok \
3628 check_effective_target_arm_v8_neon_ok_nocache]
3631 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3632 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3633 # incompatible with these options. Also set et_arm_neonv2_flags to the
3634 # best options to add.
3636 proc check_effective_target_arm_neonv2_ok_nocache { } {
3637 global et_arm_neonv2_flags
3638 global et_arm_neon_flags
3639 set et_arm_neonv2_flags ""
3640 if { [check_effective_target_arm32]
3641 && [check_effective_target_arm_neon_ok] } {
3642 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3643 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3644 #include "arm_neon.h"
3646 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3648 return vfma_f32 (a, b, c);
3650 } "$et_arm_neon_flags $flags"] } {
3651 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
3660 proc check_effective_target_arm_neonv2_ok { } {
3661 return [check_cached_effective_target arm_neonv2_ok \
3662 check_effective_target_arm_neonv2_ok_nocache]
3665 # Add the options needed for VFP FP16 support. We need either
3666 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
3667 # the multilib, use it.
3669 proc add_options_for_arm_fp16 { flags } {
3670 if { ! [check_effective_target_arm_fp16_ok] } {
3673 global et_arm_fp16_flags
3674 return "$flags $et_arm_fp16_flags"
3677 # Add the options needed to enable support for IEEE format
3678 # half-precision support. This is valid for ARM targets.
3680 proc add_options_for_arm_fp16_ieee { flags } {
3681 if { ! [check_effective_target_arm_fp16_ok] } {
3684 global et_arm_fp16_flags
3685 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
3688 # Add the options needed to enable support for ARM Alternative format
3689 # half-precision support. This is valid for ARM targets.
3691 proc add_options_for_arm_fp16_alternative { flags } {
3692 if { ! [check_effective_target_arm_fp16_ok] } {
3695 global et_arm_fp16_flags
3696 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
3699 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
3700 # Skip multilibs that are incompatible with these options and set
3701 # et_arm_fp16_flags to the best options to add. This test is valid for
3704 proc check_effective_target_arm_fp16_ok_nocache { } {
3705 global et_arm_fp16_flags
3706 set et_arm_fp16_flags ""
3707 if { ! [check_effective_target_arm32] } {
3711 [list "" { *-*-* } { "-mfpu=*" } \
3712 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
3713 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
3714 # Multilib flags would override -mfpu.
3717 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
3718 # Must generate floating-point instructions.
3721 if [check_effective_target_arm_hf_eabi] {
3722 # Use existing float-abi and force an fpu which supports fp16
3723 set et_arm_fp16_flags "-mfpu=vfpv4"
3726 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
3727 # The existing -mfpu value is OK; use it, but add softfp.
3728 set et_arm_fp16_flags "-mfloat-abi=softfp"
3731 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
3732 # macro to check for this support.
3733 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
3734 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
3737 set et_arm_fp16_flags "$flags"
3744 proc check_effective_target_arm_fp16_ok { } {
3745 return [check_cached_effective_target arm_fp16_ok \
3746 check_effective_target_arm_fp16_ok_nocache]
3749 # Return 1 if the target supports executing VFP FP16 instructions, 0
3750 # otherwise. This test is valid for ARM only.
3752 proc check_effective_target_arm_fp16_hw { } {
3753 if {! [check_effective_target_arm_fp16_ok] } {
3756 global et_arm_fp16_flags
3757 check_runtime_nocache arm_fp16_hw {
3759 main (int argc, char **argv)
3763 asm ("vcvtb.f32.f16 %0, %1"
3764 : "=w" (r) : "w" (a)
3765 : /* No clobbers. */);
3766 return (r == 1.0) ? 0 : 1;
3768 } "$et_arm_fp16_flags -mfp16-format=ieee"
3771 # Creates a series of routines that return 1 if the given architecture
3772 # can be selected and a routine to give the flags to select that architecture
3773 # Note: Extra flags may be added to disable options from newer compilers
3774 # (Thumb in particular - but others may be added in the future).
3775 # -march=armv7ve is special and is handled explicitly after this loop because
3776 # it needs more than one predefine check to identify.
3777 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
3778 # /* { dg-add-options arm_arch_v5 } */
3779 # /* { dg-require-effective-target arm_arch_v5_multilib } */
3780 foreach { armfunc armflag armdef } {
3781 v4 "-march=armv4 -marm" __ARM_ARCH_4__
3782 v4t "-march=armv4t" __ARM_ARCH_4T__
3783 v5 "-march=armv5 -marm" __ARM_ARCH_5__
3784 v5t "-march=armv5t" __ARM_ARCH_5T__
3785 v5te "-march=armv5te" __ARM_ARCH_5TE__
3786 v6 "-march=armv6" __ARM_ARCH_6__
3787 v6k "-march=armv6k" __ARM_ARCH_6K__
3788 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
3789 v6z "-march=armv6z" __ARM_ARCH_6Z__
3790 v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
3791 v7a "-march=armv7-a" __ARM_ARCH_7A__
3792 v7r "-march=armv7-r" __ARM_ARCH_7R__
3793 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
3794 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
3795 v8a "-march=armv8-a" __ARM_ARCH_8A__
3796 v8_1a "-march=armv8.1a" __ARM_ARCH_8A__
3797 v8_2a "-march=armv8.2a" __ARM_ARCH_8A__
3798 v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft" __ARM_ARCH_8M_BASE__
3799 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__ } {
3800 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
3801 proc check_effective_target_arm_arch_FUNC_ok { } {
3802 if { [ string match "*-marm*" "FLAG" ] &&
3803 ![check_effective_target_arm_arm_ok] } {
3806 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
3813 proc add_options_for_arm_arch_FUNC { flags } {
3814 return "$flags FLAG"
3817 proc check_effective_target_arm_arch_FUNC_multilib { } {
3818 return [check_runtime arm_arch_FUNC_multilib {
3824 } [add_options_for_arm_arch_FUNC ""]]
3829 # Same functions as above but for -march=armv7ve. To uniquely identify
3830 # -march=armv7ve we need to check for __ARM_ARCH_7A__ as well as
3831 # __ARM_FEATURE_IDIV otherwise it aliases with armv7-a.
3833 proc check_effective_target_arm_arch_v7ve_ok { } {
3834 if { [ string match "*-marm*" "-march=armv7ve" ] &&
3835 ![check_effective_target_arm_arm_ok] } {
3838 return [check_no_compiler_messages arm_arch_v7ve_ok assembly {
3839 #if !defined (__ARM_ARCH_7A__) || !defined (__ARM_FEATURE_IDIV)
3842 } "-march=armv7ve" ]
3845 proc add_options_for_arm_arch_v7ve { flags } {
3846 return "$flags -march=armv7ve"
3849 # Return 1 if GCC was configured with --with-mode=
3850 proc check_effective_target_default_mode { } {
3852 return [check_configured_with "with-mode="]
3855 # Return 1 if this is an ARM target where -marm causes ARM to be
3858 proc check_effective_target_arm_arm_ok { } {
3859 return [check_no_compiler_messages arm_arm_ok assembly {
3860 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
3861 #error !__arm__ || __thumb__ || __thumb2__
3867 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
3870 proc check_effective_target_arm_thumb1_ok { } {
3871 return [check_no_compiler_messages arm_thumb1_ok assembly {
3872 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3873 #error !__arm__ || !__thumb__ || __thumb2__
3875 int foo (int i) { return i; }
3879 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
3882 proc check_effective_target_arm_thumb2_ok { } {
3883 return [check_no_compiler_messages arm_thumb2_ok assembly {
3884 #if !defined(__thumb2__)
3887 int foo (int i) { return i; }
3891 # Return 1 if this is an ARM target where Thumb-1 is used without options
3892 # added by the test.
3894 proc check_effective_target_arm_thumb1 { } {
3895 return [check_no_compiler_messages arm_thumb1 assembly {
3896 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3897 #error !__arm__ || !__thumb__ || __thumb2__
3903 # Return 1 if this is an ARM target where Thumb-2 is used without options
3904 # added by the test.
3906 proc check_effective_target_arm_thumb2 { } {
3907 return [check_no_compiler_messages arm_thumb2 assembly {
3908 #if !defined(__thumb2__)
3915 # Return 1 if this is an ARM target where conditional execution is available.
3917 proc check_effective_target_arm_cond_exec { } {
3918 return [check_no_compiler_messages arm_cond_exec assembly {
3919 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
3926 # Return 1 if this is an ARM cortex-M profile cpu
3928 proc check_effective_target_arm_cortex_m { } {
3929 if { ![istarget arm*-*-*] } {
3932 return [check_no_compiler_messages arm_cortex_m assembly {
3933 #if defined(__ARM_ARCH_ISA_ARM)
3934 #error __ARM_ARCH_ISA_ARM is defined
3940 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
3941 # used and MOVT/MOVW instructions to be available.
3943 proc check_effective_target_arm_thumb1_movt_ok {} {
3944 if [check_effective_target_arm_thumb1_ok] {
3945 return [check_no_compiler_messages arm_movt object {
3949 asm ("movt r0, #42");
3957 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
3958 # used and CBZ and CBNZ instructions are available.
3960 proc check_effective_target_arm_thumb1_cbz_ok {} {
3961 if [check_effective_target_arm_thumb1_ok] {
3962 return [check_no_compiler_messages arm_movt object {
3966 asm ("cbz r0, 2f\n2:");
3974 # Return 1 if this is an ARM target where ARMv8-M Security Extensions is
3977 proc check_effective_target_arm_cmse_ok {} {
3978 return [check_no_compiler_messages arm_cmse object {
3987 # Return 1 if this compilation turns on string_ops_prefer_neon on.
3989 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
3990 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
3991 int foo (void) { return 0; }
3992 } "-O2 -mprint-tune-info" ]
3995 # Return 1 if the target supports executing NEON instructions, 0
3996 # otherwise. Cache the result.
3998 proc check_effective_target_arm_neon_hw { } {
3999 return [check_runtime arm_neon_hw_available {
4003 long long a = 0, b = 1;
4004 asm ("vorr %P0, %P1, %P2"
4006 : "0" (a), "w" (b));
4009 } [add_options_for_arm_neon ""]]
4012 proc check_effective_target_arm_neonv2_hw { } {
4013 return [check_runtime arm_neon_hwv2_available {
4014 #include "arm_neon.h"
4018 float32x2_t a, b, c;
4019 asm ("vfma.f32 %P0, %P1, %P2"
4021 : "w" (b), "w" (c));
4024 } [add_options_for_arm_neonv2 ""]]
4027 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
4028 # otherwise. The test is valid for AArch64 and ARM. Record the command
4029 # line options needed.
4031 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
4032 global et_arm_v8_1a_neon_flags
4033 set et_arm_v8_1a_neon_flags ""
4035 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4039 # Iterate through sets of options to find the compiler flags that
4040 # need to be added to the -march option. Start with the empty set
4041 # since AArch64 only needs the -march setting.
4042 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4043 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4044 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
4045 #if !defined (__ARM_FEATURE_QRDMX)
4046 #error "__ARM_FEATURE_QRDMX not defined"
4048 } "$flags -march=armv8.1-a"] } {
4049 set et_arm_v8_1a_neon_flags "$flags -march=armv8.1-a"
4057 proc check_effective_target_arm_v8_1a_neon_ok { } {
4058 return [check_cached_effective_target arm_v8_1a_neon_ok \
4059 check_effective_target_arm_v8_1a_neon_ok_nocache]
4062 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
4063 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4064 # Record the command line options needed.
4066 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
4067 global et_arm_v8_2a_fp16_scalar_flags
4068 set et_arm_v8_2a_fp16_scalar_flags ""
4070 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4074 # Iterate through sets of options to find the compiler flags that
4075 # need to be added to the -march option.
4076 foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
4077 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
4078 if { [check_no_compiler_messages_nocache \
4079 arm_v8_2a_fp16_scalar_ok object {
4080 #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC)
4081 #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
4083 } "$flags -march=armv8.2-a+fp16"] } {
4084 set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16"
4092 proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
4093 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
4094 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache]
4097 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
4098 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4099 # Record the command line options needed.
4101 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
4102 global et_arm_v8_2a_fp16_neon_flags
4103 set et_arm_v8_2a_fp16_neon_flags ""
4105 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4109 # Iterate through sets of options to find the compiler flags that
4110 # need to be added to the -march option.
4111 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4112 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4113 if { [check_no_compiler_messages_nocache \
4114 arm_v8_2a_fp16_neon_ok object {
4115 #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
4116 #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
4118 } "$flags -march=armv8.2-a+fp16"] } {
4119 set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16"
4127 proc check_effective_target_arm_v8_2a_fp16_neon_ok { } {
4128 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
4129 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache]
4132 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
4135 proc check_effective_target_arm_v8_neon_hw { } {
4136 return [check_runtime arm_v8_neon_hw_available {
4137 #include "arm_neon.h"
4141 float32x2_t a = { 1.0f, 2.0f };
4142 #ifdef __ARM_ARCH_ISA_A64
4143 asm ("frinta %0.2s, %1.2s"
4147 asm ("vrinta.f32 %P0, %P1"
4151 return a[0] == 2.0f;
4153 } [add_options_for_arm_v8_neon ""]]
4156 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
4157 # otherwise. The test is valid for AArch64 and ARM.
4159 proc check_effective_target_arm_v8_1a_neon_hw { } {
4160 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
4163 return [check_runtime arm_v8_1a_neon_hw_available {
4167 #ifdef __ARM_ARCH_ISA_A64
4168 __Int32x2_t a = {0, 1};
4169 __Int32x2_t b = {0, 2};
4172 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
4175 : /* No clobbers. */);
4179 __simd64_int32_t a = {0, 1};
4180 __simd64_int32_t b = {0, 2};
4181 __simd64_int32_t result;
4183 asm ("vqrdmlah.s32 %P0, %P1, %P2"
4186 : /* No clobbers. */);
4191 } [add_options_for_arm_v8_1a_neon ""]]
4194 # Return 1 if the target supports executing floating point instructions from
4195 # ARMv8.2 with the FP16 extension, 0 otherwise. The test is valid for ARM and
4198 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
4199 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
4202 return [check_runtime arm_v8_2a_fp16_scalar_hw_available {
4209 #ifdef __ARM_ARCH_ISA_A64
4211 asm ("fabs %h0, %h1"
4214 : /* No clobbers. */);
4218 asm ("vabs.f16 %0, %1"
4221 : /* No clobbers. */);
4225 return (result == 1.0) ? 0 : 1;
4227 } [add_options_for_arm_v8_2a_fp16_scalar ""]]
4230 # Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
4231 # with the FP16 extension, 0 otherwise. The test is valid for ARM and for
4234 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
4235 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
4238 return [check_runtime arm_v8_2a_fp16_neon_hw_available {
4242 #ifdef __ARM_ARCH_ISA_A64
4244 __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
4245 __Float16x4_t result;
4247 asm ("fabs %0.4h, %1.4h"
4250 : /* No clobbers. */);
4254 __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
4255 __simd64_float16_t result;
4257 asm ("vabs.f16 %P0, %P1"
4260 : /* No clobbers. */);
4264 return (result[0] == 1.0) ? 0 : 1;
4266 } [add_options_for_arm_v8_2a_fp16_neon ""]]
4269 # Return 1 if this is a ARM target with NEON enabled.
4271 proc check_effective_target_arm_neon { } {
4272 if { [check_effective_target_arm32] } {
4273 return [check_no_compiler_messages arm_neon object {
4274 #ifndef __ARM_NEON__
4285 proc check_effective_target_arm_neonv2 { } {
4286 if { [check_effective_target_arm32] } {
4287 return [check_no_compiler_messages arm_neon object {
4288 #ifndef __ARM_NEON__
4291 #ifndef __ARM_FEATURE_FMA
4303 # Return 1 if this is an ARM target with load acquire and store release
4304 # instructions for 8-, 16- and 32-bit types.
4306 proc check_effective_target_arm_acq_rel { } {
4307 return [check_no_compiler_messages arm_acq_rel object {
4309 load_acquire_store_release (void)
4311 asm ("lda r0, [r1]\n\t"
4317 : : : "r0", "memory");
4322 # Add the options needed for MIPS Paired-Single.
4324 proc add_options_for_mpaired_single { flags } {
4325 if { ! [check_effective_target_mpaired_single] } {
4328 return "$flags -mpaired-single"
4331 # Add the options needed for MIPS SIMD Architecture.
4333 proc add_options_for_mips_msa { flags } {
4334 if { ! [check_effective_target_mips_msa] } {
4337 return "$flags -mmsa"
4340 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
4341 # the Loongson vector modes.
4343 proc check_effective_target_mips_loongson { } {
4344 return [check_no_compiler_messages loongson assembly {
4345 #if !defined(__mips_loongson_vector_rev)
4346 #error !__mips_loongson_vector_rev
4351 # Return 1 if this is a MIPS target that supports the legacy NAN.
4353 proc check_effective_target_mips_nanlegacy { } {
4354 return [check_no_compiler_messages nanlegacy assembly {
4356 int main () { return 0; }
4360 # Return 1 if an MSA program can be compiled to object
4362 proc check_effective_target_mips_msa { } {
4363 if ![check_effective_target_nomips16] {
4366 return [check_no_compiler_messages msa object {
4367 #if !defined(__mips_msa)
4368 #error "MSA NOT AVAIL"
4370 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
4371 #error "MSA NOT AVAIL FOR ISA REV < 2"
4373 #if !defined(__mips_hard_float)
4374 #error "MSA HARD_FLOAT REQUIRED"
4376 #if __mips_fpr != 64
4377 #error "MSA 64-bit FPR REQUIRED"
4383 v8i16 v = __builtin_msa_ldi_h (1);
4391 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
4394 proc check_effective_target_arm_eabi { } {
4395 return [check_no_compiler_messages arm_eabi object {
4396 #ifndef __ARM_EABI__
4404 # Return 1 if this is an ARM target that adheres to the hard-float variant of
4405 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
4407 proc check_effective_target_arm_hf_eabi { } {
4408 return [check_no_compiler_messages arm_hf_eabi object {
4409 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
4410 #error not hard-float EABI
4417 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
4418 # Some multilibs may be incompatible with this option.
4420 proc check_effective_target_arm_iwmmxt_ok { } {
4421 if { [check_effective_target_arm32] } {
4422 return [check_no_compiler_messages arm_iwmmxt_ok object {
4430 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
4431 # for an ARM target.
4432 proc check_effective_target_arm_prefer_ldrd_strd { } {
4433 if { ![check_effective_target_arm32] } {
4437 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
4438 void foo (void) { __asm__ ("" ::: "r4", "r5"); }
4442 # Return 1 if this is a PowerPC target supporting -meabi.
4444 proc check_effective_target_powerpc_eabi_ok { } {
4445 if { [istarget powerpc*-*-*] } {
4446 return [check_no_compiler_messages powerpc_eabi_ok object {
4454 # Return 1 if this is a PowerPC target with floating-point registers.
4456 proc check_effective_target_powerpc_fprs { } {
4457 if { [istarget powerpc*-*-*]
4458 || [istarget rs6000-*-*] } {
4459 return [check_no_compiler_messages powerpc_fprs object {
4471 # Return 1 if this is a PowerPC target with hardware double-precision
4474 proc check_effective_target_powerpc_hard_double { } {
4475 if { [istarget powerpc*-*-*]
4476 || [istarget rs6000-*-*] } {
4477 return [check_no_compiler_messages powerpc_hard_double object {
4489 # Return 1 if this is a PowerPC target supporting -maltivec.
4491 proc check_effective_target_powerpc_altivec_ok { } {
4492 if { ([istarget powerpc*-*-*]
4493 && ![istarget powerpc-*-linux*paired*])
4494 || [istarget rs6000-*-*] } {
4495 # AltiVec is not supported on AIX before 5.3.
4496 if { [istarget powerpc*-*-aix4*]
4497 || [istarget powerpc*-*-aix5.1*]
4498 || [istarget powerpc*-*-aix5.2*] } {
4501 return [check_no_compiler_messages powerpc_altivec_ok object {
4509 # Return 1 if this is a PowerPC target supporting -mpower8-vector
4511 proc check_effective_target_powerpc_p8vector_ok { } {
4512 if { ([istarget powerpc*-*-*]
4513 && ![istarget powerpc-*-linux*paired*])
4514 || [istarget rs6000-*-*] } {
4515 # AltiVec is not supported on AIX before 5.3.
4516 if { [istarget powerpc*-*-aix4*]
4517 || [istarget powerpc*-*-aix5.1*]
4518 || [istarget powerpc*-*-aix5.2*] } {
4521 return [check_no_compiler_messages powerpc_p8vector_ok object {
4524 asm volatile ("xxlorc vs0,vs0,vs0");
4526 asm volatile ("xxlorc 0,0,0");
4530 } "-mpower8-vector"]
4536 # Return 1 if this is a PowerPC target supporting -mpower9-vector
4538 proc check_effective_target_powerpc_p9vector_ok { } {
4539 if { ([istarget powerpc*-*-*]
4540 && ![istarget powerpc-*-linux*paired*])
4541 || [istarget rs6000-*-*] } {
4542 # AltiVec is not supported on AIX before 5.3.
4543 if { [istarget powerpc*-*-aix4*]
4544 || [istarget powerpc*-*-aix5.1*]
4545 || [istarget powerpc*-*-aix5.2*] } {
4548 return [check_no_compiler_messages powerpc_p9vector_ok object {
4551 vector double v = (vector double) { 0.0, 0.0 };
4552 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
4555 } "-mpower9-vector"]
4561 # Return 1 if this is a PowerPC target supporting -mmodulo
4563 proc check_effective_target_powerpc_p9modulo_ok { } {
4564 if { ([istarget powerpc*-*-*]
4565 && ![istarget powerpc-*-linux*paired*])
4566 || [istarget rs6000-*-*] } {
4567 # AltiVec is not supported on AIX before 5.3.
4568 if { [istarget powerpc*-*-aix4*]
4569 || [istarget powerpc*-*-aix5.1*]
4570 || [istarget powerpc*-*-aix5.2*] } {
4573 return [check_no_compiler_messages powerpc_p9modulo_ok object {
4575 int i = 5, j = 3, r = -1;
4576 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
4585 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
4586 # software emulation on power7/power8 systems or hardware support on power9.
4588 proc check_effective_target_powerpc_float128_sw_ok { } {
4589 if { ([istarget powerpc*-*-*]
4590 && ![istarget powerpc-*-linux*paired*])
4591 || [istarget rs6000-*-*] } {
4592 # AltiVec is not supported on AIX before 5.3.
4593 if { [istarget powerpc*-*-aix4*]
4594 || [istarget powerpc*-*-aix5.1*]
4595 || [istarget powerpc*-*-aix5.2*] } {
4598 return [check_no_compiler_messages powerpc_float128_sw_ok object {
4599 volatile __float128 x = 1.0q;
4600 volatile __float128 y = 2.0q;
4602 __float128 z = x + y;
4605 } "-mfloat128 -mvsx"]
4611 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
4612 # support on power9.
4614 proc check_effective_target_powerpc_float128_hw_ok { } {
4615 if { ([istarget powerpc*-*-*]
4616 && ![istarget powerpc-*-linux*paired*])
4617 || [istarget rs6000-*-*] } {
4618 # AltiVec is not supported on AIX before 5.3.
4619 if { [istarget powerpc*-*-aix4*]
4620 || [istarget powerpc*-*-aix5.1*]
4621 || [istarget powerpc*-*-aix5.2*] } {
4624 return [check_no_compiler_messages powerpc_float128_hw_ok object {
4625 volatile __float128 x = 1.0q;
4626 volatile __float128 y = 2.0q;
4629 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
4632 } "-mfloat128-hardware"]
4638 # Return 1 if this is a PowerPC target supporting -mvsx
4640 proc check_effective_target_powerpc_vsx_ok { } {
4641 if { ([istarget powerpc*-*-*]
4642 && ![istarget powerpc-*-linux*paired*])
4643 || [istarget rs6000-*-*] } {
4644 # VSX is not supported on AIX before 7.1.
4645 if { [istarget powerpc*-*-aix4*]
4646 || [istarget powerpc*-*-aix5*]
4647 || [istarget powerpc*-*-aix6*] } {
4650 return [check_no_compiler_messages powerpc_vsx_ok object {
4653 asm volatile ("xxlor vs0,vs0,vs0");
4655 asm volatile ("xxlor 0,0,0");
4665 # Return 1 if this is a PowerPC target supporting -mhtm
4667 proc check_effective_target_powerpc_htm_ok { } {
4668 if { ([istarget powerpc*-*-*]
4669 && ![istarget powerpc-*-linux*paired*])
4670 || [istarget rs6000-*-*] } {
4671 # HTM is not supported on AIX yet.
4672 if { [istarget powerpc*-*-aix*] } {
4675 return [check_no_compiler_messages powerpc_htm_ok object {
4677 asm volatile ("tbegin. 0");
4686 # Return 1 if the target supports executing HTM hardware instructions,
4687 # 0 otherwise. Cache the result.
4689 proc check_htm_hw_available { } {
4690 return [check_cached_effective_target htm_hw_available {
4691 # For now, disable on Darwin
4692 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
4695 check_runtime_nocache htm_hw_available {
4705 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
4707 proc check_effective_target_powerpc_ppu_ok { } {
4708 if [check_effective_target_powerpc_altivec_ok] {
4709 return [check_no_compiler_messages cell_asm_available object {
4712 asm volatile ("lvlx v0,v0,v0");
4714 asm volatile ("lvlx 0,0,0");
4724 # Return 1 if this is a PowerPC target that supports SPU.
4726 proc check_effective_target_powerpc_spu { } {
4727 if { [istarget powerpc*-*-linux*] } {
4728 return [check_effective_target_powerpc_altivec_ok]
4734 # Return 1 if this is a PowerPC SPE target. The check includes options
4735 # specified by dg-options for this test, so don't cache the result.
4737 proc check_effective_target_powerpc_spe_nocache { } {
4738 if { [istarget powerpc*-*-*] } {
4739 return [check_no_compiler_messages_nocache powerpc_spe object {
4745 } [current_compiler_flags]]
4751 # Return 1 if this is a PowerPC target with SPE enabled.
4753 proc check_effective_target_powerpc_spe { } {
4754 if { [istarget powerpc*-*-*] } {
4755 return [check_no_compiler_messages powerpc_spe object {
4767 # Return 1 if this is a PowerPC target with Altivec enabled.
4769 proc check_effective_target_powerpc_altivec { } {
4770 if { [istarget powerpc*-*-*] } {
4771 return [check_no_compiler_messages powerpc_altivec object {
4783 # Return 1 if this is a PowerPC 405 target. The check includes options
4784 # specified by dg-options for this test, so don't cache the result.
4786 proc check_effective_target_powerpc_405_nocache { } {
4787 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
4788 return [check_no_compiler_messages_nocache powerpc_405 object {
4794 } [current_compiler_flags]]
4800 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
4802 proc check_effective_target_powerpc_elfv2 { } {
4803 if { [istarget powerpc*-*-*] } {
4804 return [check_no_compiler_messages powerpc_elfv2 object {
4806 #error not ELF v2 ABI
4816 # Return 1 if this is a SPU target with a toolchain that
4817 # supports automatic overlay generation.
4819 proc check_effective_target_spu_auto_overlay { } {
4820 if { [istarget spu*-*-elf*] } {
4821 return [check_no_compiler_messages spu_auto_overlay executable {
4823 } "-Wl,--auto-overlay" ]
4829 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
4830 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
4831 # test environment appears to run executables on such a simulator.
4833 proc check_effective_target_ultrasparc_hw { } {
4834 return [check_runtime ultrasparc_hw {
4835 int main() { return 0; }
4836 } "-mcpu=ultrasparc"]
4839 # Return 1 if the test environment supports executing UltraSPARC VIS2
4840 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
4842 proc check_effective_target_ultrasparc_vis2_hw { } {
4843 return [check_runtime ultrasparc_vis2_hw {
4844 int main() { __asm__(".word 0x81b00320"); return 0; }
4845 } "-mcpu=ultrasparc3"]
4848 # Return 1 if the test environment supports executing UltraSPARC VIS3
4849 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
4851 proc check_effective_target_ultrasparc_vis3_hw { } {
4852 return [check_runtime ultrasparc_vis3_hw {
4853 int main() { __asm__(".word 0x81b00220"); return 0; }
4857 # Return 1 if this is a SPARC-V9 target.
4859 proc check_effective_target_sparc_v9 { } {
4860 if { [istarget sparc*-*-*] } {
4861 return [check_no_compiler_messages sparc_v9 object {
4863 asm volatile ("return %i7+8");
4872 # Return 1 if this is a SPARC target with VIS enabled.
4874 proc check_effective_target_sparc_vis { } {
4875 if { [istarget sparc*-*-*] } {
4876 return [check_no_compiler_messages sparc_vis object {
4888 # Return 1 if the target supports hardware vector shift operation.
4890 proc check_effective_target_vect_shift { } {
4891 global et_vect_shift_saved
4894 if [info exists et_vect_shift_saved($et_index)] {
4895 verbose "check_effective_target_vect_shift: using cached result" 2
4897 set et_vect_shift_saved($et_index) 0
4898 if { ([istarget powerpc*-*-*]
4899 && ![istarget powerpc-*-linux*paired*])
4900 || [istarget ia64-*-*]
4901 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4902 || [istarget aarch64*-*-*]
4903 || [check_effective_target_arm32]
4904 || ([istarget mips*-*-*]
4905 && ([et-is-effective-target mips_msa]
4906 || [et-is-effective-target mips_loongson])) } {
4907 set et_vect_shift_saved($et_index) 1
4911 verbose "check_effective_target_vect_shift:\
4912 returning $et_vect_shift_saved($et_index)" 2
4913 return $et_vect_shift_saved($et_index)
4916 proc check_effective_target_whole_vector_shift { } {
4917 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4918 || [istarget ia64-*-*]
4919 || [istarget aarch64*-*-*]
4920 || [istarget powerpc64*-*-*]
4921 || ([check_effective_target_arm32]
4922 && [check_effective_target_arm_little_endian])
4923 || ([istarget mips*-*-*]
4924 && [et-is-effective-target mips_loongson]) } {
4930 verbose "check_effective_target_vect_long: returning $answer" 2
4934 # Return 1 if the target supports vector bswap operations.
4936 proc check_effective_target_vect_bswap { } {
4937 global et_vect_bswap_saved
4940 if [info exists et_vect_bswap_saved($et_index)] {
4941 verbose "check_effective_target_vect_bswap: using cached result" 2
4943 set et_vect_bswap_saved($et_index) 0
4944 if { [istarget aarch64*-*-*]
4945 || ([istarget arm*-*-*]
4946 && [check_effective_target_arm_neon])
4948 set et_vect_bswap_saved($et_index) 1
4952 verbose "check_effective_target_vect_bswap:\
4953 returning $et_vect_bswap_saved($et_index)" 2
4954 return $et_vect_bswap_saved($et_index)
4957 # Return 1 if the target supports hardware vector shift operation for char.
4959 proc check_effective_target_vect_shift_char { } {
4960 global et_vect_shift_char_saved
4963 if [info exists et_vect_shift_char_saved($et_index)] {
4964 verbose "check_effective_target_vect_shift_char: using cached result" 2
4966 set et_vect_shift_char_saved($et_index) 0
4967 if { ([istarget powerpc*-*-*]
4968 && ![istarget powerpc-*-linux*paired*])
4969 || [check_effective_target_arm32]
4970 || ([istarget mips*-*-*]
4971 && [et-is-effective-target mips_msa]) } {
4972 set et_vect_shift_char_saved($et_index) 1
4976 verbose "check_effective_target_vect_shift_char:\
4977 returning $et_vect_shift_char_saved($et_index)" 2
4978 return $et_vect_shift_char_saved($et_index)
4981 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
4983 # This can change for different subtargets so do not cache the result.
4985 proc check_effective_target_vect_long { } {
4986 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4987 || (([istarget powerpc*-*-*]
4988 && ![istarget powerpc-*-linux*paired*])
4989 && [check_effective_target_ilp32])
4990 || [check_effective_target_arm32]
4991 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
4992 || [istarget aarch64*-*-*]
4993 || ([istarget mips*-*-*]
4994 && [et-is-effective-target mips_msa]) } {
5000 verbose "check_effective_target_vect_long: returning $answer" 2
5004 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
5006 # This won't change for different subtargets so cache the result.
5008 proc check_effective_target_vect_float { } {
5009 global et_vect_float_saved
5012 if [info exists et_vect_float_saved($et_index)] {
5013 verbose "check_effective_target_vect_float: using cached result" 2
5015 set et_vect_float_saved($et_index) 0
5016 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5017 || [istarget powerpc*-*-*]
5018 || [istarget spu-*-*]
5019 || [istarget mips-sde-elf]
5020 || [istarget mipsisa64*-*-*]
5021 || [istarget ia64-*-*]
5022 || [istarget aarch64*-*-*]
5023 || ([istarget mips*-*-*]
5024 && [et-is-effective-target mips_msa])
5025 || [check_effective_target_arm32] } {
5026 set et_vect_float_saved($et_index) 1
5030 verbose "check_effective_target_vect_float:\
5031 returning $et_vect_float_saved($et_index)" 2
5032 return $et_vect_float_saved($et_index)
5035 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
5037 # This won't change for different subtargets so cache the result.
5039 proc check_effective_target_vect_double { } {
5040 global et_vect_double_saved
5043 if [info exists et_vect_double_saved($et_index)] {
5044 verbose "check_effective_target_vect_double: using cached result" 2
5046 set et_vect_double_saved($et_index) 0
5047 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
5048 && [check_no_compiler_messages vect_double assembly {
5049 #ifdef __tune_atom__
5050 # error No double vectorizer support.
5053 || [istarget aarch64*-*-*]
5054 || [istarget spu-*-*]
5055 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
5056 || ([istarget mips*-*-*]
5057 && [et-is-effective-target mips_msa]) } {
5058 set et_vect_double_saved($et_index) 1
5062 verbose "check_effective_target_vect_double:\
5063 returning $et_vect_double_saved($et_index)" 2
5064 return $et_vect_double_saved($et_index)
5067 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
5069 # This won't change for different subtargets so cache the result.
5071 proc check_effective_target_vect_long_long { } {
5072 global et_vect_long_long_saved
5075 if [info exists et_vect_long_long_saved($et_index)] {
5076 verbose "check_effective_target_vect_long_long: using cached result" 2
5078 set et_vect_long_long_saved($et_index) 0
5079 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5080 || ([istarget mips*-*-*]
5081 && [et-is-effective-target mips_msa]) } {
5082 set et_vect_long_long_saved($et_index) 1
5086 verbose "check_effective_target_vect_long_long:\
5087 returning $et_vect_long_long_saved($et_index)" 2
5088 return $et_vect_long_long_saved($et_index)
5092 # Return 1 if the target plus current options does not support a vector
5093 # max instruction on "int", 0 otherwise.
5095 # This won't change for different subtargets so cache the result.
5097 proc check_effective_target_vect_no_int_min_max { } {
5098 global et_vect_no_int_min_max_saved
5101 if [info exists et_vect_no_int_min_max_saved($et_index)] {
5102 verbose "check_effective_target_vect_no_int_min_max:\
5103 using cached result" 2
5105 set et_vect_no_int_min_max_saved($et_index) 0
5106 if { [istarget sparc*-*-*]
5107 || [istarget spu-*-*]
5108 || [istarget alpha*-*-*]
5109 || ([istarget mips*-*-*]
5110 && [et-is-effective-target mips_loongson]) } {
5111 set et_vect_no_int_min_max_saved($et_index) 1
5114 verbose "check_effective_target_vect_no_int_min_max:\
5115 returning $et_vect_no_int_min_max_saved($et_index)" 2
5116 return $et_vect_no_int_min_max_saved($et_index)
5119 # Return 1 if the target plus current options does not support a vector
5120 # add instruction on "int", 0 otherwise.
5122 # This won't change for different subtargets so cache the result.
5124 proc check_effective_target_vect_no_int_add { } {
5125 global et_vect_no_int_add_saved
5128 if [info exists et_vect_no_int_add_saved($et_index)] {
5129 verbose "check_effective_target_vect_no_int_add: using cached result" 2
5131 set et_vect_no_int_add_saved($et_index) 0
5132 # Alpha only supports vector add on V8QI and V4HI.
5133 if { [istarget alpha*-*-*] } {
5134 set et_vect_no_int_add_saved($et_index) 1
5137 verbose "check_effective_target_vect_no_int_add:\
5138 returning $et_vect_no_int_add_saved($et_index)" 2
5139 return $et_vect_no_int_add_saved($et_index)
5142 # Return 1 if the target plus current options does not support vector
5143 # bitwise instructions, 0 otherwise.
5145 # This won't change for different subtargets so cache the result.
5147 proc check_effective_target_vect_no_bitwise { } {
5148 global et_vect_no_bitwise_saved
5151 if [info exists et_vect_no_bitwise_saved($et_index)] {
5152 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
5154 set et_vect_no_bitwise_saved($et_index) 0
5156 verbose "check_effective_target_vect_no_bitwise:\
5157 returning $et_vect_no_bitwise_saved($et_index)" 2
5158 return $et_vect_no_bitwise_saved($et_index)
5161 # Return 1 if the target plus current options supports vector permutation,
5164 # This won't change for different subtargets so cache the result.
5166 proc check_effective_target_vect_perm { } {
5167 global et_vect_perm_saved
5170 if [info exists et_vect_perm_saved($et_index)] {
5171 verbose "check_effective_target_vect_perm: using cached result" 2
5173 set et_vect_perm_saved($et_index) 0
5174 if { [is-effective-target arm_neon_ok]
5175 || [istarget aarch64*-*-*]
5176 || [istarget powerpc*-*-*]
5177 || [istarget spu-*-*]
5178 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5179 || ([istarget mips*-*-*]
5180 && ([et-is-effective-target mpaired_single]
5181 || [et-is-effective-target mips_msa])) } {
5182 set et_vect_perm_saved($et_index) 1
5185 verbose "check_effective_target_vect_perm:\
5186 returning $et_vect_perm_saved($et_index)" 2
5187 return $et_vect_perm_saved($et_index)
5190 # Return 1 if the target plus current options supports vector permutation
5191 # on byte-sized elements, 0 otherwise.
5193 # This won't change for different subtargets so cache the result.
5195 proc check_effective_target_vect_perm_byte { } {
5196 global et_vect_perm_byte_saved
5199 if [info exists et_vect_perm_byte_saved($et_index)] {
5200 verbose "check_effective_target_vect_perm_byte: using cached result" 2
5202 set et_vect_perm_byte_saved($et_index) 0
5203 if { ([is-effective-target arm_neon_ok]
5204 && [is-effective-target arm_little_endian])
5205 || ([istarget aarch64*-*-*]
5206 && [is-effective-target aarch64_little_endian])
5207 || [istarget powerpc*-*-*]
5208 || [istarget spu-*-*]
5209 || ([istarget mips-*.*]
5210 && [et-is-effective-target mips_msa]) } {
5211 set et_vect_perm_byte_saved($et_index) 1
5214 verbose "check_effective_target_vect_perm_byte:\
5215 returning $et_vect_perm_byte_saved($et_index)" 2
5216 return $et_vect_perm_byte_saved($et_index)
5219 # Return 1 if the target plus current options supports vector permutation
5220 # on short-sized elements, 0 otherwise.
5222 # This won't change for different subtargets so cache the result.
5224 proc check_effective_target_vect_perm_short { } {
5225 global et_vect_perm_short_saved
5228 if [info exists et_vect_perm_short_saved($et_index)] {
5229 verbose "check_effective_target_vect_perm_short: using cached result" 2
5231 set et_vect_perm_short_saved($et_index) 0
5232 if { ([is-effective-target arm_neon_ok]
5233 && [is-effective-target arm_little_endian])
5234 || ([istarget aarch64*-*-*]
5235 && [is-effective-target aarch64_little_endian])
5236 || [istarget powerpc*-*-*]
5237 || [istarget spu-*-*]
5238 || ([istarget mips*-*-*]
5239 && [et-is-effective-target mips_msa]) } {
5240 set et_vect_perm_short_saved($et_index) 1
5243 verbose "check_effective_target_vect_perm_short:\
5244 returning $et_vect_perm_short_saved($et_index)" 2
5245 return $et_vect_perm_short_saved($et_index)
5248 # Return 1 if the target plus current options supports a vector
5249 # widening summation of *short* args into *int* result, 0 otherwise.
5251 # This won't change for different subtargets so cache the result.
5253 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
5254 global et_vect_widen_sum_hi_to_si_pattern_saved
5257 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved($et_index)] {
5258 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5259 using cached result" 2
5261 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 0
5262 if { [istarget powerpc*-*-*]
5263 || [istarget aarch64*-*-*]
5264 || ([istarget arm*-*-*] &&
5265 [check_effective_target_arm_neon_ok])
5266 || [istarget ia64-*-*] } {
5267 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 1
5270 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5271 returning $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)" 2
5272 return $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)
5275 # Return 1 if the target plus current options supports a vector
5276 # widening summation of *short* args into *int* result, 0 otherwise.
5277 # A target can also support this widening summation if it can support
5278 # promotion (unpacking) from shorts to ints.
5280 # This won't change for different subtargets so cache the result.
5282 proc check_effective_target_vect_widen_sum_hi_to_si { } {
5283 global et_vect_widen_sum_hi_to_si_saved
5286 if [info exists et_vect_widen_sum_hi_to_si_saved($et_index)] {
5287 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
5288 using cached result" 2
5290 set et_vect_widen_sum_hi_to_si_saved($et_index) \
5291 [check_effective_target_vect_unpack]
5292 if { [istarget powerpc*-*-*]
5293 || [istarget ia64-*-*] } {
5294 set et_vect_widen_sum_hi_to_si_saved($et_index) 1
5297 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
5298 returning $et_vect_widen_sum_hi_to_si_saved($et_index)" 2
5299 return $et_vect_widen_sum_hi_to_si_saved($et_index)
5302 # Return 1 if the target plus current options supports a vector
5303 # widening summation of *char* args into *short* result, 0 otherwise.
5304 # A target can also support this widening summation if it can support
5305 # promotion (unpacking) from chars to shorts.
5307 # This won't change for different subtargets so cache the result.
5309 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
5310 global et_vect_widen_sum_qi_to_hi_saved
5313 if [info exists et_vect_widen_sum_qi_to_hi_saved($et_index)] {
5314 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5315 using cached result" 2
5317 set et_vect_widen_sum_qi_to_hi_saved($et_index) 0
5318 if { [check_effective_target_vect_unpack]
5319 || [check_effective_target_arm_neon_ok]
5320 || [istarget ia64-*-*] } {
5321 set et_vect_widen_sum_qi_to_hi_saved($et_index) 1
5324 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5325 returning $et_vect_widen_sum_qi_to_hi_saved($et_index)" 2
5326 return $et_vect_widen_sum_qi_to_hi_saved($et_index)
5329 # Return 1 if the target plus current options supports a vector
5330 # widening summation of *char* args into *int* result, 0 otherwise.
5332 # This won't change for different subtargets so cache the result.
5334 proc check_effective_target_vect_widen_sum_qi_to_si { } {
5335 global et_vect_widen_sum_qi_to_si_saved
5338 if [info exists et_vect_widen_sum_qi_to_si_saved($et_index)] {
5339 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
5340 using cached result" 2
5342 set et_vect_widen_sum_qi_to_si_saved($et_index) 0
5343 if { [istarget powerpc*-*-*] } {
5344 set et_vect_widen_sum_qi_to_si_saved($et_index) 1
5347 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
5348 returning $et_vect_widen_sum_qi_to_si_saved($et_index)" 2
5349 return $et_vect_widen_sum_qi_to_si_saved($et_index)
5352 # Return 1 if the target plus current options supports a vector
5353 # widening multiplication of *char* args into *short* result, 0 otherwise.
5354 # A target can also support this widening multplication if it can support
5355 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
5356 # multiplication of shorts).
5358 # This won't change for different subtargets so cache the result.
5361 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
5362 global et_vect_widen_mult_qi_to_hi_saved
5365 if [info exists et_vect_widen_mult_qi_to_hi_saved($et_index)] {
5366 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
5367 using cached result" 2
5369 if { [check_effective_target_vect_unpack]
5370 && [check_effective_target_vect_short_mult] } {
5371 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
5373 set et_vect_widen_mult_qi_to_hi_saved($et_index) 0
5375 if { [istarget powerpc*-*-*]
5376 || [istarget aarch64*-*-*]
5377 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
5378 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
5381 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
5382 returning $et_vect_widen_mult_qi_to_hi_saved($et_index)" 2
5383 return $et_vect_widen_mult_qi_to_hi_saved($et_index)
5386 # Return 1 if the target plus current options supports a vector
5387 # widening multiplication of *short* args into *int* result, 0 otherwise.
5388 # A target can also support this widening multplication if it can support
5389 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
5390 # multiplication of ints).
5392 # This won't change for different subtargets so cache the result.
5395 proc check_effective_target_vect_widen_mult_hi_to_si { } {
5396 global et_vect_widen_mult_hi_to_si_saved
5399 if [info exists et_vect_widen_mult_hi_to_si_saved($et_index)] {
5400 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
5401 using cached result" 2
5403 if { [check_effective_target_vect_unpack]
5404 && [check_effective_target_vect_int_mult] } {
5405 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
5407 set et_vect_widen_mult_hi_to_si_saved($et_index) 0
5409 if { [istarget powerpc*-*-*]
5410 || [istarget spu-*-*]
5411 || [istarget ia64-*-*]
5412 || [istarget aarch64*-*-*]
5413 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5414 || ([istarget arm*-*-*]
5415 && [check_effective_target_arm_neon_ok]) } {
5416 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
5419 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
5420 returning $et_vect_widen_mult_hi_to_si_saved($et_index)" 2
5421 return $et_vect_widen_mult_hi_to_si_saved($et_index)
5424 # Return 1 if the target plus current options supports a vector
5425 # widening multiplication of *char* args into *short* result, 0 otherwise.
5427 # This won't change for different subtargets so cache the result.
5429 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
5430 global et_vect_widen_mult_qi_to_hi_pattern_saved
5433 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)] {
5434 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5435 using cached result" 2
5437 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 0
5438 if { [istarget powerpc*-*-*]
5439 || ([istarget arm*-*-*]
5440 && [check_effective_target_arm_neon_ok]
5441 && [check_effective_target_arm_little_endian]) } {
5442 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 1
5445 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5446 returning $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)" 2
5447 return $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)
5450 # Return 1 if the target plus current options supports a vector
5451 # widening multiplication of *short* args into *int* result, 0 otherwise.
5453 # This won't change for different subtargets so cache the result.
5455 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
5456 global et_vect_widen_mult_hi_to_si_pattern_saved
5459 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved($et_index)] {
5460 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5461 using cached result" 2
5463 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 0
5464 if { [istarget powerpc*-*-*]
5465 || [istarget spu-*-*]
5466 || [istarget ia64-*-*]
5467 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5468 || ([istarget arm*-*-*]
5469 && [check_effective_target_arm_neon_ok]
5470 && [check_effective_target_arm_little_endian]) } {
5471 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 1
5474 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5475 returning $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)" 2
5476 return $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)
5479 # Return 1 if the target plus current options supports a vector
5480 # widening multiplication of *int* args into *long* result, 0 otherwise.
5482 # This won't change for different subtargets so cache the result.
5484 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
5485 global et_vect_widen_mult_si_to_di_pattern_saved
5488 if [info exists et_vect_widen_mult_si_to_di_pattern_saved($et_index)] {
5489 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
5490 using cached result" 2
5492 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 0
5493 if {[istarget ia64-*-*]
5494 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
5495 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 1
5498 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
5499 returning $et_vect_widen_mult_si_to_di_pattern_saved($et_index)" 2
5500 return $et_vect_widen_mult_si_to_di_pattern_saved($et_index)
5503 # Return 1 if the target plus current options supports a vector
5504 # widening shift, 0 otherwise.
5506 # This won't change for different subtargets so cache the result.
5508 proc check_effective_target_vect_widen_shift { } {
5509 global et_vect_widen_shift_saved
5512 if [info exists et_vect_shift_saved($et_index)] {
5513 verbose "check_effective_target_vect_widen_shift: using cached result" 2
5515 set et_vect_widen_shift_saved($et_index) 0
5516 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
5517 set et_vect_widen_shift_saved($et_index) 1
5520 verbose "check_effective_target_vect_widen_shift:\
5521 returning $et_vect_widen_shift_saved($et_index)" 2
5522 return $et_vect_widen_shift_saved($et_index)
5525 # Return 1 if the target plus current options supports a vector
5526 # dot-product of signed chars, 0 otherwise.
5528 # This won't change for different subtargets so cache the result.
5530 proc check_effective_target_vect_sdot_qi { } {
5531 global et_vect_sdot_qi_saved
5534 if [info exists et_vect_sdot_qi_saved($et_index)] {
5535 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
5537 set et_vect_sdot_qi_saved($et_index) 0
5538 if { [istarget ia64-*-*]
5539 || ([istarget mips*-*-*]
5540 && [et-is-effective-target mips_msa]) } {
5541 set et_vect_udot_qi_saved 1
5544 verbose "check_effective_target_vect_sdot_qi:\
5545 returning $et_vect_sdot_qi_saved($et_index)" 2
5546 return $et_vect_sdot_qi_saved($et_index)
5549 # Return 1 if the target plus current options supports a vector
5550 # dot-product of unsigned chars, 0 otherwise.
5552 # This won't change for different subtargets so cache the result.
5554 proc check_effective_target_vect_udot_qi { } {
5555 global et_vect_udot_qi_saved
5558 if [info exists et_vect_udot_qi_saved($et_index)] {
5559 verbose "check_effective_target_vect_udot_qi: using cached result" 2
5561 set et_vect_udot_qi_saved($et_index) 0
5562 if { [istarget powerpc*-*-*]
5563 || [istarget ia64-*-*]
5564 || ([istarget mips*-*-*]
5565 && [et-is-effective-target mips_msa]) } {
5566 set et_vect_udot_qi_saved($et_index) 1
5569 verbose "check_effective_target_vect_udot_qi:\
5570 returning $et_vect_udot_qi_saved($et_index)" 2
5571 return $et_vect_udot_qi_saved($et_index)
5574 # Return 1 if the target plus current options supports a vector
5575 # dot-product of signed shorts, 0 otherwise.
5577 # This won't change for different subtargets so cache the result.
5579 proc check_effective_target_vect_sdot_hi { } {
5580 global et_vect_sdot_hi_saved
5583 if [info exists et_vect_sdot_hi_saved($et_index)] {
5584 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
5586 set et_vect_sdot_hi_saved($et_index) 0
5587 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5588 || [istarget ia64-*-*]
5589 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5590 || ([istarget mips*-*-*]
5591 && [et-is-effective-target mips_msa]) } {
5592 set et_vect_sdot_hi_saved($et_index) 1
5595 verbose "check_effective_target_vect_sdot_hi:\
5596 returning $et_vect_sdot_hi_saved($et_index)" 2
5597 return $et_vect_sdot_hi_saved($et_index)
5600 # Return 1 if the target plus current options supports a vector
5601 # dot-product of unsigned shorts, 0 otherwise.
5603 # This won't change for different subtargets so cache the result.
5605 proc check_effective_target_vect_udot_hi { } {
5606 global et_vect_udot_hi_saved
5609 if [info exists et_vect_udot_hi_saved($et_index)] {
5610 verbose "check_effective_target_vect_udot_hi: using cached result" 2
5612 set et_vect_udot_hi_saved($et_index) 0
5613 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5614 || ([istarget mips*-*-*]
5615 && [et-is-effective-target mips_msa]) } {
5616 set et_vect_udot_hi_saved($et_index) 1
5619 verbose "check_effective_target_vect_udot_hi:\
5620 returning $et_vect_udot_hi_saved($et_index)" 2
5621 return $et_vect_udot_hi_saved($et_index)
5624 # Return 1 if the target plus current options supports a vector
5625 # sad operation of unsigned chars, 0 otherwise.
5627 # This won't change for different subtargets so cache the result.
5629 proc check_effective_target_vect_usad_char { } {
5630 global et_vect_usad_char_saved
5633 if [info exists et_vect_usad_char_saved($et_index)] {
5634 verbose "check_effective_target_vect_usad_char: using cached result" 2
5636 set et_vect_usad_char_saved($et_index) 0
5637 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
5638 set et_vect_usad_char_saved($et_index) 1
5641 verbose "check_effective_target_vect_usad_char:\
5642 returning $et_vect_usad_char_saved($et_index)" 2
5643 return $et_vect_usad_char_saved($et_index)
5646 # Return 1 if the target plus current options supports a vector
5647 # demotion (packing) of shorts (to chars) and ints (to shorts)
5648 # using modulo arithmetic, 0 otherwise.
5650 # This won't change for different subtargets so cache the result.
5652 proc check_effective_target_vect_pack_trunc { } {
5653 global et_vect_pack_trunc_saved
5656 if [info exists et_vect_pack_trunc_saved($et_index)] {
5657 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
5659 set et_vect_pack_trunc_saved($et_index) 0
5660 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5661 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5662 || [istarget aarch64*-*-*]
5663 || [istarget spu-*-*]
5664 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
5665 && [check_effective_target_arm_little_endian])
5666 || ([istarget mips*-*-*]
5667 && [et-is-effective-target mips_msa]) } {
5668 set et_vect_pack_trunc_saved($et_index) 1
5671 verbose "check_effective_target_vect_pack_trunc:\
5672 returning $et_vect_pack_trunc_saved($et_index)" 2
5673 return $et_vect_pack_trunc_saved($et_index)
5676 # Return 1 if the target plus current options supports a vector
5677 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
5679 # This won't change for different subtargets so cache the result.
5681 proc check_effective_target_vect_unpack { } {
5682 global et_vect_unpack_saved
5685 if [info exists et_vect_unpack_saved($et_index)] {
5686 verbose "check_effective_target_vect_unpack: using cached result" 2
5688 set et_vect_unpack_saved($et_index) 0
5689 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
5690 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5691 || [istarget spu-*-*]
5692 || [istarget ia64-*-*]
5693 || [istarget aarch64*-*-*]
5694 || ([istarget mips*-*-*]
5695 && [et-is-effective-target mips_msa])
5696 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
5697 && [check_effective_target_arm_little_endian]) } {
5698 set et_vect_unpack_saved($et_index) 1
5701 verbose "check_effective_target_vect_unpack:\
5702 returning $et_vect_unpack_saved($et_index)" 2
5703 return $et_vect_unpack_saved($et_index)
5706 # Return 1 if the target plus current options does not guarantee
5707 # that its STACK_BOUNDARY is >= the reguired vector alignment.
5709 # This won't change for different subtargets so cache the result.
5711 proc check_effective_target_unaligned_stack { } {
5712 global et_unaligned_stack_saved
5714 if [info exists et_unaligned_stack_saved] {
5715 verbose "check_effective_target_unaligned_stack: using cached result" 2
5717 set et_unaligned_stack_saved 0
5719 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
5720 return $et_unaligned_stack_saved
5723 # Return 1 if the target plus current options does not support a vector
5724 # alignment mechanism, 0 otherwise.
5726 # This won't change for different subtargets so cache the result.
5728 proc check_effective_target_vect_no_align { } {
5729 global et_vect_no_align_saved
5732 if [info exists et_vect_no_align_saved($et_index)] {
5733 verbose "check_effective_target_vect_no_align: using cached result" 2
5735 set et_vect_no_align_saved($et_index) 0
5736 if { [istarget mipsisa64*-*-*]
5737 || [istarget mips-sde-elf]
5738 || [istarget sparc*-*-*]
5739 || [istarget ia64-*-*]
5740 || [check_effective_target_arm_vect_no_misalign]
5741 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
5742 || ([istarget mips*-*-*]
5743 && [et-is-effective-target mips_loongson]) } {
5744 set et_vect_no_align_saved($et_index) 1
5747 verbose "check_effective_target_vect_no_align:\
5748 returning $et_vect_no_align_saved($et_index)" 2
5749 return $et_vect_no_align_saved($et_index)
5752 # Return 1 if the target supports a vector misalign access, 0 otherwise.
5754 # This won't change for different subtargets so cache the result.
5756 proc check_effective_target_vect_hw_misalign { } {
5757 global et_vect_hw_misalign_saved
5760 if [info exists et_vect_hw_misalign_saved($et_index)] {
5761 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
5763 set et_vect_hw_misalign_saved($et_index) 0
5764 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5765 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
5766 || [istarget aarch64*-*-*]
5767 || ([istarget mips*-*-*] && [et-is-effective-target mips_msa]) } {
5768 set et_vect_hw_misalign_saved($et_index) 1
5770 if { [istarget arm*-*-*] } {
5771 set et_vect_hw_misalign_saved($et_index) [check_effective_target_arm_vect_no_misalign]
5774 verbose "check_effective_target_vect_hw_misalign:\
5775 returning $et_vect_hw_misalign_saved($et_index)" 2
5776 return $et_vect_hw_misalign_saved($et_index)
5780 # Return 1 if arrays are aligned to the vector alignment
5781 # boundary, 0 otherwise.
5783 proc check_effective_target_vect_aligned_arrays { } {
5784 set et_vect_aligned_arrays 0
5785 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
5786 && !([is-effective-target ia32]
5787 || ([check_avx_available] && ![check_prefer_avx128])))
5788 || [istarget spu-*-*] } {
5789 set et_vect_aligned_arrays 1
5792 verbose "check_effective_target_vect_aligned_arrays:\
5793 returning $et_vect_aligned_arrays" 2
5794 return $et_vect_aligned_arrays
5797 # Return 1 if types of size 32 bit or less are naturally aligned
5798 # (aligned to their type-size), 0 otherwise.
5800 # This won't change for different subtargets so cache the result.
5802 proc check_effective_target_natural_alignment_32 { } {
5803 global et_natural_alignment_32
5805 if [info exists et_natural_alignment_32_saved] {
5806 verbose "check_effective_target_natural_alignment_32: using cached result" 2
5808 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
5809 set et_natural_alignment_32_saved 1
5810 if { ([istarget *-*-darwin*] && [is-effective-target lp64])
5811 || [istarget avr-*-*] } {
5812 set et_natural_alignment_32_saved 0
5815 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
5816 return $et_natural_alignment_32_saved
5819 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
5820 # type-size), 0 otherwise.
5822 # This won't change for different subtargets so cache the result.
5824 proc check_effective_target_natural_alignment_64 { } {
5825 global et_natural_alignment_64
5827 if [info exists et_natural_alignment_64_saved] {
5828 verbose "check_effective_target_natural_alignment_64: using cached result" 2
5830 set et_natural_alignment_64_saved 0
5831 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
5832 || [istarget spu-*-*] } {
5833 set et_natural_alignment_64_saved 1
5836 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
5837 return $et_natural_alignment_64_saved
5840 # Return 1 if all vector types are naturally aligned (aligned to their
5841 # type-size), 0 otherwise.
5843 proc check_effective_target_vect_natural_alignment { } {
5844 set et_vect_natural_alignment 1
5845 if { [check_effective_target_arm_eabi]
5846 || [istarget nvptx-*-*]
5847 || [istarget s390*-*-*] } {
5848 set et_vect_natural_alignment 0
5850 verbose "check_effective_target_vect_natural_alignment:\
5851 returning $et_vect_natural_alignment" 2
5852 return $et_vect_natural_alignment
5855 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
5857 proc check_effective_target_vector_alignment_reachable { } {
5858 set et_vector_alignment_reachable 0
5859 if { [check_effective_target_vect_aligned_arrays]
5860 || [check_effective_target_natural_alignment_32] } {
5861 set et_vector_alignment_reachable 1
5863 verbose "check_effective_target_vector_alignment_reachable:\
5864 returning $et_vector_alignment_reachable" 2
5865 return $et_vector_alignment_reachable
5868 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
5870 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
5871 set et_vector_alignment_reachable_for_64bit 0
5872 if { [check_effective_target_vect_aligned_arrays]
5873 || [check_effective_target_natural_alignment_64] } {
5874 set et_vector_alignment_reachable_for_64bit 1
5876 verbose "check_effective_target_vector_alignment_reachable_for_64bit:\
5877 returning $et_vector_alignment_reachable_for_64bit" 2
5878 return $et_vector_alignment_reachable_for_64bit
5881 # Return 1 if the target only requires element alignment for vector accesses
5883 proc check_effective_target_vect_element_align { } {
5884 global et_vect_element_align
5887 if [info exists et_vect_element_align($et_index)] {
5888 verbose "check_effective_target_vect_element_align:\
5889 using cached result" 2
5891 set et_vect_element_align($et_index) 0
5892 if { ([istarget arm*-*-*]
5893 && ![check_effective_target_arm_vect_no_misalign])
5894 || [check_effective_target_vect_hw_misalign] } {
5895 set et_vect_element_align($et_index) 1
5899 verbose "check_effective_target_vect_element_align:\
5900 returning $et_vect_element_align($et_index)" 2
5901 return $et_vect_element_align($et_index)
5904 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
5906 proc check_effective_target_vect_load_lanes { } {
5907 global et_vect_load_lanes
5909 if [info exists et_vect_load_lanes] {
5910 verbose "check_effective_target_vect_load_lanes: using cached result" 2
5912 set et_vect_load_lanes 0
5913 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
5914 || [istarget aarch64*-*-*] } {
5915 set et_vect_load_lanes 1
5919 verbose "check_effective_target_vect_load_lanes: returning $et_vect_load_lanes" 2
5920 return $et_vect_load_lanes
5923 # Return 1 if the target supports vector conditional operations, 0 otherwise.
5925 proc check_effective_target_vect_condition { } {
5926 global et_vect_cond_saved
5929 if [info exists et_vect_cond_saved($et_index)] {
5930 verbose "check_effective_target_vect_cond: using cached result" 2
5932 set et_vect_cond_saved($et_index) 0
5933 if { [istarget aarch64*-*-*]
5934 || [istarget powerpc*-*-*]
5935 || [istarget ia64-*-*]
5936 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5937 || [istarget spu-*-*]
5938 || ([istarget mips*-*-*]
5939 && [et-is-effective-target mips_msa])
5940 || ([istarget arm*-*-*]
5941 && [check_effective_target_arm_neon_ok]) } {
5942 set et_vect_cond_saved($et_index) 1
5946 verbose "check_effective_target_vect_cond:\
5947 returning $et_vect_cond_saved($et_index)" 2
5948 return $et_vect_cond_saved($et_index)
5951 # Return 1 if the target supports vector conditional operations where
5952 # the comparison has different type from the lhs, 0 otherwise.
5954 proc check_effective_target_vect_cond_mixed { } {
5955 global et_vect_cond_mixed_saved
5958 if [info exists et_vect_cond_mixed_saved($et_index)] {
5959 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
5961 set et_vect_cond_mixed_saved($et_index) 0
5962 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5963 || [istarget aarch64*-*-*]
5964 || [istarget powerpc*-*-*]
5965 || ([istarget mips*-*-*]
5966 && [et-is-effective-target mips_msa]) } {
5967 set et_vect_cond_mixed_saved($et_index) 1
5971 verbose "check_effective_target_vect_cond_mixed:\
5972 returning $et_vect_cond_mixed_saved($et_index)" 2
5973 return $et_vect_cond_mixed_saved($et_index)
5976 # Return 1 if the target supports vector char multiplication, 0 otherwise.
5978 proc check_effective_target_vect_char_mult { } {
5979 global et_vect_char_mult_saved
5982 if [info exists et_vect_char_mult_saved($et_index)] {
5983 verbose "check_effective_target_vect_char_mult: using cached result" 2
5985 set et_vect_char_mult_saved($et_index) 0
5986 if { [istarget aarch64*-*-*]
5987 || [istarget ia64-*-*]
5988 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5989 || [check_effective_target_arm32]
5990 || [check_effective_target_powerpc_altivec]
5991 || ([istarget mips*-*-*]
5992 && [et-is-effective-target mips_msa]) } {
5993 set et_vect_char_mult_saved($et_index) 1
5997 verbose "check_effective_target_vect_char_mult:\
5998 returning $et_vect_char_mult_saved($et_index)" 2
5999 return $et_vect_char_mult_saved($et_index)
6002 # Return 1 if the target supports vector short multiplication, 0 otherwise.
6004 proc check_effective_target_vect_short_mult { } {
6005 global et_vect_short_mult_saved
6008 if [info exists et_vect_short_mult_saved($et_index)] {
6009 verbose "check_effective_target_vect_short_mult: using cached result" 2
6011 set et_vect_short_mult_saved($et_index) 0
6012 if { [istarget ia64-*-*]
6013 || [istarget spu-*-*]
6014 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6015 || [istarget powerpc*-*-*]
6016 || [istarget aarch64*-*-*]
6017 || [check_effective_target_arm32]
6018 || ([istarget mips*-*-*]
6019 && ([et-is-effective-target mips_msa]
6020 || [et-is-effective-target mips_loongson])) } {
6021 set et_vect_short_mult_saved($et_index) 1
6025 verbose "check_effective_target_vect_short_mult:\
6026 returning $et_vect_short_mult_saved($et_index)" 2
6027 return $et_vect_short_mult_saved($et_index)
6030 # Return 1 if the target supports vector int multiplication, 0 otherwise.
6032 proc check_effective_target_vect_int_mult { } {
6033 global et_vect_int_mult_saved
6036 if [info exists et_vect_int_mult_saved($et_index)] {
6037 verbose "check_effective_target_vect_int_mult: using cached result" 2
6039 set et_vect_int_mult_saved($et_index) 0
6040 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6041 || [istarget spu-*-*]
6042 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6043 || [istarget ia64-*-*]
6044 || [istarget aarch64*-*-*]
6045 || ([istarget mips*-*-*]
6046 && [et-is-effective-target mips_msa])
6047 || [check_effective_target_arm32] } {
6048 set et_vect_int_mult_saved($et_index) 1
6052 verbose "check_effective_target_vect_int_mult:\
6053 returning $et_vect_int_mult_saved($et_index)" 2
6054 return $et_vect_int_mult_saved($et_index)
6057 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
6059 proc check_effective_target_vect_extract_even_odd { } {
6060 global et_vect_extract_even_odd_saved
6063 if [info exists et_vect_extract_even_odd_saved($et_index)] {
6064 verbose "check_effective_target_vect_extract_even_odd:\
6065 using cached result" 2
6067 set et_vect_extract_even_odd_saved($et_index) 0
6068 if { [istarget aarch64*-*-*]
6069 || [istarget powerpc*-*-*]
6070 || [is-effective-target arm_neon_ok]
6071 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6072 || [istarget ia64-*-*]
6073 || [istarget spu-*-*]
6074 || ([istarget mips*-*-*]
6075 && ([et-is-effective-target mips_msa]
6076 || [et-is-effective-target mpaired_single])) } {
6077 set et_vect_extract_even_odd_saved($et_index) 1
6081 verbose "check_effective_target_vect_extract_even_odd:\
6082 returning $et_vect_extract_even_odd_saved($et_index)" 2
6083 return $et_vect_extract_even_odd_saved($et_index)
6086 # Return 1 if the target supports vector interleaving, 0 otherwise.
6088 proc check_effective_target_vect_interleave { } {
6089 global et_vect_interleave_saved
6092 if [info exists et_vect_interleave_saved($et_index)] {
6093 verbose "check_effective_target_vect_interleave: using cached result" 2
6095 set et_vect_interleave_saved($et_index) 0
6096 if { [istarget aarch64*-*-*]
6097 || [istarget powerpc*-*-*]
6098 || [is-effective-target arm_neon_ok]
6099 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6100 || [istarget ia64-*-*]
6101 || [istarget spu-*-*]
6102 || ([istarget mips*-*-*]
6103 && ([et-is-effective-target mpaired_single]
6104 || [et-is-effective-target mips_msa])) } {
6105 set et_vect_interleave_saved($et_index) 1
6109 verbose "check_effective_target_vect_interleave:\
6110 returning $et_vect_interleave_saved($et_index)" 2
6111 return $et_vect_interleave_saved($et_index)
6114 foreach N {2 3 4 8} {
6115 eval [string map [list N $N] {
6116 # Return 1 if the target supports 2-vector interleaving
6117 proc check_effective_target_vect_stridedN { } {
6118 global et_vect_stridedN_saved
6121 if [info exists et_vect_stridedN_saved($et_index)] {
6122 verbose "check_effective_target_vect_stridedN:\
6123 using cached result" 2
6125 set et_vect_stridedN_saved($et_index) 0
6127 && [check_effective_target_vect_interleave]
6128 && [check_effective_target_vect_extract_even_odd] } {
6129 set et_vect_stridedN_saved($et_index) 1
6131 if { ([istarget arm*-*-*]
6132 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
6133 set et_vect_stridedN_saved($et_index) 1
6137 verbose "check_effective_target_vect_stridedN:\
6138 returning $et_vect_stridedN_saved($et_index)" 2
6139 return $et_vect_stridedN_saved($et_index)
6144 # Return 1 if the target supports multiple vector sizes
6146 proc check_effective_target_vect_multiple_sizes { } {
6147 global et_vect_multiple_sizes_saved
6150 set et_vect_multiple_sizes_saved($et_index) 0
6151 if { [istarget aarch64*-*-*]
6152 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
6153 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
6154 && ([check_avx_available] && ![check_prefer_avx128])) } {
6155 set et_vect_multiple_sizes_saved($et_index) 1
6158 verbose "check_effective_target_vect_multiple_sizes:\
6159 returning $et_vect_multiple_sizes_saved($et_index)" 2
6160 return $et_vect_multiple_sizes_saved($et_index)
6163 # Return 1 if the target supports vectors of 64 bits.
6165 proc check_effective_target_vect64 { } {
6166 global et_vect64_saved
6169 if [info exists et_vect64_saved($et_index)] {
6170 verbose "check_effective_target_vect64: using cached result" 2
6172 set et_vect64_saved($et_index) 0
6173 if { ([istarget arm*-*-*]
6174 && [check_effective_target_arm_neon_ok]
6175 && [check_effective_target_arm_little_endian])
6176 || [istarget aarch64*-*-*]
6177 || [istarget sparc*-*-*] } {
6178 set et_vect64_saved($et_index) 1
6182 verbose "check_effective_target_vect64:\
6183 returning $et_vect64_saved($et_index)" 2
6184 return $et_vect64_saved($et_index)
6187 # Return 1 if the target supports vector copysignf calls.
6189 proc check_effective_target_vect_call_copysignf { } {
6190 global et_vect_call_copysignf_saved
6193 if [info exists et_vect_call_copysignf_saved($et_index)] {
6194 verbose "check_effective_target_vect_call_copysignf:\
6195 using cached result" 2
6197 set et_vect_call_copysignf_saved($et_index) 0
6198 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6199 || [istarget powerpc*-*-*]
6200 || [istarget aarch64*-*-*] } {
6201 set et_vect_call_copysignf_saved($et_index) 1
6205 verbose "check_effective_target_vect_call_copysignf:\
6206 returning $et_vect_call_copysignf_saved($et_index)" 2
6207 return $et_vect_call_copysignf_saved($et_index)
6210 # Return 1 if the target supports hardware square root instructions.
6212 proc check_effective_target_sqrt_insn { } {
6213 global et_sqrt_insn_saved
6215 if [info exists et_sqrt_insn_saved] {
6216 verbose "check_effective_target_hw_sqrt: using cached result" 2
6218 set et_sqrt_insn_saved 0
6219 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6220 || [istarget powerpc*-*-*]
6221 || [istarget aarch64*-*-*]
6222 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok]) } {
6223 set et_sqrt_insn_saved 1
6227 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
6228 return $et_sqrt_insn_saved
6231 # Return 1 if the target supports vector sqrtf calls.
6233 proc check_effective_target_vect_call_sqrtf { } {
6234 global et_vect_call_sqrtf_saved
6237 if [info exists et_vect_call_sqrtf_saved($et_index)] {
6238 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
6240 set et_vect_call_sqrtf_saved($et_index) 0
6241 if { [istarget aarch64*-*-*]
6242 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6243 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
6244 set et_vect_call_sqrtf_saved($et_index) 1
6248 verbose "check_effective_target_vect_call_sqrtf:\
6249 returning $et_vect_call_sqrtf_saved($et_index)" 2
6250 return $et_vect_call_sqrtf_saved($et_index)
6253 # Return 1 if the target supports vector lrint calls.
6255 proc check_effective_target_vect_call_lrint { } {
6256 set et_vect_call_lrint 0
6257 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6258 && [check_effective_target_ilp32]) } {
6259 set et_vect_call_lrint 1
6262 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
6263 return $et_vect_call_lrint
6266 # Return 1 if the target supports vector btrunc calls.
6268 proc check_effective_target_vect_call_btrunc { } {
6269 global et_vect_call_btrunc_saved
6272 if [info exists et_vect_call_btrunc_saved($et_index)] {
6273 verbose "check_effective_target_vect_call_btrunc:\
6274 using cached result" 2
6276 set et_vect_call_btrunc_saved($et_index) 0
6277 if { [istarget aarch64*-*-*] } {
6278 set et_vect_call_btrunc_saved($et_index) 1
6282 verbose "check_effective_target_vect_call_btrunc:\
6283 returning $et_vect_call_btrunc_saved($et_index)" 2
6284 return $et_vect_call_btrunc_saved($et_index)
6287 # Return 1 if the target supports vector btruncf calls.
6289 proc check_effective_target_vect_call_btruncf { } {
6290 global et_vect_call_btruncf_saved
6293 if [info exists et_vect_call_btruncf_saved($et_index)] {
6294 verbose "check_effective_target_vect_call_btruncf:\
6295 using cached result" 2
6297 set et_vect_call_btruncf_saved($et_index) 0
6298 if { [istarget aarch64*-*-*] } {
6299 set et_vect_call_btruncf_saved($et_index) 1
6303 verbose "check_effective_target_vect_call_btruncf:\
6304 returning $et_vect_call_btruncf_saved($et_index)" 2
6305 return $et_vect_call_btruncf_saved($et_index)
6308 # Return 1 if the target supports vector ceil calls.
6310 proc check_effective_target_vect_call_ceil { } {
6311 global et_vect_call_ceil_saved
6314 if [info exists et_vect_call_ceil_saved($et_index)] {
6315 verbose "check_effective_target_vect_call_ceil: using cached result" 2
6317 set et_vect_call_ceil_saved($et_index) 0
6318 if { [istarget aarch64*-*-*] } {
6319 set et_vect_call_ceil_saved($et_index) 1
6323 verbose "check_effective_target_vect_call_ceil:\
6324 returning $et_vect_call_ceil_saved($et_index)" 2
6325 return $et_vect_call_ceil_saved($et_index)
6328 # Return 1 if the target supports vector ceilf calls.
6330 proc check_effective_target_vect_call_ceilf { } {
6331 global et_vect_call_ceilf_saved
6334 if [info exists et_vect_call_ceilf_saved($et_index)] {
6335 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
6337 set et_vect_call_ceilf_saved($et_index) 0
6338 if { [istarget aarch64*-*-*] } {
6339 set et_vect_call_ceilf_saved($et_index) 1
6343 verbose "check_effective_target_vect_call_ceilf:\
6344 returning $et_vect_call_ceilf_saved($et_index)" 2
6345 return $et_vect_call_ceilf_saved($et_index)
6348 # Return 1 if the target supports vector floor calls.
6350 proc check_effective_target_vect_call_floor { } {
6351 global et_vect_call_floor_saved
6354 if [info exists et_vect_call_floor_saved($et_index)] {
6355 verbose "check_effective_target_vect_call_floor: using cached result" 2
6357 set et_vect_call_floor_saved($et_index) 0
6358 if { [istarget aarch64*-*-*] } {
6359 set et_vect_call_floor_saved($et_index) 1
6363 verbose "check_effective_target_vect_call_floor:\
6364 returning $et_vect_call_floor_saved($et_index)" 2
6365 return $et_vect_call_floor_saved($et_index)
6368 # Return 1 if the target supports vector floorf calls.
6370 proc check_effective_target_vect_call_floorf { } {
6371 global et_vect_call_floorf_saved
6374 if [info exists et_vect_call_floorf_saved($et_index)] {
6375 verbose "check_effective_target_vect_call_floorf: using cached result" 2
6377 set et_vect_call_floorf_saved($et_index) 0
6378 if { [istarget aarch64*-*-*] } {
6379 set et_vect_call_floorf_saved($et_index) 1
6383 verbose "check_effective_target_vect_call_floorf:\
6384 returning $et_vect_call_floorf_saved($et_index)" 2
6385 return $et_vect_call_floorf_saved($et_index)
6388 # Return 1 if the target supports vector lceil calls.
6390 proc check_effective_target_vect_call_lceil { } {
6391 global et_vect_call_lceil_saved
6394 if [info exists et_vect_call_lceil_saved($et_index)] {
6395 verbose "check_effective_target_vect_call_lceil: using cached result" 2
6397 set et_vect_call_lceil_saved($et_index) 0
6398 if { [istarget aarch64*-*-*] } {
6399 set et_vect_call_lceil_saved($et_index) 1
6403 verbose "check_effective_target_vect_call_lceil:\
6404 returning $et_vect_call_lceil_saved($et_index)" 2
6405 return $et_vect_call_lceil_saved($et_index)
6408 # Return 1 if the target supports vector lfloor calls.
6410 proc check_effective_target_vect_call_lfloor { } {
6411 global et_vect_call_lfloor_saved
6414 if [info exists et_vect_call_lfloor_saved($et_index)] {
6415 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
6417 set et_vect_call_lfloor_saved($et_index) 0
6418 if { [istarget aarch64*-*-*] } {
6419 set et_vect_call_lfloor_saved($et_index) 1
6423 verbose "check_effective_target_vect_call_lfloor:\
6424 returning $et_vect_call_lfloor_saved($et_index)" 2
6425 return $et_vect_call_lfloor_saved($et_index)
6428 # Return 1 if the target supports vector nearbyint calls.
6430 proc check_effective_target_vect_call_nearbyint { } {
6431 global et_vect_call_nearbyint_saved
6434 if [info exists et_vect_call_nearbyint_saved($et_index)] {
6435 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
6437 set et_vect_call_nearbyint_saved($et_index) 0
6438 if { [istarget aarch64*-*-*] } {
6439 set et_vect_call_nearbyint_saved($et_index) 1
6443 verbose "check_effective_target_vect_call_nearbyint:\
6444 returning $et_vect_call_nearbyint_saved($et_index)" 2
6445 return $et_vect_call_nearbyint_saved($et_index)
6448 # Return 1 if the target supports vector nearbyintf calls.
6450 proc check_effective_target_vect_call_nearbyintf { } {
6451 global et_vect_call_nearbyintf_saved
6454 if [info exists et_vect_call_nearbyintf_saved($et_index)] {
6455 verbose "check_effective_target_vect_call_nearbyintf:\
6456 using cached result" 2
6458 set et_vect_call_nearbyintf_saved($et_index) 0
6459 if { [istarget aarch64*-*-*] } {
6460 set et_vect_call_nearbyintf_saved($et_index) 1
6464 verbose "check_effective_target_vect_call_nearbyintf:\
6465 returning $et_vect_call_nearbyintf_saved($et_index)" 2
6466 return $et_vect_call_nearbyintf_saved($et_index)
6469 # Return 1 if the target supports vector round calls.
6471 proc check_effective_target_vect_call_round { } {
6472 global et_vect_call_round_saved
6475 if [info exists et_vect_call_round_saved($et_index)] {
6476 verbose "check_effective_target_vect_call_round: using cached result" 2
6478 set et_vect_call_round_saved($et_index) 0
6479 if { [istarget aarch64*-*-*] } {
6480 set et_vect_call_round_saved($et_index) 1
6484 verbose "check_effective_target_vect_call_round:\
6485 returning $et_vect_call_round_saved($et_index)" 2
6486 return $et_vect_call_round_saved($et_index)
6489 # Return 1 if the target supports vector roundf calls.
6491 proc check_effective_target_vect_call_roundf { } {
6492 global et_vect_call_roundf_saved
6495 if [info exists et_vect_call_roundf_saved($et_index)] {
6496 verbose "check_effective_target_vect_call_roundf: using cached result" 2
6498 set et_vect_call_roundf_saved($et_index) 0
6499 if { [istarget aarch64*-*-*] } {
6500 set et_vect_call_roundf_saved($et_index) 1
6504 verbose "check_effective_target_vect_call_roundf:\
6505 returning $et_vect_call_roundf_saved($et_index)" 2
6506 return $et_vect_call_roundf_saved($et_index)
6509 # Return 1 if the target supports section-anchors
6511 proc check_effective_target_section_anchors { } {
6512 global et_section_anchors_saved
6514 if [info exists et_section_anchors_saved] {
6515 verbose "check_effective_target_section_anchors: using cached result" 2
6517 set et_section_anchors_saved 0
6518 if { [istarget powerpc*-*-*]
6519 || [istarget arm*-*-*]
6520 || [istarget aarch64*-*-*] } {
6521 set et_section_anchors_saved 1
6525 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
6526 return $et_section_anchors_saved
6529 # Return 1 if the target supports atomic operations on "int_128" values.
6531 proc check_effective_target_sync_int_128 { } {
6532 if { [istarget spu-*-*] } {
6539 # Return 1 if the target supports atomic operations on "int_128" values
6540 # and can execute them.
6541 # This requires support for both compare-and-swap and true atomic loads.
6543 proc check_effective_target_sync_int_128_runtime { } {
6544 if { [istarget spu-*-*] } {
6551 # Return 1 if the target supports atomic operations on "long long".
6553 # Note: 32bit x86 targets require -march=pentium in dg-options.
6554 # Note: 32bit s390 targets require -mzarch in dg-options.
6556 proc check_effective_target_sync_long_long { } {
6557 if { [istarget i?86-*-*] || [istarget x86_64-*-*])
6558 || [istarget aarch64*-*-*]
6559 || [istarget arm*-*-*]
6560 || [istarget alpha*-*-*]
6561 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
6562 || [istarget s390*-*-*]
6563 || [istarget spu-*-*] } {
6570 # Return 1 if the target supports atomic operations on "long long"
6571 # and can execute them.
6573 # Note: 32bit x86 targets require -march=pentium in dg-options.
6575 proc check_effective_target_sync_long_long_runtime { } {
6576 if { (([istarget x86_64-*-*] || [istarget i?86-*-*])
6577 && [check_cached_effective_target sync_long_long_available {
6578 check_runtime_nocache sync_long_long_available {
6582 unsigned int eax, ebx, ecx, edx;
6583 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
6584 return !(edx & bit_CMPXCHG8B);
6589 || [istarget aarch64*-*-*]
6590 || ([istarget arm*-*-linux-*]
6591 && [check_runtime sync_longlong_runtime {
6597 if (sizeof (long long) != 8)
6600 /* Just check for native;
6601 checking for kernel fallback is tricky. */
6602 asm volatile ("ldrexd r0,r1, [%0]"
6603 : : "r" (&l1) : "r0", "r1");
6607 || [istarget alpha*-*-*]
6608 || ([istarget sparc*-*-*]
6609 && [check_effective_target_lp64]
6610 && [check_effective_target_ultrasparc_hw])
6611 || [istarget spu-*-*]
6612 || ([istarget powerpc*-*-*] && [check_effective_target_lp64]) } {
6619 # Return 1 if the target supports byte swap instructions.
6621 proc check_effective_target_bswap { } {
6622 global et_bswap_saved
6624 if [info exists et_bswap_saved] {
6625 verbose "check_effective_target_bswap: using cached result" 2
6627 set et_bswap_saved 0
6628 if { [istarget aarch64*-*-*]
6629 || [istarget alpha*-*-*]
6630 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6631 || [istarget m68k-*-*]
6632 || [istarget powerpc*-*-*]
6633 || [istarget rs6000-*-*]
6634 || [istarget s390*-*-*]
6635 || ([istarget arm*-*-*]
6636 && [check_no_compiler_messages_nocache arm_v6_or_later object {
6638 #error not armv6 or later
6642 set et_bswap_saved 1
6646 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
6647 return $et_bswap_saved
6650 # Return 1 if the target supports 16-bit byte swap instructions.
6652 proc check_effective_target_bswap16 { } {
6653 global et_bswap16_saved
6655 if [info exists et_bswap16_saved] {
6656 verbose "check_effective_target_bswap16: using cached result" 2
6658 set et_bswap16_saved 0
6659 if { [is-effective-target bswap]
6660 && ![istarget alpha*-*-*]
6661 && !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
6662 set et_bswap16_saved 1
6666 verbose "check_effective_target_bswap16: returning $et_bswap16_saved" 2
6667 return $et_bswap16_saved
6670 # Return 1 if the target supports 32-bit byte swap instructions.
6672 proc check_effective_target_bswap32 { } {
6673 global et_bswap32_saved
6675 if [info exists et_bswap32_saved] {
6676 verbose "check_effective_target_bswap32: using cached result" 2
6678 set et_bswap32_saved 0
6679 if { [is-effective-target bswap] } {
6680 set et_bswap32_saved 1
6684 verbose "check_effective_target_bswap32: returning $et_bswap32_saved" 2
6685 return $et_bswap32_saved
6688 # Return 1 if the target supports 64-bit byte swap instructions.
6690 # Note: 32bit s390 targets require -mzarch in dg-options.
6692 proc check_effective_target_bswap64 { } {
6693 global et_bswap64_saved
6695 # expand_unop can expand 64-bit byte swap on 32-bit targets
6696 if { [is-effective-target bswap] && [is-effective-target int32plus] } {
6702 # Return 1 if the target supports atomic operations on "int" and "long".
6704 proc check_effective_target_sync_int_long { } {
6705 global et_sync_int_long_saved
6707 if [info exists et_sync_int_long_saved] {
6708 verbose "check_effective_target_sync_int_long: using cached result" 2
6710 set et_sync_int_long_saved 0
6711 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
6712 # load-reserved/store-conditional instructions.
6713 if { [istarget ia64-*-*]
6714 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6715 || [istarget aarch64*-*-*]
6716 || [istarget alpha*-*-*]
6717 || [istarget arm*-*-linux-*]
6718 || ([istarget arm*-*-*]
6719 && [check_effective_target_arm_acq_rel])
6720 || [istarget bfin*-*linux*]
6721 || [istarget hppa*-*linux*]
6722 || [istarget s390*-*-*]
6723 || [istarget powerpc*-*-*]
6724 || [istarget crisv32-*-*] || [istarget cris-*-*]
6725 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
6726 || [istarget spu-*-*]
6727 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
6728 || [check_effective_target_mips_llsc] } {
6729 set et_sync_int_long_saved 1
6733 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
6734 return $et_sync_int_long_saved
6737 # Return 1 if the target supports atomic operations on "char" and "short".
6739 proc check_effective_target_sync_char_short { } {
6740 global et_sync_char_short_saved
6742 if [info exists et_sync_char_short_saved] {
6743 verbose "check_effective_target_sync_char_short: using cached result" 2
6745 set et_sync_char_short_saved 0
6746 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
6747 # load-reserved/store-conditional instructions.
6748 if { [istarget aarch64*-*-*]
6749 || [istarget ia64-*-*]
6750 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6751 || [istarget alpha*-*-*]
6752 || [istarget arm*-*-linux-*]
6753 || ([istarget arm*-*-*]
6754 && [check_effective_target_arm_acq_rel])
6755 || [istarget hppa*-*linux*]
6756 || [istarget s390*-*-*]
6757 || [istarget powerpc*-*-*]
6758 || [istarget crisv32-*-*] || [istarget cris-*-*]
6759 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
6760 || [istarget spu-*-*]
6761 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
6762 || [check_effective_target_mips_llsc] } {
6763 set et_sync_char_short_saved 1
6767 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
6768 return $et_sync_char_short_saved
6771 # Return 1 if the target uses a ColdFire FPU.
6773 proc check_effective_target_coldfire_fpu { } {
6774 return [check_no_compiler_messages coldfire_fpu assembly {
6781 # Return true if this is a uClibc target.
6783 proc check_effective_target_uclibc {} {
6784 return [check_no_compiler_messages uclibc object {
6785 #include <features.h>
6786 #if !defined (__UCLIBC__)
6792 # Return true if this is a uclibc target and if the uclibc feature
6793 # described by __$feature__ is not present.
6795 proc check_missing_uclibc_feature {feature} {
6796 return [check_no_compiler_messages $feature object "
6797 #include <features.h>
6798 #if !defined (__UCLIBC) || defined (__${feature}__)
6804 # Return true if this is a Newlib target.
6806 proc check_effective_target_newlib {} {
6807 return [check_no_compiler_messages newlib object {
6812 # Some newlib versions don't provide a frexpl and instead depend
6813 # on frexp to implement long double conversions in their printf-like
6814 # functions. This leads to broken results. Detect such versions here.
6816 proc check_effective_target_newlib_broken_long_double_io {} {
6817 if { [is-effective-target newlib] && ![is-effective-target frexpl] } {
6823 # Return true if this is NOT a Bionic target.
6825 proc check_effective_target_non_bionic {} {
6826 return [check_no_compiler_messages non_bionic object {
6828 #if defined (__BIONIC__)
6834 # Return true if this target has error.h header.
6836 proc check_effective_target_error_h {} {
6837 return [check_no_compiler_messages error_h object {
6842 # Return true if this target has tgmath.h header.
6844 proc check_effective_target_tgmath_h {} {
6845 return [check_no_compiler_messages tgmath_h object {
6850 # Return true if target's libc supports complex functions.
6852 proc check_effective_target_libc_has_complex_functions {} {
6853 return [check_no_compiler_messages libc_has_complex_functions object {
6854 #include <complex.h>
6859 # (a) an error of a few ULP is expected in string to floating-point
6860 # conversion functions; and
6861 # (b) overflow is not always detected correctly by those functions.
6863 proc check_effective_target_lax_strtofp {} {
6864 # By default, assume that all uClibc targets suffer from this.
6865 return [check_effective_target_uclibc]
6868 # Return 1 if this is a target for which wcsftime is a dummy
6869 # function that always returns 0.
6871 proc check_effective_target_dummy_wcsftime {} {
6872 # By default, assume that all uClibc targets suffer from this.
6873 return [check_effective_target_uclibc]
6876 # Return 1 if constructors with initialization priority arguments are
6877 # supposed on this target.
6879 proc check_effective_target_init_priority {} {
6880 return [check_no_compiler_messages init_priority assembly "
6881 void f() __attribute__((constructor (1000)));
6886 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
6887 # This can be used with any check_* proc that takes no argument and
6888 # returns only 1 or 0. It could be used with check_* procs that take
6889 # arguments with keywords that pass particular arguments.
6891 proc is-effective-target { arg } {
6894 if { ![info exists et_index] } {
6895 # Initialize the effective target index that is used in some
6896 # check_effective_target_* procs.
6899 if { [info procs check_effective_target_${arg}] != [list] } {
6900 set selected [check_effective_target_${arg}]
6903 "vmx_hw" { set selected [check_vmx_hw_available] }
6904 "vsx_hw" { set selected [check_vsx_hw_available] }
6905 "p8vector_hw" { set selected [check_p8vector_hw_available] }
6906 "p9vector_hw" { set selected [check_p9vector_hw_available] }
6907 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
6908 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
6909 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
6910 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
6911 "dfp_hw" { set selected [check_dfp_hw_available] }
6912 "htm_hw" { set selected [check_htm_hw_available] }
6913 "named_sections" { set selected [check_named_sections_available] }
6914 "gc_sections" { set selected [check_gc_sections_available] }
6915 "cxa_atexit" { set selected [check_cxa_atexit_available] }
6916 default { error "unknown effective target keyword `$arg'" }
6919 verbose "is-effective-target: $arg $selected" 2
6923 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
6925 proc is-effective-target-keyword { arg } {
6926 if { [info procs check_effective_target_${arg}] != [list] } {
6929 # These have different names for their check_* procs.
6931 "vmx_hw" { return 1 }
6932 "vsx_hw" { return 1 }
6933 "p8vector_hw" { return 1 }
6934 "p9vector_hw" { return 1 }
6935 "p9modulo_hw" { return 1 }
6936 "ppc_float128_sw" { return 1 }
6937 "ppc_float128_hw" { return 1 }
6938 "ppc_recip_hw" { return 1 }
6939 "dfp_hw" { return 1 }
6940 "htm_hw" { return 1 }
6941 "named_sections" { return 1 }
6942 "gc_sections" { return 1 }
6943 "cxa_atexit" { return 1 }
6944 default { return 0 }
6949 # Execute tests for all targets in EFFECTIVE_TARGETS list. Set et_index to
6950 # indicate what target is currently being processed. This is for
6951 # the vectorizer tests, e.g. vect_int, to keep track what target supports
6954 proc et-dg-runtest { runtest testcases flags default-extra-flags } {
6955 global dg-do-what-default
6956 global EFFECTIVE_TARGETS
6959 if { [llength $EFFECTIVE_TARGETS] > 0 } {
6960 foreach target $EFFECTIVE_TARGETS {
6961 set target_flags $flags
6962 set dg-do-what-default compile
6963 set et_index [lsearch -exact $EFFECTIVE_TARGETS $target]
6964 if { [info procs add_options_for_${target}] != [list] } {
6965 set target_flags [add_options_for_${target} "$flags"]
6967 if { [info procs check_effective_target_${target}_runtime]
6968 != [list] && [check_effective_target_${target}_runtime] } {
6969 set dg-do-what-default run
6971 $runtest $testcases $target_flags ${default-extra-flags}
6975 $runtest $testcases $flags ${default-extra-flags}
6979 # Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
6980 # et_index, 0 otherwise.
6982 proc et-is-effective-target { target } {
6983 global EFFECTIVE_TARGETS
6986 if { [llength $EFFECTIVE_TARGETS] > $et_index
6987 && [lindex $EFFECTIVE_TARGETS $et_index] == $target } {
6993 # Return 1 if target default to short enums
6995 proc check_effective_target_short_enums { } {
6996 return [check_no_compiler_messages short_enums assembly {
6998 int s[sizeof (enum foo) == 1 ? 1 : -1];
7002 # Return 1 if target supports merging string constants at link time.
7004 proc check_effective_target_string_merging { } {
7005 return [check_no_messages_and_pattern string_merging \
7006 "rodata\\.str" assembly {
7007 const char *var = "String";
7011 # Return 1 if target has the basic signed and unsigned types in
7012 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
7013 # working <stdint.h> for all targets.
7015 proc check_effective_target_stdint_types { } {
7016 return [check_no_compiler_messages stdint_types assembly {
7018 int8_t a; int16_t b; int32_t c; int64_t d;
7019 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
7023 # Return 1 if target has the basic signed and unsigned types in
7024 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
7025 # these types agree with those in the header, as some systems have
7026 # only <inttypes.h>.
7028 proc check_effective_target_inttypes_types { } {
7029 return [check_no_compiler_messages inttypes_types assembly {
7030 #include <inttypes.h>
7031 int8_t a; int16_t b; int32_t c; int64_t d;
7032 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
7036 # Return 1 if programs are intended to be run on a simulator
7037 # (i.e. slowly) rather than hardware (i.e. fast).
7039 proc check_effective_target_simulator { } {
7041 # All "src/sim" simulators set this one.
7042 if [board_info target exists is_simulator] {
7043 return [board_info target is_simulator]
7046 # The "sid" simulators don't set that one, but at least they set
7048 if [board_info target exists slow_simulator] {
7049 return [board_info target slow_simulator]
7055 # Return 1 if programs are intended to be run on hardware rather than
7058 proc check_effective_target_hw { } {
7060 # All "src/sim" simulators set this one.
7061 if [board_info target exists is_simulator] {
7062 if [board_info target is_simulator] {
7069 # The "sid" simulators don't set that one, but at least they set
7071 if [board_info target exists slow_simulator] {
7072 if [board_info target slow_simulator] {
7082 # Return 1 if the target is a VxWorks kernel.
7084 proc check_effective_target_vxworks_kernel { } {
7085 return [check_no_compiler_messages vxworks_kernel assembly {
7086 #if !defined __vxworks || defined __RTP__
7092 # Return 1 if the target is a VxWorks RTP.
7094 proc check_effective_target_vxworks_rtp { } {
7095 return [check_no_compiler_messages vxworks_rtp assembly {
7096 #if !defined __vxworks || !defined __RTP__
7102 # Return 1 if the target is expected to provide wide character support.
7104 proc check_effective_target_wchar { } {
7105 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
7108 return [check_no_compiler_messages wchar assembly {
7113 # Return 1 if the target has <pthread.h>.
7115 proc check_effective_target_pthread_h { } {
7116 return [check_no_compiler_messages pthread_h assembly {
7117 #include <pthread.h>
7121 # Return 1 if the target can truncate a file from a file-descriptor,
7122 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
7123 # chsize. We test for a trivially functional truncation; no stubs.
7124 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
7125 # different function to be used.
7127 proc check_effective_target_fd_truncate { } {
7129 #define _FILE_OFFSET_BITS 64
7136 FILE *f = fopen ("tst.tmp", "wb");
7138 const char t[] = "test writing more than ten characters";
7142 write (fd, t, sizeof (t) - 1);
7144 if (ftruncate (fd, 10) != 0)
7153 f = fopen ("tst.tmp", "rb");
7154 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
7162 if { [check_runtime ftruncate $prog] } {
7166 regsub "ftruncate" $prog "chsize" prog
7167 return [check_runtime chsize $prog]
7170 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
7172 proc add_options_for_c99_runtime { flags } {
7173 if { [istarget *-*-solaris2*] } {
7174 return "$flags -std=c99"
7176 if { [istarget powerpc-*-darwin*] } {
7177 return "$flags -mmacosx-version-min=10.3"
7182 # Add to FLAGS all the target-specific flags needed to enable
7183 # full IEEE compliance mode.
7185 proc add_options_for_ieee { flags } {
7186 if { [istarget alpha*-*-*]
7187 || [istarget sh*-*-*] } {
7188 return "$flags -mieee"
7190 if { [istarget rx-*-*] } {
7191 return "$flags -mnofpu"
7196 if {![info exists flags_to_postpone]} {
7197 set flags_to_postpone ""
7200 # Add to FLAGS the flags needed to enable functions to bind locally
7201 # when using pic/PIC passes in the testsuite.
7202 proc add_options_for_bind_pic_locally { flags } {
7203 global flags_to_postpone
7205 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
7206 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
7207 # order to make sure that the multilib_flags doesn't override this.
7209 if {[check_no_compiler_messages using_pic2 assembly {
7214 set flags_to_postpone "-fPIE"
7217 if {[check_no_compiler_messages using_pic1 assembly {
7222 set flags_to_postpone "-fpie"
7228 # Add to FLAGS the flags needed to enable 64-bit vectors.
7230 proc add_options_for_double_vectors { flags } {
7231 if [is-effective-target arm_neon_ok] {
7232 return "$flags -mvectorize-with-neon-double"
7238 # Return 1 if the target provides a full C99 runtime.
7240 proc check_effective_target_c99_runtime { } {
7241 return [check_cached_effective_target c99_runtime {
7244 set file [open "$srcdir/gcc.dg/builtins-config.h"]
7245 set contents [read $file]
7248 #ifndef HAVE_C99_RUNTIME
7249 #error !HAVE_C99_RUNTIME
7252 check_no_compiler_messages_nocache c99_runtime assembly \
7253 $contents [add_options_for_c99_runtime ""]
7257 # Return 1 if target wchar_t is at least 4 bytes.
7259 proc check_effective_target_4byte_wchar_t { } {
7260 return [check_no_compiler_messages 4byte_wchar_t object {
7261 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
7265 # Return 1 if the target supports automatic stack alignment.
7267 proc check_effective_target_automatic_stack_alignment { } {
7268 # Ordinarily x86 supports automatic stack alignment ...
7269 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
7270 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
7271 # ... except Win64 SEH doesn't. Succeed for Win32 though.
7272 return [check_effective_target_ilp32];
7279 # Return true if we are compiling for AVX target.
7281 proc check_avx_available { } {
7282 if { [check_no_compiler_messages avx_available assembly {
7292 # Return true if 32- and 16-bytes vectors are available.
7294 proc check_effective_target_vect_sizes_32B_16B { } {
7295 if { [check_avx_available] && ![check_prefer_avx128] } {
7302 # Return true if 128-bits vectors are preferred even if 256-bits vectors
7305 proc check_prefer_avx128 { } {
7306 if ![check_avx_available] {
7309 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
7310 float a[1024],b[1024],c[1024];
7311 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
7312 } "-O2 -ftree-vectorize"]
7316 # Return 1 if avx512f instructions can be compiled.
7318 proc check_effective_target_avx512f { } {
7319 return [check_no_compiler_messages avx512f object {
7320 typedef double __m512d __attribute__ ((__vector_size__ (64)));
7322 __m512d _mm512_add (__m512d a)
7324 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
7329 # Return 1 if avx instructions can be compiled.
7331 proc check_effective_target_avx { } {
7332 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
7335 return [check_no_compiler_messages avx object {
7336 void _mm256_zeroall (void)
7338 __builtin_ia32_vzeroall ();
7343 # Return 1 if avx2 instructions can be compiled.
7344 proc check_effective_target_avx2 { } {
7345 return [check_no_compiler_messages avx2 object {
7346 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
7348 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
7350 return __builtin_ia32_andnotsi256 (__X, __Y);
7355 # Return 1 if sse instructions can be compiled.
7356 proc check_effective_target_sse { } {
7357 return [check_no_compiler_messages sse object {
7360 __builtin_ia32_stmxcsr ();
7366 # Return 1 if sse2 instructions can be compiled.
7367 proc check_effective_target_sse2 { } {
7368 return [check_no_compiler_messages sse2 object {
7369 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7371 __m128i _mm_srli_si128 (__m128i __A, int __N)
7373 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
7378 # Return 1 if sse4.1 instructions can be compiled.
7379 proc check_effective_target_sse4 { } {
7380 return [check_no_compiler_messages sse4.1 object {
7381 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7382 typedef int __v4si __attribute__ ((__vector_size__ (16)));
7384 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
7386 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
7392 # Return 1 if F16C instructions can be compiled.
7394 proc check_effective_target_f16c { } {
7395 return [check_no_compiler_messages f16c object {
7396 #include "immintrin.h"
7398 foo (unsigned short val)
7400 return _cvtsh_ss (val);
7405 # Return 1 if C wchar_t type is compatible with char16_t.
7407 proc check_effective_target_wchar_t_char16_t_compatible { } {
7408 return [check_no_compiler_messages wchar_t_char16_t object {
7410 __CHAR16_TYPE__ *p16 = &wc;
7411 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7415 # Return 1 if C wchar_t type is compatible with char32_t.
7417 proc check_effective_target_wchar_t_char32_t_compatible { } {
7418 return [check_no_compiler_messages wchar_t_char32_t object {
7420 __CHAR32_TYPE__ *p32 = &wc;
7421 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7425 # Return 1 if pow10 function exists.
7427 proc check_effective_target_pow10 { } {
7428 return [check_runtime pow10 {
7438 # Return 1 if frexpl function exists.
7440 proc check_effective_target_frexpl { } {
7441 return [check_runtime frexpl {
7446 x = frexpl (5.0, &y);
7453 # Return 1 if issignaling function exists.
7454 proc check_effective_target_issignaling {} {
7455 return [check_runtime issignaling {
7460 return issignaling (0.0);
7465 # Return 1 if current options generate DFP instructions, 0 otherwise.
7466 proc check_effective_target_hard_dfp {} {
7467 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
7468 typedef float d64 __attribute__((mode(DD)));
7470 void foo (void) { z = x + y; }
7474 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
7475 # for strchr etc. functions.
7477 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
7478 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
7481 #if !defined(__cplusplus) \
7482 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
7483 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
7484 ISO C++ correct string.h and wchar.h protos not supported.
7491 # Return 1 if GNU as is used.
7493 proc check_effective_target_gas { } {
7494 global use_gas_saved
7497 if {![info exists use_gas_saved]} {
7498 # Check if the as used by gcc is GNU as.
7499 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
7500 # Provide /dev/null as input, otherwise gas times out reading from
7502 set status [remote_exec host "$gcc_as" "-v /dev/null"]
7503 set as_output [lindex $status 1]
7504 if { [ string first "GNU" $as_output ] >= 0 } {
7510 return $use_gas_saved
7513 # Return 1 if GNU ld is used.
7515 proc check_effective_target_gld { } {
7516 global use_gld_saved
7519 if {![info exists use_gld_saved]} {
7520 # Check if the ld used by gcc is GNU ld.
7521 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
7522 set status [remote_exec host "$gcc_ld" "--version"]
7523 set ld_output [lindex $status 1]
7524 if { [ string first "GNU" $ld_output ] >= 0 } {
7530 return $use_gld_saved
7533 # Return 1 if the compiler has been configure with link-time optimization
7536 proc check_effective_target_lto { } {
7537 if { [istarget nvptx-*-*] } {
7540 return [check_no_compiler_messages lto object {
7545 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
7547 proc check_effective_target_maybe_x32 { } {
7548 return [check_no_compiler_messages maybe_x32 object {
7550 } "-mx32 -maddress-mode=short"]
7553 # Return 1 if this target supports the -fsplit-stack option, 0
7556 proc check_effective_target_split_stack {} {
7557 return [check_no_compiler_messages split_stack object {
7562 # Return 1 if this target supports the -masm=intel option, 0
7565 proc check_effective_target_masm_intel {} {
7566 return [check_no_compiler_messages masm_intel object {
7567 extern void abort (void);
7571 # Return 1 if the language for the compiler under test is C.
7573 proc check_effective_target_c { } {
7575 if [string match $tool "gcc"] {
7581 # Return 1 if the language for the compiler under test is C++.
7583 proc check_effective_target_c++ { } {
7585 if { [string match $tool "g++"] || [string match $tool "libstdc++"] } {
7591 set cxx_default "c++14"
7592 # Check whether the current active language standard supports the features
7593 # of C++11/C++14 by checking for the presence of one of the -std flags.
7594 # This assumes that the default for the compiler is $cxx_default, and that
7595 # there will never be multiple -std= arguments on the command line.
7596 proc check_effective_target_c++11_only { } {
7598 if ![check_effective_target_c++] {
7601 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
7604 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
7609 proc check_effective_target_c++11 { } {
7610 if [check_effective_target_c++11_only] {
7613 return [check_effective_target_c++14]
7615 proc check_effective_target_c++11_down { } {
7616 if ![check_effective_target_c++] {
7619 return [expr ![check_effective_target_c++14] ]
7622 proc check_effective_target_c++14_only { } {
7624 if ![check_effective_target_c++] {
7627 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
7630 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
7636 proc check_effective_target_c++14 { } {
7637 if [check_effective_target_c++14_only] {
7640 return [check_effective_target_c++1z]
7642 proc check_effective_target_c++14_down { } {
7643 if ![check_effective_target_c++] {
7646 return [expr ![check_effective_target_c++1z] ]
7649 proc check_effective_target_c++98_only { } {
7651 if ![check_effective_target_c++] {
7654 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
7657 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
7663 proc check_effective_target_c++1z_only { } {
7665 if ![check_effective_target_c++] {
7668 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
7671 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
7676 proc check_effective_target_c++1z { } {
7677 return [check_effective_target_c++1z_only]
7680 # Check for C++ Concepts TS support, i.e. -fconcepts flag.
7681 proc check_effective_target_concepts { } {
7682 return [check-flags { "" { } { -fconcepts } }]
7685 # Return 1 if expensive testcases should be run.
7687 proc check_effective_target_run_expensive_tests { } {
7688 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
7694 # Returns 1 if "mempcpy" is available on the target system.
7696 proc check_effective_target_mempcpy {} {
7697 return [check_function_available "mempcpy"]
7700 # Returns 1 if "stpcpy" is available on the target system.
7702 proc check_effective_target_stpcpy {} {
7703 return [check_function_available "stpcpy"]
7706 # Check whether the vectorizer tests are supported by the target and
7707 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
7708 # If a port wants to execute the tests more than once it should append
7709 # the supported target to EFFECTIVE_TARGETS instead, and the compile flags
7710 # will be added by a call to add_options_for_<target>.
7711 # Set dg-do-what-default to either compile or run, depending on target
7712 # capabilities. Do not set this if the supported target is appended to
7713 # EFFECTIVE_TARGETS. Flags and this variable will be set by et-dg-runtest
7714 # automatically. Return the number of effective targets if vectorizer tests
7715 # are supported, 0 otherwise.
7717 proc check_vect_support_and_set_flags { } {
7718 global DEFAULT_VECTCFLAGS
7719 global dg-do-what-default
7720 global EFFECTIVE_TARGETS
7722 if [istarget powerpc-*paired*] {
7723 lappend DEFAULT_VECTCFLAGS "-mpaired"
7724 if [check_750cl_hw_available] {
7725 set dg-do-what-default run
7727 set dg-do-what-default compile
7729 } elseif [istarget powerpc*-*-*] {
7730 # Skip targets not supporting -maltivec.
7731 if ![is-effective-target powerpc_altivec_ok] {
7735 lappend DEFAULT_VECTCFLAGS "-maltivec"
7736 if [check_p9vector_hw_available] {
7737 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
7738 } elseif [check_p8vector_hw_available] {
7739 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
7740 } elseif [check_vsx_hw_available] {
7741 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
7744 if [check_vmx_hw_available] {
7745 set dg-do-what-default run
7747 if [is-effective-target ilp32] {
7748 # Specify a cpu that supports VMX for compile-only tests.
7749 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
7751 set dg-do-what-default compile
7753 } elseif { [istarget spu-*-*] } {
7754 set dg-do-what-default run
7755 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
7756 lappend DEFAULT_VECTCFLAGS "-msse2"
7757 if { [check_effective_target_sse2_runtime] } {
7758 set dg-do-what-default run
7760 set dg-do-what-default compile
7762 } elseif { [istarget mips*-*-*]
7763 && [check_effective_target_nomips16] } {
7764 if { [check_effective_target_mpaired_single] } {
7765 lappend EFFECTIVE_TARGETS mpaired_single
7767 if { [check_effective_target_mips_loongson] } {
7768 lappend EFFECTIVE_TARGETS mips_loongson
7770 if { [check_effective_target_mips_msa] } {
7771 lappend EFFECTIVE_TARGETS mips_msa
7773 return [llength $EFFECTIVE_TARGETS]
7774 } elseif [istarget sparc*-*-*] {
7775 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
7776 if [check_effective_target_ultrasparc_hw] {
7777 set dg-do-what-default run
7779 set dg-do-what-default compile
7781 } elseif [istarget alpha*-*-*] {
7782 # Alpha's vectorization capabilities are extremely limited.
7783 # It's more effort than its worth disabling all of the tests
7784 # that it cannot pass. But if you actually want to see what
7785 # does work, command out the return.
7788 lappend DEFAULT_VECTCFLAGS "-mmax"
7789 if [check_alpha_max_hw_available] {
7790 set dg-do-what-default run
7792 set dg-do-what-default compile
7794 } elseif [istarget ia64-*-*] {
7795 set dg-do-what-default run
7796 } elseif [is-effective-target arm_neon_ok] {
7797 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
7798 # NEON does not support denormals, so is not used for vectorization by
7799 # default to avoid loss of precision. We must pass -ffast-math to test
7800 # vectorization of float operations.
7801 lappend DEFAULT_VECTCFLAGS "-ffast-math"
7802 if [is-effective-target arm_neon_hw] {
7803 set dg-do-what-default run
7805 set dg-do-what-default compile
7807 } elseif [istarget "aarch64*-*-*"] {
7808 set dg-do-what-default run
7816 # Return 1 if the target does *not* require strict alignment.
7818 proc check_effective_target_non_strict_align {} {
7820 # On ARM, the default is to use STRICT_ALIGNMENT, but there
7821 # are interfaces defined for misaligned access and thus
7822 # depending on the architecture levels unaligned access is
7824 if [istarget "arm*-*-*"] {
7825 return [check_effective_target_arm_unaligned]
7828 return [check_no_compiler_messages non_strict_align assembly {
7830 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
7832 void foo(void) { z = (c *) y; }
7836 # Return 1 if the target has <ucontext.h>.
7838 proc check_effective_target_ucontext_h { } {
7839 return [check_no_compiler_messages ucontext_h assembly {
7840 #include <ucontext.h>
7844 proc check_effective_target_aarch64_tiny { } {
7845 if { [istarget aarch64*-*-*] } {
7846 return [check_no_compiler_messages aarch64_tiny object {
7847 #ifdef __AARCH64_CMODEL_TINY__
7850 #error target not AArch64 tiny code model
7858 # Create functions to check that the AArch64 assembler supports the
7859 # various architecture extensions via the .arch_extension pseudo-op.
7861 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse"} {
7862 eval [string map [list FUNC $aarch64_ext] {
7863 proc check_effective_target_aarch64_asm_FUNC_ok { } {
7864 if { [istarget aarch64*-*-*] } {
7865 return [check_no_compiler_messages aarch64_FUNC_assembler object {
7866 __asm__ (".arch_extension FUNC");
7867 } "-march=armv8-a+FUNC"]
7875 proc check_effective_target_aarch64_small { } {
7876 if { [istarget aarch64*-*-*] } {
7877 return [check_no_compiler_messages aarch64_small object {
7878 #ifdef __AARCH64_CMODEL_SMALL__
7881 #error target not AArch64 small code model
7889 proc check_effective_target_aarch64_large { } {
7890 if { [istarget aarch64*-*-*] } {
7891 return [check_no_compiler_messages aarch64_large object {
7892 #ifdef __AARCH64_CMODEL_LARGE__
7895 #error target not AArch64 large code model
7904 # Return 1 if this is a reduced AVR Tiny core. Such cores have different
7905 # register set, instruction set, addressing capabilities and ABI.
7907 proc check_effective_target_avr_tiny { } {
7908 if { [istarget avr*-*-*] } {
7909 return [check_no_compiler_messages avr_tiny object {
7913 #error target not a reduced AVR Tiny core
7921 # Return 1 if <fenv.h> is available with all the standard IEEE
7922 # exceptions and floating-point exceptions are raised by arithmetic
7923 # operations. (If the target requires special options for "inexact"
7924 # exceptions, those need to be specified in the testcases.)
7926 proc check_effective_target_fenv_exceptions {} {
7927 return [check_runtime fenv_exceptions {
7930 #ifndef FE_DIVBYZERO
7931 # error Missing FE_DIVBYZERO
7934 # error Missing FE_INEXACT
7937 # error Missing FE_INVALID
7940 # error Missing FE_OVERFLOW
7942 #ifndef FE_UNDERFLOW
7943 # error Missing FE_UNDERFLOW
7945 volatile float a = 0.0f, r;
7950 if (fetestexcept (FE_INVALID))
7955 } [add_options_for_ieee "-std=gnu99"]]
7958 proc check_effective_target_tiny {} {
7959 global et_target_tiny_saved
7961 if [info exists et_target_tiny_saved] {
7962 verbose "check_effective_target_tiny: using cached result" 2
7964 set et_target_tiny_saved 0
7965 if { [istarget aarch64*-*-*]
7966 && [check_effective_target_aarch64_tiny] } {
7967 set et_target_tiny_saved 1
7969 if { [istarget avr-*-*]
7970 && [check_effective_target_avr_tiny] } {
7971 set et_target_tiny_saved 1
7975 return $et_target_tiny_saved
7978 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
7980 proc check_effective_target_logical_op_short_circuit {} {
7981 if { [istarget mips*-*-*]
7982 || [istarget arc*-*-*]
7983 || [istarget avr*-*-*]
7984 || [istarget crisv32-*-*] || [istarget cris-*-*]
7985 || [istarget mmix-*-*]
7986 || [istarget s390*-*-*]
7987 || [istarget powerpc*-*-*]
7988 || [istarget nios2*-*-*]
7989 || [istarget riscv*-*-*]
7990 || [istarget visium-*-*]
7991 || [check_effective_target_arm_cortex_m] } {
7997 # Record that dg-final test TEST requires convential compilation.
7999 proc force_conventional_output_for { test } {
8000 if { [info proc $test] == "" } {
8001 perror "$test does not exist"
8004 proc ${test}_required_options {} {
8005 global gcc_force_conventional_output
8006 return $gcc_force_conventional_output
8010 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
8011 # otherwise. Cache the result.
8013 proc check_effective_target_pie_copyreloc { } {
8014 global pie_copyreloc_available_saved
8016 global GCC_UNDER_TEST
8018 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8022 # Need auto-host.h to check linker support.
8023 if { ![file exists ../../auto-host.h ] } {
8027 if [info exists pie_copyreloc_available_saved] {
8028 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
8030 # Set up and compile to see if linker supports PIE with copy
8031 # reloc. Include the current process ID in the file names to
8032 # prevent conflicts with invocations for multiple testsuites.
8037 set f [open $src "w"]
8038 puts $f "#include \"../../auto-host.h\""
8039 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
8040 puts $f "# error Linker does not support PIE with copy reloc."
8044 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
8045 set lines [${tool}_target_compile $src $obj object ""]
8050 if [string match "" $lines] then {
8051 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
8052 set pie_copyreloc_available_saved 1
8054 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
8055 set pie_copyreloc_available_saved 0
8059 return $pie_copyreloc_available_saved
8062 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
8063 # otherwise. Cache the result.
8065 proc check_effective_target_got32x_reloc { } {
8066 global got32x_reloc_available_saved
8068 global GCC_UNDER_TEST
8070 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8074 # Need auto-host.h to check linker support.
8075 if { ![file exists ../../auto-host.h ] } {
8079 if [info exists got32x_reloc_available_saved] {
8080 verbose "check_effective_target_got32x_reloc returning saved $got32x_reloc_available_saved" 2
8082 # Include the current process ID in the file names to prevent
8083 # conflicts with invocations for multiple testsuites.
8085 set src got32x[pid].c
8086 set obj got32x[pid].o
8088 set f [open $src "w"]
8089 puts $f "#include \"../../auto-host.h\""
8090 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
8091 puts $f "# error Assembler does not support R_386_GOT32X."
8095 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
8096 set lines [${tool}_target_compile $src $obj object ""]
8101 if [string match "" $lines] then {
8102 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
8103 set got32x_reloc_available_saved 1
8105 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
8106 set got32x_reloc_available_saved 0
8110 return $got32x_reloc_available_saved
8113 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
8114 # 0 otherwise. Cache the result.
8116 proc check_effective_target_tls_get_addr_via_got { } {
8117 global tls_get_addr_via_got_available_saved
8119 global GCC_UNDER_TEST
8121 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8125 # Need auto-host.h to check linker support.
8126 if { ![file exists ../../auto-host.h ] } {
8130 if [info exists tls_get_addr_via_got_available_saved] {
8131 verbose "check_effective_target_tls_get_addr_via_got returning saved $tls_get_addr_via_got_available_saved" 2
8133 # Include the current process ID in the file names to prevent
8134 # conflicts with invocations for multiple testsuites.
8136 set src tls_get_addr_via_got[pid].c
8137 set obj tls_get_addr_via_got[pid].o
8139 set f [open $src "w"]
8140 puts $f "#include \"../../auto-host.h\""
8141 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
8142 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
8146 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
8147 set lines [${tool}_target_compile $src $obj object ""]
8152 if [string match "" $lines] then {
8153 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
8154 set tls_get_addr_via_got_available_saved 1
8156 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
8157 set tls_get_addr_via_got_available_saved 0
8161 return $tls_get_addr_via_got_available_saved
8164 # Return 1 if the target uses comdat groups.
8166 proc check_effective_target_comdat_group {} {
8167 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
8169 inline int foo () { return 1; }
8174 # Return 1 if target supports __builtin_eh_return
8175 proc check_effective_target_builtin_eh_return { } {
8176 return [check_no_compiler_messages builtin_eh_return object {
8177 void test (long l, void *p)
8179 __builtin_eh_return (l, p);
8184 # Return 1 if the target supports max reduction for vectors.
8186 proc check_effective_target_vect_max_reduc { } {
8187 if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } {
8193 # Return 1 if there is an nvptx offload compiler.
8195 proc check_effective_target_offload_nvptx { } {
8196 return [check_no_compiler_messages offload_nvptx object {
8197 int main () {return 0;}
8198 } "-foffload=nvptx-none" ]
8201 # Return 1 if the compiler has been configured with hsa offloading.
8203 proc check_effective_target_offload_hsa { } {
8204 return [check_no_compiler_messages offload_hsa assembly {
8205 int main () {return 0;}
8209 # Return 1 if the target support -fprofile-update=atomic
8210 proc check_effective_target_profile_update_atomic {} {
8211 return [check_no_compiler_messages profile_update_atomic assembly {
8212 int main (void) { return 0; }
8213 } "-fprofile-update=atomic -fprofile-generate"]
8216 # Return 1 if vector (va - vector add) instructions are understood by
8217 # the assembler and can be executed. This also covers checking for
8218 # the VX kernel feature. A kernel without that feature does not
8219 # enable the vector facility and the following check will die with a
8221 proc check_effective_target_s390_vx { } {
8222 if ![istarget s390*-*-*] then {
8226 return [check_runtime s390_check_vx {
8229 asm ("va %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
8232 } "-march=z13 -mzarch" ]
8235 # Same as above but for the arch12 vector enhancement facility. Test
8236 # is performed with the vector nand instruction.
8237 proc check_effective_target_s390_vxe { } {
8238 if ![istarget s390*-*-*] then {
8242 return [check_runtime s390_check_vxe {
8245 asm ("vnn %%v24, %%v26, %%v28" : : : "v24", "v26", "v28");
8248 } "-march=arch12 -mzarch" ]
8251 #For versions of ARM architectures that have hardware div insn,
8252 #disable the divmod transform
8254 proc check_effective_target_arm_divmod_simode { } {
8255 return [check_no_compiler_messages arm_divmod assembly {
8256 #ifdef __ARM_ARCH_EXT_IDIV__
8263 # Return 1 if target supports divmod hardware insn or divmod libcall.
8265 proc check_effective_target_divmod { } {
8266 #TODO: Add checks for all targets that have either hardware divmod insn
8267 # or define libfunc for divmod.
8268 if { [istarget arm*-*-*]
8269 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8275 # Return 1 if target supports divmod for SImode. The reason for
8276 # separating this from check_effective_target_divmod is that
8277 # some versions of ARM architecture define div instruction
8278 # only for simode, and for these archs, we do not want to enable
8279 # divmod transform for simode.
8281 proc check_effective_target_divmod_simode { } {
8282 if { [istarget arm*-*-*] } {
8283 return [check_effective_target_arm_divmod_simode]
8286 return [check_effective_target_divmod]
8289 # Return 1 if store merging optimization is applicable for target.
8290 # Store merging is not profitable for targets like the avr which
8291 # can load/store only one byte at a time. Use int size as a proxy
8292 # for the number of bytes the target can write, and skip for targets
8293 # with a smallish (< 32) size.
8295 proc check_effective_target_store_merge { } {
8296 if { [is-effective-target non_strict_align ] && [is-effective-target int32plus] } {
8303 # Return 1 if we're able to assemble rdrand
8305 proc check_effective_target_rdrand { } {
8306 return [check_no_compiler_messages_nocache rdrand object {
8311 __builtin_ia32_rdrand32_step(&val);
8317 # Return 1 if the target supports coprocessor instructions: cdp, ldc, stc, mcr and
8319 proc check_effective_target_arm_coproc1_ok_nocache { } {
8320 if { ![istarget arm*-*-*] } {
8323 return [check_no_compiler_messages_nocache arm_coproc1_ok assembly {
8324 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 4
8330 proc check_effective_target_arm_coproc1_ok { } {
8331 return [check_cached_effective_target arm_coproc1_ok \
8332 check_effective_target_arm_coproc1_ok_nocache]
8335 # Return 1 if the target supports all coprocessor instructions checked by
8336 # check_effective_target_arm_coproc1_ok in addition to the following: cdp2,
8337 # ldc2, ldc2l, stc2, stc2l, mcr2 and mrc2.
8338 proc check_effective_target_arm_coproc2_ok_nocache { } {
8339 if { ![check_effective_target_arm_coproc1_ok] } {
8342 return [check_no_compiler_messages_nocache arm_coproc2_ok assembly {
8349 proc check_effective_target_arm_coproc2_ok { } {
8350 return [check_cached_effective_target arm_coproc2_ok \
8351 check_effective_target_arm_coproc2_ok_nocache]
8354 # Return 1 if the target supports all coprocessor instructions checked by
8355 # check_effective_target_arm_coproc2_ok in addition the following: mcrr and
8357 proc check_effective_target_arm_coproc3_ok_nocache { } {
8358 if { ![check_effective_target_arm_coproc2_ok] } {
8361 return [check_no_compiler_messages_nocache arm_coproc3_ok assembly {
8362 #if __ARM_ARCH < 6 && !defined (__ARM_ARCH_5TE__)
8368 proc check_effective_target_arm_coproc3_ok { } {
8369 return [check_cached_effective_target arm_coproc3_ok \
8370 check_effective_target_arm_coproc3_ok_nocache]
8373 # Return 1 if the target supports all coprocessor instructions checked by
8374 # check_effective_target_arm_coproc3_ok in addition the following: mcrr2 and
8376 proc check_effective_target_arm_coproc4_ok_nocache { } {
8377 if { ![check_effective_target_arm_coproc3_ok] } {
8380 return [check_no_compiler_messages_nocache arm_coproc4_ok assembly {
8387 proc check_effective_target_arm_coproc4_ok { } {
8388 return [check_cached_effective_target arm_coproc4_ok \
8389 check_effective_target_arm_coproc4_ok_nocache]