1 # Copyright (C) 1999-2016 Free Software Foundation, Inc.
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
20 # This file defines procs for determining features supported by the target.
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
34 # "! Fortran" for Fortran code,
36 # "// ObjC++" for ObjC++
38 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
39 # allow for ObjC/ObjC++ specific flags.
40 proc check_compile {basename type contents args} {
42 verbose "check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources] {
48 set tmp_additional_sources "$additional_sources"
49 set additional_sources ""
52 if { [llength $args] > 0 } {
53 set options [list "additional_flags=[lindex $args 0]"]
57 switch -glob -- $contents {
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default { set src ${basename}[pid].c }
72 set compile_type $type
74 assembly { set output ${basename}[pid].s }
75 object { set output ${basename}[pid].o }
76 executable { set output ${basename}[pid].exe }
78 set output ${basename}[pid].s
79 lappend options "additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines [${tool}_target_compile $src $output $compile_type "$options"]
89 set scan_output $output
90 # Don't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp "rtl-(.*)" $type dummy rtl_type] {
93 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources] {
99 set additional_sources "$tmp_additional_sources"
102 return [list $lines $scan_output]
105 proc current_target_name { } {
107 if [info exists target_info(target,name)] {
108 set answer $target_info(target,name)
115 # Implement an effective-target check for property PROP by invoking
116 # the Tcl command ARGS and seeing if it returns true.
118 proc check_cached_effective_target { prop args } {
122 set target [current_target_name]
123 if {![info exists et_cache($prop,target)]
124 || $et_cache($prop,target) != $target} {
125 verbose "check_cached_effective_target $prop: checking $target" 2
126 set et_cache($prop,target) $target
127 set et_cache($prop,value) [uplevel eval $args]
128 if {![info exists et_prop_list]
129 || [lsearch $et_prop_list $prop] < 0} {
130 lappend et_prop_list $prop
132 verbose "check_cached_effective_target cached list is now: $et_prop_list" 2
134 set value $et_cache($prop,value)
135 verbose "check_cached_effective_target $prop: returning $value for $target" 2
139 # Clear effective-target cache. This is useful after testing
140 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
142 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
143 # do a clear_effective_target_cache at the end as the target cache can
144 # make decisions based upon the flags, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init/asan_finish pair.
148 proc clear_effective_target_cache { } {
152 if {[info exists et_prop_list]} {
153 verbose "clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list {
155 unset et_cache($prop,value)
156 unset et_cache($prop,target)
162 # Like check_compile, but delete the output file and return true if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache {args} {
165 set result [eval check_compile $args]
166 set lines [lindex $result 0]
167 set output [lindex $result 1]
168 remote_file build delete $output
169 return [string match "" $lines]
172 # Like check_no_compiler_messages_nocache, but cache the result.
173 # PROP is the property we're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP, otherwise they satisfy it
185 # if they do match regular expression PATTERN. (PATTERN can start
186 # with something like "[!]" if the regular expression needs to match
187 # "!" as the first character.)
189 # Delete the output file before returning. The other arguments are
190 # as for check_compile.
191 proc check_no_messages_and_pattern_nocache {basename pattern args} {
194 set result [eval [list check_compile $basename] $args]
195 set lines [lindex $result 0]
196 set output [lindex $result 1]
199 if { [string match "" $lines] } {
200 set chan [open "$output"]
201 set invert [regexp {^!(.*)} $pattern dummy pattern]
202 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
206 remote_file build delete $output
210 # Like check_no_messages_and_pattern_nocache, but cache the result.
211 # PROP is the property we're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
240 remote_file build delete $output
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking, and doubles as a prefix for temporary
247 proc check_runtime {prop args} {
250 return [check_cached_effective_target $prop {
251 eval [list check_runtime_nocache $prop] $args
255 ###############################
256 # proc check_weak_available { }
257 ###############################
259 # weak symbols are only supported in some configs/object formats
260 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
262 proc check_weak_available { } {
265 # All mips targets should support it
267 if { [ string first "mips" $target_cpu ] >= 0 } {
271 # All AIX targets should support it
273 if { [istarget *-*-aix*] } {
277 # All solaris2 targets should support it
279 if { [istarget *-*-solaris2*] } {
283 # Windows targets Cygwin and MingW32 support it
285 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
289 # HP-UX 10.X doesn't support it
291 if { [istarget hppa*-*-hpux10*] } {
295 # nvptx (nearly) supports it
297 if { [istarget nvptx-*-*] } {
301 # ELF and ECOFF support it. a.out does with gas/gld but may also with
302 # other linkers, so we should try it
304 set objformat [gcc_target_object_format]
312 unknown { return -1 }
317 ###############################
318 # proc check_weak_override_available { }
319 ###############################
321 # Like check_weak_available, but return 0 if weak symbol definitions
322 # cannot be overridden.
324 proc check_weak_override_available { } {
325 if { [istarget *-*-mingw*] } {
328 return [check_weak_available]
331 ###############################
332 # proc check_visibility_available { what_kind }
333 ###############################
335 # The visibility attribute is only support in some object formats
336 # This proc returns 1 if it is supported, 0 if not.
337 # The argument is the kind of visibility, default/protected/hidden/internal.
339 proc check_visibility_available { what_kind } {
340 if [string match "" $what_kind] { set what_kind "hidden" }
342 return [check_no_compiler_messages visibility_available_$what_kind object "
343 void f() __attribute__((visibility(\"$what_kind\")));
348 ###############################
349 # proc check_alias_available { }
350 ###############################
352 # Determine if the target toolchain supports the alias attribute.
354 # Returns 2 if the target supports aliases. Returns 1 if the target
355 # only supports weak aliased. Returns 0 if the target does not
356 # support aliases at all. Returns -1 if support for aliases could not
359 proc check_alias_available { } {
360 global alias_available_saved
363 if [info exists alias_available_saved] {
364 verbose "check_alias_available returning saved $alias_available_saved" 2
368 verbose "check_alias_available compiling testfile $src" 2
369 set f [open $src "w"]
370 # Compile a small test program. The definition of "g" is
371 # necessary to keep the Solaris assembler from complaining
373 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
374 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
376 set lines [${tool}_target_compile $src $obj object ""]
378 remote_file build delete $obj
380 if [string match "" $lines] then {
381 # No error messages, everything is OK.
382 set alias_available_saved 2
384 if [regexp "alias definitions not supported" $lines] {
385 verbose "check_alias_available target does not support aliases" 2
387 set objformat [gcc_target_object_format]
389 if { $objformat == "elf" } {
390 verbose "check_alias_available but target uses ELF format, so it ought to" 2
391 set alias_available_saved -1
393 set alias_available_saved 0
396 if [regexp "only weak aliases are supported" $lines] {
397 verbose "check_alias_available target supports only weak aliases" 2
398 set alias_available_saved 1
400 set alias_available_saved -1
405 verbose "check_alias_available returning $alias_available_saved" 2
408 return $alias_available_saved
411 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
413 proc check_effective_target_alias { } {
414 if { [check_alias_available] < 2 } {
421 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
423 proc check_ifunc_available { } {
424 return [check_no_compiler_messages ifunc_available object {
429 void f() __attribute__((ifunc("g")));
433 # Returns true if --gc-sections is supported on the target.
435 proc check_gc_sections_available { } {
436 global gc_sections_available_saved
439 if {![info exists gc_sections_available_saved]} {
440 # Some targets don't support gc-sections despite whatever's
441 # advertised by ld's options.
442 if { [istarget alpha*-*-*]
443 || [istarget ia64-*-*] } {
444 set gc_sections_available_saved 0
448 # elf2flt uses -q (--emit-relocs), which is incompatible with
450 if { [board_info target exists ldflags]
451 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
452 set gc_sections_available_saved 0
456 # VxWorks kernel modules are relocatable objects linked with -r,
457 # while RTP executables are linked with -q (--emit-relocs).
458 # Both of these options are incompatible with --gc-sections.
459 if { [istarget *-*-vxworks*] } {
460 set gc_sections_available_saved 0
464 # Check if the ld used by gcc supports --gc-sections.
465 set gcc_spec [${tool}_target_compile "-dumpspecs" "" "none" ""]
466 regsub ".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
467 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=$linker" "" "none" ""] 0]
468 set ld_output [remote_exec host "$gcc_ld" "--help"]
469 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
470 set gc_sections_available_saved 1
472 set gc_sections_available_saved 0
475 return $gc_sections_available_saved
478 # Return 1 if according to target_info struct and explicit target list
479 # target is supposed to support trampolines.
481 proc check_effective_target_trampolines { } {
482 if [target_info exists no_trampolines] {
485 if { [istarget avr-*-*]
486 || [istarget msp430-*-*]
487 || [istarget nvptx-*-*]
488 || [istarget hppa2.0w-hp-hpux11.23]
489 || [istarget hppa64-hp-hpux11.23] } {
495 # Return 1 if according to target_info struct and explicit target list
496 # target disables -fdelete-null-pointer-checks. Targets should return 0
497 # if they simply default to -fno-delete-null-pointer-checks but obey
498 # -fdelete-null-pointer-checks when passed explicitly (and tests that
499 # depend on this option should do that).
501 proc check_effective_target_keeps_null_pointer_checks { } {
502 if [target_info exists keeps_null_pointer_checks] {
505 if { [istarget avr-*-*] } {
511 # Return the autofdo profile wrapper
513 proc profopt-perf-wrapper { } {
515 return "$srcdir/../config/i386/gcc-auto-profile -o perf.data "
518 # Return true if profiling is supported on the target.
520 proc check_profiling_available { test_what } {
521 global profiling_available_saved
523 verbose "Profiling argument is <$test_what>" 1
525 # These conditions depend on the argument so examine them before
526 # looking at the cache variable.
528 # Tree profiling requires TLS runtime support.
529 if { $test_what == "-fprofile-generate" } {
530 if { ![check_effective_target_tls_runtime] } {
535 if { $test_what == "-fauto-profile" } {
536 if { ! ([istarget x86_64-*-linux*] || [istarget i?86-*-linux*]) } {
537 verbose "autofdo only supported on linux"
540 # not cross compiling?
542 verbose "autofdo not supported for non native builds"
545 set event [profopt-perf-wrapper]
547 verbose "autofdo not supported"
551 set status [remote_exec host "$srcdir/../config/i386/gcc-auto-profile" "true -v >/dev/null"]
552 if { [lindex $status 0] != 0 } {
553 verbose "autofdo not supported because perf does not work"
557 # no good way to check this in advance -- check later instead.
558 #set status [remote_exec host "create_gcov" "2>/dev/null"]
559 #if { [lindex $status 0] != 255 } {
560 # verbose "autofdo not supported due to missing create_gcov"
565 # Support for -p on solaris2 relies on mcrt1.o which comes with the
566 # vendor compiler. We cannot reliably predict the directory where the
567 # vendor compiler (and thus mcrt1.o) is installed so we can't
568 # necessarily find mcrt1.o even if we have it.
569 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
573 # We don't yet support profiling for MIPS16.
574 if { [istarget mips*-*-*]
575 && ![check_effective_target_nomips16]
576 && ($test_what == "-p" || $test_what == "-pg") } {
580 # MinGW does not support -p.
581 if { [istarget *-*-mingw*] && $test_what == "-p" } {
585 # cygwin does not support -p.
586 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
590 # uClibc does not have gcrt1.o.
591 if { [check_effective_target_uclibc]
592 && ($test_what == "-p" || $test_what == "-pg") } {
596 # Now examine the cache variable.
597 if {![info exists profiling_available_saved]} {
598 # Some targets don't have any implementation of __bb_init_func or are
599 # missing other needed machinery.
600 if {[istarget aarch64*-*-elf]
601 || [istarget am3*-*-linux*]
602 || [istarget arm*-*-eabi*]
603 || [istarget arm*-*-elf]
604 || [istarget arm*-*-symbianelf*]
605 || [istarget avr-*-*]
606 || [istarget bfin-*-*]
607 || [istarget cris-*-*]
608 || [istarget crisv32-*-*]
609 || [istarget fido-*-elf]
610 || [istarget h8300-*-*]
611 || [istarget lm32-*-*]
612 || [istarget m32c-*-elf]
613 || [istarget m68k-*-elf]
614 || [istarget m68k-*-uclinux*]
615 || [istarget mips*-*-elf*]
616 || [istarget mmix-*-*]
617 || [istarget mn10300-*-elf*]
618 || [istarget moxie-*-elf*]
619 || [istarget msp430-*-*]
620 || [istarget nds32*-*-elf]
621 || [istarget nios2-*-elf]
622 || [istarget nvptx-*-*]
623 || [istarget powerpc-*-eabi*]
624 || [istarget powerpc-*-elf]
626 || [istarget tic6x-*-elf]
627 || [istarget visium-*-*]
628 || [istarget xstormy16-*]
629 || [istarget xtensa*-*-elf]
630 || [istarget *-*-rtems*]
631 || [istarget *-*-vxworks*] } {
632 set profiling_available_saved 0
634 set profiling_available_saved 1
638 # -pg link test result can't be cached since it may change between
640 set profiling_working $profiling_available_saved
641 if { $profiling_available_saved == 1
642 && ![check_no_compiler_messages_nocache profiling executable {
643 int main() { return 0; } } "-pg"] } {
644 set profiling_working 0
647 return $profiling_working
650 # Check to see if a target is "freestanding". This is as per the definition
651 # in Section 4 of C99 standard. Effectively, it is a target which supports no
652 # extra headers or libraries other than what is considered essential.
653 proc check_effective_target_freestanding { } {
654 if { [istarget nvptx-*-*] } {
660 # Return 1 if target has packed layout of structure members by
661 # default, 0 otherwise. Note that this is slightly different than
662 # whether the target has "natural alignment": both attributes may be
665 proc check_effective_target_default_packed { } {
666 return [check_no_compiler_messages default_packed assembly {
667 struct x { char a; long b; } c;
668 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
672 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
673 # documentation, where the test also comes from.
675 proc check_effective_target_pcc_bitfield_type_matters { } {
676 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
677 # bitfields, but let's stick to the example code from the docs.
678 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
679 struct foo1 { char x; char :0; char y; };
680 struct foo2 { char x; int :0; char y; };
681 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
685 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
687 proc add_options_for_tls { flags } {
688 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
689 # libthread, so always pass -pthread for native TLS. Same for AIX.
690 # Need to duplicate native TLS check from
691 # check_effective_target_tls_native to avoid recursion.
692 if { ([istarget powerpc-ibm-aix*]) &&
693 [check_no_messages_and_pattern tls_native "!emutls" assembly {
695 int f (void) { return i; }
696 void g (int j) { i = j; }
698 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
703 # Return 1 if indirect jumps are supported, 0 otherwise.
705 proc check_effective_target_indirect_jumps {} {
706 if { [istarget nvptx-*-*] } {
712 # Return 1 if nonlocal goto is supported, 0 otherwise.
714 proc check_effective_target_nonlocal_goto {} {
715 if { [istarget nvptx-*-*] } {
721 # Return 1 if global constructors are supported, 0 otherwise.
723 proc check_effective_target_global_constructor {} {
724 if { [istarget nvptx-*-*] } {
730 # Return 1 if taking label values is supported, 0 otherwise.
732 proc check_effective_target_label_values {} {
733 if { [istarget nvptx-*-*] } {
736 return [check_no_compiler_messages label_values assembly {
737 #ifdef NO_LABEL_VALUES
743 # Return 1 if builtin_return_address and builtin_frame_address are
744 # supported, 0 otherwise.
746 proc check_effective_target_return_address {} {
747 if { [istarget nvptx-*-*] } {
753 # Return 1 if the assembler does not verify function types against
754 # calls, 0 otherwise. Such verification will typically show up problems
755 # with K&R C function declarations.
757 proc check_effective_target_untyped_assembly {} {
758 if { [istarget nvptx-*-*] } {
764 # Return 1 if alloca is supported, 0 otherwise.
766 proc check_effective_target_alloca {} {
767 if { [istarget nvptx-*-*] } {
773 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
775 proc check_effective_target_tls {} {
776 return [check_no_compiler_messages tls assembly {
778 int f (void) { return i; }
779 void g (int j) { i = j; }
783 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
785 proc check_effective_target_tls_native {} {
786 # VxWorks uses emulated TLS machinery, but with non-standard helper
787 # functions, so we fail to automatically detect it.
788 if { [istarget *-*-vxworks*] } {
792 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
794 int f (void) { return i; }
795 void g (int j) { i = j; }
799 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
801 proc check_effective_target_tls_emulated {} {
802 # VxWorks uses emulated TLS machinery, but with non-standard helper
803 # functions, so we fail to automatically detect it.
804 if { [istarget *-*-vxworks*] } {
808 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
810 int f (void) { return i; }
811 void g (int j) { i = j; }
815 # Return 1 if TLS executables can run correctly, 0 otherwise.
817 proc check_effective_target_tls_runtime {} {
818 # The runtime does not have TLS support, but just
819 # running the test below is insufficient to show this.
820 if { [istarget msp430-*-*] || [istarget visium-*-*] } {
823 return [check_runtime tls_runtime {
824 __thread int thr = 0;
825 int main (void) { return thr; }
826 } [add_options_for_tls ""]]
829 # Return 1 if atomic compare-and-swap is supported on 'int'
831 proc check_effective_target_cas_char {} {
832 return [check_no_compiler_messages cas_char assembly {
833 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
839 proc check_effective_target_cas_int {} {
840 return [check_no_compiler_messages cas_int assembly {
841 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
843 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
851 # Return 1 if -ffunction-sections is supported, 0 otherwise.
853 proc check_effective_target_function_sections {} {
854 # Darwin has its own scheme and silently accepts -ffunction-sections.
855 if { [istarget *-*-darwin*] } {
859 return [check_no_compiler_messages functionsections assembly {
861 } "-ffunction-sections"]
864 # Return 1 if instruction scheduling is available, 0 otherwise.
866 proc check_effective_target_scheduling {} {
867 return [check_no_compiler_messages scheduling object {
869 } "-fschedule-insns"]
872 # Return 1 if trapping arithmetic is available, 0 otherwise.
874 proc check_effective_target_trapping {} {
875 return [check_no_compiler_messages trapping object {
876 int add (int a, int b) { return a + b; }
880 # Return 1 if compilation with -fgraphite is error-free for trivial
883 proc check_effective_target_fgraphite {} {
884 return [check_no_compiler_messages fgraphite object {
889 # Return 1 if compilation with -fopenacc is error-free for trivial
892 proc check_effective_target_fopenacc {} {
893 # nvptx can be built with the device-side bits of openacc, but it
894 # does not make sense to test it as an openacc host.
895 if [istarget nvptx-*-*] { return 0 }
897 return [check_no_compiler_messages fopenacc object {
902 # Return 1 if compilation with -fopenmp is error-free for trivial
905 proc check_effective_target_fopenmp {} {
906 # nvptx can be built with the device-side bits of libgomp, but it
907 # does not make sense to test it as an openmp host.
908 if [istarget nvptx-*-*] { return 0 }
910 return [check_no_compiler_messages fopenmp object {
915 # Return 1 if compilation with -fgnu-tm is error-free for trivial
918 proc check_effective_target_fgnu_tm {} {
919 return [check_no_compiler_messages fgnu_tm object {
924 # Return 1 if the target supports mmap, 0 otherwise.
926 proc check_effective_target_mmap {} {
927 return [check_function_available "mmap"]
930 # Return 1 if the target supports dlopen, 0 otherwise.
931 proc check_effective_target_dlopen {} {
932 return [check_no_compiler_messages dlopen executable {
934 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
935 } [add_options_for_dlopen ""]]
938 proc add_options_for_dlopen { flags } {
942 # Return 1 if the target supports clone, 0 otherwise.
943 proc check_effective_target_clone {} {
944 return [check_function_available "clone"]
947 # Return 1 if the target supports setrlimit, 0 otherwise.
948 proc check_effective_target_setrlimit {} {
949 # Darwin has non-posix compliant RLIMIT_AS
950 if { [istarget *-*-darwin*] } {
953 return [check_function_available "setrlimit"]
956 # Return 1 if the target supports swapcontext, 0 otherwise.
957 proc check_effective_target_swapcontext {} {
958 return [check_no_compiler_messages swapcontext executable {
959 #include <ucontext.h>
962 ucontext_t orig_context,child_context;
963 if (swapcontext(&child_context, &orig_context) < 0) { }
968 # Return 1 if compilation with -pthread is error-free for trivial
971 proc check_effective_target_pthread {} {
972 return [check_no_compiler_messages pthread object {
977 # Return 1 if compilation with -gstabs is error-free for trivial
980 proc check_effective_target_stabs {} {
981 return [check_no_compiler_messages stabs object {
986 # Return 1 if compilation with -mpe-aligned-commons is error-free
987 # for trivial code, 0 otherwise.
989 proc check_effective_target_pe_aligned_commons {} {
990 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
991 return [check_no_compiler_messages pe_aligned_commons object {
993 } "-mpe-aligned-commons"]
998 # Return 1 if the target supports -static
999 proc check_effective_target_static {} {
1000 return [check_no_compiler_messages static executable {
1001 int main (void) { return 0; }
1005 # Return 1 if the target supports -fstack-protector
1006 proc check_effective_target_fstack_protector {} {
1007 return [check_runtime fstack_protector {
1008 int main (void) { return 0; }
1009 } "-fstack-protector"]
1012 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
1013 # for trivial code, 0 otherwise.
1015 proc check_effective_target_freorder {} {
1016 return [check_no_compiler_messages freorder object {
1018 } "-freorder-blocks-and-partition"]
1021 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
1022 # emitted, 0 otherwise. Whether a shared library can actually be built is
1023 # out of scope for this test.
1025 proc check_effective_target_fpic { } {
1026 # Note that M68K has a multilib that supports -fpic but not
1027 # -fPIC, so we need to check both. We test with a program that
1028 # requires GOT references.
1029 foreach arg {fpic fPIC} {
1030 if [check_no_compiler_messages $arg object {
1031 extern int foo (void); extern int bar;
1032 int baz (void) { return foo () + bar; }
1040 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
1041 # silently. So, we can't rely on above "check_effective_target_fpic" as it
1042 # assumes compiler will give warning if -fpic not supported. Here we check
1043 # whether binutils supports those new -fpic relocation modifiers, and assume
1044 # -fpic is supported if there is binutils support. GCC configuration will
1045 # enable -fpic for AArch64 in this case.
1047 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1048 # memory model -fpic relocation types.
1050 proc check_effective_target_aarch64_small_fpic { } {
1051 if { [istarget aarch64*-*-*] } {
1052 return [check_no_compiler_messages aarch64_small_fpic object {
1053 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1060 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1061 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1062 # in binutils since 2015-03-04 as PR gas/17843.
1064 # This test directive make sure binutils support all features needed by TLS LE
1065 # under -mtls-size=32 on AArch64.
1067 proc check_effective_target_aarch64_tlsle32 { } {
1068 if { [istarget aarch64*-*-*] } {
1069 return [check_no_compiler_messages aarch64_tlsle32 object {
1070 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1077 # Return 1 if -shared is supported, as in no warnings or errors
1078 # emitted, 0 otherwise.
1080 proc check_effective_target_shared { } {
1081 # Note that M68K has a multilib that supports -fpic but not
1082 # -fPIC, so we need to check both. We test with a program that
1083 # requires GOT references.
1084 return [check_no_compiler_messages shared executable {
1085 extern int foo (void); extern int bar;
1086 int baz (void) { return foo () + bar; }
1090 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1092 proc check_effective_target_pie { } {
1093 if { [istarget *-*-darwin\[912\]*]
1094 || [istarget *-*-dragonfly*]
1095 || [istarget *-*-freebsd*]
1096 || [istarget *-*-linux*]
1097 || [istarget *-*-gnu*] } {
1100 if { [istarget *-*-solaris2.1\[1-9\]*] } {
1101 # Full PIE support was added in Solaris 11.x and Solaris 12, but gcc
1102 # errors out if missing, so check for that.
1103 return [check_no_compiler_messages pie executable {
1104 int main (void) { return 0; }
1110 # Return true if the target supports -mpaired-single (as used on MIPS).
1112 proc check_effective_target_mpaired_single { } {
1113 return [check_no_compiler_messages mpaired_single object {
1115 } "-mpaired-single"]
1118 # Return true if the target has access to FPU instructions.
1120 proc check_effective_target_hard_float { } {
1121 if { [istarget mips*-*-*] } {
1122 return [check_no_compiler_messages hard_float assembly {
1123 #if (defined __mips_soft_float || defined __mips16)
1124 #error __mips_soft_float || __mips16
1129 # This proc is actually checking the availabilty of FPU
1130 # support for doubles, so on the RX we must fail if the
1131 # 64-bit double multilib has been selected.
1132 if { [istarget rx-*-*] } {
1134 # return [check_no_compiler_messages hard_float assembly {
1135 #if defined __RX_64_BIT_DOUBLES__
1136 #error __RX_64_BIT_DOUBLES__
1141 # The generic test equates hard_float with "no call for adding doubles".
1142 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1143 double a (double b, double c) { return b + c; }
1147 # Return true if the target is a 64-bit MIPS target.
1149 proc check_effective_target_mips64 { } {
1150 return [check_no_compiler_messages mips64 assembly {
1157 # Return true if the target is a MIPS target that does not produce
1160 proc check_effective_target_nomips16 { } {
1161 return [check_no_compiler_messages nomips16 object {
1165 /* A cheap way of testing for -mflip-mips16. */
1166 void foo (void) { asm ("addiu $20,$20,1"); }
1167 void bar (void) { asm ("addiu $20,$20,1"); }
1172 # Add the options needed for MIPS16 function attributes. At the moment,
1173 # we don't support MIPS16 PIC.
1175 proc add_options_for_mips16_attribute { flags } {
1176 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1179 # Return true if we can force a mode that allows MIPS16 code generation.
1180 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1183 proc check_effective_target_mips16_attribute { } {
1184 return [check_no_compiler_messages mips16_attribute assembly {
1188 #if defined __mips_hard_float \
1189 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1190 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1191 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1193 } [add_options_for_mips16_attribute ""]]
1196 # Return 1 if the target supports long double larger than double when
1197 # using the new ABI, 0 otherwise.
1199 proc check_effective_target_mips_newabi_large_long_double { } {
1200 return [check_no_compiler_messages mips_newabi_large_long_double object {
1201 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1205 # Return true if the target is a MIPS target that has access
1206 # to the LL and SC instructions.
1208 proc check_effective_target_mips_llsc { } {
1209 if { ![istarget mips*-*-*] } {
1212 # Assume that these instructions are always implemented for
1213 # non-elf* targets, via emulation if necessary.
1214 if { ![istarget *-*-elf*] } {
1217 # Otherwise assume LL/SC support for everything but MIPS I.
1218 return [check_no_compiler_messages mips_llsc assembly {
1225 # Return true if the target is a MIPS target that uses in-place relocations.
1227 proc check_effective_target_mips_rel { } {
1228 if { ![istarget mips*-*-*] } {
1231 return [check_no_compiler_messages mips_rel object {
1232 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1233 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1234 #error _ABIN32 && (_ABIN32 || _ABI64)
1239 # Return true if the target is a MIPS target that uses the EABI.
1241 proc check_effective_target_mips_eabi { } {
1242 if { ![istarget mips*-*-*] } {
1245 return [check_no_compiler_messages mips_eabi object {
1252 # Return 1 if the current multilib does not generate PIC by default.
1254 proc check_effective_target_nonpic { } {
1255 return [check_no_compiler_messages nonpic assembly {
1262 # Return 1 if the current multilib generates PIE by default.
1264 proc check_effective_target_pie_enabled { } {
1265 return [check_no_compiler_messages pie_enabled assembly {
1272 # Return 1 if the target generates -fstack-protector by default.
1274 proc check_effective_target_fstack_protector_enabled {} {
1275 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1276 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1277 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1283 # Return 1 if the target does not use a status wrapper.
1285 proc check_effective_target_unwrapped { } {
1286 if { [target_info needs_status_wrapper] != "" \
1287 && [target_info needs_status_wrapper] != "0" } {
1293 # Return true if iconv is supported on the target. In particular IBM1047.
1295 proc check_iconv_available { test_what } {
1298 # If the tool configuration file has not set libiconv, try "-liconv"
1299 if { ![info exists libiconv] } {
1300 set libiconv "-liconv"
1302 set test_what [lindex $test_what 1]
1303 return [check_runtime_nocache $test_what [subst {
1309 cd = iconv_open ("$test_what", "UTF-8");
1310 if (cd == (iconv_t) -1)
1317 # Return true if Cilk Library is supported on the target.
1318 proc check_effective_target_cilkplus_runtime { } {
1319 return [ check_no_compiler_messages_nocache cilkplus_runtime executable {
1323 int __cilkrts_set_param (const char *, const char *);
1325 int x = __cilkrts_set_param ("nworkers", "0");
1328 } "-fcilkplus -lcilkrts" ]
1331 # Return true if the atomic library is supported on the target.
1332 proc check_effective_target_libatomic_available { } {
1333 return [check_no_compiler_messages libatomic_available executable {
1334 int main (void) { return 0; }
1338 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1340 proc check_ascii_locale_available { } {
1344 # Return true if named sections are supported on this target.
1346 proc check_named_sections_available { } {
1347 return [check_no_compiler_messages named_sections assembly {
1348 int __attribute__ ((section("whatever"))) foo;
1352 # Return true if the "naked" function attribute is supported on this target.
1354 proc check_effective_target_naked_functions { } {
1355 return [check_no_compiler_messages naked_functions assembly {
1356 void f() __attribute__((naked));
1360 # Return 1 if the target supports Fortran real kinds larger than real(8),
1363 # When the target name changes, replace the cached result.
1365 proc check_effective_target_fortran_large_real { } {
1366 return [check_no_compiler_messages fortran_large_real executable {
1368 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1375 # Return 1 if the target supports Fortran real kind real(16),
1376 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1377 # this checks for Real(16) only; the other returned real(10) if
1378 # both real(10) and real(16) are available.
1380 # When the target name changes, replace the cached result.
1382 proc check_effective_target_fortran_real_16 { } {
1383 return [check_no_compiler_messages fortran_real_16 executable {
1392 # Return 1 if the target supports Fortran's IEEE modules,
1395 # When the target name changes, replace the cached result.
1397 proc check_effective_target_fortran_ieee { flags } {
1398 return [check_no_compiler_messages fortran_ieee executable {
1400 use, intrinsic :: ieee_features
1406 # Return 1 if the target supports SQRT for the largest floating-point
1407 # type. (Some targets lack the libm support for this FP type.)
1408 # On most targets, this check effectively checks either whether sqrtl is
1409 # available or on __float128 systems whether libquadmath is installed,
1410 # which provides sqrtq.
1412 # When the target name changes, replace the cached result.
1414 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1415 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1417 use iso_fortran_env, only: real_kinds
1418 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1419 real(kind=maxFP), volatile :: x
1427 # Return 1 if the target supports Fortran integer kinds larger than
1428 # integer(8), 0 otherwise.
1430 # When the target name changes, replace the cached result.
1432 proc check_effective_target_fortran_large_int { } {
1433 return [check_no_compiler_messages fortran_large_int executable {
1435 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1436 integer(kind=k) :: i
1441 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1443 # When the target name changes, replace the cached result.
1445 proc check_effective_target_fortran_integer_16 { } {
1446 return [check_no_compiler_messages fortran_integer_16 executable {
1453 # Return 1 if we can statically link libgfortran, 0 otherwise.
1455 # When the target name changes, replace the cached result.
1457 proc check_effective_target_static_libgfortran { } {
1458 return [check_no_compiler_messages static_libgfortran executable {
1465 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1467 proc check_effective_target_cilkplus { } {
1468 # Skip cilk-plus tests on int16 and size16 targets for now.
1469 # The cilk-plus tests are not generic enough to cover these
1470 # cases and would throw hundreds of FAILs.
1471 if { [check_effective_target_int16]
1472 || ![check_effective_target_size32plus] } {
1476 # Skip AVR, its RAM is too small and too many tests would fail.
1477 if { [istarget avr-*-*] } {
1481 if { ! [check_effective_target_pthread] } {
1488 proc check_linker_plugin_available { } {
1489 return [check_no_compiler_messages_nocache linker_plugin executable {
1490 int main() { return 0; }
1491 } "-flto -fuse-linker-plugin"]
1494 # Return 1 if the target supports executing 750CL paired-single instructions, 0
1495 # otherwise. Cache the result.
1497 proc check_750cl_hw_available { } {
1498 return [check_cached_effective_target 750cl_hw_available {
1499 # If this is not the right target then we can skip the test.
1500 if { ![istarget powerpc-*paired*] } {
1503 check_runtime_nocache 750cl_hw_available {
1507 asm volatile ("ps_mul v0,v0,v0");
1509 asm volatile ("ps_mul 0,0,0");
1518 # Return 1 if the target OS supports running SSE executables, 0
1519 # otherwise. Cache the result.
1521 proc check_sse_os_support_available { } {
1522 return [check_cached_effective_target sse_os_support_available {
1523 # If this is not the right target then we can skip the test.
1524 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1526 } elseif { [istarget i?86-*-solaris2*] } {
1527 # The Solaris 2 kernel doesn't save and restore SSE registers
1528 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1529 check_runtime_nocache sse_os_support_available {
1532 asm volatile ("movaps %xmm0,%xmm0");
1542 # Return 1 if the target OS supports running AVX executables, 0
1543 # otherwise. Cache the result.
1545 proc check_avx_os_support_available { } {
1546 return [check_cached_effective_target avx_os_support_available {
1547 # If this is not the right target then we can skip the test.
1548 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1551 # Check that OS has AVX and SSE saving enabled.
1552 check_runtime_nocache avx_os_support_available {
1555 unsigned int eax, edx;
1557 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1558 return (eax & 6) != 6;
1565 # Return 1 if the target supports executing SSE instructions, 0
1566 # otherwise. Cache the result.
1568 proc check_sse_hw_available { } {
1569 return [check_cached_effective_target sse_hw_available {
1570 # If this is not the right target then we can skip the test.
1571 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1574 check_runtime_nocache sse_hw_available {
1578 unsigned int eax, ebx, ecx, edx;
1579 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1580 return !(edx & bit_SSE);
1588 # Return 1 if the target supports executing SSE2 instructions, 0
1589 # otherwise. Cache the result.
1591 proc check_sse2_hw_available { } {
1592 return [check_cached_effective_target sse2_hw_available {
1593 # If this is not the right target then we can skip the test.
1594 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1597 check_runtime_nocache sse2_hw_available {
1601 unsigned int eax, ebx, ecx, edx;
1602 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1603 return !(edx & bit_SSE2);
1611 # Return 1 if the target supports executing SSE4 instructions, 0
1612 # otherwise. Cache the result.
1614 proc check_sse4_hw_available { } {
1615 return [check_cached_effective_target sse4_hw_available {
1616 # If this is not the right target then we can skip the test.
1617 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1620 check_runtime_nocache sse4_hw_available {
1624 unsigned int eax, ebx, ecx, edx;
1625 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1626 return !(ecx & bit_SSE4_2);
1634 # Return 1 if the target supports executing AVX instructions, 0
1635 # otherwise. Cache the result.
1637 proc check_avx_hw_available { } {
1638 return [check_cached_effective_target avx_hw_available {
1639 # If this is not the right target then we can skip the test.
1640 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1643 check_runtime_nocache avx_hw_available {
1647 unsigned int eax, ebx, ecx, edx;
1648 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1649 return ((ecx & (bit_AVX | bit_OSXSAVE))
1650 != (bit_AVX | bit_OSXSAVE));
1658 # Return 1 if the target supports running SSE executables, 0 otherwise.
1660 proc check_effective_target_sse_runtime { } {
1661 if { [check_effective_target_sse]
1662 && [check_sse_hw_available]
1663 && [check_sse_os_support_available] } {
1669 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1671 proc check_effective_target_sse2_runtime { } {
1672 if { [check_effective_target_sse2]
1673 && [check_sse2_hw_available]
1674 && [check_sse_os_support_available] } {
1680 # Return 1 if the target supports running SSE4 executables, 0 otherwise.
1682 proc check_effective_target_sse4_runtime { } {
1683 if { [check_effective_target_sse4]
1684 && [check_sse4_hw_available]
1685 && [check_sse_os_support_available] } {
1691 # Return 1 if the target supports running AVX executables, 0 otherwise.
1693 proc check_effective_target_avx_runtime { } {
1694 if { [check_effective_target_avx]
1695 && [check_avx_hw_available]
1696 && [check_avx_os_support_available] } {
1702 # Return 1 if we are compiling for 64-bit PowerPC but we do not use direct
1703 # move instructions for moves from GPR to FPR.
1705 proc check_effective_target_powerpc64_no_dm { } {
1706 # The "mulld" checks if we are generating PowerPC64 code. The "lfd"
1707 # checks if we do not use direct moves, but use the old-fashioned
1708 # slower move-via-the-stack.
1709 return [check_no_messages_and_pattern powerpc64_no_dm \
1710 {\mmulld\M.*\mlfd} assembly {
1711 double f(long long x) { return x*x; }
1715 # Return 1 if the target supports executing power8 vector instructions, 0
1716 # otherwise. Cache the result.
1718 proc check_p8vector_hw_available { } {
1719 return [check_cached_effective_target p8vector_hw_available {
1720 # Some simulators are known to not support VSX/power8 instructions.
1721 # For now, disable on Darwin
1722 if { [istarget powerpc-*-eabi]
1723 || [istarget powerpc*-*-eabispe]
1724 || [istarget *-*-darwin*]} {
1727 set options "-mpower8-vector"
1728 check_runtime_nocache p8vector_hw_available {
1732 asm volatile ("xxlorc vs0,vs0,vs0");
1734 asm volatile ("xxlorc 0,0,0");
1743 # Return 1 if the target supports executing power9 vector instructions, 0
1744 # otherwise. Cache the result.
1746 proc check_p9vector_hw_available { } {
1747 return [check_cached_effective_target p9vector_hw_available {
1748 # Some simulators are known to not support VSX/power8/power9
1749 # instructions. For now, disable on Darwin.
1750 if { [istarget powerpc-*-eabi]
1751 || [istarget powerpc*-*-eabispe]
1752 || [istarget *-*-darwin*]} {
1755 set options "-mpower9-vector"
1756 check_runtime_nocache p9vector_hw_available {
1760 vector double v = (vector double) { 0.0, 0.0 };
1761 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
1769 # Return 1 if the target supports executing power9 modulo instructions, 0
1770 # otherwise. Cache the result.
1772 proc check_p9modulo_hw_available { } {
1773 return [check_cached_effective_target p9modulo_hw_available {
1774 # Some simulators are known to not support VSX/power8/power9
1775 # instructions. For now, disable on Darwin.
1776 if { [istarget powerpc-*-eabi]
1777 || [istarget powerpc*-*-eabispe]
1778 || [istarget *-*-darwin*]} {
1781 set options "-mmodulo"
1782 check_runtime_nocache p9modulo_hw_available {
1785 int i = 5, j = 3, r = -1;
1786 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
1794 # Return 1 if the target supports executing __float128 on PowerPC via software
1795 # emulation, 0 otherwise. Cache the result.
1797 proc check_ppc_float128_sw_available { } {
1798 return [check_cached_effective_target ppc_float128_sw_available {
1799 # Some simulators are known to not support VSX/power8/power9
1800 # instructions. For now, disable on Darwin.
1801 if { [istarget powerpc-*-eabi]
1802 || [istarget powerpc*-*-eabispe]
1803 || [istarget *-*-darwin*]} {
1806 set options "-mfloat128 -mvsx"
1807 check_runtime_nocache ppc_float128_sw_available {
1808 volatile __float128 x = 1.0q;
1809 volatile __float128 y = 2.0q;
1812 __float128 z = x + y;
1820 # Return 1 if the target supports executing __float128 on PowerPC via power9
1821 # hardware instructions, 0 otherwise. Cache the result.
1823 proc check_ppc_float128_hw_available { } {
1824 return [check_cached_effective_target ppc_float128_hw_available {
1825 # Some simulators are known to not support VSX/power8/power9
1826 # instructions. For now, disable on Darwin.
1827 if { [istarget powerpc-*-eabi]
1828 || [istarget powerpc*-*-eabispe]
1829 || [istarget *-*-darwin*]} {
1832 set options "-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
1833 check_runtime_nocache ppc_float128_hw_available {
1834 volatile __float128 x = 1.0q;
1835 volatile __float128 y = 2.0q;
1838 __float128 z = x + y;
1839 __float128 w = -1.0q;
1841 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
1842 return ((z != 3.0q) || (z != w);
1849 # Return 1 if the target supports executing VSX instructions, 0
1850 # otherwise. Cache the result.
1852 proc check_vsx_hw_available { } {
1853 return [check_cached_effective_target vsx_hw_available {
1854 # Some simulators are known to not support VSX instructions.
1855 # For now, disable on Darwin
1856 if { [istarget powerpc-*-eabi]
1857 || [istarget powerpc*-*-eabispe]
1858 || [istarget *-*-darwin*]} {
1862 check_runtime_nocache vsx_hw_available {
1866 asm volatile ("xxlor vs0,vs0,vs0");
1868 asm volatile ("xxlor 0,0,0");
1877 # Return 1 if the target supports executing AltiVec instructions, 0
1878 # otherwise. Cache the result.
1880 proc check_vmx_hw_available { } {
1881 return [check_cached_effective_target vmx_hw_available {
1882 # Some simulators are known to not support VMX instructions.
1883 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
1886 # Most targets don't require special flags for this test case, but
1887 # Darwin does. Just to be sure, make sure VSX is not enabled for
1888 # the altivec tests.
1889 if { [istarget *-*-darwin*]
1890 || [istarget *-*-aix*] } {
1891 set options "-maltivec -mno-vsx"
1893 set options "-mno-vsx"
1895 check_runtime_nocache vmx_hw_available {
1899 asm volatile ("vor v0,v0,v0");
1901 asm volatile ("vor 0,0,0");
1910 proc check_ppc_recip_hw_available { } {
1911 return [check_cached_effective_target ppc_recip_hw_available {
1912 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
1913 # For now, disable on Darwin
1914 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1917 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
1918 check_runtime_nocache ppc_recip_hw_available {
1919 volatile double d_recip, d_rsqrt, d_four = 4.0;
1920 volatile float f_recip, f_rsqrt, f_four = 4.0f;
1923 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
1924 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
1925 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
1926 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
1934 # Return 1 if the target supports executing AltiVec and Cell PPU
1935 # instructions, 0 otherwise. Cache the result.
1937 proc check_effective_target_cell_hw { } {
1938 return [check_cached_effective_target cell_hw_available {
1939 # Some simulators are known to not support VMX and PPU instructions.
1940 if { [istarget powerpc-*-eabi*] } {
1943 # Most targets don't require special flags for this test
1944 # case, but Darwin and AIX do.
1945 if { [istarget *-*-darwin*]
1946 || [istarget *-*-aix*] } {
1947 set options "-maltivec -mcpu=cell"
1949 set options "-mcpu=cell"
1951 check_runtime_nocache cell_hw_available {
1955 asm volatile ("vor v0,v0,v0");
1956 asm volatile ("lvlx v0,r0,r0");
1958 asm volatile ("vor 0,0,0");
1959 asm volatile ("lvlx 0,0,0");
1968 # Return 1 if the target supports executing 64-bit instructions, 0
1969 # otherwise. Cache the result.
1971 proc check_effective_target_powerpc64 { } {
1972 global powerpc64_available_saved
1975 if [info exists powerpc64_available_saved] {
1976 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
1978 set powerpc64_available_saved 0
1980 # Some simulators are known to not support powerpc64 instructions.
1981 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
1982 verbose "check_effective_target_powerpc64 returning 0" 2
1983 return $powerpc64_available_saved
1986 # Set up, compile, and execute a test program containing a 64-bit
1987 # instruction. Include the current process ID in the file
1988 # names to prevent conflicts with invocations for multiple
1993 set f [open $src "w"]
1994 puts $f "int main() {"
1995 puts $f "#ifdef __MACH__"
1996 puts $f " asm volatile (\"extsw r0,r0\");"
1998 puts $f " asm volatile (\"extsw 0,0\");"
2000 puts $f " return 0; }"
2003 set opts "additional_flags=-mcpu=G5"
2005 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
2006 set lines [${tool}_target_compile $src $exe executable "$opts"]
2009 if [string match "" $lines] then {
2010 # No error message, compilation succeeded.
2011 set result [${tool}_load "./$exe" "" ""]
2012 set status [lindex $result 0]
2013 remote_file build delete $exe
2014 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
2016 if { $status == "pass" } then {
2017 set powerpc64_available_saved 1
2020 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
2024 return $powerpc64_available_saved
2027 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
2028 # complex float arguments. This affects gfortran tests that call cabsf
2029 # in libm built by an earlier compiler. Return 1 if libm uses the same
2030 # argument passing as the compiler under test, 0 otherwise.
2032 # When the target name changes, replace the cached result.
2034 proc check_effective_target_broken_cplxf_arg { } {
2035 return [check_cached_effective_target broken_cplxf_arg {
2036 # Skip the work for targets known not to be affected.
2037 if { ![istarget powerpc64-*-linux*] } {
2039 } elseif { ![is-effective-target lp64] } {
2042 check_runtime_nocache broken_cplxf_arg {
2043 #include <complex.h>
2044 extern void abort (void);
2045 float fabsf (float);
2046 float cabsf (_Complex float);
2053 if (fabsf (f - 5.0) > 0.0001)
2062 # Return 1 is this is a TI C6X target supporting C67X instructions
2063 proc check_effective_target_ti_c67x { } {
2064 return [check_no_compiler_messages ti_c67x assembly {
2065 #if !defined(_TMS320C6700)
2066 #error !_TMS320C6700
2071 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2072 proc check_effective_target_ti_c64xp { } {
2073 return [check_no_compiler_messages ti_c64xp assembly {
2074 #if !defined(_TMS320C6400_PLUS)
2075 #error !_TMS320C6400_PLUS
2081 proc check_alpha_max_hw_available { } {
2082 return [check_runtime alpha_max_hw_available {
2083 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2087 # Returns true iff the FUNCTION is available on the target system.
2088 # (This is essentially a Tcl implementation of Autoconf's
2091 proc check_function_available { function } {
2092 return [check_no_compiler_messages ${function}_available \
2098 int main () { $function (); }
2102 # Returns true iff "fork" is available on the target system.
2104 proc check_fork_available {} {
2105 return [check_function_available "fork"]
2108 # Returns true iff "mkfifo" is available on the target system.
2110 proc check_mkfifo_available {} {
2111 if { [istarget *-*-cygwin*] } {
2112 # Cygwin has mkfifo, but support is incomplete.
2116 return [check_function_available "mkfifo"]
2119 # Returns true iff "__cxa_atexit" is used on the target system.
2121 proc check_cxa_atexit_available { } {
2122 return [check_cached_effective_target cxa_atexit_available {
2123 if { [istarget hppa*-*-hpux10*] } {
2124 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
2126 } elseif { [istarget *-*-vxworks] } {
2127 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2130 check_runtime_nocache cxa_atexit_available {
2133 static unsigned int count;
2150 Y() { f(); count = 2; }
2159 int main() { return 0; }
2165 proc check_effective_target_objc2 { } {
2166 return [check_no_compiler_messages objc2 object {
2175 proc check_effective_target_next_runtime { } {
2176 return [check_no_compiler_messages objc2 object {
2177 #ifdef __NEXT_RUNTIME__
2180 #error !__NEXT_RUNTIME__
2185 # Return 1 if we're generating 32-bit code using default options, 0
2188 proc check_effective_target_ilp32 { } {
2189 return [check_no_compiler_messages ilp32 object {
2190 int dummy[sizeof (int) == 4
2191 && sizeof (void *) == 4
2192 && sizeof (long) == 4 ? 1 : -1];
2196 # Return 1 if we're generating ia32 code using default options, 0
2199 proc check_effective_target_ia32 { } {
2200 return [check_no_compiler_messages ia32 object {
2201 int dummy[sizeof (int) == 4
2202 && sizeof (void *) == 4
2203 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2207 # Return 1 if we're generating x32 code using default options, 0
2210 proc check_effective_target_x32 { } {
2211 return [check_no_compiler_messages x32 object {
2212 int dummy[sizeof (int) == 4
2213 && sizeof (void *) == 4
2214 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2218 # Return 1 if we're generating 32-bit integers using default
2219 # options, 0 otherwise.
2221 proc check_effective_target_int32 { } {
2222 return [check_no_compiler_messages int32 object {
2223 int dummy[sizeof (int) == 4 ? 1 : -1];
2227 # Return 1 if we're generating 32-bit or larger integers using default
2228 # options, 0 otherwise.
2230 proc check_effective_target_int32plus { } {
2231 return [check_no_compiler_messages int32plus object {
2232 int dummy[sizeof (int) >= 4 ? 1 : -1];
2236 # Return 1 if we're generating 32-bit or larger pointers using default
2237 # options, 0 otherwise.
2239 proc check_effective_target_ptr32plus { } {
2240 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2241 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2242 # cannot really hold a 32-bit address, so we always return false here.
2243 if { [istarget msp430-*-*] } {
2247 return [check_no_compiler_messages ptr32plus object {
2248 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2252 # Return 1 if we support 32-bit or larger array and structure sizes
2253 # using default options, 0 otherwise. Avoid false positive on
2254 # targets with 20 or 24 bit address spaces.
2256 proc check_effective_target_size32plus { } {
2257 return [check_no_compiler_messages size32plus object {
2258 char dummy[16777217L];
2262 # Returns 1 if we're generating 16-bit or smaller integers with the
2263 # default options, 0 otherwise.
2265 proc check_effective_target_int16 { } {
2266 return [check_no_compiler_messages int16 object {
2267 int dummy[sizeof (int) < 4 ? 1 : -1];
2271 # Return 1 if we're generating 64-bit code using default options, 0
2274 proc check_effective_target_lp64 { } {
2275 return [check_no_compiler_messages lp64 object {
2276 int dummy[sizeof (int) == 4
2277 && sizeof (void *) == 8
2278 && sizeof (long) == 8 ? 1 : -1];
2282 # Return 1 if we're generating 64-bit code using default llp64 options,
2285 proc check_effective_target_llp64 { } {
2286 return [check_no_compiler_messages llp64 object {
2287 int dummy[sizeof (int) == 4
2288 && sizeof (void *) == 8
2289 && sizeof (long long) == 8
2290 && sizeof (long) == 4 ? 1 : -1];
2294 # Return 1 if long and int have different sizes,
2297 proc check_effective_target_long_neq_int { } {
2298 return [check_no_compiler_messages long_ne_int object {
2299 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2303 # Return 1 if the target supports long double larger than double,
2306 proc check_effective_target_large_long_double { } {
2307 return [check_no_compiler_messages large_long_double object {
2308 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2312 # Return 1 if the target supports double larger than float,
2315 proc check_effective_target_large_double { } {
2316 return [check_no_compiler_messages large_double object {
2317 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2321 # Return 1 if the target supports long double of 128 bits,
2324 proc check_effective_target_longdouble128 { } {
2325 return [check_no_compiler_messages longdouble128 object {
2326 int dummy[sizeof(long double) == 16 ? 1 : -1];
2330 # Return 1 if the target supports double of 64 bits,
2333 proc check_effective_target_double64 { } {
2334 return [check_no_compiler_messages double64 object {
2335 int dummy[sizeof(double) == 8 ? 1 : -1];
2339 # Return 1 if the target supports double of at least 64 bits,
2342 proc check_effective_target_double64plus { } {
2343 return [check_no_compiler_messages double64plus object {
2344 int dummy[sizeof(double) >= 8 ? 1 : -1];
2348 # Return 1 if the target supports 'w' suffix on floating constant
2351 proc check_effective_target_has_w_floating_suffix { } {
2353 if [check_effective_target_c++] {
2354 append opts "-std=gnu++03"
2356 return [check_no_compiler_messages w_fp_suffix object {
2361 # Return 1 if the target supports 'q' suffix on floating constant
2364 proc check_effective_target_has_q_floating_suffix { } {
2366 if [check_effective_target_c++] {
2367 append opts "-std=gnu++03"
2369 return [check_no_compiler_messages q_fp_suffix object {
2374 # Return 1 if the target supports __float128,
2377 proc check_effective_target___float128 { } {
2378 if { [istarget powerpc*-*-*] } {
2379 return [check_ppc_float128_sw_available]
2381 if { [istarget ia64-*-*]
2382 || [istarget i?86-*-*]
2383 || [istarget x86_64-*-*] } {
2389 proc add_options_for___float128 { flags } {
2390 if { [istarget powerpc*-*-*] } {
2391 return "$flags -mfloat128 -mvsx"
2396 # Return 1 if the target supports any special run-time requirements
2397 # for __float128 or _Float128,
2400 proc check_effective_target_base_quadfloat_support { } {
2401 if { [istarget powerpc*-*-*] } {
2402 return [check_vsx_hw_available]
2407 # Return 1 if the target supports compiling fixed-point,
2410 proc check_effective_target_fixed_point { } {
2411 return [check_no_compiler_messages fixed_point object {
2412 _Sat _Fract x; _Sat _Accum y;
2416 # Return 1 if the target supports compiling decimal floating point,
2419 proc check_effective_target_dfp_nocache { } {
2420 verbose "check_effective_target_dfp_nocache: compiling source" 2
2421 set ret [check_no_compiler_messages_nocache dfp object {
2422 float x __attribute__((mode(DD)));
2424 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2428 proc check_effective_target_dfprt_nocache { } {
2429 return [check_runtime_nocache dfprt {
2430 typedef float d64 __attribute__((mode(DD)));
2431 d64 x = 1.2df, y = 2.3dd, z;
2432 int main () { z = x + y; return 0; }
2436 # Return 1 if the target supports compiling Decimal Floating Point,
2439 # This won't change for different subtargets so cache the result.
2441 proc check_effective_target_dfp { } {
2442 return [check_cached_effective_target dfp {
2443 check_effective_target_dfp_nocache
2447 # Return 1 if the target supports linking and executing Decimal Floating
2448 # Point, 0 otherwise.
2450 # This won't change for different subtargets so cache the result.
2452 proc check_effective_target_dfprt { } {
2453 return [check_cached_effective_target dfprt {
2454 check_effective_target_dfprt_nocache
2458 # Return 1 if the target supports executing DFP hardware instructions,
2459 # 0 otherwise. Cache the result.
2461 proc check_dfp_hw_available { } {
2462 return [check_cached_effective_target dfp_hw_available {
2463 # For now, disable on Darwin
2464 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2467 check_runtime_nocache dfp_hw_available {
2468 volatile _Decimal64 r;
2469 volatile _Decimal64 a = 4.0DD;
2470 volatile _Decimal64 b = 2.0DD;
2473 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2474 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2475 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2476 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2479 } "-mcpu=power6 -mhard-float"
2484 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2486 proc check_effective_target_ucn_nocache { } {
2487 # -std=c99 is only valid for C
2488 if [check_effective_target_c] {
2489 set ucnopts "-std=c99"
2493 verbose "check_effective_target_ucn_nocache: compiling source" 2
2494 set ret [check_no_compiler_messages_nocache ucn object {
2497 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2501 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2503 # This won't change for different subtargets, so cache the result.
2505 proc check_effective_target_ucn { } {
2506 return [check_cached_effective_target ucn {
2507 check_effective_target_ucn_nocache
2511 # Return 1 if the target needs a command line argument to enable a SIMD
2514 proc check_effective_target_vect_cmdline_needed { } {
2515 global et_vect_cmdline_needed_saved
2516 global et_vect_cmdline_needed_target_name
2518 if { ![info exists et_vect_cmdline_needed_target_name] } {
2519 set et_vect_cmdline_needed_target_name ""
2522 # If the target has changed since we set the cached value, clear it.
2523 set current_target [current_target_name]
2524 if { $current_target != $et_vect_cmdline_needed_target_name } {
2525 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2526 set et_vect_cmdline_needed_target_name $current_target
2527 if { [info exists et_vect_cmdline_needed_saved] } {
2528 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
2529 unset et_vect_cmdline_needed_saved
2533 if [info exists et_vect_cmdline_needed_saved] {
2534 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
2536 set et_vect_cmdline_needed_saved 1
2537 if { [istarget alpha*-*-*]
2538 || [istarget ia64-*-*]
2539 || (([istarget x86_64-*-*] || [istarget i?86-*-*])
2540 && ([check_effective_target_x32]
2541 || [check_effective_target_lp64]))
2542 || ([istarget powerpc*-*-*]
2543 && ([check_effective_target_powerpc_spe]
2544 || [check_effective_target_powerpc_altivec]))
2545 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
2546 || [istarget spu-*-*]
2547 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
2548 || [istarget aarch64*-*-*] } {
2549 set et_vect_cmdline_needed_saved 0
2553 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2554 return $et_vect_cmdline_needed_saved
2557 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
2559 # This won't change for different subtargets so cache the result.
2561 proc check_effective_target_vect_int { } {
2562 global et_vect_int_saved
2564 if [info exists et_vect_int_saved] {
2565 verbose "check_effective_target_vect_int: using cached result" 2
2567 set et_vect_int_saved 0
2568 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2569 || ([istarget powerpc*-*-*]
2570 && ![istarget powerpc-*-linux*paired*])
2571 || [istarget spu-*-*]
2572 || [istarget sparc*-*-*]
2573 || [istarget alpha*-*-*]
2574 || [istarget ia64-*-*]
2575 || [istarget aarch64*-*-*]
2576 || [check_effective_target_arm32]
2577 || ([istarget mips*-*-*]
2578 && [check_effective_target_mips_loongson]) } {
2579 set et_vect_int_saved 1
2583 verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
2584 return $et_vect_int_saved
2587 # Return 1 if the target supports signed int->float conversion
2590 proc check_effective_target_vect_intfloat_cvt { } {
2591 global et_vect_intfloat_cvt_saved
2593 if [info exists et_vect_intfloat_cvt_saved] {
2594 verbose "check_effective_target_vect_intfloat_cvt: using cached result" 2
2596 set et_vect_intfloat_cvt_saved 0
2597 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2598 || ([istarget powerpc*-*-*]
2599 && ![istarget powerpc-*-linux*paired*])
2600 || ([istarget arm*-*-*]
2601 && [check_effective_target_arm_neon_ok])} {
2602 set et_vect_intfloat_cvt_saved 1
2606 verbose "check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
2607 return $et_vect_intfloat_cvt_saved
2610 #Return 1 if we're supporting __int128 for target, 0 otherwise.
2612 proc check_effective_target_int128 { } {
2613 return [check_no_compiler_messages int128 object {
2615 #ifndef __SIZEOF_INT128__
2624 # Return 1 if the target supports unsigned int->float conversion
2627 proc check_effective_target_vect_uintfloat_cvt { } {
2628 global et_vect_uintfloat_cvt_saved
2630 if [info exists et_vect_uintfloat_cvt_saved] {
2631 verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2
2633 set et_vect_uintfloat_cvt_saved 0
2634 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2635 || ([istarget powerpc*-*-*]
2636 && ![istarget powerpc-*-linux*paired*])
2637 || [istarget aarch64*-*-*]
2638 || ([istarget arm*-*-*]
2639 && [check_effective_target_arm_neon_ok])} {
2640 set et_vect_uintfloat_cvt_saved 1
2644 verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
2645 return $et_vect_uintfloat_cvt_saved
2649 # Return 1 if the target supports signed float->int conversion
2652 proc check_effective_target_vect_floatint_cvt { } {
2653 global et_vect_floatint_cvt_saved
2655 if [info exists et_vect_floatint_cvt_saved] {
2656 verbose "check_effective_target_vect_floatint_cvt: using cached result" 2
2658 set et_vect_floatint_cvt_saved 0
2659 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
2660 || ([istarget powerpc*-*-*]
2661 && ![istarget powerpc-*-linux*paired*])
2662 || ([istarget arm*-*-*]
2663 && [check_effective_target_arm_neon_ok])} {
2664 set et_vect_floatint_cvt_saved 1
2668 verbose "check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
2669 return $et_vect_floatint_cvt_saved
2672 # Return 1 if the target supports unsigned float->int conversion
2675 proc check_effective_target_vect_floatuint_cvt { } {
2676 global et_vect_floatuint_cvt_saved
2678 if [info exists et_vect_floatuint_cvt_saved] {
2679 verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2
2681 set et_vect_floatuint_cvt_saved 0
2682 if { ([istarget powerpc*-*-*]
2683 && ![istarget powerpc-*-linux*paired*])
2684 || ([istarget arm*-*-*]
2685 && [check_effective_target_arm_neon_ok])} {
2686 set et_vect_floatuint_cvt_saved 1
2690 verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
2691 return $et_vect_floatuint_cvt_saved
2694 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
2696 # This won't change for different subtargets so cache the result.
2698 proc check_effective_target_vect_simd_clones { } {
2699 global et_vect_simd_clones_saved
2701 if [info exists et_vect_simd_clones_saved] {
2702 verbose "check_effective_target_vect_simd_clones: using cached result" 2
2704 set et_vect_simd_clones_saved 0
2705 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2706 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx and
2707 # avx2 clone. Only the right clone for the specified arch will be
2708 # chosen, but still we need to at least be able to assemble
2710 if { [check_effective_target_avx512f] } {
2711 set et_vect_simd_clones_saved 1
2716 verbose "check_effective_target_vect_simd_clones: returning $et_vect_simd_clones_saved" 2
2717 return $et_vect_simd_clones_saved
2720 # Return 1 if this is a AArch64 target supporting big endian
2721 proc check_effective_target_aarch64_big_endian { } {
2722 return [check_no_compiler_messages aarch64_big_endian assembly {
2723 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
2724 #error !__aarch64__ || !__AARCH64EB__
2729 # Return 1 if this is a AArch64 target supporting little endian
2730 proc check_effective_target_aarch64_little_endian { } {
2731 if { ![istarget aarch64*-*-*] } {
2735 return [check_no_compiler_messages aarch64_little_endian assembly {
2736 #if !defined(__aarch64__) || defined(__AARCH64EB__)
2742 # Return 1 if this is a compiler supporting ARC atomic operations
2743 proc check_effective_target_arc_atomic { } {
2744 return [check_no_compiler_messages arc_atomic assembly {
2745 #if !defined(__ARC_ATOMIC__)
2751 # Return 1 if this is an arm target using 32-bit instructions
2752 proc check_effective_target_arm32 { } {
2753 if { ![istarget arm*-*-*] } {
2757 return [check_no_compiler_messages arm32 assembly {
2758 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
2759 #error !__arm || __thumb__ && !__thumb2__
2764 # Return 1 if this is an arm target not using Thumb
2765 proc check_effective_target_arm_nothumb { } {
2766 if { ![istarget arm*-*-*] } {
2770 return [check_no_compiler_messages arm_nothumb assembly {
2771 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
2772 #error !__arm__ || __thumb || __thumb2__
2777 # Return 1 if this is a little-endian ARM target
2778 proc check_effective_target_arm_little_endian { } {
2779 if { ![istarget arm*-*-*] } {
2783 return [check_no_compiler_messages arm_little_endian assembly {
2784 #if !defined(__arm__) || !defined(__ARMEL__)
2785 #error !__arm__ || !__ARMEL__
2790 # Return 1 if this is an ARM target that only supports aligned vector accesses
2791 proc check_effective_target_arm_vect_no_misalign { } {
2792 if { ![istarget arm*-*-*] } {
2796 return [check_no_compiler_messages arm_vect_no_misalign assembly {
2797 #if !defined(__arm__) \
2798 || (defined(__ARM_FEATURE_UNALIGNED) \
2799 && defined(__ARMEL__))
2800 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
2806 # Return 1 if this is an ARM target supporting -mfpu=vfp
2807 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
2810 proc check_effective_target_arm_vfp_ok { } {
2811 if { [check_effective_target_arm32] } {
2812 return [check_no_compiler_messages arm_vfp_ok object {
2814 } "-mfpu=vfp -mfloat-abi=softfp"]
2820 # Return 1 if this is an ARM target supporting -mfpu=vfp3
2821 # -mfloat-abi=softfp.
2823 proc check_effective_target_arm_vfp3_ok { } {
2824 if { [check_effective_target_arm32] } {
2825 return [check_no_compiler_messages arm_vfp3_ok object {
2827 } "-mfpu=vfp3 -mfloat-abi=softfp"]
2833 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
2834 # -mfloat-abi=softfp.
2835 proc check_effective_target_arm_v8_vfp_ok {} {
2836 if { [check_effective_target_arm32] } {
2837 return [check_no_compiler_messages arm_v8_vfp_ok object {
2840 __asm__ volatile ("vrinta.f32.f32 s0, s0");
2843 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
2849 # Return 1 if this is an ARM target supporting -mfpu=vfp
2850 # -mfloat-abi=hard. Some multilibs may be incompatible with these
2853 proc check_effective_target_arm_hard_vfp_ok { } {
2854 if { [check_effective_target_arm32]
2855 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
2856 return [check_no_compiler_messages arm_hard_vfp_ok executable {
2857 int main() { return 0;}
2858 } "-mfpu=vfp -mfloat-abi=hard"]
2864 # Return 1 if this is an ARM target defining __ARM_FP. We may need
2865 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2866 # incompatible with these options. Also set et_arm_fp_flags to the
2867 # best options to add.
2869 proc check_effective_target_arm_fp_ok_nocache { } {
2870 global et_arm_fp_flags
2871 set et_arm_fp_flags ""
2872 if { [check_effective_target_arm32] } {
2873 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
2874 if { [check_no_compiler_messages_nocache arm_fp_ok object {
2876 #error __ARM_FP not defined
2879 set et_arm_fp_flags $flags
2888 proc check_effective_target_arm_fp_ok { } {
2889 return [check_cached_effective_target arm_fp_ok \
2890 check_effective_target_arm_fp_ok_nocache]
2893 # Add the options needed to define __ARM_FP. We need either
2894 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
2895 # specified by the multilib, use it.
2897 proc add_options_for_arm_fp { flags } {
2898 if { ! [check_effective_target_arm_fp_ok] } {
2901 global et_arm_fp_flags
2902 return "$flags $et_arm_fp_flags"
2905 # Return 1 if this is an ARM target that supports DSP multiply with
2906 # current multilib flags.
2908 proc check_effective_target_arm_dsp { } {
2909 return [check_no_compiler_messages arm_dsp assembly {
2910 #ifndef __ARM_FEATURE_DSP
2917 # Return 1 if this is an ARM target that supports unaligned word/halfword
2918 # load/store instructions.
2920 proc check_effective_target_arm_unaligned { } {
2921 return [check_no_compiler_messages arm_unaligned assembly {
2922 #ifndef __ARM_FEATURE_UNALIGNED
2923 #error no unaligned support
2929 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2930 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2931 # incompatible with these options. Also set et_arm_crypto_flags to the
2932 # best options to add.
2934 proc check_effective_target_arm_crypto_ok_nocache { } {
2935 global et_arm_crypto_flags
2936 set et_arm_crypto_flags ""
2937 if { [check_effective_target_arm_v8_neon_ok] } {
2938 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
2939 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
2940 #include "arm_neon.h"
2942 foo (uint8x16_t a, uint8x16_t b)
2944 return vaeseq_u8 (a, b);
2947 set et_arm_crypto_flags $flags
2956 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2958 proc check_effective_target_arm_crypto_ok { } {
2959 return [check_cached_effective_target arm_crypto_ok \
2960 check_effective_target_arm_crypto_ok_nocache]
2963 # Add options for crypto extensions.
2964 proc add_options_for_arm_crypto { flags } {
2965 if { ! [check_effective_target_arm_crypto_ok] } {
2968 global et_arm_crypto_flags
2969 return "$flags $et_arm_crypto_flags"
2972 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2973 # or -mfloat-abi=hard, but if one is already specified by the
2974 # multilib, use it. Similarly, if a -mfpu option already enables
2975 # NEON, do not add -mfpu=neon.
2977 proc add_options_for_arm_neon { flags } {
2978 if { ! [check_effective_target_arm_neon_ok] } {
2981 global et_arm_neon_flags
2982 return "$flags $et_arm_neon_flags"
2985 proc add_options_for_arm_v8_vfp { flags } {
2986 if { ! [check_effective_target_arm_v8_vfp_ok] } {
2989 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
2992 proc add_options_for_arm_v8_neon { flags } {
2993 if { ! [check_effective_target_arm_v8_neon_ok] } {
2996 global et_arm_v8_neon_flags
2997 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
3000 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
3001 # options for AArch64 and for ARM.
3003 proc add_options_for_arm_v8_1a_neon { flags } {
3004 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
3007 global et_arm_v8_1a_neon_flags
3008 return "$flags $et_arm_v8_1a_neon_flags -march=armv8.1-a"
3011 proc add_options_for_arm_crc { flags } {
3012 if { ! [check_effective_target_arm_crc_ok] } {
3015 global et_arm_crc_flags
3016 return "$flags $et_arm_crc_flags"
3019 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3020 # or -mfloat-abi=hard, but if one is already specified by the
3021 # multilib, use it. Similarly, if a -mfpu option already enables
3022 # NEON, do not add -mfpu=neon.
3024 proc add_options_for_arm_neonv2 { flags } {
3025 if { ! [check_effective_target_arm_neonv2_ok] } {
3028 global et_arm_neonv2_flags
3029 return "$flags $et_arm_neonv2_flags"
3032 # Add the options needed for vfp3.
3033 proc add_options_for_arm_vfp3 { flags } {
3034 if { ! [check_effective_target_arm_vfp3_ok] } {
3037 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
3040 # Return 1 if this is an ARM target supporting -mfpu=neon
3041 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3042 # incompatible with these options. Also set et_arm_neon_flags to the
3043 # best options to add.
3045 proc check_effective_target_arm_neon_ok_nocache { } {
3046 global et_arm_neon_flags
3047 set et_arm_neon_flags ""
3048 if { [check_effective_target_arm32] } {
3049 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a"} {
3050 if { [check_no_compiler_messages_nocache arm_neon_ok object {
3052 #ifndef __ARM_NEON__
3055 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3056 configured for -mcpu=arm926ej-s, for example. */
3057 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
3058 #error Architecture does not support NEON.
3061 set et_arm_neon_flags $flags
3070 proc check_effective_target_arm_neon_ok { } {
3071 return [check_cached_effective_target arm_neon_ok \
3072 check_effective_target_arm_neon_ok_nocache]
3075 proc check_effective_target_arm_crc_ok_nocache { } {
3076 global et_arm_crc_flags
3077 set et_arm_crc_flags "-march=armv8-a+crc"
3078 return [check_no_compiler_messages_nocache arm_crc_ok object {
3079 #if !defined (__ARM_FEATURE_CRC32)
3082 } "$et_arm_crc_flags"]
3085 proc check_effective_target_arm_crc_ok { } {
3086 return [check_cached_effective_target arm_crc_ok \
3087 check_effective_target_arm_crc_ok_nocache]
3090 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
3091 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3092 # incompatible with these options. Also set et_arm_neon_fp16_flags to
3093 # the best options to add.
3095 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
3096 global et_arm_neon_fp16_flags
3097 global et_arm_neon_flags
3098 set et_arm_neon_fp16_flags ""
3099 if { [check_effective_target_arm32]
3100 && [check_effective_target_arm_neon_ok] } {
3101 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3102 "-mfpu=neon-fp16 -mfloat-abi=softfp"
3103 "-mfp16-format=ieee"
3104 "-mfloat-abi=softfp -mfp16-format=ieee"
3105 "-mfpu=neon-fp16 -mfp16-format=ieee"
3106 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
3107 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
3108 #include "arm_neon.h"
3110 foo (float32x4_t arg)
3112 return vcvt_f16_f32 (arg);
3114 } "$et_arm_neon_flags $flags"] } {
3115 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
3124 proc check_effective_target_arm_neon_fp16_ok { } {
3125 return [check_cached_effective_target arm_neon_fp16_ok \
3126 check_effective_target_arm_neon_fp16_ok_nocache]
3129 proc check_effective_target_arm_neon_fp16_hw { } {
3130 if {! [check_effective_target_arm_neon_fp16_ok] } {
3133 global et_arm_neon_fp16_flags
3134 check_runtime_nocache arm_neon_fp16_hw {
3136 main (int argc, char **argv)
3138 asm ("vcvt.f32.f16 q1, d0");
3141 } $et_arm_neon_fp16_flags
3144 proc add_options_for_arm_neon_fp16 { flags } {
3145 if { ! [check_effective_target_arm_neon_fp16_ok] } {
3148 global et_arm_neon_fp16_flags
3149 return "$flags $et_arm_neon_fp16_flags"
3152 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
3153 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3154 # incompatible with these options. Also set et_arm_v8_neon_flags to the
3155 # best options to add.
3157 proc check_effective_target_arm_v8_neon_ok_nocache { } {
3158 global et_arm_v8_neon_flags
3159 set et_arm_v8_neon_flags ""
3160 if { [check_effective_target_arm32] } {
3161 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3162 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
3164 #error not armv8 or later
3166 #include "arm_neon.h"
3170 __asm__ volatile ("vrintn.f32 q0, q0");
3172 } "$flags -march=armv8-a"] } {
3173 set et_arm_v8_neon_flags $flags
3182 proc check_effective_target_arm_v8_neon_ok { } {
3183 return [check_cached_effective_target arm_v8_neon_ok \
3184 check_effective_target_arm_v8_neon_ok_nocache]
3187 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3188 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3189 # incompatible with these options. Also set et_arm_neonv2_flags to the
3190 # best options to add.
3192 proc check_effective_target_arm_neonv2_ok_nocache { } {
3193 global et_arm_neonv2_flags
3194 global et_arm_neon_flags
3195 set et_arm_neonv2_flags ""
3196 if { [check_effective_target_arm32]
3197 && [check_effective_target_arm_neon_ok] } {
3198 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3199 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3200 #include "arm_neon.h"
3202 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3204 return vfma_f32 (a, b, c);
3206 } "$et_arm_neon_flags $flags"] } {
3207 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
3216 proc check_effective_target_arm_neonv2_ok { } {
3217 return [check_cached_effective_target arm_neonv2_ok \
3218 check_effective_target_arm_neonv2_ok_nocache]
3221 # Add the options needed for VFP FP16 support. We need either
3222 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
3223 # the multilib, use it.
3225 proc add_options_for_arm_fp16 { flags } {
3226 if { ! [check_effective_target_arm_fp16_ok] } {
3229 global et_arm_fp16_flags
3230 return "$flags $et_arm_fp16_flags"
3233 # Add the options needed to enable support for IEEE format
3234 # half-precision support. This is valid for ARM targets.
3236 proc add_options_for_arm_fp16_ieee { flags } {
3237 if { ! [check_effective_target_arm_fp16_ok] } {
3240 global et_arm_fp16_flags
3241 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
3244 # Add the options needed to enable support for ARM Alternative format
3245 # half-precision support. This is valid for ARM targets.
3247 proc add_options_for_arm_fp16_alternative { flags } {
3248 if { ! [check_effective_target_arm_fp16_ok] } {
3251 global et_arm_fp16_flags
3252 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
3255 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
3256 # Skip multilibs that are incompatible with these options and set
3257 # et_arm_fp16_flags to the best options to add. This test is valid for
3260 proc check_effective_target_arm_fp16_ok_nocache { } {
3261 global et_arm_fp16_flags
3262 set et_arm_fp16_flags ""
3263 if { ! [check_effective_target_arm32] } {
3267 [list "" { *-*-* } { "-mfpu=*" } \
3268 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
3269 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
3270 # Multilib flags would override -mfpu.
3273 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
3274 # Must generate floating-point instructions.
3277 if [check_effective_target_arm_hf_eabi] {
3278 # Use existing float-abi and force an fpu which supports fp16
3279 set et_arm_fp16_flags "-mfpu=vfpv4"
3282 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
3283 # The existing -mfpu value is OK; use it, but add softfp.
3284 set et_arm_fp16_flags "-mfloat-abi=softfp"
3287 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
3288 # macro to check for this support.
3289 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
3290 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
3293 set et_arm_fp16_flags "$flags"
3300 proc check_effective_target_arm_fp16_ok { } {
3301 return [check_cached_effective_target arm_fp16_ok \
3302 check_effective_target_arm_fp16_ok_nocache]
3305 # Return 1 if the target supports executing VFP FP16 instructions, 0
3306 # otherwise. This test is valid for ARM only.
3308 proc check_effective_target_arm_fp16_hw { } {
3309 if {! [check_effective_target_arm_fp16_ok] } {
3312 global et_arm_fp16_flags
3313 check_runtime_nocache arm_fp16_hw {
3315 main (int argc, char **argv)
3319 asm ("vcvtb.f32.f16 %0, %1"
3320 : "=w" (r) : "w" (a)
3321 : /* No clobbers. */);
3322 return (r == 1.0) ? 0 : 1;
3324 } "$et_arm_fp16_flags -mfp16-format=ieee"
3327 # Creates a series of routines that return 1 if the given architecture
3328 # can be selected and a routine to give the flags to select that architecture
3329 # Note: Extra flags may be added to disable options from newer compilers
3330 # (Thumb in particular - but others may be added in the future).
3331 # -march=armv7ve is special and is handled explicitly after this loop because
3332 # it needs more than one predefine check to identify.
3333 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
3334 # /* { dg-add-options arm_arch_v5 } */
3335 # /* { dg-require-effective-target arm_arch_v5_multilib } */
3336 foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
3337 v4t "-march=armv4t" __ARM_ARCH_4T__
3338 v5 "-march=armv5 -marm" __ARM_ARCH_5__
3339 v5t "-march=armv5t" __ARM_ARCH_5T__
3340 v5te "-march=armv5te" __ARM_ARCH_5TE__
3341 v6 "-march=armv6" __ARM_ARCH_6__
3342 v6k "-march=armv6k" __ARM_ARCH_6K__
3343 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
3344 v6z "-march=armv6z" __ARM_ARCH_6Z__
3345 v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
3346 v7a "-march=armv7-a" __ARM_ARCH_7A__
3347 v7r "-march=armv7-r" __ARM_ARCH_7R__
3348 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
3349 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
3350 v8a "-march=armv8-a" __ARM_ARCH_8A__
3351 v8_1a "-march=armv8.1a" __ARM_ARCH_8A__ } {
3352 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
3353 proc check_effective_target_arm_arch_FUNC_ok { } {
3354 if { [ string match "*-marm*" "FLAG" ] &&
3355 ![check_effective_target_arm_arm_ok] } {
3358 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
3365 proc add_options_for_arm_arch_FUNC { flags } {
3366 return "$flags FLAG"
3369 proc check_effective_target_arm_arch_FUNC_multilib { } {
3370 return [check_runtime arm_arch_FUNC_multilib {
3376 } [add_options_for_arm_arch_FUNC ""]]
3381 # Same functions as above but for -march=armv7ve. To uniquely identify
3382 # -march=armv7ve we need to check for __ARM_ARCH_7A__ as well as
3383 # __ARM_FEATURE_IDIV otherwise it aliases with armv7-a.
3385 proc check_effective_target_arm_arch_v7ve_ok { } {
3386 if { [ string match "*-marm*" "-march=armv7ve" ] &&
3387 ![check_effective_target_arm_arm_ok] } {
3390 return [check_no_compiler_messages arm_arch_v7ve_ok assembly {
3391 #if !defined (__ARM_ARCH_7A__) || !defined (__ARM_FEATURE_IDIV)
3394 } "-march=armv7ve" ]
3397 proc add_options_for_arm_arch_v7ve { flags } {
3398 return "$flags -march=armv7ve"
3401 # Return 1 if this is an ARM target where -marm causes ARM to be
3404 proc check_effective_target_arm_arm_ok { } {
3405 return [check_no_compiler_messages arm_arm_ok assembly {
3406 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
3407 #error !__arm__ || __thumb__ || __thumb2__
3413 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
3416 proc check_effective_target_arm_thumb1_ok { } {
3417 return [check_no_compiler_messages arm_thumb1_ok assembly {
3418 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3419 #error !__arm__ || !__thumb__ || __thumb2__
3421 int foo (int i) { return i; }
3425 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
3428 proc check_effective_target_arm_thumb2_ok { } {
3429 return [check_no_compiler_messages arm_thumb2_ok assembly {
3430 #if !defined(__thumb2__)
3433 int foo (int i) { return i; }
3437 # Return 1 if this is an ARM target where Thumb-1 is used without options
3438 # added by the test.
3440 proc check_effective_target_arm_thumb1 { } {
3441 return [check_no_compiler_messages arm_thumb1 assembly {
3442 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
3443 #error !__arm__ || !__thumb__ || __thumb2__
3449 # Return 1 if this is an ARM target where Thumb-2 is used without options
3450 # added by the test.
3452 proc check_effective_target_arm_thumb2 { } {
3453 return [check_no_compiler_messages arm_thumb2 assembly {
3454 #if !defined(__thumb2__)
3461 # Return 1 if this is an ARM target where conditional execution is available.
3463 proc check_effective_target_arm_cond_exec { } {
3464 return [check_no_compiler_messages arm_cond_exec assembly {
3465 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
3472 # Return 1 if this is an ARM cortex-M profile cpu
3474 proc check_effective_target_arm_cortex_m { } {
3475 if { ![istarget arm*-*-*] } {
3478 return [check_no_compiler_messages arm_cortex_m assembly {
3479 #if defined(__ARM_ARCH_ISA_ARM)
3480 #error __ARM_ARCH_ISA_ARM is defined
3486 # Return 1 if this compilation turns on string_ops_prefer_neon on.
3488 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
3489 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
3490 int foo (void) { return 0; }
3491 } "-O2 -mprint-tune-info" ]
3494 # Return 1 if the target supports executing NEON instructions, 0
3495 # otherwise. Cache the result.
3497 proc check_effective_target_arm_neon_hw { } {
3498 return [check_runtime arm_neon_hw_available {
3502 long long a = 0, b = 1;
3503 asm ("vorr %P0, %P1, %P2"
3505 : "0" (a), "w" (b));
3508 } [add_options_for_arm_neon ""]]
3511 proc check_effective_target_arm_neonv2_hw { } {
3512 return [check_runtime arm_neon_hwv2_available {
3513 #include "arm_neon.h"
3517 float32x2_t a, b, c;
3518 asm ("vfma.f32 %P0, %P1, %P2"
3520 : "w" (b), "w" (c));
3523 } [add_options_for_arm_neonv2 ""]]
3526 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
3527 # otherwise. The test is valid for AArch64 and ARM. Record the command
3528 # line options needed.
3530 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
3531 global et_arm_v8_1a_neon_flags
3532 set et_arm_v8_1a_neon_flags ""
3534 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
3538 # Iterate through sets of options to find the compiler flags that
3539 # need to be added to the -march option. Start with the empty set
3540 # since AArch64 only needs the -march setting.
3541 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
3542 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3543 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
3544 #if !defined (__ARM_FEATURE_QRDMX)
3545 #error "__ARM_FEATURE_QRDMX not defined"
3547 } "$flags -march=armv8.1-a"] } {
3548 set et_arm_v8_1a_neon_flags "$flags -march=armv8.1-a"
3556 proc check_effective_target_arm_v8_1a_neon_ok { } {
3557 return [check_cached_effective_target arm_v8_1a_neon_ok \
3558 check_effective_target_arm_v8_1a_neon_ok_nocache]
3561 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
3564 proc check_effective_target_arm_v8_neon_hw { } {
3565 return [check_runtime arm_v8_neon_hw_available {
3566 #include "arm_neon.h"
3570 float32x2_t a = { 1.0f, 2.0f };
3571 #ifdef __ARM_ARCH_ISA_A64
3572 asm ("frinta %0.2s, %1.2s"
3576 asm ("vrinta.f32 %P0, %P1"
3580 return a[0] == 2.0f;
3582 } [add_options_for_arm_v8_neon ""]]
3585 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
3586 # otherwise. The test is valid for AArch64 and ARM.
3588 proc check_effective_target_arm_v8_1a_neon_hw { } {
3589 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
3592 return [check_runtime arm_v8_1a_neon_hw_available {
3596 #ifdef __ARM_ARCH_ISA_A64
3597 __Int32x2_t a = {0, 1};
3598 __Int32x2_t b = {0, 2};
3601 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
3604 : /* No clobbers. */);
3608 __simd64_int32_t a = {0, 1};
3609 __simd64_int32_t b = {0, 2};
3610 __simd64_int32_t result;
3612 asm ("vqrdmlah.s32 %P0, %P1, %P2"
3615 : /* No clobbers. */);
3620 } [add_options_for_arm_v8_1a_neon ""]]
3623 # Return 1 if this is a ARM target with NEON enabled.
3625 proc check_effective_target_arm_neon { } {
3626 if { [check_effective_target_arm32] } {
3627 return [check_no_compiler_messages arm_neon object {
3628 #ifndef __ARM_NEON__
3639 proc check_effective_target_arm_neonv2 { } {
3640 if { [check_effective_target_arm32] } {
3641 return [check_no_compiler_messages arm_neon object {
3642 #ifndef __ARM_NEON__
3645 #ifndef __ARM_FEATURE_FMA
3657 # Return 1 if this is an ARM target with load acquire and store release
3658 # instructions for 8-, 16- and 32-bit types.
3660 proc check_effective_target_arm_acq_rel { } {
3661 return [check_no_compiler_messages arm_acq_rel object {
3663 load_acquire_store_release (void)
3665 asm ("lda r0, [r1]\n\t"
3671 : : : "r0", "memory");
3676 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
3677 # the Loongson vector modes.
3679 proc check_effective_target_mips_loongson { } {
3680 return [check_no_compiler_messages loongson assembly {
3681 #if !defined(__mips_loongson_vector_rev)
3682 #error !__mips_loongson_vector_rev
3687 # Return 1 if this is a MIPS target that supports the legacy NAN.
3689 proc check_effective_target_mips_nanlegacy { } {
3690 return [check_no_compiler_messages nanlegacy assembly {
3692 int main () { return 0; }
3696 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
3699 proc check_effective_target_arm_eabi { } {
3700 return [check_no_compiler_messages arm_eabi object {
3701 #ifndef __ARM_EABI__
3709 # Return 1 if this is an ARM target that adheres to the hard-float variant of
3710 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
3712 proc check_effective_target_arm_hf_eabi { } {
3713 return [check_no_compiler_messages arm_hf_eabi object {
3714 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
3715 #error not hard-float EABI
3722 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
3723 # Some multilibs may be incompatible with this option.
3725 proc check_effective_target_arm_iwmmxt_ok { } {
3726 if { [check_effective_target_arm32] } {
3727 return [check_no_compiler_messages arm_iwmmxt_ok object {
3735 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
3736 # for an ARM target.
3737 proc check_effective_target_arm_prefer_ldrd_strd { } {
3738 if { ![check_effective_target_arm32] } {
3742 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
3743 void foo (int *p) { p[0] = 1; p[1] = 0;}
3747 # Return 1 if this is a PowerPC target supporting -meabi.
3749 proc check_effective_target_powerpc_eabi_ok { } {
3750 if { [istarget powerpc*-*-*] } {
3751 return [check_no_compiler_messages powerpc_eabi_ok object {
3759 # Return 1 if this is a PowerPC target with floating-point registers.
3761 proc check_effective_target_powerpc_fprs { } {
3762 if { [istarget powerpc*-*-*]
3763 || [istarget rs6000-*-*] } {
3764 return [check_no_compiler_messages powerpc_fprs object {
3776 # Return 1 if this is a PowerPC target with hardware double-precision
3779 proc check_effective_target_powerpc_hard_double { } {
3780 if { [istarget powerpc*-*-*]
3781 || [istarget rs6000-*-*] } {
3782 return [check_no_compiler_messages powerpc_hard_double object {
3794 # Return 1 if this is a PowerPC target supporting -maltivec.
3796 proc check_effective_target_powerpc_altivec_ok { } {
3797 if { ([istarget powerpc*-*-*]
3798 && ![istarget powerpc-*-linux*paired*])
3799 || [istarget rs6000-*-*] } {
3800 # AltiVec is not supported on AIX before 5.3.
3801 if { [istarget powerpc*-*-aix4*]
3802 || [istarget powerpc*-*-aix5.1*]
3803 || [istarget powerpc*-*-aix5.2*] } {
3806 return [check_no_compiler_messages powerpc_altivec_ok object {
3814 # Return 1 if this is a PowerPC target supporting -mpower8-vector
3816 proc check_effective_target_powerpc_p8vector_ok { } {
3817 if { ([istarget powerpc*-*-*]
3818 && ![istarget powerpc-*-linux*paired*])
3819 || [istarget rs6000-*-*] } {
3820 # AltiVec is not supported on AIX before 5.3.
3821 if { [istarget powerpc*-*-aix4*]
3822 || [istarget powerpc*-*-aix5.1*]
3823 || [istarget powerpc*-*-aix5.2*] } {
3826 return [check_no_compiler_messages powerpc_p8vector_ok object {
3829 asm volatile ("xxlorc vs0,vs0,vs0");
3831 asm volatile ("xxlorc 0,0,0");
3835 } "-mpower8-vector"]
3841 # Return 1 if this is a PowerPC target supporting -mpower9-vector
3843 proc check_effective_target_powerpc_p9vector_ok { } {
3844 if { ([istarget powerpc*-*-*]
3845 && ![istarget powerpc-*-linux*paired*])
3846 || [istarget rs6000-*-*] } {
3847 # AltiVec is not supported on AIX before 5.3.
3848 if { [istarget powerpc*-*-aix4*]
3849 || [istarget powerpc*-*-aix5.1*]
3850 || [istarget powerpc*-*-aix5.2*] } {
3853 return [check_no_compiler_messages powerpc_p9vector_ok object {
3856 vector double v = (vector double) { 0.0, 0.0 };
3857 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
3860 } "-mpower9-vector"]
3866 # Return 1 if this is a PowerPC target supporting -mmodulo
3868 proc check_effective_target_powerpc_p9modulo_ok { } {
3869 if { ([istarget powerpc*-*-*]
3870 && ![istarget powerpc-*-linux*paired*])
3871 || [istarget rs6000-*-*] } {
3872 # AltiVec is not supported on AIX before 5.3.
3873 if { [istarget powerpc*-*-aix4*]
3874 || [istarget powerpc*-*-aix5.1*]
3875 || [istarget powerpc*-*-aix5.2*] } {
3878 return [check_no_compiler_messages powerpc_p9modulo_ok object {
3880 int i = 5, j = 3, r = -1;
3881 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
3890 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
3891 # software emulation on power7/power8 systems or hardware support on power9.
3893 proc check_effective_target_powerpc_float128_sw_ok { } {
3894 if { ([istarget powerpc*-*-*]
3895 && ![istarget powerpc-*-linux*paired*])
3896 || [istarget rs6000-*-*] } {
3897 # AltiVec is not supported on AIX before 5.3.
3898 if { [istarget powerpc*-*-aix4*]
3899 || [istarget powerpc*-*-aix5.1*]
3900 || [istarget powerpc*-*-aix5.2*] } {
3903 return [check_no_compiler_messages powerpc_float128_sw_ok object {
3904 volatile __float128 x = 1.0q;
3905 volatile __float128 y = 2.0q;
3907 __float128 z = x + y;
3910 } "-mfloat128 -mvsx"]
3916 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
3917 # support on power9.
3919 proc check_effective_target_powerpc_float128_hw_ok { } {
3920 if { ([istarget powerpc*-*-*]
3921 && ![istarget powerpc-*-linux*paired*])
3922 || [istarget rs6000-*-*] } {
3923 # AltiVec is not supported on AIX before 5.3.
3924 if { [istarget powerpc*-*-aix4*]
3925 || [istarget powerpc*-*-aix5.1*]
3926 || [istarget powerpc*-*-aix5.2*] } {
3929 return [check_no_compiler_messages powerpc_float128_hw_ok object {
3930 volatile __float128 x = 1.0q;
3931 volatile __float128 y = 2.0q;
3934 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
3937 } "-mfloat128-hardware"]
3943 # Return 1 if this is a PowerPC target supporting -mvsx
3945 proc check_effective_target_powerpc_vsx_ok { } {
3946 if { ([istarget powerpc*-*-*]
3947 && ![istarget powerpc-*-linux*paired*])
3948 || [istarget rs6000-*-*] } {
3949 # VSX is not supported on AIX before 7.1.
3950 if { [istarget powerpc*-*-aix4*]
3951 || [istarget powerpc*-*-aix5*]
3952 || [istarget powerpc*-*-aix6*] } {
3955 return [check_no_compiler_messages powerpc_vsx_ok object {
3958 asm volatile ("xxlor vs0,vs0,vs0");
3960 asm volatile ("xxlor 0,0,0");
3970 # Return 1 if this is a PowerPC target supporting -mhtm
3972 proc check_effective_target_powerpc_htm_ok { } {
3973 if { ([istarget powerpc*-*-*]
3974 && ![istarget powerpc-*-linux*paired*])
3975 || [istarget rs6000-*-*] } {
3976 # HTM is not supported on AIX yet.
3977 if { [istarget powerpc*-*-aix*] } {
3980 return [check_no_compiler_messages powerpc_htm_ok object {
3982 asm volatile ("tbegin. 0");
3991 # Return 1 if the target supports executing HTM hardware instructions,
3992 # 0 otherwise. Cache the result.
3994 proc check_htm_hw_available { } {
3995 return [check_cached_effective_target htm_hw_available {
3996 # For now, disable on Darwin
3997 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
4000 check_runtime_nocache htm_hw_available {
4010 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
4012 proc check_effective_target_powerpc_ppu_ok { } {
4013 if [check_effective_target_powerpc_altivec_ok] {
4014 return [check_no_compiler_messages cell_asm_available object {
4017 asm volatile ("lvlx v0,v0,v0");
4019 asm volatile ("lvlx 0,0,0");
4029 # Return 1 if this is a PowerPC target that supports SPU.
4031 proc check_effective_target_powerpc_spu { } {
4032 if { [istarget powerpc*-*-linux*] } {
4033 return [check_effective_target_powerpc_altivec_ok]
4039 # Return 1 if this is a PowerPC SPE target. The check includes options
4040 # specified by dg-options for this test, so don't cache the result.
4042 proc check_effective_target_powerpc_spe_nocache { } {
4043 if { [istarget powerpc*-*-*] } {
4044 return [check_no_compiler_messages_nocache powerpc_spe object {
4050 } [current_compiler_flags]]
4056 # Return 1 if this is a PowerPC target with SPE enabled.
4058 proc check_effective_target_powerpc_spe { } {
4059 if { [istarget powerpc*-*-*] } {
4060 return [check_no_compiler_messages powerpc_spe object {
4072 # Return 1 if this is a PowerPC target with Altivec enabled.
4074 proc check_effective_target_powerpc_altivec { } {
4075 if { [istarget powerpc*-*-*] } {
4076 return [check_no_compiler_messages powerpc_altivec object {
4088 # Return 1 if this is a PowerPC 405 target. The check includes options
4089 # specified by dg-options for this test, so don't cache the result.
4091 proc check_effective_target_powerpc_405_nocache { } {
4092 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
4093 return [check_no_compiler_messages_nocache powerpc_405 object {
4099 } [current_compiler_flags]]
4105 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
4107 proc check_effective_target_powerpc_elfv2 { } {
4108 if { [istarget powerpc*-*-*] } {
4109 return [check_no_compiler_messages powerpc_elfv2 object {
4111 #error not ELF v2 ABI
4121 # Return 1 if this is a SPU target with a toolchain that
4122 # supports automatic overlay generation.
4124 proc check_effective_target_spu_auto_overlay { } {
4125 if { [istarget spu*-*-elf*] } {
4126 return [check_no_compiler_messages spu_auto_overlay executable {
4128 } "-Wl,--auto-overlay" ]
4134 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
4135 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
4136 # test environment appears to run executables on such a simulator.
4138 proc check_effective_target_ultrasparc_hw { } {
4139 return [check_runtime ultrasparc_hw {
4140 int main() { return 0; }
4141 } "-mcpu=ultrasparc"]
4144 # Return 1 if the test environment supports executing UltraSPARC VIS2
4145 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
4147 proc check_effective_target_ultrasparc_vis2_hw { } {
4148 return [check_runtime ultrasparc_vis2_hw {
4149 int main() { __asm__(".word 0x81b00320"); return 0; }
4150 } "-mcpu=ultrasparc3"]
4153 # Return 1 if the test environment supports executing UltraSPARC VIS3
4154 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
4156 proc check_effective_target_ultrasparc_vis3_hw { } {
4157 return [check_runtime ultrasparc_vis3_hw {
4158 int main() { __asm__(".word 0x81b00220"); return 0; }
4162 # Return 1 if this is a SPARC-V9 target.
4164 proc check_effective_target_sparc_v9 { } {
4165 if { [istarget sparc*-*-*] } {
4166 return [check_no_compiler_messages sparc_v9 object {
4168 asm volatile ("return %i7+8");
4177 # Return 1 if this is a SPARC target with VIS enabled.
4179 proc check_effective_target_sparc_vis { } {
4180 if { [istarget sparc*-*-*] } {
4181 return [check_no_compiler_messages sparc_vis object {
4193 # Return 1 if the target supports hardware vector shift operation.
4195 proc check_effective_target_vect_shift { } {
4196 global et_vect_shift_saved
4198 if [info exists et_vect_shift_saved] {
4199 verbose "check_effective_target_vect_shift: using cached result" 2
4201 set et_vect_shift_saved 0
4202 if { ([istarget powerpc*-*-*]
4203 && ![istarget powerpc-*-linux*paired*])
4204 || [istarget ia64-*-*]
4205 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4206 || [istarget aarch64*-*-*]
4207 || [check_effective_target_arm32]
4208 || ([istarget mips*-*-*]
4209 && [check_effective_target_mips_loongson]) } {
4210 set et_vect_shift_saved 1
4214 verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
4215 return $et_vect_shift_saved
4218 proc check_effective_target_whole_vector_shift { } {
4219 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4220 || [istarget ia64-*-*]
4221 || [istarget aarch64*-*-*]
4222 || [istarget powerpc64*-*-*]
4223 || ([check_effective_target_arm32]
4224 && [check_effective_target_arm_little_endian])
4225 || ([istarget mips*-*-*]
4226 && [check_effective_target_mips_loongson]) } {
4232 verbose "check_effective_target_vect_long: returning $answer" 2
4236 # Return 1 if the target supports vector bswap operations.
4238 proc check_effective_target_vect_bswap { } {
4239 global et_vect_bswap_saved
4241 if [info exists et_vect_bswap_saved] {
4242 verbose "check_effective_target_vect_bswap: using cached result" 2
4244 set et_vect_bswap_saved 0
4245 if { [istarget aarch64*-*-*]
4246 || ([istarget arm*-*-*]
4247 && [check_effective_target_arm_neon])
4249 set et_vect_bswap_saved 1
4253 verbose "check_effective_target_vect_bswap: returning $et_vect_bswap_saved" 2
4254 return $et_vect_bswap_saved
4257 # Return 1 if the target supports hardware vector shift operation for char.
4259 proc check_effective_target_vect_shift_char { } {
4260 global et_vect_shift_char_saved
4262 if [info exists et_vect_shift_char_saved] {
4263 verbose "check_effective_target_vect_shift_char: using cached result" 2
4265 set et_vect_shift_char_saved 0
4266 if { ([istarget powerpc*-*-*]
4267 && ![istarget powerpc-*-linux*paired*])
4268 || [check_effective_target_arm32] } {
4269 set et_vect_shift_char_saved 1
4273 verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
4274 return $et_vect_shift_char_saved
4277 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
4279 # This can change for different subtargets so do not cache the result.
4281 proc check_effective_target_vect_long { } {
4282 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4283 || (([istarget powerpc*-*-*]
4284 && ![istarget powerpc-*-linux*paired*])
4285 && [check_effective_target_ilp32])
4286 || [check_effective_target_arm32]
4287 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
4288 || [istarget aarch64*-*-*] } {
4294 verbose "check_effective_target_vect_long: returning $answer" 2
4298 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
4300 # This won't change for different subtargets so cache the result.
4302 proc check_effective_target_vect_float { } {
4303 global et_vect_float_saved
4305 if [info exists et_vect_float_saved] {
4306 verbose "check_effective_target_vect_float: using cached result" 2
4308 set et_vect_float_saved 0
4309 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4310 || [istarget powerpc*-*-*]
4311 || [istarget spu-*-*]
4312 || [istarget mips-sde-elf]
4313 || [istarget mipsisa64*-*-*]
4314 || [istarget ia64-*-*]
4315 || [istarget aarch64*-*-*]
4316 || [check_effective_target_arm32] } {
4317 set et_vect_float_saved 1
4321 verbose "check_effective_target_vect_float: returning $et_vect_float_saved" 2
4322 return $et_vect_float_saved
4325 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
4327 # This won't change for different subtargets so cache the result.
4329 proc check_effective_target_vect_double { } {
4330 global et_vect_double_saved
4332 if [info exists et_vect_double_saved] {
4333 verbose "check_effective_target_vect_double: using cached result" 2
4335 set et_vect_double_saved 0
4336 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4337 || [istarget aarch64*-*-*] } {
4338 if { [check_no_compiler_messages vect_double assembly {
4339 #ifdef __tune_atom__
4340 # error No double vectorizer support.
4343 set et_vect_double_saved 1
4345 set et_vect_double_saved 0
4347 } elseif { [istarget spu-*-*] } {
4348 set et_vect_double_saved 1
4349 } elseif { [istarget powerpc*-*-*] && [check_vsx_hw_available] } {
4350 set et_vect_double_saved 1
4354 verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
4355 return $et_vect_double_saved
4358 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
4360 # This won't change for different subtargets so cache the result.
4362 proc check_effective_target_vect_long_long { } {
4363 global et_vect_long_long_saved
4365 if [info exists et_vect_long_long_saved] {
4366 verbose "check_effective_target_vect_long_long: using cached result" 2
4368 set et_vect_long_long_saved 0
4369 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4370 set et_vect_long_long_saved 1
4374 verbose "check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
4375 return $et_vect_long_long_saved
4379 # Return 1 if the target plus current options does not support a vector
4380 # max instruction on "int", 0 otherwise.
4382 # This won't change for different subtargets so cache the result.
4384 proc check_effective_target_vect_no_int_min_max { } {
4385 global et_vect_no_int_min_max_saved
4387 if [info exists et_vect_no_int_min_max_saved] {
4388 verbose "check_effective_target_vect_no_int_min_max: using cached result" 2
4390 set et_vect_no_int_min_max_saved 0
4391 if { [istarget sparc*-*-*]
4392 || [istarget spu-*-*]
4393 || [istarget alpha*-*-*]
4394 || ([istarget mips*-*-*]
4395 && [check_effective_target_mips_loongson]) } {
4396 set et_vect_no_int_min_max_saved 1
4399 verbose "check_effective_target_vect_no_int_min_max: returning $et_vect_no_int_min_max_saved" 2
4400 return $et_vect_no_int_min_max_saved
4403 # Return 1 if the target plus current options does not support a vector
4404 # add instruction on "int", 0 otherwise.
4406 # This won't change for different subtargets so cache the result.
4408 proc check_effective_target_vect_no_int_add { } {
4409 global et_vect_no_int_add_saved
4411 if [info exists et_vect_no_int_add_saved] {
4412 verbose "check_effective_target_vect_no_int_add: using cached result" 2
4414 set et_vect_no_int_add_saved 0
4415 # Alpha only supports vector add on V8QI and V4HI.
4416 if { [istarget alpha*-*-*] } {
4417 set et_vect_no_int_add_saved 1
4420 verbose "check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
4421 return $et_vect_no_int_add_saved
4424 # Return 1 if the target plus current options does not support vector
4425 # bitwise instructions, 0 otherwise.
4427 # This won't change for different subtargets so cache the result.
4429 proc check_effective_target_vect_no_bitwise { } {
4430 global et_vect_no_bitwise_saved
4432 if [info exists et_vect_no_bitwise_saved] {
4433 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
4435 set et_vect_no_bitwise_saved 0
4437 verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
4438 return $et_vect_no_bitwise_saved
4441 # Return 1 if the target plus current options supports vector permutation,
4444 # This won't change for different subtargets so cache the result.
4446 proc check_effective_target_vect_perm { } {
4449 if [info exists et_vect_perm_saved] {
4450 verbose "check_effective_target_vect_perm: using cached result" 2
4452 set et_vect_perm_saved 0
4453 if { [is-effective-target arm_neon_ok]
4454 || [istarget aarch64*-*-*]
4455 || [istarget powerpc*-*-*]
4456 || [istarget spu-*-*]
4457 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4458 || ([istarget mips*-*-*]
4459 && [check_effective_target_mpaired_single]) } {
4460 set et_vect_perm_saved 1
4463 verbose "check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
4464 return $et_vect_perm_saved
4467 # Return 1 if the target plus current options supports vector permutation
4468 # on byte-sized elements, 0 otherwise.
4470 # This won't change for different subtargets so cache the result.
4472 proc check_effective_target_vect_perm_byte { } {
4473 global et_vect_perm_byte
4475 if [info exists et_vect_perm_byte_saved] {
4476 verbose "check_effective_target_vect_perm_byte: using cached result" 2
4478 set et_vect_perm_byte_saved 0
4479 if { ([is-effective-target arm_neon_ok]
4480 && [is-effective-target arm_little_endian])
4481 || ([istarget aarch64*-*-*]
4482 && [is-effective-target aarch64_little_endian])
4483 || [istarget powerpc*-*-*]
4484 || [istarget spu-*-*] } {
4485 set et_vect_perm_byte_saved 1
4488 verbose "check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
4489 return $et_vect_perm_byte_saved
4492 # Return 1 if the target plus current options supports vector permutation
4493 # on short-sized elements, 0 otherwise.
4495 # This won't change for different subtargets so cache the result.
4497 proc check_effective_target_vect_perm_short { } {
4498 global et_vect_perm_short
4500 if [info exists et_vect_perm_short_saved] {
4501 verbose "check_effective_target_vect_perm_short: using cached result" 2
4503 set et_vect_perm_short_saved 0
4504 if { ([is-effective-target arm_neon_ok]
4505 && [is-effective-target arm_little_endian])
4506 || ([istarget aarch64*-*-*]
4507 && [is-effective-target aarch64_little_endian])
4508 || [istarget powerpc*-*-*]
4509 || [istarget spu-*-*] } {
4510 set et_vect_perm_short_saved 1
4513 verbose "check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
4514 return $et_vect_perm_short_saved
4517 # Return 1 if the target plus current options supports a vector
4518 # widening summation of *short* args into *int* result, 0 otherwise.
4520 # This won't change for different subtargets so cache the result.
4522 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
4523 global et_vect_widen_sum_hi_to_si_pattern
4525 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved] {
4526 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
4528 set et_vect_widen_sum_hi_to_si_pattern_saved 0
4529 if { [istarget powerpc*-*-*]
4530 || [istarget aarch64*-*-*]
4531 || ([istarget arm*-*-*] &&
4532 [check_effective_target_arm_neon_ok])
4533 || [istarget ia64-*-*] } {
4534 set et_vect_widen_sum_hi_to_si_pattern_saved 1
4537 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
4538 return $et_vect_widen_sum_hi_to_si_pattern_saved
4541 # Return 1 if the target plus current options supports a vector
4542 # widening summation of *short* args into *int* result, 0 otherwise.
4543 # A target can also support this widening summation if it can support
4544 # promotion (unpacking) from shorts to ints.
4546 # This won't change for different subtargets so cache the result.
4548 proc check_effective_target_vect_widen_sum_hi_to_si { } {
4549 global et_vect_widen_sum_hi_to_si
4551 if [info exists et_vect_widen_sum_hi_to_si_saved] {
4552 verbose "check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
4554 set et_vect_widen_sum_hi_to_si_saved [check_effective_target_vect_unpack]
4555 if { [istarget powerpc*-*-*]
4556 || [istarget ia64-*-*] } {
4557 set et_vect_widen_sum_hi_to_si_saved 1
4560 verbose "check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
4561 return $et_vect_widen_sum_hi_to_si_saved
4564 # Return 1 if the target plus current options supports a vector
4565 # widening summation of *char* args into *short* result, 0 otherwise.
4566 # A target can also support this widening summation if it can support
4567 # promotion (unpacking) from chars to shorts.
4569 # This won't change for different subtargets so cache the result.
4571 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
4572 global et_vect_widen_sum_qi_to_hi
4574 if [info exists et_vect_widen_sum_qi_to_hi_saved] {
4575 verbose "check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
4577 set et_vect_widen_sum_qi_to_hi_saved 0
4578 if { [check_effective_target_vect_unpack]
4579 || [check_effective_target_arm_neon_ok]
4580 || [istarget ia64-*-*] } {
4581 set et_vect_widen_sum_qi_to_hi_saved 1
4584 verbose "check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
4585 return $et_vect_widen_sum_qi_to_hi_saved
4588 # Return 1 if the target plus current options supports a vector
4589 # widening summation of *char* args into *int* result, 0 otherwise.
4591 # This won't change for different subtargets so cache the result.
4593 proc check_effective_target_vect_widen_sum_qi_to_si { } {
4594 global et_vect_widen_sum_qi_to_si
4596 if [info exists et_vect_widen_sum_qi_to_si_saved] {
4597 verbose "check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
4599 set et_vect_widen_sum_qi_to_si_saved 0
4600 if { [istarget powerpc*-*-*] } {
4601 set et_vect_widen_sum_qi_to_si_saved 1
4604 verbose "check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
4605 return $et_vect_widen_sum_qi_to_si_saved
4608 # Return 1 if the target plus current options supports a vector
4609 # widening multiplication of *char* args into *short* result, 0 otherwise.
4610 # A target can also support this widening multplication if it can support
4611 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
4612 # multiplication of shorts).
4614 # This won't change for different subtargets so cache the result.
4617 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
4618 global et_vect_widen_mult_qi_to_hi
4620 if [info exists et_vect_widen_mult_qi_to_hi_saved] {
4621 verbose "check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
4623 if { [check_effective_target_vect_unpack]
4624 && [check_effective_target_vect_short_mult] } {
4625 set et_vect_widen_mult_qi_to_hi_saved 1
4627 set et_vect_widen_mult_qi_to_hi_saved 0
4629 if { [istarget powerpc*-*-*]
4630 || [istarget aarch64*-*-*]
4631 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4632 set et_vect_widen_mult_qi_to_hi_saved 1
4635 verbose "check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
4636 return $et_vect_widen_mult_qi_to_hi_saved
4639 # Return 1 if the target plus current options supports a vector
4640 # widening multiplication of *short* args into *int* result, 0 otherwise.
4641 # A target can also support this widening multplication if it can support
4642 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
4643 # multiplication of ints).
4645 # This won't change for different subtargets so cache the result.
4648 proc check_effective_target_vect_widen_mult_hi_to_si { } {
4649 global et_vect_widen_mult_hi_to_si
4651 if [info exists et_vect_widen_mult_hi_to_si_saved] {
4652 verbose "check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
4654 if { [check_effective_target_vect_unpack]
4655 && [check_effective_target_vect_int_mult] } {
4656 set et_vect_widen_mult_hi_to_si_saved 1
4658 set et_vect_widen_mult_hi_to_si_saved 0
4660 if { [istarget powerpc*-*-*]
4661 || [istarget spu-*-*]
4662 || [istarget ia64-*-*]
4663 || [istarget aarch64*-*-*]
4664 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4665 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4666 set et_vect_widen_mult_hi_to_si_saved 1
4669 verbose "check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
4670 return $et_vect_widen_mult_hi_to_si_saved
4673 # Return 1 if the target plus current options supports a vector
4674 # widening multiplication of *char* args into *short* result, 0 otherwise.
4676 # This won't change for different subtargets so cache the result.
4678 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
4679 global et_vect_widen_mult_qi_to_hi_pattern
4681 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] {
4682 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
4684 set et_vect_widen_mult_qi_to_hi_pattern_saved 0
4685 if { [istarget powerpc*-*-*]
4686 || ([istarget arm*-*-*]
4687 && [check_effective_target_arm_neon_ok]
4688 && [check_effective_target_arm_little_endian]) } {
4689 set et_vect_widen_mult_qi_to_hi_pattern_saved 1
4692 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
4693 return $et_vect_widen_mult_qi_to_hi_pattern_saved
4696 # Return 1 if the target plus current options supports a vector
4697 # widening multiplication of *short* args into *int* result, 0 otherwise.
4699 # This won't change for different subtargets so cache the result.
4701 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
4702 global et_vect_widen_mult_hi_to_si_pattern
4704 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved] {
4705 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
4707 set et_vect_widen_mult_hi_to_si_pattern_saved 0
4708 if { [istarget powerpc*-*-*]
4709 || [istarget spu-*-*]
4710 || [istarget ia64-*-*]
4711 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4712 || ([istarget arm*-*-*]
4713 && [check_effective_target_arm_neon_ok]
4714 && [check_effective_target_arm_little_endian]) } {
4715 set et_vect_widen_mult_hi_to_si_pattern_saved 1
4718 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
4719 return $et_vect_widen_mult_hi_to_si_pattern_saved
4722 # Return 1 if the target plus current options supports a vector
4723 # widening multiplication of *int* args into *long* result, 0 otherwise.
4725 # This won't change for different subtargets so cache the result.
4727 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
4728 global et_vect_widen_mult_si_to_di_pattern
4730 if [info exists et_vect_widen_mult_si_to_di_pattern_saved] {
4731 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: using cached result" 2
4733 set et_vect_widen_mult_si_to_di_pattern_saved 0
4734 if {[istarget ia64-*-*]
4735 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4736 set et_vect_widen_mult_si_to_di_pattern_saved 1
4739 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: returning $et_vect_widen_mult_si_to_di_pattern_saved" 2
4740 return $et_vect_widen_mult_si_to_di_pattern_saved
4743 # Return 1 if the target plus current options supports a vector
4744 # widening shift, 0 otherwise.
4746 # This won't change for different subtargets so cache the result.
4748 proc check_effective_target_vect_widen_shift { } {
4749 global et_vect_widen_shift_saved
4751 if [info exists et_vect_shift_saved] {
4752 verbose "check_effective_target_vect_widen_shift: using cached result" 2
4754 set et_vect_widen_shift_saved 0
4755 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4756 set et_vect_widen_shift_saved 1
4759 verbose "check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2
4760 return $et_vect_widen_shift_saved
4763 # Return 1 if the target plus current options supports a vector
4764 # dot-product of signed chars, 0 otherwise.
4766 # This won't change for different subtargets so cache the result.
4768 proc check_effective_target_vect_sdot_qi { } {
4769 global et_vect_sdot_qi
4771 if [info exists et_vect_sdot_qi_saved] {
4772 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
4774 set et_vect_sdot_qi_saved 0
4775 if { [istarget ia64-*-*] } {
4776 set et_vect_udot_qi_saved 1
4779 verbose "check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
4780 return $et_vect_sdot_qi_saved
4783 # Return 1 if the target plus current options supports a vector
4784 # dot-product of unsigned chars, 0 otherwise.
4786 # This won't change for different subtargets so cache the result.
4788 proc check_effective_target_vect_udot_qi { } {
4789 global et_vect_udot_qi
4791 if [info exists et_vect_udot_qi_saved] {
4792 verbose "check_effective_target_vect_udot_qi: using cached result" 2
4794 set et_vect_udot_qi_saved 0
4795 if { [istarget powerpc*-*-*]
4796 || [istarget ia64-*-*] } {
4797 set et_vect_udot_qi_saved 1
4800 verbose "check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
4801 return $et_vect_udot_qi_saved
4804 # Return 1 if the target plus current options supports a vector
4805 # dot-product of signed shorts, 0 otherwise.
4807 # This won't change for different subtargets so cache the result.
4809 proc check_effective_target_vect_sdot_hi { } {
4810 global et_vect_sdot_hi
4812 if [info exists et_vect_sdot_hi_saved] {
4813 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
4815 set et_vect_sdot_hi_saved 0
4816 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4817 || [istarget ia64-*-*]
4818 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
4819 set et_vect_sdot_hi_saved 1
4822 verbose "check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
4823 return $et_vect_sdot_hi_saved
4826 # Return 1 if the target plus current options supports a vector
4827 # dot-product of unsigned shorts, 0 otherwise.
4829 # This won't change for different subtargets so cache the result.
4831 proc check_effective_target_vect_udot_hi { } {
4832 global et_vect_udot_hi
4834 if [info exists et_vect_udot_hi_saved] {
4835 verbose "check_effective_target_vect_udot_hi: using cached result" 2
4837 set et_vect_udot_hi_saved 0
4838 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) } {
4839 set et_vect_udot_hi_saved 1
4842 verbose "check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
4843 return $et_vect_udot_hi_saved
4846 # Return 1 if the target plus current options supports a vector
4847 # sad operation of unsigned chars, 0 otherwise.
4849 # This won't change for different subtargets so cache the result.
4851 proc check_effective_target_vect_usad_char { } {
4852 global et_vect_usad_char
4854 if [info exists et_vect_usad_char_saved] {
4855 verbose "check_effective_target_vect_usad_char: using cached result" 2
4857 set et_vect_usad_char_saved 0
4858 if { ([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
4859 set et_vect_usad_char_saved 1
4862 verbose "check_effective_target_vect_usad_char: returning $et_vect_usad_char_saved" 2
4863 return $et_vect_usad_char_saved
4866 # Return 1 if the target plus current options supports a vector
4867 # demotion (packing) of shorts (to chars) and ints (to shorts)
4868 # using modulo arithmetic, 0 otherwise.
4870 # This won't change for different subtargets so cache the result.
4872 proc check_effective_target_vect_pack_trunc { } {
4873 global et_vect_pack_trunc
4875 if [info exists et_vect_pack_trunc_saved] {
4876 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
4878 set et_vect_pack_trunc_saved 0
4879 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4880 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4881 || [istarget aarch64*-*-*]
4882 || [istarget spu-*-*]
4883 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4884 && [check_effective_target_arm_little_endian]) } {
4885 set et_vect_pack_trunc_saved 1
4888 verbose "check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
4889 return $et_vect_pack_trunc_saved
4892 # Return 1 if the target plus current options supports a vector
4893 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
4895 # This won't change for different subtargets so cache the result.
4897 proc check_effective_target_vect_unpack { } {
4898 global et_vect_unpack
4900 if [info exists et_vect_unpack_saved] {
4901 verbose "check_effective_target_vect_unpack: using cached result" 2
4903 set et_vect_unpack_saved 0
4904 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
4905 || [istarget i?86-*-*] || [istarget x86_64-*-*]
4906 || [istarget spu-*-*]
4907 || [istarget ia64-*-*]
4908 || [istarget aarch64*-*-*]
4909 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
4910 && [check_effective_target_arm_little_endian]) } {
4911 set et_vect_unpack_saved 1
4914 verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
4915 return $et_vect_unpack_saved
4918 # Return 1 if the target plus current options does not guarantee
4919 # that its STACK_BOUNDARY is >= the reguired vector alignment.
4921 # This won't change for different subtargets so cache the result.
4923 proc check_effective_target_unaligned_stack { } {
4924 global et_unaligned_stack_saved
4926 if [info exists et_unaligned_stack_saved] {
4927 verbose "check_effective_target_unaligned_stack: using cached result" 2
4929 set et_unaligned_stack_saved 0
4931 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
4932 return $et_unaligned_stack_saved
4935 # Return 1 if the target plus current options does not support a vector
4936 # alignment mechanism, 0 otherwise.
4938 # This won't change for different subtargets so cache the result.
4940 proc check_effective_target_vect_no_align { } {
4941 global et_vect_no_align_saved
4943 if [info exists et_vect_no_align_saved] {
4944 verbose "check_effective_target_vect_no_align: using cached result" 2
4946 set et_vect_no_align_saved 0
4947 if { [istarget mipsisa64*-*-*]
4948 || [istarget mips-sde-elf]
4949 || [istarget sparc*-*-*]
4950 || [istarget ia64-*-*]
4951 || [check_effective_target_arm_vect_no_misalign]
4952 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4953 || ([istarget mips*-*-*]
4954 && [check_effective_target_mips_loongson]) } {
4955 set et_vect_no_align_saved 1
4958 verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
4959 return $et_vect_no_align_saved
4962 # Return 1 if the target supports a vector misalign access, 0 otherwise.
4964 # This won't change for different subtargets so cache the result.
4966 proc check_effective_target_vect_hw_misalign { } {
4967 global et_vect_hw_misalign_saved
4969 if [info exists et_vect_hw_misalign_saved] {
4970 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
4972 set et_vect_hw_misalign_saved 0
4973 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
4974 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
4975 || [istarget aarch64*-*-*] } {
4976 set et_vect_hw_misalign_saved 1
4979 verbose "check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
4980 return $et_vect_hw_misalign_saved
4984 # Return 1 if arrays are aligned to the vector alignment
4985 # boundary, 0 otherwise.
4987 # This won't change for different subtargets so cache the result.
4989 proc check_effective_target_vect_aligned_arrays { } {
4990 global et_vect_aligned_arrays
4992 if [info exists et_vect_aligned_arrays_saved] {
4993 verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
4995 set et_vect_aligned_arrays_saved 0
4996 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4997 if { ([is-effective-target lp64]
4998 && ( ![check_avx_available]
4999 || [check_prefer_avx128])) } {
5000 set et_vect_aligned_arrays_saved 1
5003 if [istarget spu-*-*] {
5004 set et_vect_aligned_arrays_saved 1
5007 verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
5008 return $et_vect_aligned_arrays_saved
5011 # Return 1 if types of size 32 bit or less are naturally aligned
5012 # (aligned to their type-size), 0 otherwise.
5014 # This won't change for different subtargets so cache the result.
5016 proc check_effective_target_natural_alignment_32 { } {
5017 global et_natural_alignment_32
5019 if [info exists et_natural_alignment_32_saved] {
5020 verbose "check_effective_target_natural_alignment_32: using cached result" 2
5022 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
5023 set et_natural_alignment_32_saved 1
5024 if { ([istarget *-*-darwin*] && [is-effective-target lp64]) } {
5025 set et_natural_alignment_32_saved 0
5028 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
5029 return $et_natural_alignment_32_saved
5032 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
5033 # type-size), 0 otherwise.
5035 # This won't change for different subtargets so cache the result.
5037 proc check_effective_target_natural_alignment_64 { } {
5038 global et_natural_alignment_64
5040 if [info exists et_natural_alignment_64_saved] {
5041 verbose "check_effective_target_natural_alignment_64: using cached result" 2
5043 set et_natural_alignment_64_saved 0
5044 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
5045 || [istarget spu-*-*] } {
5046 set et_natural_alignment_64_saved 1
5049 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
5050 return $et_natural_alignment_64_saved
5053 # Return 1 if all vector types are naturally aligned (aligned to their
5054 # type-size), 0 otherwise.
5056 # This won't change for different subtargets so cache the result.
5058 proc check_effective_target_vect_natural_alignment { } {
5059 global et_vect_natural_alignment
5061 if [info exists et_vect_natural_alignment_saved] {
5062 verbose "check_effective_target_vect_natural_alignment: using cached result" 2
5064 set et_vect_natural_alignment_saved 1
5065 if { [check_effective_target_arm_eabi]
5066 || [istarget nvptx-*-*]
5067 || [istarget s390*-*-*] } {
5068 set et_vect_natural_alignment_saved 0
5071 verbose "check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2
5072 return $et_vect_natural_alignment_saved
5075 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
5077 # This won't change for different subtargets so cache the result.
5079 proc check_effective_target_vector_alignment_reachable { } {
5080 global et_vector_alignment_reachable
5082 if [info exists et_vector_alignment_reachable_saved] {
5083 verbose "check_effective_target_vector_alignment_reachable: using cached result" 2
5085 if { [check_effective_target_vect_aligned_arrays]
5086 || [check_effective_target_natural_alignment_32] } {
5087 set et_vector_alignment_reachable_saved 1
5089 set et_vector_alignment_reachable_saved 0
5092 verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
5093 return $et_vector_alignment_reachable_saved
5096 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
5098 # This won't change for different subtargets so cache the result.
5100 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
5101 global et_vector_alignment_reachable_for_64bit
5103 if [info exists et_vector_alignment_reachable_for_64bit_saved] {
5104 verbose "check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
5106 if { [check_effective_target_vect_aligned_arrays]
5107 || [check_effective_target_natural_alignment_64] } {
5108 set et_vector_alignment_reachable_for_64bit_saved 1
5110 set et_vector_alignment_reachable_for_64bit_saved 0
5113 verbose "check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
5114 return $et_vector_alignment_reachable_for_64bit_saved
5117 # Return 1 if the target only requires element alignment for vector accesses
5119 proc check_effective_target_vect_element_align { } {
5120 global et_vect_element_align
5122 if [info exists et_vect_element_align] {
5123 verbose "check_effective_target_vect_element_align: using cached result" 2
5125 set et_vect_element_align 0
5126 if { ([istarget arm*-*-*]
5127 && ![check_effective_target_arm_vect_no_misalign])
5128 || [check_effective_target_vect_hw_misalign] } {
5129 set et_vect_element_align 1
5133 verbose "check_effective_target_vect_element_align: returning $et_vect_element_align" 2
5134 return $et_vect_element_align
5137 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
5139 proc check_effective_target_vect_load_lanes { } {
5140 global et_vect_load_lanes
5142 if [info exists et_vect_load_lanes] {
5143 verbose "check_effective_target_vect_load_lanes: using cached result" 2
5145 set et_vect_load_lanes 0
5146 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
5147 || [istarget aarch64*-*-*] } {
5148 set et_vect_load_lanes 1
5152 verbose "check_effective_target_vect_load_lanes: returning $et_vect_load_lanes" 2
5153 return $et_vect_load_lanes
5156 # Return 1 if the target supports vector conditional operations, 0 otherwise.
5158 proc check_effective_target_vect_condition { } {
5159 global et_vect_cond_saved
5161 if [info exists et_vect_cond_saved] {
5162 verbose "check_effective_target_vect_cond: using cached result" 2
5164 set et_vect_cond_saved 0
5165 if { [istarget aarch64*-*-*]
5166 || [istarget powerpc*-*-*]
5167 || [istarget ia64-*-*]
5168 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5169 || [istarget spu-*-*]
5170 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
5171 set et_vect_cond_saved 1
5175 verbose "check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
5176 return $et_vect_cond_saved
5179 # Return 1 if the target supports vector conditional operations where
5180 # the comparison has different type from the lhs, 0 otherwise.
5182 proc check_effective_target_vect_cond_mixed { } {
5183 global et_vect_cond_mixed_saved
5185 if [info exists et_vect_cond_mixed_saved] {
5186 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
5188 set et_vect_cond_mixed_saved 0
5189 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5190 || [istarget powerpc*-*-*] } {
5191 set et_vect_cond_mixed_saved 1
5195 verbose "check_effective_target_vect_cond_mixed: returning $et_vect_cond_mixed_saved" 2
5196 return $et_vect_cond_mixed_saved
5199 # Return 1 if the target supports vector char multiplication, 0 otherwise.
5201 proc check_effective_target_vect_char_mult { } {
5202 global et_vect_char_mult_saved
5204 if [info exists et_vect_char_mult_saved] {
5205 verbose "check_effective_target_vect_char_mult: using cached result" 2
5207 set et_vect_char_mult_saved 0
5208 if { [istarget aarch64*-*-*]
5209 || [istarget ia64-*-*]
5210 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5211 || [check_effective_target_arm32]
5212 || [check_effective_target_powerpc_altivec] } {
5213 set et_vect_char_mult_saved 1
5217 verbose "check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
5218 return $et_vect_char_mult_saved
5221 # Return 1 if the target supports vector short multiplication, 0 otherwise.
5223 proc check_effective_target_vect_short_mult { } {
5224 global et_vect_short_mult_saved
5226 if [info exists et_vect_short_mult_saved] {
5227 verbose "check_effective_target_vect_short_mult: using cached result" 2
5229 set et_vect_short_mult_saved 0
5230 if { [istarget ia64-*-*]
5231 || [istarget spu-*-*]
5232 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5233 || [istarget powerpc*-*-*]
5234 || [istarget aarch64*-*-*]
5235 || [check_effective_target_arm32]
5236 || ([istarget mips*-*-*]
5237 && [check_effective_target_mips_loongson]) } {
5238 set et_vect_short_mult_saved 1
5242 verbose "check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
5243 return $et_vect_short_mult_saved
5246 # Return 1 if the target supports vector int multiplication, 0 otherwise.
5248 proc check_effective_target_vect_int_mult { } {
5249 global et_vect_int_mult_saved
5251 if [info exists et_vect_int_mult_saved] {
5252 verbose "check_effective_target_vect_int_mult: using cached result" 2
5254 set et_vect_int_mult_saved 0
5255 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5256 || [istarget spu-*-*]
5257 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5258 || [istarget ia64-*-*]
5259 || [istarget aarch64*-*-*]
5260 || [check_effective_target_arm32] } {
5261 set et_vect_int_mult_saved 1
5265 verbose "check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
5266 return $et_vect_int_mult_saved
5269 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
5271 proc check_effective_target_vect_extract_even_odd { } {
5272 global et_vect_extract_even_odd_saved
5274 if [info exists et_vect_extract_even_odd_saved] {
5275 verbose "check_effective_target_vect_extract_even_odd: using cached result" 2
5277 set et_vect_extract_even_odd_saved 0
5278 if { [istarget aarch64*-*-*]
5279 || [istarget powerpc*-*-*]
5280 || [is-effective-target arm_neon_ok]
5281 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5282 || [istarget ia64-*-*]
5283 || [istarget spu-*-*]
5284 || ([istarget mips*-*-*]
5285 && [check_effective_target_mpaired_single]) } {
5286 set et_vect_extract_even_odd_saved 1
5290 verbose "check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
5291 return $et_vect_extract_even_odd_saved
5294 # Return 1 if the target supports vector interleaving, 0 otherwise.
5296 proc check_effective_target_vect_interleave { } {
5297 global et_vect_interleave_saved
5299 if [info exists et_vect_interleave_saved] {
5300 verbose "check_effective_target_vect_interleave: using cached result" 2
5302 set et_vect_interleave_saved 0
5303 if { [istarget aarch64*-*-*]
5304 || [istarget powerpc*-*-*]
5305 || [is-effective-target arm_neon_ok]
5306 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5307 || [istarget ia64-*-*]
5308 || [istarget spu-*-*]
5309 || ([istarget mips*-*-*]
5310 && [check_effective_target_mpaired_single]) } {
5311 set et_vect_interleave_saved 1
5315 verbose "check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
5316 return $et_vect_interleave_saved
5319 foreach N {2 3 4 8} {
5320 eval [string map [list N $N] {
5321 # Return 1 if the target supports 2-vector interleaving
5322 proc check_effective_target_vect_stridedN { } {
5323 global et_vect_stridedN_saved
5325 if [info exists et_vect_stridedN_saved] {
5326 verbose "check_effective_target_vect_stridedN: using cached result" 2
5328 set et_vect_stridedN_saved 0
5330 && [check_effective_target_vect_interleave]
5331 && [check_effective_target_vect_extract_even_odd] } {
5332 set et_vect_stridedN_saved 1
5334 if { ([istarget arm*-*-*]
5335 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
5336 set et_vect_stridedN_saved 1
5340 verbose "check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
5341 return $et_vect_stridedN_saved
5346 # Return 1 if the target supports multiple vector sizes
5348 proc check_effective_target_vect_multiple_sizes { } {
5349 global et_vect_multiple_sizes_saved
5351 set et_vect_multiple_sizes_saved 0
5352 if { ([istarget aarch64*-*-*]
5353 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])) } {
5354 set et_vect_multiple_sizes_saved 1
5356 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
5357 if { ([check_avx_available] && ![check_prefer_avx128]) } {
5358 set et_vect_multiple_sizes_saved 1
5362 verbose "check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
5363 return $et_vect_multiple_sizes_saved
5366 # Return 1 if the target supports vectors of 64 bits.
5368 proc check_effective_target_vect64 { } {
5369 global et_vect64_saved
5371 if [info exists et_vect64_saved] {
5372 verbose "check_effective_target_vect64: using cached result" 2
5374 set et_vect64_saved 0
5375 if { ([istarget arm*-*-*]
5376 && [check_effective_target_arm_neon_ok]
5377 && [check_effective_target_arm_little_endian])
5378 || [istarget aarch64*-*-*]
5379 || [istarget sparc*-*-*] } {
5380 set et_vect64_saved 1
5384 verbose "check_effective_target_vect64: returning $et_vect64_saved" 2
5385 return $et_vect64_saved
5388 # Return 1 if the target supports vector copysignf calls.
5390 proc check_effective_target_vect_call_copysignf { } {
5391 global et_vect_call_copysignf_saved
5393 if [info exists et_vect_call_copysignf_saved] {
5394 verbose "check_effective_target_vect_call_copysignf: using cached result" 2
5396 set et_vect_call_copysignf_saved 0
5397 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5398 || [istarget powerpc*-*-*] } {
5399 set et_vect_call_copysignf_saved 1
5403 verbose "check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
5404 return $et_vect_call_copysignf_saved
5407 # Return 1 if the target supports hardware square root instructions.
5409 proc check_effective_target_sqrt_insn { } {
5410 global et_sqrt_insn_saved
5412 if [info exists et_sqrt_insn_saved] {
5413 verbose "check_effective_target_hw_sqrt: using cached result" 2
5415 set et_sqrt_insn_saved 0
5416 if { [istarget x86_64-*-*]
5417 || [istarget powerpc*-*-*]
5418 || [istarget aarch64*-*-*]
5419 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok]) } {
5420 set et_sqrt_insn_saved 1
5424 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
5425 return $et_sqrt_insn_saved
5428 # Return 1 if the target supports vector sqrtf calls.
5430 proc check_effective_target_vect_call_sqrtf { } {
5431 global et_vect_call_sqrtf_saved
5433 if [info exists et_vect_call_sqrtf_saved] {
5434 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
5436 set et_vect_call_sqrtf_saved 0
5437 if { [istarget aarch64*-*-*]
5438 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5439 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
5440 set et_vect_call_sqrtf_saved 1
5444 verbose "check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
5445 return $et_vect_call_sqrtf_saved
5448 # Return 1 if the target supports vector lrint calls.
5450 proc check_effective_target_vect_call_lrint { } {
5451 set et_vect_call_lrint 0
5452 if { ([istarget i?86-*-*] || [istarget x86_64-*-*])
5453 && [check_effective_target_ilp32] } {
5454 set et_vect_call_lrint 1
5457 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
5458 return $et_vect_call_lrint
5461 # Return 1 if the target supports vector btrunc calls.
5463 proc check_effective_target_vect_call_btrunc { } {
5464 global et_vect_call_btrunc_saved
5466 if [info exists et_vect_call_btrunc_saved] {
5467 verbose "check_effective_target_vect_call_btrunc: using cached result" 2
5469 set et_vect_call_btrunc_saved 0
5470 if { [istarget aarch64*-*-*] } {
5471 set et_vect_call_btrunc_saved 1
5475 verbose "check_effective_target_vect_call_btrunc: returning $et_vect_call_btrunc_saved" 2
5476 return $et_vect_call_btrunc_saved
5479 # Return 1 if the target supports vector btruncf calls.
5481 proc check_effective_target_vect_call_btruncf { } {
5482 global et_vect_call_btruncf_saved
5484 if [info exists et_vect_call_btruncf_saved] {
5485 verbose "check_effective_target_vect_call_btruncf: using cached result" 2
5487 set et_vect_call_btruncf_saved 0
5488 if { [istarget aarch64*-*-*] } {
5489 set et_vect_call_btruncf_saved 1
5493 verbose "check_effective_target_vect_call_btruncf: returning $et_vect_call_btruncf_saved" 2
5494 return $et_vect_call_btruncf_saved
5497 # Return 1 if the target supports vector ceil calls.
5499 proc check_effective_target_vect_call_ceil { } {
5500 global et_vect_call_ceil_saved
5502 if [info exists et_vect_call_ceil_saved] {
5503 verbose "check_effective_target_vect_call_ceil: using cached result" 2
5505 set et_vect_call_ceil_saved 0
5506 if { [istarget aarch64*-*-*] } {
5507 set et_vect_call_ceil_saved 1
5511 verbose "check_effective_target_vect_call_ceil: returning $et_vect_call_ceil_saved" 2
5512 return $et_vect_call_ceil_saved
5515 # Return 1 if the target supports vector ceilf calls.
5517 proc check_effective_target_vect_call_ceilf { } {
5518 global et_vect_call_ceilf_saved
5520 if [info exists et_vect_call_ceilf_saved] {
5521 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
5523 set et_vect_call_ceilf_saved 0
5524 if { [istarget aarch64*-*-*] } {
5525 set et_vect_call_ceilf_saved 1
5529 verbose "check_effective_target_vect_call_ceilf: returning $et_vect_call_ceilf_saved" 2
5530 return $et_vect_call_ceilf_saved
5533 # Return 1 if the target supports vector floor calls.
5535 proc check_effective_target_vect_call_floor { } {
5536 global et_vect_call_floor_saved
5538 if [info exists et_vect_call_floor_saved] {
5539 verbose "check_effective_target_vect_call_floor: using cached result" 2
5541 set et_vect_call_floor_saved 0
5542 if { [istarget aarch64*-*-*] } {
5543 set et_vect_call_floor_saved 1
5547 verbose "check_effective_target_vect_call_floor: returning $et_vect_call_floor_saved" 2
5548 return $et_vect_call_floor_saved
5551 # Return 1 if the target supports vector floorf calls.
5553 proc check_effective_target_vect_call_floorf { } {
5554 global et_vect_call_floorf_saved
5556 if [info exists et_vect_call_floorf_saved] {
5557 verbose "check_effective_target_vect_call_floorf: using cached result" 2
5559 set et_vect_call_floorf_saved 0
5560 if { [istarget aarch64*-*-*] } {
5561 set et_vect_call_floorf_saved 1
5565 verbose "check_effective_target_vect_call_floorf: returning $et_vect_call_floorf_saved" 2
5566 return $et_vect_call_floorf_saved
5569 # Return 1 if the target supports vector lceil calls.
5571 proc check_effective_target_vect_call_lceil { } {
5572 global et_vect_call_lceil_saved
5574 if [info exists et_vect_call_lceil_saved] {
5575 verbose "check_effective_target_vect_call_lceil: using cached result" 2
5577 set et_vect_call_lceil_saved 0
5578 if { [istarget aarch64*-*-*] } {
5579 set et_vect_call_lceil_saved 1
5583 verbose "check_effective_target_vect_call_lceil: returning $et_vect_call_lceil_saved" 2
5584 return $et_vect_call_lceil_saved
5587 # Return 1 if the target supports vector lfloor calls.
5589 proc check_effective_target_vect_call_lfloor { } {
5590 global et_vect_call_lfloor_saved
5592 if [info exists et_vect_call_lfloor_saved] {
5593 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
5595 set et_vect_call_lfloor_saved 0
5596 if { [istarget aarch64*-*-*] } {
5597 set et_vect_call_lfloor_saved 1
5601 verbose "check_effective_target_vect_call_lfloor: returning $et_vect_call_lfloor_saved" 2
5602 return $et_vect_call_lfloor_saved
5605 # Return 1 if the target supports vector nearbyint calls.
5607 proc check_effective_target_vect_call_nearbyint { } {
5608 global et_vect_call_nearbyint_saved
5610 if [info exists et_vect_call_nearbyint_saved] {
5611 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
5613 set et_vect_call_nearbyint_saved 0
5614 if { [istarget aarch64*-*-*] } {
5615 set et_vect_call_nearbyint_saved 1
5619 verbose "check_effective_target_vect_call_nearbyint: returning $et_vect_call_nearbyint_saved" 2
5620 return $et_vect_call_nearbyint_saved
5623 # Return 1 if the target supports vector nearbyintf calls.
5625 proc check_effective_target_vect_call_nearbyintf { } {
5626 global et_vect_call_nearbyintf_saved
5628 if [info exists et_vect_call_nearbyintf_saved] {
5629 verbose "check_effective_target_vect_call_nearbyintf: using cached result" 2
5631 set et_vect_call_nearbyintf_saved 0
5632 if { [istarget aarch64*-*-*] } {
5633 set et_vect_call_nearbyintf_saved 1
5637 verbose "check_effective_target_vect_call_nearbyintf: returning $et_vect_call_nearbyintf_saved" 2
5638 return $et_vect_call_nearbyintf_saved
5641 # Return 1 if the target supports vector round calls.
5643 proc check_effective_target_vect_call_round { } {
5644 global et_vect_call_round_saved
5646 if [info exists et_vect_call_round_saved] {
5647 verbose "check_effective_target_vect_call_round: using cached result" 2
5649 set et_vect_call_round_saved 0
5650 if { [istarget aarch64*-*-*] } {
5651 set et_vect_call_round_saved 1
5655 verbose "check_effective_target_vect_call_round: returning $et_vect_call_round_saved" 2
5656 return $et_vect_call_round_saved
5659 # Return 1 if the target supports vector roundf calls.
5661 proc check_effective_target_vect_call_roundf { } {
5662 global et_vect_call_roundf_saved
5664 if [info exists et_vect_call_roundf_saved] {
5665 verbose "check_effective_target_vect_call_roundf: using cached result" 2
5667 set et_vect_call_roundf_saved 0
5668 if { [istarget aarch64*-*-*] } {
5669 set et_vect_call_roundf_saved 1
5673 verbose "check_effective_target_vect_call_roundf: returning $et_vect_call_roundf_saved" 2
5674 return $et_vect_call_roundf_saved
5677 # Return 1 if the target supports section-anchors
5679 proc check_effective_target_section_anchors { } {
5680 global et_section_anchors_saved
5682 if [info exists et_section_anchors_saved] {
5683 verbose "check_effective_target_section_anchors: using cached result" 2
5685 set et_section_anchors_saved 0
5686 if { [istarget powerpc*-*-*]
5687 || [istarget arm*-*-*]
5688 || [istarget aarch64*-*-*] } {
5689 set et_section_anchors_saved 1
5693 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
5694 return $et_section_anchors_saved
5697 # Return 1 if the target supports atomic operations on "int_128" values.
5699 proc check_effective_target_sync_int_128 { } {
5700 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5701 && ![is-effective-target ia32] } {
5703 } elseif { [istarget spu-*-*] } {
5710 # Return 1 if the target supports atomic operations on "int_128" values
5711 # and can execute them.
5713 proc check_effective_target_sync_int_128_runtime { } {
5714 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
5715 && ![is-effective-target ia32] } {
5716 return [check_cached_effective_target sync_int_128_available {
5717 check_runtime_nocache sync_int_128_available {
5721 unsigned int eax, ebx, ecx, edx;
5722 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5723 return !(ecx & bit_CMPXCHG16B);
5728 } elseif { [istarget spu-*-*] } {
5735 # Return 1 if the target supports atomic operations on "long long".
5737 # Note: 32bit x86 targets require -march=pentium in dg-options.
5738 # Note: 32bit s390 targets require -mzarch in dg-options.
5740 proc check_effective_target_sync_long_long { } {
5741 if { [istarget x86_64-*-*] || [istarget i?86-*-*])
5742 || [istarget aarch64*-*-*]
5743 || [istarget arm*-*-*]
5744 || [istarget alpha*-*-*]
5745 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
5746 || [istarget s390*-*-*]
5747 || [istarget spu-*-*] } {
5754 # Return 1 if the target supports atomic operations on "long long"
5755 # and can execute them.
5757 # Note: 32bit x86 targets require -march=pentium in dg-options.
5759 proc check_effective_target_sync_long_long_runtime { } {
5760 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
5761 return [check_cached_effective_target sync_long_long_available {
5762 check_runtime_nocache sync_long_long_available {
5766 unsigned int eax, ebx, ecx, edx;
5767 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
5768 return !(edx & bit_CMPXCHG8B);
5773 } elseif { [istarget aarch64*-*-*] } {
5775 } elseif { [istarget arm*-*-linux-*] } {
5776 return [check_runtime sync_longlong_runtime {
5782 if (sizeof (long long) != 8)
5785 /* Just check for native; checking for kernel fallback is tricky. */
5786 asm volatile ("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
5791 } elseif { [istarget alpha*-*-*] } {
5793 } elseif { ([istarget sparc*-*-*]
5794 && [check_effective_target_lp64]
5795 && [check_effective_target_ultrasparc_hw]) } {
5797 } elseif { [istarget spu-*-*] } {
5799 } elseif { [istarget powerpc*-*-*] && [check_effective_target_lp64] } {
5806 # Return 1 if the target supports byte swap instructions.
5808 proc check_effective_target_bswap { } {
5809 global et_bswap_saved
5811 if [info exists et_bswap_saved] {
5812 verbose "check_effective_target_bswap: using cached result" 2
5814 set et_bswap_saved 0
5815 if { [istarget aarch64*-*-*]
5816 || [istarget alpha*-*-*]
5817 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5818 || [istarget m68k-*-*]
5819 || [istarget powerpc*-*-*]
5820 || [istarget rs6000-*-*]
5821 || [istarget s390*-*-*] } {
5822 set et_bswap_saved 1
5824 if { [istarget arm*-*-*]
5825 && [check_no_compiler_messages_nocache arm_v6_or_later object {
5827 #error not armv6 or later
5831 set et_bswap_saved 1
5836 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
5837 return $et_bswap_saved
5840 # Return 1 if the target supports 16-bit byte swap instructions.
5842 proc check_effective_target_bswap16 { } {
5843 global et_bswap16_saved
5845 if [info exists et_bswap16_saved] {
5846 verbose "check_effective_target_bswap16: using cached result" 2
5848 set et_bswap16_saved 0
5849 if { [is-effective-target bswap]
5850 && ![istarget alpha*-*-*]
5851 && !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
5852 set et_bswap16_saved 1
5856 verbose "check_effective_target_bswap16: returning $et_bswap16_saved" 2
5857 return $et_bswap16_saved
5860 # Return 1 if the target supports 32-bit byte swap instructions.
5862 proc check_effective_target_bswap32 { } {
5863 global et_bswap32_saved
5865 if [info exists et_bswap32_saved] {
5866 verbose "check_effective_target_bswap32: using cached result" 2
5868 set et_bswap32_saved 0
5869 if { [is-effective-target bswap] } {
5870 set et_bswap32_saved 1
5874 verbose "check_effective_target_bswap32: returning $et_bswap32_saved" 2
5875 return $et_bswap32_saved
5878 # Return 1 if the target supports 64-bit byte swap instructions.
5880 # Note: 32bit s390 targets require -mzarch in dg-options.
5882 proc check_effective_target_bswap64 { } {
5883 global et_bswap64_saved
5885 # expand_unop can expand 64-bit byte swap on 32-bit targets
5886 if { [is-effective-target bswap] && [is-effective-target int32plus] } {
5892 # Return 1 if the target supports atomic operations on "int" and "long".
5894 proc check_effective_target_sync_int_long { } {
5895 global et_sync_int_long_saved
5897 if [info exists et_sync_int_long_saved] {
5898 verbose "check_effective_target_sync_int_long: using cached result" 2
5900 set et_sync_int_long_saved 0
5901 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5902 # load-reserved/store-conditional instructions.
5903 if { [istarget ia64-*-*]
5904 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5905 || [istarget aarch64*-*-*]
5906 || [istarget alpha*-*-*]
5907 || [istarget arm*-*-linux-*]
5908 || ([istarget arm*-*-*]
5909 && [check_effective_target_arm_acq_rel])
5910 || [istarget bfin*-*linux*]
5911 || [istarget hppa*-*linux*]
5912 || [istarget s390*-*-*]
5913 || [istarget powerpc*-*-*]
5914 || [istarget crisv32-*-*] || [istarget cris-*-*]
5915 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5916 || [istarget spu-*-*]
5917 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
5918 || [check_effective_target_mips_llsc] } {
5919 set et_sync_int_long_saved 1
5923 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
5924 return $et_sync_int_long_saved
5927 # Return 1 if the target supports atomic operations on "char" and "short".
5929 proc check_effective_target_sync_char_short { } {
5930 global et_sync_char_short_saved
5932 if [info exists et_sync_char_short_saved] {
5933 verbose "check_effective_target_sync_char_short: using cached result" 2
5935 set et_sync_char_short_saved 0
5936 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
5937 # load-reserved/store-conditional instructions.
5938 if { [istarget aarch64*-*-*]
5939 || [istarget ia64-*-*]
5940 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5941 || [istarget alpha*-*-*]
5942 || [istarget arm*-*-linux-*]
5943 || ([istarget arm*-*-*]
5944 && [check_effective_target_arm_acq_rel])
5945 || [istarget hppa*-*linux*]
5946 || [istarget s390*-*-*]
5947 || [istarget powerpc*-*-*]
5948 || [istarget crisv32-*-*] || [istarget cris-*-*]
5949 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
5950 || [istarget spu-*-*]
5951 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
5952 || [check_effective_target_mips_llsc] } {
5953 set et_sync_char_short_saved 1
5957 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
5958 return $et_sync_char_short_saved
5961 # Return 1 if the target uses a ColdFire FPU.
5963 proc check_effective_target_coldfire_fpu { } {
5964 return [check_no_compiler_messages coldfire_fpu assembly {
5971 # Return true if this is a uClibc target.
5973 proc check_effective_target_uclibc {} {
5974 return [check_no_compiler_messages uclibc object {
5975 #include <features.h>
5976 #if !defined (__UCLIBC__)
5982 # Return true if this is a uclibc target and if the uclibc feature
5983 # described by __$feature__ is not present.
5985 proc check_missing_uclibc_feature {feature} {
5986 return [check_no_compiler_messages $feature object "
5987 #include <features.h>
5988 #if !defined (__UCLIBC) || defined (__${feature}__)
5994 # Return true if this is a Newlib target.
5996 proc check_effective_target_newlib {} {
5997 return [check_no_compiler_messages newlib object {
6002 # Return true if this is NOT a Bionic target.
6004 proc check_effective_target_non_bionic {} {
6005 return [check_no_compiler_messages non_bionic object {
6007 #if defined (__BIONIC__)
6013 # Return true if this target has error.h header.
6015 proc check_effective_target_error_h {} {
6016 return [check_no_compiler_messages error_h object {
6021 # Return true if this target has tgmath.h header.
6023 proc check_effective_target_tgmath_h {} {
6024 return [check_no_compiler_messages tgmath_h object {
6029 # Return true if target's libc supports complex functions.
6031 proc check_effective_target_libc_has_complex_functions {} {
6032 return [check_no_compiler_messages libc_has_complex_functions object {
6033 #include <complex.h>
6038 # (a) an error of a few ULP is expected in string to floating-point
6039 # conversion functions; and
6040 # (b) overflow is not always detected correctly by those functions.
6042 proc check_effective_target_lax_strtofp {} {
6043 # By default, assume that all uClibc targets suffer from this.
6044 return [check_effective_target_uclibc]
6047 # Return 1 if this is a target for which wcsftime is a dummy
6048 # function that always returns 0.
6050 proc check_effective_target_dummy_wcsftime {} {
6051 # By default, assume that all uClibc targets suffer from this.
6052 return [check_effective_target_uclibc]
6055 # Return 1 if constructors with initialization priority arguments are
6056 # supposed on this target.
6058 proc check_effective_target_init_priority {} {
6059 return [check_no_compiler_messages init_priority assembly "
6060 void f() __attribute__((constructor (1000)));
6065 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
6066 # This can be used with any check_* proc that takes no argument and
6067 # returns only 1 or 0. It could be used with check_* procs that take
6068 # arguments with keywords that pass particular arguments.
6070 proc is-effective-target { arg } {
6072 if { [info procs check_effective_target_${arg}] != [list] } {
6073 set selected [check_effective_target_${arg}]
6076 "vmx_hw" { set selected [check_vmx_hw_available] }
6077 "vsx_hw" { set selected [check_vsx_hw_available] }
6078 "p8vector_hw" { set selected [check_p8vector_hw_available] }
6079 "p9vector_hw" { set selected [check_p9vector_hw_available] }
6080 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
6081 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
6082 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
6083 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
6084 "dfp_hw" { set selected [check_dfp_hw_available] }
6085 "htm_hw" { set selected [check_htm_hw_available] }
6086 "named_sections" { set selected [check_named_sections_available] }
6087 "gc_sections" { set selected [check_gc_sections_available] }
6088 "cxa_atexit" { set selected [check_cxa_atexit_available] }
6089 default { error "unknown effective target keyword `$arg'" }
6092 verbose "is-effective-target: $arg $selected" 2
6096 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
6098 proc is-effective-target-keyword { arg } {
6099 if { [info procs check_effective_target_${arg}] != [list] } {
6102 # These have different names for their check_* procs.
6104 "vmx_hw" { return 1 }
6105 "vsx_hw" { return 1 }
6106 "p8vector_hw" { return 1 }
6107 "p9vector_hw" { return 1 }
6108 "p9modulo_hw" { return 1 }
6109 "ppc_float128_sw" { return 1 }
6110 "ppc_float128_hw" { return 1 }
6111 "ppc_recip_hw" { return 1 }
6112 "dfp_hw" { return 1 }
6113 "htm_hw" { return 1 }
6114 "named_sections" { return 1 }
6115 "gc_sections" { return 1 }
6116 "cxa_atexit" { return 1 }
6117 default { return 0 }
6122 # Return 1 if target default to short enums
6124 proc check_effective_target_short_enums { } {
6125 return [check_no_compiler_messages short_enums assembly {
6127 int s[sizeof (enum foo) == 1 ? 1 : -1];
6131 # Return 1 if target supports merging string constants at link time.
6133 proc check_effective_target_string_merging { } {
6134 return [check_no_messages_and_pattern string_merging \
6135 "rodata\\.str" assembly {
6136 const char *var = "String";
6140 # Return 1 if target has the basic signed and unsigned types in
6141 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
6142 # working <stdint.h> for all targets.
6144 proc check_effective_target_stdint_types { } {
6145 return [check_no_compiler_messages stdint_types assembly {
6147 int8_t a; int16_t b; int32_t c; int64_t d;
6148 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
6152 # Return 1 if target has the basic signed and unsigned types in
6153 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
6154 # these types agree with those in the header, as some systems have
6155 # only <inttypes.h>.
6157 proc check_effective_target_inttypes_types { } {
6158 return [check_no_compiler_messages inttypes_types assembly {
6159 #include <inttypes.h>
6160 int8_t a; int16_t b; int32_t c; int64_t d;
6161 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
6165 # Return 1 if programs are intended to be run on a simulator
6166 # (i.e. slowly) rather than hardware (i.e. fast).
6168 proc check_effective_target_simulator { } {
6170 # All "src/sim" simulators set this one.
6171 if [board_info target exists is_simulator] {
6172 return [board_info target is_simulator]
6175 # The "sid" simulators don't set that one, but at least they set
6177 if [board_info target exists slow_simulator] {
6178 return [board_info target slow_simulator]
6184 # Return 1 if programs are intended to be run on hardware rather than
6187 proc check_effective_target_hw { } {
6189 # All "src/sim" simulators set this one.
6190 if [board_info target exists is_simulator] {
6191 if [board_info target is_simulator] {
6198 # The "sid" simulators don't set that one, but at least they set
6200 if [board_info target exists slow_simulator] {
6201 if [board_info target slow_simulator] {
6211 # Return 1 if the target is a VxWorks kernel.
6213 proc check_effective_target_vxworks_kernel { } {
6214 return [check_no_compiler_messages vxworks_kernel assembly {
6215 #if !defined __vxworks || defined __RTP__
6221 # Return 1 if the target is a VxWorks RTP.
6223 proc check_effective_target_vxworks_rtp { } {
6224 return [check_no_compiler_messages vxworks_rtp assembly {
6225 #if !defined __vxworks || !defined __RTP__
6231 # Return 1 if the target is expected to provide wide character support.
6233 proc check_effective_target_wchar { } {
6234 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
6237 return [check_no_compiler_messages wchar assembly {
6242 # Return 1 if the target has <pthread.h>.
6244 proc check_effective_target_pthread_h { } {
6245 return [check_no_compiler_messages pthread_h assembly {
6246 #include <pthread.h>
6250 # Return 1 if the target can truncate a file from a file-descriptor,
6251 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
6252 # chsize. We test for a trivially functional truncation; no stubs.
6253 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
6254 # different function to be used.
6256 proc check_effective_target_fd_truncate { } {
6258 #define _FILE_OFFSET_BITS 64
6265 FILE *f = fopen ("tst.tmp", "wb");
6267 const char t[] = "test writing more than ten characters";
6271 write (fd, t, sizeof (t) - 1);
6273 if (ftruncate (fd, 10) != 0)
6282 f = fopen ("tst.tmp", "rb");
6283 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
6291 if { [check_runtime ftruncate $prog] } {
6295 regsub "ftruncate" $prog "chsize" prog
6296 return [check_runtime chsize $prog]
6299 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
6301 proc add_options_for_c99_runtime { flags } {
6302 if { [istarget *-*-solaris2*] } {
6303 return "$flags -std=c99"
6305 if { [istarget powerpc-*-darwin*] } {
6306 return "$flags -mmacosx-version-min=10.3"
6311 # Add to FLAGS all the target-specific flags needed to enable
6312 # full IEEE compliance mode.
6314 proc add_options_for_ieee { flags } {
6315 if { [istarget alpha*-*-*]
6316 || [istarget sh*-*-*] } {
6317 return "$flags -mieee"
6319 if { [istarget rx-*-*] } {
6320 return "$flags -mnofpu"
6325 if {![info exists flags_to_postpone]} {
6326 set flags_to_postpone ""
6329 # Add to FLAGS the flags needed to enable functions to bind locally
6330 # when using pic/PIC passes in the testsuite.
6331 proc add_options_for_bind_pic_locally { flags } {
6332 global flags_to_postpone
6334 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
6335 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
6336 # order to make sure that the multilib_flags doesn't override this.
6338 if {[check_no_compiler_messages using_pic2 assembly {
6343 set flags_to_postpone "-fPIE"
6346 if {[check_no_compiler_messages using_pic1 assembly {
6351 set flags_to_postpone "-fpie"
6357 # Add to FLAGS the flags needed to enable 64-bit vectors.
6359 proc add_options_for_double_vectors { flags } {
6360 if [is-effective-target arm_neon_ok] {
6361 return "$flags -mvectorize-with-neon-double"
6367 # Return 1 if the target provides a full C99 runtime.
6369 proc check_effective_target_c99_runtime { } {
6370 return [check_cached_effective_target c99_runtime {
6373 set file [open "$srcdir/gcc.dg/builtins-config.h"]
6374 set contents [read $file]
6377 #ifndef HAVE_C99_RUNTIME
6378 #error !HAVE_C99_RUNTIME
6381 check_no_compiler_messages_nocache c99_runtime assembly \
6382 $contents [add_options_for_c99_runtime ""]
6386 # Return 1 if target wchar_t is at least 4 bytes.
6388 proc check_effective_target_4byte_wchar_t { } {
6389 return [check_no_compiler_messages 4byte_wchar_t object {
6390 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
6394 # Return 1 if the target supports automatic stack alignment.
6396 proc check_effective_target_automatic_stack_alignment { } {
6397 # Ordinarily x86 supports automatic stack alignment ...
6398 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
6399 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
6400 # ... except Win64 SEH doesn't. Succeed for Win32 though.
6401 return [check_effective_target_ilp32];
6408 # Return true if we are compiling for AVX target.
6410 proc check_avx_available { } {
6411 if { [check_no_compiler_messages avx_available assembly {
6421 # Return true if 32- and 16-bytes vectors are available.
6423 proc check_effective_target_vect_sizes_32B_16B { } {
6424 if { [check_avx_available] && ![check_prefer_avx128] } {
6431 # Return true if 128-bits vectors are preferred even if 256-bits vectors
6434 proc check_prefer_avx128 { } {
6435 if ![check_avx_available] {
6438 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
6439 float a[1024],b[1024],c[1024];
6440 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
6441 } "-O2 -ftree-vectorize"]
6445 # Return 1 if avx512f instructions can be compiled.
6447 proc check_effective_target_avx512f { } {
6448 return [check_no_compiler_messages avx512f object {
6449 typedef double __m512d __attribute__ ((__vector_size__ (64)));
6451 __m512d _mm512_add (__m512d a)
6453 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
6458 # Return 1 if avx instructions can be compiled.
6460 proc check_effective_target_avx { } {
6461 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
6464 return [check_no_compiler_messages avx object {
6465 void _mm256_zeroall (void)
6467 __builtin_ia32_vzeroall ();
6472 # Return 1 if avx2 instructions can be compiled.
6473 proc check_effective_target_avx2 { } {
6474 return [check_no_compiler_messages avx2 object {
6475 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
6477 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
6479 return __builtin_ia32_andnotsi256 (__X, __Y);
6484 # Return 1 if sse instructions can be compiled.
6485 proc check_effective_target_sse { } {
6486 return [check_no_compiler_messages sse object {
6489 __builtin_ia32_stmxcsr ();
6495 # Return 1 if sse2 instructions can be compiled.
6496 proc check_effective_target_sse2 { } {
6497 return [check_no_compiler_messages sse2 object {
6498 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
6500 __m128i _mm_srli_si128 (__m128i __A, int __N)
6502 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
6507 # Return 1 if sse4.1 instructions can be compiled.
6508 proc check_effective_target_sse4 { } {
6509 return [check_no_compiler_messages sse4.1 object {
6510 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
6511 typedef int __v4si __attribute__ ((__vector_size__ (16)));
6513 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
6515 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
6521 # Return 1 if F16C instructions can be compiled.
6523 proc check_effective_target_f16c { } {
6524 return [check_no_compiler_messages f16c object {
6525 #include "immintrin.h"
6527 foo (unsigned short val)
6529 return _cvtsh_ss (val);
6534 # Return 1 if C wchar_t type is compatible with char16_t.
6536 proc check_effective_target_wchar_t_char16_t_compatible { } {
6537 return [check_no_compiler_messages wchar_t_char16_t object {
6539 __CHAR16_TYPE__ *p16 = &wc;
6540 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
6544 # Return 1 if C wchar_t type is compatible with char32_t.
6546 proc check_effective_target_wchar_t_char32_t_compatible { } {
6547 return [check_no_compiler_messages wchar_t_char32_t object {
6549 __CHAR32_TYPE__ *p32 = &wc;
6550 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
6554 # Return 1 if pow10 function exists.
6556 proc check_effective_target_pow10 { } {
6557 return [check_runtime pow10 {
6567 # Return 1 if issignaling function exists.
6568 proc check_effective_target_issignaling {} {
6569 return [check_runtime issignaling {
6574 return issignaling (0.0);
6579 # Return 1 if current options generate DFP instructions, 0 otherwise.
6580 proc check_effective_target_hard_dfp {} {
6581 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
6582 typedef float d64 __attribute__((mode(DD)));
6584 void foo (void) { z = x + y; }
6588 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
6589 # for strchr etc. functions.
6591 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
6592 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
6595 #if !defined(__cplusplus) \
6596 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
6597 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
6598 ISO C++ correct string.h and wchar.h protos not supported.
6605 # Return 1 if GNU as is used.
6607 proc check_effective_target_gas { } {
6608 global use_gas_saved
6611 if {![info exists use_gas_saved]} {
6612 # Check if the as used by gcc is GNU as.
6613 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
6614 # Provide /dev/null as input, otherwise gas times out reading from
6616 set status [remote_exec host "$gcc_as" "-v /dev/null"]
6617 set as_output [lindex $status 1]
6618 if { [ string first "GNU" $as_output ] >= 0 } {
6624 return $use_gas_saved
6627 # Return 1 if GNU ld is used.
6629 proc check_effective_target_gld { } {
6630 global use_gld_saved
6633 if {![info exists use_gld_saved]} {
6634 # Check if the ld used by gcc is GNU ld.
6635 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
6636 set status [remote_exec host "$gcc_ld" "--version"]
6637 set ld_output [lindex $status 1]
6638 if { [ string first "GNU" $ld_output ] >= 0 } {
6644 return $use_gld_saved
6647 # Return 1 if the compiler has been configure with link-time optimization
6650 proc check_effective_target_lto { } {
6651 if { [istarget nvptx-*-*] } {
6654 return [check_no_compiler_messages lto object {
6659 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
6661 proc check_effective_target_maybe_x32 { } {
6662 return [check_no_compiler_messages maybe_x32 object {
6664 } "-mx32 -maddress-mode=short"]
6667 # Return 1 if this target supports the -fsplit-stack option, 0
6670 proc check_effective_target_split_stack {} {
6671 return [check_no_compiler_messages split_stack object {
6676 # Return 1 if this target supports the -masm=intel option, 0
6679 proc check_effective_target_masm_intel {} {
6680 return [check_no_compiler_messages masm_intel object {
6681 extern void abort (void);
6685 # Return 1 if the language for the compiler under test is C.
6687 proc check_effective_target_c { } {
6689 if [string match $tool "gcc"] {
6695 # Return 1 if the language for the compiler under test is C++.
6697 proc check_effective_target_c++ { } {
6699 if [string match $tool "g++"] {
6705 set cxx_default "c++14"
6706 # Check whether the current active language standard supports the features
6707 # of C++11/C++14 by checking for the presence of one of the -std flags.
6708 # This assumes that the default for the compiler is $cxx_default, and that
6709 # there will never be multiple -std= arguments on the command line.
6710 proc check_effective_target_c++11_only { } {
6712 if ![check_effective_target_c++] {
6715 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
6718 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
6723 proc check_effective_target_c++11 { } {
6724 if [check_effective_target_c++11_only] {
6727 return [check_effective_target_c++14]
6729 proc check_effective_target_c++11_down { } {
6730 if ![check_effective_target_c++] {
6733 return [expr ![check_effective_target_c++14] ]
6736 proc check_effective_target_c++14_only { } {
6738 if ![check_effective_target_c++] {
6741 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
6744 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
6750 proc check_effective_target_c++14 { } {
6751 if [check_effective_target_c++14_only] {
6754 return [check_effective_target_c++1z]
6756 proc check_effective_target_c++14_down { } {
6757 if ![check_effective_target_c++] {
6760 return [expr ![check_effective_target_c++1z] ]
6763 proc check_effective_target_c++98_only { } {
6765 if ![check_effective_target_c++] {
6768 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
6771 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
6777 proc check_effective_target_c++1z_only { } {
6779 if ![check_effective_target_c++] {
6782 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
6785 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
6790 proc check_effective_target_c++1z { } {
6791 return [check_effective_target_c++1z_only]
6794 # Check for C++ Concepts TS support, i.e. -fconcepts flag.
6795 proc check_effective_target_concepts { } {
6796 return [check-flags { "" { } { -fconcepts } }]
6799 # Return 1 if expensive testcases should be run.
6801 proc check_effective_target_run_expensive_tests { } {
6802 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
6808 # Returns 1 if "mempcpy" is available on the target system.
6810 proc check_effective_target_mempcpy {} {
6811 return [check_function_available "mempcpy"]
6814 # Returns 1 if "stpcpy" is available on the target system.
6816 proc check_effective_target_stpcpy {} {
6817 return [check_function_available "stpcpy"]
6820 # Check whether the vectorizer tests are supported by the target and
6821 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
6822 # Set dg-do-what-default to either compile or run, depending on target
6823 # capabilities. Return 1 if vectorizer tests are supported by
6824 # target, 0 otherwise.
6826 proc check_vect_support_and_set_flags { } {
6827 global DEFAULT_VECTCFLAGS
6828 global dg-do-what-default
6830 if [istarget powerpc-*paired*] {
6831 lappend DEFAULT_VECTCFLAGS "-mpaired"
6832 if [check_750cl_hw_available] {
6833 set dg-do-what-default run
6835 set dg-do-what-default compile
6837 } elseif [istarget powerpc*-*-*] {
6838 # Skip targets not supporting -maltivec.
6839 if ![is-effective-target powerpc_altivec_ok] {
6843 lappend DEFAULT_VECTCFLAGS "-maltivec"
6844 if [check_p9vector_hw_available] {
6845 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
6846 } elseif [check_p8vector_hw_available] {
6847 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
6848 } elseif [check_vsx_hw_available] {
6849 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
6852 if [check_vmx_hw_available] {
6853 set dg-do-what-default run
6855 if [is-effective-target ilp32] {
6856 # Specify a cpu that supports VMX for compile-only tests.
6857 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
6859 set dg-do-what-default compile
6861 } elseif { [istarget spu-*-*] } {
6862 set dg-do-what-default run
6863 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
6864 lappend DEFAULT_VECTCFLAGS "-msse2"
6865 if { [check_effective_target_sse2_runtime] } {
6866 set dg-do-what-default run
6868 set dg-do-what-default compile
6870 } elseif { [istarget mips*-*-*]
6871 && ([check_effective_target_mpaired_single]
6872 || [check_effective_target_mips_loongson])
6873 && [check_effective_target_nomips16] } {
6874 if { [check_effective_target_mpaired_single] } {
6875 lappend DEFAULT_VECTCFLAGS "-mpaired-single"
6877 set dg-do-what-default run
6878 } elseif [istarget sparc*-*-*] {
6879 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
6880 if [check_effective_target_ultrasparc_hw] {
6881 set dg-do-what-default run
6883 set dg-do-what-default compile
6885 } elseif [istarget alpha*-*-*] {
6886 # Alpha's vectorization capabilities are extremely limited.
6887 # It's more effort than its worth disabling all of the tests
6888 # that it cannot pass. But if you actually want to see what
6889 # does work, command out the return.
6892 lappend DEFAULT_VECTCFLAGS "-mmax"
6893 if [check_alpha_max_hw_available] {
6894 set dg-do-what-default run
6896 set dg-do-what-default compile
6898 } elseif [istarget ia64-*-*] {
6899 set dg-do-what-default run
6900 } elseif [is-effective-target arm_neon_ok] {
6901 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
6902 # NEON does not support denormals, so is not used for vectorization by
6903 # default to avoid loss of precision. We must pass -ffast-math to test
6904 # vectorization of float operations.
6905 lappend DEFAULT_VECTCFLAGS "-ffast-math"
6906 if [is-effective-target arm_neon_hw] {
6907 set dg-do-what-default run
6909 set dg-do-what-default compile
6911 } elseif [istarget "aarch64*-*-*"] {
6912 set dg-do-what-default run
6920 # Return 1 if the target does *not* require strict alignment.
6922 proc check_effective_target_non_strict_align {} {
6924 # On ARM, the default is to use STRICT_ALIGNMENT, but there
6925 # are interfaces defined for misaligned access and thus
6926 # depending on the architecture levels unaligned access is
6928 if [istarget "arm*-*-*"] {
6929 return [check_effective_target_arm_unaligned]
6932 return [check_no_compiler_messages non_strict_align assembly {
6934 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
6936 void foo(void) { z = (c *) y; }
6940 # Return 1 if the target has <ucontext.h>.
6942 proc check_effective_target_ucontext_h { } {
6943 return [check_no_compiler_messages ucontext_h assembly {
6944 #include <ucontext.h>
6948 proc check_effective_target_aarch64_tiny { } {
6949 if { [istarget aarch64*-*-*] } {
6950 return [check_no_compiler_messages aarch64_tiny object {
6951 #ifdef __AARCH64_CMODEL_TINY__
6954 #error target not AArch64 tiny code model
6962 # Create functions to check that the AArch64 assembler supports the
6963 # various architecture extensions via the .arch_extension pseudo-op.
6965 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse"} {
6966 eval [string map [list FUNC $aarch64_ext] {
6967 proc check_effective_target_aarch64_asm_FUNC_ok { } {
6968 if { [istarget aarch64*-*-*] } {
6969 return [check_no_compiler_messages aarch64_FUNC_assembler object {
6970 __asm__ (".arch_extension FUNC");
6971 } "-march=armv8-a+FUNC"]
6979 proc check_effective_target_aarch64_small { } {
6980 if { [istarget aarch64*-*-*] } {
6981 return [check_no_compiler_messages aarch64_small object {
6982 #ifdef __AARCH64_CMODEL_SMALL__
6985 #error target not AArch64 small code model
6993 proc check_effective_target_aarch64_large { } {
6994 if { [istarget aarch64*-*-*] } {
6995 return [check_no_compiler_messages aarch64_large object {
6996 #ifdef __AARCH64_CMODEL_LARGE__
6999 #error target not AArch64 large code model
7007 # Return 1 if <fenv.h> is available with all the standard IEEE
7008 # exceptions and floating-point exceptions are raised by arithmetic
7009 # operations. (If the target requires special options for "inexact"
7010 # exceptions, those need to be specified in the testcases.)
7012 proc check_effective_target_fenv_exceptions {} {
7013 return [check_runtime fenv_exceptions {
7016 #ifndef FE_DIVBYZERO
7017 # error Missing FE_DIVBYZERO
7020 # error Missing FE_INEXACT
7023 # error Missing FE_INVALID
7026 # error Missing FE_OVERFLOW
7028 #ifndef FE_UNDERFLOW
7029 # error Missing FE_UNDERFLOW
7031 volatile float a = 0.0f, r;
7036 if (fetestexcept (FE_INVALID))
7041 } [add_options_for_ieee "-std=gnu99"]]
7044 proc check_effective_target_tiny {} {
7045 global et_target_tiny_saved
7047 if [info exists et_target_tine_saved] {
7048 verbose "check_effective_target_tiny: using cached result" 2
7050 set et_target_tiny_saved 0
7051 if { [istarget aarch64*-*-*]
7052 && [check_effective_target_aarch64_tiny] } {
7053 set et_target_tiny_saved 1
7057 return $et_target_tiny_saved
7060 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
7062 proc check_effective_target_logical_op_short_circuit {} {
7063 if { [istarget mips*-*-*]
7064 || [istarget arc*-*-*]
7065 || [istarget avr*-*-*]
7066 || [istarget crisv32-*-*] || [istarget cris-*-*]
7067 || [istarget mmix-*-*]
7068 || [istarget s390*-*-*]
7069 || [istarget powerpc*-*-*]
7070 || [istarget nios2*-*-*]
7071 || [istarget visium-*-*]
7072 || [check_effective_target_arm_cortex_m] } {
7078 # Record that dg-final test TEST requires convential compilation.
7080 proc force_conventional_output_for { test } {
7081 if { [info proc $test] == "" } {
7082 perror "$test does not exist"
7085 proc ${test}_required_options {} {
7086 global gcc_force_conventional_output
7087 return $gcc_force_conventional_output
7091 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
7092 # otherwise. Cache the result.
7094 proc check_effective_target_pie_copyreloc { } {
7095 global pie_copyreloc_available_saved
7097 global GCC_UNDER_TEST
7099 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
7103 # Need auto-host.h to check linker support.
7104 if { ![file exists ../../auto-host.h ] } {
7108 if [info exists pie_copyreloc_available_saved] {
7109 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
7111 # Set up and compile to see if linker supports PIE with copy
7112 # reloc. Include the current process ID in the file names to
7113 # prevent conflicts with invocations for multiple testsuites.
7118 set f [open $src "w"]
7119 puts $f "#include \"../../auto-host.h\""
7120 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
7121 puts $f "# error Linker does not support PIE with copy reloc."
7125 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
7126 set lines [${tool}_target_compile $src $obj object ""]
7131 if [string match "" $lines] then {
7132 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
7133 set pie_copyreloc_available_saved 1
7135 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
7136 set pie_copyreloc_available_saved 0
7140 return $pie_copyreloc_available_saved
7143 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
7144 # otherwise. Cache the result.
7146 proc check_effective_target_got32x_reloc { } {
7147 global got32x_reloc_available_saved
7149 global GCC_UNDER_TEST
7151 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
7155 # Need auto-host.h to check linker support.
7156 if { ![file exists ../../auto-host.h ] } {
7160 if [info exists got32x_reloc_available_saved] {
7161 verbose "check_effective_target_got32x_reloc returning saved $got32x_reloc_available_saved" 2
7163 # Include the current process ID in the file names to prevent
7164 # conflicts with invocations for multiple testsuites.
7166 set src got32x[pid].c
7167 set obj got32x[pid].o
7169 set f [open $src "w"]
7170 puts $f "#include \"../../auto-host.h\""
7171 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
7172 puts $f "# error Assembler does not support R_386_GOT32X."
7176 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
7177 set lines [${tool}_target_compile $src $obj object ""]
7182 if [string match "" $lines] then {
7183 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
7184 set got32x_reloc_available_saved 1
7186 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
7187 set got32x_reloc_available_saved 0
7191 return $got32x_reloc_available_saved
7194 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
7195 # 0 otherwise. Cache the result.
7197 proc check_effective_target_tls_get_addr_via_got { } {
7198 global tls_get_addr_via_got_available_saved
7200 global GCC_UNDER_TEST
7202 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
7206 # Need auto-host.h to check linker support.
7207 if { ![file exists ../../auto-host.h ] } {
7211 if [info exists tls_get_addr_via_got_available_saved] {
7212 verbose "check_effective_target_tls_get_addr_via_got returning saved $tls_get_addr_via_got_available_saved" 2
7214 # Include the current process ID in the file names to prevent
7215 # conflicts with invocations for multiple testsuites.
7217 set src tls_get_addr_via_got[pid].c
7218 set obj tls_get_addr_via_got[pid].o
7220 set f [open $src "w"]
7221 puts $f "#include \"../../auto-host.h\""
7222 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
7223 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
7227 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
7228 set lines [${tool}_target_compile $src $obj object ""]
7233 if [string match "" $lines] then {
7234 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
7235 set tls_get_addr_via_got_available_saved 1
7237 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
7238 set tls_get_addr_via_got_available_saved 0
7242 return $tls_get_addr_via_got_available_saved
7245 # Return 1 if the target uses comdat groups.
7247 proc check_effective_target_comdat_group {} {
7248 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
7250 inline int foo () { return 1; }
7255 # Return 1 if target supports __builtin_eh_return
7256 proc check_effective_target_builtin_eh_return { } {
7257 return [check_no_compiler_messages builtin_eh_return object {
7258 void test (long l, void *p)
7260 __builtin_eh_return (l, p);
7265 # Return 1 if the target supports max reduction for vectors.
7267 proc check_effective_target_vect_max_reduc { } {
7268 if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } {
7274 # Return 1 if there is an nvptx offload compiler.
7276 proc check_effective_target_offload_nvptx { } {
7277 return [check_no_compiler_messages offload_nvptx object {
7278 int main () {return 0;}
7279 } "-foffload=nvptx-none" ]
7282 # Return 1 if the compiler has been configured with hsa offloading.
7284 proc check_effective_target_offload_hsa { } {
7285 return [check_no_compiler_messages offload_hsa assembly {
7286 int main () {return 0;}