1 # Copyright (C) 1999-2017 Free Software Foundation, Inc.
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
20 # This file defines procs for determining features supported by the target.
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
34 # "! Fortran" for Fortran code,
36 # "// ObjC++" for ObjC++
38 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
39 # allow for ObjC/ObjC++ specific flags.
40 proc check_compile {basename type contents args} {
42 verbose "check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources] {
48 set tmp_additional_sources "$additional_sources"
49 set additional_sources ""
52 if { [llength $args] > 0 } {
53 set options [list "additional_flags=[lindex $args 0]"]
57 switch -glob -- $contents {
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default { set src ${basename}[pid].c }
72 set compile_type $type
74 assembly { set output ${basename}[pid].s }
75 object { set output ${basename}[pid].o }
76 executable { set output ${basename}[pid].exe }
78 set output ${basename}[pid].s
79 lappend options "additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines [${tool}_target_compile $src $output $compile_type "$options"]
89 set scan_output $output
90 # Don't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp "rtl-(.*)" $type dummy rtl_type] {
93 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources] {
99 set additional_sources "$tmp_additional_sources"
102 return [list $lines $scan_output]
105 proc current_target_name { } {
107 if [info exists target_info(target,name)] {
108 set answer $target_info(target,name)
115 # Implement an effective-target check for property PROP by invoking
116 # the Tcl command ARGS and seeing if it returns true.
118 proc check_cached_effective_target { prop args } {
122 set target [current_target_name]
123 if {![info exists et_cache($prop,target)]
124 || $et_cache($prop,target) != $target} {
125 verbose "check_cached_effective_target $prop: checking $target" 2
126 set et_cache($prop,target) $target
127 set et_cache($prop,value) [uplevel eval $args]
128 if {![info exists et_prop_list]
129 || [lsearch $et_prop_list $prop] < 0} {
130 lappend et_prop_list $prop
132 verbose "check_cached_effective_target cached list is now: $et_prop_list" 2
134 set value $et_cache($prop,value)
135 verbose "check_cached_effective_target $prop: returning $value for $target" 2
139 # Clear effective-target cache. This is useful after testing
140 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
142 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
143 # do a clear_effective_target_cache at the end as the target cache can
144 # make decisions based upon the flags, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init/asan_finish pair.
148 proc clear_effective_target_cache { } {
152 if {[info exists et_prop_list]} {
153 verbose "clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list {
155 unset et_cache($prop,value)
156 unset et_cache($prop,target)
162 # Like check_compile, but delete the output file and return true if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache {args} {
165 set result [eval check_compile $args]
166 set lines [lindex $result 0]
167 set output [lindex $result 1]
168 remote_file build delete $output
169 return [string match "" $lines]
172 # Like check_no_compiler_messages_nocache, but cache the result.
173 # PROP is the property we're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP, otherwise they satisfy it
185 # if they do match regular expression PATTERN. (PATTERN can start
186 # with something like "[!]" if the regular expression needs to match
187 # "!" as the first character.)
189 # Delete the output file before returning. The other arguments are
190 # as for check_compile.
191 proc check_no_messages_and_pattern_nocache {basename pattern args} {
194 set result [eval [list check_compile $basename] $args]
195 set lines [lindex $result 0]
196 set output [lindex $result 1]
199 if { [string match "" $lines] } {
200 set chan [open "$output"]
201 set invert [regexp {^!(.*)} $pattern dummy pattern]
202 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
206 remote_file build delete $output
210 # Like check_no_messages_and_pattern_nocache, but cache the result.
211 # PROP is the property we're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
240 remote_file build delete $output
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking, and doubles as a prefix for temporary
247 proc check_runtime {prop args} {
250 return [check_cached_effective_target $prop {
251 eval [list check_runtime_nocache $prop] $args
255 # Return 1 if GCC was configured with $pattern.
256 proc check_configured_with { pattern } {
259 set gcc_output [${tool}_target_compile "-v" "" "none" ""]
260 if { [ regexp "Configured with: \[^\n\]*$pattern" $gcc_output ] } {
261 verbose "Matched: $pattern" 2
265 verbose "Failed to match: $pattern" 2
269 ###############################
270 # proc check_weak_available { }
271 ###############################
273 # weak symbols are only supported in some configs/object formats
274 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
276 proc check_weak_available { } {
279 # All mips targets should support it
281 if { [ string first "mips" $target_cpu ] >= 0 } {
285 # All AIX targets should support it
287 if { [istarget *-*-aix*] } {
291 # All solaris2 targets should support it
293 if { [istarget *-*-solaris2*] } {
297 # Windows targets Cygwin and MingW32 support it
299 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
303 # HP-UX 10.X doesn't support it
305 if { [istarget hppa*-*-hpux10*] } {
309 # nvptx (nearly) supports it
311 if { [istarget nvptx-*-*] } {
315 # ELF and ECOFF support it. a.out does with gas/gld but may also with
316 # other linkers, so we should try it
318 set objformat [gcc_target_object_format]
326 unknown { return -1 }
331 ###############################
332 # proc check_weak_override_available { }
333 ###############################
335 # Like check_weak_available, but return 0 if weak symbol definitions
336 # cannot be overridden.
338 proc check_weak_override_available { } {
339 if { [istarget *-*-mingw*] } {
342 return [check_weak_available]
345 ###############################
346 # proc check_visibility_available { what_kind }
347 ###############################
349 # The visibility attribute is only support in some object formats
350 # This proc returns 1 if it is supported, 0 if not.
351 # The argument is the kind of visibility, default/protected/hidden/internal.
353 proc check_visibility_available { what_kind } {
354 if [string match "" $what_kind] { set what_kind "hidden" }
356 return [check_no_compiler_messages visibility_available_$what_kind object "
357 void f() __attribute__((visibility(\"$what_kind\")));
362 ###############################
363 # proc check_alias_available { }
364 ###############################
366 # Determine if the target toolchain supports the alias attribute.
368 # Returns 2 if the target supports aliases. Returns 1 if the target
369 # only supports weak aliased. Returns 0 if the target does not
370 # support aliases at all. Returns -1 if support for aliases could not
373 proc check_alias_available { } {
374 global alias_available_saved
377 if [info exists alias_available_saved] {
378 verbose "check_alias_available returning saved $alias_available_saved" 2
382 verbose "check_alias_available compiling testfile $src" 2
383 set f [open $src "w"]
384 # Compile a small test program. The definition of "g" is
385 # necessary to keep the Solaris assembler from complaining
387 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
388 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
390 set lines [${tool}_target_compile $src $obj object ""]
392 remote_file build delete $obj
394 if [string match "" $lines] then {
395 # No error messages, everything is OK.
396 set alias_available_saved 2
398 if [regexp "alias definitions not supported" $lines] {
399 verbose "check_alias_available target does not support aliases" 2
401 set objformat [gcc_target_object_format]
403 if { $objformat == "elf" } {
404 verbose "check_alias_available but target uses ELF format, so it ought to" 2
405 set alias_available_saved -1
407 set alias_available_saved 0
410 if [regexp "only weak aliases are supported" $lines] {
411 verbose "check_alias_available target supports only weak aliases" 2
412 set alias_available_saved 1
414 set alias_available_saved -1
419 verbose "check_alias_available returning $alias_available_saved" 2
422 return $alias_available_saved
425 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
427 proc check_effective_target_alias { } {
428 if { [check_alias_available] < 2 } {
435 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
437 proc check_ifunc_available { } {
438 return [check_no_compiler_messages ifunc_available object {
442 typedef void F (void);
444 void f () __attribute__ ((ifunc ("g")));
451 # Returns true if --gc-sections is supported on the target.
453 proc check_gc_sections_available { } {
454 global gc_sections_available_saved
457 if {![info exists gc_sections_available_saved]} {
458 # Some targets don't support gc-sections despite whatever's
459 # advertised by ld's options.
460 if { [istarget alpha*-*-*]
461 || [istarget ia64-*-*] } {
462 set gc_sections_available_saved 0
466 # elf2flt uses -q (--emit-relocs), which is incompatible with
468 if { [board_info target exists ldflags]
469 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
470 set gc_sections_available_saved 0
474 # VxWorks kernel modules are relocatable objects linked with -r,
475 # while RTP executables are linked with -q (--emit-relocs).
476 # Both of these options are incompatible with --gc-sections.
477 if { [istarget *-*-vxworks*] } {
478 set gc_sections_available_saved 0
482 # Check if the ld used by gcc supports --gc-sections.
483 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
484 set ld_output [remote_exec host "$gcc_ld" "--help"]
485 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
486 set gc_sections_available_saved 1
488 set gc_sections_available_saved 0
491 return $gc_sections_available_saved
494 # Return 1 if according to target_info struct and explicit target list
495 # target is supposed to support trampolines.
497 proc check_effective_target_trampolines { } {
498 if [target_info exists gcc,no_trampolines] {
501 if { [istarget avr-*-*]
502 || [istarget msp430-*-*]
503 || [istarget nvptx-*-*]
504 || [istarget hppa2.0w-hp-hpux11.23]
505 || [istarget hppa64-hp-hpux11.23] } {
511 # Return 1 if target has limited stack size.
513 proc check_effective_target_stack_size { } {
514 if [target_info exists gcc,stack_size] {
520 # Return the value attribute of an effective target, otherwise return 0.
522 proc dg-effective-target-value { effective_target } {
523 if { "$effective_target" == "stack_size" } {
524 if [check_effective_target_stack_size] {
525 return [target_info gcc,stack_size]
532 # Return 1 if signal.h is supported.
534 proc check_effective_target_signal { } {
535 if [target_info exists gcc,signal_suppress] {
541 # Return 1 if according to target_info struct and explicit target list
542 # target disables -fdelete-null-pointer-checks. Targets should return 0
543 # if they simply default to -fno-delete-null-pointer-checks but obey
544 # -fdelete-null-pointer-checks when passed explicitly (and tests that
545 # depend on this option should do that).
547 proc check_effective_target_keeps_null_pointer_checks { } {
548 if [target_info exists keeps_null_pointer_checks] {
551 if { [istarget avr-*-*]
552 || [istarget msp430-*-*] } {
558 # Return the autofdo profile wrapper
560 # Linux by default allows 516KB of perf event buffers
561 # in /proc/sys/kernel/perf_event_mlock_kb
562 # Each individual perf tries to grab it
563 # This causes problems with parallel test suite runs. Instead
564 # limit us to 8 pages (32K), which should be good enough
565 # for the small test programs. With the default settings
566 # this allows parallelism of 16 and higher of parallel gcc-auto-profile
567 proc profopt-perf-wrapper { } {
569 return "$srcdir/../config/i386/gcc-auto-profile -o perf.data -m8 "
572 # Return true if profiling is supported on the target.
574 proc check_profiling_available { test_what } {
575 global profiling_available_saved
577 verbose "Profiling argument is <$test_what>" 1
579 # These conditions depend on the argument so examine them before
580 # looking at the cache variable.
582 # Tree profiling requires TLS runtime support.
583 if { $test_what == "-fprofile-generate" } {
584 if { ![check_effective_target_tls_runtime] } {
589 if { $test_what == "-fauto-profile" } {
590 if { !([istarget i?86-*-linux*] || [istarget x86_64-*-linux*]) } {
591 verbose "autofdo only supported on linux"
594 # not cross compiling?
596 verbose "autofdo not supported for non native builds"
599 set event [profopt-perf-wrapper]
601 verbose "autofdo not supported"
605 set status [remote_exec host "$srcdir/../config/i386/gcc-auto-profile" "true -v >/dev/null"]
606 if { [lindex $status 0] != 0 } {
607 verbose "autofdo not supported because perf does not work"
611 # no good way to check this in advance -- check later instead.
612 #set status [remote_exec host "create_gcov" "2>/dev/null"]
613 #if { [lindex $status 0] != 255 } {
614 # verbose "autofdo not supported due to missing create_gcov"
619 # Support for -p on solaris2 relies on mcrt1.o which comes with the
620 # vendor compiler. We cannot reliably predict the directory where the
621 # vendor compiler (and thus mcrt1.o) is installed so we can't
622 # necessarily find mcrt1.o even if we have it.
623 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
627 # We don't yet support profiling for MIPS16.
628 if { [istarget mips*-*-*]
629 && ![check_effective_target_nomips16]
630 && ($test_what == "-p" || $test_what == "-pg") } {
634 # MinGW does not support -p.
635 if { [istarget *-*-mingw*] && $test_what == "-p" } {
639 # cygwin does not support -p.
640 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
644 # uClibc does not have gcrt1.o.
645 if { [check_effective_target_uclibc]
646 && ($test_what == "-p" || $test_what == "-pg") } {
650 # Now examine the cache variable.
651 if {![info exists profiling_available_saved]} {
652 # Some targets don't have any implementation of __bb_init_func or are
653 # missing other needed machinery.
654 if {[istarget aarch64*-*-elf]
655 || [istarget am3*-*-linux*]
656 || [istarget arm*-*-eabi*]
657 || [istarget arm*-*-elf]
658 || [istarget arm*-*-symbianelf*]
659 || [istarget avr-*-*]
660 || [istarget bfin-*-*]
661 || [istarget cris-*-*]
662 || [istarget crisv32-*-*]
663 || [istarget fido-*-elf]
664 || [istarget h8300-*-*]
665 || [istarget lm32-*-*]
666 || [istarget m32c-*-elf]
667 || [istarget m68k-*-elf]
668 || [istarget m68k-*-uclinux*]
669 || [istarget mips*-*-elf*]
670 || [istarget mmix-*-*]
671 || [istarget mn10300-*-elf*]
672 || [istarget moxie-*-elf*]
673 || [istarget msp430-*-*]
674 || [istarget nds32*-*-elf]
675 || [istarget nios2-*-elf]
676 || [istarget nvptx-*-*]
677 || [istarget powerpc-*-eabi*]
678 || [istarget powerpc-*-elf]
680 || [istarget tic6x-*-elf]
681 || [istarget visium-*-*]
682 || [istarget xstormy16-*]
683 || [istarget xtensa*-*-elf]
684 || [istarget *-*-rtems*]
685 || [istarget *-*-vxworks*] } {
686 set profiling_available_saved 0
688 set profiling_available_saved 1
692 # -pg link test result can't be cached since it may change between
694 set profiling_working $profiling_available_saved
695 if { $profiling_available_saved == 1
696 && ![check_no_compiler_messages_nocache profiling executable {
697 int main() { return 0; } } "-pg"] } {
698 set profiling_working 0
701 return $profiling_working
704 # Check to see if a target is "freestanding". This is as per the definition
705 # in Section 4 of C99 standard. Effectively, it is a target which supports no
706 # extra headers or libraries other than what is considered essential.
707 proc check_effective_target_freestanding { } {
708 if { [istarget nvptx-*-*] } {
714 # Return 1 if target has packed layout of structure members by
715 # default, 0 otherwise. Note that this is slightly different than
716 # whether the target has "natural alignment": both attributes may be
719 proc check_effective_target_default_packed { } {
720 return [check_no_compiler_messages default_packed assembly {
721 struct x { char a; long b; } c;
722 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
726 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
727 # documentation, where the test also comes from.
729 proc check_effective_target_pcc_bitfield_type_matters { } {
730 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
731 # bitfields, but let's stick to the example code from the docs.
732 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
733 struct foo1 { char x; char :0; char y; };
734 struct foo2 { char x; int :0; char y; };
735 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
739 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
741 proc add_options_for_tls { flags } {
742 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
743 # libthread, so always pass -pthread for native TLS. Same for AIX.
744 # Need to duplicate native TLS check from
745 # check_effective_target_tls_native to avoid recursion.
746 if { ([istarget powerpc-ibm-aix*]) &&
747 [check_no_messages_and_pattern tls_native "!emutls" assembly {
749 int f (void) { return i; }
750 void g (int j) { i = j; }
752 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
757 # Return 1 if indirect jumps are supported, 0 otherwise.
759 proc check_effective_target_indirect_jumps {} {
760 if { [istarget nvptx-*-*] } {
766 # Return 1 if nonlocal goto is supported, 0 otherwise.
768 proc check_effective_target_nonlocal_goto {} {
769 if { [istarget nvptx-*-*] } {
775 # Return 1 if global constructors are supported, 0 otherwise.
777 proc check_effective_target_global_constructor {} {
778 if { [istarget nvptx-*-*] } {
784 # Return 1 if taking label values is supported, 0 otherwise.
786 proc check_effective_target_label_values {} {
787 if { [istarget nvptx-*-*] || [target_info exists gcc,no_label_values] } {
794 # Return 1 if builtin_return_address and builtin_frame_address are
795 # supported, 0 otherwise.
797 proc check_effective_target_return_address {} {
798 if { [istarget nvptx-*-*] } {
804 # Return 1 if the assembler does not verify function types against
805 # calls, 0 otherwise. Such verification will typically show up problems
806 # with K&R C function declarations.
808 proc check_effective_target_untyped_assembly {} {
809 if { [istarget nvptx-*-*] } {
815 # Return 1 if alloca is supported, 0 otherwise.
817 proc check_effective_target_alloca {} {
818 if { [istarget nvptx-*-*] } {
819 return [check_no_compiler_messages alloca assembly {
821 void g (int n) { f (__builtin_alloca (n)); }
827 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
829 proc check_effective_target_tls {} {
830 return [check_no_compiler_messages tls assembly {
832 int f (void) { return i; }
833 void g (int j) { i = j; }
837 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
839 proc check_effective_target_tls_native {} {
840 # VxWorks uses emulated TLS machinery, but with non-standard helper
841 # functions, so we fail to automatically detect it.
842 if { [istarget *-*-vxworks*] } {
846 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
848 int f (void) { return i; }
849 void g (int j) { i = j; }
853 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
855 proc check_effective_target_tls_emulated {} {
856 # VxWorks uses emulated TLS machinery, but with non-standard helper
857 # functions, so we fail to automatically detect it.
858 if { [istarget *-*-vxworks*] } {
862 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
864 int f (void) { return i; }
865 void g (int j) { i = j; }
869 # Return 1 if TLS executables can run correctly, 0 otherwise.
871 proc check_effective_target_tls_runtime {} {
872 # The runtime does not have TLS support, but just
873 # running the test below is insufficient to show this.
874 if { [istarget msp430-*-*] || [istarget visium-*-*] } {
877 return [check_runtime tls_runtime {
878 __thread int thr = 0;
879 int main (void) { return thr; }
880 } [add_options_for_tls ""]]
883 # Return 1 if atomic compare-and-swap is supported on 'int'
885 proc check_effective_target_cas_char {} {
886 return [check_no_compiler_messages cas_char assembly {
887 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
893 proc check_effective_target_cas_int {} {
894 return [check_no_compiler_messages cas_int assembly {
895 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
897 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
905 # Return 1 if -ffunction-sections is supported, 0 otherwise.
907 proc check_effective_target_function_sections {} {
908 # Darwin has its own scheme and silently accepts -ffunction-sections.
909 if { [istarget *-*-darwin*] } {
913 return [check_no_compiler_messages functionsections assembly {
915 } "-ffunction-sections"]
918 # Return 1 if instruction scheduling is available, 0 otherwise.
920 proc check_effective_target_scheduling {} {
921 return [check_no_compiler_messages scheduling object {
923 } "-fschedule-insns"]
926 # Return 1 if trapping arithmetic is available, 0 otherwise.
928 proc check_effective_target_trapping {} {
929 return [check_no_compiler_messages trapping object {
930 int add (int a, int b) { return a + b; }
934 # Return 1 if compilation with -fgraphite is error-free for trivial
937 proc check_effective_target_fgraphite {} {
938 return [check_no_compiler_messages fgraphite object {
943 # Return 1 if compilation with -fopenacc is error-free for trivial
946 proc check_effective_target_fopenacc {} {
947 # nvptx can be built with the device-side bits of openacc, but it
948 # does not make sense to test it as an openacc host.
949 if [istarget nvptx-*-*] { return 0 }
951 return [check_no_compiler_messages fopenacc object {
956 # Return 1 if compilation with -fopenmp is error-free for trivial
959 proc check_effective_target_fopenmp {} {
960 # nvptx can be built with the device-side bits of libgomp, but it
961 # does not make sense to test it as an openmp host.
962 if [istarget nvptx-*-*] { return 0 }
964 return [check_no_compiler_messages fopenmp object {
969 # Return 1 if compilation with -fgnu-tm is error-free for trivial
972 proc check_effective_target_fgnu_tm {} {
973 return [check_no_compiler_messages fgnu_tm object {
978 # Return 1 if the target supports mmap, 0 otherwise.
980 proc check_effective_target_mmap {} {
981 return [check_function_available "mmap"]
984 # Return 1 if the target supports dlopen, 0 otherwise.
985 proc check_effective_target_dlopen {} {
986 return [check_no_compiler_messages dlopen executable {
988 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
989 } [add_options_for_dlopen ""]]
992 proc add_options_for_dlopen { flags } {
996 # Return 1 if the target supports clone, 0 otherwise.
997 proc check_effective_target_clone {} {
998 return [check_function_available "clone"]
1001 # Return 1 if the target supports setrlimit, 0 otherwise.
1002 proc check_effective_target_setrlimit {} {
1003 # Darwin has non-posix compliant RLIMIT_AS
1004 if { [istarget *-*-darwin*] } {
1007 return [check_function_available "setrlimit"]
1010 # Return 1 if the target supports gettimeofday, 0 otherwise.
1011 proc check_effective_target_gettimeofday {} {
1012 return [check_function_available "gettimeofday"]
1015 # Return 1 if the target supports swapcontext, 0 otherwise.
1016 proc check_effective_target_swapcontext {} {
1017 return [check_no_compiler_messages swapcontext executable {
1018 #include <ucontext.h>
1021 ucontext_t orig_context,child_context;
1022 if (swapcontext(&child_context, &orig_context) < 0) { }
1027 # Return 1 if compilation with -pthread is error-free for trivial
1028 # code, 0 otherwise.
1030 proc check_effective_target_pthread {} {
1031 return [check_no_compiler_messages pthread object {
1036 # Return 1 if compilation with -gstabs is error-free for trivial
1037 # code, 0 otherwise.
1039 proc check_effective_target_stabs {} {
1040 return [check_no_compiler_messages stabs object {
1045 # Return 1 if compilation with -mpe-aligned-commons is error-free
1046 # for trivial code, 0 otherwise.
1048 proc check_effective_target_pe_aligned_commons {} {
1049 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
1050 return [check_no_compiler_messages pe_aligned_commons object {
1052 } "-mpe-aligned-commons"]
1057 # Return 1 if the target supports -static
1058 proc check_effective_target_static {} {
1059 return [check_no_compiler_messages static executable {
1060 int main (void) { return 0; }
1064 # Return 1 if the target supports -fstack-protector
1065 proc check_effective_target_fstack_protector {} {
1066 return [check_runtime fstack_protector {
1067 int main (void) { return 0; }
1068 } "-fstack-protector"]
1071 # Return 1 if the target supports -fstack-check or -fstack-check=$stack_kind
1072 proc check_stack_check_available { stack_kind } {
1073 if [string match "" $stack_kind] then {
1074 set stack_opt "-fstack-check"
1075 } else { set stack_opt "-fstack-check=$stack_kind" }
1077 return [check_no_compiler_messages stack_check_$stack_kind executable {
1078 int main (void) { return 0; }
1082 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
1083 # for trivial code, 0 otherwise. As some targets (ARM for example) only
1084 # warn when -fprofile-use is also supplied we test that combination too.
1086 proc check_effective_target_freorder {} {
1087 if { [check_no_compiler_messages freorder object {
1089 } "-freorder-blocks-and-partition"]
1090 && [check_no_compiler_messages fprofile_use_freorder object {
1092 } "-fprofile-use -freorder-blocks-and-partition"] } {
1098 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
1099 # emitted, 0 otherwise. Whether a shared library can actually be built is
1100 # out of scope for this test.
1102 proc check_effective_target_fpic { } {
1103 # Note that M68K has a multilib that supports -fpic but not
1104 # -fPIC, so we need to check both. We test with a program that
1105 # requires GOT references.
1106 foreach arg {fpic fPIC} {
1107 if [check_no_compiler_messages $arg object {
1108 extern int foo (void); extern int bar;
1109 int baz (void) { return foo () + bar; }
1117 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
1118 # silently. So, we can't rely on above "check_effective_target_fpic" as it
1119 # assumes compiler will give warning if -fpic not supported. Here we check
1120 # whether binutils supports those new -fpic relocation modifiers, and assume
1121 # -fpic is supported if there is binutils support. GCC configuration will
1122 # enable -fpic for AArch64 in this case.
1124 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1125 # memory model -fpic relocation types.
1127 proc check_effective_target_aarch64_small_fpic { } {
1128 if { [istarget aarch64*-*-*] } {
1129 return [check_no_compiler_messages aarch64_small_fpic object {
1130 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1137 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1138 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1139 # in binutils since 2015-03-04 as PR gas/17843.
1141 # This test directive make sure binutils support all features needed by TLS LE
1142 # under -mtls-size=32 on AArch64.
1144 proc check_effective_target_aarch64_tlsle32 { } {
1145 if { [istarget aarch64*-*-*] } {
1146 return [check_no_compiler_messages aarch64_tlsle32 object {
1147 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1154 # Return 1 if -shared is supported, as in no warnings or errors
1155 # emitted, 0 otherwise.
1157 proc check_effective_target_shared { } {
1158 # Note that M68K has a multilib that supports -fpic but not
1159 # -fPIC, so we need to check both. We test with a program that
1160 # requires GOT references.
1161 return [check_no_compiler_messages shared executable {
1162 extern int foo (void); extern int bar;
1163 int baz (void) { return foo () + bar; }
1167 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1169 proc check_effective_target_pie { } {
1170 if { [istarget *-*-darwin\[912\]*]
1171 || [istarget *-*-dragonfly*]
1172 || [istarget *-*-freebsd*]
1173 || [istarget *-*-linux*]
1174 || [istarget *-*-gnu*] } {
1177 if { [istarget *-*-solaris2.1\[1-9\]*] } {
1178 # Full PIE support was added in Solaris 11.x and Solaris 12, but gcc
1179 # errors out if missing, so check for that.
1180 return [check_no_compiler_messages pie executable {
1181 int main (void) { return 0; }
1187 # Return true if the target supports -mpaired-single (as used on MIPS).
1189 proc check_effective_target_mpaired_single { } {
1190 return [check_no_compiler_messages mpaired_single object {
1192 } "-mpaired-single"]
1195 # Return true if the target has access to FPU instructions.
1197 proc check_effective_target_hard_float { } {
1198 if { [istarget mips*-*-*] } {
1199 return [check_no_compiler_messages hard_float assembly {
1200 #if (defined __mips_soft_float || defined __mips16)
1201 #error __mips_soft_float || __mips16
1206 # This proc is actually checking the availabilty of FPU
1207 # support for doubles, so on the RX we must fail if the
1208 # 64-bit double multilib has been selected.
1209 if { [istarget rx-*-*] } {
1211 # return [check_no_compiler_messages hard_float assembly {
1212 #if defined __RX_64_BIT_DOUBLES__
1213 #error __RX_64_BIT_DOUBLES__
1218 # The generic test equates hard_float with "no call for adding doubles".
1219 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1220 double a (double b, double c) { return b + c; }
1224 # Return true if the target is a 64-bit MIPS target.
1226 proc check_effective_target_mips64 { } {
1227 return [check_no_compiler_messages mips64 assembly {
1234 # Return true if the target is a MIPS target that does not produce
1237 proc check_effective_target_nomips16 { } {
1238 return [check_no_compiler_messages nomips16 object {
1242 /* A cheap way of testing for -mflip-mips16. */
1243 void foo (void) { asm ("addiu $20,$20,1"); }
1244 void bar (void) { asm ("addiu $20,$20,1"); }
1249 # Add the options needed for MIPS16 function attributes. At the moment,
1250 # we don't support MIPS16 PIC.
1252 proc add_options_for_mips16_attribute { flags } {
1253 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1256 # Return true if we can force a mode that allows MIPS16 code generation.
1257 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1260 proc check_effective_target_mips16_attribute { } {
1261 return [check_no_compiler_messages mips16_attribute assembly {
1265 #if defined __mips_hard_float \
1266 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1267 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1268 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1270 } [add_options_for_mips16_attribute ""]]
1273 # Return 1 if the target supports long double larger than double when
1274 # using the new ABI, 0 otherwise.
1276 proc check_effective_target_mips_newabi_large_long_double { } {
1277 return [check_no_compiler_messages mips_newabi_large_long_double object {
1278 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1282 # Return true if the target is a MIPS target that has access
1283 # to the LL and SC instructions.
1285 proc check_effective_target_mips_llsc { } {
1286 if { ![istarget mips*-*-*] } {
1289 # Assume that these instructions are always implemented for
1290 # non-elf* targets, via emulation if necessary.
1291 if { ![istarget *-*-elf*] } {
1294 # Otherwise assume LL/SC support for everything but MIPS I.
1295 return [check_no_compiler_messages mips_llsc assembly {
1302 # Return true if the target is a MIPS target that uses in-place relocations.
1304 proc check_effective_target_mips_rel { } {
1305 if { ![istarget mips*-*-*] } {
1308 return [check_no_compiler_messages mips_rel object {
1309 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1310 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1311 #error _ABIN32 && (_ABIN32 || _ABI64)
1316 # Return true if the target is a MIPS target that uses the EABI.
1318 proc check_effective_target_mips_eabi { } {
1319 if { ![istarget mips*-*-*] } {
1322 return [check_no_compiler_messages mips_eabi object {
1329 # Return 1 if the current multilib does not generate PIC by default.
1331 proc check_effective_target_nonpic { } {
1332 return [check_no_compiler_messages nonpic assembly {
1339 # Return 1 if the current multilib generates PIE by default.
1341 proc check_effective_target_pie_enabled { } {
1342 return [check_no_compiler_messages pie_enabled assembly {
1349 # Return 1 if the target generates -fstack-protector by default.
1351 proc check_effective_target_fstack_protector_enabled {} {
1352 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1353 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1354 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1360 # Return 1 if the target does not use a status wrapper.
1362 proc check_effective_target_unwrapped { } {
1363 if { [target_info needs_status_wrapper] != "" \
1364 && [target_info needs_status_wrapper] != "0" } {
1370 # Return true if iconv is supported on the target. In particular IBM1047.
1372 proc check_iconv_available { test_what } {
1375 # If the tool configuration file has not set libiconv, try "-liconv"
1376 if { ![info exists libiconv] } {
1377 set libiconv "-liconv"
1379 set test_what [lindex $test_what 1]
1380 return [check_runtime_nocache $test_what [subst {
1386 cd = iconv_open ("$test_what", "UTF-8");
1387 if (cd == (iconv_t) -1)
1394 # Return true if Cilk Library is supported on the target.
1395 proc check_effective_target_cilkplus_runtime { } {
1396 return [ check_no_compiler_messages_nocache cilkplus_runtime executable {
1400 int __cilkrts_set_param (const char *, const char *);
1402 int x = __cilkrts_set_param ("nworkers", "0");
1405 } "-fcilkplus -lcilkrts" ]
1408 # Return true if the atomic library is supported on the target.
1409 proc check_effective_target_libatomic_available { } {
1410 return [check_no_compiler_messages libatomic_available executable {
1411 int main (void) { return 0; }
1415 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1417 proc check_ascii_locale_available { } {
1421 # Return true if named sections are supported on this target.
1423 proc check_named_sections_available { } {
1424 return [check_no_compiler_messages named_sections assembly {
1425 int __attribute__ ((section("whatever"))) foo;
1429 # Return true if the "naked" function attribute is supported on this target.
1431 proc check_effective_target_naked_functions { } {
1432 return [check_no_compiler_messages naked_functions assembly {
1433 void f() __attribute__((naked));
1437 # Return 1 if the target supports Fortran real kinds larger than real(8),
1440 # When the target name changes, replace the cached result.
1442 proc check_effective_target_fortran_large_real { } {
1443 return [check_no_compiler_messages fortran_large_real executable {
1445 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1452 # Return 1 if the target supports Fortran real kind real(16),
1453 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1454 # this checks for Real(16) only; the other returned real(10) if
1455 # both real(10) and real(16) are available.
1457 # When the target name changes, replace the cached result.
1459 proc check_effective_target_fortran_real_16 { } {
1460 return [check_no_compiler_messages fortran_real_16 executable {
1468 # Return 1 if the target supports Fortran real kind 10,
1469 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1470 # this checks for real(10) only.
1472 # When the target name changes, replace the cached result.
1474 proc check_effective_target_fortran_real_10 { } {
1475 return [check_no_compiler_messages fortran_real_10 executable {
1483 # Return 1 if the target supports Fortran's IEEE modules,
1486 # When the target name changes, replace the cached result.
1488 proc check_effective_target_fortran_ieee { flags } {
1489 return [check_no_compiler_messages fortran_ieee executable {
1491 use, intrinsic :: ieee_features
1497 # Return 1 if the target supports SQRT for the largest floating-point
1498 # type. (Some targets lack the libm support for this FP type.)
1499 # On most targets, this check effectively checks either whether sqrtl is
1500 # available or on __float128 systems whether libquadmath is installed,
1501 # which provides sqrtq.
1503 # When the target name changes, replace the cached result.
1505 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1506 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1508 use iso_fortran_env, only: real_kinds
1509 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1510 real(kind=maxFP), volatile :: x
1518 # Return 1 if the target supports Fortran integer kinds larger than
1519 # integer(8), 0 otherwise.
1521 # When the target name changes, replace the cached result.
1523 proc check_effective_target_fortran_large_int { } {
1524 return [check_no_compiler_messages fortran_large_int executable {
1526 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1527 integer(kind=k) :: i
1532 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1534 # When the target name changes, replace the cached result.
1536 proc check_effective_target_fortran_integer_16 { } {
1537 return [check_no_compiler_messages fortran_integer_16 executable {
1544 # Return 1 if we can statically link libgfortran, 0 otherwise.
1546 # When the target name changes, replace the cached result.
1548 proc check_effective_target_static_libgfortran { } {
1549 return [check_no_compiler_messages static_libgfortran executable {
1556 # Return 1 if we can use the -rdynamic option, 0 otherwise.
1558 proc check_effective_target_rdynamic { } {
1559 return [check_no_compiler_messages rdynamic executable {
1560 int main() { return 0; }
1564 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1566 proc check_effective_target_cilkplus { } {
1567 # Skip cilk-plus tests on int16 and size16 targets for now.
1568 # The cilk-plus tests are not generic enough to cover these
1569 # cases and would throw hundreds of FAILs.
1570 if { [check_effective_target_int16]
1571 || ![check_effective_target_size32plus] } {
1575 # Skip AVR, its RAM is too small and too many tests would fail.
1576 if { [istarget avr-*-*] } {
1580 if { ! [check_effective_target_pthread] } {
1587 proc check_linker_plugin_available { } {
1588 return [check_no_compiler_messages_nocache linker_plugin executable {
1589 int main() { return 0; }
1590 } "-flto -fuse-linker-plugin"]
1593 # Return 1 if the target OS supports running SSE executables, 0
1594 # otherwise. Cache the result.
1596 proc check_sse_os_support_available { } {
1597 return [check_cached_effective_target sse_os_support_available {
1598 # If this is not the right target then we can skip the test.
1599 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1601 } elseif { [istarget i?86-*-solaris2*] } {
1602 # The Solaris 2 kernel doesn't save and restore SSE registers
1603 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1604 check_runtime_nocache sse_os_support_available {
1607 asm volatile ("movaps %xmm0,%xmm0");
1617 # Return 1 if the target OS supports running AVX executables, 0
1618 # otherwise. Cache the result.
1620 proc check_avx_os_support_available { } {
1621 return [check_cached_effective_target avx_os_support_available {
1622 # If this is not the right target then we can skip the test.
1623 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1626 # Check that OS has AVX and SSE saving enabled.
1627 check_runtime_nocache avx_os_support_available {
1630 unsigned int eax, edx;
1632 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1633 return (eax & 0x06) != 0x06;
1640 # Return 1 if the target OS supports running AVX executables, 0
1641 # otherwise. Cache the result.
1643 proc check_avx512_os_support_available { } {
1644 return [check_cached_effective_target avx512_os_support_available {
1645 # If this is not the right target then we can skip the test.
1646 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1649 # Check that OS has AVX512, AVX and SSE saving enabled.
1650 check_runtime_nocache avx512_os_support_available {
1653 unsigned int eax, edx;
1655 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1656 return (eax & 0xe6) != 0xe6;
1663 # Return 1 if the target supports executing SSE instructions, 0
1664 # otherwise. Cache the result.
1666 proc check_sse_hw_available { } {
1667 return [check_cached_effective_target sse_hw_available {
1668 # If this is not the right target then we can skip the test.
1669 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1672 check_runtime_nocache sse_hw_available {
1676 unsigned int eax, ebx, ecx, edx;
1677 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1680 return !(edx & bit_SSE);
1687 # Return 1 if the target supports executing SSE2 instructions, 0
1688 # otherwise. Cache the result.
1690 proc check_sse2_hw_available { } {
1691 return [check_cached_effective_target sse2_hw_available {
1692 # If this is not the right target then we can skip the test.
1693 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1696 check_runtime_nocache sse2_hw_available {
1700 unsigned int eax, ebx, ecx, edx;
1701 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1704 return !(edx & bit_SSE2);
1711 # Return 1 if the target supports executing SSE4 instructions, 0
1712 # otherwise. Cache the result.
1714 proc check_sse4_hw_available { } {
1715 return [check_cached_effective_target sse4_hw_available {
1716 # If this is not the right target then we can skip the test.
1717 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1720 check_runtime_nocache sse4_hw_available {
1724 unsigned int eax, ebx, ecx, edx;
1725 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1728 return !(ecx & bit_SSE4_2);
1735 # Return 1 if the target supports executing AVX instructions, 0
1736 # otherwise. Cache the result.
1738 proc check_avx_hw_available { } {
1739 return [check_cached_effective_target avx_hw_available {
1740 # If this is not the right target then we can skip the test.
1741 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1744 check_runtime_nocache avx_hw_available {
1748 unsigned int eax, ebx, ecx, edx;
1749 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1752 return ((ecx & (bit_AVX | bit_OSXSAVE))
1753 != (bit_AVX | bit_OSXSAVE));
1760 # Return 1 if the target supports executing AVX2 instructions, 0
1761 # otherwise. Cache the result.
1763 proc check_avx2_hw_available { } {
1764 return [check_cached_effective_target avx2_hw_available {
1765 # If this is not the right target then we can skip the test.
1766 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1769 check_runtime_nocache avx2_hw_available {
1774 unsigned int eax, ebx, ecx, edx;
1776 if (__get_cpuid_max (0, NULL) < 7)
1779 __cpuid (1, eax, ebx, ecx, edx);
1781 if (!(ecx & bit_OSXSAVE))
1784 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1786 return !(ebx & bit_AVX2);
1793 # Return 1 if the target supports executing AVX512 foundation instructions, 0
1794 # otherwise. Cache the result.
1796 proc check_avx512f_hw_available { } {
1797 return [check_cached_effective_target avx512f_hw_available {
1798 # If this is not the right target then we can skip the test.
1799 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1802 check_runtime_nocache avx512f_hw_available {
1807 unsigned int eax, ebx, ecx, edx;
1809 if (__get_cpuid_max (0, NULL) < 7)
1812 __cpuid (1, eax, ebx, ecx, edx);
1814 if (!(ecx & bit_OSXSAVE))
1817 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1819 return !(ebx & bit_AVX512F);
1826 # Return 1 if the target supports running SSE executables, 0 otherwise.
1828 proc check_effective_target_sse_runtime { } {
1829 if { [check_effective_target_sse]
1830 && [check_sse_hw_available]
1831 && [check_sse_os_support_available] } {
1837 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1839 proc check_effective_target_sse2_runtime { } {
1840 if { [check_effective_target_sse2]
1841 && [check_sse2_hw_available]
1842 && [check_sse_os_support_available] } {
1848 # Return 1 if the target supports running SSE4 executables, 0 otherwise.
1850 proc check_effective_target_sse4_runtime { } {
1851 if { [check_effective_target_sse4]
1852 && [check_sse4_hw_available]
1853 && [check_sse_os_support_available] } {
1859 # Return 1 if the target supports running AVX executables, 0 otherwise.
1861 proc check_effective_target_avx_runtime { } {
1862 if { [check_effective_target_avx]
1863 && [check_avx_hw_available]
1864 && [check_avx_os_support_available] } {
1870 # Return 1 if the target supports running AVX2 executables, 0 otherwise.
1872 proc check_effective_target_avx2_runtime { } {
1873 if { [check_effective_target_avx2]
1874 && [check_avx2_hw_available]
1875 && [check_avx_os_support_available] } {
1881 # Return 1 if the target supports running AVX512f executables, 0 otherwise.
1883 proc check_effective_target_avx512f_runtime { } {
1884 if { [check_effective_target_avx512f]
1885 && [check_avx512f_hw_available]
1886 && [check_avx512_os_support_available] } {
1892 # Return 1 if the target supports executing MIPS Paired-Single instructions,
1893 # 0 otherwise. Cache the result.
1895 proc check_mpaired_single_hw_available { } {
1896 return [check_cached_effective_target mpaired_single_hw_available {
1897 # If this is not the right target then we can skip the test.
1898 if { !([istarget mips*-*-*]) } {
1901 check_runtime_nocache mpaired_single_hw_available {
1904 asm volatile ("pll.ps $f2,$f4,$f6");
1912 # Return 1 if the target supports executing Loongson vector instructions,
1913 # 0 otherwise. Cache the result.
1915 proc check_mips_loongson_hw_available { } {
1916 return [check_cached_effective_target mips_loongson_hw_available {
1917 # If this is not the right target then we can skip the test.
1918 if { !([istarget mips*-*-*]) } {
1921 check_runtime_nocache mips_loongson_hw_available {
1922 #include <loongson.h>
1925 asm volatile ("paddw $f2,$f4,$f6");
1933 # Return 1 if the target supports executing MIPS MSA instructions, 0
1934 # otherwise. Cache the result.
1936 proc check_mips_msa_hw_available { } {
1937 return [check_cached_effective_target mips_msa_hw_available {
1938 # If this is not the right target then we can skip the test.
1939 if { !([istarget mips*-*-*]) } {
1942 check_runtime_nocache mips_msa_hw_available {
1943 #if !defined(__mips_msa)
1944 #error "MSA NOT AVAIL"
1946 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
1947 #error "MSA NOT AVAIL FOR ISA REV < 2"
1949 #if !defined(__mips_hard_float)
1950 #error "MSA HARD_FLOAT REQUIRED"
1952 #if __mips_fpr != 64
1953 #error "MSA 64-bit FPR REQUIRED"
1959 v8i16 v = __builtin_msa_ldi_h (0);
1969 # Return 1 if the target supports running MIPS Paired-Single
1970 # executables, 0 otherwise.
1972 proc check_effective_target_mpaired_single_runtime { } {
1973 if { [check_effective_target_mpaired_single]
1974 && [check_mpaired_single_hw_available] } {
1980 # Return 1 if the target supports running Loongson executables, 0 otherwise.
1982 proc check_effective_target_mips_loongson_runtime { } {
1983 if { [check_effective_target_mips_loongson]
1984 && [check_mips_loongson_hw_available] } {
1990 # Return 1 if the target supports running MIPS MSA executables, 0 otherwise.
1992 proc check_effective_target_mips_msa_runtime { } {
1993 if { [check_effective_target_mips_msa]
1994 && [check_mips_msa_hw_available] } {
2000 # Return 1 if we are compiling for 64-bit PowerPC but we do not use direct
2001 # move instructions for moves from GPR to FPR.
2003 proc check_effective_target_powerpc64_no_dm { } {
2004 # The "mulld" checks if we are generating PowerPC64 code. The "lfd"
2005 # checks if we do not use direct moves, but use the old-fashioned
2006 # slower move-via-the-stack.
2007 return [check_no_messages_and_pattern powerpc64_no_dm \
2008 {\mmulld\M.*\mlfd} assembly {
2009 double f(long long x) { return x*x; }
2013 # Return 1 if the target supports the __builtin_cpu_supports built-in,
2014 # including having a new enough library to support the test. Cache the result.
2015 # Require at least a power7 to run on.
2017 proc check_ppc_cpu_supports_hw_available { } {
2018 return [check_cached_effective_target ppc_cpu_supports_hw_available {
2019 # Some simulators are known to not support VSX/power8 instructions.
2020 # For now, disable on Darwin
2021 if { [istarget powerpc-*-eabi]
2022 || [istarget powerpc*-*-eabispe]
2023 || [istarget *-*-darwin*]} {
2027 check_runtime_nocache ppc_cpu_supports_hw_available {
2031 asm volatile ("xxlor vs0,vs0,vs0");
2033 asm volatile ("xxlor 0,0,0");
2035 if (!__builtin_cpu_supports ("vsx"))
2044 # Return 1 if the target supports executing 750CL paired-single instructions, 0
2045 # otherwise. Cache the result.
2047 proc check_750cl_hw_available { } {
2048 return [check_cached_effective_target 750cl_hw_available {
2049 # If this is not the right target then we can skip the test.
2050 if { ![istarget powerpc-*paired*] } {
2053 check_runtime_nocache 750cl_hw_available {
2057 asm volatile ("ps_mul v0,v0,v0");
2059 asm volatile ("ps_mul 0,0,0");
2068 # Return 1 if the target supports executing power8 vector instructions, 0
2069 # otherwise. Cache the result.
2071 proc check_p8vector_hw_available { } {
2072 return [check_cached_effective_target p8vector_hw_available {
2073 # Some simulators are known to not support VSX/power8 instructions.
2074 # For now, disable on Darwin
2075 if { [istarget powerpc-*-eabi]
2076 || [istarget powerpc*-*-eabispe]
2077 || [istarget *-*-darwin*]} {
2080 set options "-mpower8-vector"
2081 check_runtime_nocache p8vector_hw_available {
2085 asm volatile ("xxlorc vs0,vs0,vs0");
2087 asm volatile ("xxlorc 0,0,0");
2096 # Return 1 if the target supports executing power9 vector instructions, 0
2097 # otherwise. Cache the result.
2099 proc check_p9vector_hw_available { } {
2100 return [check_cached_effective_target p9vector_hw_available {
2101 # Some simulators are known to not support VSX/power8/power9
2102 # instructions. For now, disable on Darwin.
2103 if { [istarget powerpc-*-eabi]
2104 || [istarget powerpc*-*-eabispe]
2105 || [istarget *-*-darwin*]} {
2108 set options "-mpower9-vector"
2109 check_runtime_nocache p9vector_hw_available {
2113 vector double v = (vector double) { 0.0, 0.0 };
2114 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
2122 # Return 1 if the target supports executing power9 modulo instructions, 0
2123 # otherwise. Cache the result.
2125 proc check_p9modulo_hw_available { } {
2126 return [check_cached_effective_target p9modulo_hw_available {
2127 # Some simulators are known to not support VSX/power8/power9
2128 # instructions. For now, disable on Darwin.
2129 if { [istarget powerpc-*-eabi]
2130 || [istarget powerpc*-*-eabispe]
2131 || [istarget *-*-darwin*]} {
2134 set options "-mmodulo"
2135 check_runtime_nocache p9modulo_hw_available {
2138 int i = 5, j = 3, r = -1;
2139 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
2147 # Return 1 if the target supports executing __float128 on PowerPC via software
2148 # emulation, 0 otherwise. Cache the result.
2150 proc check_ppc_float128_sw_available { } {
2151 return [check_cached_effective_target ppc_float128_sw_available {
2152 # Some simulators are known to not support VSX/power8/power9
2153 # instructions. For now, disable on Darwin.
2154 if { [istarget powerpc-*-eabi]
2155 || [istarget powerpc*-*-eabispe]
2156 || [istarget *-*-darwin*]} {
2159 set options "-mfloat128 -mvsx"
2160 check_runtime_nocache ppc_float128_sw_available {
2161 volatile __float128 x = 1.0q;
2162 volatile __float128 y = 2.0q;
2165 __float128 z = x + y;
2173 # Return 1 if the target supports executing __float128 on PowerPC via power9
2174 # hardware instructions, 0 otherwise. Cache the result.
2176 proc check_ppc_float128_hw_available { } {
2177 return [check_cached_effective_target ppc_float128_hw_available {
2178 # Some simulators are known to not support VSX/power8/power9
2179 # instructions. For now, disable on Darwin.
2180 if { [istarget powerpc-*-eabi]
2181 || [istarget powerpc*-*-eabispe]
2182 || [istarget *-*-darwin*]} {
2185 set options "-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
2186 check_runtime_nocache ppc_float128_hw_available {
2187 volatile __float128 x = 1.0q;
2188 volatile __float128 y = 2.0q;
2191 __float128 z = x + y;
2192 __float128 w = -1.0q;
2194 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
2195 return ((z != 3.0q) || (z != w);
2202 # Return 1 if the target supports executing VSX instructions, 0
2203 # otherwise. Cache the result.
2205 proc check_vsx_hw_available { } {
2206 return [check_cached_effective_target vsx_hw_available {
2207 # Some simulators are known to not support VSX instructions.
2208 # For now, disable on Darwin
2209 if { [istarget powerpc-*-eabi]
2210 || [istarget powerpc*-*-eabispe]
2211 || [istarget *-*-darwin*]} {
2215 check_runtime_nocache vsx_hw_available {
2219 asm volatile ("xxlor vs0,vs0,vs0");
2221 asm volatile ("xxlor 0,0,0");
2230 # Return 1 if the target supports executing AltiVec instructions, 0
2231 # otherwise. Cache the result.
2233 proc check_vmx_hw_available { } {
2234 return [check_cached_effective_target vmx_hw_available {
2235 # Some simulators are known to not support VMX instructions.
2236 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
2239 # Most targets don't require special flags for this test case, but
2240 # Darwin does. Just to be sure, make sure VSX is not enabled for
2241 # the altivec tests.
2242 if { [istarget *-*-darwin*]
2243 || [istarget *-*-aix*] } {
2244 set options "-maltivec -mno-vsx"
2246 set options "-mno-vsx"
2248 check_runtime_nocache vmx_hw_available {
2252 asm volatile ("vor v0,v0,v0");
2254 asm volatile ("vor 0,0,0");
2263 proc check_ppc_recip_hw_available { } {
2264 return [check_cached_effective_target ppc_recip_hw_available {
2265 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
2266 # For now, disable on Darwin
2267 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2270 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2271 check_runtime_nocache ppc_recip_hw_available {
2272 volatile double d_recip, d_rsqrt, d_four = 4.0;
2273 volatile float f_recip, f_rsqrt, f_four = 4.0f;
2276 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2277 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2278 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2279 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2287 # Return 1 if the target supports executing AltiVec and Cell PPU
2288 # instructions, 0 otherwise. Cache the result.
2290 proc check_effective_target_cell_hw { } {
2291 return [check_cached_effective_target cell_hw_available {
2292 # Some simulators are known to not support VMX and PPU instructions.
2293 if { [istarget powerpc-*-eabi*] } {
2296 # Most targets don't require special flags for this test
2297 # case, but Darwin and AIX do.
2298 if { [istarget *-*-darwin*]
2299 || [istarget *-*-aix*] } {
2300 set options "-maltivec -mcpu=cell"
2302 set options "-mcpu=cell"
2304 check_runtime_nocache cell_hw_available {
2308 asm volatile ("vor v0,v0,v0");
2309 asm volatile ("lvlx v0,r0,r0");
2311 asm volatile ("vor 0,0,0");
2312 asm volatile ("lvlx 0,0,0");
2321 # Return 1 if the target supports executing 64-bit instructions, 0
2322 # otherwise. Cache the result.
2324 proc check_effective_target_powerpc64 { } {
2325 global powerpc64_available_saved
2328 if [info exists powerpc64_available_saved] {
2329 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2331 set powerpc64_available_saved 0
2333 # Some simulators are known to not support powerpc64 instructions.
2334 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
2335 verbose "check_effective_target_powerpc64 returning 0" 2
2336 return $powerpc64_available_saved
2339 # Set up, compile, and execute a test program containing a 64-bit
2340 # instruction. Include the current process ID in the file
2341 # names to prevent conflicts with invocations for multiple
2346 set f [open $src "w"]
2347 puts $f "int main() {"
2348 puts $f "#ifdef __MACH__"
2349 puts $f " asm volatile (\"extsw r0,r0\");"
2351 puts $f " asm volatile (\"extsw 0,0\");"
2353 puts $f " return 0; }"
2356 set opts "additional_flags=-mcpu=G5"
2358 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
2359 set lines [${tool}_target_compile $src $exe executable "$opts"]
2362 if [string match "" $lines] then {
2363 # No error message, compilation succeeded.
2364 set result [${tool}_load "./$exe" "" ""]
2365 set status [lindex $result 0]
2366 remote_file build delete $exe
2367 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
2369 if { $status == "pass" } then {
2370 set powerpc64_available_saved 1
2373 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
2377 return $powerpc64_available_saved
2380 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
2381 # complex float arguments. This affects gfortran tests that call cabsf
2382 # in libm built by an earlier compiler. Return 0 if libm uses the same
2383 # argument passing as the compiler under test, 1 otherwise.
2385 proc check_effective_target_broken_cplxf_arg { } {
2386 # Skip the work for targets known not to be affected.
2387 if { ![istarget powerpc*-*-linux*] || ![is-effective-target lp64] } {
2391 return [check_cached_effective_target broken_cplxf_arg {
2392 check_runtime_nocache broken_cplxf_arg {
2393 #include <complex.h>
2394 extern void abort (void);
2395 float fabsf (float);
2396 float cabsf (_Complex float);
2403 if (fabsf (f - 5.0) > 0.0001)
2404 /* Yes, it's broken. */
2406 /* All fine, not broken. */
2413 # Return 1 is this is a TI C6X target supporting C67X instructions
2414 proc check_effective_target_ti_c67x { } {
2415 return [check_no_compiler_messages ti_c67x assembly {
2416 #if !defined(_TMS320C6700)
2417 #error !_TMS320C6700
2422 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2423 proc check_effective_target_ti_c64xp { } {
2424 return [check_no_compiler_messages ti_c64xp assembly {
2425 #if !defined(_TMS320C6400_PLUS)
2426 #error !_TMS320C6400_PLUS
2432 proc check_alpha_max_hw_available { } {
2433 return [check_runtime alpha_max_hw_available {
2434 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2438 # Returns true iff the FUNCTION is available on the target system.
2439 # (This is essentially a Tcl implementation of Autoconf's
2442 proc check_function_available { function } {
2443 return [check_no_compiler_messages ${function}_available \
2449 int main () { $function (); }
2453 # Returns true iff "fork" is available on the target system.
2455 proc check_fork_available {} {
2456 return [check_function_available "fork"]
2459 # Returns true iff "mkfifo" is available on the target system.
2461 proc check_mkfifo_available {} {
2462 if { [istarget *-*-cygwin*] } {
2463 # Cygwin has mkfifo, but support is incomplete.
2467 return [check_function_available "mkfifo"]
2470 # Returns true iff "__cxa_atexit" is used on the target system.
2472 proc check_cxa_atexit_available { } {
2473 return [check_cached_effective_target cxa_atexit_available {
2474 if { [istarget hppa*-*-hpux10*] } {
2475 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
2477 } elseif { [istarget *-*-vxworks] } {
2478 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2481 check_runtime_nocache cxa_atexit_available {
2484 static unsigned int count;
2501 Y() { f(); count = 2; }
2510 int main() { return 0; }
2516 proc check_effective_target_objc2 { } {
2517 return [check_no_compiler_messages objc2 object {
2526 proc check_effective_target_next_runtime { } {
2527 return [check_no_compiler_messages objc2 object {
2528 #ifdef __NEXT_RUNTIME__
2531 #error !__NEXT_RUNTIME__
2536 # Return 1 if we're generating 32-bit code using default options, 0
2539 proc check_effective_target_ilp32 { } {
2540 return [check_no_compiler_messages ilp32 object {
2541 int dummy[sizeof (int) == 4
2542 && sizeof (void *) == 4
2543 && sizeof (long) == 4 ? 1 : -1];
2547 # Return 1 if we're generating ia32 code using default options, 0
2550 proc check_effective_target_ia32 { } {
2551 return [check_no_compiler_messages ia32 object {
2552 int dummy[sizeof (int) == 4
2553 && sizeof (void *) == 4
2554 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2558 # Return 1 if we're generating x32 code using default options, 0
2561 proc check_effective_target_x32 { } {
2562 return [check_no_compiler_messages x32 object {
2563 int dummy[sizeof (int) == 4
2564 && sizeof (void *) == 4
2565 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2569 # Return 1 if we're generating 32-bit integers using default
2570 # options, 0 otherwise.
2572 proc check_effective_target_int32 { } {
2573 return [check_no_compiler_messages int32 object {
2574 int dummy[sizeof (int) == 4 ? 1 : -1];
2578 # Return 1 if we're generating 32-bit or larger integers using default
2579 # options, 0 otherwise.
2581 proc check_effective_target_int32plus { } {
2582 return [check_no_compiler_messages int32plus object {
2583 int dummy[sizeof (int) >= 4 ? 1 : -1];
2587 # Return 1 if we're generating 32-bit or larger pointers using default
2588 # options, 0 otherwise.
2590 proc check_effective_target_ptr32plus { } {
2591 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2592 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2593 # cannot really hold a 32-bit address, so we always return false here.
2594 if { [istarget msp430-*-*] } {
2598 return [check_no_compiler_messages ptr32plus object {
2599 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2603 # Return 1 if we support 32-bit or larger array and structure sizes
2604 # using default options, 0 otherwise. Avoid false positive on
2605 # targets with 20 or 24 bit address spaces.
2607 proc check_effective_target_size32plus { } {
2608 return [check_no_compiler_messages size32plus object {
2609 char dummy[16777217L];
2613 # Returns 1 if we're generating 16-bit or smaller integers with the
2614 # default options, 0 otherwise.
2616 proc check_effective_target_int16 { } {
2617 return [check_no_compiler_messages int16 object {
2618 int dummy[sizeof (int) < 4 ? 1 : -1];
2622 # Return 1 if we're generating 64-bit code using default options, 0
2625 proc check_effective_target_lp64 { } {
2626 return [check_no_compiler_messages lp64 object {
2627 int dummy[sizeof (int) == 4
2628 && sizeof (void *) == 8
2629 && sizeof (long) == 8 ? 1 : -1];
2633 # Return 1 if we're generating 64-bit code using default llp64 options,
2636 proc check_effective_target_llp64 { } {
2637 return [check_no_compiler_messages llp64 object {
2638 int dummy[sizeof (int) == 4
2639 && sizeof (void *) == 8
2640 && sizeof (long long) == 8
2641 && sizeof (long) == 4 ? 1 : -1];
2645 # Return 1 if long and int have different sizes,
2648 proc check_effective_target_long_neq_int { } {
2649 return [check_no_compiler_messages long_ne_int object {
2650 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2654 # Return 1 if the target supports long double larger than double,
2657 proc check_effective_target_large_long_double { } {
2658 return [check_no_compiler_messages large_long_double object {
2659 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2663 # Return 1 if the target supports double larger than float,
2666 proc check_effective_target_large_double { } {
2667 return [check_no_compiler_messages large_double object {
2668 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2672 # Return 1 if the target supports long double of 128 bits,
2675 proc check_effective_target_longdouble128 { } {
2676 return [check_no_compiler_messages longdouble128 object {
2677 int dummy[sizeof(long double) == 16 ? 1 : -1];
2681 # Return 1 if the target supports double of 64 bits,
2684 proc check_effective_target_double64 { } {
2685 return [check_no_compiler_messages double64 object {
2686 int dummy[sizeof(double) == 8 ? 1 : -1];
2690 # Return 1 if the target supports double of at least 64 bits,
2693 proc check_effective_target_double64plus { } {
2694 return [check_no_compiler_messages double64plus object {
2695 int dummy[sizeof(double) >= 8 ? 1 : -1];
2699 # Return 1 if the target supports 'w' suffix on floating constant
2702 proc check_effective_target_has_w_floating_suffix { } {
2704 if [check_effective_target_c++] {
2705 append opts "-std=gnu++03"
2707 return [check_no_compiler_messages w_fp_suffix object {
2712 # Return 1 if the target supports 'q' suffix on floating constant
2715 proc check_effective_target_has_q_floating_suffix { } {
2717 if [check_effective_target_c++] {
2718 append opts "-std=gnu++03"
2720 return [check_no_compiler_messages q_fp_suffix object {
2725 # Return 1 if the target supports the _FloatN / _FloatNx type
2726 # indicated in the function name, 0 otherwise.
2728 proc check_effective_target_float16 {} {
2729 return [check_no_compiler_messages_nocache float16 object {
2731 } [add_options_for_float16 ""]]
2734 proc check_effective_target_float32 {} {
2735 return [check_no_compiler_messages_nocache float32 object {
2737 } [add_options_for_float32 ""]]
2740 proc check_effective_target_float64 {} {
2741 return [check_no_compiler_messages_nocache float64 object {
2743 } [add_options_for_float64 ""]]
2746 proc check_effective_target_float128 {} {
2747 return [check_no_compiler_messages_nocache float128 object {
2749 } [add_options_for_float128 ""]]
2752 proc check_effective_target_float32x {} {
2753 return [check_no_compiler_messages_nocache float32x object {
2755 } [add_options_for_float32x ""]]
2758 proc check_effective_target_float64x {} {
2759 return [check_no_compiler_messages_nocache float64x object {
2761 } [add_options_for_float64x ""]]
2764 proc check_effective_target_float128x {} {
2765 return [check_no_compiler_messages_nocache float128x object {
2767 } [add_options_for_float128x ""]]
2770 # Likewise, but runtime support for any special options used as well
2771 # as compile-time support is required.
2773 proc check_effective_target_float16_runtime {} {
2774 return [check_effective_target_float16]
2777 proc check_effective_target_float32_runtime {} {
2778 return [check_effective_target_float32]
2781 proc check_effective_target_float64_runtime {} {
2782 return [check_effective_target_float64]
2785 proc check_effective_target_float128_runtime {} {
2786 if { ![check_effective_target_float128] } {
2789 if { [istarget powerpc*-*-*] } {
2790 return [check_effective_target_base_quadfloat_support]
2795 proc check_effective_target_float32x_runtime {} {
2796 return [check_effective_target_float32x]
2799 proc check_effective_target_float64x_runtime {} {
2800 if { ![check_effective_target_float64x] } {
2803 if { [istarget powerpc*-*-*] } {
2804 return [check_effective_target_base_quadfloat_support]
2809 proc check_effective_target_float128x_runtime {} {
2810 return [check_effective_target_float128x]
2813 # Return 1 if the target hardware supports any options added for
2814 # _FloatN and _FloatNx types, 0 otherwise.
2816 proc check_effective_target_floatn_nx_runtime {} {
2817 if { [istarget powerpc*-*-aix*] } {
2820 if { [istarget powerpc*-*-*] } {
2821 return [check_effective_target_base_quadfloat_support]
2826 # Add options needed to use the _FloatN / _FloatNx type indicated in
2827 # the function name.
2829 proc add_options_for_float16 { flags } {
2830 if { [istarget arm*-*-*] } {
2831 return "$flags -mfp16-format=ieee"
2836 proc add_options_for_float32 { flags } {
2840 proc add_options_for_float64 { flags } {
2844 proc add_options_for_float128 { flags } {
2845 return [add_options_for___float128 "$flags"]
2848 proc add_options_for_float32x { flags } {
2852 proc add_options_for_float64x { flags } {
2853 return [add_options_for___float128 "$flags"]
2856 proc add_options_for_float128x { flags } {
2860 # Return 1 if the target supports __float128,
2863 proc check_effective_target___float128 { } {
2864 if { [istarget powerpc*-*-*] } {
2865 return [check_ppc_float128_sw_available]
2867 if { [istarget ia64-*-*]
2868 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2874 proc add_options_for___float128 { flags } {
2875 if { [istarget powerpc*-*-*] } {
2876 return "$flags -mfloat128 -mvsx"
2881 # Return 1 if the target supports any special run-time requirements
2882 # for __float128 or _Float128,
2885 proc check_effective_target_base_quadfloat_support { } {
2886 if { [istarget powerpc*-*-*] } {
2887 return [check_vsx_hw_available]
2892 # Return 1 if the target supports compiling fixed-point,
2895 proc check_effective_target_fixed_point { } {
2896 return [check_no_compiler_messages fixed_point object {
2897 _Sat _Fract x; _Sat _Accum y;
2901 # Return 1 if the target supports compiling decimal floating point,
2904 proc check_effective_target_dfp_nocache { } {
2905 verbose "check_effective_target_dfp_nocache: compiling source" 2
2906 set ret [check_no_compiler_messages_nocache dfp object {
2907 float x __attribute__((mode(DD)));
2909 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2913 proc check_effective_target_dfprt_nocache { } {
2914 return [check_runtime_nocache dfprt {
2915 typedef float d64 __attribute__((mode(DD)));
2916 d64 x = 1.2df, y = 2.3dd, z;
2917 int main () { z = x + y; return 0; }
2921 # Return 1 if the target supports compiling Decimal Floating Point,
2924 # This won't change for different subtargets so cache the result.
2926 proc check_effective_target_dfp { } {
2927 return [check_cached_effective_target dfp {
2928 check_effective_target_dfp_nocache
2932 # Return 1 if the target supports linking and executing Decimal Floating
2933 # Point, 0 otherwise.
2935 # This won't change for different subtargets so cache the result.
2937 proc check_effective_target_dfprt { } {
2938 return [check_cached_effective_target dfprt {
2939 check_effective_target_dfprt_nocache
2943 proc check_effective_target_powerpc_popcntb_ok { } {
2944 return [check_cached_effective_target powerpc_popcntb_ok {
2946 # Disable on Darwin.
2947 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2950 check_runtime_nocache powerpc_popcntb_ok {
2952 volatile int a = 0x12345678;
2955 asm volatile ("popcntb %0,%1" : "=r" (r) : "r" (a));
2963 # Return 1 if the target supports executing DFP hardware instructions,
2964 # 0 otherwise. Cache the result.
2966 proc check_dfp_hw_available { } {
2967 return [check_cached_effective_target dfp_hw_available {
2968 # For now, disable on Darwin
2969 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2972 check_runtime_nocache dfp_hw_available {
2973 volatile _Decimal64 r;
2974 volatile _Decimal64 a = 4.0DD;
2975 volatile _Decimal64 b = 2.0DD;
2978 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2979 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2980 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2981 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2984 } "-mcpu=power6 -mhard-float"
2989 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2991 proc check_effective_target_ucn_nocache { } {
2992 # -std=c99 is only valid for C
2993 if [check_effective_target_c] {
2994 set ucnopts "-std=c99"
2998 verbose "check_effective_target_ucn_nocache: compiling source" 2
2999 set ret [check_no_compiler_messages_nocache ucn object {
3002 verbose "check_effective_target_ucn_nocache: returning $ret" 2
3006 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
3008 # This won't change for different subtargets, so cache the result.
3010 proc check_effective_target_ucn { } {
3011 return [check_cached_effective_target ucn {
3012 check_effective_target_ucn_nocache
3016 # Return 1 if the target needs a command line argument to enable a SIMD
3019 proc check_effective_target_vect_cmdline_needed { } {
3020 global et_vect_cmdline_needed_saved
3021 global et_vect_cmdline_needed_target_name
3023 if { ![info exists et_vect_cmdline_needed_target_name] } {
3024 set et_vect_cmdline_needed_target_name ""
3027 # If the target has changed since we set the cached value, clear it.
3028 set current_target [current_target_name]
3029 if { $current_target != $et_vect_cmdline_needed_target_name } {
3030 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
3031 set et_vect_cmdline_needed_target_name $current_target
3032 if { [info exists et_vect_cmdline_needed_saved] } {
3033 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
3034 unset et_vect_cmdline_needed_saved
3038 if [info exists et_vect_cmdline_needed_saved] {
3039 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
3041 set et_vect_cmdline_needed_saved 1
3042 if { [istarget alpha*-*-*]
3043 || [istarget ia64-*-*]
3044 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
3045 && ![is-effective-target ia32])
3046 || ([istarget powerpc*-*-*]
3047 && ([check_effective_target_powerpc_spe]
3048 || [check_effective_target_powerpc_altivec]))
3049 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
3050 || [istarget spu-*-*]
3051 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
3052 || [istarget aarch64*-*-*] } {
3053 set et_vect_cmdline_needed_saved 0
3057 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
3058 return $et_vect_cmdline_needed_saved
3061 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
3063 # This won't change for different subtargets so cache the result.
3065 proc check_effective_target_vect_int { } {
3066 global et_vect_int_saved
3069 if [info exists et_vect_int_saved($et_index)] {
3070 verbose "check_effective_target_vect_int: using cached result" 2
3072 set et_vect_int_saved($et_index) 0
3073 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3074 || ([istarget powerpc*-*-*]
3075 && ![istarget powerpc-*-linux*paired*])
3076 || [istarget spu-*-*]
3077 || [istarget sparc*-*-*]
3078 || [istarget alpha*-*-*]
3079 || [istarget ia64-*-*]
3080 || [istarget aarch64*-*-*]
3081 || [is-effective-target arm_neon]
3082 || ([istarget mips*-*-*]
3083 && ([et-is-effective-target mips_loongson]
3084 || [et-is-effective-target mips_msa]))
3085 || ([istarget s390*-*-*]
3086 && [check_effective_target_s390_vx]) } {
3087 set et_vect_int_saved($et_index) 1
3091 verbose "check_effective_target_vect_int:\
3092 returning $et_vect_int_saved($et_index)" 2
3093 return $et_vect_int_saved($et_index)
3096 # Return 1 if the target supports signed int->float conversion
3099 proc check_effective_target_vect_intfloat_cvt { } {
3100 global et_vect_intfloat_cvt_saved
3103 if [info exists et_vect_intfloat_cvt_saved($et_index)] {
3104 verbose "check_effective_target_vect_intfloat_cvt:\
3105 using cached result" 2
3107 set et_vect_intfloat_cvt_saved($et_index) 0
3108 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3109 || ([istarget powerpc*-*-*]
3110 && ![istarget powerpc-*-linux*paired*])
3111 || [is-effective-target arm_neon]
3112 || ([istarget mips*-*-*]
3113 && [et-is-effective-target mips_msa]) } {
3114 set et_vect_intfloat_cvt_saved($et_index) 1
3118 verbose "check_effective_target_vect_intfloat_cvt:\
3119 returning $et_vect_intfloat_cvt_saved($et_index)" 2
3120 return $et_vect_intfloat_cvt_saved($et_index)
3123 # Return 1 if the target supports signed double->int conversion
3126 proc check_effective_target_vect_doubleint_cvt { } {
3127 global et_vect_doubleint_cvt_saved
3130 if [info exists et_vect_doubleint_cvt_saved($et_index)] {
3131 verbose "check_effective_target_vect_doubleint_cvt: using cached result" 2
3133 set et_vect_doubleint_cvt_saved($et_index) 0
3134 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3135 && [check_no_compiler_messages vect_doubleint_cvt assembly {
3136 #ifdef __tune_atom__
3137 # error No double vectorizer support.
3140 || [istarget aarch64*-*-*]
3141 || [istarget spu-*-*]
3142 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3143 || ([istarget mips*-*-*]
3144 && [et-is-effective-target mips_msa]) } {
3145 set et_vect_doubleint_cvt_saved($et_index) 1
3149 verbose "check_effective_target_vect_doubleint_cvt:\
3150 returning $et_vect_doubleint_cvt_saved($et_index)" 2
3151 return $et_vect_doubleint_cvt_saved($et_index)
3154 # Return 1 if the target supports signed int->double conversion
3157 proc check_effective_target_vect_intdouble_cvt { } {
3158 global et_vect_intdouble_cvt_saved
3161 if [info exists et_vect_intdouble_cvt_saved($et_index)] {
3162 verbose "check_effective_target_vect_intdouble_cvt: using cached result" 2
3164 set et_vect_intdouble_cvt_saved($et_index) 0
3165 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3166 && [check_no_compiler_messages vect_intdouble_cvt assembly {
3167 #ifdef __tune_atom__
3168 # error No double vectorizer support.
3171 || [istarget aarch64*-*-*]
3172 || [istarget spu-*-*]
3173 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3174 || ([istarget mips*-*-*]
3175 && [et-is-effective-target mips_msa]) } {
3176 set et_vect_intdouble_cvt_saved($et_index) 1
3180 verbose "check_effective_target_vect_intdouble_cvt:\
3181 returning $et_vect_intdouble_cvt_saved($et_index)" 2
3182 return $et_vect_intdouble_cvt_saved($et_index)
3185 #Return 1 if we're supporting __int128 for target, 0 otherwise.
3187 proc check_effective_target_int128 { } {
3188 return [check_no_compiler_messages int128 object {
3190 #ifndef __SIZEOF_INT128__
3199 # Return 1 if the target supports unsigned int->float conversion
3202 proc check_effective_target_vect_uintfloat_cvt { } {
3203 global et_vect_uintfloat_cvt_saved
3206 if [info exists et_vect_uintfloat_cvt_saved($et_index)] {
3207 verbose "check_effective_target_vect_uintfloat_cvt:\
3208 using cached result" 2
3210 set et_vect_uintfloat_cvt_saved($et_index) 0
3211 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3212 || ([istarget powerpc*-*-*]
3213 && ![istarget powerpc-*-linux*paired*])
3214 || [istarget aarch64*-*-*]
3215 || [is-effective-target arm_neon]
3216 || ([istarget mips*-*-*]
3217 && [et-is-effective-target mips_msa]) } {
3218 set et_vect_uintfloat_cvt_saved($et_index) 1
3222 verbose "check_effective_target_vect_uintfloat_cvt:\
3223 returning $et_vect_uintfloat_cvt_saved($et_index)" 2
3224 return $et_vect_uintfloat_cvt_saved($et_index)
3228 # Return 1 if the target supports signed float->int conversion
3231 proc check_effective_target_vect_floatint_cvt { } {
3232 global et_vect_floatint_cvt_saved
3235 if [info exists et_vect_floatint_cvt_saved($et_index)] {
3236 verbose "check_effective_target_vect_floatint_cvt:\
3237 using cached result" 2
3239 set et_vect_floatint_cvt_saved($et_index) 0
3240 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3241 || ([istarget powerpc*-*-*]
3242 && ![istarget powerpc-*-linux*paired*])
3243 || [is-effective-target arm_neon]
3244 || ([istarget mips*-*-*]
3245 && [et-is-effective-target mips_msa]) } {
3246 set et_vect_floatint_cvt_saved($et_index) 1
3250 verbose "check_effective_target_vect_floatint_cvt:\
3251 returning $et_vect_floatint_cvt_saved($et_index)" 2
3252 return $et_vect_floatint_cvt_saved($et_index)
3255 # Return 1 if the target supports unsigned float->int conversion
3258 proc check_effective_target_vect_floatuint_cvt { } {
3259 global et_vect_floatuint_cvt_saved
3262 if [info exists et_vect_floatuint_cvt_saved($et_index)] {
3263 verbose "check_effective_target_vect_floatuint_cvt:\
3264 using cached result" 2
3266 set et_vect_floatuint_cvt_saved($et_index) 0
3267 if { ([istarget powerpc*-*-*]
3268 && ![istarget powerpc-*-linux*paired*])
3269 || [is-effective-target arm_neon]
3270 || ([istarget mips*-*-*]
3271 && [et-is-effective-target mips_msa]) } {
3272 set et_vect_floatuint_cvt_saved($et_index) 1
3276 verbose "check_effective_target_vect_floatuint_cvt:\
3277 returning $et_vect_floatuint_cvt_saved($et_index)" 2
3278 return $et_vect_floatuint_cvt_saved($et_index)
3281 # Return 1 if peeling for alignment might be profitable on the target
3284 proc check_effective_target_vect_peeling_profitable { } {
3285 global et_vect_peeling_profitable_saved
3288 if [info exists et_vect_peeling_profitable_saved($et_index)] {
3289 verbose "check_effective_target_vect_peeling_profitable: using cached result" 2
3291 set et_vect_peeling_profitable_saved($et_index) 1
3292 if { ([istarget s390*-*-*]
3293 && [check_effective_target_s390_vx]) } {
3294 set et_vect_peeling_profitable_saved($et_index) 0
3298 verbose "check_effective_target_vect_peeling_profitable:\
3299 returning $et_vect_peeling_profitable_saved($et_index)" 2
3300 return $et_vect_peeling_profitable_saved($et_index)
3303 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
3305 # This won't change for different subtargets so cache the result.
3307 proc check_effective_target_vect_simd_clones { } {
3308 global et_vect_simd_clones_saved
3311 if [info exists et_vect_simd_clones_saved($et_index)] {
3312 verbose "check_effective_target_vect_simd_clones: using cached result" 2
3314 set et_vect_simd_clones_saved($et_index) 0
3315 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx,
3316 # avx2 and avx512f clone. Only the right clone for the
3317 # specified arch will be chosen, but still we need to at least
3318 # be able to assemble avx512f.
3319 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3320 && [check_effective_target_avx512f]) } {
3321 set et_vect_simd_clones_saved($et_index) 1
3325 verbose "check_effective_target_vect_simd_clones:\
3326 returning $et_vect_simd_clones_saved($et_index)" 2
3327 return $et_vect_simd_clones_saved($et_index)
3330 # Return 1 if this is a AArch64 target supporting big endian
3331 proc check_effective_target_aarch64_big_endian { } {
3332 return [check_no_compiler_messages aarch64_big_endian assembly {
3333 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
3334 #error !__aarch64__ || !__AARCH64EB__
3339 # Return 1 if this is a AArch64 target supporting little endian
3340 proc check_effective_target_aarch64_little_endian { } {
3341 if { ![istarget aarch64*-*-*] } {
3345 return [check_no_compiler_messages aarch64_little_endian assembly {
3346 #if !defined(__aarch64__) || defined(__AARCH64EB__)
3352 # Return 1 if this is a compiler supporting ARC atomic operations
3353 proc check_effective_target_arc_atomic { } {
3354 return [check_no_compiler_messages arc_atomic assembly {
3355 #if !defined(__ARC_ATOMIC__)
3361 # Return 1 if this is an arm target using 32-bit instructions
3362 proc check_effective_target_arm32 { } {
3363 if { ![istarget arm*-*-*] } {
3367 return [check_no_compiler_messages arm32 assembly {
3368 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
3369 #error !__arm || __thumb__ && !__thumb2__
3374 # Return 1 if this is an arm target not using Thumb
3375 proc check_effective_target_arm_nothumb { } {
3376 if { ![istarget arm*-*-*] } {
3380 return [check_no_compiler_messages arm_nothumb assembly {
3381 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
3382 #error !__arm__ || __thumb || __thumb2__
3387 # Return 1 if this is a little-endian ARM target
3388 proc check_effective_target_arm_little_endian { } {
3389 if { ![istarget arm*-*-*] } {
3393 return [check_no_compiler_messages arm_little_endian assembly {
3394 #if !defined(__arm__) || !defined(__ARMEL__)
3395 #error !__arm__ || !__ARMEL__
3400 # Return 1 if this is an ARM target that only supports aligned vector accesses
3401 proc check_effective_target_arm_vect_no_misalign { } {
3402 if { ![istarget arm*-*-*] } {
3406 return [check_no_compiler_messages arm_vect_no_misalign assembly {
3407 #if !defined(__arm__) \
3408 || (defined(__ARM_FEATURE_UNALIGNED) \
3409 && defined(__ARMEL__))
3410 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
3416 # Return 1 if this is an ARM target supporting -mfpu=vfp
3417 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
3420 proc check_effective_target_arm_vfp_ok { } {
3421 if { [check_effective_target_arm32] } {
3422 return [check_no_compiler_messages arm_vfp_ok object {
3424 } "-mfpu=vfp -mfloat-abi=softfp"]
3430 # Return 1 if this is an ARM target supporting -mfpu=vfp3
3431 # -mfloat-abi=softfp.
3433 proc check_effective_target_arm_vfp3_ok { } {
3434 if { [check_effective_target_arm32] } {
3435 return [check_no_compiler_messages arm_vfp3_ok object {
3437 } "-mfpu=vfp3 -mfloat-abi=softfp"]
3443 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
3444 # -mfloat-abi=softfp.
3445 proc check_effective_target_arm_v8_vfp_ok {} {
3446 if { [check_effective_target_arm32] } {
3447 return [check_no_compiler_messages arm_v8_vfp_ok object {
3450 __asm__ volatile ("vrinta.f32.f32 s0, s0");
3453 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
3459 # Return 1 if this is an ARM target supporting -mfpu=vfp
3460 # -mfloat-abi=hard. Some multilibs may be incompatible with these
3463 proc check_effective_target_arm_hard_vfp_ok { } {
3464 if { [check_effective_target_arm32]
3465 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
3466 return [check_no_compiler_messages arm_hard_vfp_ok executable {
3467 int main() { return 0;}
3468 } "-mfpu=vfp -mfloat-abi=hard"]
3474 # Return 1 if this is an ARM target defining __ARM_FP. We may need
3475 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3476 # incompatible with these options. Also set et_arm_fp_flags to the
3477 # best options to add.
3479 proc check_effective_target_arm_fp_ok_nocache { } {
3480 global et_arm_fp_flags
3481 set et_arm_fp_flags ""
3482 if { [check_effective_target_arm32] } {
3483 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
3484 if { [check_no_compiler_messages_nocache arm_fp_ok object {
3486 #error __ARM_FP not defined
3489 set et_arm_fp_flags $flags
3498 proc check_effective_target_arm_fp_ok { } {
3499 return [check_cached_effective_target arm_fp_ok \
3500 check_effective_target_arm_fp_ok_nocache]
3503 # Add the options needed to define __ARM_FP. We need either
3504 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3505 # specified by the multilib, use it.
3507 proc add_options_for_arm_fp { flags } {
3508 if { ! [check_effective_target_arm_fp_ok] } {
3511 global et_arm_fp_flags
3512 return "$flags $et_arm_fp_flags"
3515 # Return 1 if this is an ARM target that supports DSP multiply with
3516 # current multilib flags.
3518 proc check_effective_target_arm_dsp { } {
3519 return [check_no_compiler_messages arm_dsp assembly {
3520 #ifndef __ARM_FEATURE_DSP
3527 # Return 1 if this is an ARM target that supports unaligned word/halfword
3528 # load/store instructions.
3530 proc check_effective_target_arm_unaligned { } {
3531 return [check_no_compiler_messages arm_unaligned assembly {
3532 #ifndef __ARM_FEATURE_UNALIGNED
3533 #error no unaligned support
3539 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3540 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3541 # incompatible with these options. Also set et_arm_crypto_flags to the
3542 # best options to add.
3544 proc check_effective_target_arm_crypto_ok_nocache { } {
3545 global et_arm_crypto_flags
3546 set et_arm_crypto_flags ""
3547 if { [check_effective_target_arm_v8_neon_ok] } {
3548 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
3549 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
3550 #include "arm_neon.h"
3552 foo (uint8x16_t a, uint8x16_t b)
3554 return vaeseq_u8 (a, b);
3557 set et_arm_crypto_flags $flags
3566 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3568 proc check_effective_target_arm_crypto_ok { } {
3569 return [check_cached_effective_target arm_crypto_ok \
3570 check_effective_target_arm_crypto_ok_nocache]
3573 # Add options for crypto extensions.
3574 proc add_options_for_arm_crypto { flags } {
3575 if { ! [check_effective_target_arm_crypto_ok] } {
3578 global et_arm_crypto_flags
3579 return "$flags $et_arm_crypto_flags"
3582 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3583 # or -mfloat-abi=hard, but if one is already specified by the
3584 # multilib, use it. Similarly, if a -mfpu option already enables
3585 # NEON, do not add -mfpu=neon.
3587 proc add_options_for_arm_neon { flags } {
3588 if { ! [check_effective_target_arm_neon_ok] } {
3591 global et_arm_neon_flags
3592 return "$flags $et_arm_neon_flags"
3595 proc add_options_for_arm_v8_vfp { flags } {
3596 if { ! [check_effective_target_arm_v8_vfp_ok] } {
3599 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
3602 proc add_options_for_arm_v8_neon { flags } {
3603 if { ! [check_effective_target_arm_v8_neon_ok] } {
3606 global et_arm_v8_neon_flags
3607 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
3610 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
3611 # options for AArch64 and for ARM.
3613 proc add_options_for_arm_v8_1a_neon { flags } {
3614 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
3617 global et_arm_v8_1a_neon_flags
3618 return "$flags $et_arm_v8_1a_neon_flags"
3621 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
3622 # Also adds the ARMv8 FP options for ARM and for AArch64.
3624 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
3625 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
3628 global et_arm_v8_2a_fp16_scalar_flags
3629 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
3632 # Add the options needed for ARMv8.2 with the FP16 extension. Also adds
3633 # the ARMv8 NEON options for ARM and for AArch64.
3635 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
3636 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
3639 global et_arm_v8_2a_fp16_neon_flags
3640 return "$flags $et_arm_v8_2a_fp16_neon_flags"
3643 proc add_options_for_arm_crc { flags } {
3644 if { ! [check_effective_target_arm_crc_ok] } {
3647 global et_arm_crc_flags
3648 return "$flags $et_arm_crc_flags"
3651 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3652 # or -mfloat-abi=hard, but if one is already specified by the
3653 # multilib, use it. Similarly, if a -mfpu option already enables
3654 # NEON, do not add -mfpu=neon.
3656 proc add_options_for_arm_neonv2 { flags } {
3657 if { ! [check_effective_target_arm_neonv2_ok] } {
3660 global et_arm_neonv2_flags
3661 return "$flags $et_arm_neonv2_flags"
3664 # Add the options needed for vfp3.
3665 proc add_options_for_arm_vfp3 { flags } {
3666 if { ! [check_effective_target_arm_vfp3_ok] } {
3669 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
3672 # Return 1 if this is an ARM target supporting -mfpu=neon
3673 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3674 # incompatible with these options. Also set et_arm_neon_flags to the
3675 # best options to add.
3677 proc check_effective_target_arm_neon_ok_nocache { } {
3678 global et_arm_neon_flags
3679 set et_arm_neon_flags ""
3680 if { [check_effective_target_arm32] } {
3681 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a" "-mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard -march=armv7-a"} {
3682 if { [check_no_compiler_messages_nocache arm_neon_ok object {
3683 #include <arm_neon.h>
3685 #ifndef __ARM_NEON__
3688 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3689 configured for -mcpu=arm926ej-s, for example. */
3690 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
3691 #error Architecture does not support NEON.
3694 set et_arm_neon_flags $flags
3703 proc check_effective_target_arm_neon_ok { } {
3704 return [check_cached_effective_target arm_neon_ok \
3705 check_effective_target_arm_neon_ok_nocache]
3708 # Return 1 if this is an ARM target supporting -mfpu=neon without any
3709 # -mfloat-abi= option. Useful in tests where add_options is not
3710 # supported (such as lto tests).
3712 proc check_effective_target_arm_neon_ok_no_float_abi_nocache { } {
3713 if { [check_effective_target_arm32] } {
3714 foreach flags {"-mfpu=neon"} {
3715 if { [check_no_compiler_messages_nocache arm_neon_ok_no_float_abi object {
3716 #include <arm_neon.h>
3718 #ifndef __ARM_NEON__
3721 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3722 configured for -mcpu=arm926ej-s, for example. */
3723 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
3724 #error Architecture does not support NEON.
3735 proc check_effective_target_arm_neon_ok_no_float_abi { } {
3736 return [check_cached_effective_target arm_neon_ok_no_float_abi \
3737 check_effective_target_arm_neon_ok_no_float_abi_nocache]
3740 proc check_effective_target_arm_crc_ok_nocache { } {
3741 global et_arm_crc_flags
3742 set et_arm_crc_flags "-march=armv8-a+crc"
3743 return [check_no_compiler_messages_nocache arm_crc_ok object {
3744 #if !defined (__ARM_FEATURE_CRC32)
3747 } "$et_arm_crc_flags"]
3750 proc check_effective_target_arm_crc_ok { } {
3751 return [check_cached_effective_target arm_crc_ok \
3752 check_effective_target_arm_crc_ok_nocache]
3755 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
3756 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3757 # incompatible with these options. Also set et_arm_neon_fp16_flags to
3758 # the best options to add.
3760 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
3761 global et_arm_neon_fp16_flags
3762 global et_arm_neon_flags
3763 set et_arm_neon_fp16_flags ""
3764 if { [check_effective_target_arm32]
3765 && [check_effective_target_arm_neon_ok] } {
3766 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3767 "-mfpu=neon-fp16 -mfloat-abi=softfp"
3768 "-mfp16-format=ieee"
3769 "-mfloat-abi=softfp -mfp16-format=ieee"
3770 "-mfpu=neon-fp16 -mfp16-format=ieee"
3771 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
3772 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
3773 #include "arm_neon.h"
3775 foo (float32x4_t arg)
3777 return vcvt_f16_f32 (arg);
3779 } "$et_arm_neon_flags $flags"] } {
3780 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
3789 proc check_effective_target_arm_neon_fp16_ok { } {
3790 return [check_cached_effective_target arm_neon_fp16_ok \
3791 check_effective_target_arm_neon_fp16_ok_nocache]
3794 proc check_effective_target_arm_neon_fp16_hw { } {
3795 if {! [check_effective_target_arm_neon_fp16_ok] } {
3798 global et_arm_neon_fp16_flags
3799 check_runtime_nocache arm_neon_fp16_hw {
3801 main (int argc, char **argv)
3803 asm ("vcvt.f32.f16 q1, d0");
3806 } $et_arm_neon_fp16_flags
3809 proc add_options_for_arm_neon_fp16 { flags } {
3810 if { ! [check_effective_target_arm_neon_fp16_ok] } {
3813 global et_arm_neon_fp16_flags
3814 return "$flags $et_arm_neon_fp16_flags"
3817 # Return 1 if this is an ARM target supporting the FP16 alternative
3818 # format. Some multilibs may be incompatible with the options needed. Also
3819 # set et_arm_neon_fp16_flags to the best options to add.
3821 proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
3822 global et_arm_neon_fp16_flags
3823 set et_arm_neon_fp16_flags ""
3824 if { [check_effective_target_arm32] } {
3825 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3826 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3827 if { [check_no_compiler_messages_nocache \
3828 arm_fp16_alternative_ok object {
3829 #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3830 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
3832 } "$flags -mfp16-format=alternative"] } {
3833 set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
3842 proc check_effective_target_arm_fp16_alternative_ok { } {
3843 return [check_cached_effective_target arm_fp16_alternative_ok \
3844 check_effective_target_arm_fp16_alternative_ok_nocache]
3847 # Return 1 if this is an ARM target supports specifying the FP16 none
3848 # format. Some multilibs may be incompatible with the options needed.
3850 proc check_effective_target_arm_fp16_none_ok_nocache { } {
3851 if { [check_effective_target_arm32] } {
3852 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3853 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3854 if { [check_no_compiler_messages_nocache \
3855 arm_fp16_none_ok object {
3856 #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3857 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
3859 #if defined (__ARM_FP16_FORMAT_IEEE)
3860 #error __ARM_FP16_FORMAT_IEEE defined
3862 } "$flags -mfp16-format=none"] } {
3871 proc check_effective_target_arm_fp16_none_ok { } {
3872 return [check_cached_effective_target arm_fp16_none_ok \
3873 check_effective_target_arm_fp16_none_ok_nocache]
3876 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
3877 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3878 # incompatible with these options. Also set et_arm_v8_neon_flags to the
3879 # best options to add.
3881 proc check_effective_target_arm_v8_neon_ok_nocache { } {
3882 global et_arm_v8_neon_flags
3883 set et_arm_v8_neon_flags ""
3884 if { [check_effective_target_arm32] } {
3885 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3886 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
3888 #error not armv8 or later
3890 #include "arm_neon.h"
3894 __asm__ volatile ("vrintn.f32 q0, q0");
3896 } "$flags -march=armv8-a"] } {
3897 set et_arm_v8_neon_flags $flags
3906 proc check_effective_target_arm_v8_neon_ok { } {
3907 return [check_cached_effective_target arm_v8_neon_ok \
3908 check_effective_target_arm_v8_neon_ok_nocache]
3911 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3912 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3913 # incompatible with these options. Also set et_arm_neonv2_flags to the
3914 # best options to add.
3916 proc check_effective_target_arm_neonv2_ok_nocache { } {
3917 global et_arm_neonv2_flags
3918 global et_arm_neon_flags
3919 set et_arm_neonv2_flags ""
3920 if { [check_effective_target_arm32]
3921 && [check_effective_target_arm_neon_ok] } {
3922 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3923 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3924 #include "arm_neon.h"
3926 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3928 return vfma_f32 (a, b, c);
3930 } "$et_arm_neon_flags $flags"] } {
3931 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
3940 proc check_effective_target_arm_neonv2_ok { } {
3941 return [check_cached_effective_target arm_neonv2_ok \
3942 check_effective_target_arm_neonv2_ok_nocache]
3945 # Add the options needed for VFP FP16 support. We need either
3946 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
3947 # the multilib, use it.
3949 proc add_options_for_arm_fp16 { flags } {
3950 if { ! [check_effective_target_arm_fp16_ok] } {
3953 global et_arm_fp16_flags
3954 return "$flags $et_arm_fp16_flags"
3957 # Add the options needed to enable support for IEEE format
3958 # half-precision support. This is valid for ARM targets.
3960 proc add_options_for_arm_fp16_ieee { flags } {
3961 if { ! [check_effective_target_arm_fp16_ok] } {
3964 global et_arm_fp16_flags
3965 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
3968 # Add the options needed to enable support for ARM Alternative format
3969 # half-precision support. This is valid for ARM targets.
3971 proc add_options_for_arm_fp16_alternative { flags } {
3972 if { ! [check_effective_target_arm_fp16_ok] } {
3975 global et_arm_fp16_flags
3976 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
3979 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
3980 # Skip multilibs that are incompatible with these options and set
3981 # et_arm_fp16_flags to the best options to add. This test is valid for
3984 proc check_effective_target_arm_fp16_ok_nocache { } {
3985 global et_arm_fp16_flags
3986 set et_arm_fp16_flags ""
3987 if { ! [check_effective_target_arm32] } {
3991 [list "" { *-*-* } { "-mfpu=*" } \
3992 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
3993 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
3994 # Multilib flags would override -mfpu.
3997 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
3998 # Must generate floating-point instructions.
4001 if [check_effective_target_arm_hf_eabi] {
4002 # Use existing float-abi and force an fpu which supports fp16
4003 set et_arm_fp16_flags "-mfpu=vfpv4"
4006 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
4007 # The existing -mfpu value is OK; use it, but add softfp.
4008 set et_arm_fp16_flags "-mfloat-abi=softfp"
4011 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
4012 # macro to check for this support.
4013 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
4014 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
4017 set et_arm_fp16_flags "$flags"
4024 proc check_effective_target_arm_fp16_ok { } {
4025 return [check_cached_effective_target arm_fp16_ok \
4026 check_effective_target_arm_fp16_ok_nocache]
4029 # Return 1 if the target supports executing VFP FP16 instructions, 0
4030 # otherwise. This test is valid for ARM only.
4032 proc check_effective_target_arm_fp16_hw { } {
4033 if {! [check_effective_target_arm_fp16_ok] } {
4036 global et_arm_fp16_flags
4037 check_runtime_nocache arm_fp16_hw {
4039 main (int argc, char **argv)
4043 asm ("vcvtb.f32.f16 %0, %1"
4044 : "=w" (r) : "w" (a)
4045 : /* No clobbers. */);
4046 return (r == 1.0) ? 0 : 1;
4048 } "$et_arm_fp16_flags -mfp16-format=ieee"
4051 # Creates a series of routines that return 1 if the given architecture
4052 # can be selected and a routine to give the flags to select that architecture
4053 # Note: Extra flags may be added to disable options from newer compilers
4054 # (Thumb in particular - but others may be added in the future).
4055 # Warning: Do not use check_effective_target_arm_arch_*_ok for architecture
4056 # extension (eg. ARMv8.1-A) since there is no macro defined for them. See
4057 # how only __ARM_ARCH_8A__ is checked for ARMv8.1-A.
4058 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
4059 # /* { dg-add-options arm_arch_v5 } */
4060 # /* { dg-require-effective-target arm_arch_v5_multilib } */
4061 foreach { armfunc armflag armdefs } {
4062 v4 "-march=armv4 -marm" __ARM_ARCH_4__
4063 v4t "-march=armv4t" __ARM_ARCH_4T__
4064 v5 "-march=armv5 -marm" __ARM_ARCH_5__
4065 v5t "-march=armv5t" __ARM_ARCH_5T__
4066 v5te "-march=armv5te" __ARM_ARCH_5TE__
4067 v6 "-march=armv6" __ARM_ARCH_6__
4068 v6k "-march=armv6k" __ARM_ARCH_6K__
4069 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
4070 v6z "-march=armv6z" __ARM_ARCH_6Z__
4071 v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
4072 v7a "-march=armv7-a" __ARM_ARCH_7A__
4073 v7r "-march=armv7-r" __ARM_ARCH_7R__
4074 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
4075 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
4076 v7ve "-march=armv7ve -marm"
4077 "__ARM_ARCH_7A__ && __ARM_FEATURE_IDIV"
4078 v8a "-march=armv8-a" __ARM_ARCH_8A__
4079 v8_1a "-march=armv8.1a" __ARM_ARCH_8A__
4080 v8_2a "-march=armv8.2a" __ARM_ARCH_8A__
4081 v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft"
4082 __ARM_ARCH_8M_BASE__
4083 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
4084 v8r "-march=armv8-r" __ARM_ARCH_8R__ } {
4085 eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
4086 proc check_effective_target_arm_arch_FUNC_ok { } {
4087 if { [ string match "*-marm*" "FLAG" ] &&
4088 ![check_effective_target_arm_arm_ok] } {
4091 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
4098 proc add_options_for_arm_arch_FUNC { flags } {
4099 return "$flags FLAG"
4102 proc check_effective_target_arm_arch_FUNC_multilib { } {
4103 return [check_runtime arm_arch_FUNC_multilib {
4109 } [add_options_for_arm_arch_FUNC ""]]
4114 # Return 1 if GCC was configured with --with-mode=
4115 proc check_effective_target_default_mode { } {
4117 return [check_configured_with "with-mode="]
4120 # Return 1 if this is an ARM target where -marm causes ARM to be
4123 proc check_effective_target_arm_arm_ok { } {
4124 return [check_no_compiler_messages arm_arm_ok assembly {
4125 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
4126 #error !__arm__ || __thumb__ || __thumb2__
4132 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
4135 proc check_effective_target_arm_thumb1_ok { } {
4136 return [check_no_compiler_messages arm_thumb1_ok assembly {
4137 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4138 #error !__arm__ || !__thumb__ || __thumb2__
4140 int foo (int i) { return i; }
4144 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
4147 proc check_effective_target_arm_thumb2_ok { } {
4148 return [check_no_compiler_messages arm_thumb2_ok assembly {
4149 #if !defined(__thumb2__)
4152 int foo (int i) { return i; }
4156 # Return 1 if this is an ARM target where Thumb-1 is used without options
4157 # added by the test.
4159 proc check_effective_target_arm_thumb1 { } {
4160 return [check_no_compiler_messages arm_thumb1 assembly {
4161 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4162 #error !__arm__ || !__thumb__ || __thumb2__
4168 # Return 1 if this is an ARM target where Thumb-2 is used without options
4169 # added by the test.
4171 proc check_effective_target_arm_thumb2 { } {
4172 return [check_no_compiler_messages arm_thumb2 assembly {
4173 #if !defined(__thumb2__)
4180 # Return 1 if this is an ARM target where conditional execution is available.
4182 proc check_effective_target_arm_cond_exec { } {
4183 return [check_no_compiler_messages arm_cond_exec assembly {
4184 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
4191 # Return 1 if this is an ARM cortex-M profile cpu
4193 proc check_effective_target_arm_cortex_m { } {
4194 if { ![istarget arm*-*-*] } {
4197 return [check_no_compiler_messages arm_cortex_m assembly {
4198 #if defined(__ARM_ARCH_ISA_ARM)
4199 #error __ARM_ARCH_ISA_ARM is defined
4205 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4206 # used and MOVT/MOVW instructions to be available.
4208 proc check_effective_target_arm_thumb1_movt_ok {} {
4209 if [check_effective_target_arm_thumb1_ok] {
4210 return [check_no_compiler_messages arm_movt object {
4214 asm ("movt r0, #42");
4222 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4223 # used and CBZ and CBNZ instructions are available.
4225 proc check_effective_target_arm_thumb1_cbz_ok {} {
4226 if [check_effective_target_arm_thumb1_ok] {
4227 return [check_no_compiler_messages arm_movt object {
4231 asm ("cbz r0, 2f\n2:");
4239 # Return 1 if this is an ARM target where ARMv8-M Security Extensions is
4242 proc check_effective_target_arm_cmse_ok {} {
4243 return [check_no_compiler_messages arm_cmse object {
4252 # Return 1 if this compilation turns on string_ops_prefer_neon on.
4254 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
4255 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
4256 int foo (void) { return 0; }
4257 } "-O2 -mprint-tune-info" ]
4260 # Return 1 if the target supports executing NEON instructions, 0
4261 # otherwise. Cache the result.
4263 proc check_effective_target_arm_neon_hw { } {
4264 return [check_runtime arm_neon_hw_available {
4268 long long a = 0, b = 1;
4269 asm ("vorr %P0, %P1, %P2"
4271 : "0" (a), "w" (b));
4274 } [add_options_for_arm_neon ""]]
4277 proc check_effective_target_arm_neonv2_hw { } {
4278 return [check_runtime arm_neon_hwv2_available {
4279 #include "arm_neon.h"
4283 float32x2_t a, b, c;
4284 asm ("vfma.f32 %P0, %P1, %P2"
4286 : "w" (b), "w" (c));
4289 } [add_options_for_arm_neonv2 ""]]
4292 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
4293 # otherwise. The test is valid for AArch64 and ARM. Record the command
4294 # line options needed.
4296 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
4297 global et_arm_v8_1a_neon_flags
4298 set et_arm_v8_1a_neon_flags ""
4300 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4304 # Iterate through sets of options to find the compiler flags that
4305 # need to be added to the -march option. Start with the empty set
4306 # since AArch64 only needs the -march setting.
4307 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4308 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4309 foreach arches { "-march=armv8-a+rdma" "-march=armv8.1-a" } {
4310 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
4311 #if !defined (__ARM_FEATURE_QRDMX)
4312 #error "__ARM_FEATURE_QRDMX not defined"
4314 } "$flags $arches"] } {
4315 set et_arm_v8_1a_neon_flags "$flags $arches"
4324 proc check_effective_target_arm_v8_1a_neon_ok { } {
4325 return [check_cached_effective_target arm_v8_1a_neon_ok \
4326 check_effective_target_arm_v8_1a_neon_ok_nocache]
4329 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
4330 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4331 # Record the command line options needed.
4333 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
4334 global et_arm_v8_2a_fp16_scalar_flags
4335 set et_arm_v8_2a_fp16_scalar_flags ""
4337 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4341 # Iterate through sets of options to find the compiler flags that
4342 # need to be added to the -march option.
4343 foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
4344 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
4345 if { [check_no_compiler_messages_nocache \
4346 arm_v8_2a_fp16_scalar_ok object {
4347 #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC)
4348 #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
4350 } "$flags -march=armv8.2-a+fp16"] } {
4351 set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16"
4359 proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
4360 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
4361 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache]
4364 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
4365 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4366 # Record the command line options needed.
4368 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
4369 global et_arm_v8_2a_fp16_neon_flags
4370 set et_arm_v8_2a_fp16_neon_flags ""
4372 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4376 # Iterate through sets of options to find the compiler flags that
4377 # need to be added to the -march option.
4378 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4379 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4380 if { [check_no_compiler_messages_nocache \
4381 arm_v8_2a_fp16_neon_ok object {
4382 #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
4383 #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
4385 } "$flags -march=armv8.2-a+fp16"] } {
4386 set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16"
4394 proc check_effective_target_arm_v8_2a_fp16_neon_ok { } {
4395 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
4396 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache]
4399 # Return 1 if the target supports ARMv8.2 Adv.SIMD Dot Product
4400 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4401 # Record the command line options needed.
4403 proc check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache { } {
4404 global et_arm_v8_2a_dotprod_neon_flags
4405 set et_arm_v8_2a_dotprod_neon_flags ""
4407 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4411 # Iterate through sets of options to find the compiler flags that
4412 # need to be added to the -march option.
4413 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
4414 if { [check_no_compiler_messages_nocache \
4415 arm_v8_2a_dotprod_neon_ok object {
4416 #if !defined (__ARM_FEATURE_DOTPROD)
4417 #error "__ARM_FEATURE_DOTPROD not defined"
4419 } "$flags -march=armv8.2-a+dotprod"] } {
4420 set et_arm_v8_2a_dotprod_neon_flags "$flags -march=armv8.2-a+dotprod"
4428 proc check_effective_target_arm_v8_2a_dotprod_neon_ok { } {
4429 return [check_cached_effective_target arm_v8_2a_dotprod_neon_ok \
4430 check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache]
4433 proc add_options_for_arm_v8_2a_dotprod_neon { flags } {
4434 if { ! [check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
4437 global et_arm_v8_2a_dotprod_neon_flags
4438 return "$flags $et_arm_v8_2a_dotprod_neon_flags"
4441 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
4444 proc check_effective_target_arm_v8_neon_hw { } {
4445 return [check_runtime arm_v8_neon_hw_available {
4446 #include "arm_neon.h"
4450 float32x2_t a = { 1.0f, 2.0f };
4451 #ifdef __ARM_ARCH_ISA_A64
4452 asm ("frinta %0.2s, %1.2s"
4456 asm ("vrinta.f32 %P0, %P1"
4460 return a[0] == 2.0f;
4462 } [add_options_for_arm_v8_neon ""]]
4465 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
4466 # otherwise. The test is valid for AArch64 and ARM.
4468 proc check_effective_target_arm_v8_1a_neon_hw { } {
4469 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
4472 return [check_runtime arm_v8_1a_neon_hw_available {
4476 #ifdef __ARM_ARCH_ISA_A64
4477 __Int32x2_t a = {0, 1};
4478 __Int32x2_t b = {0, 2};
4481 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
4484 : /* No clobbers. */);
4488 __simd64_int32_t a = {0, 1};
4489 __simd64_int32_t b = {0, 2};
4490 __simd64_int32_t result;
4492 asm ("vqrdmlah.s32 %P0, %P1, %P2"
4495 : /* No clobbers. */);
4500 } [add_options_for_arm_v8_1a_neon ""]]
4503 # Return 1 if the target supports executing floating point instructions from
4504 # ARMv8.2 with the FP16 extension, 0 otherwise. The test is valid for ARM and
4507 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
4508 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
4511 return [check_runtime arm_v8_2a_fp16_scalar_hw_available {
4518 #ifdef __ARM_ARCH_ISA_A64
4520 asm ("fabs %h0, %h1"
4523 : /* No clobbers. */);
4527 asm ("vabs.f16 %0, %1"
4530 : /* No clobbers. */);
4534 return (result == 1.0) ? 0 : 1;
4536 } [add_options_for_arm_v8_2a_fp16_scalar ""]]
4539 # Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
4540 # with the FP16 extension, 0 otherwise. The test is valid for ARM and for
4543 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
4544 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
4547 return [check_runtime arm_v8_2a_fp16_neon_hw_available {
4551 #ifdef __ARM_ARCH_ISA_A64
4553 __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
4554 __Float16x4_t result;
4556 asm ("fabs %0.4h, %1.4h"
4559 : /* No clobbers. */);
4563 __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
4564 __simd64_float16_t result;
4566 asm ("vabs.f16 %P0, %P1"
4569 : /* No clobbers. */);
4573 return (result[0] == 1.0) ? 0 : 1;
4575 } [add_options_for_arm_v8_2a_fp16_neon ""]]
4578 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.2
4579 # with the Dot Product extension, 0 otherwise. The test is valid for ARM and for
4582 proc check_effective_target_arm_v8_2a_dotprod_neon_hw { } {
4583 if { ![check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
4586 return [check_runtime arm_v8_2a_dotprod_neon_hw_available {
4587 #include "arm_neon.h"
4592 uint32x2_t results = {0,0};
4593 uint8x8_t a = {1,1,1,1,2,2,2,2};
4594 uint8x8_t b = {2,2,2,2,3,3,3,3};
4596 #ifdef __ARM_ARCH_ISA_A64
4597 asm ("udot %0.2s, %1.8b, %2.8b"
4600 : /* No clobbers. */);
4603 asm ("vudot.u8 %P0, %P1, %P2"
4606 : /* No clobbers. */);
4609 return (results[0] == 8 && results[1] == 24) ? 1 : 0;
4611 } [add_options_for_arm_v8_2a_dotprod_neon ""]]
4614 # Return 1 if this is a ARM target with NEON enabled.
4616 proc check_effective_target_arm_neon { } {
4617 if { [check_effective_target_arm32] } {
4618 return [check_no_compiler_messages arm_neon object {
4619 #ifndef __ARM_NEON__
4630 proc check_effective_target_arm_neonv2 { } {
4631 if { [check_effective_target_arm32] } {
4632 return [check_no_compiler_messages arm_neon object {
4633 #ifndef __ARM_NEON__
4636 #ifndef __ARM_FEATURE_FMA
4648 # Return 1 if this is an ARM target with load acquire and store release
4649 # instructions for 8-, 16- and 32-bit types.
4651 proc check_effective_target_arm_acq_rel { } {
4652 return [check_no_compiler_messages arm_acq_rel object {
4654 load_acquire_store_release (void)
4656 asm ("lda r0, [r1]\n\t"
4662 : : : "r0", "memory");
4667 # Add the options needed for MIPS Paired-Single.
4669 proc add_options_for_mpaired_single { flags } {
4670 if { ! [check_effective_target_mpaired_single] } {
4673 return "$flags -mpaired-single"
4676 # Add the options needed for MIPS SIMD Architecture.
4678 proc add_options_for_mips_msa { flags } {
4679 if { ! [check_effective_target_mips_msa] } {
4682 return "$flags -mmsa"
4685 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
4686 # the Loongson vector modes.
4688 proc check_effective_target_mips_loongson { } {
4689 return [check_no_compiler_messages loongson assembly {
4690 #if !defined(__mips_loongson_vector_rev)
4691 #error !__mips_loongson_vector_rev
4696 # Return 1 if this is a MIPS target that supports the legacy NAN.
4698 proc check_effective_target_mips_nanlegacy { } {
4699 return [check_no_compiler_messages nanlegacy assembly {
4701 int main () { return 0; }
4705 # Return 1 if an MSA program can be compiled to object
4707 proc check_effective_target_mips_msa { } {
4708 if ![check_effective_target_nomips16] {
4711 return [check_no_compiler_messages msa object {
4712 #if !defined(__mips_msa)
4713 #error "MSA NOT AVAIL"
4715 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
4716 #error "MSA NOT AVAIL FOR ISA REV < 2"
4718 #if !defined(__mips_hard_float)
4719 #error "MSA HARD_FLOAT REQUIRED"
4721 #if __mips_fpr != 64
4722 #error "MSA 64-bit FPR REQUIRED"
4728 v8i16 v = __builtin_msa_ldi_h (1);
4736 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
4739 proc check_effective_target_arm_eabi { } {
4740 return [check_no_compiler_messages arm_eabi object {
4741 #ifndef __ARM_EABI__
4749 # Return 1 if this is an ARM target that adheres to the hard-float variant of
4750 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
4752 proc check_effective_target_arm_hf_eabi { } {
4753 return [check_no_compiler_messages arm_hf_eabi object {
4754 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
4755 #error not hard-float EABI
4762 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
4763 # Some multilibs may be incompatible with this option.
4765 proc check_effective_target_arm_iwmmxt_ok { } {
4766 if { [check_effective_target_arm32] } {
4767 return [check_no_compiler_messages arm_iwmmxt_ok object {
4775 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
4776 # for an ARM target.
4777 proc check_effective_target_arm_prefer_ldrd_strd { } {
4778 if { ![check_effective_target_arm32] } {
4782 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
4783 void foo (void) { __asm__ ("" ::: "r4", "r5"); }
4787 # Return 1 if this is a PowerPC target supporting -meabi.
4789 proc check_effective_target_powerpc_eabi_ok { } {
4790 if { [istarget powerpc*-*-*] } {
4791 return [check_no_compiler_messages powerpc_eabi_ok object {
4799 # Return 1 if this is a PowerPC target with floating-point registers.
4801 proc check_effective_target_powerpc_fprs { } {
4802 if { [istarget powerpc*-*-*]
4803 || [istarget rs6000-*-*] } {
4804 return [check_no_compiler_messages powerpc_fprs object {
4816 # Return 1 if this is a PowerPC target with hardware double-precision
4819 proc check_effective_target_powerpc_hard_double { } {
4820 if { [istarget powerpc*-*-*]
4821 || [istarget rs6000-*-*] } {
4822 return [check_no_compiler_messages powerpc_hard_double object {
4834 # Return 1 if this is a PowerPC target supporting -maltivec.
4836 proc check_effective_target_powerpc_altivec_ok { } {
4837 if { ([istarget powerpc*-*-*]
4838 && ![istarget powerpc-*-linux*paired*])
4839 || [istarget rs6000-*-*] } {
4840 # AltiVec is not supported on AIX before 5.3.
4841 if { [istarget powerpc*-*-aix4*]
4842 || [istarget powerpc*-*-aix5.1*]
4843 || [istarget powerpc*-*-aix5.2*] } {
4846 return [check_no_compiler_messages powerpc_altivec_ok object {
4854 # Return 1 if this is a PowerPC target supporting -mpower8-vector
4856 proc check_effective_target_powerpc_p8vector_ok { } {
4857 if { ([istarget powerpc*-*-*]
4858 && ![istarget powerpc-*-linux*paired*])
4859 || [istarget rs6000-*-*] } {
4860 # AltiVec is not supported on AIX before 5.3.
4861 if { [istarget powerpc*-*-aix4*]
4862 || [istarget powerpc*-*-aix5.1*]
4863 || [istarget powerpc*-*-aix5.2*] } {
4866 return [check_no_compiler_messages powerpc_p8vector_ok object {
4869 asm volatile ("xxlorc vs0,vs0,vs0");
4871 asm volatile ("xxlorc 0,0,0");
4875 } "-mpower8-vector"]
4881 # Return 1 if this is a PowerPC target supporting -mpower9-vector
4883 proc check_effective_target_powerpc_p9vector_ok { } {
4884 if { ([istarget powerpc*-*-*]
4885 && ![istarget powerpc-*-linux*paired*])
4886 || [istarget rs6000-*-*] } {
4887 # AltiVec is not supported on AIX before 5.3.
4888 if { [istarget powerpc*-*-aix4*]
4889 || [istarget powerpc*-*-aix5.1*]
4890 || [istarget powerpc*-*-aix5.2*] } {
4893 return [check_no_compiler_messages powerpc_p9vector_ok object {
4896 vector double v = (vector double) { 0.0, 0.0 };
4897 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
4900 } "-mpower9-vector"]
4906 # Return 1 if this is a PowerPC target supporting -mmodulo
4908 proc check_effective_target_powerpc_p9modulo_ok { } {
4909 if { ([istarget powerpc*-*-*]
4910 && ![istarget powerpc-*-linux*paired*])
4911 || [istarget rs6000-*-*] } {
4912 # AltiVec is not supported on AIX before 5.3.
4913 if { [istarget powerpc*-*-aix4*]
4914 || [istarget powerpc*-*-aix5.1*]
4915 || [istarget powerpc*-*-aix5.2*] } {
4918 return [check_no_compiler_messages powerpc_p9modulo_ok object {
4920 int i = 5, j = 3, r = -1;
4921 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
4930 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
4931 # software emulation on power7/power8 systems or hardware support on power9.
4933 proc check_effective_target_powerpc_float128_sw_ok { } {
4934 if { ([istarget powerpc*-*-*]
4935 && ![istarget powerpc-*-linux*paired*])
4936 || [istarget rs6000-*-*] } {
4937 # AltiVec is not supported on AIX before 5.3.
4938 if { [istarget powerpc*-*-aix4*]
4939 || [istarget powerpc*-*-aix5.1*]
4940 || [istarget powerpc*-*-aix5.2*] } {
4943 return [check_no_compiler_messages powerpc_float128_sw_ok object {
4944 volatile __float128 x = 1.0q;
4945 volatile __float128 y = 2.0q;
4947 __float128 z = x + y;
4950 } "-mfloat128 -mvsx"]
4956 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
4957 # support on power9.
4959 proc check_effective_target_powerpc_float128_hw_ok { } {
4960 if { ([istarget powerpc*-*-*]
4961 && ![istarget powerpc-*-linux*paired*])
4962 || [istarget rs6000-*-*] } {
4963 # AltiVec is not supported on AIX before 5.3.
4964 if { [istarget powerpc*-*-aix4*]
4965 || [istarget powerpc*-*-aix5.1*]
4966 || [istarget powerpc*-*-aix5.2*] } {
4969 return [check_no_compiler_messages powerpc_float128_hw_ok object {
4970 volatile __float128 x = 1.0q;
4971 volatile __float128 y = 2.0q;
4974 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
4977 } "-mfloat128-hardware"]
4983 # Return 1 if this is a PowerPC target supporting -mvsx
4985 proc check_effective_target_powerpc_vsx_ok { } {
4986 if { ([istarget powerpc*-*-*]
4987 && ![istarget powerpc-*-linux*paired*])
4988 || [istarget rs6000-*-*] } {
4989 # VSX is not supported on AIX before 7.1.
4990 if { [istarget powerpc*-*-aix4*]
4991 || [istarget powerpc*-*-aix5*]
4992 || [istarget powerpc*-*-aix6*] } {
4995 return [check_no_compiler_messages powerpc_vsx_ok object {
4998 asm volatile ("xxlor vs0,vs0,vs0");
5000 asm volatile ("xxlor 0,0,0");
5010 # Return 1 if this is a PowerPC target supporting -mhtm
5012 proc check_effective_target_powerpc_htm_ok { } {
5013 if { ([istarget powerpc*-*-*]
5014 && ![istarget powerpc-*-linux*paired*])
5015 || [istarget rs6000-*-*] } {
5016 # HTM is not supported on AIX yet.
5017 if { [istarget powerpc*-*-aix*] } {
5020 return [check_no_compiler_messages powerpc_htm_ok object {
5022 asm volatile ("tbegin. 0");
5031 # Return 1 if the target supports executing HTM hardware instructions,
5032 # 0 otherwise. Cache the result.
5034 proc check_htm_hw_available { } {
5035 return [check_cached_effective_target htm_hw_available {
5036 # For now, disable on Darwin
5037 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
5040 check_runtime_nocache htm_hw_available {
5050 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
5052 proc check_effective_target_powerpc_ppu_ok { } {
5053 if [check_effective_target_powerpc_altivec_ok] {
5054 return [check_no_compiler_messages cell_asm_available object {
5057 asm volatile ("lvlx v0,v0,v0");
5059 asm volatile ("lvlx 0,0,0");
5069 # Return 1 if this is a PowerPC target that supports SPU.
5071 proc check_effective_target_powerpc_spu { } {
5072 if { [istarget powerpc*-*-linux*] } {
5073 return [check_effective_target_powerpc_altivec_ok]
5079 # Return 1 if this is a PowerPC SPE target. The check includes options
5080 # specified by dg-options for this test, so don't cache the result.
5082 proc check_effective_target_powerpc_spe_nocache { } {
5083 if { [istarget powerpc*-*-*] } {
5084 return [check_no_compiler_messages_nocache powerpc_spe object {
5090 } [current_compiler_flags]]
5096 # Return 1 if this is a PowerPC target with SPE enabled.
5098 proc check_effective_target_powerpc_spe { } {
5099 if { [istarget powerpc*-*-*] } {
5100 return [check_no_compiler_messages powerpc_spe object {
5112 # Return 1 if this is a PowerPC target with Altivec enabled.
5114 proc check_effective_target_powerpc_altivec { } {
5115 if { [istarget powerpc*-*-*] } {
5116 return [check_no_compiler_messages powerpc_altivec object {
5128 # Return 1 if this is a PowerPC 405 target. The check includes options
5129 # specified by dg-options for this test, so don't cache the result.
5131 proc check_effective_target_powerpc_405_nocache { } {
5132 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
5133 return [check_no_compiler_messages_nocache powerpc_405 object {
5139 } [current_compiler_flags]]
5145 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
5147 proc check_effective_target_powerpc_elfv2 { } {
5148 if { [istarget powerpc*-*-*] } {
5149 return [check_no_compiler_messages powerpc_elfv2 object {
5151 #error not ELF v2 ABI
5161 # Return 1 if this is a SPU target with a toolchain that
5162 # supports automatic overlay generation.
5164 proc check_effective_target_spu_auto_overlay { } {
5165 if { [istarget spu*-*-elf*] } {
5166 return [check_no_compiler_messages spu_auto_overlay executable {
5168 } "-Wl,--auto-overlay" ]
5174 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
5175 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
5176 # test environment appears to run executables on such a simulator.
5178 proc check_effective_target_ultrasparc_hw { } {
5179 return [check_runtime ultrasparc_hw {
5180 int main() { return 0; }
5181 } "-mcpu=ultrasparc"]
5184 # Return 1 if the test environment supports executing UltraSPARC VIS2
5185 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
5187 proc check_effective_target_ultrasparc_vis2_hw { } {
5188 return [check_runtime ultrasparc_vis2_hw {
5189 int main() { __asm__(".word 0x81b00320"); return 0; }
5190 } "-mcpu=ultrasparc3"]
5193 # Return 1 if the test environment supports executing UltraSPARC VIS3
5194 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
5196 proc check_effective_target_ultrasparc_vis3_hw { } {
5197 return [check_runtime ultrasparc_vis3_hw {
5198 int main() { __asm__(".word 0x81b00220"); return 0; }
5202 # Return 1 if this is a SPARC-V9 target.
5204 proc check_effective_target_sparc_v9 { } {
5205 if { [istarget sparc*-*-*] } {
5206 return [check_no_compiler_messages sparc_v9 object {
5208 asm volatile ("return %i7+8");
5217 # Return 1 if this is a SPARC target with VIS enabled.
5219 proc check_effective_target_sparc_vis { } {
5220 if { [istarget sparc*-*-*] } {
5221 return [check_no_compiler_messages sparc_vis object {
5233 # Return 1 if the target supports hardware vector shift operation.
5235 proc check_effective_target_vect_shift { } {
5236 global et_vect_shift_saved
5239 if [info exists et_vect_shift_saved($et_index)] {
5240 verbose "check_effective_target_vect_shift: using cached result" 2
5242 set et_vect_shift_saved($et_index) 0
5243 if { ([istarget powerpc*-*-*]
5244 && ![istarget powerpc-*-linux*paired*])
5245 || [istarget ia64-*-*]
5246 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5247 || [istarget aarch64*-*-*]
5248 || [is-effective-target arm_neon]
5249 || ([istarget mips*-*-*]
5250 && ([et-is-effective-target mips_msa]
5251 || [et-is-effective-target mips_loongson]))
5252 || ([istarget s390*-*-*]
5253 && [check_effective_target_s390_vx]) } {
5254 set et_vect_shift_saved($et_index) 1
5258 verbose "check_effective_target_vect_shift:\
5259 returning $et_vect_shift_saved($et_index)" 2
5260 return $et_vect_shift_saved($et_index)
5263 proc check_effective_target_whole_vector_shift { } {
5264 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5265 || [istarget ia64-*-*]
5266 || [istarget aarch64*-*-*]
5267 || [istarget powerpc64*-*-*]
5268 || ([is-effective-target arm_neon]
5269 && [check_effective_target_arm_little_endian])
5270 || ([istarget mips*-*-*]
5271 && [et-is-effective-target mips_loongson])
5272 || ([istarget s390*-*-*]
5273 && [check_effective_target_s390_vx]) } {
5279 verbose "check_effective_target_vect_long: returning $answer" 2
5283 # Return 1 if the target supports vector bswap operations.
5285 proc check_effective_target_vect_bswap { } {
5286 global et_vect_bswap_saved
5289 if [info exists et_vect_bswap_saved($et_index)] {
5290 verbose "check_effective_target_vect_bswap: using cached result" 2
5292 set et_vect_bswap_saved($et_index) 0
5293 if { [istarget aarch64*-*-*]
5294 || [is-effective-target arm_neon]
5296 set et_vect_bswap_saved($et_index) 1
5300 verbose "check_effective_target_vect_bswap:\
5301 returning $et_vect_bswap_saved($et_index)" 2
5302 return $et_vect_bswap_saved($et_index)
5305 # Return 1 if the target supports hardware vector shift operation for char.
5307 proc check_effective_target_vect_shift_char { } {
5308 global et_vect_shift_char_saved
5311 if [info exists et_vect_shift_char_saved($et_index)] {
5312 verbose "check_effective_target_vect_shift_char: using cached result" 2
5314 set et_vect_shift_char_saved($et_index) 0
5315 if { ([istarget powerpc*-*-*]
5316 && ![istarget powerpc-*-linux*paired*])
5317 || [is-effective-target arm_neon]
5318 || ([istarget mips*-*-*]
5319 && [et-is-effective-target mips_msa])
5320 || ([istarget s390*-*-*]
5321 && [check_effective_target_s390_vx]) } {
5322 set et_vect_shift_char_saved($et_index) 1
5326 verbose "check_effective_target_vect_shift_char:\
5327 returning $et_vect_shift_char_saved($et_index)" 2
5328 return $et_vect_shift_char_saved($et_index)
5331 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
5333 # This can change for different subtargets so do not cache the result.
5335 proc check_effective_target_vect_long { } {
5336 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5337 || (([istarget powerpc*-*-*]
5338 && ![istarget powerpc-*-linux*paired*])
5339 && [check_effective_target_ilp32])
5340 || [is-effective-target arm_neon]
5341 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
5342 || [istarget aarch64*-*-*]
5343 || ([istarget mips*-*-*]
5344 && [et-is-effective-target mips_msa])
5345 || ([istarget s390*-*-*]
5346 && [check_effective_target_s390_vx]) } {
5352 verbose "check_effective_target_vect_long: returning $answer" 2
5356 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
5358 # This won't change for different subtargets so cache the result.
5360 proc check_effective_target_vect_float { } {
5361 global et_vect_float_saved
5364 if [info exists et_vect_float_saved($et_index)] {
5365 verbose "check_effective_target_vect_float: using cached result" 2
5367 set et_vect_float_saved($et_index) 0
5368 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5369 || [istarget powerpc*-*-*]
5370 || [istarget spu-*-*]
5371 || [istarget mips-sde-elf]
5372 || [istarget mipsisa64*-*-*]
5373 || [istarget ia64-*-*]
5374 || [istarget aarch64*-*-*]
5375 || ([istarget mips*-*-*]
5376 && [et-is-effective-target mips_msa])
5377 || [is-effective-target arm_neon]
5378 || ([istarget s390*-*-*]
5379 && [check_effective_target_s390_vxe]) } {
5380 set et_vect_float_saved($et_index) 1
5384 verbose "check_effective_target_vect_float:\
5385 returning $et_vect_float_saved($et_index)" 2
5386 return $et_vect_float_saved($et_index)
5389 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
5391 # This won't change for different subtargets so cache the result.
5393 proc check_effective_target_vect_double { } {
5394 global et_vect_double_saved
5397 if [info exists et_vect_double_saved($et_index)] {
5398 verbose "check_effective_target_vect_double: using cached result" 2
5400 set et_vect_double_saved($et_index) 0
5401 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
5402 && [check_no_compiler_messages vect_double assembly {
5403 #ifdef __tune_atom__
5404 # error No double vectorizer support.
5407 || [istarget aarch64*-*-*]
5408 || [istarget spu-*-*]
5409 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
5410 || ([istarget mips*-*-*]
5411 && [et-is-effective-target mips_msa])
5412 || ([istarget s390*-*-*]
5413 && [check_effective_target_s390_vx]) } {
5414 set et_vect_double_saved($et_index) 1
5418 verbose "check_effective_target_vect_double:\
5419 returning $et_vect_double_saved($et_index)" 2
5420 return $et_vect_double_saved($et_index)
5423 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
5425 # This won't change for different subtargets so cache the result.
5427 proc check_effective_target_vect_long_long { } {
5428 global et_vect_long_long_saved
5431 if [info exists et_vect_long_long_saved($et_index)] {
5432 verbose "check_effective_target_vect_long_long: using cached result" 2
5434 set et_vect_long_long_saved($et_index) 0
5435 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5436 || ([istarget mips*-*-*]
5437 && [et-is-effective-target mips_msa])
5438 || ([istarget s390*-*-*]
5439 && [check_effective_target_s390_vx]) } {
5440 set et_vect_long_long_saved($et_index) 1
5444 verbose "check_effective_target_vect_long_long:\
5445 returning $et_vect_long_long_saved($et_index)" 2
5446 return $et_vect_long_long_saved($et_index)
5450 # Return 1 if the target plus current options does not support a vector
5451 # max instruction on "int", 0 otherwise.
5453 # This won't change for different subtargets so cache the result.
5455 proc check_effective_target_vect_no_int_min_max { } {
5456 global et_vect_no_int_min_max_saved
5459 if [info exists et_vect_no_int_min_max_saved($et_index)] {
5460 verbose "check_effective_target_vect_no_int_min_max:\
5461 using cached result" 2
5463 set et_vect_no_int_min_max_saved($et_index) 0
5464 if { [istarget sparc*-*-*]
5465 || [istarget spu-*-*]
5466 || [istarget alpha*-*-*]
5467 || ([istarget mips*-*-*]
5468 && [et-is-effective-target mips_loongson]) } {
5469 set et_vect_no_int_min_max_saved($et_index) 1
5472 verbose "check_effective_target_vect_no_int_min_max:\
5473 returning $et_vect_no_int_min_max_saved($et_index)" 2
5474 return $et_vect_no_int_min_max_saved($et_index)
5477 # Return 1 if the target plus current options does not support a vector
5478 # add instruction on "int", 0 otherwise.
5480 # This won't change for different subtargets so cache the result.
5482 proc check_effective_target_vect_no_int_add { } {
5483 global et_vect_no_int_add_saved
5486 if [info exists et_vect_no_int_add_saved($et_index)] {
5487 verbose "check_effective_target_vect_no_int_add: using cached result" 2
5489 set et_vect_no_int_add_saved($et_index) 0
5490 # Alpha only supports vector add on V8QI and V4HI.
5491 if { [istarget alpha*-*-*] } {
5492 set et_vect_no_int_add_saved($et_index) 1
5495 verbose "check_effective_target_vect_no_int_add:\
5496 returning $et_vect_no_int_add_saved($et_index)" 2
5497 return $et_vect_no_int_add_saved($et_index)
5500 # Return 1 if the target plus current options does not support vector
5501 # bitwise instructions, 0 otherwise.
5503 # This won't change for different subtargets so cache the result.
5505 proc check_effective_target_vect_no_bitwise { } {
5506 global et_vect_no_bitwise_saved
5509 if [info exists et_vect_no_bitwise_saved($et_index)] {
5510 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
5512 set et_vect_no_bitwise_saved($et_index) 0
5514 verbose "check_effective_target_vect_no_bitwise:\
5515 returning $et_vect_no_bitwise_saved($et_index)" 2
5516 return $et_vect_no_bitwise_saved($et_index)
5519 # Return 1 if the target plus current options supports vector permutation,
5522 # This won't change for different subtargets so cache the result.
5524 proc check_effective_target_vect_perm { } {
5525 global et_vect_perm_saved
5528 if [info exists et_vect_perm_saved($et_index)] {
5529 verbose "check_effective_target_vect_perm: using cached result" 2
5531 set et_vect_perm_saved($et_index) 0
5532 if { [is-effective-target arm_neon]
5533 || [istarget aarch64*-*-*]
5534 || [istarget powerpc*-*-*]
5535 || [istarget spu-*-*]
5536 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5537 || ([istarget mips*-*-*]
5538 && ([et-is-effective-target mpaired_single]
5539 || [et-is-effective-target mips_msa]))
5540 || ([istarget s390*-*-*]
5541 && [check_effective_target_s390_vx]) } {
5542 set et_vect_perm_saved($et_index) 1
5545 verbose "check_effective_target_vect_perm:\
5546 returning $et_vect_perm_saved($et_index)" 2
5547 return $et_vect_perm_saved($et_index)
5550 # Return 1 if, for some VF:
5552 # - the target's default vector size is VF * ELEMENT_BITS bits
5554 # - it is possible to implement the equivalent of:
5556 # int<ELEMENT_BITS>_t s1[COUNT][COUNT * VF], s2[COUNT * VF];
5557 # for (int i = 0; i < COUNT; ++i)
5558 # for (int j = 0; j < COUNT * VF; ++j)
5559 # s1[i][j] = s2[j - j % COUNT + i]
5561 # using only a single 2-vector permute for each vector in s1.
5563 # E.g. for COUNT == 3 and vector length 4, the two arrays would be:
5565 # s2 | a0 a1 a2 a3 | b0 b1 b2 b3 | c0 c1 c2 c3
5566 # ------+-------------+-------------+------------
5567 # s1[0] | a0 a0 a0 a3 | a3 a3 b2 b2 | b2 c1 c1 c1
5568 # s1[1] | a1 a1 a1 b0 | b0 b0 b3 b3 | b3 c2 c2 c2
5569 # s1[2] | a2 a2 a2 b1 | b1 b1 c0 c0 | c0 c3 c3 c3
5571 # Each s1 permute requires only two of a, b and c.
5573 # The distance between the start of vector n in s1[0] and the start
5574 # of vector n in s2 is:
5576 # A = (n * VF) % COUNT
5578 # The corresponding value for the end of vector n is:
5580 # B = (n * VF + VF - 1) % COUNT
5582 # Subtracting i from each value gives the corresponding difference
5583 # for s1[i]. The condition being tested by this function is false
5584 # iff A - i > 0 and B - i < 0 for some i and n, such that the first
5585 # element for s1[i] comes from vector n - 1 of s2 and the last element
5586 # comes from vector n + 1 of s2. The condition is therefore true iff
5587 # A <= B for all n. This is turn means the condition is true iff:
5589 # (n * VF) % COUNT + (VF - 1) % COUNT < COUNT
5591 # for all n. COUNT - (n * VF) % COUNT is bounded by gcd (VF, COUNT),
5592 # and will be that value for at least one n in [0, COUNT), so we want:
5594 # (VF - 1) % COUNT < gcd (VF, COUNT)
5596 proc vect_perm_supported { count element_bits } {
5597 set vector_bits [lindex [available_vector_sizes] 0]
5598 if { $vector_bits <= 0 } {
5601 set vf [expr { $vector_bits / $element_bits }]
5603 # Compute gcd (VF, COUNT).
5606 while { $temp1 > 0 } {
5607 set temp2 [expr { $gcd % $temp1 }]
5611 return [expr { ($vf - 1) % $count < $gcd }]
5614 # Return 1 if the target supports SLP permutation of 3 vectors when each
5615 # element has 32 bits.
5617 proc check_effective_target_vect_perm3_int { } {
5618 return [expr { [check_effective_target_vect_perm]
5619 && [vect_perm_supported 3 32] }]
5622 # Return 1 if the target plus current options supports vector permutation
5623 # on byte-sized elements, 0 otherwise.
5625 # This won't change for different subtargets so cache the result.
5627 proc check_effective_target_vect_perm_byte { } {
5628 global et_vect_perm_byte_saved
5631 if [info exists et_vect_perm_byte_saved($et_index)] {
5632 verbose "check_effective_target_vect_perm_byte: using cached result" 2
5634 set et_vect_perm_byte_saved($et_index) 0
5635 if { ([is-effective-target arm_neon]
5636 && [is-effective-target arm_little_endian])
5637 || ([istarget aarch64*-*-*]
5638 && [is-effective-target aarch64_little_endian])
5639 || [istarget powerpc*-*-*]
5640 || [istarget spu-*-*]
5641 || ([istarget mips-*.*]
5642 && [et-is-effective-target mips_msa])
5643 || ([istarget s390*-*-*]
5644 && [check_effective_target_s390_vx]) } {
5645 set et_vect_perm_byte_saved($et_index) 1
5648 verbose "check_effective_target_vect_perm_byte:\
5649 returning $et_vect_perm_byte_saved($et_index)" 2
5650 return $et_vect_perm_byte_saved($et_index)
5653 # Return 1 if the target supports SLP permutation of 3 vectors when each
5654 # element has 8 bits.
5656 proc check_effective_target_vect_perm3_byte { } {
5657 return [expr { [check_effective_target_vect_perm_byte]
5658 && [vect_perm_supported 3 8] }]
5661 # Return 1 if the target plus current options supports vector permutation
5662 # on short-sized elements, 0 otherwise.
5664 # This won't change for different subtargets so cache the result.
5666 proc check_effective_target_vect_perm_short { } {
5667 global et_vect_perm_short_saved
5670 if [info exists et_vect_perm_short_saved($et_index)] {
5671 verbose "check_effective_target_vect_perm_short: using cached result" 2
5673 set et_vect_perm_short_saved($et_index) 0
5674 if { ([is-effective-target arm_neon]
5675 && [is-effective-target arm_little_endian])
5676 || ([istarget aarch64*-*-*]
5677 && [is-effective-target aarch64_little_endian])
5678 || [istarget powerpc*-*-*]
5679 || [istarget spu-*-*]
5680 || ([istarget mips*-*-*]
5681 && [et-is-effective-target mips_msa])
5682 || ([istarget s390*-*-*]
5683 && [check_effective_target_s390_vx]) } {
5684 set et_vect_perm_short_saved($et_index) 1
5687 verbose "check_effective_target_vect_perm_short:\
5688 returning $et_vect_perm_short_saved($et_index)" 2
5689 return $et_vect_perm_short_saved($et_index)
5692 # Return 1 if the target supports SLP permutation of 3 vectors when each
5693 # element has 16 bits.
5695 proc check_effective_target_vect_perm3_short { } {
5696 return [expr { [check_effective_target_vect_perm_short]
5697 && [vect_perm_supported 3 16] }]
5700 # Return 1 if the target plus current options supports folding of
5701 # copysign into XORSIGN.
5703 # This won't change for different subtargets so cache the result.
5705 proc check_effective_target_xorsign { } {
5706 global et_xorsign_saved
5709 if [info exists et_xorsign_saved($et_index)] {
5710 verbose "check_effective_target_xorsign: using cached result" 2
5712 set et_xorsign_saved($et_index) 0
5713 if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } {
5714 set et_xorsign_saved($et_index) 1
5717 verbose "check_effective_target_xorsign:\
5718 returning $et_xorsign_saved($et_index)" 2
5719 return $et_xorsign_saved($et_index)
5722 # Return 1 if the target plus current options supports a vector
5723 # widening summation of *short* args into *int* result, 0 otherwise.
5725 # This won't change for different subtargets so cache the result.
5727 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
5728 global et_vect_widen_sum_hi_to_si_pattern_saved
5731 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved($et_index)] {
5732 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5733 using cached result" 2
5735 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 0
5736 if { [istarget powerpc*-*-*]
5737 || [istarget aarch64*-*-*]
5738 || [is-effective-target arm_neon]
5739 || [istarget ia64-*-*] } {
5740 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 1
5743 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5744 returning $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)" 2
5745 return $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)
5748 # Return 1 if the target plus current options supports a vector
5749 # widening summation of *short* args into *int* result, 0 otherwise.
5750 # A target can also support this widening summation if it can support
5751 # promotion (unpacking) from shorts to ints.
5753 # This won't change for different subtargets so cache the result.
5755 proc check_effective_target_vect_widen_sum_hi_to_si { } {
5756 global et_vect_widen_sum_hi_to_si_saved
5759 if [info exists et_vect_widen_sum_hi_to_si_saved($et_index)] {
5760 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
5761 using cached result" 2
5763 set et_vect_widen_sum_hi_to_si_saved($et_index) \
5764 [check_effective_target_vect_unpack]
5765 if { [istarget powerpc*-*-*]
5766 || [istarget ia64-*-*] } {
5767 set et_vect_widen_sum_hi_to_si_saved($et_index) 1
5770 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
5771 returning $et_vect_widen_sum_hi_to_si_saved($et_index)" 2
5772 return $et_vect_widen_sum_hi_to_si_saved($et_index)
5775 # Return 1 if the target plus current options supports a vector
5776 # widening summation of *char* args into *short* result, 0 otherwise.
5777 # A target can also support this widening summation if it can support
5778 # promotion (unpacking) from chars to shorts.
5780 # This won't change for different subtargets so cache the result.
5782 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
5783 global et_vect_widen_sum_qi_to_hi_saved
5786 if [info exists et_vect_widen_sum_qi_to_hi_saved($et_index)] {
5787 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5788 using cached result" 2
5790 set et_vect_widen_sum_qi_to_hi_saved($et_index) 0
5791 if { [check_effective_target_vect_unpack]
5792 || [is-effective-target arm_neon]
5793 || [istarget ia64-*-*] } {
5794 set et_vect_widen_sum_qi_to_hi_saved($et_index) 1
5797 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5798 returning $et_vect_widen_sum_qi_to_hi_saved($et_index)" 2
5799 return $et_vect_widen_sum_qi_to_hi_saved($et_index)
5802 # Return 1 if the target plus current options supports a vector
5803 # widening summation of *char* args into *int* result, 0 otherwise.
5805 # This won't change for different subtargets so cache the result.
5807 proc check_effective_target_vect_widen_sum_qi_to_si { } {
5808 global et_vect_widen_sum_qi_to_si_saved
5811 if [info exists et_vect_widen_sum_qi_to_si_saved($et_index)] {
5812 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
5813 using cached result" 2
5815 set et_vect_widen_sum_qi_to_si_saved($et_index) 0
5816 if { [istarget powerpc*-*-*] } {
5817 set et_vect_widen_sum_qi_to_si_saved($et_index) 1
5820 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
5821 returning $et_vect_widen_sum_qi_to_si_saved($et_index)" 2
5822 return $et_vect_widen_sum_qi_to_si_saved($et_index)
5825 # Return 1 if the target plus current options supports a vector
5826 # widening multiplication of *char* args into *short* result, 0 otherwise.
5827 # A target can also support this widening multplication if it can support
5828 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
5829 # multiplication of shorts).
5831 # This won't change for different subtargets so cache the result.
5834 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
5835 global et_vect_widen_mult_qi_to_hi_saved
5838 if [info exists et_vect_widen_mult_qi_to_hi_saved($et_index)] {
5839 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
5840 using cached result" 2
5842 if { [check_effective_target_vect_unpack]
5843 && [check_effective_target_vect_short_mult] } {
5844 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
5846 set et_vect_widen_mult_qi_to_hi_saved($et_index) 0
5848 if { [istarget powerpc*-*-*]
5849 || [istarget aarch64*-*-*]
5850 || [is-effective-target arm_neon]
5851 || ([istarget s390*-*-*]
5852 && [check_effective_target_s390_vx]) } {
5853 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
5856 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
5857 returning $et_vect_widen_mult_qi_to_hi_saved($et_index)" 2
5858 return $et_vect_widen_mult_qi_to_hi_saved($et_index)
5861 # Return 1 if the target plus current options supports a vector
5862 # widening multiplication of *short* args into *int* result, 0 otherwise.
5863 # A target can also support this widening multplication if it can support
5864 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
5865 # multiplication of ints).
5867 # This won't change for different subtargets so cache the result.
5870 proc check_effective_target_vect_widen_mult_hi_to_si { } {
5871 global et_vect_widen_mult_hi_to_si_saved
5874 if [info exists et_vect_widen_mult_hi_to_si_saved($et_index)] {
5875 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
5876 using cached result" 2
5878 if { [check_effective_target_vect_unpack]
5879 && [check_effective_target_vect_int_mult] } {
5880 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
5882 set et_vect_widen_mult_hi_to_si_saved($et_index) 0
5884 if { [istarget powerpc*-*-*]
5885 || [istarget spu-*-*]
5886 || [istarget ia64-*-*]
5887 || [istarget aarch64*-*-*]
5888 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5889 || [is-effective-target arm_neon]
5890 || ([istarget s390*-*-*]
5891 && [check_effective_target_s390_vx]) } {
5892 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
5895 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
5896 returning $et_vect_widen_mult_hi_to_si_saved($et_index)" 2
5897 return $et_vect_widen_mult_hi_to_si_saved($et_index)
5900 # Return 1 if the target plus current options supports a vector
5901 # widening multiplication of *char* args into *short* result, 0 otherwise.
5903 # This won't change for different subtargets so cache the result.
5905 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
5906 global et_vect_widen_mult_qi_to_hi_pattern_saved
5909 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)] {
5910 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5911 using cached result" 2
5913 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 0
5914 if { [istarget powerpc*-*-*]
5915 || ([is-effective-target arm_neon]
5916 && [check_effective_target_arm_little_endian])
5917 || ([istarget s390*-*-*]
5918 && [check_effective_target_s390_vx]) } {
5919 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 1
5922 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5923 returning $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)" 2
5924 return $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)
5927 # Return 1 if the target plus current options supports a vector
5928 # widening multiplication of *short* args into *int* result, 0 otherwise.
5930 # This won't change for different subtargets so cache the result.
5932 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
5933 global et_vect_widen_mult_hi_to_si_pattern_saved
5936 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved($et_index)] {
5937 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5938 using cached result" 2
5940 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 0
5941 if { [istarget powerpc*-*-*]
5942 || [istarget spu-*-*]
5943 || [istarget ia64-*-*]
5944 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5945 || ([is-effective-target arm_neon]
5946 && [check_effective_target_arm_little_endian])
5947 || ([istarget s390*-*-*]
5948 && [check_effective_target_s390_vx]) } {
5949 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 1
5952 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5953 returning $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)" 2
5954 return $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)
5957 # Return 1 if the target plus current options supports a vector
5958 # widening multiplication of *int* args into *long* result, 0 otherwise.
5960 # This won't change for different subtargets so cache the result.
5962 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
5963 global et_vect_widen_mult_si_to_di_pattern_saved
5966 if [info exists et_vect_widen_mult_si_to_di_pattern_saved($et_index)] {
5967 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
5968 using cached result" 2
5970 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 0
5971 if {[istarget ia64-*-*]
5972 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5973 || ([istarget s390*-*-*]
5974 && [check_effective_target_s390_vx]) } {
5975 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 1
5978 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
5979 returning $et_vect_widen_mult_si_to_di_pattern_saved($et_index)" 2
5980 return $et_vect_widen_mult_si_to_di_pattern_saved($et_index)
5983 # Return 1 if the target plus current options supports a vector
5984 # widening shift, 0 otherwise.
5986 # This won't change for different subtargets so cache the result.
5988 proc check_effective_target_vect_widen_shift { } {
5989 global et_vect_widen_shift_saved
5992 if [info exists et_vect_shift_saved($et_index)] {
5993 verbose "check_effective_target_vect_widen_shift: using cached result" 2
5995 set et_vect_widen_shift_saved($et_index) 0
5996 if { [is-effective-target arm_neon] } {
5997 set et_vect_widen_shift_saved($et_index) 1
6000 verbose "check_effective_target_vect_widen_shift:\
6001 returning $et_vect_widen_shift_saved($et_index)" 2
6002 return $et_vect_widen_shift_saved($et_index)
6005 # Return 1 if the target plus current options supports a vector
6006 # dot-product of signed chars, 0 otherwise.
6008 # This won't change for different subtargets so cache the result.
6010 proc check_effective_target_vect_sdot_qi { } {
6011 global et_vect_sdot_qi_saved
6014 if [info exists et_vect_sdot_qi_saved($et_index)] {
6015 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
6017 set et_vect_sdot_qi_saved($et_index) 0
6018 if { [istarget ia64-*-*]
6019 || [istarget aarch64*-*-*]
6020 || [istarget arm*-*-*]
6021 || ([istarget mips*-*-*]
6022 && [et-is-effective-target mips_msa]) } {
6023 set et_vect_udot_qi_saved 1
6026 verbose "check_effective_target_vect_sdot_qi:\
6027 returning $et_vect_sdot_qi_saved($et_index)" 2
6028 return $et_vect_sdot_qi_saved($et_index)
6031 # Return 1 if the target plus current options supports a vector
6032 # dot-product of unsigned chars, 0 otherwise.
6034 # This won't change for different subtargets so cache the result.
6036 proc check_effective_target_vect_udot_qi { } {
6037 global et_vect_udot_qi_saved
6040 if [info exists et_vect_udot_qi_saved($et_index)] {
6041 verbose "check_effective_target_vect_udot_qi: using cached result" 2
6043 set et_vect_udot_qi_saved($et_index) 0
6044 if { [istarget powerpc*-*-*]
6045 || [istarget aarch64*-*-*]
6046 || [istarget arm*-*-*]
6047 || [istarget ia64-*-*]
6048 || ([istarget mips*-*-*]
6049 && [et-is-effective-target mips_msa]) } {
6050 set et_vect_udot_qi_saved($et_index) 1
6053 verbose "check_effective_target_vect_udot_qi:\
6054 returning $et_vect_udot_qi_saved($et_index)" 2
6055 return $et_vect_udot_qi_saved($et_index)
6058 # Return 1 if the target plus current options supports a vector
6059 # dot-product of signed shorts, 0 otherwise.
6061 # This won't change for different subtargets so cache the result.
6063 proc check_effective_target_vect_sdot_hi { } {
6064 global et_vect_sdot_hi_saved
6067 if [info exists et_vect_sdot_hi_saved($et_index)] {
6068 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
6070 set et_vect_sdot_hi_saved($et_index) 0
6071 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6072 || [istarget ia64-*-*]
6073 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6074 || ([istarget mips*-*-*]
6075 && [et-is-effective-target mips_msa]) } {
6076 set et_vect_sdot_hi_saved($et_index) 1
6079 verbose "check_effective_target_vect_sdot_hi:\
6080 returning $et_vect_sdot_hi_saved($et_index)" 2
6081 return $et_vect_sdot_hi_saved($et_index)
6084 # Return 1 if the target plus current options supports a vector
6085 # dot-product of unsigned shorts, 0 otherwise.
6087 # This won't change for different subtargets so cache the result.
6089 proc check_effective_target_vect_udot_hi { } {
6090 global et_vect_udot_hi_saved
6093 if [info exists et_vect_udot_hi_saved($et_index)] {
6094 verbose "check_effective_target_vect_udot_hi: using cached result" 2
6096 set et_vect_udot_hi_saved($et_index) 0
6097 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6098 || ([istarget mips*-*-*]
6099 && [et-is-effective-target mips_msa]) } {
6100 set et_vect_udot_hi_saved($et_index) 1
6103 verbose "check_effective_target_vect_udot_hi:\
6104 returning $et_vect_udot_hi_saved($et_index)" 2
6105 return $et_vect_udot_hi_saved($et_index)
6108 # Return 1 if the target plus current options supports a vector
6109 # sad operation of unsigned chars, 0 otherwise.
6111 # This won't change for different subtargets so cache the result.
6113 proc check_effective_target_vect_usad_char { } {
6114 global et_vect_usad_char_saved
6117 if [info exists et_vect_usad_char_saved($et_index)] {
6118 verbose "check_effective_target_vect_usad_char: using cached result" 2
6120 set et_vect_usad_char_saved($et_index) 0
6121 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
6122 set et_vect_usad_char_saved($et_index) 1
6125 verbose "check_effective_target_vect_usad_char:\
6126 returning $et_vect_usad_char_saved($et_index)" 2
6127 return $et_vect_usad_char_saved($et_index)
6130 # Return 1 if the target plus current options supports a vector
6131 # demotion (packing) of shorts (to chars) and ints (to shorts)
6132 # using modulo arithmetic, 0 otherwise.
6134 # This won't change for different subtargets so cache the result.
6136 proc check_effective_target_vect_pack_trunc { } {
6137 global et_vect_pack_trunc_saved
6140 if [info exists et_vect_pack_trunc_saved($et_index)] {
6141 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
6143 set et_vect_pack_trunc_saved($et_index) 0
6144 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6145 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6146 || [istarget aarch64*-*-*]
6147 || [istarget spu-*-*]
6148 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
6149 && [check_effective_target_arm_little_endian])
6150 || ([istarget mips*-*-*]
6151 && [et-is-effective-target mips_msa])
6152 || ([istarget s390*-*-*]
6153 && [check_effective_target_s390_vx]) } {
6154 set et_vect_pack_trunc_saved($et_index) 1
6157 verbose "check_effective_target_vect_pack_trunc:\
6158 returning $et_vect_pack_trunc_saved($et_index)" 2
6159 return $et_vect_pack_trunc_saved($et_index)
6162 # Return 1 if the target plus current options supports a vector
6163 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
6165 # This won't change for different subtargets so cache the result.
6167 proc check_effective_target_vect_unpack { } {
6168 global et_vect_unpack_saved
6171 if [info exists et_vect_unpack_saved($et_index)] {
6172 verbose "check_effective_target_vect_unpack: using cached result" 2
6174 set et_vect_unpack_saved($et_index) 0
6175 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
6176 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6177 || [istarget spu-*-*]
6178 || [istarget ia64-*-*]
6179 || [istarget aarch64*-*-*]
6180 || ([istarget mips*-*-*]
6181 && [et-is-effective-target mips_msa])
6182 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
6183 && [check_effective_target_arm_little_endian])
6184 || ([istarget s390*-*-*]
6185 && [check_effective_target_s390_vx]) } {
6186 set et_vect_unpack_saved($et_index) 1
6189 verbose "check_effective_target_vect_unpack:\
6190 returning $et_vect_unpack_saved($et_index)" 2
6191 return $et_vect_unpack_saved($et_index)
6194 # Return 1 if the target plus current options does not guarantee
6195 # that its STACK_BOUNDARY is >= the reguired vector alignment.
6197 # This won't change for different subtargets so cache the result.
6199 proc check_effective_target_unaligned_stack { } {
6200 global et_unaligned_stack_saved
6202 if [info exists et_unaligned_stack_saved] {
6203 verbose "check_effective_target_unaligned_stack: using cached result" 2
6205 set et_unaligned_stack_saved 0
6207 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
6208 return $et_unaligned_stack_saved
6211 # Return 1 if the target plus current options does not support a vector
6212 # alignment mechanism, 0 otherwise.
6214 # This won't change for different subtargets so cache the result.
6216 proc check_effective_target_vect_no_align { } {
6217 global et_vect_no_align_saved
6220 if [info exists et_vect_no_align_saved($et_index)] {
6221 verbose "check_effective_target_vect_no_align: using cached result" 2
6223 set et_vect_no_align_saved($et_index) 0
6224 if { [istarget mipsisa64*-*-*]
6225 || [istarget mips-sde-elf]
6226 || [istarget sparc*-*-*]
6227 || [istarget ia64-*-*]
6228 || [check_effective_target_arm_vect_no_misalign]
6229 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
6230 || ([istarget mips*-*-*]
6231 && [et-is-effective-target mips_loongson]) } {
6232 set et_vect_no_align_saved($et_index) 1
6235 verbose "check_effective_target_vect_no_align:\
6236 returning $et_vect_no_align_saved($et_index)" 2
6237 return $et_vect_no_align_saved($et_index)
6240 # Return 1 if the target supports a vector misalign access, 0 otherwise.
6242 # This won't change for different subtargets so cache the result.
6244 proc check_effective_target_vect_hw_misalign { } {
6245 global et_vect_hw_misalign_saved
6248 if [info exists et_vect_hw_misalign_saved($et_index)] {
6249 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
6251 set et_vect_hw_misalign_saved($et_index) 0
6252 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6253 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
6254 || [istarget aarch64*-*-*]
6255 || ([istarget mips*-*-*] && [et-is-effective-target mips_msa])
6256 || ([istarget s390*-*-*]
6257 && [check_effective_target_s390_vx]) } {
6258 set et_vect_hw_misalign_saved($et_index) 1
6260 if { [istarget arm*-*-*] } {
6261 set et_vect_hw_misalign_saved($et_index) [expr ![check_effective_target_arm_vect_no_misalign]]
6264 verbose "check_effective_target_vect_hw_misalign:\
6265 returning $et_vect_hw_misalign_saved($et_index)" 2
6266 return $et_vect_hw_misalign_saved($et_index)
6270 # Return 1 if arrays are aligned to the vector alignment
6271 # boundary, 0 otherwise.
6273 proc check_effective_target_vect_aligned_arrays { } {
6274 set et_vect_aligned_arrays 0
6275 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6276 && !([is-effective-target ia32]
6277 || ([check_avx_available] && ![check_prefer_avx128])))
6278 || [istarget spu-*-*] } {
6279 set et_vect_aligned_arrays 1
6282 verbose "check_effective_target_vect_aligned_arrays:\
6283 returning $et_vect_aligned_arrays" 2
6284 return $et_vect_aligned_arrays
6287 # Return 1 if types of size 32 bit or less are naturally aligned
6288 # (aligned to their type-size), 0 otherwise.
6290 # This won't change for different subtargets so cache the result.
6292 proc check_effective_target_natural_alignment_32 { } {
6293 global et_natural_alignment_32
6295 if [info exists et_natural_alignment_32_saved] {
6296 verbose "check_effective_target_natural_alignment_32: using cached result" 2
6298 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
6299 set et_natural_alignment_32_saved 1
6300 if { ([istarget *-*-darwin*] && [is-effective-target lp64])
6301 || [istarget avr-*-*] } {
6302 set et_natural_alignment_32_saved 0
6305 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
6306 return $et_natural_alignment_32_saved
6309 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
6310 # type-size), 0 otherwise.
6312 # This won't change for different subtargets so cache the result.
6314 proc check_effective_target_natural_alignment_64 { } {
6315 global et_natural_alignment_64
6317 if [info exists et_natural_alignment_64_saved] {
6318 verbose "check_effective_target_natural_alignment_64: using cached result" 2
6320 set et_natural_alignment_64_saved 0
6321 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
6322 || [istarget spu-*-*] } {
6323 set et_natural_alignment_64_saved 1
6326 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
6327 return $et_natural_alignment_64_saved
6330 # Return 1 if all vector types are naturally aligned (aligned to their
6331 # type-size), 0 otherwise.
6333 proc check_effective_target_vect_natural_alignment { } {
6334 set et_vect_natural_alignment 1
6335 if { [check_effective_target_arm_eabi]
6336 || [istarget nvptx-*-*]
6337 || [istarget s390*-*-*] } {
6338 set et_vect_natural_alignment 0
6340 verbose "check_effective_target_vect_natural_alignment:\
6341 returning $et_vect_natural_alignment" 2
6342 return $et_vect_natural_alignment
6345 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
6347 proc check_effective_target_vector_alignment_reachable { } {
6348 set et_vector_alignment_reachable 0
6349 if { [check_effective_target_vect_aligned_arrays]
6350 || [check_effective_target_natural_alignment_32] } {
6351 set et_vector_alignment_reachable 1
6353 verbose "check_effective_target_vector_alignment_reachable:\
6354 returning $et_vector_alignment_reachable" 2
6355 return $et_vector_alignment_reachable
6358 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
6360 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
6361 set et_vector_alignment_reachable_for_64bit 0
6362 if { [check_effective_target_vect_aligned_arrays]
6363 || [check_effective_target_natural_alignment_64] } {
6364 set et_vector_alignment_reachable_for_64bit 1
6366 verbose "check_effective_target_vector_alignment_reachable_for_64bit:\
6367 returning $et_vector_alignment_reachable_for_64bit" 2
6368 return $et_vector_alignment_reachable_for_64bit
6371 # Return 1 if the target only requires element alignment for vector accesses
6373 proc check_effective_target_vect_element_align { } {
6374 global et_vect_element_align
6377 if [info exists et_vect_element_align($et_index)] {
6378 verbose "check_effective_target_vect_element_align:\
6379 using cached result" 2
6381 set et_vect_element_align($et_index) 0
6382 if { ([istarget arm*-*-*]
6383 && ![check_effective_target_arm_vect_no_misalign])
6384 || [check_effective_target_vect_hw_misalign] } {
6385 set et_vect_element_align($et_index) 1
6389 verbose "check_effective_target_vect_element_align:\
6390 returning $et_vect_element_align($et_index)" 2
6391 return $et_vect_element_align($et_index)
6394 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
6396 proc check_effective_target_vect_load_lanes { } {
6397 global et_vect_load_lanes
6399 if [info exists et_vect_load_lanes] {
6400 verbose "check_effective_target_vect_load_lanes: using cached result" 2
6402 set et_vect_load_lanes 0
6403 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
6404 || [istarget aarch64*-*-*] } {
6405 set et_vect_load_lanes 1
6409 verbose "check_effective_target_vect_load_lanes: returning $et_vect_load_lanes" 2
6410 return $et_vect_load_lanes
6413 # Return 1 if the target supports vector conditional operations, 0 otherwise.
6415 proc check_effective_target_vect_condition { } {
6416 global et_vect_cond_saved
6419 if [info exists et_vect_cond_saved($et_index)] {
6420 verbose "check_effective_target_vect_cond: using cached result" 2
6422 set et_vect_cond_saved($et_index) 0
6423 if { [istarget aarch64*-*-*]
6424 || [istarget powerpc*-*-*]
6425 || [istarget ia64-*-*]
6426 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6427 || [istarget spu-*-*]
6428 || ([istarget mips*-*-*]
6429 && [et-is-effective-target mips_msa])
6430 || ([istarget arm*-*-*]
6431 && [check_effective_target_arm_neon_ok])
6432 || ([istarget s390*-*-*]
6433 && [check_effective_target_s390_vx]) } {
6434 set et_vect_cond_saved($et_index) 1
6438 verbose "check_effective_target_vect_cond:\
6439 returning $et_vect_cond_saved($et_index)" 2
6440 return $et_vect_cond_saved($et_index)
6443 # Return 1 if the target supports vector conditional operations where
6444 # the comparison has different type from the lhs, 0 otherwise.
6446 proc check_effective_target_vect_cond_mixed { } {
6447 global et_vect_cond_mixed_saved
6450 if [info exists et_vect_cond_mixed_saved($et_index)] {
6451 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
6453 set et_vect_cond_mixed_saved($et_index) 0
6454 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6455 || [istarget aarch64*-*-*]
6456 || [istarget powerpc*-*-*]
6457 || ([istarget mips*-*-*]
6458 && [et-is-effective-target mips_msa])
6459 || ([istarget s390*-*-*]
6460 && [check_effective_target_s390_vx]) } {
6461 set et_vect_cond_mixed_saved($et_index) 1
6465 verbose "check_effective_target_vect_cond_mixed:\
6466 returning $et_vect_cond_mixed_saved($et_index)" 2
6467 return $et_vect_cond_mixed_saved($et_index)
6470 # Return 1 if the target supports vector char multiplication, 0 otherwise.
6472 proc check_effective_target_vect_char_mult { } {
6473 global et_vect_char_mult_saved
6476 if [info exists et_vect_char_mult_saved($et_index)] {
6477 verbose "check_effective_target_vect_char_mult: using cached result" 2
6479 set et_vect_char_mult_saved($et_index) 0
6480 if { [istarget aarch64*-*-*]
6481 || [istarget ia64-*-*]
6482 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6483 || [check_effective_target_arm32]
6484 || [check_effective_target_powerpc_altivec]
6485 || ([istarget mips*-*-*]
6486 && [et-is-effective-target mips_msa])
6487 || ([istarget s390*-*-*]
6488 && [check_effective_target_s390_vx]) } {
6489 set et_vect_char_mult_saved($et_index) 1
6493 verbose "check_effective_target_vect_char_mult:\
6494 returning $et_vect_char_mult_saved($et_index)" 2
6495 return $et_vect_char_mult_saved($et_index)
6498 # Return 1 if the target supports vector short multiplication, 0 otherwise.
6500 proc check_effective_target_vect_short_mult { } {
6501 global et_vect_short_mult_saved
6504 if [info exists et_vect_short_mult_saved($et_index)] {
6505 verbose "check_effective_target_vect_short_mult: using cached result" 2
6507 set et_vect_short_mult_saved($et_index) 0
6508 if { [istarget ia64-*-*]
6509 || [istarget spu-*-*]
6510 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6511 || [istarget powerpc*-*-*]
6512 || [istarget aarch64*-*-*]
6513 || [check_effective_target_arm32]
6514 || ([istarget mips*-*-*]
6515 && ([et-is-effective-target mips_msa]
6516 || [et-is-effective-target mips_loongson]))
6517 || ([istarget s390*-*-*]
6518 && [check_effective_target_s390_vx]) } {
6519 set et_vect_short_mult_saved($et_index) 1
6523 verbose "check_effective_target_vect_short_mult:\
6524 returning $et_vect_short_mult_saved($et_index)" 2
6525 return $et_vect_short_mult_saved($et_index)
6528 # Return 1 if the target supports vector int multiplication, 0 otherwise.
6530 proc check_effective_target_vect_int_mult { } {
6531 global et_vect_int_mult_saved
6534 if [info exists et_vect_int_mult_saved($et_index)] {
6535 verbose "check_effective_target_vect_int_mult: using cached result" 2
6537 set et_vect_int_mult_saved($et_index) 0
6538 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6539 || [istarget spu-*-*]
6540 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6541 || [istarget ia64-*-*]
6542 || [istarget aarch64*-*-*]
6543 || ([istarget mips*-*-*]
6544 && [et-is-effective-target mips_msa])
6545 || [check_effective_target_arm32]
6546 || ([istarget s390*-*-*]
6547 && [check_effective_target_s390_vx]) } {
6548 set et_vect_int_mult_saved($et_index) 1
6552 verbose "check_effective_target_vect_int_mult:\
6553 returning $et_vect_int_mult_saved($et_index)" 2
6554 return $et_vect_int_mult_saved($et_index)
6557 # Return 1 if the target supports 64 bit hardware vector
6558 # multiplication of long operands with a long result, 0 otherwise.
6560 # This can change for different subtargets so do not cache the result.
6562 proc check_effective_target_vect_long_mult { } {
6563 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6564 || (([istarget powerpc*-*-*]
6565 && ![istarget powerpc-*-linux*paired*])
6566 && [check_effective_target_ilp32])
6567 || [is-effective-target arm_neon]
6568 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
6569 || [istarget aarch64*-*-*]
6570 || ([istarget mips*-*-*]
6571 && [et-is-effective-target mips_msa]) } {
6577 verbose "check_effective_target_vect_long_mult: returning $answer" 2
6581 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
6583 proc check_effective_target_vect_extract_even_odd { } {
6584 global et_vect_extract_even_odd_saved
6587 if [info exists et_vect_extract_even_odd_saved($et_index)] {
6588 verbose "check_effective_target_vect_extract_even_odd:\
6589 using cached result" 2
6591 set et_vect_extract_even_odd_saved($et_index) 0
6592 if { [istarget aarch64*-*-*]
6593 || [istarget powerpc*-*-*]
6594 || [is-effective-target arm_neon]
6595 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6596 || [istarget ia64-*-*]
6597 || [istarget spu-*-*]
6598 || ([istarget mips*-*-*]
6599 && ([et-is-effective-target mips_msa]
6600 || [et-is-effective-target mpaired_single]))
6601 || ([istarget s390*-*-*]
6602 && [check_effective_target_s390_vx]) } {
6603 set et_vect_extract_even_odd_saved($et_index) 1
6607 verbose "check_effective_target_vect_extract_even_odd:\
6608 returning $et_vect_extract_even_odd_saved($et_index)" 2
6609 return $et_vect_extract_even_odd_saved($et_index)
6612 # Return 1 if the target supports vector interleaving, 0 otherwise.
6614 proc check_effective_target_vect_interleave { } {
6615 global et_vect_interleave_saved
6618 if [info exists et_vect_interleave_saved($et_index)] {
6619 verbose "check_effective_target_vect_interleave: using cached result" 2
6621 set et_vect_interleave_saved($et_index) 0
6622 if { [istarget aarch64*-*-*]
6623 || [istarget powerpc*-*-*]
6624 || [is-effective-target arm_neon]
6625 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6626 || [istarget ia64-*-*]
6627 || [istarget spu-*-*]
6628 || ([istarget mips*-*-*]
6629 && ([et-is-effective-target mpaired_single]
6630 || [et-is-effective-target mips_msa]))
6631 || ([istarget s390*-*-*]
6632 && [check_effective_target_s390_vx]) } {
6633 set et_vect_interleave_saved($et_index) 1
6637 verbose "check_effective_target_vect_interleave:\
6638 returning $et_vect_interleave_saved($et_index)" 2
6639 return $et_vect_interleave_saved($et_index)
6642 foreach N {2 3 4 8} {
6643 eval [string map [list N $N] {
6644 # Return 1 if the target supports 2-vector interleaving
6645 proc check_effective_target_vect_stridedN { } {
6646 global et_vect_stridedN_saved
6649 if [info exists et_vect_stridedN_saved($et_index)] {
6650 verbose "check_effective_target_vect_stridedN:\
6651 using cached result" 2
6653 set et_vect_stridedN_saved($et_index) 0
6655 && [check_effective_target_vect_interleave]
6656 && [check_effective_target_vect_extract_even_odd] } {
6657 set et_vect_stridedN_saved($et_index) 1
6659 if { ([istarget arm*-*-*]
6660 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
6661 set et_vect_stridedN_saved($et_index) 1
6665 verbose "check_effective_target_vect_stridedN:\
6666 returning $et_vect_stridedN_saved($et_index)" 2
6667 return $et_vect_stridedN_saved($et_index)
6672 # Return the list of vector sizes (in bits) that each target supports.
6673 # A vector length of "0" indicates variable-length vectors.
6675 proc available_vector_sizes { } {
6677 if { [istarget aarch64*-*-*] } {
6678 lappend result 128 64
6679 } elseif { [istarget arm*-*-*]
6680 && [check_effective_target_arm_neon_ok] } {
6681 lappend result 128 64
6682 } elseif { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6683 && ([check_avx_available] && ![check_prefer_avx128])) } {
6684 lappend result 256 128
6685 } elseif { [istarget sparc*-*-*] } {
6688 # The traditional default asumption.
6694 # Return 1 if the target supports multiple vector sizes
6696 proc check_effective_target_vect_multiple_sizes { } {
6697 return [expr { [llength [available_vector_sizes]] > 1 }]
6700 # Return 1 if the target supports vectors of 64 bits.
6702 proc check_effective_target_vect64 { } {
6703 return [expr { [lsearch -exact [available_vector_sizes] 64] >= 0 }]
6706 # Return 1 if the target supports vector copysignf calls.
6708 proc check_effective_target_vect_call_copysignf { } {
6709 global et_vect_call_copysignf_saved
6712 if [info exists et_vect_call_copysignf_saved($et_index)] {
6713 verbose "check_effective_target_vect_call_copysignf:\
6714 using cached result" 2
6716 set et_vect_call_copysignf_saved($et_index) 0
6717 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6718 || [istarget powerpc*-*-*]
6719 || [istarget aarch64*-*-*] } {
6720 set et_vect_call_copysignf_saved($et_index) 1
6724 verbose "check_effective_target_vect_call_copysignf:\
6725 returning $et_vect_call_copysignf_saved($et_index)" 2
6726 return $et_vect_call_copysignf_saved($et_index)
6729 # Return 1 if the target supports hardware square root instructions.
6731 proc check_effective_target_sqrt_insn { } {
6732 global et_sqrt_insn_saved
6734 if [info exists et_sqrt_insn_saved] {
6735 verbose "check_effective_target_hw_sqrt: using cached result" 2
6737 set et_sqrt_insn_saved 0
6738 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6739 || [istarget powerpc*-*-*]
6740 || [istarget aarch64*-*-*]
6741 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok])
6742 || ([istarget s390*-*-*]
6743 && [check_effective_target_s390_vx]) } {
6744 set et_sqrt_insn_saved 1
6748 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
6749 return $et_sqrt_insn_saved
6752 # Return 1 if the target supports vector sqrtf calls.
6754 proc check_effective_target_vect_call_sqrtf { } {
6755 global et_vect_call_sqrtf_saved
6758 if [info exists et_vect_call_sqrtf_saved($et_index)] {
6759 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
6761 set et_vect_call_sqrtf_saved($et_index) 0
6762 if { [istarget aarch64*-*-*]
6763 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6764 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
6765 || ([istarget s390*-*-*]
6766 && [check_effective_target_s390_vx]) } {
6767 set et_vect_call_sqrtf_saved($et_index) 1
6771 verbose "check_effective_target_vect_call_sqrtf:\
6772 returning $et_vect_call_sqrtf_saved($et_index)" 2
6773 return $et_vect_call_sqrtf_saved($et_index)
6776 # Return 1 if the target supports vector lrint calls.
6778 proc check_effective_target_vect_call_lrint { } {
6779 set et_vect_call_lrint 0
6780 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6781 && [check_effective_target_ilp32]) } {
6782 set et_vect_call_lrint 1
6785 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
6786 return $et_vect_call_lrint
6789 # Return 1 if the target supports vector btrunc calls.
6791 proc check_effective_target_vect_call_btrunc { } {
6792 global et_vect_call_btrunc_saved
6795 if [info exists et_vect_call_btrunc_saved($et_index)] {
6796 verbose "check_effective_target_vect_call_btrunc:\
6797 using cached result" 2
6799 set et_vect_call_btrunc_saved($et_index) 0
6800 if { [istarget aarch64*-*-*] } {
6801 set et_vect_call_btrunc_saved($et_index) 1
6805 verbose "check_effective_target_vect_call_btrunc:\
6806 returning $et_vect_call_btrunc_saved($et_index)" 2
6807 return $et_vect_call_btrunc_saved($et_index)
6810 # Return 1 if the target supports vector btruncf calls.
6812 proc check_effective_target_vect_call_btruncf { } {
6813 global et_vect_call_btruncf_saved
6816 if [info exists et_vect_call_btruncf_saved($et_index)] {
6817 verbose "check_effective_target_vect_call_btruncf:\
6818 using cached result" 2
6820 set et_vect_call_btruncf_saved($et_index) 0
6821 if { [istarget aarch64*-*-*] } {
6822 set et_vect_call_btruncf_saved($et_index) 1
6826 verbose "check_effective_target_vect_call_btruncf:\
6827 returning $et_vect_call_btruncf_saved($et_index)" 2
6828 return $et_vect_call_btruncf_saved($et_index)
6831 # Return 1 if the target supports vector ceil calls.
6833 proc check_effective_target_vect_call_ceil { } {
6834 global et_vect_call_ceil_saved
6837 if [info exists et_vect_call_ceil_saved($et_index)] {
6838 verbose "check_effective_target_vect_call_ceil: using cached result" 2
6840 set et_vect_call_ceil_saved($et_index) 0
6841 if { [istarget aarch64*-*-*] } {
6842 set et_vect_call_ceil_saved($et_index) 1
6846 verbose "check_effective_target_vect_call_ceil:\
6847 returning $et_vect_call_ceil_saved($et_index)" 2
6848 return $et_vect_call_ceil_saved($et_index)
6851 # Return 1 if the target supports vector ceilf calls.
6853 proc check_effective_target_vect_call_ceilf { } {
6854 global et_vect_call_ceilf_saved
6857 if [info exists et_vect_call_ceilf_saved($et_index)] {
6858 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
6860 set et_vect_call_ceilf_saved($et_index) 0
6861 if { [istarget aarch64*-*-*] } {
6862 set et_vect_call_ceilf_saved($et_index) 1
6866 verbose "check_effective_target_vect_call_ceilf:\
6867 returning $et_vect_call_ceilf_saved($et_index)" 2
6868 return $et_vect_call_ceilf_saved($et_index)
6871 # Return 1 if the target supports vector floor calls.
6873 proc check_effective_target_vect_call_floor { } {
6874 global et_vect_call_floor_saved
6877 if [info exists et_vect_call_floor_saved($et_index)] {
6878 verbose "check_effective_target_vect_call_floor: using cached result" 2
6880 set et_vect_call_floor_saved($et_index) 0
6881 if { [istarget aarch64*-*-*] } {
6882 set et_vect_call_floor_saved($et_index) 1
6886 verbose "check_effective_target_vect_call_floor:\
6887 returning $et_vect_call_floor_saved($et_index)" 2
6888 return $et_vect_call_floor_saved($et_index)
6891 # Return 1 if the target supports vector floorf calls.
6893 proc check_effective_target_vect_call_floorf { } {
6894 global et_vect_call_floorf_saved
6897 if [info exists et_vect_call_floorf_saved($et_index)] {
6898 verbose "check_effective_target_vect_call_floorf: using cached result" 2
6900 set et_vect_call_floorf_saved($et_index) 0
6901 if { [istarget aarch64*-*-*] } {
6902 set et_vect_call_floorf_saved($et_index) 1
6906 verbose "check_effective_target_vect_call_floorf:\
6907 returning $et_vect_call_floorf_saved($et_index)" 2
6908 return $et_vect_call_floorf_saved($et_index)
6911 # Return 1 if the target supports vector lceil calls.
6913 proc check_effective_target_vect_call_lceil { } {
6914 global et_vect_call_lceil_saved
6917 if [info exists et_vect_call_lceil_saved($et_index)] {
6918 verbose "check_effective_target_vect_call_lceil: using cached result" 2
6920 set et_vect_call_lceil_saved($et_index) 0
6921 if { [istarget aarch64*-*-*] } {
6922 set et_vect_call_lceil_saved($et_index) 1
6926 verbose "check_effective_target_vect_call_lceil:\
6927 returning $et_vect_call_lceil_saved($et_index)" 2
6928 return $et_vect_call_lceil_saved($et_index)
6931 # Return 1 if the target supports vector lfloor calls.
6933 proc check_effective_target_vect_call_lfloor { } {
6934 global et_vect_call_lfloor_saved
6937 if [info exists et_vect_call_lfloor_saved($et_index)] {
6938 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
6940 set et_vect_call_lfloor_saved($et_index) 0
6941 if { [istarget aarch64*-*-*] } {
6942 set et_vect_call_lfloor_saved($et_index) 1
6946 verbose "check_effective_target_vect_call_lfloor:\
6947 returning $et_vect_call_lfloor_saved($et_index)" 2
6948 return $et_vect_call_lfloor_saved($et_index)
6951 # Return 1 if the target supports vector nearbyint calls.
6953 proc check_effective_target_vect_call_nearbyint { } {
6954 global et_vect_call_nearbyint_saved
6957 if [info exists et_vect_call_nearbyint_saved($et_index)] {
6958 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
6960 set et_vect_call_nearbyint_saved($et_index) 0
6961 if { [istarget aarch64*-*-*] } {
6962 set et_vect_call_nearbyint_saved($et_index) 1
6966 verbose "check_effective_target_vect_call_nearbyint:\
6967 returning $et_vect_call_nearbyint_saved($et_index)" 2
6968 return $et_vect_call_nearbyint_saved($et_index)
6971 # Return 1 if the target supports vector nearbyintf calls.
6973 proc check_effective_target_vect_call_nearbyintf { } {
6974 global et_vect_call_nearbyintf_saved
6977 if [info exists et_vect_call_nearbyintf_saved($et_index)] {
6978 verbose "check_effective_target_vect_call_nearbyintf:\
6979 using cached result" 2
6981 set et_vect_call_nearbyintf_saved($et_index) 0
6982 if { [istarget aarch64*-*-*] } {
6983 set et_vect_call_nearbyintf_saved($et_index) 1
6987 verbose "check_effective_target_vect_call_nearbyintf:\
6988 returning $et_vect_call_nearbyintf_saved($et_index)" 2
6989 return $et_vect_call_nearbyintf_saved($et_index)
6992 # Return 1 if the target supports vector round calls.
6994 proc check_effective_target_vect_call_round { } {
6995 global et_vect_call_round_saved
6998 if [info exists et_vect_call_round_saved($et_index)] {
6999 verbose "check_effective_target_vect_call_round: using cached result" 2
7001 set et_vect_call_round_saved($et_index) 0
7002 if { [istarget aarch64*-*-*] } {
7003 set et_vect_call_round_saved($et_index) 1
7007 verbose "check_effective_target_vect_call_round:\
7008 returning $et_vect_call_round_saved($et_index)" 2
7009 return $et_vect_call_round_saved($et_index)
7012 # Return 1 if the target supports vector roundf calls.
7014 proc check_effective_target_vect_call_roundf { } {
7015 global et_vect_call_roundf_saved
7018 if [info exists et_vect_call_roundf_saved($et_index)] {
7019 verbose "check_effective_target_vect_call_roundf: using cached result" 2
7021 set et_vect_call_roundf_saved($et_index) 0
7022 if { [istarget aarch64*-*-*] } {
7023 set et_vect_call_roundf_saved($et_index) 1
7027 verbose "check_effective_target_vect_call_roundf:\
7028 returning $et_vect_call_roundf_saved($et_index)" 2
7029 return $et_vect_call_roundf_saved($et_index)
7032 # Return 1 if the target supports section-anchors
7034 proc check_effective_target_section_anchors { } {
7035 global et_section_anchors_saved
7037 if [info exists et_section_anchors_saved] {
7038 verbose "check_effective_target_section_anchors: using cached result" 2
7040 set et_section_anchors_saved 0
7041 if { [istarget powerpc*-*-*]
7042 || [istarget arm*-*-*]
7043 || [istarget aarch64*-*-*] } {
7044 set et_section_anchors_saved 1
7048 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
7049 return $et_section_anchors_saved
7052 # Return 1 if the target supports atomic operations on "int_128" values.
7054 proc check_effective_target_sync_int_128 { } {
7055 if { [istarget spu-*-*] } {
7062 # Return 1 if the target supports atomic operations on "int_128" values
7063 # and can execute them.
7064 # This requires support for both compare-and-swap and true atomic loads.
7066 proc check_effective_target_sync_int_128_runtime { } {
7067 if { [istarget spu-*-*] } {
7074 # Return 1 if the target supports atomic operations on "long long".
7076 # Note: 32bit x86 targets require -march=pentium in dg-options.
7077 # Note: 32bit s390 targets require -mzarch in dg-options.
7079 proc check_effective_target_sync_long_long { } {
7080 if { [istarget i?86-*-*] || [istarget x86_64-*-*])
7081 || [istarget aarch64*-*-*]
7082 || [istarget arm*-*-*]
7083 || [istarget alpha*-*-*]
7084 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
7085 || [istarget s390*-*-*]
7086 || [istarget spu-*-*] } {
7093 # Return 1 if the target supports atomic operations on "long long"
7094 # and can execute them.
7096 # Note: 32bit x86 targets require -march=pentium in dg-options.
7098 proc check_effective_target_sync_long_long_runtime { } {
7099 if { (([istarget x86_64-*-*] || [istarget i?86-*-*])
7100 && [check_cached_effective_target sync_long_long_available {
7101 check_runtime_nocache sync_long_long_available {
7105 unsigned int eax, ebx, ecx, edx;
7106 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
7107 return !(edx & bit_CMPXCHG8B);
7112 || [istarget aarch64*-*-*]
7113 || ([istarget arm*-*-linux-*]
7114 && [check_runtime sync_longlong_runtime {
7120 if (sizeof (long long) != 8)
7123 /* Just check for native;
7124 checking for kernel fallback is tricky. */
7125 asm volatile ("ldrexd r0,r1, [%0]"
7126 : : "r" (&l1) : "r0", "r1");
7130 || [istarget alpha*-*-*]
7131 || ([istarget sparc*-*-*]
7132 && [check_effective_target_lp64]
7133 && [check_effective_target_ultrasparc_hw])
7134 || [istarget spu-*-*]
7135 || ([istarget powerpc*-*-*] && [check_effective_target_lp64]) } {
7142 # Return 1 if the target supports byte swap instructions.
7144 proc check_effective_target_bswap { } {
7145 global et_bswap_saved
7147 if [info exists et_bswap_saved] {
7148 verbose "check_effective_target_bswap: using cached result" 2
7150 set et_bswap_saved 0
7151 if { [istarget aarch64*-*-*]
7152 || [istarget alpha*-*-*]
7153 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7154 || [istarget m68k-*-*]
7155 || [istarget powerpc*-*-*]
7156 || [istarget rs6000-*-*]
7157 || [istarget s390*-*-*]
7158 || ([istarget arm*-*-*]
7159 && [check_no_compiler_messages_nocache arm_v6_or_later object {
7161 #error not armv6 or later
7165 set et_bswap_saved 1
7169 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
7170 return $et_bswap_saved
7173 # Return 1 if the target supports 16-bit byte swap instructions.
7175 proc check_effective_target_bswap16 { } {
7176 global et_bswap16_saved
7178 if [info exists et_bswap16_saved] {
7179 verbose "check_effective_target_bswap16: using cached result" 2
7181 set et_bswap16_saved 0
7182 if { [is-effective-target bswap]
7183 && ![istarget alpha*-*-*]
7184 && !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
7185 set et_bswap16_saved 1
7189 verbose "check_effective_target_bswap16: returning $et_bswap16_saved" 2
7190 return $et_bswap16_saved
7193 # Return 1 if the target supports 32-bit byte swap instructions.
7195 proc check_effective_target_bswap32 { } {
7196 global et_bswap32_saved
7198 if [info exists et_bswap32_saved] {
7199 verbose "check_effective_target_bswap32: using cached result" 2
7201 set et_bswap32_saved 0
7202 if { [is-effective-target bswap] } {
7203 set et_bswap32_saved 1
7207 verbose "check_effective_target_bswap32: returning $et_bswap32_saved" 2
7208 return $et_bswap32_saved
7211 # Return 1 if the target supports 64-bit byte swap instructions.
7213 # Note: 32bit s390 targets require -mzarch in dg-options.
7215 proc check_effective_target_bswap64 { } {
7216 global et_bswap64_saved
7218 # expand_unop can expand 64-bit byte swap on 32-bit targets
7219 if { [is-effective-target bswap] && [is-effective-target int32plus] } {
7225 # Return 1 if the target supports atomic operations on "int" and "long".
7227 proc check_effective_target_sync_int_long { } {
7228 global et_sync_int_long_saved
7230 if [info exists et_sync_int_long_saved] {
7231 verbose "check_effective_target_sync_int_long: using cached result" 2
7233 set et_sync_int_long_saved 0
7234 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
7235 # load-reserved/store-conditional instructions.
7236 if { [istarget ia64-*-*]
7237 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7238 || [istarget aarch64*-*-*]
7239 || [istarget alpha*-*-*]
7240 || [istarget arm*-*-linux-*]
7241 || ([istarget arm*-*-*]
7242 && [check_effective_target_arm_acq_rel])
7243 || [istarget bfin*-*linux*]
7244 || [istarget hppa*-*linux*]
7245 || [istarget s390*-*-*]
7246 || [istarget powerpc*-*-*]
7247 || [istarget crisv32-*-*] || [istarget cris-*-*]
7248 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
7249 || [istarget spu-*-*]
7250 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
7251 || [check_effective_target_mips_llsc] } {
7252 set et_sync_int_long_saved 1
7256 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
7257 return $et_sync_int_long_saved
7260 # Return 1 if the target supports atomic operations on "char" and "short".
7262 proc check_effective_target_sync_char_short { } {
7263 global et_sync_char_short_saved
7265 if [info exists et_sync_char_short_saved] {
7266 verbose "check_effective_target_sync_char_short: using cached result" 2
7268 set et_sync_char_short_saved 0
7269 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
7270 # load-reserved/store-conditional instructions.
7271 if { [istarget aarch64*-*-*]
7272 || [istarget ia64-*-*]
7273 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7274 || [istarget alpha*-*-*]
7275 || [istarget arm*-*-linux-*]
7276 || ([istarget arm*-*-*]
7277 && [check_effective_target_arm_acq_rel])
7278 || [istarget hppa*-*linux*]
7279 || [istarget s390*-*-*]
7280 || [istarget powerpc*-*-*]
7281 || [istarget crisv32-*-*] || [istarget cris-*-*]
7282 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
7283 || [istarget spu-*-*]
7284 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
7285 || [check_effective_target_mips_llsc] } {
7286 set et_sync_char_short_saved 1
7290 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
7291 return $et_sync_char_short_saved
7294 # Return 1 if the target uses a ColdFire FPU.
7296 proc check_effective_target_coldfire_fpu { } {
7297 return [check_no_compiler_messages coldfire_fpu assembly {
7304 # Return true if this is a uClibc target.
7306 proc check_effective_target_uclibc {} {
7307 return [check_no_compiler_messages uclibc object {
7308 #include <features.h>
7309 #if !defined (__UCLIBC__)
7315 # Return true if this is a uclibc target and if the uclibc feature
7316 # described by __$feature__ is not present.
7318 proc check_missing_uclibc_feature {feature} {
7319 return [check_no_compiler_messages $feature object "
7320 #include <features.h>
7321 #if !defined (__UCLIBC) || defined (__${feature}__)
7327 # Return true if this is a Newlib target.
7329 proc check_effective_target_newlib {} {
7330 return [check_no_compiler_messages newlib object {
7335 # Some newlib versions don't provide a frexpl and instead depend
7336 # on frexp to implement long double conversions in their printf-like
7337 # functions. This leads to broken results. Detect such versions here.
7339 proc check_effective_target_newlib_broken_long_double_io {} {
7340 if { [is-effective-target newlib] && ![is-effective-target frexpl] } {
7346 # Return true if this is NOT a Bionic target.
7348 proc check_effective_target_non_bionic {} {
7349 return [check_no_compiler_messages non_bionic object {
7351 #if defined (__BIONIC__)
7357 # Return true if this target has error.h header.
7359 proc check_effective_target_error_h {} {
7360 return [check_no_compiler_messages error_h object {
7365 # Return true if this target has tgmath.h header.
7367 proc check_effective_target_tgmath_h {} {
7368 return [check_no_compiler_messages tgmath_h object {
7373 # Return true if target's libc supports complex functions.
7375 proc check_effective_target_libc_has_complex_functions {} {
7376 return [check_no_compiler_messages libc_has_complex_functions object {
7377 #include <complex.h>
7382 # (a) an error of a few ULP is expected in string to floating-point
7383 # conversion functions; and
7384 # (b) overflow is not always detected correctly by those functions.
7386 proc check_effective_target_lax_strtofp {} {
7387 # By default, assume that all uClibc targets suffer from this.
7388 return [check_effective_target_uclibc]
7391 # Return 1 if this is a target for which wcsftime is a dummy
7392 # function that always returns 0.
7394 proc check_effective_target_dummy_wcsftime {} {
7395 # By default, assume that all uClibc targets suffer from this.
7396 return [check_effective_target_uclibc]
7399 # Return 1 if constructors with initialization priority arguments are
7400 # supposed on this target.
7402 proc check_effective_target_init_priority {} {
7403 return [check_no_compiler_messages init_priority assembly "
7404 void f() __attribute__((constructor (1000)));
7409 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
7410 # This can be used with any check_* proc that takes no argument and
7411 # returns only 1 or 0. It could be used with check_* procs that take
7412 # arguments with keywords that pass particular arguments.
7414 proc is-effective-target { arg } {
7417 if { ![info exists et_index] } {
7418 # Initialize the effective target index that is used in some
7419 # check_effective_target_* procs.
7422 if { [info procs check_effective_target_${arg}] != [list] } {
7423 set selected [check_effective_target_${arg}]
7426 "vmx_hw" { set selected [check_vmx_hw_available] }
7427 "vsx_hw" { set selected [check_vsx_hw_available] }
7428 "p8vector_hw" { set selected [check_p8vector_hw_available] }
7429 "p9vector_hw" { set selected [check_p9vector_hw_available] }
7430 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
7431 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
7432 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
7433 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
7434 "ppc_cpu_supports_hw" { set selected [check_ppc_cpu_supports_hw_available] }
7435 "dfp_hw" { set selected [check_dfp_hw_available] }
7436 "htm_hw" { set selected [check_htm_hw_available] }
7437 "named_sections" { set selected [check_named_sections_available] }
7438 "gc_sections" { set selected [check_gc_sections_available] }
7439 "cxa_atexit" { set selected [check_cxa_atexit_available] }
7440 default { error "unknown effective target keyword `$arg'" }
7443 verbose "is-effective-target: $arg $selected" 2
7447 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
7449 proc is-effective-target-keyword { arg } {
7450 if { [info procs check_effective_target_${arg}] != [list] } {
7453 # These have different names for their check_* procs.
7455 "vmx_hw" { return 1 }
7456 "vsx_hw" { return 1 }
7457 "p8vector_hw" { return 1 }
7458 "p9vector_hw" { return 1 }
7459 "p9modulo_hw" { return 1 }
7460 "ppc_float128_sw" { return 1 }
7461 "ppc_float128_hw" { return 1 }
7462 "ppc_recip_hw" { return 1 }
7463 "dfp_hw" { return 1 }
7464 "htm_hw" { return 1 }
7465 "named_sections" { return 1 }
7466 "gc_sections" { return 1 }
7467 "cxa_atexit" { return 1 }
7468 default { return 0 }
7473 # Execute tests for all targets in EFFECTIVE_TARGETS list. Set et_index to
7474 # indicate what target is currently being processed. This is for
7475 # the vectorizer tests, e.g. vect_int, to keep track what target supports
7478 proc et-dg-runtest { runtest testcases flags default-extra-flags } {
7479 global dg-do-what-default
7480 global EFFECTIVE_TARGETS
7483 if { [llength $EFFECTIVE_TARGETS] > 0 } {
7484 foreach target $EFFECTIVE_TARGETS {
7485 set target_flags $flags
7486 set dg-do-what-default compile
7487 set et_index [lsearch -exact $EFFECTIVE_TARGETS $target]
7488 if { [info procs add_options_for_${target}] != [list] } {
7489 set target_flags [add_options_for_${target} "$flags"]
7491 if { [info procs check_effective_target_${target}_runtime]
7492 != [list] && [check_effective_target_${target}_runtime] } {
7493 set dg-do-what-default run
7495 $runtest $testcases $target_flags ${default-extra-flags}
7499 $runtest $testcases $flags ${default-extra-flags}
7503 # Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
7504 # et_index, 0 otherwise.
7506 proc et-is-effective-target { target } {
7507 global EFFECTIVE_TARGETS
7510 if { [llength $EFFECTIVE_TARGETS] > $et_index
7511 && [lindex $EFFECTIVE_TARGETS $et_index] == $target } {
7517 # Return 1 if target default to short enums
7519 proc check_effective_target_short_enums { } {
7520 return [check_no_compiler_messages short_enums assembly {
7522 int s[sizeof (enum foo) == 1 ? 1 : -1];
7526 # Return 1 if target supports merging string constants at link time.
7528 proc check_effective_target_string_merging { } {
7529 return [check_no_messages_and_pattern string_merging \
7530 "rodata\\.str" assembly {
7531 const char *var = "String";
7535 # Return 1 if target has the basic signed and unsigned types in
7536 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
7537 # working <stdint.h> for all targets.
7539 proc check_effective_target_stdint_types { } {
7540 return [check_no_compiler_messages stdint_types assembly {
7542 int8_t a; int16_t b; int32_t c; int64_t d;
7543 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
7547 # Return 1 if target has the basic signed and unsigned types in
7548 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
7549 # these types agree with those in the header, as some systems have
7550 # only <inttypes.h>.
7552 proc check_effective_target_inttypes_types { } {
7553 return [check_no_compiler_messages inttypes_types assembly {
7554 #include <inttypes.h>
7555 int8_t a; int16_t b; int32_t c; int64_t d;
7556 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
7560 # Return 1 if programs are intended to be run on a simulator
7561 # (i.e. slowly) rather than hardware (i.e. fast).
7563 proc check_effective_target_simulator { } {
7565 # All "src/sim" simulators set this one.
7566 if [board_info target exists is_simulator] {
7567 return [board_info target is_simulator]
7570 # The "sid" simulators don't set that one, but at least they set
7572 if [board_info target exists slow_simulator] {
7573 return [board_info target slow_simulator]
7579 # Return 1 if programs are intended to be run on hardware rather than
7582 proc check_effective_target_hw { } {
7584 # All "src/sim" simulators set this one.
7585 if [board_info target exists is_simulator] {
7586 if [board_info target is_simulator] {
7593 # The "sid" simulators don't set that one, but at least they set
7595 if [board_info target exists slow_simulator] {
7596 if [board_info target slow_simulator] {
7606 # Return 1 if the target is a VxWorks kernel.
7608 proc check_effective_target_vxworks_kernel { } {
7609 return [check_no_compiler_messages vxworks_kernel assembly {
7610 #if !defined __vxworks || defined __RTP__
7616 # Return 1 if the target is a VxWorks RTP.
7618 proc check_effective_target_vxworks_rtp { } {
7619 return [check_no_compiler_messages vxworks_rtp assembly {
7620 #if !defined __vxworks || !defined __RTP__
7626 # Return 1 if the target is expected to provide wide character support.
7628 proc check_effective_target_wchar { } {
7629 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
7632 return [check_no_compiler_messages wchar assembly {
7637 # Return 1 if the target has <pthread.h>.
7639 proc check_effective_target_pthread_h { } {
7640 return [check_no_compiler_messages pthread_h assembly {
7641 #include <pthread.h>
7645 # Return 1 if the target can truncate a file from a file-descriptor,
7646 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
7647 # chsize. We test for a trivially functional truncation; no stubs.
7648 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
7649 # different function to be used.
7651 proc check_effective_target_fd_truncate { } {
7653 #define _FILE_OFFSET_BITS 64
7660 FILE *f = fopen ("tst.tmp", "wb");
7662 const char t[] = "test writing more than ten characters";
7666 write (fd, t, sizeof (t) - 1);
7668 if (ftruncate (fd, 10) != 0)
7677 f = fopen ("tst.tmp", "rb");
7678 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
7686 if { [check_runtime ftruncate $prog] } {
7690 regsub "ftruncate" $prog "chsize" prog
7691 return [check_runtime chsize $prog]
7694 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
7696 proc add_options_for_c99_runtime { flags } {
7697 if { [istarget *-*-solaris2*] } {
7698 return "$flags -std=c99"
7700 if { [istarget powerpc-*-darwin*] } {
7701 return "$flags -mmacosx-version-min=10.3"
7706 # Add to FLAGS all the target-specific flags needed to enable
7707 # full IEEE compliance mode.
7709 proc add_options_for_ieee { flags } {
7710 if { [istarget alpha*-*-*]
7711 || [istarget sh*-*-*] } {
7712 return "$flags -mieee"
7714 if { [istarget rx-*-*] } {
7715 return "$flags -mnofpu"
7720 if {![info exists flags_to_postpone]} {
7721 set flags_to_postpone ""
7724 # Add to FLAGS the flags needed to enable functions to bind locally
7725 # when using pic/PIC passes in the testsuite.
7726 proc add_options_for_bind_pic_locally { flags } {
7727 global flags_to_postpone
7729 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
7730 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
7731 # order to make sure that the multilib_flags doesn't override this.
7733 if {[check_no_compiler_messages using_pic2 assembly {
7738 set flags_to_postpone "-fPIE"
7741 if {[check_no_compiler_messages using_pic1 assembly {
7746 set flags_to_postpone "-fpie"
7752 # Add to FLAGS the flags needed to enable 64-bit vectors.
7754 proc add_options_for_double_vectors { flags } {
7755 if [is-effective-target arm_neon_ok] {
7756 return "$flags -mvectorize-with-neon-double"
7762 # Add to FLAGS the flags needed to define the STACK_SIZE macro.
7764 proc add_options_for_stack_size { flags } {
7765 if [is-effective-target stack_size] {
7766 set stack_size [dg-effective-target-value stack_size]
7767 return "$flags -DSTACK_SIZE=$stack_size"
7773 # Return 1 if the target provides a full C99 runtime.
7775 proc check_effective_target_c99_runtime { } {
7776 return [check_cached_effective_target c99_runtime {
7779 set file [open "$srcdir/gcc.dg/builtins-config.h"]
7780 set contents [read $file]
7783 #ifndef HAVE_C99_RUNTIME
7784 #error !HAVE_C99_RUNTIME
7787 check_no_compiler_messages_nocache c99_runtime assembly \
7788 $contents [add_options_for_c99_runtime ""]
7792 # Return 1 if target wchar_t is at least 4 bytes.
7794 proc check_effective_target_4byte_wchar_t { } {
7795 return [check_no_compiler_messages 4byte_wchar_t object {
7796 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
7800 # Return 1 if the target supports automatic stack alignment.
7802 proc check_effective_target_automatic_stack_alignment { } {
7803 # Ordinarily x86 supports automatic stack alignment ...
7804 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
7805 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
7806 # ... except Win64 SEH doesn't. Succeed for Win32 though.
7807 return [check_effective_target_ilp32];
7814 # Return true if we are compiling for AVX target.
7816 proc check_avx_available { } {
7817 if { [check_no_compiler_messages avx_available assembly {
7827 # Return true if 32- and 16-bytes vectors are available.
7829 proc check_effective_target_vect_sizes_32B_16B { } {
7830 return [expr { [available_vector_sizes] == [list 256 128] }]
7833 # Return true if 16- and 8-bytes vectors are available.
7835 proc check_effective_target_vect_sizes_16B_8B { } {
7836 if { [check_avx_available]
7837 || [is-effective-target arm_neon]
7838 || [istarget aarch64*-*-*] } {
7846 # Return true if 128-bits vectors are preferred even if 256-bits vectors
7849 proc check_prefer_avx128 { } {
7850 if ![check_avx_available] {
7853 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
7854 float a[1024],b[1024],c[1024];
7855 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
7856 } "-O2 -ftree-vectorize"]
7860 # Return 1 if avx512f instructions can be compiled.
7862 proc check_effective_target_avx512f { } {
7863 return [check_no_compiler_messages avx512f object {
7864 typedef double __m512d __attribute__ ((__vector_size__ (64)));
7866 __m512d _mm512_add (__m512d a)
7868 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
7873 # Return 1 if avx instructions can be compiled.
7875 proc check_effective_target_avx { } {
7876 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
7879 return [check_no_compiler_messages avx object {
7880 void _mm256_zeroall (void)
7882 __builtin_ia32_vzeroall ();
7887 # Return 1 if avx2 instructions can be compiled.
7888 proc check_effective_target_avx2 { } {
7889 return [check_no_compiler_messages avx2 object {
7890 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
7892 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
7894 return __builtin_ia32_andnotsi256 (__X, __Y);
7899 # Return 1 if sse instructions can be compiled.
7900 proc check_effective_target_sse { } {
7901 return [check_no_compiler_messages sse object {
7904 __builtin_ia32_stmxcsr ();
7910 # Return 1 if sse2 instructions can be compiled.
7911 proc check_effective_target_sse2 { } {
7912 return [check_no_compiler_messages sse2 object {
7913 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7915 __m128i _mm_srli_si128 (__m128i __A, int __N)
7917 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
7922 # Return 1 if sse4.1 instructions can be compiled.
7923 proc check_effective_target_sse4 { } {
7924 return [check_no_compiler_messages sse4.1 object {
7925 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7926 typedef int __v4si __attribute__ ((__vector_size__ (16)));
7928 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
7930 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
7936 # Return 1 if F16C instructions can be compiled.
7938 proc check_effective_target_f16c { } {
7939 return [check_no_compiler_messages f16c object {
7940 #include "immintrin.h"
7942 foo (unsigned short val)
7944 return _cvtsh_ss (val);
7949 # Return 1 if C wchar_t type is compatible with char16_t.
7951 proc check_effective_target_wchar_t_char16_t_compatible { } {
7952 return [check_no_compiler_messages wchar_t_char16_t object {
7954 __CHAR16_TYPE__ *p16 = &wc;
7955 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7959 # Return 1 if C wchar_t type is compatible with char32_t.
7961 proc check_effective_target_wchar_t_char32_t_compatible { } {
7962 return [check_no_compiler_messages wchar_t_char32_t object {
7964 __CHAR32_TYPE__ *p32 = &wc;
7965 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7969 # Return 1 if pow10 function exists.
7971 proc check_effective_target_pow10 { } {
7972 return [check_runtime pow10 {
7982 # Return 1 if frexpl function exists.
7984 proc check_effective_target_frexpl { } {
7985 return [check_runtime frexpl {
7990 x = frexpl (5.0, &y);
7997 # Return 1 if issignaling function exists.
7998 proc check_effective_target_issignaling {} {
7999 return [check_runtime issignaling {
8004 return issignaling (0.0);
8009 # Return 1 if current options generate DFP instructions, 0 otherwise.
8010 proc check_effective_target_hard_dfp {} {
8011 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
8012 typedef float d64 __attribute__((mode(DD)));
8014 void foo (void) { z = x + y; }
8018 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
8019 # for strchr etc. functions.
8021 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
8022 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
8025 #if !defined(__cplusplus) \
8026 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
8027 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
8028 ISO C++ correct string.h and wchar.h protos not supported.
8035 # Return 1 if GNU as is used.
8037 proc check_effective_target_gas { } {
8038 global use_gas_saved
8041 if {![info exists use_gas_saved]} {
8042 # Check if the as used by gcc is GNU as.
8043 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
8044 # Provide /dev/null as input, otherwise gas times out reading from
8046 set status [remote_exec host "$gcc_as" "-v /dev/null"]
8047 set as_output [lindex $status 1]
8048 if { [ string first "GNU" $as_output ] >= 0 } {
8054 return $use_gas_saved
8057 # Return 1 if GNU ld is used.
8059 proc check_effective_target_gld { } {
8060 global use_gld_saved
8063 if {![info exists use_gld_saved]} {
8064 # Check if the ld used by gcc is GNU ld.
8065 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
8066 set status [remote_exec host "$gcc_ld" "--version"]
8067 set ld_output [lindex $status 1]
8068 if { [ string first "GNU" $ld_output ] >= 0 } {
8074 return $use_gld_saved
8077 # Return 1 if the compiler has been configure with link-time optimization
8080 proc check_effective_target_lto { } {
8081 if { [istarget nvptx-*-*] } {
8084 return [check_no_compiler_messages lto object {
8089 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
8091 proc check_effective_target_maybe_x32 { } {
8092 return [check_no_compiler_messages maybe_x32 object {
8094 } "-mx32 -maddress-mode=short"]
8097 # Return 1 if this target supports the -fsplit-stack option, 0
8100 proc check_effective_target_split_stack {} {
8101 return [check_no_compiler_messages split_stack object {
8106 # Return 1 if this target supports the -masm=intel option, 0
8109 proc check_effective_target_masm_intel {} {
8110 return [check_no_compiler_messages masm_intel object {
8111 extern void abort (void);
8115 # Return 1 if the language for the compiler under test is C.
8117 proc check_effective_target_c { } {
8119 if [string match $tool "gcc"] {
8125 # Return 1 if the language for the compiler under test is C++.
8127 proc check_effective_target_c++ { } {
8129 if { [string match $tool "g++"] || [string match $tool "libstdc++"] } {
8135 set cxx_default "c++14"
8136 # Check whether the current active language standard supports the features
8137 # of C++11/C++14 by checking for the presence of one of the -std flags.
8138 # This assumes that the default for the compiler is $cxx_default, and that
8139 # there will never be multiple -std= arguments on the command line.
8140 proc check_effective_target_c++11_only { } {
8142 if ![check_effective_target_c++] {
8145 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
8148 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
8153 proc check_effective_target_c++11 { } {
8154 if [check_effective_target_c++11_only] {
8157 return [check_effective_target_c++14]
8159 proc check_effective_target_c++11_down { } {
8160 if ![check_effective_target_c++] {
8163 return [expr ![check_effective_target_c++14] ]
8166 proc check_effective_target_c++14_only { } {
8168 if ![check_effective_target_c++] {
8171 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
8174 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
8180 proc check_effective_target_c++14 { } {
8181 if [check_effective_target_c++14_only] {
8184 return [check_effective_target_c++17]
8186 proc check_effective_target_c++14_down { } {
8187 if ![check_effective_target_c++] {
8190 return [expr ![check_effective_target_c++17] ]
8193 proc check_effective_target_c++98_only { } {
8195 if ![check_effective_target_c++] {
8198 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
8201 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
8207 proc check_effective_target_c++17_only { } {
8209 if ![check_effective_target_c++] {
8212 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
8215 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
8221 proc check_effective_target_c++17 { } {
8222 if [check_effective_target_c++17_only] {
8225 return [check_effective_target_c++2a]
8227 proc check_effective_target_c++17_down { } {
8228 if ![check_effective_target_c++] {
8231 return [expr ![check_effective_target_c++2a] ]
8234 proc check_effective_target_c++2a_only { } {
8236 if ![check_effective_target_c++] {
8239 if [check-flags { { } { } { -std=c++2a -std=gnu++2a } }] {
8242 if { $cxx_default == "c++20" && [check-flags { { } { } { } { -std=* } }] } {
8247 proc check_effective_target_c++2a { } {
8248 return [check_effective_target_c++2a_only]
8251 # Check for C++ Concepts TS support, i.e. -fconcepts flag.
8252 proc check_effective_target_concepts { } {
8253 return [check-flags { "" { } { -fconcepts } }]
8256 # Return 1 if expensive testcases should be run.
8258 proc check_effective_target_run_expensive_tests { } {
8259 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
8265 # Returns 1 if "mempcpy" is available on the target system.
8267 proc check_effective_target_mempcpy {} {
8268 return [check_function_available "mempcpy"]
8271 # Returns 1 if "stpcpy" is available on the target system.
8273 proc check_effective_target_stpcpy {} {
8274 return [check_function_available "stpcpy"]
8277 # Check whether the vectorizer tests are supported by the target and
8278 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
8279 # If a port wants to execute the tests more than once it should append
8280 # the supported target to EFFECTIVE_TARGETS instead, and the compile flags
8281 # will be added by a call to add_options_for_<target>.
8282 # Set dg-do-what-default to either compile or run, depending on target
8283 # capabilities. Do not set this if the supported target is appended to
8284 # EFFECTIVE_TARGETS. Flags and this variable will be set by et-dg-runtest
8285 # automatically. Return the number of effective targets if vectorizer tests
8286 # are supported, 0 otherwise.
8288 proc check_vect_support_and_set_flags { } {
8289 global DEFAULT_VECTCFLAGS
8290 global dg-do-what-default
8291 global EFFECTIVE_TARGETS
8293 if [istarget powerpc-*paired*] {
8294 lappend DEFAULT_VECTCFLAGS "-mpaired"
8295 if [check_750cl_hw_available] {
8296 set dg-do-what-default run
8298 set dg-do-what-default compile
8300 } elseif [istarget powerpc*-*-*] {
8301 # Skip targets not supporting -maltivec.
8302 if ![is-effective-target powerpc_altivec_ok] {
8306 lappend DEFAULT_VECTCFLAGS "-maltivec"
8307 if [check_p9vector_hw_available] {
8308 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
8309 } elseif [check_p8vector_hw_available] {
8310 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
8311 } elseif [check_vsx_hw_available] {
8312 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
8315 if [check_vmx_hw_available] {
8316 set dg-do-what-default run
8318 if [is-effective-target ilp32] {
8319 # Specify a cpu that supports VMX for compile-only tests.
8320 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
8322 set dg-do-what-default compile
8324 } elseif { [istarget spu-*-*] } {
8325 set dg-do-what-default run
8326 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8327 lappend DEFAULT_VECTCFLAGS "-msse2"
8328 if { [check_effective_target_sse2_runtime] } {
8329 set dg-do-what-default run
8331 set dg-do-what-default compile
8333 } elseif { [istarget mips*-*-*]
8334 && [check_effective_target_nomips16] } {
8335 if { [check_effective_target_mpaired_single] } {
8336 lappend EFFECTIVE_TARGETS mpaired_single
8338 if { [check_effective_target_mips_loongson] } {
8339 lappend EFFECTIVE_TARGETS mips_loongson
8341 if { [check_effective_target_mips_msa] } {
8342 lappend EFFECTIVE_TARGETS mips_msa
8344 return [llength $EFFECTIVE_TARGETS]
8345 } elseif [istarget sparc*-*-*] {
8346 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
8347 if [check_effective_target_ultrasparc_hw] {
8348 set dg-do-what-default run
8350 set dg-do-what-default compile
8352 } elseif [istarget alpha*-*-*] {
8353 # Alpha's vectorization capabilities are extremely limited.
8354 # It's more effort than its worth disabling all of the tests
8355 # that it cannot pass. But if you actually want to see what
8356 # does work, command out the return.
8359 lappend DEFAULT_VECTCFLAGS "-mmax"
8360 if [check_alpha_max_hw_available] {
8361 set dg-do-what-default run
8363 set dg-do-what-default compile
8365 } elseif [istarget ia64-*-*] {
8366 set dg-do-what-default run
8367 } elseif [is-effective-target arm_neon_ok] {
8368 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
8369 # NEON does not support denormals, so is not used for vectorization by
8370 # default to avoid loss of precision. We must pass -ffast-math to test
8371 # vectorization of float operations.
8372 lappend DEFAULT_VECTCFLAGS "-ffast-math"
8373 if [is-effective-target arm_neon_hw] {
8374 set dg-do-what-default run
8376 set dg-do-what-default compile
8378 } elseif [istarget "aarch64*-*-*"] {
8379 set dg-do-what-default run
8380 } elseif [istarget s390*-*-*] {
8381 # The S/390 backend set a default of 2 for that value.
8382 # Override it to have the same situation as with other
8384 lappend DEFAULT_VECTCFLAGS "--param" "min-vect-loop-bound=1"
8385 lappend DEFAULT_VECTCFLAGS "--param" "max-unrolled-insns=200"
8386 lappend DEFAULT_VECTCFLAGS "--param" "max-unroll-times=8"
8387 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peeled-insns=200"
8388 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peel-times=16"
8389 if [check_effective_target_s390_vxe] {
8390 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
8391 set dg-do-what-default run
8392 } elseif [check_effective_target_s390_vx] {
8393 lappend DEFAULT_VECTCFLAGS "-march=z13" "-mzarch"
8394 set dg-do-what-default run
8396 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
8397 set dg-do-what-default compile
8406 # Return 1 if the target does *not* require strict alignment.
8408 proc check_effective_target_non_strict_align {} {
8410 # On ARM, the default is to use STRICT_ALIGNMENT, but there
8411 # are interfaces defined for misaligned access and thus
8412 # depending on the architecture levels unaligned access is
8414 if [istarget "arm*-*-*"] {
8415 return [check_effective_target_arm_unaligned]
8418 return [check_no_compiler_messages non_strict_align assembly {
8420 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
8422 void foo(void) { z = (c *) y; }
8426 # Return 1 if the target has <ucontext.h>.
8428 proc check_effective_target_ucontext_h { } {
8429 return [check_no_compiler_messages ucontext_h assembly {
8430 #include <ucontext.h>
8434 proc check_effective_target_aarch64_tiny { } {
8435 if { [istarget aarch64*-*-*] } {
8436 return [check_no_compiler_messages aarch64_tiny object {
8437 #ifdef __AARCH64_CMODEL_TINY__
8440 #error target not AArch64 tiny code model
8448 # Create functions to check that the AArch64 assembler supports the
8449 # various architecture extensions via the .arch_extension pseudo-op.
8451 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod"} {
8452 eval [string map [list FUNC $aarch64_ext] {
8453 proc check_effective_target_aarch64_asm_FUNC_ok { } {
8454 if { [istarget aarch64*-*-*] } {
8455 return [check_no_compiler_messages aarch64_FUNC_assembler object {
8456 __asm__ (".arch_extension FUNC");
8457 } "-march=armv8-a+FUNC"]
8465 proc check_effective_target_aarch64_small { } {
8466 if { [istarget aarch64*-*-*] } {
8467 return [check_no_compiler_messages aarch64_small object {
8468 #ifdef __AARCH64_CMODEL_SMALL__
8471 #error target not AArch64 small code model
8479 proc check_effective_target_aarch64_large { } {
8480 if { [istarget aarch64*-*-*] } {
8481 return [check_no_compiler_messages aarch64_large object {
8482 #ifdef __AARCH64_CMODEL_LARGE__
8485 #error target not AArch64 large code model
8494 # Return 1 if this is a reduced AVR Tiny core. Such cores have different
8495 # register set, instruction set, addressing capabilities and ABI.
8497 proc check_effective_target_avr_tiny { } {
8498 if { [istarget avr*-*-*] } {
8499 return [check_no_compiler_messages avr_tiny object {
8503 #error target not a reduced AVR Tiny core
8511 # Return 1 if <fenv.h> is available with all the standard IEEE
8512 # exceptions and floating-point exceptions are raised by arithmetic
8513 # operations. (If the target requires special options for "inexact"
8514 # exceptions, those need to be specified in the testcases.)
8516 proc check_effective_target_fenv_exceptions {} {
8517 return [check_runtime fenv_exceptions {
8520 #ifndef FE_DIVBYZERO
8521 # error Missing FE_DIVBYZERO
8524 # error Missing FE_INEXACT
8527 # error Missing FE_INVALID
8530 # error Missing FE_OVERFLOW
8532 #ifndef FE_UNDERFLOW
8533 # error Missing FE_UNDERFLOW
8535 volatile float a = 0.0f, r;
8540 if (fetestexcept (FE_INVALID))
8545 } [add_options_for_ieee "-std=gnu99"]]
8548 proc check_effective_target_tiny {} {
8549 global et_target_tiny_saved
8551 if [info exists et_target_tiny_saved] {
8552 verbose "check_effective_target_tiny: using cached result" 2
8554 set et_target_tiny_saved 0
8555 if { [istarget aarch64*-*-*]
8556 && [check_effective_target_aarch64_tiny] } {
8557 set et_target_tiny_saved 1
8559 if { [istarget avr-*-*]
8560 && [check_effective_target_avr_tiny] } {
8561 set et_target_tiny_saved 1
8565 return $et_target_tiny_saved
8568 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
8570 proc check_effective_target_logical_op_short_circuit {} {
8571 if { [istarget mips*-*-*]
8572 || [istarget arc*-*-*]
8573 || [istarget avr*-*-*]
8574 || [istarget crisv32-*-*] || [istarget cris-*-*]
8575 || [istarget mmix-*-*]
8576 || [istarget s390*-*-*]
8577 || [istarget powerpc*-*-*]
8578 || [istarget nios2*-*-*]
8579 || [istarget riscv*-*-*]
8580 || [istarget visium-*-*]
8581 || [check_effective_target_arm_cortex_m] } {
8587 # Record that dg-final test TEST requires convential compilation.
8589 proc force_conventional_output_for { test } {
8590 if { [info proc $test] == "" } {
8591 perror "$test does not exist"
8594 proc ${test}_required_options {} {
8595 global gcc_force_conventional_output
8596 return $gcc_force_conventional_output
8600 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
8601 # otherwise. Cache the result.
8603 proc check_effective_target_pie_copyreloc { } {
8604 global pie_copyreloc_available_saved
8606 global GCC_UNDER_TEST
8608 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8612 # Need auto-host.h to check linker support.
8613 if { ![file exists ../../auto-host.h ] } {
8617 if [info exists pie_copyreloc_available_saved] {
8618 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
8620 # Set up and compile to see if linker supports PIE with copy
8621 # reloc. Include the current process ID in the file names to
8622 # prevent conflicts with invocations for multiple testsuites.
8627 set f [open $src "w"]
8628 puts $f "#include \"../../auto-host.h\""
8629 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
8630 puts $f "# error Linker does not support PIE with copy reloc."
8634 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
8635 set lines [${tool}_target_compile $src $obj object ""]
8640 if [string match "" $lines] then {
8641 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
8642 set pie_copyreloc_available_saved 1
8644 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
8645 set pie_copyreloc_available_saved 0
8649 return $pie_copyreloc_available_saved
8652 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
8653 # otherwise. Cache the result.
8655 proc check_effective_target_got32x_reloc { } {
8656 global got32x_reloc_available_saved
8658 global GCC_UNDER_TEST
8660 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8664 # Need auto-host.h to check linker support.
8665 if { ![file exists ../../auto-host.h ] } {
8669 if [info exists got32x_reloc_available_saved] {
8670 verbose "check_effective_target_got32x_reloc returning saved $got32x_reloc_available_saved" 2
8672 # Include the current process ID in the file names to prevent
8673 # conflicts with invocations for multiple testsuites.
8675 set src got32x[pid].c
8676 set obj got32x[pid].o
8678 set f [open $src "w"]
8679 puts $f "#include \"../../auto-host.h\""
8680 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
8681 puts $f "# error Assembler does not support R_386_GOT32X."
8685 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
8686 set lines [${tool}_target_compile $src $obj object ""]
8691 if [string match "" $lines] then {
8692 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
8693 set got32x_reloc_available_saved 1
8695 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
8696 set got32x_reloc_available_saved 0
8700 return $got32x_reloc_available_saved
8703 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
8704 # 0 otherwise. Cache the result.
8706 proc check_effective_target_tls_get_addr_via_got { } {
8707 global tls_get_addr_via_got_available_saved
8709 global GCC_UNDER_TEST
8711 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8715 # Need auto-host.h to check linker support.
8716 if { ![file exists ../../auto-host.h ] } {
8720 if [info exists tls_get_addr_via_got_available_saved] {
8721 verbose "check_effective_target_tls_get_addr_via_got returning saved $tls_get_addr_via_got_available_saved" 2
8723 # Include the current process ID in the file names to prevent
8724 # conflicts with invocations for multiple testsuites.
8726 set src tls_get_addr_via_got[pid].c
8727 set obj tls_get_addr_via_got[pid].o
8729 set f [open $src "w"]
8730 puts $f "#include \"../../auto-host.h\""
8731 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
8732 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
8736 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
8737 set lines [${tool}_target_compile $src $obj object ""]
8742 if [string match "" $lines] then {
8743 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
8744 set tls_get_addr_via_got_available_saved 1
8746 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
8747 set tls_get_addr_via_got_available_saved 0
8751 return $tls_get_addr_via_got_available_saved
8754 # Return 1 if the target uses comdat groups.
8756 proc check_effective_target_comdat_group {} {
8757 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
8759 inline int foo () { return 1; }
8764 # Return 1 if target supports __builtin_eh_return
8765 proc check_effective_target_builtin_eh_return { } {
8766 return [check_no_compiler_messages builtin_eh_return object {
8767 void test (long l, void *p)
8769 __builtin_eh_return (l, p);
8774 # Return 1 if the target supports max reduction for vectors.
8776 proc check_effective_target_vect_max_reduc { } {
8777 if { [istarget aarch64*-*-*] || [is-effective-target arm_neon] } {
8783 # Return 1 if there is an nvptx offload compiler.
8785 proc check_effective_target_offload_nvptx { } {
8786 return [check_no_compiler_messages offload_nvptx object {
8787 int main () {return 0;}
8788 } "-foffload=nvptx-none" ]
8791 # Return 1 if the compiler has been configured with hsa offloading.
8793 proc check_effective_target_offload_hsa { } {
8794 return [check_no_compiler_messages offload_hsa assembly {
8795 int main () {return 0;}
8799 # Return 1 if the target support -fprofile-update=atomic
8800 proc check_effective_target_profile_update_atomic {} {
8801 return [check_no_compiler_messages profile_update_atomic assembly {
8802 int main (void) { return 0; }
8803 } "-fprofile-update=atomic -fprofile-generate"]
8806 # Return 1 if vector (va - vector add) instructions are understood by
8807 # the assembler and can be executed. This also covers checking for
8808 # the VX kernel feature. A kernel without that feature does not
8809 # enable the vector facility and the following check will die with a
8811 proc check_effective_target_s390_vx { } {
8812 if ![istarget s390*-*-*] then {
8816 return [check_runtime s390_check_vx {
8819 asm ("va %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
8822 } "-march=z13 -mzarch" ]
8825 # Same as above but for the z14 vector enhancement facility. Test
8826 # is performed with the vector nand instruction.
8827 proc check_effective_target_s390_vxe { } {
8828 if ![istarget s390*-*-*] then {
8832 return [check_runtime s390_check_vxe {
8835 asm ("vnn %%v24, %%v26, %%v28" : : : "v24", "v26", "v28");
8838 } "-march=z14 -mzarch" ]
8841 #For versions of ARM architectures that have hardware div insn,
8842 #disable the divmod transform
8844 proc check_effective_target_arm_divmod_simode { } {
8845 return [check_no_compiler_messages arm_divmod assembly {
8846 #ifdef __ARM_ARCH_EXT_IDIV__
8853 # Return 1 if target supports divmod hardware insn or divmod libcall.
8855 proc check_effective_target_divmod { } {
8856 #TODO: Add checks for all targets that have either hardware divmod insn
8857 # or define libfunc for divmod.
8858 if { [istarget arm*-*-*]
8859 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8865 # Return 1 if target supports divmod for SImode. The reason for
8866 # separating this from check_effective_target_divmod is that
8867 # some versions of ARM architecture define div instruction
8868 # only for simode, and for these archs, we do not want to enable
8869 # divmod transform for simode.
8871 proc check_effective_target_divmod_simode { } {
8872 if { [istarget arm*-*-*] } {
8873 return [check_effective_target_arm_divmod_simode]
8876 return [check_effective_target_divmod]
8879 # Return 1 if store merging optimization is applicable for target.
8880 # Store merging is not profitable for targets like the avr which
8881 # can load/store only one byte at a time. Use int size as a proxy
8882 # for the number of bytes the target can write, and skip for targets
8883 # with a smallish (< 32) size.
8885 proc check_effective_target_store_merge { } {
8886 if { [is-effective-target non_strict_align ] && [is-effective-target int32plus] } {
8893 # Return 1 if we're able to assemble rdrand
8895 proc check_effective_target_rdrand { } {
8896 return [check_no_compiler_messages_nocache rdrand object {
8901 __builtin_ia32_rdrand32_step(&val);
8907 # Return 1 if the target supports coprocessor instructions: cdp, ldc, ldcl,
8908 # stc, stcl, mcr and mrc.
8909 proc check_effective_target_arm_coproc1_ok_nocache { } {
8910 if { ![istarget arm*-*-*] } {
8913 return [check_no_compiler_messages_nocache arm_coproc1_ok assembly {
8914 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 4
8920 proc check_effective_target_arm_coproc1_ok { } {
8921 return [check_cached_effective_target arm_coproc1_ok \
8922 check_effective_target_arm_coproc1_ok_nocache]
8925 # Return 1 if the target supports all coprocessor instructions checked by
8926 # check_effective_target_arm_coproc1_ok in addition to the following: cdp2,
8927 # ldc2, ldc2l, stc2, stc2l, mcr2 and mrc2.
8928 proc check_effective_target_arm_coproc2_ok_nocache { } {
8929 if { ![check_effective_target_arm_coproc1_ok] } {
8932 return [check_no_compiler_messages_nocache arm_coproc2_ok assembly {
8933 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 5
8939 proc check_effective_target_arm_coproc2_ok { } {
8940 return [check_cached_effective_target arm_coproc2_ok \
8941 check_effective_target_arm_coproc2_ok_nocache]
8944 # Return 1 if the target supports all coprocessor instructions checked by
8945 # check_effective_target_arm_coproc2_ok in addition the following: mcrr and
8947 proc check_effective_target_arm_coproc3_ok_nocache { } {
8948 if { ![check_effective_target_arm_coproc2_ok] } {
8951 return [check_no_compiler_messages_nocache arm_coproc3_ok assembly {
8952 #if (__thumb__ && !__thumb2__) \
8953 || (__ARM_ARCH < 6 && !defined (__ARM_ARCH_5TE__))
8959 proc check_effective_target_arm_coproc3_ok { } {
8960 return [check_cached_effective_target arm_coproc3_ok \
8961 check_effective_target_arm_coproc3_ok_nocache]
8964 # Return 1 if the target supports all coprocessor instructions checked by
8965 # check_effective_target_arm_coproc3_ok in addition the following: mcrr2 and
8967 proc check_effective_target_arm_coproc4_ok_nocache { } {
8968 if { ![check_effective_target_arm_coproc3_ok] } {
8971 return [check_no_compiler_messages_nocache arm_coproc4_ok assembly {
8972 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 6
8978 proc check_effective_target_arm_coproc4_ok { } {
8979 return [check_cached_effective_target arm_coproc4_ok \
8980 check_effective_target_arm_coproc4_ok_nocache]
8983 # Return 1 if the target supports the auto_inc_dec optimization pass.
8984 proc check_effective_target_autoincdec { } {
8985 if { ![check_no_compiler_messages auto_incdec assembly { void f () { }
8986 } "-O2 -fdump-rtl-auto_inc_dec" ] } {
8990 set dumpfile [glob -nocomplain "auto_incdec[pid].c.\[0-9\]\[0-9\]\[0-9\]r.auto_inc_dec"]
8991 if { [file exists $dumpfile ] } {
8992 file delete $dumpfile
8998 # Return 1 if the target has support for stack probing designed
8999 # to avoid stack-clash style attacks.
9001 # This is used to restrict the stack-clash mitigation tests to
9002 # just those targets that have been explicitly supported.
9004 # In addition to the prologue work on those targets, each target's
9005 # properties should be described in the functions below so that
9006 # tests do not become a mess of unreadable target conditions.
9008 proc check_effective_target_supports_stack_clash_protection { } {
9010 # Temporary until the target bits are fully ACK'd.
9011 # if { [istarget aarch*-*-*] } {
9015 if { [istarget x86_64-*-*] || [istarget i?86-*-*]
9016 || [istarget powerpc*-*-*] || [istarget rs6000*-*-*]
9017 || [istarget s390*-*-*] } {
9023 # Return 1 if the target creates a frame pointer for non-leaf functions
9024 # Note we ignore cases where we apply tail call optimization here.
9025 proc check_effective_target_frame_pointer_for_non_leaf { } {
9026 if { [istarget aarch*-*-*] } {
9030 # Solaris/x86 defaults to -fno-omit-frame-pointer.
9031 if { [istarget i?86-*-solaris*] || [istarget x86_64-*-solaris*] } {
9038 # Return 1 if the target's calling sequence or its ABI
9039 # create implicit stack probes at or prior to function entry.
9040 proc check_effective_target_caller_implicit_probes { } {
9042 # On x86/x86_64 the call instruction itself pushes the return
9043 # address onto the stack. That is an implicit probe of *sp.
9044 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
9048 # On PPC, the ABI mandates that the address of the outer
9049 # frame be stored at *sp. Thus each allocation of stack
9050 # space is itself an implicit probe of *sp.
9051 if { [istarget powerpc*-*-*] || [istarget rs6000*-*-*] } {
9055 # s390's ABI has a register save area allocated by the
9056 # caller for use by the callee. The mere existence does
9057 # not constitute a probe by the caller, but when the slots
9058 # used by the callee those stores are implicit probes.
9059 if { [istarget s390*-*-*] } {
9063 # Not strictly true on aarch64, but we have agreed that we will
9064 # consider any function that pushes SP more than 3kbytes into
9065 # the guard page as broken. This essentially means that we can
9066 # consider the aarch64 as having a caller implicit probe at
9068 if { [istarget aarch64*-*-*] } {
9075 # Targets that potentially realign the stack pointer often cause residual
9076 # stack allocations and make it difficult to elimination loops or residual
9077 # allocations for dynamic stack allocations
9078 proc check_effective_target_callee_realigns_stack { } {
9079 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
9085 # Return 1 if CET instructions can be compiled.
9086 proc check_effective_target_cet { } {
9087 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
9090 return [check_no_compiler_messages cet object {