1 # Copyright (C) 1999-2019 Free Software Foundation, Inc.
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
20 # This file defines procs for determining features supported by the target.
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
35 # "! Fortran" for Fortran code,
37 # "// ObjC++" for ObjC++
39 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
40 # allow for ObjC/ObjC++ specific flags.
42 proc check_compile {basename type contents args} {
44 verbose "check_compile tool: $tool for $basename"
46 # Save additional_sources to avoid compiling testsuite's sources
47 # against check_compile's source.
48 global additional_sources
49 if [info exists additional_sources] {
50 set tmp_additional_sources "$additional_sources"
51 set additional_sources ""
54 if { [llength $args] > 0 } {
55 set options [list "additional_flags=[lindex $args 0]"]
59 switch -glob -- $contents {
60 "*! Fortran*" { set src ${basename}[pid].f90 }
61 "*// C++*" { set src ${basename}[pid].cc }
62 "*// D*" { set src ${basename}[pid].d }
63 "*// ObjC++*" { set src ${basename}[pid].mm }
64 "*/* ObjC*" { set src ${basename}[pid].m }
65 "*// Go*" { set src ${basename}[pid].go }
68 "objc" { set src ${basename}[pid].m }
69 "obj-c++" { set src ${basename}[pid].mm }
70 default { set src ${basename}[pid].c }
75 set compile_type $type
77 assembly { set output ${basename}[pid].s }
78 object { set output ${basename}[pid].o }
79 executable { set output ${basename}[pid].exe }
81 set output ${basename}[pid].s
82 lappend options "additional_flags=-fdump-$type"
83 set compile_type assembly
89 set lines [${tool}_target_compile $src $output $compile_type "$options"]
92 set scan_output $output
93 # Don't try folding this into the switch above; calling "glob" before the
94 # file is created won't work.
95 if [regexp "rtl-(.*)" $type dummy rtl_type] {
96 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
100 # Restore additional_sources.
101 if [info exists additional_sources] {
102 set additional_sources "$tmp_additional_sources"
105 return [list $lines $scan_output]
108 proc current_target_name { } {
110 if [info exists target_info(target,name)] {
111 set answer $target_info(target,name)
118 # Implement an effective-target check for property PROP by invoking
119 # the Tcl command ARGS and seeing if it returns true.
121 proc check_cached_effective_target { prop args } {
124 set target [current_target_name]
125 if {![info exists et_cache($prop,$target)]} {
126 verbose "check_cached_effective_target $prop: checking $target" 2
127 if {[string is true -strict $args] || [string is false -strict $args]} {
128 error {check_cached_effective_target condition already evaluated; did you pass [...] instead of the expected {...}?}
130 set code [catch {uplevel eval $args} result]
131 if {$code != 0 && $code != 2} {
132 return -code $code $result
134 set et_cache($prop,$target) $result
137 set value $et_cache($prop,$target)
138 verbose "check_cached_effective_target $prop: returning $value for $target" 2
142 # Implements a version of check_cached_effective_target that also takes et_index
143 # into account when creating the key for the cache.
144 proc check_cached_effective_target_indexed { prop args } {
146 set key "$et_index $prop"
147 verbose "check_cached_effective_target_index $prop: returning $key" 2
149 return [check_cached_effective_target $key [list uplevel eval $args]]
152 # Clear effective-target cache. This is useful after testing
153 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
155 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
156 # do a clear_effective_target_cache at the end as the target cache can
157 # make decisions based upon the flags, and those decisions need to be
158 # redone when the flags change. An example of this is the
159 # asan_init/asan_finish pair.
161 proc clear_effective_target_cache { } {
166 # Like check_compile, but delete the output file and return true if the
167 # compiler printed no messages.
168 proc check_no_compiler_messages_nocache {args} {
169 set result [eval check_compile $args]
170 set lines [lindex $result 0]
171 set output [lindex $result 1]
172 remote_file build delete $output
173 return [string match "" $lines]
176 # Like check_no_compiler_messages_nocache, but cache the result.
177 # PROP is the property we're checking, and doubles as a prefix for
178 # temporary filenames.
179 proc check_no_compiler_messages {prop args} {
180 return [check_cached_effective_target $prop {
181 eval [list check_no_compiler_messages_nocache $prop] $args
185 # Like check_compile, but return true if the compiler printed no
186 # messages and if the contents of the output file satisfy PATTERN.
187 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
188 # don't match regular expression REGEXP, otherwise they satisfy it
189 # if they do match regular expression PATTERN. (PATTERN can start
190 # with something like "[!]" if the regular expression needs to match
191 # "!" as the first character.)
193 # Delete the output file before returning. The other arguments are
194 # as for check_compile.
195 proc check_no_messages_and_pattern_nocache {basename pattern args} {
198 set result [eval [list check_compile $basename] $args]
199 set lines [lindex $result 0]
200 set output [lindex $result 1]
203 if { [string match "" $lines] } {
204 set chan [open "$output"]
205 set invert [regexp {^!(.*)} $pattern dummy pattern]
206 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
210 remote_file build delete $output
214 # Like check_no_messages_and_pattern_nocache, but cache the result.
215 # PROP is the property we're checking, and doubles as a prefix for
216 # temporary filenames.
217 proc check_no_messages_and_pattern {prop pattern args} {
218 return [check_cached_effective_target $prop {
219 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
223 # Try to compile and run an executable from code CONTENTS. Return true
224 # if the compiler reports no messages and if execution "passes" in the
225 # usual DejaGNU sense. The arguments are as for check_compile, with
226 # TYPE implicitly being "executable".
227 proc check_runtime_nocache {basename contents args} {
230 set result [eval [list check_compile $basename executable $contents] $args]
231 set lines [lindex $result 0]
232 set output [lindex $result 1]
235 if { [string match "" $lines] } {
236 # No error messages, everything is OK.
237 set result [remote_load target "./$output" "" ""]
238 set status [lindex $result 0]
239 verbose "check_runtime_nocache $basename: status is <$status>" 2
240 if { $status == "pass" } {
244 remote_file build delete $output
248 # Like check_runtime_nocache, but cache the result. PROP is the
249 # property we're checking, and doubles as a prefix for temporary
251 proc check_runtime {prop args} {
254 return [check_cached_effective_target $prop {
255 eval [list check_runtime_nocache $prop] $args
259 # Return 1 if GCC was configured with $pattern.
260 proc check_configured_with { pattern } {
263 set gcc_output [${tool}_target_compile "-v" "" "none" ""]
264 if { [ regexp "Configured with: \[^\n\]*$pattern" $gcc_output ] } {
265 verbose "Matched: $pattern" 2
269 verbose "Failed to match: $pattern" 2
273 ###############################
274 # proc check_weak_available { }
275 ###############################
277 # weak symbols are only supported in some configs/object formats
278 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
280 proc check_weak_available { } {
283 # All mips targets should support it
285 if { [ string first "mips" $target_cpu ] >= 0 } {
289 # All AIX targets should support it
291 if { [istarget *-*-aix*] } {
295 # All solaris2 targets should support it
297 if { [istarget *-*-solaris2*] } {
301 # Windows targets Cygwin and MingW32 support it
303 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
307 # HP-UX 10.X doesn't support it
309 if { [istarget hppa*-*-hpux10*] } {
313 # nvptx (nearly) supports it
315 if { [istarget nvptx-*-*] } {
319 # pdp11 doesn't support it
321 if { [istarget pdp11*-*-*] } {
325 # ELF and ECOFF support it. a.out does with gas/gld but may also with
326 # other linkers, so we should try it
328 set objformat [gcc_target_object_format]
336 unknown { return -1 }
341 # return 1 if weak undefined symbols are supported.
343 proc check_effective_target_weak_undefined { } {
344 return [check_runtime weak_undefined {
345 extern void foo () __attribute__((weak));
346 int main (void) { if (foo) return 1; return 0; }
350 ###############################
351 # proc check_weak_override_available { }
352 ###############################
354 # Like check_weak_available, but return 0 if weak symbol definitions
355 # cannot be overridden.
357 proc check_weak_override_available { } {
358 if { [istarget *-*-mingw*] } {
361 return [check_weak_available]
364 ###############################
365 # proc check_visibility_available { what_kind }
366 ###############################
368 # The visibility attribute is only support in some object formats
369 # This proc returns 1 if it is supported, 0 if not.
370 # The argument is the kind of visibility, default/protected/hidden/internal.
372 proc check_visibility_available { what_kind } {
373 if [string match "" $what_kind] { set what_kind "hidden" }
375 return [check_no_compiler_messages visibility_available_$what_kind object "
376 void f() __attribute__((visibility(\"$what_kind\")));
381 ###############################
382 # proc check_alias_available { }
383 ###############################
385 # Determine if the target toolchain supports the alias attribute.
387 # Returns 2 if the target supports aliases. Returns 1 if the target
388 # only supports weak aliased. Returns 0 if the target does not
389 # support aliases at all. Returns -1 if support for aliases could not
392 proc check_alias_available { } {
395 return [check_cached_effective_target alias_available {
398 verbose "check_alias_available compiling testfile $src" 2
399 set f [open $src "w"]
400 # Compile a small test program. The definition of "g" is
401 # necessary to keep the Solaris assembler from complaining
403 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
404 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
406 set lines [${tool}_target_compile $src $obj object ""]
408 remote_file build delete $obj
410 if [string match "" $lines] then {
411 # No error messages, everything is OK.
414 if [regexp "alias definitions not supported" $lines] {
415 verbose "check_alias_available target does not support aliases" 2
417 set objformat [gcc_target_object_format]
419 if { $objformat == "elf" } {
420 verbose "check_alias_available but target uses ELF format, so it ought to" 2
426 if [regexp "only weak aliases are supported" $lines] {
427 verbose "check_alias_available target supports only weak aliases" 2
437 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
439 proc check_effective_target_alias { } {
440 if { [check_alias_available] < 2 } {
447 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
449 proc check_ifunc_available { } {
450 return [check_no_compiler_messages ifunc_available object {
455 typedef void F (void);
456 F* g (void) { return &f_; }
457 void f () __attribute__ ((ifunc ("g")));
464 # Returns true if --gc-sections is supported on the target.
466 proc check_gc_sections_available { } {
469 return [check_cached_effective_target gc_sections_available {
470 # Some targets don't support gc-sections despite whatever's
471 # advertised by ld's options.
472 if { [istarget alpha*-*-*]
473 || [istarget ia64-*-*] } {
477 # elf2flt uses -q (--emit-relocs), which is incompatible with
479 if { [board_info target exists ldflags]
480 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
484 # VxWorks kernel modules are relocatable objects linked with -r,
485 # while RTP executables are linked with -q (--emit-relocs).
486 # Both of these options are incompatible with --gc-sections.
487 if { [istarget *-*-vxworks*] } {
491 # Check if the ld used by gcc supports --gc-sections.
492 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
493 set ld_output [remote_exec host "$gcc_ld" "--help"]
494 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
502 # Return 1 if according to target_info struct and explicit target list
503 # target is supposed to support trampolines.
505 proc check_effective_target_trampolines { } {
506 if [target_info exists gcc,no_trampolines] {
509 if { [istarget avr-*-*]
510 || [istarget msp430-*-*]
511 || [istarget nvptx-*-*]
512 || [istarget hppa2.0w-hp-hpux11.23]
513 || [istarget hppa64-hp-hpux11.23] } {
519 # Return 1 if target has limited stack size.
521 proc check_effective_target_stack_size { } {
522 if [target_info exists gcc,stack_size] {
528 # Return the value attribute of an effective target, otherwise return 0.
530 proc dg-effective-target-value { effective_target } {
531 if { "$effective_target" == "stack_size" } {
532 if [check_effective_target_stack_size] {
533 return [target_info gcc,stack_size]
540 # Return 1 if signal.h is supported.
542 proc check_effective_target_signal { } {
543 if [target_info exists gcc,signal_suppress] {
549 # Return 1 if according to target_info struct and explicit target list
550 # target disables -fdelete-null-pointer-checks. Targets should return 0
551 # if they simply default to -fno-delete-null-pointer-checks but obey
552 # -fdelete-null-pointer-checks when passed explicitly (and tests that
553 # depend on this option should do that).
555 proc check_effective_target_keeps_null_pointer_checks { } {
556 if [target_info exists keeps_null_pointer_checks] {
559 if { [istarget msp430-*-*] } {
565 # Return the autofdo profile wrapper
567 # Linux by default allows 516KB of perf event buffers
568 # in /proc/sys/kernel/perf_event_mlock_kb
569 # Each individual perf tries to grab it
570 # This causes problems with parallel test suite runs. Instead
571 # limit us to 8 pages (32K), which should be good enough
572 # for the small test programs. With the default settings
573 # this allows parallelism of 16 and higher of parallel gcc-auto-profile
574 proc profopt-perf-wrapper { } {
576 return "$srcdir/../config/i386/gcc-auto-profile -o perf.data -m8 "
579 # Return true if profiling is supported on the target.
581 proc check_profiling_available { test_what } {
582 verbose "Profiling argument is <$test_what>" 1
584 # These conditions depend on the argument so examine them before
585 # looking at the cache variable.
587 # Tree profiling requires TLS runtime support.
588 if { $test_what == "-fprofile-generate" } {
589 if { ![check_effective_target_tls_runtime] } {
594 if { $test_what == "-fauto-profile" } {
595 if { !([istarget i?86-*-linux*] || [istarget x86_64-*-linux*]) } {
596 verbose "autofdo only supported on linux"
599 # not cross compiling?
601 verbose "autofdo not supported for non native builds"
604 set event [profopt-perf-wrapper]
606 verbose "autofdo not supported"
610 set status [remote_exec host "$srcdir/../config/i386/gcc-auto-profile" "true -v >/dev/null"]
611 if { [lindex $status 0] != 0 } {
612 verbose "autofdo not supported because perf does not work"
616 # no good way to check this in advance -- check later instead.
617 #set status [remote_exec host "create_gcov" "2>/dev/null"]
618 #if { [lindex $status 0] != 255 } {
619 # verbose "autofdo not supported due to missing create_gcov"
624 # Support for -p on solaris2 relies on mcrt1.o which comes with the
625 # vendor compiler. We cannot reliably predict the directory where the
626 # vendor compiler (and thus mcrt1.o) is installed so we can't
627 # necessarily find mcrt1.o even if we have it.
628 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
632 # We don't yet support profiling for MIPS16.
633 if { [istarget mips*-*-*]
634 && ![check_effective_target_nomips16]
635 && ($test_what == "-p" || $test_what == "-pg") } {
639 # MinGW does not support -p.
640 if { [istarget *-*-mingw*] && $test_what == "-p" } {
644 # cygwin does not support -p.
645 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
649 # uClibc does not have gcrt1.o.
650 if { [check_effective_target_uclibc]
651 && ($test_what == "-p" || $test_what == "-pg") } {
655 # Now examine the cache variable.
656 set profiling_working \
657 [check_cached_effective_target profiling_available {
658 # Some targets don't have any implementation of __bb_init_func or are
659 # missing other needed machinery.
660 if {[istarget aarch64*-*-elf]
661 || [istarget am3*-*-linux*]
662 || [istarget arm*-*-eabi*]
663 || [istarget arm*-*-elf]
664 || [istarget arm*-*-symbianelf*]
665 || [istarget avr-*-*]
666 || [istarget bfin-*-*]
667 || [istarget cris-*-*]
668 || [istarget crisv32-*-*]
669 || [istarget csky-*-elf]
670 || [istarget fido-*-elf]
671 || [istarget h8300-*-*]
672 || [istarget lm32-*-*]
673 || [istarget m32c-*-elf]
674 || [istarget m68k-*-elf]
675 || [istarget m68k-*-uclinux*]
676 || [istarget mips*-*-elf*]
677 || [istarget mmix-*-*]
678 || [istarget mn10300-*-elf*]
679 || [istarget moxie-*-elf*]
680 || [istarget msp430-*-*]
681 || [istarget nds32*-*-elf]
682 || [istarget nios2-*-elf]
683 || [istarget nvptx-*-*]
684 || [istarget powerpc-*-eabi*]
685 || [istarget powerpc-*-elf]
687 || [istarget tic6x-*-elf]
688 || [istarget visium-*-*]
689 || [istarget xstormy16-*]
690 || [istarget xtensa*-*-elf]
691 || [istarget *-*-rtems*]
692 || [istarget *-*-vxworks*] } {
699 # -pg link test result can't be cached since it may change between
701 if { $profiling_working == 1
702 && ![check_no_compiler_messages_nocache profiling executable {
703 int main() { return 0; } } "-pg"] } {
704 set profiling_working 0
707 return $profiling_working
710 # Check to see if a target is "freestanding". This is as per the definition
711 # in Section 4 of C99 standard. Effectively, it is a target which supports no
712 # extra headers or libraries other than what is considered essential.
713 proc check_effective_target_freestanding { } {
714 if { [istarget nvptx-*-*] } {
720 # Return 1 if target has packed layout of structure members by
721 # default, 0 otherwise. Note that this is slightly different than
722 # whether the target has "natural alignment": both attributes may be
725 proc check_effective_target_default_packed { } {
726 return [check_no_compiler_messages default_packed assembly {
727 struct x { char a; long b; } c;
728 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
732 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
733 # documentation, where the test also comes from.
735 proc check_effective_target_pcc_bitfield_type_matters { } {
736 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
737 # bitfields, but let's stick to the example code from the docs.
738 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
739 struct foo1 { char x; char :0; char y; };
740 struct foo2 { char x; int :0; char y; };
741 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
745 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
747 proc add_options_for_tls { flags } {
748 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
749 # libthread, so always pass -pthread for native TLS. Same for AIX.
750 # Need to duplicate native TLS check from
751 # check_effective_target_tls_native to avoid recursion.
752 if { ([istarget powerpc-ibm-aix*]) &&
753 [check_no_messages_and_pattern tls_native "!emutls" assembly {
755 int f (void) { return i; }
756 void g (int j) { i = j; }
758 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
763 # Return 1 if indirect jumps are supported, 0 otherwise.
765 proc check_effective_target_indirect_jumps {} {
766 if { [istarget nvptx-*-*] } {
772 # Return 1 if nonlocal goto is supported, 0 otherwise.
774 proc check_effective_target_nonlocal_goto {} {
775 if { [istarget nvptx-*-*] } {
781 # Return 1 if global constructors are supported, 0 otherwise.
783 proc check_effective_target_global_constructor {} {
784 if { [istarget nvptx-*-*] } {
790 # Return 1 if taking label values is supported, 0 otherwise.
792 proc check_effective_target_label_values {} {
793 if { [istarget nvptx-*-*] || [target_info exists gcc,no_label_values] } {
800 # Return 1 if builtin_return_address and builtin_frame_address are
801 # supported, 0 otherwise.
803 proc check_effective_target_return_address {} {
804 if { [istarget nvptx-*-*] } {
810 # Return 1 if the assembler does not verify function types against
811 # calls, 0 otherwise. Such verification will typically show up problems
812 # with K&R C function declarations.
814 proc check_effective_target_untyped_assembly {} {
815 if { [istarget nvptx-*-*] } {
821 # Return 1 if alloca is supported, 0 otherwise.
823 proc check_effective_target_alloca {} {
824 if { [istarget nvptx-*-*] } {
825 return [check_no_compiler_messages alloca assembly {
827 void g (int n) { f (__builtin_alloca (n)); }
833 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
835 proc check_effective_target_tls {} {
836 return [check_no_compiler_messages tls assembly {
838 int f (void) { return i; }
839 void g (int j) { i = j; }
843 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
845 proc check_effective_target_tls_native {} {
846 # VxWorks uses emulated TLS machinery, but with non-standard helper
847 # functions, so we fail to automatically detect it.
848 if { [istarget *-*-vxworks*] } {
852 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
854 int f (void) { return i; }
855 void g (int j) { i = j; }
859 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
861 proc check_effective_target_tls_emulated {} {
862 # VxWorks uses emulated TLS machinery, but with non-standard helper
863 # functions, so we fail to automatically detect it.
864 if { [istarget *-*-vxworks*] } {
868 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
870 int f (void) { return i; }
871 void g (int j) { i = j; }
875 # Return 1 if TLS executables can run correctly, 0 otherwise.
877 proc check_effective_target_tls_runtime {} {
878 return [check_runtime tls_runtime {
879 __thread int thr __attribute__((tls_model("global-dynamic"))) = 0;
880 int main (void) { return thr; }
881 } [add_options_for_tls ""]]
884 # Return 1 if atomic compare-and-swap is supported on 'int'
886 proc check_effective_target_cas_char {} {
887 return [check_no_compiler_messages cas_char assembly {
888 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
894 proc check_effective_target_cas_int {} {
895 return [check_no_compiler_messages cas_int assembly {
896 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
898 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
906 # Return 1 if -ffunction-sections is supported, 0 otherwise.
908 proc check_effective_target_function_sections {} {
909 # Darwin has its own scheme and silently accepts -ffunction-sections.
910 if { [istarget *-*-darwin*] } {
914 return [check_no_compiler_messages functionsections assembly {
916 } "-ffunction-sections"]
919 # Return 1 if instruction scheduling is available, 0 otherwise.
921 proc check_effective_target_scheduling {} {
922 return [check_no_compiler_messages scheduling object {
924 } "-fschedule-insns"]
927 # Return 1 if trapping arithmetic is available, 0 otherwise.
929 proc check_effective_target_trapping {} {
930 return [check_no_compiler_messages trapping object {
931 int add (int a, int b) { return a + b; }
935 # Return 1 if compilation with -fgraphite is error-free for trivial
938 proc check_effective_target_fgraphite {} {
939 return [check_no_compiler_messages fgraphite object {
944 # Return 1 if compilation with -fopenacc is error-free for trivial
947 proc check_effective_target_fopenacc {} {
948 # nvptx can be built with the device-side bits of openacc, but it
949 # does not make sense to test it as an openacc host.
950 if [istarget nvptx-*-*] { return 0 }
952 return [check_no_compiler_messages fopenacc object {
957 # Return 1 if compilation with -fopenmp is error-free for trivial
960 proc check_effective_target_fopenmp {} {
961 # nvptx can be built with the device-side bits of libgomp, but it
962 # does not make sense to test it as an openmp host.
963 if [istarget nvptx-*-*] { return 0 }
965 return [check_no_compiler_messages fopenmp object {
970 # Return 1 if compilation with -fgnu-tm is error-free for trivial
973 proc check_effective_target_fgnu_tm {} {
974 return [check_no_compiler_messages fgnu_tm object {
979 # Return 1 if the target supports mmap, 0 otherwise.
981 proc check_effective_target_mmap {} {
982 return [check_function_available "mmap"]
985 # Return 1 if the target supports dlopen, 0 otherwise.
986 proc check_effective_target_dlopen {} {
987 return [check_no_compiler_messages dlopen executable {
989 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
990 } [add_options_for_dlopen ""]]
993 proc add_options_for_dlopen { flags } {
997 # Return 1 if the target supports clone, 0 otherwise.
998 proc check_effective_target_clone {} {
999 return [check_function_available "clone"]
1002 # Return 1 if the target supports setrlimit, 0 otherwise.
1003 proc check_effective_target_setrlimit {} {
1004 # Darwin has non-posix compliant RLIMIT_AS
1005 if { [istarget *-*-darwin*] } {
1008 return [check_function_available "setrlimit"]
1011 # Return 1 if the target supports gettimeofday, 0 otherwise.
1012 proc check_effective_target_gettimeofday {} {
1013 return [check_function_available "gettimeofday"]
1016 # Return 1 if the target supports swapcontext, 0 otherwise.
1017 proc check_effective_target_swapcontext {} {
1018 return [check_no_compiler_messages swapcontext executable {
1019 #include <ucontext.h>
1022 ucontext_t orig_context,child_context;
1023 if (swapcontext(&child_context, &orig_context) < 0) { }
1028 # Return 1 if compilation with -pthread is error-free for trivial
1029 # code, 0 otherwise.
1031 proc check_effective_target_pthread {} {
1032 return [check_no_compiler_messages pthread object {
1037 # Return 1 if compilation with -gstabs is error-free for trivial
1038 # code, 0 otherwise.
1040 proc check_effective_target_stabs {} {
1041 return [check_no_compiler_messages stabs object {
1046 # Return 1 if compilation with -mpe-aligned-commons is error-free
1047 # for trivial code, 0 otherwise.
1049 proc check_effective_target_pe_aligned_commons {} {
1050 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
1051 return [check_no_compiler_messages pe_aligned_commons object {
1053 } "-mpe-aligned-commons"]
1058 # Return 1 if the target supports -static
1059 proc check_effective_target_static {} {
1060 return [check_no_compiler_messages static executable {
1061 int main (void) { return 0; }
1065 # Return 1 if the target supports -fstack-protector
1066 proc check_effective_target_fstack_protector {} {
1067 return [check_runtime fstack_protector {
1069 int main (int argc, char *argv[]) {
1071 return !strcpy (buf, strrchr (argv[0], '/'));
1073 } "-fstack-protector"]
1076 # Return 1 if the target supports -fstack-check or -fstack-check=$stack_kind
1077 proc check_stack_check_available { stack_kind } {
1078 if [string match "" $stack_kind] then {
1079 set stack_opt "-fstack-check"
1080 } else { set stack_opt "-fstack-check=$stack_kind" }
1082 return [check_no_compiler_messages stack_check_$stack_kind executable {
1083 int main (void) { return 0; }
1087 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
1088 # for trivial code, 0 otherwise. As some targets (ARM for example) only
1089 # warn when -fprofile-use is also supplied we test that combination too.
1091 proc check_effective_target_freorder {} {
1092 if { [check_no_compiler_messages freorder object {
1094 } "-freorder-blocks-and-partition"]
1095 && [check_no_compiler_messages fprofile_use_freorder object {
1097 } "-fprofile-use -freorder-blocks-and-partition -Wno-missing-profile"] } {
1103 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
1104 # emitted, 0 otherwise. Whether a shared library can actually be built is
1105 # out of scope for this test.
1107 proc check_effective_target_fpic { } {
1108 # Note that M68K has a multilib that supports -fpic but not
1109 # -fPIC, so we need to check both. We test with a program that
1110 # requires GOT references.
1111 foreach arg {fpic fPIC} {
1112 if [check_no_compiler_messages $arg object {
1113 extern int foo (void); extern int bar;
1114 int baz (void) { return foo () + bar; }
1122 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
1123 # silently. So, we can't rely on above "check_effective_target_fpic" as it
1124 # assumes compiler will give warning if -fpic not supported. Here we check
1125 # whether binutils supports those new -fpic relocation modifiers, and assume
1126 # -fpic is supported if there is binutils support. GCC configuration will
1127 # enable -fpic for AArch64 in this case.
1129 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1130 # memory model -fpic relocation types.
1132 proc check_effective_target_aarch64_small_fpic { } {
1133 if { [istarget aarch64*-*-*] } {
1134 return [check_no_compiler_messages aarch64_small_fpic object {
1135 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1142 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1143 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1144 # in binutils since 2015-03-04 as PR gas/17843.
1146 # This test directive make sure binutils support all features needed by TLS LE
1147 # under -mtls-size=32 on AArch64.
1149 proc check_effective_target_aarch64_tlsle32 { } {
1150 if { [istarget aarch64*-*-*] } {
1151 return [check_no_compiler_messages aarch64_tlsle32 object {
1152 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1159 # Return 1 if -shared is supported, as in no warnings or errors
1160 # emitted, 0 otherwise.
1162 proc check_effective_target_shared { } {
1163 # Note that M68K has a multilib that supports -fpic but not
1164 # -fPIC, so we need to check both. We test with a program that
1165 # requires GOT references.
1166 return [check_no_compiler_messages shared executable {
1167 extern int foo (void); extern int bar;
1168 int baz (void) { return foo () + bar; }
1172 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1174 proc check_effective_target_pie { } {
1175 if { [istarget *-*-darwin\[912\]*]
1176 || [istarget *-*-dragonfly*]
1177 || [istarget *-*-freebsd*]
1178 || [istarget *-*-linux*]
1179 || [istarget *-*-gnu*] } {
1182 if { [istarget *-*-solaris2.1\[1-9\]*] } {
1183 # Full PIE support was added in Solaris 11.3, but gcc errors out
1184 # if missing, so check for that.
1185 return [check_no_compiler_messages pie executable {
1186 int main (void) { return 0; }
1192 # Return true if the target supports -mpaired-single (as used on MIPS).
1194 proc check_effective_target_mpaired_single { } {
1195 return [check_no_compiler_messages mpaired_single object {
1197 } "-mpaired-single"]
1200 # Return true if the target has access to FPU instructions.
1202 proc check_effective_target_hard_float { } {
1203 if { [istarget mips*-*-*] } {
1204 return [check_no_compiler_messages hard_float assembly {
1205 #if (defined __mips_soft_float || defined __mips16)
1206 #error __mips_soft_float || __mips16
1211 # This proc is actually checking the availabilty of FPU
1212 # support for doubles, so on the RX we must fail if the
1213 # 64-bit double multilib has been selected.
1214 if { [istarget rx-*-*] } {
1216 # return [check_no_compiler_messages hard_float assembly {
1217 #if defined __RX_64_BIT_DOUBLES__
1218 #error __RX_64_BIT_DOUBLES__
1223 # The generic test doesn't work for C-SKY because some cores have
1224 # hard float for single precision only.
1225 if { [istarget csky*-*-*] } {
1226 return [check_no_compiler_messages hard_float assembly {
1227 #if defined __csky_soft_float__
1228 #error __csky_soft_float__
1233 # The generic test equates hard_float with "no call for adding doubles".
1234 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1235 double a (double b, double c) { return b + c; }
1239 # Return true if the target is a 64-bit MIPS target.
1241 proc check_effective_target_mips64 { } {
1242 return [check_no_compiler_messages mips64 assembly {
1249 # Return true if the target is a MIPS target that does not produce
1252 proc check_effective_target_nomips16 { } {
1253 return [check_no_compiler_messages nomips16 object {
1257 /* A cheap way of testing for -mflip-mips16. */
1258 void foo (void) { asm ("addiu $20,$20,1"); }
1259 void bar (void) { asm ("addiu $20,$20,1"); }
1264 # Add the options needed for MIPS16 function attributes. At the moment,
1265 # we don't support MIPS16 PIC.
1267 proc add_options_for_mips16_attribute { flags } {
1268 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1271 # Return true if we can force a mode that allows MIPS16 code generation.
1272 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1275 proc check_effective_target_mips16_attribute { } {
1276 return [check_no_compiler_messages mips16_attribute assembly {
1280 #if defined __mips_hard_float \
1281 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1282 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1283 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1285 } [add_options_for_mips16_attribute ""]]
1288 # Return 1 if the target supports long double larger than double when
1289 # using the new ABI, 0 otherwise.
1291 proc check_effective_target_mips_newabi_large_long_double { } {
1292 return [check_no_compiler_messages mips_newabi_large_long_double object {
1293 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1297 # Return true if the target is a MIPS target that has access
1298 # to the LL and SC instructions.
1300 proc check_effective_target_mips_llsc { } {
1301 if { ![istarget mips*-*-*] } {
1304 # Assume that these instructions are always implemented for
1305 # non-elf* targets, via emulation if necessary.
1306 if { ![istarget *-*-elf*] } {
1309 # Otherwise assume LL/SC support for everything but MIPS I.
1310 return [check_no_compiler_messages mips_llsc assembly {
1317 # Return true if the target is a MIPS target that uses in-place relocations.
1319 proc check_effective_target_mips_rel { } {
1320 if { ![istarget mips*-*-*] } {
1323 return [check_no_compiler_messages mips_rel object {
1324 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1325 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1326 #error _ABIN32 && (_ABIN32 || _ABI64)
1331 # Return true if the target is a MIPS target that uses the EABI.
1333 proc check_effective_target_mips_eabi { } {
1334 if { ![istarget mips*-*-*] } {
1337 return [check_no_compiler_messages mips_eabi object {
1344 # Return 1 if the current multilib does not generate PIC by default.
1346 proc check_effective_target_nonpic { } {
1347 return [check_no_compiler_messages nonpic assembly {
1354 # Return 1 if the current multilib generates PIE by default.
1356 proc check_effective_target_pie_enabled { } {
1357 return [check_no_compiler_messages pie_enabled assembly {
1364 # Return 1 if the target generates -fstack-protector by default.
1366 proc check_effective_target_fstack_protector_enabled {} {
1367 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1368 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1369 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1375 # Return 1 if the target does not use a status wrapper.
1377 proc check_effective_target_unwrapped { } {
1378 if { [target_info needs_status_wrapper] != "" \
1379 && [target_info needs_status_wrapper] != "0" } {
1385 # Return true if iconv is supported on the target. In particular IBM1047.
1387 proc check_iconv_available { test_what } {
1390 # If the tool configuration file has not set libiconv, try "-liconv"
1391 if { ![info exists libiconv] } {
1392 set libiconv "-liconv"
1394 set test_what [lindex $test_what 1]
1395 return [check_runtime_nocache $test_what [subst {
1401 cd = iconv_open ("$test_what", "UTF-8");
1402 if (cd == (iconv_t) -1)
1409 # Return true if the atomic library is supported on the target.
1410 proc check_effective_target_libatomic_available { } {
1411 return [check_no_compiler_messages libatomic_available executable {
1412 int main (void) { return 0; }
1416 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1418 proc check_ascii_locale_available { } {
1422 # Return true if named sections are supported on this target.
1424 proc check_named_sections_available { } {
1425 return [check_no_compiler_messages named_sections assembly {
1426 int __attribute__ ((section("whatever"))) foo;
1430 # Return true if the "naked" function attribute is supported on this target.
1432 proc check_effective_target_naked_functions { } {
1433 return [check_no_compiler_messages naked_functions assembly {
1434 void f() __attribute__((naked));
1438 # Return 1 if the target supports Fortran real kinds larger than real(8),
1441 # When the target name changes, replace the cached result.
1443 proc check_effective_target_fortran_large_real { } {
1444 return [check_no_compiler_messages fortran_large_real executable {
1446 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1453 # Return 1 if the target supports Fortran real kind real(16),
1454 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1455 # this checks for Real(16) only; the other returned real(10) if
1456 # both real(10) and real(16) are available.
1458 # When the target name changes, replace the cached result.
1460 proc check_effective_target_fortran_real_16 { } {
1461 return [check_no_compiler_messages fortran_real_16 executable {
1469 # Return 1 if the target supports Fortran real kind 10,
1470 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1471 # this checks for real(10) only.
1473 # When the target name changes, replace the cached result.
1475 proc check_effective_target_fortran_real_10 { } {
1476 return [check_no_compiler_messages fortran_real_10 executable {
1484 # Return 1 if the target supports Fortran's IEEE modules,
1487 # When the target name changes, replace the cached result.
1489 proc check_effective_target_fortran_ieee { flags } {
1490 return [check_no_compiler_messages fortran_ieee executable {
1492 use, intrinsic :: ieee_features
1498 # Return 1 if the target supports SQRT for the largest floating-point
1499 # type. (Some targets lack the libm support for this FP type.)
1500 # On most targets, this check effectively checks either whether sqrtl is
1501 # available or on __float128 systems whether libquadmath is installed,
1502 # which provides sqrtq.
1504 # When the target name changes, replace the cached result.
1506 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1507 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1509 use iso_fortran_env, only: real_kinds
1510 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1511 real(kind=maxFP), volatile :: x
1519 # Return 1 if the target supports Fortran integer kinds larger than
1520 # integer(8), 0 otherwise.
1522 # When the target name changes, replace the cached result.
1524 proc check_effective_target_fortran_large_int { } {
1525 return [check_no_compiler_messages fortran_large_int executable {
1527 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1528 integer(kind=k) :: i
1533 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1535 # When the target name changes, replace the cached result.
1537 proc check_effective_target_fortran_integer_16 { } {
1538 return [check_no_compiler_messages fortran_integer_16 executable {
1545 # Return 1 if we can statically link libgfortran, 0 otherwise.
1547 # When the target name changes, replace the cached result.
1549 proc check_effective_target_static_libgfortran { } {
1550 return [check_no_compiler_messages static_libgfortran executable {
1557 # Return 1 if we can use the -rdynamic option, 0 otherwise.
1559 proc check_effective_target_rdynamic { } {
1560 return [check_no_compiler_messages rdynamic executable {
1561 int main() { return 0; }
1565 proc check_linker_plugin_available { } {
1566 return [check_no_compiler_messages_nocache linker_plugin executable {
1567 int main() { return 0; }
1568 } "-flto -fuse-linker-plugin"]
1571 # Return 1 if the target OS supports running SSE executables, 0
1572 # otherwise. Cache the result.
1574 proc check_sse_os_support_available { } {
1575 return [check_cached_effective_target sse_os_support_available {
1576 # If this is not the right target then we can skip the test.
1577 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1579 } elseif { [istarget i?86-*-solaris2*] } {
1580 # The Solaris 2 kernel doesn't save and restore SSE registers
1581 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1582 check_runtime_nocache sse_os_support_available {
1585 asm volatile ("movaps %xmm0,%xmm0");
1595 # Return 1 if the target OS supports running AVX executables, 0
1596 # otherwise. Cache the result.
1598 proc check_avx_os_support_available { } {
1599 return [check_cached_effective_target avx_os_support_available {
1600 # If this is not the right target then we can skip the test.
1601 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1604 # Check that OS has AVX and SSE saving enabled.
1605 check_runtime_nocache avx_os_support_available {
1608 unsigned int eax, edx;
1610 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1611 return (eax & 0x06) != 0x06;
1618 # Return 1 if the target OS supports running AVX executables, 0
1619 # otherwise. Cache the result.
1621 proc check_avx512_os_support_available { } {
1622 return [check_cached_effective_target avx512_os_support_available {
1623 # If this is not the right target then we can skip the test.
1624 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1627 # Check that OS has AVX512, AVX and SSE saving enabled.
1628 check_runtime_nocache avx512_os_support_available {
1631 unsigned int eax, edx;
1633 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1634 return (eax & 0xe6) != 0xe6;
1641 # Return 1 if the target supports executing SSE instructions, 0
1642 # otherwise. Cache the result.
1644 proc check_sse_hw_available { } {
1645 return [check_cached_effective_target sse_hw_available {
1646 # If this is not the right target then we can skip the test.
1647 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1650 check_runtime_nocache sse_hw_available {
1654 unsigned int eax, ebx, ecx, edx;
1655 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1658 return !(edx & bit_SSE);
1665 # Return 1 if the target supports executing SSE2 instructions, 0
1666 # otherwise. Cache the result.
1668 proc check_sse2_hw_available { } {
1669 return [check_cached_effective_target sse2_hw_available {
1670 # If this is not the right target then we can skip the test.
1671 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1674 check_runtime_nocache sse2_hw_available {
1678 unsigned int eax, ebx, ecx, edx;
1679 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1682 return !(edx & bit_SSE2);
1689 # Return 1 if the target supports executing SSE4 instructions, 0
1690 # otherwise. Cache the result.
1692 proc check_sse4_hw_available { } {
1693 return [check_cached_effective_target sse4_hw_available {
1694 # If this is not the right target then we can skip the test.
1695 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1698 check_runtime_nocache sse4_hw_available {
1702 unsigned int eax, ebx, ecx, edx;
1703 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1706 return !(ecx & bit_SSE4_2);
1713 # Return 1 if the target supports executing AVX instructions, 0
1714 # otherwise. Cache the result.
1716 proc check_avx_hw_available { } {
1717 return [check_cached_effective_target avx_hw_available {
1718 # If this is not the right target then we can skip the test.
1719 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1722 check_runtime_nocache avx_hw_available {
1726 unsigned int eax, ebx, ecx, edx;
1727 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1730 return ((ecx & (bit_AVX | bit_OSXSAVE))
1731 != (bit_AVX | bit_OSXSAVE));
1738 # Return 1 if the target supports executing AVX2 instructions, 0
1739 # otherwise. Cache the result.
1741 proc check_avx2_hw_available { } {
1742 return [check_cached_effective_target avx2_hw_available {
1743 # If this is not the right target then we can skip the test.
1744 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1747 check_runtime_nocache avx2_hw_available {
1752 unsigned int eax, ebx, ecx, edx;
1754 if (__get_cpuid_max (0, NULL) < 7)
1757 __cpuid (1, eax, ebx, ecx, edx);
1759 if (!(ecx & bit_OSXSAVE))
1762 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1764 return !(ebx & bit_AVX2);
1771 # Return 1 if the target supports executing AVX512 foundation instructions, 0
1772 # otherwise. Cache the result.
1774 proc check_avx512f_hw_available { } {
1775 return [check_cached_effective_target avx512f_hw_available {
1776 # If this is not the right target then we can skip the test.
1777 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1780 check_runtime_nocache avx512f_hw_available {
1785 unsigned int eax, ebx, ecx, edx;
1787 if (__get_cpuid_max (0, NULL) < 7)
1790 __cpuid (1, eax, ebx, ecx, edx);
1792 if (!(ecx & bit_OSXSAVE))
1795 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1797 return !(ebx & bit_AVX512F);
1804 # Return 1 if the target supports running SSE executables, 0 otherwise.
1806 proc check_effective_target_sse_runtime { } {
1807 if { [check_effective_target_sse]
1808 && [check_sse_hw_available]
1809 && [check_sse_os_support_available] } {
1815 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1817 proc check_effective_target_sse2_runtime { } {
1818 if { [check_effective_target_sse2]
1819 && [check_sse2_hw_available]
1820 && [check_sse_os_support_available] } {
1826 # Return 1 if the target supports running SSE4 executables, 0 otherwise.
1828 proc check_effective_target_sse4_runtime { } {
1829 if { [check_effective_target_sse4]
1830 && [check_sse4_hw_available]
1831 && [check_sse_os_support_available] } {
1837 # Return 1 if the target supports running AVX executables, 0 otherwise.
1839 proc check_effective_target_avx_runtime { } {
1840 if { [check_effective_target_avx]
1841 && [check_avx_hw_available]
1842 && [check_avx_os_support_available] } {
1848 # Return 1 if the target supports running AVX2 executables, 0 otherwise.
1850 proc check_effective_target_avx2_runtime { } {
1851 if { [check_effective_target_avx2]
1852 && [check_avx2_hw_available]
1853 && [check_avx_os_support_available] } {
1859 # Return 1 if the target supports running AVX512f executables, 0 otherwise.
1861 proc check_effective_target_avx512f_runtime { } {
1862 if { [check_effective_target_avx512f]
1863 && [check_avx512f_hw_available]
1864 && [check_avx512_os_support_available] } {
1870 # Return 1 if bmi2 instructions can be compiled.
1871 proc check_effective_target_bmi2 { } {
1872 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1875 return [check_no_compiler_messages bmi2 object {
1877 _bzhi_u32 (unsigned int __X, unsigned int __Y)
1879 return __builtin_ia32_bzhi_si (__X, __Y);
1884 # Return 1 if the target supports executing MIPS Paired-Single instructions,
1885 # 0 otherwise. Cache the result.
1887 proc check_mpaired_single_hw_available { } {
1888 return [check_cached_effective_target mpaired_single_hw_available {
1889 # If this is not the right target then we can skip the test.
1890 if { !([istarget mips*-*-*]) } {
1893 check_runtime_nocache mpaired_single_hw_available {
1896 asm volatile ("pll.ps $f2,$f4,$f6");
1904 # Return 1 if the target supports executing Loongson vector instructions,
1905 # 0 otherwise. Cache the result.
1907 proc check_mips_loongson_mmi_hw_available { } {
1908 return [check_cached_effective_target mips_loongson_mmi_hw_available {
1909 # If this is not the right target then we can skip the test.
1910 if { !([istarget mips*-*-*]) } {
1913 check_runtime_nocache mips_loongson_mmi_hw_available {
1914 #include <loongson-mmiintrin.h>
1917 asm volatile ("paddw $f2,$f4,$f6");
1925 # Return 1 if the target supports executing MIPS MSA instructions, 0
1926 # otherwise. Cache the result.
1928 proc check_mips_msa_hw_available { } {
1929 return [check_cached_effective_target mips_msa_hw_available {
1930 # If this is not the right target then we can skip the test.
1931 if { !([istarget mips*-*-*]) } {
1934 check_runtime_nocache mips_msa_hw_available {
1935 #if !defined(__mips_msa)
1936 #error "MSA NOT AVAIL"
1938 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
1939 #error "MSA NOT AVAIL FOR ISA REV < 2"
1941 #if !defined(__mips_hard_float)
1942 #error "MSA HARD_FLOAT REQUIRED"
1944 #if __mips_fpr != 64
1945 #error "MSA 64-bit FPR REQUIRED"
1951 v8i16 v = __builtin_msa_ldi_h (0);
1961 # Return 1 if the target supports running MIPS Paired-Single
1962 # executables, 0 otherwise.
1964 proc check_effective_target_mpaired_single_runtime { } {
1965 if { [check_effective_target_mpaired_single]
1966 && [check_mpaired_single_hw_available] } {
1972 # Return 1 if the target supports running Loongson executables, 0 otherwise.
1974 proc check_effective_target_mips_loongson_mmi_runtime { } {
1975 if { [check_effective_target_mips_loongson_mmi]
1976 && [check_mips_loongson_mmi_hw_available] } {
1982 # Return 1 if the target supports running MIPS MSA executables, 0 otherwise.
1984 proc check_effective_target_mips_msa_runtime { } {
1985 if { [check_effective_target_mips_msa]
1986 && [check_mips_msa_hw_available] } {
1992 # Return 1 if we are compiling for 64-bit PowerPC but we do not use direct
1993 # move instructions for moves from GPR to FPR.
1995 proc check_effective_target_powerpc64_no_dm { } {
1996 # The "mulld" checks if we are generating PowerPC64 code. The "lfd"
1997 # checks if we do not use direct moves, but use the old-fashioned
1998 # slower move-via-the-stack.
1999 return [check_no_messages_and_pattern powerpc64_no_dm \
2000 {\mmulld\M.*\mlfd} assembly {
2001 double f(long long x) { return x*x; }
2005 # Return 1 if the target supports the __builtin_cpu_supports built-in,
2006 # including having a new enough library to support the test. Cache the result.
2007 # Require at least a power7 to run on.
2009 proc check_ppc_cpu_supports_hw_available { } {
2010 return [check_cached_effective_target ppc_cpu_supports_hw_available {
2011 # Some simulators are known to not support VSX/power8 instructions.
2012 # For now, disable on Darwin
2013 if { [istarget powerpc-*-eabi]
2014 || [istarget powerpc*-*-eabispe]
2015 || [istarget *-*-darwin*]} {
2019 check_runtime_nocache ppc_cpu_supports_hw_available {
2023 asm volatile ("xxlor vs0,vs0,vs0");
2025 asm volatile ("xxlor 0,0,0");
2027 if (!__builtin_cpu_supports ("vsx"))
2036 # Return 1 if the target supports executing 750CL paired-single instructions, 0
2037 # otherwise. Cache the result.
2039 proc check_750cl_hw_available { } {
2040 return [check_cached_effective_target 750cl_hw_available {
2041 # If this is not the right target then we can skip the test.
2042 if { ![istarget powerpc-*paired*] } {
2045 check_runtime_nocache 750cl_hw_available {
2049 asm volatile ("ps_mul v0,v0,v0");
2051 asm volatile ("ps_mul 0,0,0");
2060 # Return 1 if the target supports executing power8 vector instructions, 0
2061 # otherwise. Cache the result.
2063 proc check_p8vector_hw_available { } {
2064 return [check_cached_effective_target p8vector_hw_available {
2065 # Some simulators are known to not support VSX/power8 instructions.
2066 # For now, disable on Darwin
2067 if { [istarget powerpc-*-eabi]
2068 || [istarget powerpc*-*-eabispe]
2069 || [istarget *-*-darwin*]} {
2072 set options "-mpower8-vector"
2073 check_runtime_nocache p8vector_hw_available {
2077 asm volatile ("xxlorc vs0,vs0,vs0");
2079 asm volatile ("xxlorc 0,0,0");
2088 # Return 1 if the target supports executing power9 vector instructions, 0
2089 # otherwise. Cache the result.
2091 proc check_p9vector_hw_available { } {
2092 return [check_cached_effective_target p9vector_hw_available {
2093 # Some simulators are known to not support VSX/power8/power9
2094 # instructions. For now, disable on Darwin.
2095 if { [istarget powerpc-*-eabi]
2096 || [istarget powerpc*-*-eabispe]
2097 || [istarget *-*-darwin*]} {
2100 set options "-mpower9-vector"
2101 check_runtime_nocache p9vector_hw_available {
2105 vector double v = (vector double) { 0.0, 0.0 };
2106 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
2114 # Return 1 if the target supports executing power9 modulo instructions, 0
2115 # otherwise. Cache the result.
2117 proc check_p9modulo_hw_available { } {
2118 return [check_cached_effective_target p9modulo_hw_available {
2119 # Some simulators are known to not support VSX/power8/power9
2120 # instructions. For now, disable on Darwin.
2121 if { [istarget powerpc-*-eabi]
2122 || [istarget powerpc*-*-eabispe]
2123 || [istarget *-*-darwin*]} {
2126 set options "-mmodulo"
2127 check_runtime_nocache p9modulo_hw_available {
2130 int i = 5, j = 3, r = -1;
2131 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
2139 # Return 1 if the target supports executing __float128 on PowerPC via software
2140 # emulation, 0 otherwise. Cache the result.
2142 proc check_ppc_float128_sw_available { } {
2143 return [check_cached_effective_target ppc_float128_sw_available {
2144 # Some simulators are known to not support VSX/power8/power9
2145 # instructions. For now, disable on Darwin.
2146 if { [istarget powerpc-*-eabi]
2147 || [istarget powerpc*-*-eabispe]
2148 || [istarget *-*-darwin*]} {
2151 set options "-mfloat128 -mvsx"
2152 check_runtime_nocache ppc_float128_sw_available {
2153 volatile __float128 x = 1.0q;
2154 volatile __float128 y = 2.0q;
2157 __float128 z = x + y;
2165 # Return 1 if the target supports executing __float128 on PowerPC via power9
2166 # hardware instructions, 0 otherwise. Cache the result.
2168 proc check_ppc_float128_hw_available { } {
2169 return [check_cached_effective_target ppc_float128_hw_available {
2170 # Some simulators are known to not support VSX/power8/power9
2171 # instructions. For now, disable on Darwin.
2172 if { [istarget powerpc-*-eabi]
2173 || [istarget powerpc*-*-eabispe]
2174 || [istarget *-*-darwin*]} {
2177 set options "-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
2178 check_runtime_nocache ppc_float128_hw_available {
2179 volatile __float128 x = 1.0q;
2180 volatile __float128 y = 2.0q;
2183 __float128 z = x + y;
2184 __float128 w = -1.0q;
2186 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
2187 return ((z != 3.0q) || (z != w));
2194 # Return 1 if the target supports executing VSX instructions, 0
2195 # otherwise. Cache the result.
2197 proc check_vsx_hw_available { } {
2198 return [check_cached_effective_target vsx_hw_available {
2199 # Some simulators are known to not support VSX instructions.
2200 # For now, disable on Darwin
2201 if { [istarget powerpc-*-eabi]
2202 || [istarget powerpc*-*-eabispe]
2203 || [istarget *-*-darwin*]} {
2207 check_runtime_nocache vsx_hw_available {
2211 asm volatile ("xxlor vs0,vs0,vs0");
2213 asm volatile ("xxlor 0,0,0");
2222 # Return 1 if the target supports executing AltiVec instructions, 0
2223 # otherwise. Cache the result.
2225 proc check_vmx_hw_available { } {
2226 return [check_cached_effective_target vmx_hw_available {
2227 # Some simulators are known to not support VMX instructions.
2228 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
2231 # Most targets don't require special flags for this test case, but
2232 # Darwin does. Just to be sure, make sure VSX is not enabled for
2233 # the altivec tests.
2234 if { [istarget *-*-darwin*]
2235 || [istarget *-*-aix*] } {
2236 set options "-maltivec -mno-vsx"
2238 set options "-mno-vsx"
2240 check_runtime_nocache vmx_hw_available {
2244 asm volatile ("vor v0,v0,v0");
2246 asm volatile ("vor 0,0,0");
2255 proc check_ppc_recip_hw_available { } {
2256 return [check_cached_effective_target ppc_recip_hw_available {
2257 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
2258 # For now, disable on Darwin
2259 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2262 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2263 check_runtime_nocache ppc_recip_hw_available {
2264 volatile double d_recip, d_rsqrt, d_four = 4.0;
2265 volatile float f_recip, f_rsqrt, f_four = 4.0f;
2268 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2269 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2270 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2271 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2279 # Return 1 if the target supports executing AltiVec and Cell PPU
2280 # instructions, 0 otherwise. Cache the result.
2282 proc check_effective_target_cell_hw { } {
2283 return [check_cached_effective_target cell_hw_available {
2284 # Some simulators are known to not support VMX and PPU instructions.
2285 if { [istarget powerpc-*-eabi*] } {
2288 # Most targets don't require special flags for this test
2289 # case, but Darwin and AIX do.
2290 if { [istarget *-*-darwin*]
2291 || [istarget *-*-aix*] } {
2292 set options "-maltivec -mcpu=cell"
2294 set options "-mcpu=cell"
2296 check_runtime_nocache cell_hw_available {
2300 asm volatile ("vor v0,v0,v0");
2301 asm volatile ("lvlx v0,r0,r0");
2303 asm volatile ("vor 0,0,0");
2304 asm volatile ("lvlx 0,0,0");
2313 # Return 1 if the target supports executing 64-bit instructions, 0
2314 # otherwise. Cache the result.
2316 proc check_effective_target_powerpc64 { } {
2317 global powerpc64_available_saved
2320 if [info exists powerpc64_available_saved] {
2321 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2323 set powerpc64_available_saved 0
2325 # Some simulators are known to not support powerpc64 instructions.
2326 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
2327 verbose "check_effective_target_powerpc64 returning 0" 2
2328 return $powerpc64_available_saved
2331 # Set up, compile, and execute a test program containing a 64-bit
2332 # instruction. Include the current process ID in the file
2333 # names to prevent conflicts with invocations for multiple
2338 set f [open $src "w"]
2339 puts $f "int main() {"
2340 puts $f "#ifdef __MACH__"
2341 puts $f " asm volatile (\"extsw r0,r0\");"
2343 puts $f " asm volatile (\"extsw 0,0\");"
2345 puts $f " return 0; }"
2348 set opts "additional_flags=-mcpu=G5"
2350 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
2351 set lines [${tool}_target_compile $src $exe executable "$opts"]
2354 if [string match "" $lines] then {
2355 # No error message, compilation succeeded.
2356 set result [${tool}_load "./$exe" "" ""]
2357 set status [lindex $result 0]
2358 remote_file build delete $exe
2359 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
2361 if { $status == "pass" } then {
2362 set powerpc64_available_saved 1
2365 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
2369 return $powerpc64_available_saved
2372 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
2373 # complex float arguments. This affects gfortran tests that call cabsf
2374 # in libm built by an earlier compiler. Return 0 if libm uses the same
2375 # argument passing as the compiler under test, 1 otherwise.
2377 proc check_effective_target_broken_cplxf_arg { } {
2378 # Skip the work for targets known not to be affected.
2379 if { ![istarget powerpc*-*-linux*] || ![is-effective-target lp64] } {
2383 return [check_cached_effective_target broken_cplxf_arg {
2384 check_runtime_nocache broken_cplxf_arg {
2385 #include <complex.h>
2386 extern void abort (void);
2387 float fabsf (float);
2388 float cabsf (_Complex float);
2395 if (fabsf (f - 5.0) > 0.0001)
2396 /* Yes, it's broken. */
2398 /* All fine, not broken. */
2405 # Return 1 is this is a TI C6X target supporting C67X instructions
2406 proc check_effective_target_ti_c67x { } {
2407 return [check_no_compiler_messages ti_c67x assembly {
2408 #if !defined(_TMS320C6700)
2409 #error !_TMS320C6700
2414 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2415 proc check_effective_target_ti_c64xp { } {
2416 return [check_no_compiler_messages ti_c64xp assembly {
2417 #if !defined(_TMS320C6400_PLUS)
2418 #error !_TMS320C6400_PLUS
2424 proc check_alpha_max_hw_available { } {
2425 return [check_runtime alpha_max_hw_available {
2426 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2430 # Returns true iff the FUNCTION is available on the target system.
2431 # (This is essentially a Tcl implementation of Autoconf's
2434 proc check_function_available { function } {
2435 return [check_no_compiler_messages ${function}_available \
2441 int main () { $function (); }
2445 # Returns true iff "fork" is available on the target system.
2447 proc check_fork_available {} {
2448 return [check_function_available "fork"]
2451 # Returns true iff "mkfifo" is available on the target system.
2453 proc check_mkfifo_available {} {
2454 if { [istarget *-*-cygwin*] } {
2455 # Cygwin has mkfifo, but support is incomplete.
2459 return [check_function_available "mkfifo"]
2462 # Returns true iff "__cxa_atexit" is used on the target system.
2464 proc check_cxa_atexit_available { } {
2465 return [check_cached_effective_target cxa_atexit_available {
2466 if { [istarget hppa*-*-hpux10*] } {
2467 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
2469 } elseif { [istarget *-*-vxworks] } {
2470 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2473 check_runtime_nocache cxa_atexit_available {
2476 static unsigned int count;
2493 Y() { f(); count = 2; }
2502 int main() { return 0; }
2508 proc check_effective_target_objc2 { } {
2509 return [check_no_compiler_messages objc2 object {
2518 proc check_effective_target_next_runtime { } {
2519 return [check_no_compiler_messages objc2 object {
2520 #ifdef __NEXT_RUNTIME__
2523 #error !__NEXT_RUNTIME__
2528 # Return 1 if we're generating code for big-endian memory order.
2530 proc check_effective_target_be { } {
2531 return [check_no_compiler_messages be object {
2532 int dummy[__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__ ? 1 : -1];
2536 # Return 1 if we're generating code for little-endian memory order.
2538 proc check_effective_target_le { } {
2539 return [check_no_compiler_messages le object {
2540 int dummy[__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ ? 1 : -1];
2544 # Return 1 if we're generating 32-bit code using default options, 0
2547 proc check_effective_target_ilp32 { } {
2548 return [check_no_compiler_messages ilp32 object {
2549 int dummy[sizeof (int) == 4
2550 && sizeof (void *) == 4
2551 && sizeof (long) == 4 ? 1 : -1];
2555 # Return 1 if we're generating ia32 code using default options, 0
2558 proc check_effective_target_ia32 { } {
2559 return [check_no_compiler_messages ia32 object {
2560 int dummy[sizeof (int) == 4
2561 && sizeof (void *) == 4
2562 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2566 # Return 1 if we're generating x32 code using default options, 0
2569 proc check_effective_target_x32 { } {
2570 return [check_no_compiler_messages x32 object {
2571 int dummy[sizeof (int) == 4
2572 && sizeof (void *) == 4
2573 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2577 # Return 1 if we're generating 32-bit integers using default
2578 # options, 0 otherwise.
2580 proc check_effective_target_int32 { } {
2581 return [check_no_compiler_messages int32 object {
2582 int dummy[sizeof (int) == 4 ? 1 : -1];
2586 # Return 1 if we're generating 32-bit or larger integers using default
2587 # options, 0 otherwise.
2589 proc check_effective_target_int32plus { } {
2590 return [check_no_compiler_messages int32plus object {
2591 int dummy[sizeof (int) >= 4 ? 1 : -1];
2595 # Return 1 if we're generating 32-bit or larger pointers using default
2596 # options, 0 otherwise.
2598 proc check_effective_target_ptr32plus { } {
2599 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2600 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2601 # cannot really hold a 32-bit address, so we always return false here.
2602 if { [istarget msp430-*-*] } {
2606 return [check_no_compiler_messages ptr32plus object {
2607 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2611 # Return 1 if we support 16-bit or larger array and structure sizes
2612 # using default options, 0 otherwise.
2613 # This implies at least a 20-bit address space, as no targets have an address
2614 # space between 16 and 20 bits.
2616 proc check_effective_target_size20plus { } {
2617 return [check_no_compiler_messages size20plus object {
2622 # Return 1 if we support 24-bit or larger array and structure sizes
2623 # using default options, 0 otherwise.
2624 # This implies at least a 32-bit address space, as no targets have an address
2625 # space between 24 and 32 bits.
2627 proc check_effective_target_size32plus { } {
2628 return [check_no_compiler_messages size32plus object {
2629 char dummy[16777217L];
2633 # Returns 1 if we're generating 16-bit or smaller integers with the
2634 # default options, 0 otherwise.
2636 proc check_effective_target_int16 { } {
2637 return [check_no_compiler_messages int16 object {
2638 int dummy[sizeof (int) < 4 ? 1 : -1];
2642 # Return 1 if we're generating 64-bit code using default options, 0
2645 proc check_effective_target_lp64 { } {
2646 return [check_no_compiler_messages lp64 object {
2647 int dummy[sizeof (int) == 4
2648 && sizeof (void *) == 8
2649 && sizeof (long) == 8 ? 1 : -1];
2653 # Return 1 if we're generating 64-bit code using default llp64 options,
2656 proc check_effective_target_llp64 { } {
2657 return [check_no_compiler_messages llp64 object {
2658 int dummy[sizeof (int) == 4
2659 && sizeof (void *) == 8
2660 && sizeof (long long) == 8
2661 && sizeof (long) == 4 ? 1 : -1];
2665 # Return 1 if long and int have different sizes,
2668 proc check_effective_target_long_neq_int { } {
2669 return [check_no_compiler_messages long_ne_int object {
2670 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2674 # Return 1 if int size is equal to float size,
2677 proc check_effective_target_int_eq_float { } {
2678 return [check_no_compiler_messages int_eq_float object {
2679 int dummy[sizeof (int) >= sizeof (float) ? 1 : -1];
2683 # Return 1 if pointer size is equal to long size,
2686 proc check_effective_target_ptr_eq_long { } {
2687 # sizeof (void *) == 4 for msp430-elf -mlarge which is equal to
2688 # sizeof (long). Avoid false positive.
2689 if { [istarget msp430-*-*] } {
2692 return [check_no_compiler_messages ptr_eq_long object {
2693 int dummy[sizeof (void *) == sizeof (long) ? 1 : -1];
2697 # Return 1 if the target supports long double larger than double,
2700 proc check_effective_target_large_long_double { } {
2701 return [check_no_compiler_messages large_long_double object {
2702 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2706 # Return 1 if the target supports double larger than float,
2709 proc check_effective_target_large_double { } {
2710 return [check_no_compiler_messages large_double object {
2711 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2715 # Return 1 if the target supports long double of 128 bits,
2718 proc check_effective_target_longdouble128 { } {
2719 return [check_no_compiler_messages longdouble128 object {
2720 int dummy[sizeof(long double) == 16 ? 1 : -1];
2724 # Return 1 if the target supports long double of 64 bits,
2727 proc check_effective_target_longdouble64 { } {
2728 return [check_no_compiler_messages longdouble64 object {
2729 int dummy[sizeof(long double) == 8 ? 1 : -1];
2733 # Return 1 if the target supports double of 64 bits,
2736 proc check_effective_target_double64 { } {
2737 return [check_no_compiler_messages double64 object {
2738 int dummy[sizeof(double) == 8 ? 1 : -1];
2742 # Return 1 if the target supports double of at least 64 bits,
2745 proc check_effective_target_double64plus { } {
2746 return [check_no_compiler_messages double64plus object {
2747 int dummy[sizeof(double) >= 8 ? 1 : -1];
2751 # Return 1 if the target supports 'w' suffix on floating constant
2754 proc check_effective_target_has_w_floating_suffix { } {
2756 if [check_effective_target_c++] {
2757 append opts "-std=gnu++03"
2759 return [check_no_compiler_messages w_fp_suffix object {
2764 # Return 1 if the target supports 'q' suffix on floating constant
2767 proc check_effective_target_has_q_floating_suffix { } {
2769 if [check_effective_target_c++] {
2770 append opts "-std=gnu++03"
2772 return [check_no_compiler_messages q_fp_suffix object {
2777 # Return 1 if the target supports the _FloatN / _FloatNx type
2778 # indicated in the function name, 0 otherwise.
2780 proc check_effective_target_float16 {} {
2781 return [check_no_compiler_messages_nocache float16 object {
2783 } [add_options_for_float16 ""]]
2786 proc check_effective_target_float32 {} {
2787 return [check_no_compiler_messages_nocache float32 object {
2789 } [add_options_for_float32 ""]]
2792 proc check_effective_target_float64 {} {
2793 return [check_no_compiler_messages_nocache float64 object {
2795 } [add_options_for_float64 ""]]
2798 proc check_effective_target_float128 {} {
2799 return [check_no_compiler_messages_nocache float128 object {
2801 } [add_options_for_float128 ""]]
2804 proc check_effective_target_float32x {} {
2805 return [check_no_compiler_messages_nocache float32x object {
2807 } [add_options_for_float32x ""]]
2810 proc check_effective_target_float64x {} {
2811 return [check_no_compiler_messages_nocache float64x object {
2813 } [add_options_for_float64x ""]]
2816 proc check_effective_target_float128x {} {
2817 return [check_no_compiler_messages_nocache float128x object {
2819 } [add_options_for_float128x ""]]
2822 # Likewise, but runtime support for any special options used as well
2823 # as compile-time support is required.
2825 proc check_effective_target_float16_runtime {} {
2826 return [check_effective_target_float16]
2829 proc check_effective_target_float32_runtime {} {
2830 return [check_effective_target_float32]
2833 proc check_effective_target_float64_runtime {} {
2834 return [check_effective_target_float64]
2837 proc check_effective_target_float128_runtime {} {
2838 if { ![check_effective_target_float128] } {
2841 if { [istarget powerpc*-*-*] } {
2842 return [check_effective_target_base_quadfloat_support]
2847 proc check_effective_target_float32x_runtime {} {
2848 return [check_effective_target_float32x]
2851 proc check_effective_target_float64x_runtime {} {
2852 if { ![check_effective_target_float64x] } {
2855 if { [istarget powerpc*-*-*] } {
2856 return [check_effective_target_base_quadfloat_support]
2861 proc check_effective_target_float128x_runtime {} {
2862 return [check_effective_target_float128x]
2865 # Return 1 if the target hardware supports any options added for
2866 # _FloatN and _FloatNx types, 0 otherwise.
2868 proc check_effective_target_floatn_nx_runtime {} {
2869 if { [istarget powerpc*-*-aix*] } {
2872 if { [istarget powerpc*-*-*] } {
2873 return [check_effective_target_base_quadfloat_support]
2878 # Add options needed to use the _FloatN / _FloatNx type indicated in
2879 # the function name.
2881 proc add_options_for_float16 { flags } {
2882 if { [istarget arm*-*-*] } {
2883 return "$flags -mfp16-format=ieee"
2888 proc add_options_for_float32 { flags } {
2892 proc add_options_for_float64 { flags } {
2896 proc add_options_for_float128 { flags } {
2897 return [add_options_for___float128 "$flags"]
2900 proc add_options_for_float32x { flags } {
2904 proc add_options_for_float64x { flags } {
2905 return [add_options_for___float128 "$flags"]
2908 proc add_options_for_float128x { flags } {
2912 # Return 1 if the target supports __float128,
2915 proc check_effective_target___float128 { } {
2916 if { [istarget powerpc*-*-*] } {
2917 return [check_ppc_float128_sw_available]
2919 if { [istarget ia64-*-*]
2920 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2926 proc add_options_for___float128 { flags } {
2927 if { [istarget powerpc*-*-*] } {
2928 return "$flags -mfloat128 -mvsx"
2933 # Return 1 if the target supports any special run-time requirements
2934 # for __float128 or _Float128,
2937 proc check_effective_target_base_quadfloat_support { } {
2938 if { [istarget powerpc*-*-*] } {
2939 return [check_vsx_hw_available]
2944 # Return 1 if the target supports all four forms of fused multiply-add
2945 # (fma, fms, fnma, and fnms) for both float and double.
2947 proc check_effective_target_scalar_all_fma { } {
2948 return [istarget aarch64*-*-*]
2951 # Return 1 if the target supports compiling fixed-point,
2954 proc check_effective_target_fixed_point { } {
2955 return [check_no_compiler_messages fixed_point object {
2956 _Sat _Fract x; _Sat _Accum y;
2960 # Return 1 if the target supports compiling decimal floating point,
2963 proc check_effective_target_dfp_nocache { } {
2964 verbose "check_effective_target_dfp_nocache: compiling source" 2
2965 set ret [check_no_compiler_messages_nocache dfp object {
2966 float x __attribute__((mode(DD)));
2968 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2972 proc check_effective_target_dfprt_nocache { } {
2973 return [check_runtime_nocache dfprt {
2974 typedef float d64 __attribute__((mode(DD)));
2975 d64 x = 1.2df, y = 2.3dd, z;
2976 int main () { z = x + y; return 0; }
2980 # Return 1 if the target supports compiling Decimal Floating Point,
2983 # This won't change for different subtargets so cache the result.
2985 proc check_effective_target_dfp { } {
2986 return [check_cached_effective_target dfp {
2987 check_effective_target_dfp_nocache
2991 # Return 1 if the target supports linking and executing Decimal Floating
2992 # Point, 0 otherwise.
2994 # This won't change for different subtargets so cache the result.
2996 proc check_effective_target_dfprt { } {
2997 return [check_cached_effective_target dfprt {
2998 check_effective_target_dfprt_nocache
3002 proc check_effective_target_powerpc_popcntb_ok { } {
3003 return [check_cached_effective_target powerpc_popcntb_ok {
3005 # Disable on Darwin.
3006 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3009 check_runtime_nocache powerpc_popcntb_ok {
3011 volatile int a = 0x12345678;
3014 asm volatile ("popcntb %0,%1" : "=r" (r) : "r" (a));
3022 # Return 1 if the target supports executing DFP hardware instructions,
3023 # 0 otherwise. Cache the result.
3025 proc check_dfp_hw_available { } {
3026 return [check_cached_effective_target dfp_hw_available {
3027 # For now, disable on Darwin
3028 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
3031 check_runtime_nocache dfp_hw_available {
3032 volatile _Decimal64 r;
3033 volatile _Decimal64 a = 4.0DD;
3034 volatile _Decimal64 b = 2.0DD;
3037 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3038 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3039 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3040 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
3043 } "-mcpu=power6 -mhard-float"
3048 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
3050 proc check_effective_target_ucn_nocache { } {
3051 # -std=c99 is only valid for C
3052 if [check_effective_target_c] {
3053 set ucnopts "-std=c99"
3057 verbose "check_effective_target_ucn_nocache: compiling source" 2
3058 set ret [check_no_compiler_messages_nocache ucn object {
3061 verbose "check_effective_target_ucn_nocache: returning $ret" 2
3065 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
3067 # This won't change for different subtargets, so cache the result.
3069 proc check_effective_target_ucn { } {
3070 return [check_cached_effective_target ucn {
3071 check_effective_target_ucn_nocache
3075 # Return 1 if the target needs a command line argument to enable a SIMD
3078 proc check_effective_target_vect_cmdline_needed { } {
3079 global et_vect_cmdline_needed_target_name
3081 if { ![info exists et_vect_cmdline_needed_target_name] } {
3082 set et_vect_cmdline_needed_target_name ""
3085 # If the target has changed since we set the cached value, clear it.
3086 set current_target [current_target_name]
3087 if { $current_target != $et_vect_cmdline_needed_target_name } {
3088 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
3089 set et_vect_cmdline_needed_target_name $current_target
3090 if { [info exists et_vect_cmdline_needed_saved] } {
3091 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
3092 unset et_vect_cmdline_needed_saved
3096 return [check_cached_effective_target vect_cmdline_needed {
3097 if { [istarget alpha*-*-*]
3098 || [istarget ia64-*-*]
3099 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
3100 && ![is-effective-target ia32])
3101 || ([istarget powerpc*-*-*]
3102 && ([check_effective_target_powerpc_spe]
3103 || [check_effective_target_powerpc_altivec]))
3104 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
3105 || [istarget spu-*-*]
3106 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
3107 || [istarget aarch64*-*-*] } {
3114 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
3116 # This won't change for different subtargets so cache the result.
3118 proc check_effective_target_vect_int { } {
3119 return [check_cached_effective_target_indexed vect_int {
3121 [istarget i?86-*-*] || [istarget x86_64-*-*]
3122 || ([istarget powerpc*-*-*]
3123 && ![istarget powerpc-*-linux*paired*])
3124 || [istarget spu-*-*]
3125 || [istarget sparc*-*-*]
3126 || [istarget alpha*-*-*]
3127 || [istarget ia64-*-*]
3128 || [istarget aarch64*-*-*]
3129 || [is-effective-target arm_neon]
3130 || ([istarget mips*-*-*]
3131 && ([et-is-effective-target mips_loongson_mmi]
3132 || [et-is-effective-target mips_msa]))
3133 || ([istarget s390*-*-*]
3134 && [check_effective_target_s390_vx])
3138 # Return 1 if the target supports signed int->float conversion
3141 proc check_effective_target_vect_intfloat_cvt { } {
3142 return [check_cached_effective_target_indexed vect_intfloat_cvt {
3143 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
3144 || ([istarget powerpc*-*-*]
3145 && ![istarget powerpc-*-linux*paired*])
3146 || [is-effective-target arm_neon]
3147 || ([istarget mips*-*-*]
3148 && [et-is-effective-target mips_msa]) }}]
3151 # Return 1 if the target supports signed double->int conversion
3154 proc check_effective_target_vect_doubleint_cvt { } {
3155 return [check_cached_effective_target_indexed vect_doubleint_cvt {
3156 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3157 && [check_no_compiler_messages vect_doubleint_cvt assembly {
3158 #ifdef __tune_atom__
3159 # error No double vectorizer support.
3162 || [istarget aarch64*-*-*]
3163 || [istarget spu-*-*]
3164 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3165 || ([istarget mips*-*-*]
3166 && [et-is-effective-target mips_msa]) }}]
3169 # Return 1 if the target supports signed int->double conversion
3172 proc check_effective_target_vect_intdouble_cvt { } {
3173 return [check_cached_effective_target_indexed vect_intdouble_cvt {
3174 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3175 && [check_no_compiler_messages vect_intdouble_cvt assembly {
3176 #ifdef __tune_atom__
3177 # error No double vectorizer support.
3180 || [istarget aarch64*-*-*]
3181 || [istarget spu-*-*]
3182 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3183 || ([istarget mips*-*-*]
3184 && [et-is-effective-target mips_msa]) }}]
3187 #Return 1 if we're supporting __int128 for target, 0 otherwise.
3189 proc check_effective_target_int128 { } {
3190 return [check_no_compiler_messages int128 object {
3192 #ifndef __SIZEOF_INT128__
3201 # Return 1 if the target supports unsigned int->float conversion
3204 proc check_effective_target_vect_uintfloat_cvt { } {
3205 return [check_cached_effective_target_indexed vect_uintfloat_cvt {
3206 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
3207 || ([istarget powerpc*-*-*]
3208 && ![istarget powerpc-*-linux*paired*])
3209 || [istarget aarch64*-*-*]
3210 || [is-effective-target arm_neon]
3211 || ([istarget mips*-*-*]
3212 && [et-is-effective-target mips_msa]) }}]
3216 # Return 1 if the target supports signed float->int conversion
3219 proc check_effective_target_vect_floatint_cvt { } {
3220 return [check_cached_effective_target_indexed vect_floatint_cvt {
3221 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
3222 || ([istarget powerpc*-*-*]
3223 && ![istarget powerpc-*-linux*paired*])
3224 || [is-effective-target arm_neon]
3225 || ([istarget mips*-*-*]
3226 && [et-is-effective-target mips_msa]) }}]
3229 # Return 1 if the target supports unsigned float->int conversion
3232 proc check_effective_target_vect_floatuint_cvt { } {
3233 return [check_cached_effective_target_indexed vect_floatuint_cvt {
3234 expr { ([istarget powerpc*-*-*]
3235 && ![istarget powerpc-*-linux*paired*])
3236 || [is-effective-target arm_neon]
3237 || ([istarget mips*-*-*]
3238 && [et-is-effective-target mips_msa]) }}]
3241 # Return 1 if peeling for alignment might be profitable on the target
3244 proc check_effective_target_vect_peeling_profitable { } {
3245 return [check_cached_effective_target_indexed vect_peeling_profitable {
3246 expr { ([istarget s390*-*-*]
3247 && [check_effective_target_s390_vx])
3248 || [check_effective_target_vect_element_align_preferred] }}]
3251 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
3253 # This won't change for different subtargets so cache the result.
3255 proc check_effective_target_vect_simd_clones { } {
3256 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx,
3257 # avx2 and avx512f clone. Only the right clone for the
3258 # specified arch will be chosen, but still we need to at least
3259 # be able to assemble avx512f.
3260 return [check_cached_effective_target_indexed vect_simd_clones {
3261 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3262 && [check_effective_target_avx512f]) }}]
3265 # Return 1 if this is a AArch64 target supporting big endian
3266 proc check_effective_target_aarch64_big_endian { } {
3267 return [check_no_compiler_messages aarch64_big_endian assembly {
3268 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
3269 #error !__aarch64__ || !__AARCH64EB__
3274 # Return 1 if this is a AArch64 target supporting little endian
3275 proc check_effective_target_aarch64_little_endian { } {
3276 if { ![istarget aarch64*-*-*] } {
3280 return [check_no_compiler_messages aarch64_little_endian assembly {
3281 #if !defined(__aarch64__) || defined(__AARCH64EB__)
3287 # Return 1 if this is an AArch64 target supporting SVE.
3288 proc check_effective_target_aarch64_sve { } {
3289 if { ![istarget aarch64*-*-*] } {
3292 return [check_no_compiler_messages aarch64_sve assembly {
3293 #if !defined (__ARM_FEATURE_SVE)
3299 # Return the size in bits of an SVE vector, or 0 if the size is variable.
3300 proc aarch64_sve_bits { } {
3301 return [check_cached_effective_target aarch64_sve_bits {
3304 set src dummy[pid].c
3305 set f [open $src "w"]
3306 puts $f "int bits = __ARM_FEATURE_SVE_BITS;"
3308 set output [${tool}_target_compile $src "" preprocess ""]
3311 regsub {.*bits = ([^;]*);.*} $output {\1} bits
3316 # Return 1 if this is a compiler supporting ARC atomic operations
3317 proc check_effective_target_arc_atomic { } {
3318 return [check_no_compiler_messages arc_atomic assembly {
3319 #if !defined(__ARC_ATOMIC__)
3325 # Return 1 if this is an arm target using 32-bit instructions
3326 proc check_effective_target_arm32 { } {
3327 if { ![istarget arm*-*-*] } {
3331 return [check_no_compiler_messages arm32 assembly {
3332 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
3333 #error !__arm || __thumb__ && !__thumb2__
3338 # Return 1 if this is an arm target not using Thumb
3339 proc check_effective_target_arm_nothumb { } {
3340 if { ![istarget arm*-*-*] } {
3344 return [check_no_compiler_messages arm_nothumb assembly {
3345 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
3346 #error !__arm__ || __thumb || __thumb2__
3351 # Return 1 if this is a little-endian ARM target
3352 proc check_effective_target_arm_little_endian { } {
3353 if { ![istarget arm*-*-*] } {
3357 return [check_no_compiler_messages arm_little_endian assembly {
3358 #if !defined(__arm__) || !defined(__ARMEL__)
3359 #error !__arm__ || !__ARMEL__
3364 # Return 1 if this is an ARM target that only supports aligned vector accesses
3365 proc check_effective_target_arm_vect_no_misalign { } {
3366 if { ![istarget arm*-*-*] } {
3370 return [check_no_compiler_messages arm_vect_no_misalign assembly {
3371 #if !defined(__arm__) \
3372 || (defined(__ARM_FEATURE_UNALIGNED) \
3373 && defined(__ARMEL__))
3374 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
3380 # Return 1 if this is an ARM target supporting -mfloat-abi=soft. Some
3381 # multilibs may be incompatible with this option.
3383 proc check_effective_target_arm_soft_ok { } {
3384 if { [check_effective_target_arm32] } {
3385 return [check_no_compiler_messages arm_soft_ok executable {
3386 int main() { return 0;}
3387 } "-mfloat-abi=soft"]
3393 # Return 1 if this is an ARM target supporting -mfpu=vfp
3394 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
3397 proc check_effective_target_arm_vfp_ok { } {
3398 if { [check_effective_target_arm32] } {
3399 return [check_no_compiler_messages arm_vfp_ok object {
3401 } "-mfpu=vfp -mfloat-abi=softfp"]
3407 # Return 1 if this is an ARM target supporting -mfpu=vfp3
3408 # -mfloat-abi=softfp.
3410 proc check_effective_target_arm_vfp3_ok { } {
3411 if { [check_effective_target_arm32] } {
3412 return [check_no_compiler_messages arm_vfp3_ok object {
3414 } "-mfpu=vfp3 -mfloat-abi=softfp"]
3420 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
3421 # -mfloat-abi=softfp.
3422 proc check_effective_target_arm_v8_vfp_ok {} {
3423 if { [check_effective_target_arm32] } {
3424 return [check_no_compiler_messages arm_v8_vfp_ok object {
3427 __asm__ volatile ("vrinta.f32.f32 s0, s0");
3430 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
3436 # Return 1 if this is an ARM target supporting -mfpu=vfp
3437 # -mfloat-abi=hard. Some multilibs may be incompatible with these
3440 proc check_effective_target_arm_hard_vfp_ok { } {
3441 if { [check_effective_target_arm32]
3442 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
3443 return [check_no_compiler_messages arm_hard_vfp_ok executable {
3444 int main() { return 0;}
3445 } "-mfpu=vfp -mfloat-abi=hard"]
3451 # Return 1 if this is an ARM target defining __ARM_FP. We may need
3452 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3453 # incompatible with these options. Also set et_arm_fp_flags to the
3454 # best options to add.
3456 proc check_effective_target_arm_fp_ok_nocache { } {
3457 global et_arm_fp_flags
3458 set et_arm_fp_flags ""
3459 if { [check_effective_target_arm32] } {
3460 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
3461 if { [check_no_compiler_messages_nocache arm_fp_ok object {
3463 #error __ARM_FP not defined
3466 set et_arm_fp_flags $flags
3475 proc check_effective_target_arm_fp_ok { } {
3476 return [check_cached_effective_target arm_fp_ok \
3477 check_effective_target_arm_fp_ok_nocache]
3480 # Add the options needed to define __ARM_FP. We need either
3481 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3482 # specified by the multilib, use it.
3484 proc add_options_for_arm_fp { flags } {
3485 if { ! [check_effective_target_arm_fp_ok] } {
3488 global et_arm_fp_flags
3489 return "$flags $et_arm_fp_flags"
3492 # Return 1 if this is an ARM target that supports DSP multiply with
3493 # current multilib flags.
3495 proc check_effective_target_arm_dsp { } {
3496 return [check_no_compiler_messages arm_dsp assembly {
3497 #ifndef __ARM_FEATURE_DSP
3504 # Return 1 if this is an ARM target that supports unaligned word/halfword
3505 # load/store instructions.
3507 proc check_effective_target_arm_unaligned { } {
3508 return [check_no_compiler_messages arm_unaligned assembly {
3509 #ifndef __ARM_FEATURE_UNALIGNED
3510 #error no unaligned support
3516 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3517 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3518 # incompatible with these options. Also set et_arm_crypto_flags to the
3519 # best options to add.
3521 proc check_effective_target_arm_crypto_ok_nocache { } {
3522 global et_arm_crypto_flags
3523 set et_arm_crypto_flags ""
3524 if { [check_effective_target_arm_v8_neon_ok] } {
3525 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
3526 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
3527 #include "arm_neon.h"
3529 foo (uint8x16_t a, uint8x16_t b)
3531 return vaeseq_u8 (a, b);
3534 set et_arm_crypto_flags $flags
3543 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3545 proc check_effective_target_arm_crypto_ok { } {
3546 return [check_cached_effective_target arm_crypto_ok \
3547 check_effective_target_arm_crypto_ok_nocache]
3550 # Add options for crypto extensions.
3551 proc add_options_for_arm_crypto { flags } {
3552 if { ! [check_effective_target_arm_crypto_ok] } {
3555 global et_arm_crypto_flags
3556 return "$flags $et_arm_crypto_flags"
3559 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3560 # or -mfloat-abi=hard, but if one is already specified by the
3561 # multilib, use it. Similarly, if a -mfpu option already enables
3562 # NEON, do not add -mfpu=neon.
3564 proc add_options_for_arm_neon { flags } {
3565 if { ! [check_effective_target_arm_neon_ok] } {
3568 global et_arm_neon_flags
3569 return "$flags $et_arm_neon_flags"
3572 proc add_options_for_arm_v8_vfp { flags } {
3573 if { ! [check_effective_target_arm_v8_vfp_ok] } {
3576 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
3579 proc add_options_for_arm_v8_neon { flags } {
3580 if { ! [check_effective_target_arm_v8_neon_ok] } {
3583 global et_arm_v8_neon_flags
3584 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
3587 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
3588 # options for AArch64 and for ARM.
3590 proc add_options_for_arm_v8_1a_neon { flags } {
3591 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
3594 global et_arm_v8_1a_neon_flags
3595 return "$flags $et_arm_v8_1a_neon_flags"
3598 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
3599 # Also adds the ARMv8 FP options for ARM and for AArch64.
3601 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
3602 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
3605 global et_arm_v8_2a_fp16_scalar_flags
3606 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
3609 # Add the options needed for ARMv8.2 with the FP16 extension. Also adds
3610 # the ARMv8 NEON options for ARM and for AArch64.
3612 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
3613 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
3616 global et_arm_v8_2a_fp16_neon_flags
3617 return "$flags $et_arm_v8_2a_fp16_neon_flags"
3620 proc add_options_for_arm_crc { flags } {
3621 if { ! [check_effective_target_arm_crc_ok] } {
3624 global et_arm_crc_flags
3625 return "$flags $et_arm_crc_flags"
3628 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3629 # or -mfloat-abi=hard, but if one is already specified by the
3630 # multilib, use it. Similarly, if a -mfpu option already enables
3631 # NEON, do not add -mfpu=neon.
3633 proc add_options_for_arm_neonv2 { flags } {
3634 if { ! [check_effective_target_arm_neonv2_ok] } {
3637 global et_arm_neonv2_flags
3638 return "$flags $et_arm_neonv2_flags"
3641 # Add the options needed for vfp3.
3642 proc add_options_for_arm_vfp3 { flags } {
3643 if { ! [check_effective_target_arm_vfp3_ok] } {
3646 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
3649 # Return 1 if this is an ARM target supporting -mfpu=neon
3650 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3651 # incompatible with these options. Also set et_arm_neon_flags to the
3652 # best options to add.
3654 proc check_effective_target_arm_neon_ok_nocache { } {
3655 global et_arm_neon_flags
3656 set et_arm_neon_flags ""
3657 if { [check_effective_target_arm32] } {
3658 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a" "-mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard -march=armv7-a"} {
3659 if { [check_no_compiler_messages_nocache arm_neon_ok object {
3660 #include <arm_neon.h>
3662 #ifndef __ARM_NEON__
3665 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3666 configured for -mcpu=arm926ej-s, for example. */
3667 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
3668 #error Architecture does not support NEON.
3671 set et_arm_neon_flags $flags
3680 proc check_effective_target_arm_neon_ok { } {
3681 return [check_cached_effective_target arm_neon_ok \
3682 check_effective_target_arm_neon_ok_nocache]
3685 # Return 1 if this is an ARM target supporting -mfpu=neon without any
3686 # -mfloat-abi= option. Useful in tests where add_options is not
3687 # supported (such as lto tests).
3689 proc check_effective_target_arm_neon_ok_no_float_abi_nocache { } {
3690 if { [check_effective_target_arm32] } {
3691 foreach flags {"-mfpu=neon"} {
3692 if { [check_no_compiler_messages_nocache arm_neon_ok_no_float_abi object {
3693 #include <arm_neon.h>
3695 #ifndef __ARM_NEON__
3698 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3699 configured for -mcpu=arm926ej-s, for example. */
3700 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
3701 #error Architecture does not support NEON.
3712 proc check_effective_target_arm_neon_ok_no_float_abi { } {
3713 return [check_cached_effective_target arm_neon_ok_no_float_abi \
3714 check_effective_target_arm_neon_ok_no_float_abi_nocache]
3717 proc check_effective_target_arm_crc_ok_nocache { } {
3718 global et_arm_crc_flags
3719 set et_arm_crc_flags "-march=armv8-a+crc"
3720 return [check_no_compiler_messages_nocache arm_crc_ok object {
3721 #if !defined (__ARM_FEATURE_CRC32)
3724 } "$et_arm_crc_flags"]
3727 proc check_effective_target_arm_crc_ok { } {
3728 return [check_cached_effective_target arm_crc_ok \
3729 check_effective_target_arm_crc_ok_nocache]
3732 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
3733 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3734 # incompatible with these options. Also set et_arm_neon_fp16_flags to
3735 # the best options to add.
3737 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
3738 global et_arm_neon_fp16_flags
3739 global et_arm_neon_flags
3740 set et_arm_neon_fp16_flags ""
3741 if { [check_effective_target_arm32]
3742 && [check_effective_target_arm_neon_ok] } {
3743 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3744 "-mfpu=neon-fp16 -mfloat-abi=softfp"
3745 "-mfp16-format=ieee"
3746 "-mfloat-abi=softfp -mfp16-format=ieee"
3747 "-mfpu=neon-fp16 -mfp16-format=ieee"
3748 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
3749 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
3750 #include "arm_neon.h"
3752 foo (float32x4_t arg)
3754 return vcvt_f16_f32 (arg);
3756 } "$et_arm_neon_flags $flags"] } {
3757 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
3766 proc check_effective_target_arm_neon_fp16_ok { } {
3767 return [check_cached_effective_target arm_neon_fp16_ok \
3768 check_effective_target_arm_neon_fp16_ok_nocache]
3771 proc check_effective_target_arm_neon_fp16_hw { } {
3772 if {! [check_effective_target_arm_neon_fp16_ok] } {
3775 global et_arm_neon_fp16_flags
3776 check_runtime_nocache arm_neon_fp16_hw {
3778 main (int argc, char **argv)
3780 asm ("vcvt.f32.f16 q1, d0");
3783 } $et_arm_neon_fp16_flags
3786 proc add_options_for_arm_neon_fp16 { flags } {
3787 if { ! [check_effective_target_arm_neon_fp16_ok] } {
3790 global et_arm_neon_fp16_flags
3791 return "$flags $et_arm_neon_fp16_flags"
3794 # Return 1 if this is an ARM target supporting the FP16 alternative
3795 # format. Some multilibs may be incompatible with the options needed. Also
3796 # set et_arm_neon_fp16_flags to the best options to add.
3798 proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
3799 global et_arm_neon_fp16_flags
3800 set et_arm_neon_fp16_flags ""
3801 if { [check_effective_target_arm32] } {
3802 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3803 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3804 if { [check_no_compiler_messages_nocache \
3805 arm_fp16_alternative_ok object {
3806 #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3807 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
3809 } "$flags -mfp16-format=alternative"] } {
3810 set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
3819 proc check_effective_target_arm_fp16_alternative_ok { } {
3820 return [check_cached_effective_target arm_fp16_alternative_ok \
3821 check_effective_target_arm_fp16_alternative_ok_nocache]
3824 # Return 1 if this is an ARM target supports specifying the FP16 none
3825 # format. Some multilibs may be incompatible with the options needed.
3827 proc check_effective_target_arm_fp16_none_ok_nocache { } {
3828 if { [check_effective_target_arm32] } {
3829 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3830 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3831 if { [check_no_compiler_messages_nocache \
3832 arm_fp16_none_ok object {
3833 #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3834 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
3836 #if defined (__ARM_FP16_FORMAT_IEEE)
3837 #error __ARM_FP16_FORMAT_IEEE defined
3839 } "$flags -mfp16-format=none"] } {
3848 proc check_effective_target_arm_fp16_none_ok { } {
3849 return [check_cached_effective_target arm_fp16_none_ok \
3850 check_effective_target_arm_fp16_none_ok_nocache]
3853 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
3854 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3855 # incompatible with these options. Also set et_arm_v8_neon_flags to the
3856 # best options to add.
3858 proc check_effective_target_arm_v8_neon_ok_nocache { } {
3859 global et_arm_v8_neon_flags
3860 set et_arm_v8_neon_flags ""
3861 if { [check_effective_target_arm32] } {
3862 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3863 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
3865 #error not armv8 or later
3867 #include "arm_neon.h"
3871 __asm__ volatile ("vrintn.f32 q0, q0");
3873 } "$flags -march=armv8-a"] } {
3874 set et_arm_v8_neon_flags $flags
3883 proc check_effective_target_arm_v8_neon_ok { } {
3884 return [check_cached_effective_target arm_v8_neon_ok \
3885 check_effective_target_arm_v8_neon_ok_nocache]
3888 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3889 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3890 # incompatible with these options. Also set et_arm_neonv2_flags to the
3891 # best options to add.
3893 proc check_effective_target_arm_neonv2_ok_nocache { } {
3894 global et_arm_neonv2_flags
3895 global et_arm_neon_flags
3896 set et_arm_neonv2_flags ""
3897 if { [check_effective_target_arm32]
3898 && [check_effective_target_arm_neon_ok] } {
3899 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3900 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3901 #include "arm_neon.h"
3903 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3905 return vfma_f32 (a, b, c);
3907 } "$et_arm_neon_flags $flags"] } {
3908 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
3917 proc check_effective_target_arm_neonv2_ok { } {
3918 return [check_cached_effective_target arm_neonv2_ok \
3919 check_effective_target_arm_neonv2_ok_nocache]
3922 # Add the options needed for VFP FP16 support. We need either
3923 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
3924 # the multilib, use it.
3926 proc add_options_for_arm_fp16 { flags } {
3927 if { ! [check_effective_target_arm_fp16_ok] } {
3930 global et_arm_fp16_flags
3931 return "$flags $et_arm_fp16_flags"
3934 # Add the options needed to enable support for IEEE format
3935 # half-precision support. This is valid for ARM targets.
3937 proc add_options_for_arm_fp16_ieee { flags } {
3938 if { ! [check_effective_target_arm_fp16_ok] } {
3941 global et_arm_fp16_flags
3942 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
3945 # Add the options needed to enable support for ARM Alternative format
3946 # half-precision support. This is valid for ARM targets.
3948 proc add_options_for_arm_fp16_alternative { flags } {
3949 if { ! [check_effective_target_arm_fp16_ok] } {
3952 global et_arm_fp16_flags
3953 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
3956 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
3957 # Skip multilibs that are incompatible with these options and set
3958 # et_arm_fp16_flags to the best options to add. This test is valid for
3961 proc check_effective_target_arm_fp16_ok_nocache { } {
3962 global et_arm_fp16_flags
3963 set et_arm_fp16_flags ""
3964 if { ! [check_effective_target_arm32] } {
3968 [list "" { *-*-* } { "-mfpu=*" } \
3969 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
3970 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
3971 # Multilib flags would override -mfpu.
3974 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
3975 # Must generate floating-point instructions.
3978 if [check_effective_target_arm_hf_eabi] {
3979 # Use existing float-abi and force an fpu which supports fp16
3980 set et_arm_fp16_flags "-mfpu=vfpv4"
3983 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
3984 # The existing -mfpu value is OK; use it, but add softfp.
3985 set et_arm_fp16_flags "-mfloat-abi=softfp"
3988 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
3989 # macro to check for this support.
3990 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
3991 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
3994 set et_arm_fp16_flags "$flags"
4001 proc check_effective_target_arm_fp16_ok { } {
4002 return [check_cached_effective_target arm_fp16_ok \
4003 check_effective_target_arm_fp16_ok_nocache]
4006 # Return 1 if the target supports executing VFP FP16 instructions, 0
4007 # otherwise. This test is valid for ARM only.
4009 proc check_effective_target_arm_fp16_hw { } {
4010 if {! [check_effective_target_arm_fp16_ok] } {
4013 global et_arm_fp16_flags
4014 check_runtime_nocache arm_fp16_hw {
4016 main (int argc, char **argv)
4020 asm ("vcvtb.f32.f16 %0, %1"
4021 : "=w" (r) : "w" (a)
4022 : /* No clobbers. */);
4023 return (r == 1.0) ? 0 : 1;
4025 } "$et_arm_fp16_flags -mfp16-format=ieee"
4028 # Creates a series of routines that return 1 if the given architecture
4029 # can be selected and a routine to give the flags to select that architecture
4030 # Note: Extra flags may be added to disable options from newer compilers
4031 # (Thumb in particular - but others may be added in the future).
4032 # Warning: Do not use check_effective_target_arm_arch_*_ok for architecture
4033 # extension (eg. ARMv8.1-A) since there is no macro defined for them. See
4034 # how only __ARM_ARCH_8A__ is checked for ARMv8.1-A.
4035 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
4036 # /* { dg-add-options arm_arch_v5t } */
4037 # /* { dg-require-effective-target arm_arch_v5t_multilib } */
4038 foreach { armfunc armflag armdefs } {
4039 v4 "-march=armv4 -marm" __ARM_ARCH_4__
4040 v4t "-march=armv4t" __ARM_ARCH_4T__
4041 v5t "-march=armv5t" __ARM_ARCH_5T__
4042 v5te "-march=armv5te" __ARM_ARCH_5TE__
4043 v6 "-march=armv6" __ARM_ARCH_6__
4044 v6k "-march=armv6k" __ARM_ARCH_6K__
4045 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
4046 v6z "-march=armv6z" __ARM_ARCH_6Z__
4047 v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
4048 v7a "-march=armv7-a" __ARM_ARCH_7A__
4049 v7r "-march=armv7-r" __ARM_ARCH_7R__
4050 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
4051 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
4052 v7ve "-march=armv7ve -marm"
4053 "__ARM_ARCH_7A__ && __ARM_FEATURE_IDIV"
4054 v8a "-march=armv8-a" __ARM_ARCH_8A__
4055 v8_1a "-march=armv8.1-a" __ARM_ARCH_8A__
4056 v8_2a "-march=armv8.2-a" __ARM_ARCH_8A__
4057 v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft"
4058 __ARM_ARCH_8M_BASE__
4059 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
4060 v8r "-march=armv8-r" __ARM_ARCH_8R__ } {
4061 eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
4062 proc check_effective_target_arm_arch_FUNC_ok { } {
4063 if { [ string match "*-marm*" "FLAG" ] &&
4064 ![check_effective_target_arm_arm_ok] } {
4067 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
4079 proc add_options_for_arm_arch_FUNC { flags } {
4080 return "$flags FLAG"
4083 proc check_effective_target_arm_arch_FUNC_multilib { } {
4084 return [check_runtime arm_arch_FUNC_multilib {
4090 } [add_options_for_arm_arch_FUNC ""]]
4095 # Return 1 if GCC was configured with --with-mode=
4096 proc check_effective_target_default_mode { } {
4098 return [check_configured_with "with-mode="]
4101 # Return 1 if this is an ARM target where -marm causes ARM to be
4104 proc check_effective_target_arm_arm_ok { } {
4105 return [check_no_compiler_messages arm_arm_ok assembly {
4106 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
4107 #error !__arm__ || __thumb__ || __thumb2__
4113 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
4116 proc check_effective_target_arm_thumb1_ok { } {
4117 return [check_no_compiler_messages arm_thumb1_ok assembly {
4118 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4119 #error !__arm__ || !__thumb__ || __thumb2__
4121 int foo (int i) { return i; }
4125 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
4128 proc check_effective_target_arm_thumb2_ok { } {
4129 return [check_no_compiler_messages arm_thumb2_ok assembly {
4130 #if !defined(__thumb2__)
4133 int foo (int i) { return i; }
4137 # Return 1 if this is an ARM target where Thumb-1 is used without options
4138 # added by the test.
4140 proc check_effective_target_arm_thumb1 { } {
4141 return [check_no_compiler_messages arm_thumb1 assembly {
4142 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4143 #error !__arm__ || !__thumb__ || __thumb2__
4149 # Return 1 if this is an ARM target where Thumb-2 is used without options
4150 # added by the test.
4152 proc check_effective_target_arm_thumb2 { } {
4153 return [check_no_compiler_messages arm_thumb2 assembly {
4154 #if !defined(__thumb2__)
4161 # Return 1 if this is an ARM target where conditional execution is available.
4163 proc check_effective_target_arm_cond_exec { } {
4164 return [check_no_compiler_messages arm_cond_exec assembly {
4165 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
4172 # Return 1 if this is an ARM cortex-M profile cpu
4174 proc check_effective_target_arm_cortex_m { } {
4175 if { ![istarget arm*-*-*] } {
4178 return [check_no_compiler_messages arm_cortex_m assembly {
4179 #if defined(__ARM_ARCH_ISA_ARM)
4180 #error __ARM_ARCH_ISA_ARM is defined
4186 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4187 # used and MOVT/MOVW instructions to be available.
4189 proc check_effective_target_arm_thumb1_movt_ok {} {
4190 if [check_effective_target_arm_thumb1_ok] {
4191 return [check_no_compiler_messages arm_movt object {
4195 asm ("movt r0, #42");
4203 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4204 # used and CBZ and CBNZ instructions are available.
4206 proc check_effective_target_arm_thumb1_cbz_ok {} {
4207 if [check_effective_target_arm_thumb1_ok] {
4208 return [check_no_compiler_messages arm_movt object {
4212 asm ("cbz r0, 2f\n2:");
4220 # Return 1 if this is an ARM target where ARMv8-M Security Extensions is
4223 proc check_effective_target_arm_cmse_ok {} {
4224 return [check_no_compiler_messages arm_cmse object {
4233 # Return 1 if this compilation turns on string_ops_prefer_neon on.
4235 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
4236 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
4237 int foo (void) { return 0; }
4238 } "-O2 -mprint-tune-info" ]
4241 # Return 1 if the target supports executing NEON instructions, 0
4242 # otherwise. Cache the result.
4244 proc check_effective_target_arm_neon_hw { } {
4245 return [check_runtime arm_neon_hw_available {
4249 long long a = 0, b = 1;
4250 asm ("vorr %P0, %P1, %P2"
4252 : "0" (a), "w" (b));
4255 } [add_options_for_arm_neon ""]]
4258 # Return true if this is an AArch64 target that can run SVE code.
4260 proc check_effective_target_aarch64_sve_hw { } {
4261 if { ![istarget aarch64*-*-*] } {
4264 return [check_runtime aarch64_sve_hw_available {
4268 asm volatile ("ptrue p0.b");
4274 # Return true if this is an AArch64 target that can run SVE code and
4275 # if its SVE vectors have exactly BITS bits.
4277 proc aarch64_sve_hw_bits { bits } {
4278 if { ![check_effective_target_aarch64_sve_hw] } {
4281 return [check_runtime aarch64_sve${bits}_hw [subst {
4286 asm volatile ("cntd %0" : "=r" (res));
4287 if (res * 64 != $bits)
4294 # Return true if this is an AArch64 target that can run SVE code and
4295 # if its SVE vectors have exactly 256 bits.
4297 proc check_effective_target_aarch64_sve256_hw { } {
4298 return [aarch64_sve_hw_bits 256]
4301 proc check_effective_target_arm_neonv2_hw { } {
4302 return [check_runtime arm_neon_hwv2_available {
4303 #include "arm_neon.h"
4307 float32x2_t a, b, c;
4308 asm ("vfma.f32 %P0, %P1, %P2"
4310 : "w" (b), "w" (c));
4313 } [add_options_for_arm_neonv2 ""]]
4316 # ID_AA64PFR1_EL1.BT using bits[3:0] == 1 implies BTI implimented.
4317 proc check_effective_target_aarch64_bti_hw { } {
4318 if { ![istarget aarch64*-*-*] } {
4321 return [check_runtime aarch64_bti_hw_available {
4326 asm volatile ("mrs %0, id_aa64pfr1_el1" : "=r" (a));
4327 return !((a & 0xf) == 1);
4332 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
4333 # otherwise. The test is valid for AArch64 and ARM. Record the command
4334 # line options needed.
4336 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
4337 global et_arm_v8_1a_neon_flags
4338 set et_arm_v8_1a_neon_flags ""
4340 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4344 # Iterate through sets of options to find the compiler flags that
4345 # need to be added to the -march option. Start with the empty set
4346 # since AArch64 only needs the -march setting.
4347 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4348 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4349 foreach arches { "-march=armv8-a+rdma" "-march=armv8.1-a" } {
4350 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
4351 #if !defined (__ARM_FEATURE_QRDMX)
4352 #error "__ARM_FEATURE_QRDMX not defined"
4354 } "$flags $arches"] } {
4355 set et_arm_v8_1a_neon_flags "$flags $arches"
4364 proc check_effective_target_arm_v8_1a_neon_ok { } {
4365 return [check_cached_effective_target arm_v8_1a_neon_ok \
4366 check_effective_target_arm_v8_1a_neon_ok_nocache]
4369 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
4370 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4371 # Record the command line options needed.
4373 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
4374 global et_arm_v8_2a_fp16_scalar_flags
4375 set et_arm_v8_2a_fp16_scalar_flags ""
4377 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4381 # Iterate through sets of options to find the compiler flags that
4382 # need to be added to the -march option.
4383 foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
4384 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
4385 if { [check_no_compiler_messages_nocache \
4386 arm_v8_2a_fp16_scalar_ok object {
4387 #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC)
4388 #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
4390 } "$flags -march=armv8.2-a+fp16"] } {
4391 set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16"
4399 proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
4400 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
4401 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache]
4404 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
4405 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4406 # Record the command line options needed.
4408 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
4409 global et_arm_v8_2a_fp16_neon_flags
4410 set et_arm_v8_2a_fp16_neon_flags ""
4412 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4416 # Iterate through sets of options to find the compiler flags that
4417 # need to be added to the -march option.
4418 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4419 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4420 if { [check_no_compiler_messages_nocache \
4421 arm_v8_2a_fp16_neon_ok object {
4422 #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
4423 #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
4425 } "$flags -march=armv8.2-a+fp16"] } {
4426 set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16"
4434 proc check_effective_target_arm_v8_2a_fp16_neon_ok { } {
4435 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
4436 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache]
4439 # Return 1 if the target supports ARMv8.2 Adv.SIMD Dot Product
4440 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4441 # Record the command line options needed.
4443 proc check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache { } {
4444 global et_arm_v8_2a_dotprod_neon_flags
4445 set et_arm_v8_2a_dotprod_neon_flags ""
4447 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4451 # Iterate through sets of options to find the compiler flags that
4452 # need to be added to the -march option.
4453 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
4454 if { [check_no_compiler_messages_nocache \
4455 arm_v8_2a_dotprod_neon_ok object {
4457 #if !defined (__ARM_FEATURE_DOTPROD)
4458 #error "__ARM_FEATURE_DOTPROD not defined"
4460 } "$flags -march=armv8.2-a+dotprod"] } {
4461 set et_arm_v8_2a_dotprod_neon_flags "$flags -march=armv8.2-a+dotprod"
4469 proc check_effective_target_arm_v8_2a_dotprod_neon_ok { } {
4470 return [check_cached_effective_target arm_v8_2a_dotprod_neon_ok \
4471 check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache]
4474 proc add_options_for_arm_v8_2a_dotprod_neon { flags } {
4475 if { ! [check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
4478 global et_arm_v8_2a_dotprod_neon_flags
4479 return "$flags $et_arm_v8_2a_dotprod_neon_flags"
4482 # Return 1 if the target supports FP16 VFMAL and VFMSL
4483 # instructions, 0 otherwise.
4484 # Record the command line options needed.
4486 proc check_effective_target_arm_fp16fml_neon_ok_nocache { } {
4487 global et_arm_fp16fml_neon_flags
4488 set et_arm_fp16fml_neon_flags ""
4490 if { ![istarget arm*-*-*] } {
4494 # Iterate through sets of options to find the compiler flags that
4495 # need to be added to the -march option.
4496 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
4497 if { [check_no_compiler_messages_nocache \
4498 arm_fp16fml_neon_ok assembly {
4499 #include <arm_neon.h>
4501 foo (float32x2_t r, float16x4_t a, float16x4_t b)
4503 return vfmlal_high_u32 (r, a, b);
4505 } "$flags -march=armv8.2-a+fp16fml"] } {
4506 set et_arm_fp16fml_neon_flags "$flags -march=armv8.2-a+fp16fml"
4514 proc check_effective_target_arm_fp16fml_neon_ok { } {
4515 return [check_cached_effective_target arm_fp16fml_neon_ok \
4516 check_effective_target_arm_fp16fml_neon_ok_nocache]
4519 proc add_options_for_arm_fp16fml_neon { flags } {
4520 if { ! [check_effective_target_arm_fp16fml_neon_ok] } {
4523 global et_arm_fp16fml_neon_flags
4524 return "$flags $et_arm_fp16fml_neon_flags"
4527 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
4530 proc check_effective_target_arm_v8_neon_hw { } {
4531 return [check_runtime arm_v8_neon_hw_available {
4532 #include "arm_neon.h"
4536 float32x2_t a = { 1.0f, 2.0f };
4537 #ifdef __ARM_ARCH_ISA_A64
4538 asm ("frinta %0.2s, %1.2s"
4542 asm ("vrinta.f32 %P0, %P1"
4546 return a[0] == 2.0f;
4548 } [add_options_for_arm_v8_neon ""]]
4551 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
4552 # otherwise. The test is valid for AArch64 and ARM.
4554 proc check_effective_target_arm_v8_1a_neon_hw { } {
4555 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
4558 return [check_runtime arm_v8_1a_neon_hw_available {
4562 #ifdef __ARM_ARCH_ISA_A64
4563 __Int32x2_t a = {0, 1};
4564 __Int32x2_t b = {0, 2};
4567 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
4570 : /* No clobbers. */);
4574 __simd64_int32_t a = {0, 1};
4575 __simd64_int32_t b = {0, 2};
4576 __simd64_int32_t result;
4578 asm ("vqrdmlah.s32 %P0, %P1, %P2"
4581 : /* No clobbers. */);
4586 } [add_options_for_arm_v8_1a_neon ""]]
4589 # Return 1 if the target supports executing floating point instructions from
4590 # ARMv8.2 with the FP16 extension, 0 otherwise. The test is valid for ARM and
4593 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
4594 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
4597 return [check_runtime arm_v8_2a_fp16_scalar_hw_available {
4604 #ifdef __ARM_ARCH_ISA_A64
4606 asm ("fabs %h0, %h1"
4609 : /* No clobbers. */);
4613 asm ("vabs.f16 %0, %1"
4616 : /* No clobbers. */);
4620 return (result == 1.0) ? 0 : 1;
4622 } [add_options_for_arm_v8_2a_fp16_scalar ""]]
4625 # Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
4626 # with the FP16 extension, 0 otherwise. The test is valid for ARM and for
4629 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
4630 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
4633 return [check_runtime arm_v8_2a_fp16_neon_hw_available {
4637 #ifdef __ARM_ARCH_ISA_A64
4639 __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
4640 __Float16x4_t result;
4642 asm ("fabs %0.4h, %1.4h"
4645 : /* No clobbers. */);
4649 __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
4650 __simd64_float16_t result;
4652 asm ("vabs.f16 %P0, %P1"
4655 : /* No clobbers. */);
4659 return (result[0] == 1.0) ? 0 : 1;
4661 } [add_options_for_arm_v8_2a_fp16_neon ""]]
4664 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.2
4665 # with the Dot Product extension, 0 otherwise. The test is valid for ARM and for
4668 proc check_effective_target_arm_v8_2a_dotprod_neon_hw { } {
4669 if { ![check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
4672 return [check_runtime arm_v8_2a_dotprod_neon_hw_available {
4673 #include "arm_neon.h"
4678 uint32x2_t results = {0,0};
4679 uint8x8_t a = {1,1,1,1,2,2,2,2};
4680 uint8x8_t b = {2,2,2,2,3,3,3,3};
4682 #ifdef __ARM_ARCH_ISA_A64
4683 asm ("udot %0.2s, %1.8b, %2.8b"
4686 : /* No clobbers. */);
4689 asm ("vudot.u8 %P0, %P1, %P2"
4692 : /* No clobbers. */);
4695 return (results[0] == 8 && results[1] == 24) ? 1 : 0;
4697 } [add_options_for_arm_v8_2a_dotprod_neon ""]]
4700 # Return 1 if this is a ARM target with NEON enabled.
4702 proc check_effective_target_arm_neon { } {
4703 if { [check_effective_target_arm32] } {
4704 return [check_no_compiler_messages arm_neon object {
4705 #ifndef __ARM_NEON__
4716 proc check_effective_target_arm_neonv2 { } {
4717 if { [check_effective_target_arm32] } {
4718 return [check_no_compiler_messages arm_neon object {
4719 #ifndef __ARM_NEON__
4722 #ifndef __ARM_FEATURE_FMA
4734 # Return 1 if this is an ARM target with load acquire and store release
4735 # instructions for 8-, 16- and 32-bit types.
4737 proc check_effective_target_arm_acq_rel { } {
4738 return [check_no_compiler_messages arm_acq_rel object {
4740 load_acquire_store_release (void)
4742 asm ("lda r0, [r1]\n\t"
4748 : : : "r0", "memory");
4753 # Add the options needed for MIPS Paired-Single.
4755 proc add_options_for_mpaired_single { flags } {
4756 if { ! [check_effective_target_mpaired_single] } {
4759 return "$flags -mpaired-single"
4762 # Add the options needed for MIPS SIMD Architecture.
4764 proc add_options_for_mips_msa { flags } {
4765 if { ! [check_effective_target_mips_msa] } {
4768 return "$flags -mmsa"
4771 # Add the options needed for MIPS Loongson MMI Architecture.
4773 proc add_options_for_mips_loongson_mmi { flags } {
4774 if { ! [check_effective_target_mips_loongson_mmi] } {
4777 return "$flags -mloongson-mmi"
4781 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
4782 # the Loongson vector modes.
4784 proc check_effective_target_mips_loongson_mmi { } {
4785 return [check_no_compiler_messages loongson assembly {
4786 #if !defined(__mips_loongson_mmi)
4787 #error !__mips_loongson_mmi
4789 #if !defined(__mips_loongson_vector_rev)
4790 #error !__mips_loongson_vector_rev
4795 # Return 1 if this is a MIPS target that supports the legacy NAN.
4797 proc check_effective_target_mips_nanlegacy { } {
4798 return [check_no_compiler_messages nanlegacy assembly {
4800 int main () { return 0; }
4804 # Return 1 if an MSA program can be compiled to object
4806 proc check_effective_target_mips_msa { } {
4807 if ![check_effective_target_nomips16] {
4810 return [check_no_compiler_messages msa object {
4811 #if !defined(__mips_msa)
4812 #error "MSA NOT AVAIL"
4814 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
4815 #error "MSA NOT AVAIL FOR ISA REV < 2"
4817 #if !defined(__mips_hard_float)
4818 #error "MSA HARD_FLOAT REQUIRED"
4820 #if __mips_fpr != 64
4821 #error "MSA 64-bit FPR REQUIRED"
4827 v8i16 v = __builtin_msa_ldi_h (1);
4835 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
4838 proc check_effective_target_arm_eabi { } {
4839 return [check_no_compiler_messages arm_eabi object {
4840 #ifndef __ARM_EABI__
4848 # Return 1 if this is an ARM target that adheres to the hard-float variant of
4849 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
4851 proc check_effective_target_arm_hf_eabi { } {
4852 return [check_no_compiler_messages arm_hf_eabi object {
4853 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
4854 #error not hard-float EABI
4861 # Return 1 if this is an ARM target that uses the soft float ABI
4862 # with no floating-point instructions at all (e.g. -mfloat-abi=soft).
4864 proc check_effective_target_arm_softfloat { } {
4865 return [check_no_compiler_messages arm_softfloat object {
4866 #if !defined(__SOFTFP__)
4867 #error not soft-float EABI
4874 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
4875 # Some multilibs may be incompatible with this option.
4877 proc check_effective_target_arm_iwmmxt_ok { } {
4878 if { [check_effective_target_arm32] } {
4879 return [check_no_compiler_messages arm_iwmmxt_ok object {
4887 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
4888 # for an ARM target.
4889 proc check_effective_target_arm_prefer_ldrd_strd { } {
4890 if { ![check_effective_target_arm32] } {
4894 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
4895 void foo (void) { __asm__ ("" ::: "r4", "r5"); }
4899 # Return 1 if this is a PowerPC target supporting -meabi.
4901 proc check_effective_target_powerpc_eabi_ok { } {
4902 if { [istarget powerpc*-*-*] } {
4903 return [check_no_compiler_messages powerpc_eabi_ok object {
4911 # Return 1 if this is a PowerPC target with floating-point registers.
4913 proc check_effective_target_powerpc_fprs { } {
4914 if { [istarget powerpc*-*-*]
4915 || [istarget rs6000-*-*] } {
4916 return [check_no_compiler_messages powerpc_fprs object {
4928 # Return 1 if this is a PowerPC target with hardware double-precision
4931 proc check_effective_target_powerpc_hard_double { } {
4932 if { [istarget powerpc*-*-*]
4933 || [istarget rs6000-*-*] } {
4934 return [check_no_compiler_messages powerpc_hard_double object {
4946 # Return 1 if this is a PowerPC target supporting -maltivec.
4948 proc check_effective_target_powerpc_altivec_ok { } {
4949 if { ([istarget powerpc*-*-*]
4950 && ![istarget powerpc-*-linux*paired*])
4951 || [istarget rs6000-*-*] } {
4952 # AltiVec is not supported on AIX before 5.3.
4953 if { [istarget powerpc*-*-aix4*]
4954 || [istarget powerpc*-*-aix5.1*]
4955 || [istarget powerpc*-*-aix5.2*] } {
4958 return [check_no_compiler_messages powerpc_altivec_ok object {
4966 # Return 1 if this is a PowerPC target supporting -mpower8-vector
4968 proc check_effective_target_powerpc_p8vector_ok { } {
4969 if { ([istarget powerpc*-*-*]
4970 && ![istarget powerpc-*-linux*paired*])
4971 || [istarget rs6000-*-*] } {
4972 # AltiVec is not supported on AIX before 5.3.
4973 if { [istarget powerpc*-*-aix4*]
4974 || [istarget powerpc*-*-aix5.1*]
4975 || [istarget powerpc*-*-aix5.2*] } {
4978 return [check_no_compiler_messages powerpc_p8vector_ok object {
4981 asm volatile ("xxlorc vs0,vs0,vs0");
4983 asm volatile ("xxlorc 0,0,0");
4987 } "-mpower8-vector"]
4993 # Return 1 if this is a PowerPC target supporting -mpower9-vector
4995 proc check_effective_target_powerpc_p9vector_ok { } {
4996 if { ([istarget powerpc*-*-*]
4997 && ![istarget powerpc-*-linux*paired*])
4998 || [istarget rs6000-*-*] } {
4999 # AltiVec is not supported on AIX before 5.3.
5000 if { [istarget powerpc*-*-aix4*]
5001 || [istarget powerpc*-*-aix5.1*]
5002 || [istarget powerpc*-*-aix5.2*] } {
5005 return [check_no_compiler_messages powerpc_p9vector_ok object {
5008 vector double v = (vector double) { 0.0, 0.0 };
5009 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
5012 } "-mpower9-vector"]
5018 # Return 1 if this is a PowerPC target supporting -mmodulo
5020 proc check_effective_target_powerpc_p9modulo_ok { } {
5021 if { ([istarget powerpc*-*-*]
5022 && ![istarget powerpc-*-linux*paired*])
5023 || [istarget rs6000-*-*] } {
5024 # AltiVec is not supported on AIX before 5.3.
5025 if { [istarget powerpc*-*-aix4*]
5026 || [istarget powerpc*-*-aix5.1*]
5027 || [istarget powerpc*-*-aix5.2*] } {
5030 return [check_no_compiler_messages powerpc_p9modulo_ok object {
5032 int i = 5, j = 3, r = -1;
5033 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
5042 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
5043 # software emulation on power7/power8 systems or hardware support on power9.
5045 proc check_effective_target_powerpc_float128_sw_ok { } {
5046 if { ([istarget powerpc*-*-*]
5047 && ![istarget powerpc-*-linux*paired*])
5048 || [istarget rs6000-*-*] } {
5049 # AltiVec is not supported on AIX before 5.3.
5050 if { [istarget powerpc*-*-aix4*]
5051 || [istarget powerpc*-*-aix5.1*]
5052 || [istarget powerpc*-*-aix5.2*] } {
5055 return [check_no_compiler_messages powerpc_float128_sw_ok object {
5056 volatile __float128 x = 1.0q;
5057 volatile __float128 y = 2.0q;
5059 __float128 z = x + y;
5062 } "-mfloat128 -mvsx"]
5068 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
5069 # support on power9.
5071 proc check_effective_target_powerpc_float128_hw_ok { } {
5072 if { ([istarget powerpc*-*-*]
5073 && ![istarget powerpc-*-linux*paired*])
5074 || [istarget rs6000-*-*] } {
5075 # AltiVec is not supported on AIX before 5.3.
5076 if { [istarget powerpc*-*-aix4*]
5077 || [istarget powerpc*-*-aix5.1*]
5078 || [istarget powerpc*-*-aix5.2*] } {
5081 return [check_no_compiler_messages powerpc_float128_hw_ok object {
5082 volatile __float128 x = 1.0q;
5083 volatile __float128 y = 2.0q;
5086 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
5089 } "-mfloat128-hardware"]
5095 # Return 1 if current options define float128, 0 otherwise.
5097 proc check_effective_target_ppc_float128 { } {
5098 return [check_no_compiler_messages_nocache ppc_float128 object {
5099 #ifndef __FLOAT128__
5105 # Return 1 if current options generate float128 insns, 0 otherwise.
5107 proc check_effective_target_ppc_float128_insns { } {
5108 return [check_no_compiler_messages_nocache ppc_float128 object {
5109 #ifndef __FLOAT128_HARDWARE__
5115 # Return 1 if current options generate VSX instructions, 0 otherwise.
5117 proc check_effective_target_powerpc_vsx { } {
5118 return [check_no_compiler_messages_nocache powerpc_vsx object {
5125 # Return 1 if this is a PowerPC target supporting -mvsx
5127 proc check_effective_target_powerpc_vsx_ok { } {
5128 if { ([istarget powerpc*-*-*]
5129 && ![istarget powerpc-*-linux*paired*])
5130 || [istarget rs6000-*-*] } {
5131 # VSX is not supported on AIX before 7.1.
5132 if { [istarget powerpc*-*-aix4*]
5133 || [istarget powerpc*-*-aix5*]
5134 || [istarget powerpc*-*-aix6*] } {
5137 return [check_no_compiler_messages powerpc_vsx_ok object {
5140 asm volatile ("xxlor vs0,vs0,vs0");
5142 asm volatile ("xxlor 0,0,0");
5152 # Return 1 if this is a PowerPC target supporting -mhtm
5154 proc check_effective_target_powerpc_htm_ok { } {
5155 if { ([istarget powerpc*-*-*]
5156 && ![istarget powerpc-*-linux*paired*])
5157 || [istarget rs6000-*-*] } {
5158 # HTM is not supported on AIX yet.
5159 if { [istarget powerpc*-*-aix*] } {
5162 return [check_no_compiler_messages powerpc_htm_ok object {
5164 asm volatile ("tbegin. 0");
5173 # Return 1 if the target supports executing HTM hardware instructions,
5174 # 0 otherwise. Cache the result.
5176 proc check_htm_hw_available { } {
5177 return [check_cached_effective_target htm_hw_available {
5178 # For now, disable on Darwin
5179 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
5182 check_runtime_nocache htm_hw_available {
5192 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
5194 proc check_effective_target_powerpc_ppu_ok { } {
5195 if [check_effective_target_powerpc_altivec_ok] {
5196 return [check_no_compiler_messages cell_asm_available object {
5199 asm volatile ("lvlx v0,v0,v0");
5201 asm volatile ("lvlx 0,0,0");
5211 # Return 1 if this is a PowerPC target that supports SPU.
5213 proc check_effective_target_powerpc_spu { } {
5214 if { [istarget powerpc*-*-linux*] } {
5215 return [check_effective_target_powerpc_altivec_ok]
5221 # Return 1 if this is a PowerPC SPE target. The check includes options
5222 # specified by dg-options for this test, so don't cache the result.
5224 proc check_effective_target_powerpc_spe_nocache { } {
5225 if { [istarget powerpc*-*-*] } {
5226 return [check_no_compiler_messages_nocache powerpc_spe object {
5232 } [current_compiler_flags]]
5238 # Return 1 if this is a PowerPC target with SPE enabled.
5240 proc check_effective_target_powerpc_spe { } {
5241 if { [istarget powerpc*-*-*] } {
5242 return [check_no_compiler_messages powerpc_spe object {
5254 # Return 1 if this is a PowerPC target with Altivec enabled.
5256 proc check_effective_target_powerpc_altivec { } {
5257 if { [istarget powerpc*-*-*] } {
5258 return [check_no_compiler_messages powerpc_altivec object {
5270 # Return 1 if this is a PowerPC 405 target. The check includes options
5271 # specified by dg-options for this test, so don't cache the result.
5273 proc check_effective_target_powerpc_405_nocache { } {
5274 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
5275 return [check_no_compiler_messages_nocache powerpc_405 object {
5281 } [current_compiler_flags]]
5287 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
5289 proc check_effective_target_powerpc_elfv2 { } {
5290 if { [istarget powerpc*-*-*] } {
5291 return [check_no_compiler_messages powerpc_elfv2 object {
5293 #error not ELF v2 ABI
5303 # Return 1 if this is a SPU target with a toolchain that
5304 # supports automatic overlay generation.
5306 proc check_effective_target_spu_auto_overlay { } {
5307 if { [istarget spu*-*-elf*] } {
5308 return [check_no_compiler_messages spu_auto_overlay executable {
5310 } "-Wl,--auto-overlay" ]
5316 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
5317 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
5318 # test environment appears to run executables on such a simulator.
5320 proc check_effective_target_ultrasparc_hw { } {
5321 return [check_runtime ultrasparc_hw {
5322 int main() { return 0; }
5323 } "-mcpu=ultrasparc"]
5326 # Return 1 if the test environment supports executing UltraSPARC VIS2
5327 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
5329 proc check_effective_target_ultrasparc_vis2_hw { } {
5330 return [check_runtime ultrasparc_vis2_hw {
5331 int main() { __asm__(".word 0x81b00320"); return 0; }
5332 } "-mcpu=ultrasparc3"]
5335 # Return 1 if the test environment supports executing UltraSPARC VIS3
5336 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
5338 proc check_effective_target_ultrasparc_vis3_hw { } {
5339 return [check_runtime ultrasparc_vis3_hw {
5340 int main() { __asm__(".word 0x81b00220"); return 0; }
5344 # Return 1 if this is a SPARC-V9 target.
5346 proc check_effective_target_sparc_v9 { } {
5347 if { [istarget sparc*-*-*] } {
5348 return [check_no_compiler_messages sparc_v9 object {
5350 asm volatile ("return %i7+8");
5359 # Return 1 if this is a SPARC target with VIS enabled.
5361 proc check_effective_target_sparc_vis { } {
5362 if { [istarget sparc*-*-*] } {
5363 return [check_no_compiler_messages sparc_vis object {
5375 # Return 1 if the target supports hardware vector shift operation.
5377 proc check_effective_target_vect_shift { } {
5378 return [check_cached_effective_target_indexed vect_shift {
5379 expr {([istarget powerpc*-*-*]
5380 && ![istarget powerpc-*-linux*paired*])
5381 || [istarget ia64-*-*]
5382 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5383 || [istarget aarch64*-*-*]
5384 || [is-effective-target arm_neon]
5385 || ([istarget mips*-*-*]
5386 && ([et-is-effective-target mips_msa]
5387 || [et-is-effective-target mips_loongson_mmi]))
5388 || ([istarget s390*-*-*]
5389 && [check_effective_target_s390_vx]) }}]
5392 # Return 1 if the target supports hardware vector shift by register operation.
5394 proc check_effective_target_vect_var_shift { } {
5395 return [check_cached_effective_target_indexed vect_var_shift {
5396 expr {(([istarget i?86-*-*] || [istarget x86_64-*-*])
5397 && [check_avx2_available])
5401 proc check_effective_target_whole_vector_shift { } {
5402 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5403 || [istarget ia64-*-*]
5404 || [istarget aarch64*-*-*]
5405 || [istarget powerpc64*-*-*]
5406 || ([is-effective-target arm_neon]
5407 && [check_effective_target_arm_little_endian])
5408 || ([istarget mips*-*-*]
5409 && [et-is-effective-target mips_loongson_mmi])
5410 || ([istarget s390*-*-*]
5411 && [check_effective_target_s390_vx]) } {
5417 verbose "check_effective_target_vect_long: returning $answer" 2
5421 # Return 1 if the target supports vector bswap operations.
5423 proc check_effective_target_vect_bswap { } {
5424 return [check_cached_effective_target_indexed vect_bswap {
5425 expr { [istarget aarch64*-*-*] || [is-effective-target arm_neon] }}]
5428 # Return 1 if the target supports hardware vector shift operation for char.
5430 proc check_effective_target_vect_shift_char { } {
5431 return [check_cached_effective_target_indexed vect_shift_char {
5432 expr { ([istarget powerpc*-*-*]
5433 && ![istarget powerpc-*-linux*paired*])
5434 || [is-effective-target arm_neon]
5435 || ([istarget mips*-*-*]
5436 && [et-is-effective-target mips_msa])
5437 || ([istarget s390*-*-*]
5438 && [check_effective_target_s390_vx]) }}]
5441 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
5443 # This can change for different subtargets so do not cache the result.
5445 proc check_effective_target_vect_long { } {
5446 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5447 || (([istarget powerpc*-*-*]
5448 && ![istarget powerpc-*-linux*paired*])
5449 && [check_effective_target_ilp32])
5450 || [is-effective-target arm_neon]
5451 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
5452 || [istarget aarch64*-*-*]
5453 || ([istarget mips*-*-*]
5454 && [et-is-effective-target mips_msa])
5455 || ([istarget s390*-*-*]
5456 && [check_effective_target_s390_vx]) } {
5462 verbose "check_effective_target_vect_long: returning $answer" 2
5466 # Return 1 if the target supports hardware vectors of float when
5467 # -funsafe-math-optimizations is enabled, 0 otherwise.
5469 # This won't change for different subtargets so cache the result.
5471 proc check_effective_target_vect_float { } {
5472 return [check_cached_effective_target_indexed vect_float {
5473 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
5474 || [istarget powerpc*-*-*]
5475 || [istarget spu-*-*]
5476 || [istarget mips-sde-elf]
5477 || [istarget mipsisa64*-*-*]
5478 || [istarget ia64-*-*]
5479 || [istarget aarch64*-*-*]
5480 || ([istarget mips*-*-*]
5481 && [et-is-effective-target mips_msa])
5482 || [is-effective-target arm_neon]
5483 || ([istarget s390*-*-*]
5484 && [check_effective_target_s390_vxe]) }}]
5487 # Return 1 if the target supports hardware vectors of float without
5488 # -funsafe-math-optimizations being enabled, 0 otherwise.
5490 proc check_effective_target_vect_float_strict { } {
5491 return [expr { [check_effective_target_vect_float]
5492 && ![istarget arm*-*-*] }]
5495 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
5497 # This won't change for different subtargets so cache the result.
5499 proc check_effective_target_vect_double { } {
5500 return [check_cached_effective_target_indexed vect_double {
5501 expr { (([istarget i?86-*-*] || [istarget x86_64-*-*])
5502 && [check_no_compiler_messages vect_double assembly {
5503 #ifdef __tune_atom__
5504 # error No double vectorizer support.
5507 || [istarget aarch64*-*-*]
5508 || [istarget spu-*-*]
5509 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
5510 || ([istarget mips*-*-*]
5511 && [et-is-effective-target mips_msa])
5512 || ([istarget s390*-*-*]
5513 && [check_effective_target_s390_vx])} }]
5516 # Return 1 if the target supports conditional addition, subtraction,
5517 # multiplication, division, minimum and maximum on vectors of double,
5518 # via the cond_ optabs. Return 0 otherwise.
5520 proc check_effective_target_vect_double_cond_arith { } {
5521 return [check_effective_target_aarch64_sve]
5524 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
5526 # This won't change for different subtargets so cache the result.
5528 proc check_effective_target_vect_long_long { } {
5529 return [check_cached_effective_target_indexed vect_long_long {
5530 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
5531 || ([istarget mips*-*-*]
5532 && [et-is-effective-target mips_msa])
5533 || ([istarget s390*-*-*]
5534 && [check_effective_target_s390_vx]) }}]
5538 # Return 1 if the target plus current options does not support a vector
5539 # max instruction on "int", 0 otherwise.
5541 # This won't change for different subtargets so cache the result.
5543 proc check_effective_target_vect_no_int_min_max { } {
5544 return [check_cached_effective_target_indexed vect_no_int_min_max {
5545 expr { [istarget sparc*-*-*]
5546 || [istarget spu-*-*]
5547 || [istarget alpha*-*-*]
5548 || ([istarget mips*-*-*]
5549 && [et-is-effective-target mips_loongson_mmi]) }}]
5552 # Return 1 if the target plus current options does not support a vector
5553 # add instruction on "int", 0 otherwise.
5555 # This won't change for different subtargets so cache the result.
5557 proc check_effective_target_vect_no_int_add { } {
5558 # Alpha only supports vector add on V8QI and V4HI.
5559 return [check_cached_effective_target_indexed vect_no_int_add {
5560 expr { [istarget alpha*-*-*] }}]
5563 # Return 1 if the target plus current options does not support vector
5564 # bitwise instructions, 0 otherwise.
5566 # This won't change for different subtargets so cache the result.
5568 proc check_effective_target_vect_no_bitwise { } {
5569 return [check_cached_effective_target_indexed vect_no_bitwise { return 0 }]
5572 # Return 1 if the target plus current options supports vector permutation,
5575 # This won't change for different subtargets so cache the result.
5577 proc check_effective_target_vect_perm { } {
5578 return [check_cached_effective_target_indexed vect_perm {
5579 expr { [is-effective-target arm_neon]
5580 || [istarget aarch64*-*-*]
5581 || [istarget powerpc*-*-*]
5582 || [istarget spu-*-*]
5583 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5584 || ([istarget mips*-*-*]
5585 && ([et-is-effective-target mpaired_single]
5586 || [et-is-effective-target mips_msa]))
5587 || ([istarget s390*-*-*]
5588 && [check_effective_target_s390_vx]) }}]
5591 # Return 1 if, for some VF:
5593 # - the target's default vector size is VF * ELEMENT_BITS bits
5595 # - it is possible to implement the equivalent of:
5597 # int<ELEMENT_BITS>_t s1[COUNT][COUNT * VF], s2[COUNT * VF];
5598 # for (int i = 0; i < COUNT; ++i)
5599 # for (int j = 0; j < COUNT * VF; ++j)
5600 # s1[i][j] = s2[j - j % COUNT + i]
5602 # using only a single 2-vector permute for each vector in s1.
5604 # E.g. for COUNT == 3 and vector length 4, the two arrays would be:
5606 # s2 | a0 a1 a2 a3 | b0 b1 b2 b3 | c0 c1 c2 c3
5607 # ------+-------------+-------------+------------
5608 # s1[0] | a0 a0 a0 a3 | a3 a3 b2 b2 | b2 c1 c1 c1
5609 # s1[1] | a1 a1 a1 b0 | b0 b0 b3 b3 | b3 c2 c2 c2
5610 # s1[2] | a2 a2 a2 b1 | b1 b1 c0 c0 | c0 c3 c3 c3
5612 # Each s1 permute requires only two of a, b and c.
5614 # The distance between the start of vector n in s1[0] and the start
5615 # of vector n in s2 is:
5617 # A = (n * VF) % COUNT
5619 # The corresponding value for the end of vector n is:
5621 # B = (n * VF + VF - 1) % COUNT
5623 # Subtracting i from each value gives the corresponding difference
5624 # for s1[i]. The condition being tested by this function is false
5625 # iff A - i > 0 and B - i < 0 for some i and n, such that the first
5626 # element for s1[i] comes from vector n - 1 of s2 and the last element
5627 # comes from vector n + 1 of s2. The condition is therefore true iff
5628 # A <= B for all n. This is turn means the condition is true iff:
5630 # (n * VF) % COUNT + (VF - 1) % COUNT < COUNT
5632 # for all n. COUNT - (n * VF) % COUNT is bounded by gcd (VF, COUNT),
5633 # and will be that value for at least one n in [0, COUNT), so we want:
5635 # (VF - 1) % COUNT < gcd (VF, COUNT)
5637 proc vect_perm_supported { count element_bits } {
5638 set vector_bits [lindex [available_vector_sizes] 0]
5639 # The number of vectors has to be a power of 2 when permuting
5640 # variable-length vectors.
5641 if { $vector_bits <= 0 && ($count & -$count) != $count } {
5644 set vf [expr { $vector_bits / $element_bits }]
5646 # Compute gcd (VF, COUNT).
5649 while { $temp1 > 0 } {
5650 set temp2 [expr { $gcd % $temp1 }]
5654 return [expr { ($vf - 1) % $count < $gcd }]
5657 # Return 1 if the target supports SLP permutation of 3 vectors when each
5658 # element has 32 bits.
5660 proc check_effective_target_vect_perm3_int { } {
5661 return [expr { [check_effective_target_vect_perm]
5662 && [vect_perm_supported 3 32] }]
5665 # Return 1 if the target plus current options supports vector permutation
5666 # on byte-sized elements, 0 otherwise.
5668 # This won't change for different subtargets so cache the result.
5670 proc check_effective_target_vect_perm_byte { } {
5671 return [check_cached_effective_target_indexed vect_perm_byte {
5672 expr { ([is-effective-target arm_neon]
5673 && [is-effective-target arm_little_endian])
5674 || ([istarget aarch64*-*-*]
5675 && [is-effective-target aarch64_little_endian])
5676 || [istarget powerpc*-*-*]
5677 || [istarget spu-*-*]
5678 || ([istarget mips-*.*]
5679 && [et-is-effective-target mips_msa])
5680 || ([istarget s390*-*-*]
5681 && [check_effective_target_s390_vx]) }}]
5684 # Return 1 if the target supports SLP permutation of 3 vectors when each
5685 # element has 8 bits.
5687 proc check_effective_target_vect_perm3_byte { } {
5688 return [expr { [check_effective_target_vect_perm_byte]
5689 && [vect_perm_supported 3 8] }]
5692 # Return 1 if the target plus current options supports vector permutation
5693 # on short-sized elements, 0 otherwise.
5695 # This won't change for different subtargets so cache the result.
5697 proc check_effective_target_vect_perm_short { } {
5698 return [check_cached_effective_target_indexed vect_perm_short {
5699 expr { ([is-effective-target arm_neon]
5700 && [is-effective-target arm_little_endian])
5701 || ([istarget aarch64*-*-*]
5702 && [is-effective-target aarch64_little_endian])
5703 || [istarget powerpc*-*-*]
5704 || [istarget spu-*-*]
5705 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
5706 && [check_ssse3_available])
5707 || ([istarget mips*-*-*]
5708 && [et-is-effective-target mips_msa])
5709 || ([istarget s390*-*-*]
5710 && [check_effective_target_s390_vx]) }}]
5713 # Return 1 if the target supports SLP permutation of 3 vectors when each
5714 # element has 16 bits.
5716 proc check_effective_target_vect_perm3_short { } {
5717 return [expr { [check_effective_target_vect_perm_short]
5718 && [vect_perm_supported 3 16] }]
5721 # Return 1 if the target plus current options supports folding of
5722 # copysign into XORSIGN.
5724 # This won't change for different subtargets so cache the result.
5726 proc check_effective_target_xorsign { } {
5727 return [check_cached_effective_target_indexed xorsign {
5728 expr { [istarget aarch64*-*-*] || [istarget arm*-*-*] }}]
5731 # Return 1 if the target plus current options supports a vector
5732 # widening summation of *short* args into *int* result, 0 otherwise.
5734 # This won't change for different subtargets so cache the result.
5736 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
5737 return [check_cached_effective_target_indexed vect_widen_sum_hi_to_si_pattern {
5738 expr { [istarget powerpc*-*-*]
5739 || ([istarget aarch64*-*-*]
5740 && ![check_effective_target_aarch64_sve])
5741 || [is-effective-target arm_neon]
5742 || [istarget ia64-*-*] }}]
5745 # Return 1 if the target plus current options supports a vector
5746 # widening summation of *short* args into *int* result, 0 otherwise.
5747 # A target can also support this widening summation if it can support
5748 # promotion (unpacking) from shorts to ints.
5750 # This won't change for different subtargets so cache the result.
5752 proc check_effective_target_vect_widen_sum_hi_to_si { } {
5753 return [check_cached_effective_target_indexed vect_widen_sum_hi_to_si {
5754 expr { [check_effective_target_vect_unpack]
5755 || [istarget powerpc*-*-*]
5756 || [istarget ia64-*-*] }}]
5759 # Return 1 if the target plus current options supports a vector
5760 # widening summation of *char* args into *short* result, 0 otherwise.
5761 # A target can also support this widening summation if it can support
5762 # promotion (unpacking) from chars to shorts.
5764 # This won't change for different subtargets so cache the result.
5766 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
5767 return [check_cached_effective_target_indexed vect_widen_sum_qi_to_hi {
5768 expr { [check_effective_target_vect_unpack]
5769 || [is-effective-target arm_neon]
5770 || [istarget ia64-*-*] }}]
5773 # Return 1 if the target plus current options supports a vector
5774 # widening summation of *char* args into *int* result, 0 otherwise.
5776 # This won't change for different subtargets so cache the result.
5778 proc check_effective_target_vect_widen_sum_qi_to_si { } {
5779 return [check_cached_effective_target_indexed vect_widen_sum_qi_to_si {
5780 expr { [istarget powerpc*-*-*] }}]
5783 # Return 1 if the target plus current options supports a vector
5784 # widening multiplication of *char* args into *short* result, 0 otherwise.
5785 # A target can also support this widening multplication if it can support
5786 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
5787 # multiplication of shorts).
5789 # This won't change for different subtargets so cache the result.
5792 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
5793 return [check_cached_effective_target_indexed vect_widen_mult_qi_to_hi {
5794 expr { ([check_effective_target_vect_unpack]
5795 && [check_effective_target_vect_short_mult])
5796 || ([istarget powerpc*-*-*]
5797 || ([istarget aarch64*-*-*]
5798 && ![check_effective_target_aarch64_sve])
5799 || [is-effective-target arm_neon]
5800 || ([istarget s390*-*-*]
5801 && [check_effective_target_s390_vx])) }}]
5804 # Return 1 if the target plus current options supports a vector
5805 # widening multiplication of *short* args into *int* result, 0 otherwise.
5806 # A target can also support this widening multplication if it can support
5807 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
5808 # multiplication of ints).
5810 # This won't change for different subtargets so cache the result.
5813 proc check_effective_target_vect_widen_mult_hi_to_si { } {
5814 return [check_cached_effective_target_indexed vect_widen_mult_hi_to_si {
5815 expr { ([check_effective_target_vect_unpack]
5816 && [check_effective_target_vect_int_mult])
5817 || ([istarget powerpc*-*-*]
5818 || [istarget spu-*-*]
5819 || [istarget ia64-*-*]
5820 || ([istarget aarch64*-*-*]
5821 && ![check_effective_target_aarch64_sve])
5822 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5823 || [is-effective-target arm_neon]
5824 || ([istarget s390*-*-*]
5825 && [check_effective_target_s390_vx])) }}]
5828 # Return 1 if the target plus current options supports a vector
5829 # widening multiplication of *char* args into *short* result, 0 otherwise.
5831 # This won't change for different subtargets so cache the result.
5833 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
5834 return [check_cached_effective_target_indexed vect_widen_mult_qi_to_hi_pattern {
5835 expr { [istarget powerpc*-*-*]
5836 || ([is-effective-target arm_neon]
5837 && [check_effective_target_arm_little_endian])
5838 || ([istarget s390*-*-*]
5839 && [check_effective_target_s390_vx]) }}]
5842 # Return 1 if the target plus current options supports a vector
5843 # widening multiplication of *short* args into *int* result, 0 otherwise.
5845 # This won't change for different subtargets so cache the result.
5847 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
5848 return [check_cached_effective_target_indexed vect_widen_mult_hi_to_si_pattern {
5849 expr { [istarget powerpc*-*-*]
5850 || [istarget spu-*-*]
5851 || [istarget ia64-*-*]
5852 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5853 || ([is-effective-target arm_neon]
5854 && [check_effective_target_arm_little_endian])
5855 || ([istarget s390*-*-*]
5856 && [check_effective_target_s390_vx]) }}]
5859 # Return 1 if the target plus current options supports a vector
5860 # widening multiplication of *int* args into *long* result, 0 otherwise.
5862 # This won't change for different subtargets so cache the result.
5864 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
5865 return [check_cached_effective_target_indexed vect_widen_mult_si_to_di_pattern {
5866 expr { [istarget ia64-*-*]
5867 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5868 || ([istarget s390*-*-*]
5869 && [check_effective_target_s390_vx]) }}]
5872 # Return 1 if the target plus current options supports a vector
5873 # widening shift, 0 otherwise.
5875 # This won't change for different subtargets so cache the result.
5877 proc check_effective_target_vect_widen_shift { } {
5878 return [check_cached_effective_target_indexed vect_widen_shift {
5879 expr { [is-effective-target arm_neon] }}]
5882 # Return 1 if the target plus current options supports a vector
5883 # dot-product of signed chars, 0 otherwise.
5885 # This won't change for different subtargets so cache the result.
5887 proc check_effective_target_vect_sdot_qi { } {
5888 return [check_cached_effective_target_indexed vect_sdot_qi {
5889 expr { [istarget ia64-*-*]
5890 || [istarget aarch64*-*-*]
5891 || [istarget arm*-*-*]
5892 || ([istarget mips*-*-*]
5893 && [et-is-effective-target mips_msa]) }}]
5896 # Return 1 if the target plus current options supports a vector
5897 # dot-product of unsigned chars, 0 otherwise.
5899 # This won't change for different subtargets so cache the result.
5901 proc check_effective_target_vect_udot_qi { } {
5902 return [check_cached_effective_target_indexed vect_udot_qi {
5903 expr { [istarget powerpc*-*-*]
5904 || [istarget aarch64*-*-*]
5905 || [istarget arm*-*-*]
5906 || [istarget ia64-*-*]
5907 || ([istarget mips*-*-*]
5908 && [et-is-effective-target mips_msa]) }}]
5911 # Return 1 if the target plus current options supports a vector
5912 # dot-product of signed shorts, 0 otherwise.
5914 # This won't change for different subtargets so cache the result.
5916 proc check_effective_target_vect_sdot_hi { } {
5917 return [check_cached_effective_target_indexed vect_sdot_hi {
5918 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5919 || [istarget ia64-*-*]
5920 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5921 || ([istarget mips*-*-*]
5922 && [et-is-effective-target mips_msa]) }}]
5925 # Return 1 if the target plus current options supports a vector
5926 # dot-product of unsigned shorts, 0 otherwise.
5928 # This won't change for different subtargets so cache the result.
5930 proc check_effective_target_vect_udot_hi { } {
5931 return [check_cached_effective_target_indexed vect_udot_hi {
5932 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5933 || ([istarget mips*-*-*]
5934 && [et-is-effective-target mips_msa]) }}]
5937 # Return 1 if the target plus current options supports a vector
5938 # sad operation of unsigned chars, 0 otherwise.
5940 # This won't change for different subtargets so cache the result.
5942 proc check_effective_target_vect_usad_char { } {
5943 return [check_cached_effective_target_indexed vect_usad_char {
5944 expr { [istarget i?86-*-*]
5945 || [istarget x86_64-*-*]
5946 || ([istarget aarch64*-*-*]
5947 && ![check_effective_target_aarch64_sve])}}]
5950 # Return 1 if the target plus current options supports both signed
5951 # and unsigned average operations on vectors of bytes.
5953 proc check_effective_target_vect_avg_qi {} {
5954 return [expr { [istarget aarch64*-*-*]
5955 && ![check_effective_target_aarch64_sve] }]
5958 # Return 1 if the target plus current options supports a vector
5959 # demotion (packing) of shorts (to chars) and ints (to shorts)
5960 # using modulo arithmetic, 0 otherwise.
5962 # This won't change for different subtargets so cache the result.
5964 proc check_effective_target_vect_pack_trunc { } {
5965 return [check_cached_effective_target_indexed vect_pack_trunc {
5966 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
5967 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5968 || [istarget aarch64*-*-*]
5969 || [istarget spu-*-*]
5970 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
5971 && [check_effective_target_arm_little_endian])
5972 || ([istarget mips*-*-*]
5973 && [et-is-effective-target mips_msa])
5974 || ([istarget s390*-*-*]
5975 && [check_effective_target_s390_vx]) }}]
5978 # Return 1 if the target plus current options supports a vector
5979 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
5981 # This won't change for different subtargets so cache the result.
5983 proc check_effective_target_vect_unpack { } {
5984 return [check_cached_effective_target_indexed vect_unpack {
5985 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
5986 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5987 || [istarget spu-*-*]
5988 || [istarget ia64-*-*]
5989 || [istarget aarch64*-*-*]
5990 || ([istarget mips*-*-*]
5991 && [et-is-effective-target mips_msa])
5992 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
5993 && [check_effective_target_arm_little_endian])
5994 || ([istarget s390*-*-*]
5995 && [check_effective_target_s390_vx]) }}]
5998 # Return 1 if the target plus current options does not guarantee
5999 # that its STACK_BOUNDARY is >= the reguired vector alignment.
6001 # This won't change for different subtargets so cache the result.
6003 proc check_effective_target_unaligned_stack { } {
6004 return [check_cached_effective_target_indexed unaligned_stack { expr 0 }]
6007 # Return 1 if the target plus current options does not support a vector
6008 # alignment mechanism, 0 otherwise.
6010 # This won't change for different subtargets so cache the result.
6012 proc check_effective_target_vect_no_align { } {
6013 return [check_cached_effective_target_indexed vect_no_align {
6014 expr { [istarget mipsisa64*-*-*]
6015 || [istarget mips-sde-elf]
6016 || [istarget sparc*-*-*]
6017 || [istarget ia64-*-*]
6018 || [check_effective_target_arm_vect_no_misalign]
6019 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
6020 || ([istarget mips*-*-*]
6021 && [et-is-effective-target mips_loongson_mmi]) }}]
6024 # Return 1 if the target supports a vector misalign access, 0 otherwise.
6026 # This won't change for different subtargets so cache the result.
6028 proc check_effective_target_vect_hw_misalign { } {
6029 return [check_cached_effective_target_indexed vect_hw_misalign {
6030 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6031 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
6032 || [istarget aarch64*-*-*]
6033 || ([istarget mips*-*-*] && [et-is-effective-target mips_msa])
6034 || ([istarget s390*-*-*]
6035 && [check_effective_target_s390_vx]) } {
6038 if { [istarget arm*-*-*]
6039 && ![check_effective_target_arm_vect_no_misalign] } {
6047 # Return 1 if arrays are aligned to the vector alignment
6048 # boundary, 0 otherwise.
6050 proc check_effective_target_vect_aligned_arrays { } {
6051 set et_vect_aligned_arrays 0
6052 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6053 && !([is-effective-target ia32]
6054 || ([check_avx_available] && ![check_prefer_avx128])))
6055 || [istarget spu-*-*] } {
6056 set et_vect_aligned_arrays 1
6059 verbose "check_effective_target_vect_aligned_arrays:\
6060 returning $et_vect_aligned_arrays" 2
6061 return $et_vect_aligned_arrays
6064 # Return 1 if types of size 32 bit or less are naturally aligned
6065 # (aligned to their type-size), 0 otherwise.
6067 # This won't change for different subtargets so cache the result.
6069 proc check_effective_target_natural_alignment_32 { } {
6070 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
6071 return [check_cached_effective_target_indexed natural_alignment_32 {
6072 if { ([istarget *-*-darwin*] && [is-effective-target lp64])
6073 || [istarget avr-*-*] } {
6081 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
6082 # type-size), 0 otherwise.
6084 # This won't change for different subtargets so cache the result.
6086 proc check_effective_target_natural_alignment_64 { } {
6087 return [check_cached_effective_target_indexed natural_alignment_64 {
6088 expr { ([is-effective-target lp64] && ![istarget *-*-darwin*])
6089 || [istarget spu-*-*] }
6093 # Return 1 if all vector types are naturally aligned (aligned to their
6094 # type-size), 0 otherwise.
6096 proc check_effective_target_vect_natural_alignment { } {
6097 set et_vect_natural_alignment 1
6098 if { [check_effective_target_arm_eabi]
6099 || [istarget nvptx-*-*]
6100 || [istarget s390*-*-*] } {
6101 set et_vect_natural_alignment 0
6103 verbose "check_effective_target_vect_natural_alignment:\
6104 returning $et_vect_natural_alignment" 2
6105 return $et_vect_natural_alignment
6108 # Return true if fully-masked loops are supported.
6110 proc check_effective_target_vect_fully_masked { } {
6111 return [check_effective_target_aarch64_sve]
6114 # Return 1 if the target doesn't prefer any alignment beyond element
6115 # alignment during vectorization.
6117 proc check_effective_target_vect_element_align_preferred { } {
6118 return [expr { [check_effective_target_aarch64_sve]
6119 && [check_effective_target_vect_variable_length] }]
6122 # Return 1 if we can align stack data to the preferred vector alignment.
6124 proc check_effective_target_vect_align_stack_vars { } {
6125 if { [check_effective_target_aarch64_sve] } {
6126 return [check_effective_target_vect_variable_length]
6131 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
6133 proc check_effective_target_vector_alignment_reachable { } {
6134 set et_vector_alignment_reachable 0
6135 if { [check_effective_target_vect_aligned_arrays]
6136 || [check_effective_target_natural_alignment_32] } {
6137 set et_vector_alignment_reachable 1
6139 verbose "check_effective_target_vector_alignment_reachable:\
6140 returning $et_vector_alignment_reachable" 2
6141 return $et_vector_alignment_reachable
6144 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
6146 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
6147 set et_vector_alignment_reachable_for_64bit 0
6148 if { [check_effective_target_vect_aligned_arrays]
6149 || [check_effective_target_natural_alignment_64] } {
6150 set et_vector_alignment_reachable_for_64bit 1
6152 verbose "check_effective_target_vector_alignment_reachable_for_64bit:\
6153 returning $et_vector_alignment_reachable_for_64bit" 2
6154 return $et_vector_alignment_reachable_for_64bit
6157 # Return 1 if the target only requires element alignment for vector accesses
6159 proc check_effective_target_vect_element_align { } {
6160 return [check_cached_effective_target_indexed vect_element_align {
6161 expr { ([istarget arm*-*-*]
6162 && ![check_effective_target_arm_vect_no_misalign])
6163 || [check_effective_target_vect_hw_misalign] }}]
6166 # Return 1 if we expect to see unaligned accesses in at least some
6169 proc check_effective_target_vect_unaligned_possible { } {
6170 return [expr { ![check_effective_target_vect_element_align_preferred]
6171 && (![check_effective_target_vect_no_align]
6172 || [check_effective_target_vect_hw_misalign]) }]
6175 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
6177 proc check_effective_target_vect_load_lanes { } {
6178 # We don't support load_lanes correctly on big-endian arm.
6179 return [check_cached_effective_target vect_load_lanes {
6180 expr { ([check_effective_target_arm_little_endian]
6181 && [check_effective_target_arm_neon_ok])
6182 || [istarget aarch64*-*-*] }}]
6185 # Return 1 if the target supports vector masked stores.
6187 proc check_effective_target_vect_masked_store { } {
6188 return [check_effective_target_aarch64_sve]
6191 # Return 1 if the target supports vector scatter stores.
6193 proc check_effective_target_vect_scatter_store { } {
6194 return [check_effective_target_aarch64_sve]
6197 # Return 1 if the target supports vector conditional operations, 0 otherwise.
6199 proc check_effective_target_vect_condition { } {
6200 return [check_cached_effective_target_indexed vect_condition {
6201 expr { [istarget aarch64*-*-*]
6202 || [istarget powerpc*-*-*]
6203 || [istarget ia64-*-*]
6204 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6205 || [istarget spu-*-*]
6206 || ([istarget mips*-*-*]
6207 && [et-is-effective-target mips_msa])
6208 || ([istarget arm*-*-*]
6209 && [check_effective_target_arm_neon_ok])
6210 || ([istarget s390*-*-*]
6211 && [check_effective_target_s390_vx]) }}]
6214 # Return 1 if the target supports vector conditional operations where
6215 # the comparison has different type from the lhs, 0 otherwise.
6217 proc check_effective_target_vect_cond_mixed { } {
6218 return [check_cached_effective_target_indexed vect_cond_mixed {
6219 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
6220 || [istarget aarch64*-*-*]
6221 || [istarget powerpc*-*-*]
6222 || ([istarget mips*-*-*]
6223 && [et-is-effective-target mips_msa])
6224 || ([istarget s390*-*-*]
6225 && [check_effective_target_s390_vx]) }}]
6228 # Return 1 if the target supports vector char multiplication, 0 otherwise.
6230 proc check_effective_target_vect_char_mult { } {
6231 return [check_cached_effective_target_indexed vect_char_mult {
6232 expr { [istarget aarch64*-*-*]
6233 || [istarget ia64-*-*]
6234 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6235 || [check_effective_target_arm32]
6236 || [check_effective_target_powerpc_altivec]
6237 || ([istarget mips*-*-*]
6238 && [et-is-effective-target mips_msa])
6239 || ([istarget s390*-*-*]
6240 && [check_effective_target_s390_vx]) }}]
6243 # Return 1 if the target supports vector short multiplication, 0 otherwise.
6245 proc check_effective_target_vect_short_mult { } {
6246 return [check_cached_effective_target_indexed vect_short_mult {
6247 expr { [istarget ia64-*-*]
6248 || [istarget spu-*-*]
6249 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6250 || [istarget powerpc*-*-*]
6251 || [istarget aarch64*-*-*]
6252 || [check_effective_target_arm32]
6253 || ([istarget mips*-*-*]
6254 && ([et-is-effective-target mips_msa]
6255 || [et-is-effective-target mips_loongson_mmi]))
6256 || ([istarget s390*-*-*]
6257 && [check_effective_target_s390_vx]) }}]
6260 # Return 1 if the target supports vector int multiplication, 0 otherwise.
6262 proc check_effective_target_vect_int_mult { } {
6263 return [check_cached_effective_target_indexed vect_int_mult {
6264 expr { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6265 || [istarget spu-*-*]
6266 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6267 || [istarget ia64-*-*]
6268 || [istarget aarch64*-*-*]
6269 || ([istarget mips*-*-*]
6270 && [et-is-effective-target mips_msa])
6271 || [check_effective_target_arm32]
6272 || ([istarget s390*-*-*]
6273 && [check_effective_target_s390_vx]) }}]
6276 # Return 1 if the target supports 64 bit hardware vector
6277 # multiplication of long operands with a long result, 0 otherwise.
6279 # This can change for different subtargets so do not cache the result.
6281 proc check_effective_target_vect_long_mult { } {
6282 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6283 || (([istarget powerpc*-*-*]
6284 && ![istarget powerpc-*-linux*paired*])
6285 && [check_effective_target_ilp32])
6286 || [is-effective-target arm_neon]
6287 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
6288 || [istarget aarch64*-*-*]
6289 || ([istarget mips*-*-*]
6290 && [et-is-effective-target mips_msa]) } {
6296 verbose "check_effective_target_vect_long_mult: returning $answer" 2
6300 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
6302 proc check_effective_target_vect_extract_even_odd { } {
6303 return [check_cached_effective_target_indexed extract_even_odd {
6304 expr { [istarget aarch64*-*-*]
6305 || [istarget powerpc*-*-*]
6306 || [is-effective-target arm_neon]
6307 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6308 || [istarget ia64-*-*]
6309 || [istarget spu-*-*]
6310 || ([istarget mips*-*-*]
6311 && ([et-is-effective-target mips_msa]
6312 || [et-is-effective-target mpaired_single]))
6313 || ([istarget s390*-*-*]
6314 && [check_effective_target_s390_vx]) }}]
6317 # Return 1 if the target supports vector interleaving, 0 otherwise.
6319 proc check_effective_target_vect_interleave { } {
6320 return [check_cached_effective_target_indexed vect_interleave {
6321 expr { [istarget aarch64*-*-*]
6322 || [istarget powerpc*-*-*]
6323 || [is-effective-target arm_neon]
6324 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6325 || [istarget ia64-*-*]
6326 || [istarget spu-*-*]
6327 || ([istarget mips*-*-*]
6328 && ([et-is-effective-target mpaired_single]
6329 || [et-is-effective-target mips_msa]))
6330 || ([istarget s390*-*-*]
6331 && [check_effective_target_s390_vx]) }}]
6334 foreach N {2 3 4 8} {
6335 eval [string map [list N $N] {
6336 # Return 1 if the target supports 2-vector interleaving
6337 proc check_effective_target_vect_stridedN { } {
6338 return [check_cached_effective_target_indexed vect_stridedN {
6340 && [check_effective_target_vect_interleave]
6341 && [check_effective_target_vect_extract_even_odd] } {
6344 if { ([istarget arm*-*-*]
6345 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
6354 # Return the list of vector sizes (in bits) that each target supports.
6355 # A vector length of "0" indicates variable-length vectors.
6357 proc available_vector_sizes { } {
6359 if { [istarget aarch64*-*-*] } {
6360 if { [check_effective_target_aarch64_sve] } {
6361 lappend result [aarch64_sve_bits]
6363 lappend result 128 64
6364 } elseif { [istarget arm*-*-*]
6365 && [check_effective_target_arm_neon_ok] } {
6366 lappend result 128 64
6367 } elseif { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6368 && ([check_avx_available] && ![check_prefer_avx128])) } {
6369 lappend result 256 128
6370 } elseif { [istarget sparc*-*-*] } {
6373 # The traditional default asumption.
6379 # Return 1 if the target supports multiple vector sizes
6381 proc check_effective_target_vect_multiple_sizes { } {
6382 return [expr { [llength [available_vector_sizes]] > 1 }]
6385 # Return true if variable-length vectors are supported.
6387 proc check_effective_target_vect_variable_length { } {
6388 return [expr { [lindex [available_vector_sizes] 0] == 0 }]
6391 # Return 1 if the target supports vectors of 64 bits.
6393 proc check_effective_target_vect64 { } {
6394 return [expr { [lsearch -exact [available_vector_sizes] 64] >= 0 }]
6397 # Return 1 if the target supports vector copysignf calls.
6399 proc check_effective_target_vect_call_copysignf { } {
6400 return [check_cached_effective_target_indexed vect_call_copysignf {
6401 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
6402 || [istarget powerpc*-*-*]
6403 || [istarget aarch64*-*-*] }}]
6406 # Return 1 if the target supports hardware square root instructions.
6408 proc check_effective_target_sqrt_insn { } {
6409 return [check_cached_effective_target sqrt_insn {
6410 expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
6411 || [istarget powerpc*-*-*]
6412 || [istarget aarch64*-*-*]
6413 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok])
6414 || ([istarget s390*-*-*]
6415 && [check_effective_target_s390_vx]) }}]
6418 # Return 1 if the target supports vector sqrtf calls.
6420 proc check_effective_target_vect_call_sqrtf { } {
6421 return [check_cached_effective_target_indexed vect_call_sqrtf {
6422 expr { [istarget aarch64*-*-*]
6423 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6424 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
6425 || ([istarget s390*-*-*]
6426 && [check_effective_target_s390_vx]) }}]
6429 # Return 1 if the target supports vector lrint calls.
6431 proc check_effective_target_vect_call_lrint { } {
6432 set et_vect_call_lrint 0
6433 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6434 && [check_effective_target_ilp32]) } {
6435 set et_vect_call_lrint 1
6438 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
6439 return $et_vect_call_lrint
6442 # Return 1 if the target supports vector btrunc calls.
6444 proc check_effective_target_vect_call_btrunc { } {
6445 return [check_cached_effective_target_indexed vect_call_btrunc {
6446 expr { [istarget aarch64*-*-*] }}]
6449 # Return 1 if the target supports vector btruncf calls.
6451 proc check_effective_target_vect_call_btruncf { } {
6452 return [check_cached_effective_target_indexed vect_call_btruncf {
6453 expr { [istarget aarch64*-*-*] }}]
6456 # Return 1 if the target supports vector ceil calls.
6458 proc check_effective_target_vect_call_ceil { } {
6459 return [check_cached_effective_target_indexed vect_call_ceil {
6460 expr { [istarget aarch64*-*-*] }}]
6463 # Return 1 if the target supports vector ceilf calls.
6465 proc check_effective_target_vect_call_ceilf { } {
6466 return [check_cached_effective_target_indexed vect_call_ceilf {
6467 expr { [istarget aarch64*-*-*] }}]
6470 # Return 1 if the target supports vector floor calls.
6472 proc check_effective_target_vect_call_floor { } {
6473 return [check_cached_effective_target_indexed vect_call_floor {
6474 expr { [istarget aarch64*-*-*] }}]
6477 # Return 1 if the target supports vector floorf calls.
6479 proc check_effective_target_vect_call_floorf { } {
6480 return [check_cached_effective_target_indexed vect_call_floorf {
6481 expr { [istarget aarch64*-*-*] }}]
6484 # Return 1 if the target supports vector lceil calls.
6486 proc check_effective_target_vect_call_lceil { } {
6487 return [check_cached_effective_target_indexed vect_call_lceil {
6488 expr { [istarget aarch64*-*-*] }}]
6491 # Return 1 if the target supports vector lfloor calls.
6493 proc check_effective_target_vect_call_lfloor { } {
6494 return [check_cached_effective_target_indexed vect_call_lfloor {
6495 expr { [istarget aarch64*-*-*] }}]
6498 # Return 1 if the target supports vector nearbyint calls.
6500 proc check_effective_target_vect_call_nearbyint { } {
6501 return [check_cached_effective_target_indexed vect_call_nearbyint {
6502 expr { [istarget aarch64*-*-*] }}]
6505 # Return 1 if the target supports vector nearbyintf calls.
6507 proc check_effective_target_vect_call_nearbyintf { } {
6508 return [check_cached_effective_target_indexed vect_call_nearbyintf {
6509 expr { [istarget aarch64*-*-*] }}]
6512 # Return 1 if the target supports vector round calls.
6514 proc check_effective_target_vect_call_round { } {
6515 return [check_cached_effective_target_indexed vect_call_round {
6516 expr { [istarget aarch64*-*-*] }}]
6519 # Return 1 if the target supports vector roundf calls.
6521 proc check_effective_target_vect_call_roundf { } {
6522 return [check_cached_effective_target_indexed vect_call_roundf {
6523 expr { [istarget aarch64*-*-*] }}]
6526 # Return 1 if the target supports AND, OR and XOR reduction.
6528 proc check_effective_target_vect_logical_reduc { } {
6529 return [check_effective_target_aarch64_sve]
6532 # Return 1 if the target supports the fold_extract_last optab.
6534 proc check_effective_target_vect_fold_extract_last { } {
6535 return [check_effective_target_aarch64_sve]
6538 # Return 1 if the target supports section-anchors
6540 proc check_effective_target_section_anchors { } {
6541 return [check_cached_effective_target section_anchors {
6542 expr { [istarget powerpc*-*-*]
6543 || [istarget arm*-*-*]
6544 || [istarget aarch64*-*-*] }}]
6547 # Return 1 if the target supports atomic operations on "int_128" values.
6549 proc check_effective_target_sync_int_128 { } {
6550 if { [istarget spu-*-*] } {
6557 # Return 1 if the target supports atomic operations on "int_128" values
6558 # and can execute them.
6559 # This requires support for both compare-and-swap and true atomic loads.
6561 proc check_effective_target_sync_int_128_runtime { } {
6562 if { [istarget spu-*-*] } {
6569 # Return 1 if the target supports atomic operations on "long long".
6571 # Note: 32bit x86 targets require -march=pentium in dg-options.
6572 # Note: 32bit s390 targets require -mzarch in dg-options.
6574 proc check_effective_target_sync_long_long { } {
6575 if { [istarget i?86-*-*] || [istarget x86_64-*-*])
6576 || [istarget aarch64*-*-*]
6577 || [istarget arm*-*-*]
6578 || [istarget alpha*-*-*]
6579 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
6580 || [istarget s390*-*-*]
6581 || [istarget spu-*-*] } {
6588 # Return 1 if the target supports popcount on long.
6590 proc check_effective_target_popcountl { } {
6591 return [check_no_messages_and_pattern popcountl "!\\(call" rtl-expand {
6594 return __builtin_popcountl (b);
6599 # Return 1 if the target supports atomic operations on "long long"
6600 # and can execute them.
6602 # Note: 32bit x86 targets require -march=pentium in dg-options.
6604 proc check_effective_target_sync_long_long_runtime { } {
6605 if { (([istarget x86_64-*-*] || [istarget i?86-*-*])
6606 && [check_cached_effective_target sync_long_long_available {
6607 check_runtime_nocache sync_long_long_available {
6611 unsigned int eax, ebx, ecx, edx;
6612 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
6613 return !(edx & bit_CMPXCHG8B);
6618 || [istarget aarch64*-*-*]
6619 || ([istarget arm*-*-linux-*]
6620 && [check_runtime sync_longlong_runtime {
6626 if (sizeof (long long) != 8)
6629 /* Just check for native;
6630 checking for kernel fallback is tricky. */
6631 asm volatile ("ldrexd r0,r1, [%0]"
6632 : : "r" (&l1) : "r0", "r1");
6636 || [istarget alpha*-*-*]
6637 || ([istarget sparc*-*-*]
6638 && [check_effective_target_lp64]
6639 && [check_effective_target_ultrasparc_hw])
6640 || [istarget spu-*-*]
6641 || ([istarget powerpc*-*-*] && [check_effective_target_lp64]) } {
6648 # Return 1 if the target supports byte swap instructions.
6650 proc check_effective_target_bswap { } {
6651 return [check_cached_effective_target bswap {
6652 expr { [istarget aarch64*-*-*]
6653 || [istarget alpha*-*-*]
6654 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6655 || [istarget m68k-*-*]
6656 || [istarget powerpc*-*-*]
6657 || [istarget rs6000-*-*]
6658 || [istarget s390*-*-*]
6659 || ([istarget arm*-*-*]
6660 && [check_no_compiler_messages_nocache arm_v6_or_later object {
6662 #error not armv6 or later
6668 # Return 1 if the target supports atomic operations on "int" and "long".
6670 proc check_effective_target_sync_int_long { } {
6671 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
6672 # load-reserved/store-conditional instructions.
6673 return [check_cached_effective_target sync_int_long {
6674 expr { [istarget ia64-*-*]
6675 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6676 || [istarget aarch64*-*-*]
6677 || [istarget alpha*-*-*]
6678 || [istarget arm*-*-linux-*]
6679 || ([istarget arm*-*-*]
6680 && [check_effective_target_arm_acq_rel])
6681 || [istarget bfin*-*linux*]
6682 || [istarget hppa*-*linux*]
6683 || [istarget s390*-*-*]
6684 || [istarget powerpc*-*-*]
6685 || [istarget crisv32-*-*] || [istarget cris-*-*]
6686 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
6687 || [istarget spu-*-*]
6688 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
6689 || [check_effective_target_mips_llsc] }}]
6692 # Return 1 if the target supports atomic operations on "char" and "short".
6694 proc check_effective_target_sync_char_short { } {
6695 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
6696 # load-reserved/store-conditional instructions.
6697 return [check_cached_effective_target sync_char_short {
6698 expr { [istarget aarch64*-*-*]
6699 || [istarget ia64-*-*]
6700 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6701 || [istarget alpha*-*-*]
6702 || [istarget arm*-*-linux-*]
6703 || ([istarget arm*-*-*]
6704 && [check_effective_target_arm_acq_rel])
6705 || [istarget hppa*-*linux*]
6706 || [istarget s390*-*-*]
6707 || [istarget powerpc*-*-*]
6708 || [istarget crisv32-*-*] || [istarget cris-*-*]
6709 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
6710 || [istarget spu-*-*]
6711 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
6712 || [check_effective_target_mips_llsc] }}]
6715 # Return 1 if the target uses a ColdFire FPU.
6717 proc check_effective_target_coldfire_fpu { } {
6718 return [check_no_compiler_messages coldfire_fpu assembly {
6725 # Return true if this is a uClibc target.
6727 proc check_effective_target_uclibc {} {
6728 return [check_no_compiler_messages uclibc object {
6729 #include <features.h>
6730 #if !defined (__UCLIBC__)
6736 # Return true if this is a uclibc target and if the uclibc feature
6737 # described by __$feature__ is not present.
6739 proc check_missing_uclibc_feature {feature} {
6740 return [check_no_compiler_messages $feature object "
6741 #include <features.h>
6742 #if !defined (__UCLIBC) || defined (__${feature}__)
6748 # Return true if this is a Newlib target.
6750 proc check_effective_target_newlib {} {
6751 return [check_no_compiler_messages newlib object {
6756 # Return true if GCC was configured with --enable-newlib-nano-formatted-io
6757 proc check_effective_target_newlib_nano_io { } {
6758 return [check_configured_with "--enable-newlib-nano-formatted-io"]
6761 # Some newlib versions don't provide a frexpl and instead depend
6762 # on frexp to implement long double conversions in their printf-like
6763 # functions. This leads to broken results. Detect such versions here.
6765 proc check_effective_target_newlib_broken_long_double_io {} {
6766 if { [is-effective-target newlib] && ![is-effective-target frexpl] } {
6772 # Return true if this is NOT a Bionic target.
6774 proc check_effective_target_non_bionic {} {
6775 return [check_no_compiler_messages non_bionic object {
6777 #if defined (__BIONIC__)
6783 # Return true if this target has error.h header.
6785 proc check_effective_target_error_h {} {
6786 return [check_no_compiler_messages error_h object {
6791 # Return true if this target has tgmath.h header.
6793 proc check_effective_target_tgmath_h {} {
6794 return [check_no_compiler_messages tgmath_h object {
6799 # Return true if target's libc supports complex functions.
6801 proc check_effective_target_libc_has_complex_functions {} {
6802 return [check_no_compiler_messages libc_has_complex_functions object {
6803 #include <complex.h>
6808 # (a) an error of a few ULP is expected in string to floating-point
6809 # conversion functions; and
6810 # (b) overflow is not always detected correctly by those functions.
6812 proc check_effective_target_lax_strtofp {} {
6813 # By default, assume that all uClibc targets suffer from this.
6814 return [check_effective_target_uclibc]
6817 # Return 1 if this is a target for which wcsftime is a dummy
6818 # function that always returns 0.
6820 proc check_effective_target_dummy_wcsftime {} {
6821 # By default, assume that all uClibc targets suffer from this.
6822 return [check_effective_target_uclibc]
6825 # Return 1 if constructors with initialization priority arguments are
6826 # supposed on this target.
6828 proc check_effective_target_init_priority {} {
6829 return [check_no_compiler_messages init_priority assembly "
6830 void f() __attribute__((constructor (1000)));
6835 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
6836 # This can be used with any check_* proc that takes no argument and
6837 # returns only 1 or 0. It could be used with check_* procs that take
6838 # arguments with keywords that pass particular arguments.
6840 proc is-effective-target { arg } {
6843 if { ![info exists et_index] } {
6844 # Initialize the effective target index that is used in some
6845 # check_effective_target_* procs.
6848 if { [info procs check_effective_target_${arg}] != [list] } {
6849 set selected [check_effective_target_${arg}]
6852 "vmx_hw" { set selected [check_vmx_hw_available] }
6853 "vsx_hw" { set selected [check_vsx_hw_available] }
6854 "p8vector_hw" { set selected [check_p8vector_hw_available] }
6855 "p9vector_hw" { set selected [check_p9vector_hw_available] }
6856 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
6857 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
6858 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
6859 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
6860 "ppc_cpu_supports_hw" { set selected [check_ppc_cpu_supports_hw_available] }
6861 "dfp_hw" { set selected [check_dfp_hw_available] }
6862 "htm_hw" { set selected [check_htm_hw_available] }
6863 "named_sections" { set selected [check_named_sections_available] }
6864 "gc_sections" { set selected [check_gc_sections_available] }
6865 "cxa_atexit" { set selected [check_cxa_atexit_available] }
6866 default { error "unknown effective target keyword `$arg'" }
6870 verbose "is-effective-target: $arg $selected" 2
6874 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
6876 proc is-effective-target-keyword { arg } {
6877 if { [info procs check_effective_target_${arg}] != [list] } {
6880 # These have different names for their check_* procs.
6882 "vmx_hw" { return 1 }
6883 "vsx_hw" { return 1 }
6884 "p8vector_hw" { return 1 }
6885 "p9vector_hw" { return 1 }
6886 "p9modulo_hw" { return 1 }
6887 "ppc_float128_sw" { return 1 }
6888 "ppc_float128_hw" { return 1 }
6889 "ppc_recip_hw" { return 1 }
6890 "dfp_hw" { return 1 }
6891 "htm_hw" { return 1 }
6892 "named_sections" { return 1 }
6893 "gc_sections" { return 1 }
6894 "cxa_atexit" { return 1 }
6895 default { return 0 }
6900 # Execute tests for all targets in EFFECTIVE_TARGETS list. Set et_index to
6901 # indicate what target is currently being processed. This is for
6902 # the vectorizer tests, e.g. vect_int, to keep track what target supports
6905 proc et-dg-runtest { runtest testcases flags default-extra-flags } {
6906 global dg-do-what-default
6907 global EFFECTIVE_TARGETS
6910 if { [llength $EFFECTIVE_TARGETS] > 0 } {
6911 foreach target $EFFECTIVE_TARGETS {
6912 set target_flags $flags
6913 set dg-do-what-default compile
6914 set et_index [lsearch -exact $EFFECTIVE_TARGETS $target]
6915 if { [info procs add_options_for_${target}] != [list] } {
6916 set target_flags [add_options_for_${target} "$flags"]
6918 if { [info procs check_effective_target_${target}_runtime]
6919 != [list] && [check_effective_target_${target}_runtime] } {
6920 set dg-do-what-default run
6922 $runtest $testcases $target_flags ${default-extra-flags}
6926 $runtest $testcases $flags ${default-extra-flags}
6930 # Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
6931 # et_index, 0 otherwise.
6933 proc et-is-effective-target { target } {
6934 global EFFECTIVE_TARGETS
6937 if { [llength $EFFECTIVE_TARGETS] > $et_index
6938 && [lindex $EFFECTIVE_TARGETS $et_index] == $target } {
6944 # Return 1 if target default to short enums
6946 proc check_effective_target_short_enums { } {
6947 return [check_no_compiler_messages short_enums assembly {
6949 int s[sizeof (enum foo) == 1 ? 1 : -1];
6953 # Return 1 if target supports merging string constants at link time.
6955 proc check_effective_target_string_merging { } {
6956 return [check_no_messages_and_pattern string_merging \
6957 "rodata\\.str" assembly {
6958 const char *var = "String";
6962 # Return 1 if target has the basic signed and unsigned types in
6963 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
6964 # working <stdint.h> for all targets.
6966 proc check_effective_target_stdint_types { } {
6967 return [check_no_compiler_messages stdint_types assembly {
6969 int8_t a; int16_t b; int32_t c; int64_t d;
6970 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
6974 # Return 1 if target has the basic signed and unsigned types in
6975 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
6976 # these types agree with those in the header, as some systems have
6977 # only <inttypes.h>.
6979 proc check_effective_target_inttypes_types { } {
6980 return [check_no_compiler_messages inttypes_types assembly {
6981 #include <inttypes.h>
6982 int8_t a; int16_t b; int32_t c; int64_t d;
6983 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
6987 # Return 1 if programs are intended to be run on a simulator
6988 # (i.e. slowly) rather than hardware (i.e. fast).
6990 proc check_effective_target_simulator { } {
6992 # All "src/sim" simulators set this one.
6993 if [board_info target exists is_simulator] {
6994 return [board_info target is_simulator]
6997 # The "sid" simulators don't set that one, but at least they set
6999 if [board_info target exists slow_simulator] {
7000 return [board_info target slow_simulator]
7006 # Return 1 if programs are intended to be run on hardware rather than
7009 proc check_effective_target_hw { } {
7011 # All "src/sim" simulators set this one.
7012 if [board_info target exists is_simulator] {
7013 if [board_info target is_simulator] {
7020 # The "sid" simulators don't set that one, but at least they set
7022 if [board_info target exists slow_simulator] {
7023 if [board_info target slow_simulator] {
7033 # Return 1 if the target is a VxWorks kernel.
7035 proc check_effective_target_vxworks_kernel { } {
7036 return [check_no_compiler_messages vxworks_kernel assembly {
7037 #if !defined __vxworks || defined __RTP__
7043 # Return 1 if the target is a VxWorks RTP.
7045 proc check_effective_target_vxworks_rtp { } {
7046 return [check_no_compiler_messages vxworks_rtp assembly {
7047 #if !defined __vxworks || !defined __RTP__
7053 # Return 1 if the target is expected to provide wide character support.
7055 proc check_effective_target_wchar { } {
7056 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
7059 return [check_no_compiler_messages wchar assembly {
7064 # Return 1 if the target has <pthread.h>.
7066 proc check_effective_target_pthread_h { } {
7067 return [check_no_compiler_messages pthread_h assembly {
7068 #include <pthread.h>
7072 # Return 1 if the target can truncate a file from a file-descriptor,
7073 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
7074 # chsize. We test for a trivially functional truncation; no stubs.
7075 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
7076 # different function to be used.
7078 proc check_effective_target_fd_truncate { } {
7080 #define _FILE_OFFSET_BITS 64
7087 FILE *f = fopen ("tst.tmp", "wb");
7089 const char t[] = "test writing more than ten characters";
7093 write (fd, t, sizeof (t) - 1);
7095 if (ftruncate (fd, 10) != 0)
7104 f = fopen ("tst.tmp", "rb");
7105 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
7113 if { [check_runtime ftruncate $prog] } {
7117 regsub "ftruncate" $prog "chsize" prog
7118 return [check_runtime chsize $prog]
7121 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
7123 proc add_options_for_c99_runtime { flags } {
7124 if { [istarget *-*-solaris2*] } {
7125 return "$flags -std=c99"
7127 if { [istarget powerpc-*-darwin*] } {
7128 return "$flags -mmacosx-version-min=10.3"
7133 # Add to FLAGS all the target-specific flags needed to enable
7134 # full IEEE compliance mode.
7136 proc add_options_for_ieee { flags } {
7137 if { [istarget alpha*-*-*]
7138 || [istarget sh*-*-*] } {
7139 return "$flags -mieee"
7141 if { [istarget rx-*-*] } {
7142 return "$flags -mnofpu"
7147 if {![info exists flags_to_postpone]} {
7148 set flags_to_postpone ""
7151 # Add to FLAGS the flags needed to enable functions to bind locally
7152 # when using pic/PIC passes in the testsuite.
7153 proc add_options_for_bind_pic_locally { flags } {
7154 global flags_to_postpone
7156 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
7157 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
7158 # order to make sure that the multilib_flags doesn't override this.
7160 if {[check_no_compiler_messages using_pic2 assembly {
7165 set flags_to_postpone "-fPIE"
7168 if {[check_no_compiler_messages using_pic1 assembly {
7173 set flags_to_postpone "-fpie"
7179 # Add to FLAGS the flags needed to enable 64-bit vectors.
7181 proc add_options_for_double_vectors { flags } {
7182 if [is-effective-target arm_neon_ok] {
7183 return "$flags -mvectorize-with-neon-double"
7189 # Add to FLAGS the flags needed to define the STACK_SIZE macro.
7191 proc add_options_for_stack_size { flags } {
7192 if [is-effective-target stack_size] {
7193 set stack_size [dg-effective-target-value stack_size]
7194 return "$flags -DSTACK_SIZE=$stack_size"
7200 # Return 1 if the target provides a full C99 runtime.
7202 proc check_effective_target_c99_runtime { } {
7203 return [check_cached_effective_target c99_runtime {
7206 set file [open "$srcdir/gcc.dg/builtins-config.h"]
7207 set contents [read $file]
7210 #ifndef HAVE_C99_RUNTIME
7211 #error !HAVE_C99_RUNTIME
7214 check_no_compiler_messages_nocache c99_runtime assembly \
7215 $contents [add_options_for_c99_runtime ""]
7219 # Return 1 if the target provides the D runtime.
7221 proc check_effective_target_d_runtime { } {
7222 return [check_no_compiler_messages d_runtime executable {
7226 extern(C) int main() {
7232 # Return 1 if target wchar_t is at least 4 bytes.
7234 proc check_effective_target_4byte_wchar_t { } {
7235 return [check_no_compiler_messages 4byte_wchar_t object {
7236 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
7240 # Return 1 if the target supports automatic stack alignment.
7242 proc check_effective_target_automatic_stack_alignment { } {
7243 # Ordinarily x86 supports automatic stack alignment ...
7244 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
7245 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
7246 # ... except Win64 SEH doesn't. Succeed for Win32 though.
7247 return [check_effective_target_ilp32];
7254 # Return true if we are compiling for AVX target.
7256 proc check_avx_available { } {
7257 if { [check_no_compiler_messages avx_available assembly {
7267 # Return true if we are compiling for AVX2 target.
7269 proc check_avx2_available { } {
7270 if { [check_no_compiler_messages avx_available assembly {
7280 # Return true if we are compiling for SSSE3 target.
7282 proc check_ssse3_available { } {
7283 if { [check_no_compiler_messages sse3a_available assembly {
7293 # Return true if 32- and 16-bytes vectors are available.
7295 proc check_effective_target_vect_sizes_32B_16B { } {
7296 return [expr { [available_vector_sizes] == [list 256 128] }]
7299 # Return true if 16- and 8-bytes vectors are available.
7301 proc check_effective_target_vect_sizes_16B_8B { } {
7302 if { [check_avx_available]
7303 || [is-effective-target arm_neon]
7304 || [istarget aarch64*-*-*] } {
7312 # Return true if 128-bits vectors are preferred even if 256-bits vectors
7315 proc check_prefer_avx128 { } {
7316 if ![check_avx_available] {
7319 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
7320 float a[1024],b[1024],c[1024];
7321 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
7322 } "-O2 -ftree-vectorize"]
7326 # Return 1 if avx512f instructions can be compiled.
7328 proc check_effective_target_avx512f { } {
7329 return [check_no_compiler_messages avx512f object {
7330 typedef double __m512d __attribute__ ((__vector_size__ (64)));
7331 typedef double __m128d __attribute__ ((__vector_size__ (16)));
7333 __m512d _mm512_add (__m512d a)
7335 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
7338 __m128d _mm128_add (__m128d a)
7340 return __builtin_ia32_addsd_round (a, a, 8);
7343 __m128d _mm128_getmant (__m128d a)
7345 return __builtin_ia32_getmantsd_round (a, a, 0, 8);
7350 # Return 1 if avx instructions can be compiled.
7352 proc check_effective_target_avx { } {
7353 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
7356 return [check_no_compiler_messages avx object {
7357 void _mm256_zeroall (void)
7359 __builtin_ia32_vzeroall ();
7364 # Return 1 if avx2 instructions can be compiled.
7365 proc check_effective_target_avx2 { } {
7366 return [check_no_compiler_messages avx2 object {
7367 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
7369 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
7371 return __builtin_ia32_andnotsi256 (__X, __Y);
7376 # Return 1 if sse instructions can be compiled.
7377 proc check_effective_target_sse { } {
7378 return [check_no_compiler_messages sse object {
7381 __builtin_ia32_stmxcsr ();
7387 # Return 1 if sse2 instructions can be compiled.
7388 proc check_effective_target_sse2 { } {
7389 return [check_no_compiler_messages sse2 object {
7390 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7392 __m128i _mm_srli_si128 (__m128i __A, int __N)
7394 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
7399 # Return 1 if sse4.1 instructions can be compiled.
7400 proc check_effective_target_sse4 { } {
7401 return [check_no_compiler_messages sse4.1 object {
7402 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7403 typedef int __v4si __attribute__ ((__vector_size__ (16)));
7405 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
7407 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
7413 # Return 1 if F16C instructions can be compiled.
7415 proc check_effective_target_f16c { } {
7416 return [check_no_compiler_messages f16c object {
7417 #include "immintrin.h"
7419 foo (unsigned short val)
7421 return _cvtsh_ss (val);
7426 proc check_effective_target_ms_hook_prologue { } {
7427 if { [check_no_compiler_messages ms_hook_prologue object {
7428 void __attribute__ ((__ms_hook_prologue__)) foo ();
7436 # Return 1 if 3dnow instructions can be compiled.
7437 proc check_effective_target_3dnow { } {
7438 return [check_no_compiler_messages 3dnow object {
7439 typedef int __m64 __attribute__ ((__vector_size__ (8)));
7440 typedef float __v2sf __attribute__ ((__vector_size__ (8)));
7442 __m64 _m_pfadd (__m64 __A, __m64 __B)
7444 return (__m64) __builtin_ia32_pfadd ((__v2sf)__A, (__v2sf)__B);
7449 # Return 1 if sse3 instructions can be compiled.
7450 proc check_effective_target_sse3 { } {
7451 return [check_no_compiler_messages sse3 object {
7452 typedef double __m128d __attribute__ ((__vector_size__ (16)));
7453 typedef double __v2df __attribute__ ((__vector_size__ (16)));
7455 __m128d _mm_addsub_pd (__m128d __X, __m128d __Y)
7457 return (__m128d) __builtin_ia32_addsubpd ((__v2df)__X, (__v2df)__Y);
7462 # Return 1 if ssse3 instructions can be compiled.
7463 proc check_effective_target_ssse3 { } {
7464 return [check_no_compiler_messages ssse3 object {
7465 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7466 typedef int __v4si __attribute__ ((__vector_size__ (16)));
7468 __m128i _mm_abs_epi32 (__m128i __X)
7470 return (__m128i) __builtin_ia32_pabsd128 ((__v4si)__X);
7475 # Return 1 if aes instructions can be compiled.
7476 proc check_effective_target_aes { } {
7477 return [check_no_compiler_messages aes object {
7478 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7479 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
7481 __m128i _mm_aesimc_si128 (__m128i __X)
7483 return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
7488 # Return 1 if vaes instructions can be compiled.
7489 proc check_effective_target_vaes { } {
7490 return [check_no_compiler_messages vaes object {
7491 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7492 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
7494 __m128i _mm_aesimc_si128 (__m128i __X)
7496 return (__m128i) __builtin_ia32_aesimc128 ((__v2di)__X);
7498 } "-O2 -maes -mavx" ]
7501 # Return 1 if pclmul instructions can be compiled.
7502 proc check_effective_target_pclmul { } {
7503 return [check_no_compiler_messages pclmul object {
7504 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7505 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
7507 __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
7509 return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
7516 # Return 1 if vpclmul instructions can be compiled.
7517 proc check_effective_target_vpclmul { } {
7518 return [check_no_compiler_messages vpclmul object {
7519 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7520 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
7522 __m128i pclmulqdq_test (__m128i __X, __m128i __Y)
7524 return (__m128i) __builtin_ia32_pclmulqdq128 ((__v2di)__X,
7528 } "-O2 -mpclmul -mavx" ]
7531 # Return 1 if sse4a instructions can be compiled.
7532 proc check_effective_target_sse4a { } {
7533 return [check_no_compiler_messages sse4a object {
7534 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7535 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
7537 __m128i _mm_insert_si64 (__m128i __X,__m128i __Y)
7539 return (__m128i) __builtin_ia32_insertq ((__v2di)__X, (__v2di)__Y);
7544 # Return 1 if fma4 instructions can be compiled.
7545 proc check_effective_target_fma4 { } {
7546 return [check_no_compiler_messages fma4 object {
7547 typedef float __m128 __attribute__ ((__vector_size__ (16)));
7548 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
7549 __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
7551 return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,
7558 # Return 1 if fma instructions can be compiled.
7559 proc check_effective_target_fma { } {
7560 return [check_no_compiler_messages fma object {
7561 typedef float __m128 __attribute__ ((__vector_size__ (16)));
7562 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
7563 __m128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
7565 return (__m128) __builtin_ia32_vfmaddps ((__v4sf)__A,
7572 # Return 1 if xop instructions can be compiled.
7573 proc check_effective_target_xop { } {
7574 return [check_no_compiler_messages xop object {
7575 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7576 typedef short __v8hi __attribute__ ((__vector_size__ (16)));
7577 __m128i _mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C)
7579 return (__m128i) __builtin_ia32_vpmacssww ((__v8hi)__A,
7586 # Return 1 if lzcnt instruction can be compiled.
7587 proc check_effective_target_lzcnt { } {
7588 return [check_no_compiler_messages lzcnt object {
7589 unsigned short _lzcnt (unsigned short __X)
7591 return __builtin_clzs (__X);
7596 # Return 1 if bmi instructions can be compiled.
7597 proc check_effective_target_bmi { } {
7598 return [check_no_compiler_messages bmi object {
7599 unsigned int __bextr_u32 (unsigned int __X, unsigned int __Y)
7601 return __builtin_ia32_bextr_u32 (__X, __Y);
7606 # Return 1 if ADX instructions can be compiled.
7607 proc check_effective_target_adx { } {
7608 return [check_no_compiler_messages adx object {
7610 _adxcarry_u32 (unsigned char __CF, unsigned int __X,
7611 unsigned int __Y, unsigned int *__P)
7613 return __builtin_ia32_addcarryx_u32 (__CF, __X, __Y, __P);
7618 # Return 1 if rtm instructions can be compiled.
7619 proc check_effective_target_rtm { } {
7620 return [check_no_compiler_messages rtm object {
7624 return __builtin_ia32_xend ();
7629 # Return 1 if avx512vl instructions can be compiled.
7630 proc check_effective_target_avx512vl { } {
7631 return [check_no_compiler_messages avx512vl object {
7632 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
7634 mm256_and_epi64 (__v4di __X, __v4di __Y)
7637 return __builtin_ia32_pandq256_mask (__X, __Y, __W, -1);
7642 # Return 1 if avx512cd instructions can be compiled.
7643 proc check_effective_target_avx512cd { } {
7644 return [check_no_compiler_messages avx512cd_trans object {
7645 typedef long long __v8di __attribute__ ((__vector_size__ (64)));
7647 _mm512_conflict_epi64 (__v8di __W, __v8di __A)
7649 return (__v8di) __builtin_ia32_vpconflictdi_512_mask ((__v8di) __A,
7653 } "-Wno-psabi -mavx512cd" ]
7656 # Return 1 if avx512er instructions can be compiled.
7657 proc check_effective_target_avx512er { } {
7658 return [check_no_compiler_messages avx512er_trans object {
7659 typedef float __v16sf __attribute__ ((__vector_size__ (64)));
7661 mm512_exp2a23_ps (__v16sf __X)
7663 return __builtin_ia32_exp2ps_mask (__X, __X, -1, 4);
7665 } "-Wno-psabi -mavx512er" ]
7668 # Return 1 if sha instructions can be compiled.
7669 proc check_effective_target_sha { } {
7670 return [check_no_compiler_messages sha object {
7671 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7672 typedef int __v4si __attribute__ ((__vector_size__ (16)));
7674 __m128i _mm_sha1msg1_epu32 (__m128i __X, __m128i __Y)
7676 return (__m128i) __builtin_ia32_sha1msg1 ((__v4si)__X,
7682 # Return 1 if avx512dq instructions can be compiled.
7683 proc check_effective_target_avx512dq { } {
7684 return [check_no_compiler_messages avx512dq object {
7685 typedef long long __v8di __attribute__ ((__vector_size__ (64)));
7687 _mm512_mask_mullo_epi64 (__v8di __W, __v8di __A, __v8di __B)
7689 return (__v8di) __builtin_ia32_pmullq512_mask ((__v8di) __A,
7697 # Return 1 if avx512bw instructions can be compiled.
7698 proc check_effective_target_avx512bw { } {
7699 return [check_no_compiler_messages avx512bw object {
7700 typedef short __v32hi __attribute__ ((__vector_size__ (64)));
7702 _mm512_mask_mulhrs_epi16 (__v32hi __W, __v32hi __A, __v32hi __B)
7704 return (__v32hi) __builtin_ia32_pmulhrsw512_mask ((__v32hi) __A,
7712 # Return 1 if avx512ifma instructions can be compiled.
7713 proc check_effective_target_avx512ifma { } {
7714 return [check_no_compiler_messages avx512ifma object {
7715 typedef long long __v8di __attribute__ ((__vector_size__ (64)));
7717 _mm512_madd52lo_epu64 (__v8di __X, __v8di __Y, __v8di __Z)
7719 return (__v8di) __builtin_ia32_vpmadd52luq512_mask ((__v8di) __X,
7727 # Return 1 if avx512vbmi instructions can be compiled.
7728 proc check_effective_target_avx512vbmi { } {
7729 return [check_no_compiler_messages avx512vbmi object {
7730 typedef char __v64qi __attribute__ ((__vector_size__ (64)));
7732 _mm512_multishift_epi64_epi8 (__v64qi __X, __v64qi __Y)
7734 return (__v64qi) __builtin_ia32_vpmultishiftqb512_mask ((__v64qi) __X,
7742 # Return 1 if avx512_4fmaps instructions can be compiled.
7743 proc check_effective_target_avx5124fmaps { } {
7744 return [check_no_compiler_messages avx5124fmaps object {
7745 typedef float __v16sf __attribute__ ((__vector_size__ (64)));
7746 typedef float __v4sf __attribute__ ((__vector_size__ (16)));
7749 _mm512_mask_4fmadd_ps (__v16sf __DEST, __v16sf __A, __v16sf __B, __v16sf __C,
7750 __v16sf __D, __v16sf __E, __v4sf *__F)
7752 return (__v16sf) __builtin_ia32_4fmaddps_mask ((__v16sf) __A,
7757 (const __v4sf *) __F,
7761 } "-mavx5124fmaps" ]
7764 # Return 1 if avx512_4vnniw instructions can be compiled.
7765 proc check_effective_target_avx5124vnniw { } {
7766 return [check_no_compiler_messages avx5124vnniw object {
7767 typedef int __v16si __attribute__ ((__vector_size__ (64)));
7768 typedef int __v4si __attribute__ ((__vector_size__ (16)));
7771 _mm512_4dpwssd_epi32 (__v16si __A, __v16si __B, __v16si __C,
7772 __v16si __D, __v16si __E, __v4si *__F)
7774 return (__v16si) __builtin_ia32_vp4dpwssd ((__v16si) __B,
7779 (const __v4si *) __F);
7781 } "-mavx5124vnniw" ]
7784 # Return 1 if avx512_vpopcntdq instructions can be compiled.
7785 proc check_effective_target_avx512vpopcntdq { } {
7786 return [check_no_compiler_messages avx512vpopcntdq object {
7787 typedef int __v16si __attribute__ ((__vector_size__ (64)));
7790 _mm512_popcnt_epi32 (__v16si __A)
7792 return (__v16si) __builtin_ia32_vpopcountd_v16si ((__v16si) __A);
7794 } "-mavx512vpopcntdq" ]
7797 # Return 1 if 128 or 256-bit avx512_vpopcntdq instructions can be compiled.
7798 proc check_effective_target_avx512vpopcntdqvl { } {
7799 return [check_no_compiler_messages avx512vpopcntdqvl object {
7800 typedef int __v8si __attribute__ ((__vector_size__ (32)));
7803 _mm256_popcnt_epi32 (__v8si __A)
7805 return (__v8si) __builtin_ia32_vpopcountd_v8si ((__v8si) __A);
7807 } "-mavx512vpopcntdq -mavx512vl" ]
7810 # Return 1 if gfni instructions can be compiled.
7811 proc check_effective_target_gfni { } {
7812 return [check_no_compiler_messages gfni object {
7813 typedef char __v16qi __attribute__ ((__vector_size__ (16)));
7816 _mm_gf2p8affineinv_epi64_epi8 (__v16qi __A, __v16qi __B, const int __C)
7818 return (__v16qi) __builtin_ia32_vgf2p8affineinvqb_v16qi ((__v16qi) __A,
7825 # Return 1 if avx512vbmi2 instructions can be compiled.
7826 proc check_effective_target_avx512vbmi2 { } {
7827 return [check_no_compiler_messages avx512vbmi2 object {
7828 typedef char __v16qi __attribute__ ((__vector_size__ (16)));
7829 typedef unsigned long long __mmask16;
7832 _mm_mask_compress_epi8 (__v16qi __A, __mmask16 __B, __v16qi __C)
7834 return (__v16qi) __builtin_ia32_compressqi128_mask((__v16qi)__C,
7838 } "-mavx512vbmi2 -mavx512vl" ]
7841 # Return 1 if avx512vbmi2 instructions can be compiled.
7842 proc check_effective_target_avx512vnni { } {
7843 return [check_no_compiler_messages avx512vnni object {
7844 typedef int __v16si __attribute__ ((__vector_size__ (64)));
7847 _mm_mask_compress_epi8 (__v16si __A, __v16si __B, __v16si __C)
7849 return (__v16si) __builtin_ia32_vpdpbusd_v16si ((__v16si)__A,
7853 } "-mavx512vnni -mavx512f" ]
7856 # Return 1 if vaes instructions can be compiled.
7857 proc check_effective_target_avx512vaes { } {
7858 return [check_no_compiler_messages avx512vaes object {
7860 typedef int __v16si __attribute__ ((__vector_size__ (64)));
7863 _mm256_aesdec_epi128 (__v32qi __A, __v32qi __B)
7865 return (__v32qi)__builtin_ia32_vaesdec_v32qi ((__v32qi) __A, (__v32qi) __B);
7870 # Return 1 if vpclmulqdq instructions can be compiled.
7871 proc check_effective_target_vpclmulqdq { } {
7872 return [check_no_compiler_messages vpclmulqdq object {
7873 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
7876 _mm256_clmulepi64_epi128 (__v4di __A, __v4di __B)
7878 return (__v4di) __builtin_ia32_vpclmulqdq_v4di (__A, __B, 0);
7880 } "-mvpclmulqdq -mavx512vl" ]
7883 # Return 1 if avx512_bitalg instructions can be compiled.
7884 proc check_effective_target_avx512bitalg { } {
7885 return [check_no_compiler_messages avx512bitalg object {
7886 typedef short int __v32hi __attribute__ ((__vector_size__ (64)));
7889 _mm512_popcnt_epi16 (__v32hi __A)
7891 return (__v32hi) __builtin_ia32_vpopcountw_v32hi ((__v32hi) __A);
7893 } "-mavx512bitalg" ]
7896 # Return 1 if C wchar_t type is compatible with char16_t.
7898 proc check_effective_target_wchar_t_char16_t_compatible { } {
7899 return [check_no_compiler_messages wchar_t_char16_t object {
7901 __CHAR16_TYPE__ *p16 = &wc;
7902 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7906 # Return 1 if C wchar_t type is compatible with char32_t.
7908 proc check_effective_target_wchar_t_char32_t_compatible { } {
7909 return [check_no_compiler_messages wchar_t_char32_t object {
7911 __CHAR32_TYPE__ *p32 = &wc;
7912 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7916 # Return 1 if pow10 function exists.
7918 proc check_effective_target_pow10 { } {
7919 return [check_runtime pow10 {
7929 # Return 1 if frexpl function exists.
7931 proc check_effective_target_frexpl { } {
7932 return [check_runtime frexpl {
7937 x = frexpl (5.0, &y);
7944 # Return 1 if issignaling function exists.
7945 proc check_effective_target_issignaling {} {
7946 return [check_runtime issignaling {
7951 return issignaling (0.0);
7956 # Return 1 if current options generate DFP instructions, 0 otherwise.
7957 proc check_effective_target_hard_dfp {} {
7958 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
7959 typedef float d64 __attribute__((mode(DD)));
7961 void foo (void) { z = x + y; }
7965 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
7966 # for strchr etc. functions.
7968 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
7969 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
7972 #if !defined(__cplusplus) \
7973 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
7974 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
7975 ISO C++ correct string.h and wchar.h protos not supported.
7982 # Return 1 if GNU as is used.
7984 proc check_effective_target_gas { } {
7985 global use_gas_saved
7988 if {![info exists use_gas_saved]} {
7989 # Check if the as used by gcc is GNU as.
7990 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
7991 # Provide /dev/null as input, otherwise gas times out reading from
7993 set status [remote_exec host "$gcc_as" "-v /dev/null"]
7994 set as_output [lindex $status 1]
7995 if { [ string first "GNU" $as_output ] >= 0 } {
8001 return $use_gas_saved
8004 # Return 1 if GNU ld is used.
8006 proc check_effective_target_gld { } {
8007 global use_gld_saved
8010 if {![info exists use_gld_saved]} {
8011 # Check if the ld used by gcc is GNU ld.
8012 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
8013 set status [remote_exec host "$gcc_ld" "--version"]
8014 set ld_output [lindex $status 1]
8015 if { [ string first "GNU" $ld_output ] >= 0 } {
8021 return $use_gld_saved
8024 # Return 1 if the compiler has been configure with link-time optimization
8027 proc check_effective_target_lto { } {
8028 if { [istarget nvptx-*-*] } {
8031 return [check_no_compiler_messages lto object {
8036 # Return 1 if the compiler and linker support incremental link-time
8039 proc check_effective_target_lto_incremental { } {
8040 if ![check_effective_target_lto] {
8043 return [check_no_compiler_messages lto_incremental executable {
8044 int main () { return 0; }
8045 } "-flto -r -nostdlib"]
8048 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
8050 proc check_effective_target_maybe_x32 { } {
8051 return [check_no_compiler_messages maybe_x32 object {
8053 } "-mx32 -maddress-mode=short"]
8056 # Return 1 if this target supports the -fsplit-stack option, 0
8059 proc check_effective_target_split_stack {} {
8060 return [check_no_compiler_messages split_stack object {
8065 # Return 1 if this target supports the -masm=intel option, 0
8068 proc check_effective_target_masm_intel {} {
8069 return [check_no_compiler_messages masm_intel object {
8070 extern void abort (void);
8074 # Return 1 if the language for the compiler under test is C.
8076 proc check_effective_target_c { } {
8078 if [string match $tool "gcc"] {
8084 # Return 1 if the language for the compiler under test is C++.
8086 proc check_effective_target_c++ { } {
8088 if { [string match $tool "g++"] || [string match $tool "libstdc++"] } {
8094 set cxx_default "c++14"
8095 # Check whether the current active language standard supports the features
8096 # of C++11/C++14 by checking for the presence of one of the -std flags.
8097 # This assumes that the default for the compiler is $cxx_default, and that
8098 # there will never be multiple -std= arguments on the command line.
8099 proc check_effective_target_c++11_only { } {
8101 if ![check_effective_target_c++] {
8104 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
8107 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
8112 proc check_effective_target_c++11 { } {
8113 if [check_effective_target_c++11_only] {
8116 return [check_effective_target_c++14]
8118 proc check_effective_target_c++11_down { } {
8119 if ![check_effective_target_c++] {
8122 return [expr ![check_effective_target_c++14] ]
8125 proc check_effective_target_c++14_only { } {
8127 if ![check_effective_target_c++] {
8130 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
8133 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
8139 proc check_effective_target_c++14 { } {
8140 if [check_effective_target_c++14_only] {
8143 return [check_effective_target_c++17]
8145 proc check_effective_target_c++14_down { } {
8146 if ![check_effective_target_c++] {
8149 return [expr ![check_effective_target_c++17] ]
8152 proc check_effective_target_c++98_only { } {
8154 if ![check_effective_target_c++] {
8157 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
8160 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
8166 proc check_effective_target_c++17_only { } {
8168 if ![check_effective_target_c++] {
8171 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
8174 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
8180 proc check_effective_target_c++17 { } {
8181 if [check_effective_target_c++17_only] {
8184 return [check_effective_target_c++2a]
8186 proc check_effective_target_c++17_down { } {
8187 if ![check_effective_target_c++] {
8190 return [expr ![check_effective_target_c++2a] ]
8193 proc check_effective_target_c++2a_only { } {
8195 if ![check_effective_target_c++] {
8198 if [check-flags { { } { } { -std=c++2a -std=gnu++2a } }] {
8201 if { $cxx_default == "c++20" && [check-flags { { } { } { } { -std=* } }] } {
8206 proc check_effective_target_c++2a { } {
8207 return [check_effective_target_c++2a_only]
8210 # Check for C++ Concepts TS support, i.e. -fconcepts flag.
8211 proc check_effective_target_concepts { } {
8212 return [check-flags { "" { } { -fconcepts } }]
8215 # Return 1 if expensive testcases should be run.
8217 proc check_effective_target_run_expensive_tests { } {
8218 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
8224 # Returns 1 if "mempcpy" is available on the target system.
8226 proc check_effective_target_mempcpy {} {
8227 return [check_function_available "mempcpy"]
8230 # Returns 1 if "stpcpy" is available on the target system.
8232 proc check_effective_target_stpcpy {} {
8233 return [check_function_available "stpcpy"]
8236 # Check whether the vectorizer tests are supported by the target and
8237 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
8238 # If a port wants to execute the tests more than once it should append
8239 # the supported target to EFFECTIVE_TARGETS instead, and the compile flags
8240 # will be added by a call to add_options_for_<target>.
8241 # Set dg-do-what-default to either compile or run, depending on target
8242 # capabilities. Do not set this if the supported target is appended to
8243 # EFFECTIVE_TARGETS. Flags and this variable will be set by et-dg-runtest
8244 # automatically. Return the number of effective targets if vectorizer tests
8245 # are supported, 0 otherwise.
8247 proc check_vect_support_and_set_flags { } {
8248 global DEFAULT_VECTCFLAGS
8249 global dg-do-what-default
8250 global EFFECTIVE_TARGETS
8252 if [istarget powerpc-*paired*] {
8253 lappend DEFAULT_VECTCFLAGS "-mpaired"
8254 if [check_750cl_hw_available] {
8255 set dg-do-what-default run
8257 set dg-do-what-default compile
8259 } elseif [istarget powerpc*-*-*] {
8260 # Skip targets not supporting -maltivec.
8261 if ![is-effective-target powerpc_altivec_ok] {
8265 lappend DEFAULT_VECTCFLAGS "-maltivec"
8266 if [check_p9vector_hw_available] {
8267 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
8268 } elseif [check_p8vector_hw_available] {
8269 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
8270 } elseif [check_vsx_hw_available] {
8271 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
8274 if [check_vmx_hw_available] {
8275 set dg-do-what-default run
8277 if [is-effective-target ilp32] {
8278 # Specify a cpu that supports VMX for compile-only tests.
8279 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
8281 set dg-do-what-default compile
8283 } elseif { [istarget spu-*-*] } {
8284 set dg-do-what-default run
8285 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8286 lappend DEFAULT_VECTCFLAGS "-msse2"
8287 if { [check_effective_target_sse2_runtime] } {
8288 set dg-do-what-default run
8290 set dg-do-what-default compile
8292 } elseif { [istarget mips*-*-*]
8293 && [check_effective_target_nomips16] } {
8294 if { [check_effective_target_mpaired_single] } {
8295 lappend EFFECTIVE_TARGETS mpaired_single
8297 if { [check_effective_target_mips_loongson_mmi] } {
8298 lappend EFFECTIVE_TARGETS mips_loongson_mmi
8300 if { [check_effective_target_mips_msa] } {
8301 lappend EFFECTIVE_TARGETS mips_msa
8303 return [llength $EFFECTIVE_TARGETS]
8304 } elseif [istarget sparc*-*-*] {
8305 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
8306 if [check_effective_target_ultrasparc_hw] {
8307 set dg-do-what-default run
8309 set dg-do-what-default compile
8311 } elseif [istarget alpha*-*-*] {
8312 # Alpha's vectorization capabilities are extremely limited.
8313 # It's more effort than its worth disabling all of the tests
8314 # that it cannot pass. But if you actually want to see what
8315 # does work, command out the return.
8318 lappend DEFAULT_VECTCFLAGS "-mmax"
8319 if [check_alpha_max_hw_available] {
8320 set dg-do-what-default run
8322 set dg-do-what-default compile
8324 } elseif [istarget ia64-*-*] {
8325 set dg-do-what-default run
8326 } elseif [is-effective-target arm_neon_ok] {
8327 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
8328 # NEON does not support denormals, so is not used for vectorization by
8329 # default to avoid loss of precision. We must pass -ffast-math to test
8330 # vectorization of float operations.
8331 lappend DEFAULT_VECTCFLAGS "-ffast-math"
8332 if [is-effective-target arm_neon_hw] {
8333 set dg-do-what-default run
8335 set dg-do-what-default compile
8337 } elseif [istarget "aarch64*-*-*"] {
8338 set dg-do-what-default run
8339 } elseif [istarget s390*-*-*] {
8340 # The S/390 backend set a default of 2 for that value.
8341 # Override it to have the same situation as with other
8343 lappend DEFAULT_VECTCFLAGS "--param" "min-vect-loop-bound=1"
8344 lappend DEFAULT_VECTCFLAGS "--param" "max-unrolled-insns=200"
8345 lappend DEFAULT_VECTCFLAGS "--param" "max-unroll-times=8"
8346 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peeled-insns=200"
8347 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peel-times=16"
8348 if [check_effective_target_s390_vxe] {
8349 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
8350 set dg-do-what-default run
8351 } elseif [check_effective_target_s390_vx] {
8352 lappend DEFAULT_VECTCFLAGS "-march=z13" "-mzarch"
8353 set dg-do-what-default run
8355 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
8356 set dg-do-what-default compile
8365 # Return 1 if the target does *not* require strict alignment.
8367 proc check_effective_target_non_strict_align {} {
8369 # On ARM, the default is to use STRICT_ALIGNMENT, but there
8370 # are interfaces defined for misaligned access and thus
8371 # depending on the architecture levels unaligned access is
8373 if [istarget "arm*-*-*"] {
8374 return [check_effective_target_arm_unaligned]
8377 return [check_no_compiler_messages non_strict_align assembly {
8379 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
8381 void foo(void) { z = (c *) y; }
8385 # Return 1 if the target has <ucontext.h>.
8387 proc check_effective_target_ucontext_h { } {
8388 return [check_no_compiler_messages ucontext_h assembly {
8389 #include <ucontext.h>
8393 proc check_effective_target_aarch64_tiny { } {
8394 if { [istarget aarch64*-*-*] } {
8395 return [check_no_compiler_messages aarch64_tiny object {
8396 #ifdef __AARCH64_CMODEL_TINY__
8399 #error target not AArch64 tiny code model
8407 # Create functions to check that the AArch64 assembler supports the
8408 # various architecture extensions via the .arch_extension pseudo-op.
8410 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve"} {
8411 eval [string map [list FUNC $aarch64_ext] {
8412 proc check_effective_target_aarch64_asm_FUNC_ok { } {
8413 if { [istarget aarch64*-*-*] } {
8414 return [check_no_compiler_messages aarch64_FUNC_assembler object {
8415 __asm__ (".arch_extension FUNC");
8416 } "-march=armv8-a+FUNC"]
8424 proc check_effective_target_aarch64_small { } {
8425 if { [istarget aarch64*-*-*] } {
8426 return [check_no_compiler_messages aarch64_small object {
8427 #ifdef __AARCH64_CMODEL_SMALL__
8430 #error target not AArch64 small code model
8438 proc check_effective_target_aarch64_large { } {
8439 if { [istarget aarch64*-*-*] } {
8440 return [check_no_compiler_messages aarch64_large object {
8441 #ifdef __AARCH64_CMODEL_LARGE__
8444 #error target not AArch64 large code model
8453 # Return 1 if this is a reduced AVR Tiny core. Such cores have different
8454 # register set, instruction set, addressing capabilities and ABI.
8456 proc check_effective_target_avr_tiny { } {
8457 if { [istarget avr*-*-*] } {
8458 return [check_no_compiler_messages avr_tiny object {
8462 #error target not a reduced AVR Tiny core
8470 # Return 1 if <fenv.h> is available with all the standard IEEE
8471 # exceptions and floating-point exceptions are raised by arithmetic
8472 # operations. (If the target requires special options for "inexact"
8473 # exceptions, those need to be specified in the testcases.)
8475 proc check_effective_target_fenv_exceptions {} {
8476 return [check_runtime fenv_exceptions {
8479 #ifndef FE_DIVBYZERO
8480 # error Missing FE_DIVBYZERO
8483 # error Missing FE_INEXACT
8486 # error Missing FE_INVALID
8489 # error Missing FE_OVERFLOW
8491 #ifndef FE_UNDERFLOW
8492 # error Missing FE_UNDERFLOW
8494 volatile float a = 0.0f, r;
8499 if (fetestexcept (FE_INVALID))
8504 } [add_options_for_ieee "-std=gnu99"]]
8507 proc check_effective_target_tiny {} {
8508 return [check_cached_effective_target tiny {
8509 if { [istarget aarch64*-*-*]
8510 && [check_effective_target_aarch64_tiny] } {
8513 if { [istarget avr-*-*]
8514 && [check_effective_target_avr_tiny] } {
8521 # Return 1 if the target supports -mbranch-cost=N option.
8523 proc check_effective_target_branch_cost {} {
8524 if { [ istarget arm*-*-*]
8525 || [istarget avr*-*-*]
8526 || [istarget csky*-*-*]
8527 || [istarget epiphany*-*-*]
8528 || [istarget frv*-*-*]
8529 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8530 || [istarget mips*-*-*]
8531 || [istarget s390*-*-*]
8532 || [istarget riscv*-*-*]
8533 || [istarget sh*-*-*]
8534 || [istarget spu*-*-*] } {
8540 # Record that dg-final test TEST requires convential compilation.
8542 proc force_conventional_output_for { test } {
8543 if { [info proc $test] == "" } {
8544 perror "$test does not exist"
8547 proc ${test}_required_options {} {
8548 global gcc_force_conventional_output
8549 upvar 1 extra_tool_flags extra_tool_flags
8550 if {[regexp -- "^scan-assembler" [info level 0]]
8551 && ![string match "*-fident*" $extra_tool_flags]} {
8552 # Do not let .ident confuse assembler scan tests
8553 return [list $gcc_force_conventional_output "-fno-ident"]
8555 return $gcc_force_conventional_output
8559 # Record that dg-final test scan-ltrans-tree-dump* requires -flto-partition=one
8560 # in order to force a single partition, allowing scan-ltrans-tree-dump* to scan
8561 # a dump file *.exe.ltrans0.*.
8563 proc scan-ltrans-tree-dump_required_options {} {
8564 return "-flto-partition=one"
8566 proc scan-ltrans-tree-dump-times_required_options {} {
8567 return "-flto-partition=one"
8569 proc scan-ltrans-tree-dump-not_required_options {} {
8570 return "-flto-partition=one"
8572 proc scan-ltrans-tree-dump-dem_required_options {} {
8573 return "-flto-partition=one"
8575 proc scan-ltrans-tree-dump-dem-not_required_options {} {
8576 return "-flto-partition=one"
8579 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
8580 # otherwise. Cache the result.
8582 proc check_effective_target_pie_copyreloc { } {
8584 global GCC_UNDER_TEST
8586 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8590 # Need auto-host.h to check linker support.
8591 if { ![file exists ../../auto-host.h ] } {
8595 return [check_cached_effective_target pie_copyreloc {
8596 # Set up and compile to see if linker supports PIE with copy
8597 # reloc. Include the current process ID in the file names to
8598 # prevent conflicts with invocations for multiple testsuites.
8603 set f [open $src "w"]
8604 puts $f "#include \"../../auto-host.h\""
8605 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
8606 puts $f "# error Linker does not support PIE with copy reloc."
8610 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
8611 set lines [${tool}_target_compile $src $obj object ""]
8616 if [string match "" $lines] then {
8617 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
8620 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
8626 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
8627 # otherwise. Cache the result.
8629 proc check_effective_target_got32x_reloc { } {
8631 global GCC_UNDER_TEST
8633 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8637 # Need auto-host.h to check linker support.
8638 if { ![file exists ../../auto-host.h ] } {
8642 return [check_cached_effective_target got32x_reloc {
8643 # Include the current process ID in the file names to prevent
8644 # conflicts with invocations for multiple testsuites.
8646 set src got32x[pid].c
8647 set obj got32x[pid].o
8649 set f [open $src "w"]
8650 puts $f "#include \"../../auto-host.h\""
8651 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
8652 puts $f "# error Assembler does not support R_386_GOT32X."
8656 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
8657 set lines [${tool}_target_compile $src $obj object ""]
8662 if [string match "" $lines] then {
8663 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
8666 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
8671 return $got32x_reloc_available_saved
8674 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
8675 # 0 otherwise. Cache the result.
8677 proc check_effective_target_tls_get_addr_via_got { } {
8679 global GCC_UNDER_TEST
8681 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8685 # Need auto-host.h to check linker support.
8686 if { ![file exists ../../auto-host.h ] } {
8690 return [check_cached_effective_target tls_get_addr_via_got {
8691 # Include the current process ID in the file names to prevent
8692 # conflicts with invocations for multiple testsuites.
8694 set src tls_get_addr_via_got[pid].c
8695 set obj tls_get_addr_via_got[pid].o
8697 set f [open $src "w"]
8698 puts $f "#include \"../../auto-host.h\""
8699 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
8700 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
8704 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
8705 set lines [${tool}_target_compile $src $obj object ""]
8710 if [string match "" $lines] then {
8711 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
8714 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
8720 # Return 1 if the target uses comdat groups.
8722 proc check_effective_target_comdat_group {} {
8723 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat|\.group\[^\n\r]*,#comdat" assembly {
8725 inline int foo () { return 1; }
8730 # Return 1 if target supports __builtin_eh_return
8731 proc check_effective_target_builtin_eh_return { } {
8732 return [check_no_compiler_messages builtin_eh_return object {
8733 void test (long l, void *p)
8735 __builtin_eh_return (l, p);
8740 # Return 1 if the target supports max reduction for vectors.
8742 proc check_effective_target_vect_max_reduc { } {
8743 if { [istarget aarch64*-*-*] || [is-effective-target arm_neon] } {
8749 # Return 1 if there is an nvptx offload compiler.
8751 proc check_effective_target_offload_nvptx { } {
8752 return [check_no_compiler_messages offload_nvptx object {
8753 int main () {return 0;}
8754 } "-foffload=nvptx-none" ]
8757 # Return 1 if the compiler has been configured with hsa offloading.
8759 proc check_effective_target_offload_hsa { } {
8760 return [check_no_compiler_messages offload_hsa assembly {
8761 int main () {return 0;}
8765 # Return 1 if the target support -fprofile-update=atomic
8766 proc check_effective_target_profile_update_atomic {} {
8767 return [check_no_compiler_messages profile_update_atomic assembly {
8768 int main (void) { return 0; }
8769 } "-fprofile-update=atomic -fprofile-generate"]
8772 # Return 1 if vector (va - vector add) instructions are understood by
8773 # the assembler and can be executed. This also covers checking for
8774 # the VX kernel feature. A kernel without that feature does not
8775 # enable the vector facility and the following check will die with a
8777 proc check_effective_target_s390_vx { } {
8778 if ![istarget s390*-*-*] then {
8782 return [check_runtime s390_check_vx {
8785 asm ("va %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
8788 } "-march=z13 -mzarch" ]
8791 # Same as above but for the z14 vector enhancement facility. Test
8792 # is performed with the vector nand instruction.
8793 proc check_effective_target_s390_vxe { } {
8794 if ![istarget s390*-*-*] then {
8798 return [check_runtime s390_check_vxe {
8801 asm ("vnn %%v24, %%v26, %%v28" : : : "v24", "v26", "v28");
8804 } "-march=z14 -mzarch" ]
8807 #For versions of ARM architectures that have hardware div insn,
8808 #disable the divmod transform
8810 proc check_effective_target_arm_divmod_simode { } {
8811 return [check_no_compiler_messages arm_divmod assembly {
8812 #ifdef __ARM_ARCH_EXT_IDIV__
8819 # Return 1 if target supports divmod hardware insn or divmod libcall.
8821 proc check_effective_target_divmod { } {
8822 #TODO: Add checks for all targets that have either hardware divmod insn
8823 # or define libfunc for divmod.
8824 if { [istarget arm*-*-*]
8825 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8831 # Return 1 if target supports divmod for SImode. The reason for
8832 # separating this from check_effective_target_divmod is that
8833 # some versions of ARM architecture define div instruction
8834 # only for simode, and for these archs, we do not want to enable
8835 # divmod transform for simode.
8837 proc check_effective_target_divmod_simode { } {
8838 if { [istarget arm*-*-*] } {
8839 return [check_effective_target_arm_divmod_simode]
8842 return [check_effective_target_divmod]
8845 # Return 1 if store merging optimization is applicable for target.
8846 # Store merging is not profitable for targets like the avr which
8847 # can load/store only one byte at a time. Use int size as a proxy
8848 # for the number of bytes the target can write, and skip for targets
8849 # with a smallish (< 32) size.
8851 proc check_effective_target_store_merge { } {
8852 if { [is-effective-target non_strict_align ] && [is-effective-target int32plus] } {
8859 # Return 1 if we're able to assemble rdrand
8861 proc check_effective_target_rdrand { } {
8862 return [check_no_compiler_messages_nocache rdrand object {
8867 __builtin_ia32_rdrand32_step(&val);
8873 # Return 1 if the target supports coprocessor instructions: cdp, ldc, ldcl,
8874 # stc, stcl, mcr and mrc.
8875 proc check_effective_target_arm_coproc1_ok_nocache { } {
8876 if { ![istarget arm*-*-*] } {
8879 return [check_no_compiler_messages_nocache arm_coproc1_ok assembly {
8880 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 4
8886 proc check_effective_target_arm_coproc1_ok { } {
8887 return [check_cached_effective_target arm_coproc1_ok \
8888 check_effective_target_arm_coproc1_ok_nocache]
8891 # Return 1 if the target supports all coprocessor instructions checked by
8892 # check_effective_target_arm_coproc1_ok in addition to the following: cdp2,
8893 # ldc2, ldc2l, stc2, stc2l, mcr2 and mrc2.
8894 proc check_effective_target_arm_coproc2_ok_nocache { } {
8895 if { ![check_effective_target_arm_coproc1_ok] } {
8898 return [check_no_compiler_messages_nocache arm_coproc2_ok assembly {
8899 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 5
8905 proc check_effective_target_arm_coproc2_ok { } {
8906 return [check_cached_effective_target arm_coproc2_ok \
8907 check_effective_target_arm_coproc2_ok_nocache]
8910 # Return 1 if the target supports all coprocessor instructions checked by
8911 # check_effective_target_arm_coproc2_ok in addition the following: mcrr and
8913 proc check_effective_target_arm_coproc3_ok_nocache { } {
8914 if { ![check_effective_target_arm_coproc2_ok] } {
8917 return [check_no_compiler_messages_nocache arm_coproc3_ok assembly {
8918 #if (__thumb__ && !__thumb2__) \
8919 || (__ARM_ARCH < 6 && !defined (__ARM_ARCH_5TE__))
8925 proc check_effective_target_arm_coproc3_ok { } {
8926 return [check_cached_effective_target arm_coproc3_ok \
8927 check_effective_target_arm_coproc3_ok_nocache]
8930 # Return 1 if the target supports all coprocessor instructions checked by
8931 # check_effective_target_arm_coproc3_ok in addition the following: mcrr2 and
8933 proc check_effective_target_arm_coproc4_ok_nocache { } {
8934 if { ![check_effective_target_arm_coproc3_ok] } {
8937 return [check_no_compiler_messages_nocache arm_coproc4_ok assembly {
8938 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 6
8944 proc check_effective_target_arm_coproc4_ok { } {
8945 return [check_cached_effective_target arm_coproc4_ok \
8946 check_effective_target_arm_coproc4_ok_nocache]
8949 # Return 1 if the target supports the auto_inc_dec optimization pass.
8950 proc check_effective_target_autoincdec { } {
8951 if { ![check_no_compiler_messages auto_incdec assembly { void f () { }
8952 } "-O2 -fdump-rtl-auto_inc_dec" ] } {
8956 set dumpfile [glob -nocomplain "auto_incdec[pid].c.\[0-9\]\[0-9\]\[0-9\]r.auto_inc_dec"]
8957 if { [file exists $dumpfile ] } {
8958 file delete $dumpfile
8964 # Return 1 if the target has support for stack probing designed
8965 # to avoid stack-clash style attacks.
8967 # This is used to restrict the stack-clash mitigation tests to
8968 # just those targets that have been explicitly supported.
8970 # In addition to the prologue work on those targets, each target's
8971 # properties should be described in the functions below so that
8972 # tests do not become a mess of unreadable target conditions.
8974 proc check_effective_target_supports_stack_clash_protection { } {
8976 if { [istarget x86_64-*-*] || [istarget i?86-*-*]
8977 || [istarget powerpc*-*-*] || [istarget rs6000*-*-*]
8978 || [istarget aarch64*-**] || [istarget s390*-*-*] } {
8984 # Return 1 if the target creates a frame pointer for non-leaf functions
8985 # Note we ignore cases where we apply tail call optimization here.
8986 proc check_effective_target_frame_pointer_for_non_leaf { } {
8987 # Solaris/x86 defaults to -fno-omit-frame-pointer.
8988 if { [istarget i?86-*-solaris*] || [istarget x86_64-*-solaris*] } {
8995 # Return 1 if the target's calling sequence or its ABI
8996 # create implicit stack probes at or prior to function entry.
8997 proc check_effective_target_caller_implicit_probes { } {
8999 # On x86/x86_64 the call instruction itself pushes the return
9000 # address onto the stack. That is an implicit probe of *sp.
9001 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
9005 # On PPC, the ABI mandates that the address of the outer
9006 # frame be stored at *sp. Thus each allocation of stack
9007 # space is itself an implicit probe of *sp.
9008 if { [istarget powerpc*-*-*] || [istarget rs6000*-*-*] } {
9012 # s390's ABI has a register save area allocated by the
9013 # caller for use by the callee. The mere existence does
9014 # not constitute a probe by the caller, but when the slots
9015 # used by the callee those stores are implicit probes.
9016 if { [istarget s390*-*-*] } {
9020 # Not strictly true on aarch64, but we have agreed that we will
9021 # consider any function that pushes SP more than 3kbytes into
9022 # the guard page as broken. This essentially means that we can
9023 # consider the aarch64 as having a caller implicit probe at
9025 if { [istarget aarch64*-*-*] } {
9032 # Targets that potentially realign the stack pointer often cause residual
9033 # stack allocations and make it difficult to elimination loops or residual
9034 # allocations for dynamic stack allocations
9035 proc check_effective_target_callee_realigns_stack { } {
9036 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
9042 # Return 1 if CET instructions can be compiled.
9043 proc check_effective_target_cet { } {
9044 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
9047 return [check_no_compiler_messages cet object {
9055 # Return 1 if target supports floating point "infinite"
9056 proc check_effective_target_inf { } {
9057 return [check_no_compiler_messages supports_inf assembly {
9058 const double pinf = __builtin_inf ();