1 # Copyright (C) 1999-2017 Free Software Foundation, Inc.
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
20 # This file defines procs for determining features supported by the target.
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
34 # "! Fortran" for Fortran code,
36 # "// ObjC++" for ObjC++
38 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
39 # allow for ObjC/ObjC++ specific flags.
40 proc check_compile {basename type contents args} {
42 verbose "check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources] {
48 set tmp_additional_sources "$additional_sources"
49 set additional_sources ""
52 if { [llength $args] > 0 } {
53 set options [list "additional_flags=[lindex $args 0]"]
57 switch -glob -- $contents {
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default { set src ${basename}[pid].c }
72 set compile_type $type
74 assembly { set output ${basename}[pid].s }
75 object { set output ${basename}[pid].o }
76 executable { set output ${basename}[pid].exe }
78 set output ${basename}[pid].s
79 lappend options "additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines [${tool}_target_compile $src $output $compile_type "$options"]
89 set scan_output $output
90 # Don't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp "rtl-(.*)" $type dummy rtl_type] {
93 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources] {
99 set additional_sources "$tmp_additional_sources"
102 return [list $lines $scan_output]
105 proc current_target_name { } {
107 if [info exists target_info(target,name)] {
108 set answer $target_info(target,name)
115 # Implement an effective-target check for property PROP by invoking
116 # the Tcl command ARGS and seeing if it returns true.
118 proc check_cached_effective_target { prop args } {
122 set target [current_target_name]
123 if {![info exists et_cache($prop,target)]
124 || $et_cache($prop,target) != $target} {
125 verbose "check_cached_effective_target $prop: checking $target" 2
126 set et_cache($prop,target) $target
127 set et_cache($prop,value) [uplevel eval $args]
128 if {![info exists et_prop_list]
129 || [lsearch $et_prop_list $prop] < 0} {
130 lappend et_prop_list $prop
132 verbose "check_cached_effective_target cached list is now: $et_prop_list" 2
134 set value $et_cache($prop,value)
135 verbose "check_cached_effective_target $prop: returning $value for $target" 2
139 # Clear effective-target cache. This is useful after testing
140 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
142 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
143 # do a clear_effective_target_cache at the end as the target cache can
144 # make decisions based upon the flags, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init/asan_finish pair.
148 proc clear_effective_target_cache { } {
152 if {[info exists et_prop_list]} {
153 verbose "clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list {
155 unset et_cache($prop,value)
156 unset et_cache($prop,target)
162 # Like check_compile, but delete the output file and return true if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache {args} {
165 set result [eval check_compile $args]
166 set lines [lindex $result 0]
167 set output [lindex $result 1]
168 remote_file build delete $output
169 return [string match "" $lines]
172 # Like check_no_compiler_messages_nocache, but cache the result.
173 # PROP is the property we're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP, otherwise they satisfy it
185 # if they do match regular expression PATTERN. (PATTERN can start
186 # with something like "[!]" if the regular expression needs to match
187 # "!" as the first character.)
189 # Delete the output file before returning. The other arguments are
190 # as for check_compile.
191 proc check_no_messages_and_pattern_nocache {basename pattern args} {
194 set result [eval [list check_compile $basename] $args]
195 set lines [lindex $result 0]
196 set output [lindex $result 1]
199 if { [string match "" $lines] } {
200 set chan [open "$output"]
201 set invert [regexp {^!(.*)} $pattern dummy pattern]
202 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
206 remote_file build delete $output
210 # Like check_no_messages_and_pattern_nocache, but cache the result.
211 # PROP is the property we're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
240 remote_file build delete $output
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking, and doubles as a prefix for temporary
247 proc check_runtime {prop args} {
250 return [check_cached_effective_target $prop {
251 eval [list check_runtime_nocache $prop] $args
255 # Return 1 if GCC was configured with $pattern.
256 proc check_configured_with { pattern } {
259 set gcc_output [${tool}_target_compile "-v" "" "none" ""]
260 if { [ regexp "Configured with: \[^\n\]*$pattern" $gcc_output ] } {
261 verbose "Matched: $pattern" 2
265 verbose "Failed to match: $pattern" 2
269 ###############################
270 # proc check_weak_available { }
271 ###############################
273 # weak symbols are only supported in some configs/object formats
274 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
276 proc check_weak_available { } {
279 # All mips targets should support it
281 if { [ string first "mips" $target_cpu ] >= 0 } {
285 # All AIX targets should support it
287 if { [istarget *-*-aix*] } {
291 # All solaris2 targets should support it
293 if { [istarget *-*-solaris2*] } {
297 # Windows targets Cygwin and MingW32 support it
299 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
303 # HP-UX 10.X doesn't support it
305 if { [istarget hppa*-*-hpux10*] } {
309 # nvptx (nearly) supports it
311 if { [istarget nvptx-*-*] } {
315 # ELF and ECOFF support it. a.out does with gas/gld but may also with
316 # other linkers, so we should try it
318 set objformat [gcc_target_object_format]
326 unknown { return -1 }
331 ###############################
332 # proc check_weak_override_available { }
333 ###############################
335 # Like check_weak_available, but return 0 if weak symbol definitions
336 # cannot be overridden.
338 proc check_weak_override_available { } {
339 if { [istarget *-*-mingw*] } {
342 return [check_weak_available]
345 ###############################
346 # proc check_visibility_available { what_kind }
347 ###############################
349 # The visibility attribute is only support in some object formats
350 # This proc returns 1 if it is supported, 0 if not.
351 # The argument is the kind of visibility, default/protected/hidden/internal.
353 proc check_visibility_available { what_kind } {
354 if [string match "" $what_kind] { set what_kind "hidden" }
356 return [check_no_compiler_messages visibility_available_$what_kind object "
357 void f() __attribute__((visibility(\"$what_kind\")));
362 ###############################
363 # proc check_alias_available { }
364 ###############################
366 # Determine if the target toolchain supports the alias attribute.
368 # Returns 2 if the target supports aliases. Returns 1 if the target
369 # only supports weak aliased. Returns 0 if the target does not
370 # support aliases at all. Returns -1 if support for aliases could not
373 proc check_alias_available { } {
374 global alias_available_saved
377 if [info exists alias_available_saved] {
378 verbose "check_alias_available returning saved $alias_available_saved" 2
382 verbose "check_alias_available compiling testfile $src" 2
383 set f [open $src "w"]
384 # Compile a small test program. The definition of "g" is
385 # necessary to keep the Solaris assembler from complaining
387 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
388 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
390 set lines [${tool}_target_compile $src $obj object ""]
392 remote_file build delete $obj
394 if [string match "" $lines] then {
395 # No error messages, everything is OK.
396 set alias_available_saved 2
398 if [regexp "alias definitions not supported" $lines] {
399 verbose "check_alias_available target does not support aliases" 2
401 set objformat [gcc_target_object_format]
403 if { $objformat == "elf" } {
404 verbose "check_alias_available but target uses ELF format, so it ought to" 2
405 set alias_available_saved -1
407 set alias_available_saved 0
410 if [regexp "only weak aliases are supported" $lines] {
411 verbose "check_alias_available target supports only weak aliases" 2
412 set alias_available_saved 1
414 set alias_available_saved -1
419 verbose "check_alias_available returning $alias_available_saved" 2
422 return $alias_available_saved
425 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
427 proc check_effective_target_alias { } {
428 if { [check_alias_available] < 2 } {
435 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
437 proc check_ifunc_available { } {
438 return [check_no_compiler_messages ifunc_available object {
442 typedef void F (void);
444 void f () __attribute__ ((ifunc ("g")));
451 # Returns true if --gc-sections is supported on the target.
453 proc check_gc_sections_available { } {
454 global gc_sections_available_saved
457 if {![info exists gc_sections_available_saved]} {
458 # Some targets don't support gc-sections despite whatever's
459 # advertised by ld's options.
460 if { [istarget alpha*-*-*]
461 || [istarget ia64-*-*] } {
462 set gc_sections_available_saved 0
466 # elf2flt uses -q (--emit-relocs), which is incompatible with
468 if { [board_info target exists ldflags]
469 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
470 set gc_sections_available_saved 0
474 # VxWorks kernel modules are relocatable objects linked with -r,
475 # while RTP executables are linked with -q (--emit-relocs).
476 # Both of these options are incompatible with --gc-sections.
477 if { [istarget *-*-vxworks*] } {
478 set gc_sections_available_saved 0
482 # Check if the ld used by gcc supports --gc-sections.
483 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
484 set ld_output [remote_exec host "$gcc_ld" "--help"]
485 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
486 set gc_sections_available_saved 1
488 set gc_sections_available_saved 0
491 return $gc_sections_available_saved
494 # Return 1 if according to target_info struct and explicit target list
495 # target is supposed to support trampolines.
497 proc check_effective_target_trampolines { } {
498 if [target_info exists gcc,no_trampolines] {
501 if { [istarget avr-*-*]
502 || [istarget msp430-*-*]
503 || [istarget nvptx-*-*]
504 || [istarget hppa2.0w-hp-hpux11.23]
505 || [istarget hppa64-hp-hpux11.23] } {
511 # Return 1 if target has limited stack size.
513 proc check_effective_target_stack_size { } {
514 if [target_info exists gcc,stack_size] {
520 # Return the value attribute of an effective target, otherwise return 0.
522 proc dg-effective-target-value { effective_target } {
523 if { "$effective_target" == "stack_size" } {
524 if [check_effective_target_stack_size] {
525 return [target_info gcc,stack_size]
532 # Return 1 if signal.h is supported.
534 proc check_effective_target_signal { } {
535 if [target_info exists gcc,signal_suppress] {
541 # Return 1 if according to target_info struct and explicit target list
542 # target disables -fdelete-null-pointer-checks. Targets should return 0
543 # if they simply default to -fno-delete-null-pointer-checks but obey
544 # -fdelete-null-pointer-checks when passed explicitly (and tests that
545 # depend on this option should do that).
547 proc check_effective_target_keeps_null_pointer_checks { } {
548 if [target_info exists keeps_null_pointer_checks] {
551 if { [istarget avr-*-*]
552 || [istarget msp430-*-*] } {
558 # Return the autofdo profile wrapper
560 # Linux by default allows 516KB of perf event buffers
561 # in /proc/sys/kernel/perf_event_mlock_kb
562 # Each individual perf tries to grab it
563 # This causes problems with parallel test suite runs. Instead
564 # limit us to 8 pages (32K), which should be good enough
565 # for the small test programs. With the default settings
566 # this allows parallelism of 16 and higher of parallel gcc-auto-profile
567 proc profopt-perf-wrapper { } {
569 return "$srcdir/../config/i386/gcc-auto-profile -o perf.data -m8 "
572 # Return true if profiling is supported on the target.
574 proc check_profiling_available { test_what } {
575 global profiling_available_saved
577 verbose "Profiling argument is <$test_what>" 1
579 # These conditions depend on the argument so examine them before
580 # looking at the cache variable.
582 # Tree profiling requires TLS runtime support.
583 if { $test_what == "-fprofile-generate" } {
584 if { ![check_effective_target_tls_runtime] } {
589 if { $test_what == "-fauto-profile" } {
590 if { !([istarget i?86-*-linux*] || [istarget x86_64-*-linux*]) } {
591 verbose "autofdo only supported on linux"
594 # not cross compiling?
596 verbose "autofdo not supported for non native builds"
599 set event [profopt-perf-wrapper]
601 verbose "autofdo not supported"
605 set status [remote_exec host "$srcdir/../config/i386/gcc-auto-profile" "true -v >/dev/null"]
606 if { [lindex $status 0] != 0 } {
607 verbose "autofdo not supported because perf does not work"
611 # no good way to check this in advance -- check later instead.
612 #set status [remote_exec host "create_gcov" "2>/dev/null"]
613 #if { [lindex $status 0] != 255 } {
614 # verbose "autofdo not supported due to missing create_gcov"
619 # Support for -p on solaris2 relies on mcrt1.o which comes with the
620 # vendor compiler. We cannot reliably predict the directory where the
621 # vendor compiler (and thus mcrt1.o) is installed so we can't
622 # necessarily find mcrt1.o even if we have it.
623 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
627 # We don't yet support profiling for MIPS16.
628 if { [istarget mips*-*-*]
629 && ![check_effective_target_nomips16]
630 && ($test_what == "-p" || $test_what == "-pg") } {
634 # MinGW does not support -p.
635 if { [istarget *-*-mingw*] && $test_what == "-p" } {
639 # cygwin does not support -p.
640 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
644 # uClibc does not have gcrt1.o.
645 if { [check_effective_target_uclibc]
646 && ($test_what == "-p" || $test_what == "-pg") } {
650 # Now examine the cache variable.
651 if {![info exists profiling_available_saved]} {
652 # Some targets don't have any implementation of __bb_init_func or are
653 # missing other needed machinery.
654 if {[istarget aarch64*-*-elf]
655 || [istarget am3*-*-linux*]
656 || [istarget arm*-*-eabi*]
657 || [istarget arm*-*-elf]
658 || [istarget arm*-*-symbianelf*]
659 || [istarget avr-*-*]
660 || [istarget bfin-*-*]
661 || [istarget cris-*-*]
662 || [istarget crisv32-*-*]
663 || [istarget fido-*-elf]
664 || [istarget h8300-*-*]
665 || [istarget lm32-*-*]
666 || [istarget m32c-*-elf]
667 || [istarget m68k-*-elf]
668 || [istarget m68k-*-uclinux*]
669 || [istarget mips*-*-elf*]
670 || [istarget mmix-*-*]
671 || [istarget mn10300-*-elf*]
672 || [istarget moxie-*-elf*]
673 || [istarget msp430-*-*]
674 || [istarget nds32*-*-elf]
675 || [istarget nios2-*-elf]
676 || [istarget nvptx-*-*]
677 || [istarget powerpc-*-eabi*]
678 || [istarget powerpc-*-elf]
680 || [istarget tic6x-*-elf]
681 || [istarget visium-*-*]
682 || [istarget xstormy16-*]
683 || [istarget xtensa*-*-elf]
684 || [istarget *-*-rtems*]
685 || [istarget *-*-vxworks*] } {
686 set profiling_available_saved 0
688 set profiling_available_saved 1
692 # -pg link test result can't be cached since it may change between
694 set profiling_working $profiling_available_saved
695 if { $profiling_available_saved == 1
696 && ![check_no_compiler_messages_nocache profiling executable {
697 int main() { return 0; } } "-pg"] } {
698 set profiling_working 0
701 return $profiling_working
704 # Check to see if a target is "freestanding". This is as per the definition
705 # in Section 4 of C99 standard. Effectively, it is a target which supports no
706 # extra headers or libraries other than what is considered essential.
707 proc check_effective_target_freestanding { } {
708 if { [istarget nvptx-*-*] } {
714 # Return 1 if target has packed layout of structure members by
715 # default, 0 otherwise. Note that this is slightly different than
716 # whether the target has "natural alignment": both attributes may be
719 proc check_effective_target_default_packed { } {
720 return [check_no_compiler_messages default_packed assembly {
721 struct x { char a; long b; } c;
722 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
726 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
727 # documentation, where the test also comes from.
729 proc check_effective_target_pcc_bitfield_type_matters { } {
730 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
731 # bitfields, but let's stick to the example code from the docs.
732 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
733 struct foo1 { char x; char :0; char y; };
734 struct foo2 { char x; int :0; char y; };
735 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
739 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
741 proc add_options_for_tls { flags } {
742 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
743 # libthread, so always pass -pthread for native TLS. Same for AIX.
744 # Need to duplicate native TLS check from
745 # check_effective_target_tls_native to avoid recursion.
746 if { ([istarget powerpc-ibm-aix*]) &&
747 [check_no_messages_and_pattern tls_native "!emutls" assembly {
749 int f (void) { return i; }
750 void g (int j) { i = j; }
752 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
757 # Return 1 if indirect jumps are supported, 0 otherwise.
759 proc check_effective_target_indirect_jumps {} {
760 if { [istarget nvptx-*-*] } {
766 # Return 1 if nonlocal goto is supported, 0 otherwise.
768 proc check_effective_target_nonlocal_goto {} {
769 if { [istarget nvptx-*-*] } {
775 # Return 1 if global constructors are supported, 0 otherwise.
777 proc check_effective_target_global_constructor {} {
778 if { [istarget nvptx-*-*] } {
784 # Return 1 if taking label values is supported, 0 otherwise.
786 proc check_effective_target_label_values {} {
787 if { [istarget nvptx-*-*] || [target_info exists gcc,no_label_values] } {
794 # Return 1 if builtin_return_address and builtin_frame_address are
795 # supported, 0 otherwise.
797 proc check_effective_target_return_address {} {
798 if { [istarget nvptx-*-*] } {
804 # Return 1 if the assembler does not verify function types against
805 # calls, 0 otherwise. Such verification will typically show up problems
806 # with K&R C function declarations.
808 proc check_effective_target_untyped_assembly {} {
809 if { [istarget nvptx-*-*] } {
815 # Return 1 if alloca is supported, 0 otherwise.
817 proc check_effective_target_alloca {} {
818 if { [istarget nvptx-*-*] } {
819 return [check_no_compiler_messages alloca assembly {
821 void g (int n) { f (__builtin_alloca (n)); }
827 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
829 proc check_effective_target_tls {} {
830 return [check_no_compiler_messages tls assembly {
832 int f (void) { return i; }
833 void g (int j) { i = j; }
837 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
839 proc check_effective_target_tls_native {} {
840 # VxWorks uses emulated TLS machinery, but with non-standard helper
841 # functions, so we fail to automatically detect it.
842 if { [istarget *-*-vxworks*] } {
846 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
848 int f (void) { return i; }
849 void g (int j) { i = j; }
853 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
855 proc check_effective_target_tls_emulated {} {
856 # VxWorks uses emulated TLS machinery, but with non-standard helper
857 # functions, so we fail to automatically detect it.
858 if { [istarget *-*-vxworks*] } {
862 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
864 int f (void) { return i; }
865 void g (int j) { i = j; }
869 # Return 1 if TLS executables can run correctly, 0 otherwise.
871 proc check_effective_target_tls_runtime {} {
872 # The runtime does not have TLS support, but just
873 # running the test below is insufficient to show this.
874 if { [istarget msp430-*-*] || [istarget visium-*-*] } {
877 return [check_runtime tls_runtime {
878 __thread int thr = 0;
879 int main (void) { return thr; }
880 } [add_options_for_tls ""]]
883 # Return 1 if atomic compare-and-swap is supported on 'int'
885 proc check_effective_target_cas_char {} {
886 return [check_no_compiler_messages cas_char assembly {
887 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
893 proc check_effective_target_cas_int {} {
894 return [check_no_compiler_messages cas_int assembly {
895 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
897 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
905 # Return 1 if -ffunction-sections is supported, 0 otherwise.
907 proc check_effective_target_function_sections {} {
908 # Darwin has its own scheme and silently accepts -ffunction-sections.
909 if { [istarget *-*-darwin*] } {
913 return [check_no_compiler_messages functionsections assembly {
915 } "-ffunction-sections"]
918 # Return 1 if instruction scheduling is available, 0 otherwise.
920 proc check_effective_target_scheduling {} {
921 return [check_no_compiler_messages scheduling object {
923 } "-fschedule-insns"]
926 # Return 1 if trapping arithmetic is available, 0 otherwise.
928 proc check_effective_target_trapping {} {
929 return [check_no_compiler_messages trapping object {
930 int add (int a, int b) { return a + b; }
934 # Return 1 if compilation with -fgraphite is error-free for trivial
937 proc check_effective_target_fgraphite {} {
938 return [check_no_compiler_messages fgraphite object {
943 # Return 1 if compilation with -fopenacc is error-free for trivial
946 proc check_effective_target_fopenacc {} {
947 # nvptx can be built with the device-side bits of openacc, but it
948 # does not make sense to test it as an openacc host.
949 if [istarget nvptx-*-*] { return 0 }
951 return [check_no_compiler_messages fopenacc object {
956 # Return 1 if compilation with -fopenmp is error-free for trivial
959 proc check_effective_target_fopenmp {} {
960 # nvptx can be built with the device-side bits of libgomp, but it
961 # does not make sense to test it as an openmp host.
962 if [istarget nvptx-*-*] { return 0 }
964 return [check_no_compiler_messages fopenmp object {
969 # Return 1 if compilation with -fgnu-tm is error-free for trivial
972 proc check_effective_target_fgnu_tm {} {
973 return [check_no_compiler_messages fgnu_tm object {
978 # Return 1 if the target supports mmap, 0 otherwise.
980 proc check_effective_target_mmap {} {
981 return [check_function_available "mmap"]
984 # Return 1 if the target supports dlopen, 0 otherwise.
985 proc check_effective_target_dlopen {} {
986 return [check_no_compiler_messages dlopen executable {
988 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
989 } [add_options_for_dlopen ""]]
992 proc add_options_for_dlopen { flags } {
996 # Return 1 if the target supports clone, 0 otherwise.
997 proc check_effective_target_clone {} {
998 return [check_function_available "clone"]
1001 # Return 1 if the target supports setrlimit, 0 otherwise.
1002 proc check_effective_target_setrlimit {} {
1003 # Darwin has non-posix compliant RLIMIT_AS
1004 if { [istarget *-*-darwin*] } {
1007 return [check_function_available "setrlimit"]
1010 # Return 1 if the target supports gettimeofday, 0 otherwise.
1011 proc check_effective_target_gettimeofday {} {
1012 return [check_function_available "gettimeofday"]
1015 # Return 1 if the target supports swapcontext, 0 otherwise.
1016 proc check_effective_target_swapcontext {} {
1017 return [check_no_compiler_messages swapcontext executable {
1018 #include <ucontext.h>
1021 ucontext_t orig_context,child_context;
1022 if (swapcontext(&child_context, &orig_context) < 0) { }
1027 # Return 1 if compilation with -pthread is error-free for trivial
1028 # code, 0 otherwise.
1030 proc check_effective_target_pthread {} {
1031 return [check_no_compiler_messages pthread object {
1036 # Return 1 if compilation with -gstabs is error-free for trivial
1037 # code, 0 otherwise.
1039 proc check_effective_target_stabs {} {
1040 return [check_no_compiler_messages stabs object {
1045 # Return 1 if compilation with -mpe-aligned-commons is error-free
1046 # for trivial code, 0 otherwise.
1048 proc check_effective_target_pe_aligned_commons {} {
1049 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
1050 return [check_no_compiler_messages pe_aligned_commons object {
1052 } "-mpe-aligned-commons"]
1057 # Return 1 if the target supports -static
1058 proc check_effective_target_static {} {
1059 return [check_no_compiler_messages static executable {
1060 int main (void) { return 0; }
1064 # Return 1 if the target supports -fstack-protector
1065 proc check_effective_target_fstack_protector {} {
1066 return [check_runtime fstack_protector {
1067 int main (void) { return 0; }
1068 } "-fstack-protector"]
1071 # Return 1 if the target supports -fstack-check or -fstack-check=$stack_kind
1072 proc check_stack_check_available { stack_kind } {
1073 if [string match "" $stack_kind] then {
1074 set stack_opt "-fstack-check"
1075 } else { set stack_opt "-fstack-check=$stack_kind" }
1077 return [check_no_compiler_messages stack_check_$stack_kind executable {
1078 int main (void) { return 0; }
1082 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
1083 # for trivial code, 0 otherwise. As some targets (ARM for example) only
1084 # warn when -fprofile-use is also supplied we test that combination too.
1086 proc check_effective_target_freorder {} {
1087 if { [check_no_compiler_messages freorder object {
1089 } "-freorder-blocks-and-partition"]
1090 && [check_no_compiler_messages fprofile_use_freorder object {
1092 } "-fprofile-use -freorder-blocks-and-partition"] } {
1098 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
1099 # emitted, 0 otherwise. Whether a shared library can actually be built is
1100 # out of scope for this test.
1102 proc check_effective_target_fpic { } {
1103 # Note that M68K has a multilib that supports -fpic but not
1104 # -fPIC, so we need to check both. We test with a program that
1105 # requires GOT references.
1106 foreach arg {fpic fPIC} {
1107 if [check_no_compiler_messages $arg object {
1108 extern int foo (void); extern int bar;
1109 int baz (void) { return foo () + bar; }
1117 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
1118 # silently. So, we can't rely on above "check_effective_target_fpic" as it
1119 # assumes compiler will give warning if -fpic not supported. Here we check
1120 # whether binutils supports those new -fpic relocation modifiers, and assume
1121 # -fpic is supported if there is binutils support. GCC configuration will
1122 # enable -fpic for AArch64 in this case.
1124 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1125 # memory model -fpic relocation types.
1127 proc check_effective_target_aarch64_small_fpic { } {
1128 if { [istarget aarch64*-*-*] } {
1129 return [check_no_compiler_messages aarch64_small_fpic object {
1130 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1137 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1138 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1139 # in binutils since 2015-03-04 as PR gas/17843.
1141 # This test directive make sure binutils support all features needed by TLS LE
1142 # under -mtls-size=32 on AArch64.
1144 proc check_effective_target_aarch64_tlsle32 { } {
1145 if { [istarget aarch64*-*-*] } {
1146 return [check_no_compiler_messages aarch64_tlsle32 object {
1147 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1154 # Return 1 if -shared is supported, as in no warnings or errors
1155 # emitted, 0 otherwise.
1157 proc check_effective_target_shared { } {
1158 # Note that M68K has a multilib that supports -fpic but not
1159 # -fPIC, so we need to check both. We test with a program that
1160 # requires GOT references.
1161 return [check_no_compiler_messages shared executable {
1162 extern int foo (void); extern int bar;
1163 int baz (void) { return foo () + bar; }
1167 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1169 proc check_effective_target_pie { } {
1170 if { [istarget *-*-darwin\[912\]*]
1171 || [istarget *-*-dragonfly*]
1172 || [istarget *-*-freebsd*]
1173 || [istarget *-*-linux*]
1174 || [istarget *-*-gnu*] } {
1177 if { [istarget *-*-solaris2.1\[1-9\]*] } {
1178 # Full PIE support was added in Solaris 11.x and Solaris 12, but gcc
1179 # errors out if missing, so check for that.
1180 return [check_no_compiler_messages pie executable {
1181 int main (void) { return 0; }
1187 # Return true if the target supports -mpaired-single (as used on MIPS).
1189 proc check_effective_target_mpaired_single { } {
1190 return [check_no_compiler_messages mpaired_single object {
1192 } "-mpaired-single"]
1195 # Return true if the target has access to FPU instructions.
1197 proc check_effective_target_hard_float { } {
1198 if { [istarget mips*-*-*] } {
1199 return [check_no_compiler_messages hard_float assembly {
1200 #if (defined __mips_soft_float || defined __mips16)
1201 #error __mips_soft_float || __mips16
1206 # This proc is actually checking the availabilty of FPU
1207 # support for doubles, so on the RX we must fail if the
1208 # 64-bit double multilib has been selected.
1209 if { [istarget rx-*-*] } {
1211 # return [check_no_compiler_messages hard_float assembly {
1212 #if defined __RX_64_BIT_DOUBLES__
1213 #error __RX_64_BIT_DOUBLES__
1218 # The generic test equates hard_float with "no call for adding doubles".
1219 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1220 double a (double b, double c) { return b + c; }
1224 # Return true if the target is a 64-bit MIPS target.
1226 proc check_effective_target_mips64 { } {
1227 return [check_no_compiler_messages mips64 assembly {
1234 # Return true if the target is a MIPS target that does not produce
1237 proc check_effective_target_nomips16 { } {
1238 return [check_no_compiler_messages nomips16 object {
1242 /* A cheap way of testing for -mflip-mips16. */
1243 void foo (void) { asm ("addiu $20,$20,1"); }
1244 void bar (void) { asm ("addiu $20,$20,1"); }
1249 # Add the options needed for MIPS16 function attributes. At the moment,
1250 # we don't support MIPS16 PIC.
1252 proc add_options_for_mips16_attribute { flags } {
1253 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1256 # Return true if we can force a mode that allows MIPS16 code generation.
1257 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1260 proc check_effective_target_mips16_attribute { } {
1261 return [check_no_compiler_messages mips16_attribute assembly {
1265 #if defined __mips_hard_float \
1266 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1267 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1268 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1270 } [add_options_for_mips16_attribute ""]]
1273 # Return 1 if the target supports long double larger than double when
1274 # using the new ABI, 0 otherwise.
1276 proc check_effective_target_mips_newabi_large_long_double { } {
1277 return [check_no_compiler_messages mips_newabi_large_long_double object {
1278 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1282 # Return true if the target is a MIPS target that has access
1283 # to the LL and SC instructions.
1285 proc check_effective_target_mips_llsc { } {
1286 if { ![istarget mips*-*-*] } {
1289 # Assume that these instructions are always implemented for
1290 # non-elf* targets, via emulation if necessary.
1291 if { ![istarget *-*-elf*] } {
1294 # Otherwise assume LL/SC support for everything but MIPS I.
1295 return [check_no_compiler_messages mips_llsc assembly {
1302 # Return true if the target is a MIPS target that uses in-place relocations.
1304 proc check_effective_target_mips_rel { } {
1305 if { ![istarget mips*-*-*] } {
1308 return [check_no_compiler_messages mips_rel object {
1309 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1310 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1311 #error _ABIN32 && (_ABIN32 || _ABI64)
1316 # Return true if the target is a MIPS target that uses the EABI.
1318 proc check_effective_target_mips_eabi { } {
1319 if { ![istarget mips*-*-*] } {
1322 return [check_no_compiler_messages mips_eabi object {
1329 # Return 1 if the current multilib does not generate PIC by default.
1331 proc check_effective_target_nonpic { } {
1332 return [check_no_compiler_messages nonpic assembly {
1339 # Return 1 if the current multilib generates PIE by default.
1341 proc check_effective_target_pie_enabled { } {
1342 return [check_no_compiler_messages pie_enabled assembly {
1349 # Return 1 if the target generates -fstack-protector by default.
1351 proc check_effective_target_fstack_protector_enabled {} {
1352 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1353 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1354 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1360 # Return 1 if the target does not use a status wrapper.
1362 proc check_effective_target_unwrapped { } {
1363 if { [target_info needs_status_wrapper] != "" \
1364 && [target_info needs_status_wrapper] != "0" } {
1370 # Return true if iconv is supported on the target. In particular IBM1047.
1372 proc check_iconv_available { test_what } {
1375 # If the tool configuration file has not set libiconv, try "-liconv"
1376 if { ![info exists libiconv] } {
1377 set libiconv "-liconv"
1379 set test_what [lindex $test_what 1]
1380 return [check_runtime_nocache $test_what [subst {
1386 cd = iconv_open ("$test_what", "UTF-8");
1387 if (cd == (iconv_t) -1)
1394 # Return true if Cilk Library is supported on the target.
1395 proc check_effective_target_cilkplus_runtime { } {
1396 return [ check_no_compiler_messages_nocache cilkplus_runtime executable {
1400 int __cilkrts_set_param (const char *, const char *);
1402 int x = __cilkrts_set_param ("nworkers", "0");
1405 } "-fcilkplus -lcilkrts" ]
1408 # Return true if the atomic library is supported on the target.
1409 proc check_effective_target_libatomic_available { } {
1410 return [check_no_compiler_messages libatomic_available executable {
1411 int main (void) { return 0; }
1415 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1417 proc check_ascii_locale_available { } {
1421 # Return true if named sections are supported on this target.
1423 proc check_named_sections_available { } {
1424 return [check_no_compiler_messages named_sections assembly {
1425 int __attribute__ ((section("whatever"))) foo;
1429 # Return true if the "naked" function attribute is supported on this target.
1431 proc check_effective_target_naked_functions { } {
1432 return [check_no_compiler_messages naked_functions assembly {
1433 void f() __attribute__((naked));
1437 # Return 1 if the target supports Fortran real kinds larger than real(8),
1440 # When the target name changes, replace the cached result.
1442 proc check_effective_target_fortran_large_real { } {
1443 return [check_no_compiler_messages fortran_large_real executable {
1445 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1452 # Return 1 if the target supports Fortran real kind real(16),
1453 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1454 # this checks for Real(16) only; the other returned real(10) if
1455 # both real(10) and real(16) are available.
1457 # When the target name changes, replace the cached result.
1459 proc check_effective_target_fortran_real_16 { } {
1460 return [check_no_compiler_messages fortran_real_16 executable {
1468 # Return 1 if the target supports Fortran real kind 10,
1469 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1470 # this checks for real(10) only.
1472 # When the target name changes, replace the cached result.
1474 proc check_effective_target_fortran_real_10 { } {
1475 return [check_no_compiler_messages fortran_real_10 executable {
1483 # Return 1 if the target supports Fortran's IEEE modules,
1486 # When the target name changes, replace the cached result.
1488 proc check_effective_target_fortran_ieee { flags } {
1489 return [check_no_compiler_messages fortran_ieee executable {
1491 use, intrinsic :: ieee_features
1497 # Return 1 if the target supports SQRT for the largest floating-point
1498 # type. (Some targets lack the libm support for this FP type.)
1499 # On most targets, this check effectively checks either whether sqrtl is
1500 # available or on __float128 systems whether libquadmath is installed,
1501 # which provides sqrtq.
1503 # When the target name changes, replace the cached result.
1505 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1506 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1508 use iso_fortran_env, only: real_kinds
1509 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1510 real(kind=maxFP), volatile :: x
1518 # Return 1 if the target supports Fortran integer kinds larger than
1519 # integer(8), 0 otherwise.
1521 # When the target name changes, replace the cached result.
1523 proc check_effective_target_fortran_large_int { } {
1524 return [check_no_compiler_messages fortran_large_int executable {
1526 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1527 integer(kind=k) :: i
1532 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1534 # When the target name changes, replace the cached result.
1536 proc check_effective_target_fortran_integer_16 { } {
1537 return [check_no_compiler_messages fortran_integer_16 executable {
1544 # Return 1 if we can statically link libgfortran, 0 otherwise.
1546 # When the target name changes, replace the cached result.
1548 proc check_effective_target_static_libgfortran { } {
1549 return [check_no_compiler_messages static_libgfortran executable {
1556 # Return 1 if we can use the -rdynamic option, 0 otherwise.
1558 proc check_effective_target_rdynamic { } {
1559 return [check_no_compiler_messages rdynamic executable {
1560 int main() { return 0; }
1564 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1566 proc check_effective_target_cilkplus { } {
1567 # Skip cilk-plus tests on int16 and size16 targets for now.
1568 # The cilk-plus tests are not generic enough to cover these
1569 # cases and would throw hundreds of FAILs.
1570 if { [check_effective_target_int16]
1571 || ![check_effective_target_size32plus] } {
1575 # Skip AVR, its RAM is too small and too many tests would fail.
1576 if { [istarget avr-*-*] } {
1580 if { ! [check_effective_target_pthread] } {
1587 proc check_linker_plugin_available { } {
1588 return [check_no_compiler_messages_nocache linker_plugin executable {
1589 int main() { return 0; }
1590 } "-flto -fuse-linker-plugin"]
1593 # Return 1 if the target OS supports running SSE executables, 0
1594 # otherwise. Cache the result.
1596 proc check_sse_os_support_available { } {
1597 return [check_cached_effective_target sse_os_support_available {
1598 # If this is not the right target then we can skip the test.
1599 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1601 } elseif { [istarget i?86-*-solaris2*] } {
1602 # The Solaris 2 kernel doesn't save and restore SSE registers
1603 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1604 check_runtime_nocache sse_os_support_available {
1607 asm volatile ("movaps %xmm0,%xmm0");
1617 # Return 1 if the target OS supports running AVX executables, 0
1618 # otherwise. Cache the result.
1620 proc check_avx_os_support_available { } {
1621 return [check_cached_effective_target avx_os_support_available {
1622 # If this is not the right target then we can skip the test.
1623 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1626 # Check that OS has AVX and SSE saving enabled.
1627 check_runtime_nocache avx_os_support_available {
1630 unsigned int eax, edx;
1632 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1633 return (eax & 0x06) != 0x06;
1640 # Return 1 if the target OS supports running AVX executables, 0
1641 # otherwise. Cache the result.
1643 proc check_avx512_os_support_available { } {
1644 return [check_cached_effective_target avx512_os_support_available {
1645 # If this is not the right target then we can skip the test.
1646 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1649 # Check that OS has AVX512, AVX and SSE saving enabled.
1650 check_runtime_nocache avx512_os_support_available {
1653 unsigned int eax, edx;
1655 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1656 return (eax & 0xe6) != 0xe6;
1663 # Return 1 if the target supports executing SSE instructions, 0
1664 # otherwise. Cache the result.
1666 proc check_sse_hw_available { } {
1667 return [check_cached_effective_target sse_hw_available {
1668 # If this is not the right target then we can skip the test.
1669 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1672 check_runtime_nocache sse_hw_available {
1676 unsigned int eax, ebx, ecx, edx;
1677 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1680 return !(edx & bit_SSE);
1687 # Return 1 if the target supports executing SSE2 instructions, 0
1688 # otherwise. Cache the result.
1690 proc check_sse2_hw_available { } {
1691 return [check_cached_effective_target sse2_hw_available {
1692 # If this is not the right target then we can skip the test.
1693 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1696 check_runtime_nocache sse2_hw_available {
1700 unsigned int eax, ebx, ecx, edx;
1701 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1704 return !(edx & bit_SSE2);
1711 # Return 1 if the target supports executing SSE4 instructions, 0
1712 # otherwise. Cache the result.
1714 proc check_sse4_hw_available { } {
1715 return [check_cached_effective_target sse4_hw_available {
1716 # If this is not the right target then we can skip the test.
1717 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1720 check_runtime_nocache sse4_hw_available {
1724 unsigned int eax, ebx, ecx, edx;
1725 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1728 return !(ecx & bit_SSE4_2);
1735 # Return 1 if the target supports executing AVX instructions, 0
1736 # otherwise. Cache the result.
1738 proc check_avx_hw_available { } {
1739 return [check_cached_effective_target avx_hw_available {
1740 # If this is not the right target then we can skip the test.
1741 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1744 check_runtime_nocache avx_hw_available {
1748 unsigned int eax, ebx, ecx, edx;
1749 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1752 return ((ecx & (bit_AVX | bit_OSXSAVE))
1753 != (bit_AVX | bit_OSXSAVE));
1760 # Return 1 if the target supports executing AVX2 instructions, 0
1761 # otherwise. Cache the result.
1763 proc check_avx2_hw_available { } {
1764 return [check_cached_effective_target avx2_hw_available {
1765 # If this is not the right target then we can skip the test.
1766 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1769 check_runtime_nocache avx2_hw_available {
1774 unsigned int eax, ebx, ecx, edx;
1776 if (__get_cpuid_max (0, NULL) < 7)
1779 __cpuid (1, eax, ebx, ecx, edx);
1781 if (!(ecx & bit_OSXSAVE))
1784 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1786 return !(ebx & bit_AVX2);
1793 # Return 1 if the target supports executing AVX512 foundation instructions, 0
1794 # otherwise. Cache the result.
1796 proc check_avx512f_hw_available { } {
1797 return [check_cached_effective_target avx512f_hw_available {
1798 # If this is not the right target then we can skip the test.
1799 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1802 check_runtime_nocache avx512f_hw_available {
1807 unsigned int eax, ebx, ecx, edx;
1809 if (__get_cpuid_max (0, NULL) < 7)
1812 __cpuid (1, eax, ebx, ecx, edx);
1814 if (!(ecx & bit_OSXSAVE))
1817 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1819 return !(ebx & bit_AVX512F);
1826 # Return 1 if the target supports running SSE executables, 0 otherwise.
1828 proc check_effective_target_sse_runtime { } {
1829 if { [check_effective_target_sse]
1830 && [check_sse_hw_available]
1831 && [check_sse_os_support_available] } {
1837 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1839 proc check_effective_target_sse2_runtime { } {
1840 if { [check_effective_target_sse2]
1841 && [check_sse2_hw_available]
1842 && [check_sse_os_support_available] } {
1848 # Return 1 if the target supports running SSE4 executables, 0 otherwise.
1850 proc check_effective_target_sse4_runtime { } {
1851 if { [check_effective_target_sse4]
1852 && [check_sse4_hw_available]
1853 && [check_sse_os_support_available] } {
1859 # Return 1 if the target supports running AVX executables, 0 otherwise.
1861 proc check_effective_target_avx_runtime { } {
1862 if { [check_effective_target_avx]
1863 && [check_avx_hw_available]
1864 && [check_avx_os_support_available] } {
1870 # Return 1 if the target supports running AVX2 executables, 0 otherwise.
1872 proc check_effective_target_avx2_runtime { } {
1873 if { [check_effective_target_avx2]
1874 && [check_avx2_hw_available]
1875 && [check_avx_os_support_available] } {
1881 # Return 1 if the target supports running AVX512f executables, 0 otherwise.
1883 proc check_effective_target_avx512f_runtime { } {
1884 if { [check_effective_target_avx512f]
1885 && [check_avx512f_hw_available]
1886 && [check_avx512_os_support_available] } {
1892 # Return 1 if the target supports executing MIPS Paired-Single instructions,
1893 # 0 otherwise. Cache the result.
1895 proc check_mpaired_single_hw_available { } {
1896 return [check_cached_effective_target mpaired_single_hw_available {
1897 # If this is not the right target then we can skip the test.
1898 if { !([istarget mips*-*-*]) } {
1901 check_runtime_nocache mpaired_single_hw_available {
1904 asm volatile ("pll.ps $f2,$f4,$f6");
1912 # Return 1 if the target supports executing Loongson vector instructions,
1913 # 0 otherwise. Cache the result.
1915 proc check_mips_loongson_hw_available { } {
1916 return [check_cached_effective_target mips_loongson_hw_available {
1917 # If this is not the right target then we can skip the test.
1918 if { !([istarget mips*-*-*]) } {
1921 check_runtime_nocache mips_loongson_hw_available {
1922 #include <loongson.h>
1925 asm volatile ("paddw $f2,$f4,$f6");
1933 # Return 1 if the target supports executing MIPS MSA instructions, 0
1934 # otherwise. Cache the result.
1936 proc check_mips_msa_hw_available { } {
1937 return [check_cached_effective_target mips_msa_hw_available {
1938 # If this is not the right target then we can skip the test.
1939 if { !([istarget mips*-*-*]) } {
1942 check_runtime_nocache mips_msa_hw_available {
1943 #if !defined(__mips_msa)
1944 #error "MSA NOT AVAIL"
1946 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
1947 #error "MSA NOT AVAIL FOR ISA REV < 2"
1949 #if !defined(__mips_hard_float)
1950 #error "MSA HARD_FLOAT REQUIRED"
1952 #if __mips_fpr != 64
1953 #error "MSA 64-bit FPR REQUIRED"
1959 v8i16 v = __builtin_msa_ldi_h (0);
1969 # Return 1 if the target supports running MIPS Paired-Single
1970 # executables, 0 otherwise.
1972 proc check_effective_target_mpaired_single_runtime { } {
1973 if { [check_effective_target_mpaired_single]
1974 && [check_mpaired_single_hw_available] } {
1980 # Return 1 if the target supports running Loongson executables, 0 otherwise.
1982 proc check_effective_target_mips_loongson_runtime { } {
1983 if { [check_effective_target_mips_loongson]
1984 && [check_mips_loongson_hw_available] } {
1990 # Return 1 if the target supports running MIPS MSA executables, 0 otherwise.
1992 proc check_effective_target_mips_msa_runtime { } {
1993 if { [check_effective_target_mips_msa]
1994 && [check_mips_msa_hw_available] } {
2000 # Return 1 if we are compiling for 64-bit PowerPC but we do not use direct
2001 # move instructions for moves from GPR to FPR.
2003 proc check_effective_target_powerpc64_no_dm { } {
2004 # The "mulld" checks if we are generating PowerPC64 code. The "lfd"
2005 # checks if we do not use direct moves, but use the old-fashioned
2006 # slower move-via-the-stack.
2007 return [check_no_messages_and_pattern powerpc64_no_dm \
2008 {\mmulld\M.*\mlfd} assembly {
2009 double f(long long x) { return x*x; }
2013 # Return 1 if the target supports the __builtin_cpu_supports built-in,
2014 # including having a new enough library to support the test. Cache the result.
2015 # Require at least a power7 to run on.
2017 proc check_ppc_cpu_supports_hw_available { } {
2018 return [check_cached_effective_target ppc_cpu_supports_hw_available {
2019 # Some simulators are known to not support VSX/power8 instructions.
2020 # For now, disable on Darwin
2021 if { [istarget powerpc-*-eabi]
2022 || [istarget powerpc*-*-eabispe]
2023 || [istarget *-*-darwin*]} {
2027 check_runtime_nocache ppc_cpu_supports_hw_available {
2031 asm volatile ("xxlor vs0,vs0,vs0");
2033 asm volatile ("xxlor 0,0,0");
2035 if (!__builtin_cpu_supports ("vsx"))
2044 # Return 1 if the target supports executing 750CL paired-single instructions, 0
2045 # otherwise. Cache the result.
2047 proc check_750cl_hw_available { } {
2048 return [check_cached_effective_target 750cl_hw_available {
2049 # If this is not the right target then we can skip the test.
2050 if { ![istarget powerpc-*paired*] } {
2053 check_runtime_nocache 750cl_hw_available {
2057 asm volatile ("ps_mul v0,v0,v0");
2059 asm volatile ("ps_mul 0,0,0");
2068 # Return 1 if the target supports executing power8 vector instructions, 0
2069 # otherwise. Cache the result.
2071 proc check_p8vector_hw_available { } {
2072 return [check_cached_effective_target p8vector_hw_available {
2073 # Some simulators are known to not support VSX/power8 instructions.
2074 # For now, disable on Darwin
2075 if { [istarget powerpc-*-eabi]
2076 || [istarget powerpc*-*-eabispe]
2077 || [istarget *-*-darwin*]} {
2080 set options "-mpower8-vector"
2081 check_runtime_nocache p8vector_hw_available {
2085 asm volatile ("xxlorc vs0,vs0,vs0");
2087 asm volatile ("xxlorc 0,0,0");
2096 # Return 1 if the target supports executing power9 vector instructions, 0
2097 # otherwise. Cache the result.
2099 proc check_p9vector_hw_available { } {
2100 return [check_cached_effective_target p9vector_hw_available {
2101 # Some simulators are known to not support VSX/power8/power9
2102 # instructions. For now, disable on Darwin.
2103 if { [istarget powerpc-*-eabi]
2104 || [istarget powerpc*-*-eabispe]
2105 || [istarget *-*-darwin*]} {
2108 set options "-mpower9-vector"
2109 check_runtime_nocache p9vector_hw_available {
2113 vector double v = (vector double) { 0.0, 0.0 };
2114 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
2122 # Return 1 if the target supports executing power9 modulo instructions, 0
2123 # otherwise. Cache the result.
2125 proc check_p9modulo_hw_available { } {
2126 return [check_cached_effective_target p9modulo_hw_available {
2127 # Some simulators are known to not support VSX/power8/power9
2128 # instructions. For now, disable on Darwin.
2129 if { [istarget powerpc-*-eabi]
2130 || [istarget powerpc*-*-eabispe]
2131 || [istarget *-*-darwin*]} {
2134 set options "-mmodulo"
2135 check_runtime_nocache p9modulo_hw_available {
2138 int i = 5, j = 3, r = -1;
2139 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
2147 # Return 1 if the target supports executing __float128 on PowerPC via software
2148 # emulation, 0 otherwise. Cache the result.
2150 proc check_ppc_float128_sw_available { } {
2151 return [check_cached_effective_target ppc_float128_sw_available {
2152 # Some simulators are known to not support VSX/power8/power9
2153 # instructions. For now, disable on Darwin.
2154 if { [istarget powerpc-*-eabi]
2155 || [istarget powerpc*-*-eabispe]
2156 || [istarget *-*-darwin*]} {
2159 set options "-mfloat128 -mvsx"
2160 check_runtime_nocache ppc_float128_sw_available {
2161 volatile __float128 x = 1.0q;
2162 volatile __float128 y = 2.0q;
2165 __float128 z = x + y;
2173 # Return 1 if the target supports executing __float128 on PowerPC via power9
2174 # hardware instructions, 0 otherwise. Cache the result.
2176 proc check_ppc_float128_hw_available { } {
2177 return [check_cached_effective_target ppc_float128_hw_available {
2178 # Some simulators are known to not support VSX/power8/power9
2179 # instructions. For now, disable on Darwin.
2180 if { [istarget powerpc-*-eabi]
2181 || [istarget powerpc*-*-eabispe]
2182 || [istarget *-*-darwin*]} {
2185 set options "-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
2186 check_runtime_nocache ppc_float128_hw_available {
2187 volatile __float128 x = 1.0q;
2188 volatile __float128 y = 2.0q;
2191 __float128 z = x + y;
2192 __float128 w = -1.0q;
2194 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
2195 return ((z != 3.0q) || (z != w);
2202 # Return 1 if the target supports executing VSX instructions, 0
2203 # otherwise. Cache the result.
2205 proc check_vsx_hw_available { } {
2206 return [check_cached_effective_target vsx_hw_available {
2207 # Some simulators are known to not support VSX instructions.
2208 # For now, disable on Darwin
2209 if { [istarget powerpc-*-eabi]
2210 || [istarget powerpc*-*-eabispe]
2211 || [istarget *-*-darwin*]} {
2215 check_runtime_nocache vsx_hw_available {
2219 asm volatile ("xxlor vs0,vs0,vs0");
2221 asm volatile ("xxlor 0,0,0");
2230 # Return 1 if the target supports executing AltiVec instructions, 0
2231 # otherwise. Cache the result.
2233 proc check_vmx_hw_available { } {
2234 return [check_cached_effective_target vmx_hw_available {
2235 # Some simulators are known to not support VMX instructions.
2236 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
2239 # Most targets don't require special flags for this test case, but
2240 # Darwin does. Just to be sure, make sure VSX is not enabled for
2241 # the altivec tests.
2242 if { [istarget *-*-darwin*]
2243 || [istarget *-*-aix*] } {
2244 set options "-maltivec -mno-vsx"
2246 set options "-mno-vsx"
2248 check_runtime_nocache vmx_hw_available {
2252 asm volatile ("vor v0,v0,v0");
2254 asm volatile ("vor 0,0,0");
2263 proc check_ppc_recip_hw_available { } {
2264 return [check_cached_effective_target ppc_recip_hw_available {
2265 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
2266 # For now, disable on Darwin
2267 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2270 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2271 check_runtime_nocache ppc_recip_hw_available {
2272 volatile double d_recip, d_rsqrt, d_four = 4.0;
2273 volatile float f_recip, f_rsqrt, f_four = 4.0f;
2276 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2277 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2278 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2279 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2287 # Return 1 if the target supports executing AltiVec and Cell PPU
2288 # instructions, 0 otherwise. Cache the result.
2290 proc check_effective_target_cell_hw { } {
2291 return [check_cached_effective_target cell_hw_available {
2292 # Some simulators are known to not support VMX and PPU instructions.
2293 if { [istarget powerpc-*-eabi*] } {
2296 # Most targets don't require special flags for this test
2297 # case, but Darwin and AIX do.
2298 if { [istarget *-*-darwin*]
2299 || [istarget *-*-aix*] } {
2300 set options "-maltivec -mcpu=cell"
2302 set options "-mcpu=cell"
2304 check_runtime_nocache cell_hw_available {
2308 asm volatile ("vor v0,v0,v0");
2309 asm volatile ("lvlx v0,r0,r0");
2311 asm volatile ("vor 0,0,0");
2312 asm volatile ("lvlx 0,0,0");
2321 # Return 1 if the target supports executing 64-bit instructions, 0
2322 # otherwise. Cache the result.
2324 proc check_effective_target_powerpc64 { } {
2325 global powerpc64_available_saved
2328 if [info exists powerpc64_available_saved] {
2329 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2331 set powerpc64_available_saved 0
2333 # Some simulators are known to not support powerpc64 instructions.
2334 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
2335 verbose "check_effective_target_powerpc64 returning 0" 2
2336 return $powerpc64_available_saved
2339 # Set up, compile, and execute a test program containing a 64-bit
2340 # instruction. Include the current process ID in the file
2341 # names to prevent conflicts with invocations for multiple
2346 set f [open $src "w"]
2347 puts $f "int main() {"
2348 puts $f "#ifdef __MACH__"
2349 puts $f " asm volatile (\"extsw r0,r0\");"
2351 puts $f " asm volatile (\"extsw 0,0\");"
2353 puts $f " return 0; }"
2356 set opts "additional_flags=-mcpu=G5"
2358 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
2359 set lines [${tool}_target_compile $src $exe executable "$opts"]
2362 if [string match "" $lines] then {
2363 # No error message, compilation succeeded.
2364 set result [${tool}_load "./$exe" "" ""]
2365 set status [lindex $result 0]
2366 remote_file build delete $exe
2367 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
2369 if { $status == "pass" } then {
2370 set powerpc64_available_saved 1
2373 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
2377 return $powerpc64_available_saved
2380 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
2381 # complex float arguments. This affects gfortran tests that call cabsf
2382 # in libm built by an earlier compiler. Return 0 if libm uses the same
2383 # argument passing as the compiler under test, 1 otherwise.
2385 proc check_effective_target_broken_cplxf_arg { } {
2386 # Skip the work for targets known not to be affected.
2387 if { ![istarget powerpc*-*-linux*] || ![is-effective-target lp64] } {
2391 return [check_cached_effective_target broken_cplxf_arg {
2392 check_runtime_nocache broken_cplxf_arg {
2393 #include <complex.h>
2394 extern void abort (void);
2395 float fabsf (float);
2396 float cabsf (_Complex float);
2403 if (fabsf (f - 5.0) > 0.0001)
2404 /* Yes, it's broken. */
2406 /* All fine, not broken. */
2413 # Return 1 is this is a TI C6X target supporting C67X instructions
2414 proc check_effective_target_ti_c67x { } {
2415 return [check_no_compiler_messages ti_c67x assembly {
2416 #if !defined(_TMS320C6700)
2417 #error !_TMS320C6700
2422 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2423 proc check_effective_target_ti_c64xp { } {
2424 return [check_no_compiler_messages ti_c64xp assembly {
2425 #if !defined(_TMS320C6400_PLUS)
2426 #error !_TMS320C6400_PLUS
2432 proc check_alpha_max_hw_available { } {
2433 return [check_runtime alpha_max_hw_available {
2434 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2438 # Returns true iff the FUNCTION is available on the target system.
2439 # (This is essentially a Tcl implementation of Autoconf's
2442 proc check_function_available { function } {
2443 return [check_no_compiler_messages ${function}_available \
2449 int main () { $function (); }
2453 # Returns true iff "fork" is available on the target system.
2455 proc check_fork_available {} {
2456 return [check_function_available "fork"]
2459 # Returns true iff "mkfifo" is available on the target system.
2461 proc check_mkfifo_available {} {
2462 if { [istarget *-*-cygwin*] } {
2463 # Cygwin has mkfifo, but support is incomplete.
2467 return [check_function_available "mkfifo"]
2470 # Returns true iff "__cxa_atexit" is used on the target system.
2472 proc check_cxa_atexit_available { } {
2473 return [check_cached_effective_target cxa_atexit_available {
2474 if { [istarget hppa*-*-hpux10*] } {
2475 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
2477 } elseif { [istarget *-*-vxworks] } {
2478 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2481 check_runtime_nocache cxa_atexit_available {
2484 static unsigned int count;
2501 Y() { f(); count = 2; }
2510 int main() { return 0; }
2516 proc check_effective_target_objc2 { } {
2517 return [check_no_compiler_messages objc2 object {
2526 proc check_effective_target_next_runtime { } {
2527 return [check_no_compiler_messages objc2 object {
2528 #ifdef __NEXT_RUNTIME__
2531 #error !__NEXT_RUNTIME__
2536 # Return 1 if we're generating 32-bit code using default options, 0
2539 proc check_effective_target_ilp32 { } {
2540 return [check_no_compiler_messages ilp32 object {
2541 int dummy[sizeof (int) == 4
2542 && sizeof (void *) == 4
2543 && sizeof (long) == 4 ? 1 : -1];
2547 # Return 1 if we're generating ia32 code using default options, 0
2550 proc check_effective_target_ia32 { } {
2551 return [check_no_compiler_messages ia32 object {
2552 int dummy[sizeof (int) == 4
2553 && sizeof (void *) == 4
2554 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2558 # Return 1 if we're generating x32 code using default options, 0
2561 proc check_effective_target_x32 { } {
2562 return [check_no_compiler_messages x32 object {
2563 int dummy[sizeof (int) == 4
2564 && sizeof (void *) == 4
2565 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2569 # Return 1 if we're generating 32-bit integers using default
2570 # options, 0 otherwise.
2572 proc check_effective_target_int32 { } {
2573 return [check_no_compiler_messages int32 object {
2574 int dummy[sizeof (int) == 4 ? 1 : -1];
2578 # Return 1 if we're generating 32-bit or larger integers using default
2579 # options, 0 otherwise.
2581 proc check_effective_target_int32plus { } {
2582 return [check_no_compiler_messages int32plus object {
2583 int dummy[sizeof (int) >= 4 ? 1 : -1];
2587 # Return 1 if we're generating 32-bit or larger pointers using default
2588 # options, 0 otherwise.
2590 proc check_effective_target_ptr32plus { } {
2591 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2592 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2593 # cannot really hold a 32-bit address, so we always return false here.
2594 if { [istarget msp430-*-*] } {
2598 return [check_no_compiler_messages ptr32plus object {
2599 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2603 # Return 1 if we support 32-bit or larger array and structure sizes
2604 # using default options, 0 otherwise. Avoid false positive on
2605 # targets with 20 or 24 bit address spaces.
2607 proc check_effective_target_size32plus { } {
2608 return [check_no_compiler_messages size32plus object {
2609 char dummy[16777217L];
2613 # Returns 1 if we're generating 16-bit or smaller integers with the
2614 # default options, 0 otherwise.
2616 proc check_effective_target_int16 { } {
2617 return [check_no_compiler_messages int16 object {
2618 int dummy[sizeof (int) < 4 ? 1 : -1];
2622 # Return 1 if we're generating 64-bit code using default options, 0
2625 proc check_effective_target_lp64 { } {
2626 return [check_no_compiler_messages lp64 object {
2627 int dummy[sizeof (int) == 4
2628 && sizeof (void *) == 8
2629 && sizeof (long) == 8 ? 1 : -1];
2633 # Return 1 if we're generating 64-bit code using default llp64 options,
2636 proc check_effective_target_llp64 { } {
2637 return [check_no_compiler_messages llp64 object {
2638 int dummy[sizeof (int) == 4
2639 && sizeof (void *) == 8
2640 && sizeof (long long) == 8
2641 && sizeof (long) == 4 ? 1 : -1];
2645 # Return 1 if long and int have different sizes,
2648 proc check_effective_target_long_neq_int { } {
2649 return [check_no_compiler_messages long_ne_int object {
2650 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2654 # Return 1 if the target supports long double larger than double,
2657 proc check_effective_target_large_long_double { } {
2658 return [check_no_compiler_messages large_long_double object {
2659 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2663 # Return 1 if the target supports double larger than float,
2666 proc check_effective_target_large_double { } {
2667 return [check_no_compiler_messages large_double object {
2668 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2672 # Return 1 if the target supports long double of 128 bits,
2675 proc check_effective_target_longdouble128 { } {
2676 return [check_no_compiler_messages longdouble128 object {
2677 int dummy[sizeof(long double) == 16 ? 1 : -1];
2681 # Return 1 if the target supports double of 64 bits,
2684 proc check_effective_target_double64 { } {
2685 return [check_no_compiler_messages double64 object {
2686 int dummy[sizeof(double) == 8 ? 1 : -1];
2690 # Return 1 if the target supports double of at least 64 bits,
2693 proc check_effective_target_double64plus { } {
2694 return [check_no_compiler_messages double64plus object {
2695 int dummy[sizeof(double) >= 8 ? 1 : -1];
2699 # Return 1 if the target supports 'w' suffix on floating constant
2702 proc check_effective_target_has_w_floating_suffix { } {
2704 if [check_effective_target_c++] {
2705 append opts "-std=gnu++03"
2707 return [check_no_compiler_messages w_fp_suffix object {
2712 # Return 1 if the target supports 'q' suffix on floating constant
2715 proc check_effective_target_has_q_floating_suffix { } {
2717 if [check_effective_target_c++] {
2718 append opts "-std=gnu++03"
2720 return [check_no_compiler_messages q_fp_suffix object {
2725 # Return 1 if the target supports the _FloatN / _FloatNx type
2726 # indicated in the function name, 0 otherwise.
2728 proc check_effective_target_float16 {} {
2729 return [check_no_compiler_messages_nocache float16 object {
2731 } [add_options_for_float16 ""]]
2734 proc check_effective_target_float32 {} {
2735 return [check_no_compiler_messages_nocache float32 object {
2737 } [add_options_for_float32 ""]]
2740 proc check_effective_target_float64 {} {
2741 return [check_no_compiler_messages_nocache float64 object {
2743 } [add_options_for_float64 ""]]
2746 proc check_effective_target_float128 {} {
2747 return [check_no_compiler_messages_nocache float128 object {
2749 } [add_options_for_float128 ""]]
2752 proc check_effective_target_float32x {} {
2753 return [check_no_compiler_messages_nocache float32x object {
2755 } [add_options_for_float32x ""]]
2758 proc check_effective_target_float64x {} {
2759 return [check_no_compiler_messages_nocache float64x object {
2761 } [add_options_for_float64x ""]]
2764 proc check_effective_target_float128x {} {
2765 return [check_no_compiler_messages_nocache float128x object {
2767 } [add_options_for_float128x ""]]
2770 # Likewise, but runtime support for any special options used as well
2771 # as compile-time support is required.
2773 proc check_effective_target_float16_runtime {} {
2774 return [check_effective_target_float16]
2777 proc check_effective_target_float32_runtime {} {
2778 return [check_effective_target_float32]
2781 proc check_effective_target_float64_runtime {} {
2782 return [check_effective_target_float64]
2785 proc check_effective_target_float128_runtime {} {
2786 if { ![check_effective_target_float128] } {
2789 if { [istarget powerpc*-*-*] } {
2790 return [check_effective_target_base_quadfloat_support]
2795 proc check_effective_target_float32x_runtime {} {
2796 return [check_effective_target_float32x]
2799 proc check_effective_target_float64x_runtime {} {
2800 if { ![check_effective_target_float64x] } {
2803 if { [istarget powerpc*-*-*] } {
2804 return [check_effective_target_base_quadfloat_support]
2809 proc check_effective_target_float128x_runtime {} {
2810 return [check_effective_target_float128x]
2813 # Return 1 if the target hardware supports any options added for
2814 # _FloatN and _FloatNx types, 0 otherwise.
2816 proc check_effective_target_floatn_nx_runtime {} {
2817 if { [istarget powerpc*-*-aix*] } {
2820 if { [istarget powerpc*-*-*] } {
2821 return [check_effective_target_base_quadfloat_support]
2826 # Add options needed to use the _FloatN / _FloatNx type indicated in
2827 # the function name.
2829 proc add_options_for_float16 { flags } {
2830 if { [istarget arm*-*-*] } {
2831 return "$flags -mfp16-format=ieee"
2836 proc add_options_for_float32 { flags } {
2840 proc add_options_for_float64 { flags } {
2844 proc add_options_for_float128 { flags } {
2845 return [add_options_for___float128 "$flags"]
2848 proc add_options_for_float32x { flags } {
2852 proc add_options_for_float64x { flags } {
2853 return [add_options_for___float128 "$flags"]
2856 proc add_options_for_float128x { flags } {
2860 # Return 1 if the target supports __float128,
2863 proc check_effective_target___float128 { } {
2864 if { [istarget powerpc*-*-*] } {
2865 return [check_ppc_float128_sw_available]
2867 if { [istarget ia64-*-*]
2868 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2874 proc add_options_for___float128 { flags } {
2875 if { [istarget powerpc*-*-*] } {
2876 return "$flags -mfloat128 -mvsx"
2881 # Return 1 if the target supports any special run-time requirements
2882 # for __float128 or _Float128,
2885 proc check_effective_target_base_quadfloat_support { } {
2886 if { [istarget powerpc*-*-*] } {
2887 return [check_vsx_hw_available]
2892 # Return 1 if the target supports compiling fixed-point,
2895 proc check_effective_target_fixed_point { } {
2896 return [check_no_compiler_messages fixed_point object {
2897 _Sat _Fract x; _Sat _Accum y;
2901 # Return 1 if the target supports compiling decimal floating point,
2904 proc check_effective_target_dfp_nocache { } {
2905 verbose "check_effective_target_dfp_nocache: compiling source" 2
2906 set ret [check_no_compiler_messages_nocache dfp object {
2907 float x __attribute__((mode(DD)));
2909 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2913 proc check_effective_target_dfprt_nocache { } {
2914 return [check_runtime_nocache dfprt {
2915 typedef float d64 __attribute__((mode(DD)));
2916 d64 x = 1.2df, y = 2.3dd, z;
2917 int main () { z = x + y; return 0; }
2921 # Return 1 if the target supports compiling Decimal Floating Point,
2924 # This won't change for different subtargets so cache the result.
2926 proc check_effective_target_dfp { } {
2927 return [check_cached_effective_target dfp {
2928 check_effective_target_dfp_nocache
2932 # Return 1 if the target supports linking and executing Decimal Floating
2933 # Point, 0 otherwise.
2935 # This won't change for different subtargets so cache the result.
2937 proc check_effective_target_dfprt { } {
2938 return [check_cached_effective_target dfprt {
2939 check_effective_target_dfprt_nocache
2943 proc check_effective_target_powerpc_popcntb_ok { } {
2944 return [check_cached_effective_target powerpc_popcntb_ok {
2946 # Disable on Darwin.
2947 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2950 check_runtime_nocache powerpc_popcntb_ok {
2952 volatile int a = 0x12345678;
2955 asm volatile ("popcntb %0,%1" : "=r" (r) : "r" (a));
2963 # Return 1 if the target supports executing DFP hardware instructions,
2964 # 0 otherwise. Cache the result.
2966 proc check_dfp_hw_available { } {
2967 return [check_cached_effective_target dfp_hw_available {
2968 # For now, disable on Darwin
2969 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2972 check_runtime_nocache dfp_hw_available {
2973 volatile _Decimal64 r;
2974 volatile _Decimal64 a = 4.0DD;
2975 volatile _Decimal64 b = 2.0DD;
2978 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2979 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2980 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2981 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2984 } "-mcpu=power6 -mhard-float"
2989 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2991 proc check_effective_target_ucn_nocache { } {
2992 # -std=c99 is only valid for C
2993 if [check_effective_target_c] {
2994 set ucnopts "-std=c99"
2998 verbose "check_effective_target_ucn_nocache: compiling source" 2
2999 set ret [check_no_compiler_messages_nocache ucn object {
3002 verbose "check_effective_target_ucn_nocache: returning $ret" 2
3006 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
3008 # This won't change for different subtargets, so cache the result.
3010 proc check_effective_target_ucn { } {
3011 return [check_cached_effective_target ucn {
3012 check_effective_target_ucn_nocache
3016 # Return 1 if the target needs a command line argument to enable a SIMD
3019 proc check_effective_target_vect_cmdline_needed { } {
3020 global et_vect_cmdline_needed_saved
3021 global et_vect_cmdline_needed_target_name
3023 if { ![info exists et_vect_cmdline_needed_target_name] } {
3024 set et_vect_cmdline_needed_target_name ""
3027 # If the target has changed since we set the cached value, clear it.
3028 set current_target [current_target_name]
3029 if { $current_target != $et_vect_cmdline_needed_target_name } {
3030 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
3031 set et_vect_cmdline_needed_target_name $current_target
3032 if { [info exists et_vect_cmdline_needed_saved] } {
3033 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
3034 unset et_vect_cmdline_needed_saved
3038 if [info exists et_vect_cmdline_needed_saved] {
3039 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
3041 set et_vect_cmdline_needed_saved 1
3042 if { [istarget alpha*-*-*]
3043 || [istarget ia64-*-*]
3044 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
3045 && ![is-effective-target ia32])
3046 || ([istarget powerpc*-*-*]
3047 && ([check_effective_target_powerpc_spe]
3048 || [check_effective_target_powerpc_altivec]))
3049 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
3050 || [istarget spu-*-*]
3051 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
3052 || [istarget aarch64*-*-*] } {
3053 set et_vect_cmdline_needed_saved 0
3057 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
3058 return $et_vect_cmdline_needed_saved
3061 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
3063 # This won't change for different subtargets so cache the result.
3065 proc check_effective_target_vect_int { } {
3066 global et_vect_int_saved
3069 if [info exists et_vect_int_saved($et_index)] {
3070 verbose "check_effective_target_vect_int: using cached result" 2
3072 set et_vect_int_saved($et_index) 0
3073 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3074 || ([istarget powerpc*-*-*]
3075 && ![istarget powerpc-*-linux*paired*])
3076 || [istarget spu-*-*]
3077 || [istarget sparc*-*-*]
3078 || [istarget alpha*-*-*]
3079 || [istarget ia64-*-*]
3080 || [istarget aarch64*-*-*]
3081 || [is-effective-target arm_neon]
3082 || ([istarget mips*-*-*]
3083 && ([et-is-effective-target mips_loongson]
3084 || [et-is-effective-target mips_msa]))
3085 || ([istarget s390*-*-*]
3086 && [check_effective_target_s390_vx]) } {
3087 set et_vect_int_saved($et_index) 1
3091 verbose "check_effective_target_vect_int:\
3092 returning $et_vect_int_saved($et_index)" 2
3093 return $et_vect_int_saved($et_index)
3096 # Return 1 if the target supports signed int->float conversion
3099 proc check_effective_target_vect_intfloat_cvt { } {
3100 global et_vect_intfloat_cvt_saved
3103 if [info exists et_vect_intfloat_cvt_saved($et_index)] {
3104 verbose "check_effective_target_vect_intfloat_cvt:\
3105 using cached result" 2
3107 set et_vect_intfloat_cvt_saved($et_index) 0
3108 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3109 || ([istarget powerpc*-*-*]
3110 && ![istarget powerpc-*-linux*paired*])
3111 || [is-effective-target arm_neon]
3112 || ([istarget mips*-*-*]
3113 && [et-is-effective-target mips_msa]) } {
3114 set et_vect_intfloat_cvt_saved($et_index) 1
3118 verbose "check_effective_target_vect_intfloat_cvt:\
3119 returning $et_vect_intfloat_cvt_saved($et_index)" 2
3120 return $et_vect_intfloat_cvt_saved($et_index)
3123 # Return 1 if the target supports signed double->int conversion
3126 proc check_effective_target_vect_doubleint_cvt { } {
3127 global et_vect_doubleint_cvt_saved
3130 if [info exists et_vect_doubleint_cvt_saved($et_index)] {
3131 verbose "check_effective_target_vect_doubleint_cvt: using cached result" 2
3133 set et_vect_doubleint_cvt_saved($et_index) 0
3134 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3135 && [check_no_compiler_messages vect_doubleint_cvt assembly {
3136 #ifdef __tune_atom__
3137 # error No double vectorizer support.
3140 || [istarget aarch64*-*-*]
3141 || [istarget spu-*-*]
3142 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3143 || ([istarget mips*-*-*]
3144 && [et-is-effective-target mips_msa]) } {
3145 set et_vect_doubleint_cvt_saved($et_index) 1
3149 verbose "check_effective_target_vect_doubleint_cvt:\
3150 returning $et_vect_doubleint_cvt_saved($et_index)" 2
3151 return $et_vect_doubleint_cvt_saved($et_index)
3154 # Return 1 if the target supports signed int->double conversion
3157 proc check_effective_target_vect_intdouble_cvt { } {
3158 global et_vect_intdouble_cvt_saved
3161 if [info exists et_vect_intdouble_cvt_saved($et_index)] {
3162 verbose "check_effective_target_vect_intdouble_cvt: using cached result" 2
3164 set et_vect_intdouble_cvt_saved($et_index) 0
3165 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3166 && [check_no_compiler_messages vect_intdouble_cvt assembly {
3167 #ifdef __tune_atom__
3168 # error No double vectorizer support.
3171 || [istarget aarch64*-*-*]
3172 || [istarget spu-*-*]
3173 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3174 || ([istarget mips*-*-*]
3175 && [et-is-effective-target mips_msa]) } {
3176 set et_vect_intdouble_cvt_saved($et_index) 1
3180 verbose "check_effective_target_vect_intdouble_cvt:\
3181 returning $et_vect_intdouble_cvt_saved($et_index)" 2
3182 return $et_vect_intdouble_cvt_saved($et_index)
3185 #Return 1 if we're supporting __int128 for target, 0 otherwise.
3187 proc check_effective_target_int128 { } {
3188 return [check_no_compiler_messages int128 object {
3190 #ifndef __SIZEOF_INT128__
3199 # Return 1 if the target supports unsigned int->float conversion
3202 proc check_effective_target_vect_uintfloat_cvt { } {
3203 global et_vect_uintfloat_cvt_saved
3206 if [info exists et_vect_uintfloat_cvt_saved($et_index)] {
3207 verbose "check_effective_target_vect_uintfloat_cvt:\
3208 using cached result" 2
3210 set et_vect_uintfloat_cvt_saved($et_index) 0
3211 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3212 || ([istarget powerpc*-*-*]
3213 && ![istarget powerpc-*-linux*paired*])
3214 || [istarget aarch64*-*-*]
3215 || [is-effective-target arm_neon]
3216 || ([istarget mips*-*-*]
3217 && [et-is-effective-target mips_msa]) } {
3218 set et_vect_uintfloat_cvt_saved($et_index) 1
3222 verbose "check_effective_target_vect_uintfloat_cvt:\
3223 returning $et_vect_uintfloat_cvt_saved($et_index)" 2
3224 return $et_vect_uintfloat_cvt_saved($et_index)
3228 # Return 1 if the target supports signed float->int conversion
3231 proc check_effective_target_vect_floatint_cvt { } {
3232 global et_vect_floatint_cvt_saved
3235 if [info exists et_vect_floatint_cvt_saved($et_index)] {
3236 verbose "check_effective_target_vect_floatint_cvt:\
3237 using cached result" 2
3239 set et_vect_floatint_cvt_saved($et_index) 0
3240 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3241 || ([istarget powerpc*-*-*]
3242 && ![istarget powerpc-*-linux*paired*])
3243 || [is-effective-target arm_neon]
3244 || ([istarget mips*-*-*]
3245 && [et-is-effective-target mips_msa]) } {
3246 set et_vect_floatint_cvt_saved($et_index) 1
3250 verbose "check_effective_target_vect_floatint_cvt:\
3251 returning $et_vect_floatint_cvt_saved($et_index)" 2
3252 return $et_vect_floatint_cvt_saved($et_index)
3255 # Return 1 if the target supports unsigned float->int conversion
3258 proc check_effective_target_vect_floatuint_cvt { } {
3259 global et_vect_floatuint_cvt_saved
3262 if [info exists et_vect_floatuint_cvt_saved($et_index)] {
3263 verbose "check_effective_target_vect_floatuint_cvt:\
3264 using cached result" 2
3266 set et_vect_floatuint_cvt_saved($et_index) 0
3267 if { ([istarget powerpc*-*-*]
3268 && ![istarget powerpc-*-linux*paired*])
3269 || [is-effective-target arm_neon]
3270 || ([istarget mips*-*-*]
3271 && [et-is-effective-target mips_msa]) } {
3272 set et_vect_floatuint_cvt_saved($et_index) 1
3276 verbose "check_effective_target_vect_floatuint_cvt:\
3277 returning $et_vect_floatuint_cvt_saved($et_index)" 2
3278 return $et_vect_floatuint_cvt_saved($et_index)
3281 # Return 1 if peeling for alignment might be profitable on the target
3284 proc check_effective_target_vect_peeling_profitable { } {
3285 global et_vect_peeling_profitable_saved
3288 if [info exists et_vect_peeling_profitable_saved($et_index)] {
3289 verbose "check_effective_target_vect_peeling_profitable: using cached result" 2
3291 set et_vect_peeling_profitable_saved($et_index) 1
3292 if { ([istarget s390*-*-*]
3293 && [check_effective_target_s390_vx])
3294 || [check_effective_target_vect_element_align_preferred] } {
3295 set et_vect_peeling_profitable_saved($et_index) 0
3299 verbose "check_effective_target_vect_peeling_profitable:\
3300 returning $et_vect_peeling_profitable_saved($et_index)" 2
3301 return $et_vect_peeling_profitable_saved($et_index)
3304 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
3306 # This won't change for different subtargets so cache the result.
3308 proc check_effective_target_vect_simd_clones { } {
3309 global et_vect_simd_clones_saved
3312 if [info exists et_vect_simd_clones_saved($et_index)] {
3313 verbose "check_effective_target_vect_simd_clones: using cached result" 2
3315 set et_vect_simd_clones_saved($et_index) 0
3316 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx,
3317 # avx2 and avx512f clone. Only the right clone for the
3318 # specified arch will be chosen, but still we need to at least
3319 # be able to assemble avx512f.
3320 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3321 && [check_effective_target_avx512f]) } {
3322 set et_vect_simd_clones_saved($et_index) 1
3326 verbose "check_effective_target_vect_simd_clones:\
3327 returning $et_vect_simd_clones_saved($et_index)" 2
3328 return $et_vect_simd_clones_saved($et_index)
3331 # Return 1 if this is a AArch64 target supporting big endian
3332 proc check_effective_target_aarch64_big_endian { } {
3333 return [check_no_compiler_messages aarch64_big_endian assembly {
3334 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
3335 #error !__aarch64__ || !__AARCH64EB__
3340 # Return 1 if this is a AArch64 target supporting little endian
3341 proc check_effective_target_aarch64_little_endian { } {
3342 if { ![istarget aarch64*-*-*] } {
3346 return [check_no_compiler_messages aarch64_little_endian assembly {
3347 #if !defined(__aarch64__) || defined(__AARCH64EB__)
3353 # Return 1 if this is a compiler supporting ARC atomic operations
3354 proc check_effective_target_arc_atomic { } {
3355 return [check_no_compiler_messages arc_atomic assembly {
3356 #if !defined(__ARC_ATOMIC__)
3362 # Return 1 if this is an arm target using 32-bit instructions
3363 proc check_effective_target_arm32 { } {
3364 if { ![istarget arm*-*-*] } {
3368 return [check_no_compiler_messages arm32 assembly {
3369 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
3370 #error !__arm || __thumb__ && !__thumb2__
3375 # Return 1 if this is an arm target not using Thumb
3376 proc check_effective_target_arm_nothumb { } {
3377 if { ![istarget arm*-*-*] } {
3381 return [check_no_compiler_messages arm_nothumb assembly {
3382 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
3383 #error !__arm__ || __thumb || __thumb2__
3388 # Return 1 if this is a little-endian ARM target
3389 proc check_effective_target_arm_little_endian { } {
3390 if { ![istarget arm*-*-*] } {
3394 return [check_no_compiler_messages arm_little_endian assembly {
3395 #if !defined(__arm__) || !defined(__ARMEL__)
3396 #error !__arm__ || !__ARMEL__
3401 # Return 1 if this is an ARM target that only supports aligned vector accesses
3402 proc check_effective_target_arm_vect_no_misalign { } {
3403 if { ![istarget arm*-*-*] } {
3407 return [check_no_compiler_messages arm_vect_no_misalign assembly {
3408 #if !defined(__arm__) \
3409 || (defined(__ARM_FEATURE_UNALIGNED) \
3410 && defined(__ARMEL__))
3411 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
3417 # Return 1 if this is an ARM target supporting -mfpu=vfp
3418 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
3421 proc check_effective_target_arm_vfp_ok { } {
3422 if { [check_effective_target_arm32] } {
3423 return [check_no_compiler_messages arm_vfp_ok object {
3425 } "-mfpu=vfp -mfloat-abi=softfp"]
3431 # Return 1 if this is an ARM target supporting -mfpu=vfp3
3432 # -mfloat-abi=softfp.
3434 proc check_effective_target_arm_vfp3_ok { } {
3435 if { [check_effective_target_arm32] } {
3436 return [check_no_compiler_messages arm_vfp3_ok object {
3438 } "-mfpu=vfp3 -mfloat-abi=softfp"]
3444 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
3445 # -mfloat-abi=softfp.
3446 proc check_effective_target_arm_v8_vfp_ok {} {
3447 if { [check_effective_target_arm32] } {
3448 return [check_no_compiler_messages arm_v8_vfp_ok object {
3451 __asm__ volatile ("vrinta.f32.f32 s0, s0");
3454 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
3460 # Return 1 if this is an ARM target supporting -mfpu=vfp
3461 # -mfloat-abi=hard. Some multilibs may be incompatible with these
3464 proc check_effective_target_arm_hard_vfp_ok { } {
3465 if { [check_effective_target_arm32]
3466 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
3467 return [check_no_compiler_messages arm_hard_vfp_ok executable {
3468 int main() { return 0;}
3469 } "-mfpu=vfp -mfloat-abi=hard"]
3475 # Return 1 if this is an ARM target defining __ARM_FP. We may need
3476 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3477 # incompatible with these options. Also set et_arm_fp_flags to the
3478 # best options to add.
3480 proc check_effective_target_arm_fp_ok_nocache { } {
3481 global et_arm_fp_flags
3482 set et_arm_fp_flags ""
3483 if { [check_effective_target_arm32] } {
3484 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
3485 if { [check_no_compiler_messages_nocache arm_fp_ok object {
3487 #error __ARM_FP not defined
3490 set et_arm_fp_flags $flags
3499 proc check_effective_target_arm_fp_ok { } {
3500 return [check_cached_effective_target arm_fp_ok \
3501 check_effective_target_arm_fp_ok_nocache]
3504 # Add the options needed to define __ARM_FP. We need either
3505 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3506 # specified by the multilib, use it.
3508 proc add_options_for_arm_fp { flags } {
3509 if { ! [check_effective_target_arm_fp_ok] } {
3512 global et_arm_fp_flags
3513 return "$flags $et_arm_fp_flags"
3516 # Return 1 if this is an ARM target that supports DSP multiply with
3517 # current multilib flags.
3519 proc check_effective_target_arm_dsp { } {
3520 return [check_no_compiler_messages arm_dsp assembly {
3521 #ifndef __ARM_FEATURE_DSP
3528 # Return 1 if this is an ARM target that supports unaligned word/halfword
3529 # load/store instructions.
3531 proc check_effective_target_arm_unaligned { } {
3532 return [check_no_compiler_messages arm_unaligned assembly {
3533 #ifndef __ARM_FEATURE_UNALIGNED
3534 #error no unaligned support
3540 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3541 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3542 # incompatible with these options. Also set et_arm_crypto_flags to the
3543 # best options to add.
3545 proc check_effective_target_arm_crypto_ok_nocache { } {
3546 global et_arm_crypto_flags
3547 set et_arm_crypto_flags ""
3548 if { [check_effective_target_arm_v8_neon_ok] } {
3549 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
3550 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
3551 #include "arm_neon.h"
3553 foo (uint8x16_t a, uint8x16_t b)
3555 return vaeseq_u8 (a, b);
3558 set et_arm_crypto_flags $flags
3567 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3569 proc check_effective_target_arm_crypto_ok { } {
3570 return [check_cached_effective_target arm_crypto_ok \
3571 check_effective_target_arm_crypto_ok_nocache]
3574 # Add options for crypto extensions.
3575 proc add_options_for_arm_crypto { flags } {
3576 if { ! [check_effective_target_arm_crypto_ok] } {
3579 global et_arm_crypto_flags
3580 return "$flags $et_arm_crypto_flags"
3583 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3584 # or -mfloat-abi=hard, but if one is already specified by the
3585 # multilib, use it. Similarly, if a -mfpu option already enables
3586 # NEON, do not add -mfpu=neon.
3588 proc add_options_for_arm_neon { flags } {
3589 if { ! [check_effective_target_arm_neon_ok] } {
3592 global et_arm_neon_flags
3593 return "$flags $et_arm_neon_flags"
3596 proc add_options_for_arm_v8_vfp { flags } {
3597 if { ! [check_effective_target_arm_v8_vfp_ok] } {
3600 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
3603 proc add_options_for_arm_v8_neon { flags } {
3604 if { ! [check_effective_target_arm_v8_neon_ok] } {
3607 global et_arm_v8_neon_flags
3608 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
3611 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
3612 # options for AArch64 and for ARM.
3614 proc add_options_for_arm_v8_1a_neon { flags } {
3615 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
3618 global et_arm_v8_1a_neon_flags
3619 return "$flags $et_arm_v8_1a_neon_flags"
3622 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
3623 # Also adds the ARMv8 FP options for ARM and for AArch64.
3625 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
3626 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
3629 global et_arm_v8_2a_fp16_scalar_flags
3630 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
3633 # Add the options needed for ARMv8.2 with the FP16 extension. Also adds
3634 # the ARMv8 NEON options for ARM and for AArch64.
3636 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
3637 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
3640 global et_arm_v8_2a_fp16_neon_flags
3641 return "$flags $et_arm_v8_2a_fp16_neon_flags"
3644 proc add_options_for_arm_crc { flags } {
3645 if { ! [check_effective_target_arm_crc_ok] } {
3648 global et_arm_crc_flags
3649 return "$flags $et_arm_crc_flags"
3652 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3653 # or -mfloat-abi=hard, but if one is already specified by the
3654 # multilib, use it. Similarly, if a -mfpu option already enables
3655 # NEON, do not add -mfpu=neon.
3657 proc add_options_for_arm_neonv2 { flags } {
3658 if { ! [check_effective_target_arm_neonv2_ok] } {
3661 global et_arm_neonv2_flags
3662 return "$flags $et_arm_neonv2_flags"
3665 # Add the options needed for vfp3.
3666 proc add_options_for_arm_vfp3 { flags } {
3667 if { ! [check_effective_target_arm_vfp3_ok] } {
3670 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
3673 # Return 1 if this is an ARM target supporting -mfpu=neon
3674 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3675 # incompatible with these options. Also set et_arm_neon_flags to the
3676 # best options to add.
3678 proc check_effective_target_arm_neon_ok_nocache { } {
3679 global et_arm_neon_flags
3680 set et_arm_neon_flags ""
3681 if { [check_effective_target_arm32] } {
3682 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a" "-mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard -march=armv7-a"} {
3683 if { [check_no_compiler_messages_nocache arm_neon_ok object {
3684 #include <arm_neon.h>
3686 #ifndef __ARM_NEON__
3689 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3690 configured for -mcpu=arm926ej-s, for example. */
3691 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
3692 #error Architecture does not support NEON.
3695 set et_arm_neon_flags $flags
3704 proc check_effective_target_arm_neon_ok { } {
3705 return [check_cached_effective_target arm_neon_ok \
3706 check_effective_target_arm_neon_ok_nocache]
3709 # Return 1 if this is an ARM target supporting -mfpu=neon without any
3710 # -mfloat-abi= option. Useful in tests where add_options is not
3711 # supported (such as lto tests).
3713 proc check_effective_target_arm_neon_ok_no_float_abi_nocache { } {
3714 if { [check_effective_target_arm32] } {
3715 foreach flags {"-mfpu=neon"} {
3716 if { [check_no_compiler_messages_nocache arm_neon_ok_no_float_abi object {
3717 #include <arm_neon.h>
3719 #ifndef __ARM_NEON__
3722 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3723 configured for -mcpu=arm926ej-s, for example. */
3724 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
3725 #error Architecture does not support NEON.
3736 proc check_effective_target_arm_neon_ok_no_float_abi { } {
3737 return [check_cached_effective_target arm_neon_ok_no_float_abi \
3738 check_effective_target_arm_neon_ok_no_float_abi_nocache]
3741 proc check_effective_target_arm_crc_ok_nocache { } {
3742 global et_arm_crc_flags
3743 set et_arm_crc_flags "-march=armv8-a+crc"
3744 return [check_no_compiler_messages_nocache arm_crc_ok object {
3745 #if !defined (__ARM_FEATURE_CRC32)
3748 } "$et_arm_crc_flags"]
3751 proc check_effective_target_arm_crc_ok { } {
3752 return [check_cached_effective_target arm_crc_ok \
3753 check_effective_target_arm_crc_ok_nocache]
3756 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
3757 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3758 # incompatible with these options. Also set et_arm_neon_fp16_flags to
3759 # the best options to add.
3761 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
3762 global et_arm_neon_fp16_flags
3763 global et_arm_neon_flags
3764 set et_arm_neon_fp16_flags ""
3765 if { [check_effective_target_arm32]
3766 && [check_effective_target_arm_neon_ok] } {
3767 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3768 "-mfpu=neon-fp16 -mfloat-abi=softfp"
3769 "-mfp16-format=ieee"
3770 "-mfloat-abi=softfp -mfp16-format=ieee"
3771 "-mfpu=neon-fp16 -mfp16-format=ieee"
3772 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
3773 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
3774 #include "arm_neon.h"
3776 foo (float32x4_t arg)
3778 return vcvt_f16_f32 (arg);
3780 } "$et_arm_neon_flags $flags"] } {
3781 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
3790 proc check_effective_target_arm_neon_fp16_ok { } {
3791 return [check_cached_effective_target arm_neon_fp16_ok \
3792 check_effective_target_arm_neon_fp16_ok_nocache]
3795 proc check_effective_target_arm_neon_fp16_hw { } {
3796 if {! [check_effective_target_arm_neon_fp16_ok] } {
3799 global et_arm_neon_fp16_flags
3800 check_runtime_nocache arm_neon_fp16_hw {
3802 main (int argc, char **argv)
3804 asm ("vcvt.f32.f16 q1, d0");
3807 } $et_arm_neon_fp16_flags
3810 proc add_options_for_arm_neon_fp16 { flags } {
3811 if { ! [check_effective_target_arm_neon_fp16_ok] } {
3814 global et_arm_neon_fp16_flags
3815 return "$flags $et_arm_neon_fp16_flags"
3818 # Return 1 if this is an ARM target supporting the FP16 alternative
3819 # format. Some multilibs may be incompatible with the options needed. Also
3820 # set et_arm_neon_fp16_flags to the best options to add.
3822 proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
3823 global et_arm_neon_fp16_flags
3824 set et_arm_neon_fp16_flags ""
3825 if { [check_effective_target_arm32] } {
3826 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3827 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3828 if { [check_no_compiler_messages_nocache \
3829 arm_fp16_alternative_ok object {
3830 #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3831 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
3833 } "$flags -mfp16-format=alternative"] } {
3834 set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
3843 proc check_effective_target_arm_fp16_alternative_ok { } {
3844 return [check_cached_effective_target arm_fp16_alternative_ok \
3845 check_effective_target_arm_fp16_alternative_ok_nocache]
3848 # Return 1 if this is an ARM target supports specifying the FP16 none
3849 # format. Some multilibs may be incompatible with the options needed.
3851 proc check_effective_target_arm_fp16_none_ok_nocache { } {
3852 if { [check_effective_target_arm32] } {
3853 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3854 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3855 if { [check_no_compiler_messages_nocache \
3856 arm_fp16_none_ok object {
3857 #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3858 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
3860 #if defined (__ARM_FP16_FORMAT_IEEE)
3861 #error __ARM_FP16_FORMAT_IEEE defined
3863 } "$flags -mfp16-format=none"] } {
3872 proc check_effective_target_arm_fp16_none_ok { } {
3873 return [check_cached_effective_target arm_fp16_none_ok \
3874 check_effective_target_arm_fp16_none_ok_nocache]
3877 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
3878 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3879 # incompatible with these options. Also set et_arm_v8_neon_flags to the
3880 # best options to add.
3882 proc check_effective_target_arm_v8_neon_ok_nocache { } {
3883 global et_arm_v8_neon_flags
3884 set et_arm_v8_neon_flags ""
3885 if { [check_effective_target_arm32] } {
3886 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3887 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
3889 #error not armv8 or later
3891 #include "arm_neon.h"
3895 __asm__ volatile ("vrintn.f32 q0, q0");
3897 } "$flags -march=armv8-a"] } {
3898 set et_arm_v8_neon_flags $flags
3907 proc check_effective_target_arm_v8_neon_ok { } {
3908 return [check_cached_effective_target arm_v8_neon_ok \
3909 check_effective_target_arm_v8_neon_ok_nocache]
3912 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3913 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3914 # incompatible with these options. Also set et_arm_neonv2_flags to the
3915 # best options to add.
3917 proc check_effective_target_arm_neonv2_ok_nocache { } {
3918 global et_arm_neonv2_flags
3919 global et_arm_neon_flags
3920 set et_arm_neonv2_flags ""
3921 if { [check_effective_target_arm32]
3922 && [check_effective_target_arm_neon_ok] } {
3923 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3924 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3925 #include "arm_neon.h"
3927 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3929 return vfma_f32 (a, b, c);
3931 } "$et_arm_neon_flags $flags"] } {
3932 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
3941 proc check_effective_target_arm_neonv2_ok { } {
3942 return [check_cached_effective_target arm_neonv2_ok \
3943 check_effective_target_arm_neonv2_ok_nocache]
3946 # Add the options needed for VFP FP16 support. We need either
3947 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
3948 # the multilib, use it.
3950 proc add_options_for_arm_fp16 { flags } {
3951 if { ! [check_effective_target_arm_fp16_ok] } {
3954 global et_arm_fp16_flags
3955 return "$flags $et_arm_fp16_flags"
3958 # Add the options needed to enable support for IEEE format
3959 # half-precision support. This is valid for ARM targets.
3961 proc add_options_for_arm_fp16_ieee { flags } {
3962 if { ! [check_effective_target_arm_fp16_ok] } {
3965 global et_arm_fp16_flags
3966 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
3969 # Add the options needed to enable support for ARM Alternative format
3970 # half-precision support. This is valid for ARM targets.
3972 proc add_options_for_arm_fp16_alternative { flags } {
3973 if { ! [check_effective_target_arm_fp16_ok] } {
3976 global et_arm_fp16_flags
3977 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
3980 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
3981 # Skip multilibs that are incompatible with these options and set
3982 # et_arm_fp16_flags to the best options to add. This test is valid for
3985 proc check_effective_target_arm_fp16_ok_nocache { } {
3986 global et_arm_fp16_flags
3987 set et_arm_fp16_flags ""
3988 if { ! [check_effective_target_arm32] } {
3992 [list "" { *-*-* } { "-mfpu=*" } \
3993 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
3994 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
3995 # Multilib flags would override -mfpu.
3998 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
3999 # Must generate floating-point instructions.
4002 if [check_effective_target_arm_hf_eabi] {
4003 # Use existing float-abi and force an fpu which supports fp16
4004 set et_arm_fp16_flags "-mfpu=vfpv4"
4007 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
4008 # The existing -mfpu value is OK; use it, but add softfp.
4009 set et_arm_fp16_flags "-mfloat-abi=softfp"
4012 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
4013 # macro to check for this support.
4014 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
4015 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
4018 set et_arm_fp16_flags "$flags"
4025 proc check_effective_target_arm_fp16_ok { } {
4026 return [check_cached_effective_target arm_fp16_ok \
4027 check_effective_target_arm_fp16_ok_nocache]
4030 # Return 1 if the target supports executing VFP FP16 instructions, 0
4031 # otherwise. This test is valid for ARM only.
4033 proc check_effective_target_arm_fp16_hw { } {
4034 if {! [check_effective_target_arm_fp16_ok] } {
4037 global et_arm_fp16_flags
4038 check_runtime_nocache arm_fp16_hw {
4040 main (int argc, char **argv)
4044 asm ("vcvtb.f32.f16 %0, %1"
4045 : "=w" (r) : "w" (a)
4046 : /* No clobbers. */);
4047 return (r == 1.0) ? 0 : 1;
4049 } "$et_arm_fp16_flags -mfp16-format=ieee"
4052 # Creates a series of routines that return 1 if the given architecture
4053 # can be selected and a routine to give the flags to select that architecture
4054 # Note: Extra flags may be added to disable options from newer compilers
4055 # (Thumb in particular - but others may be added in the future).
4056 # Warning: Do not use check_effective_target_arm_arch_*_ok for architecture
4057 # extension (eg. ARMv8.1-A) since there is no macro defined for them. See
4058 # how only __ARM_ARCH_8A__ is checked for ARMv8.1-A.
4059 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
4060 # /* { dg-add-options arm_arch_v5 } */
4061 # /* { dg-require-effective-target arm_arch_v5_multilib } */
4062 foreach { armfunc armflag armdefs } {
4063 v4 "-march=armv4 -marm" __ARM_ARCH_4__
4064 v4t "-march=armv4t" __ARM_ARCH_4T__
4065 v5 "-march=armv5 -marm" __ARM_ARCH_5__
4066 v5t "-march=armv5t" __ARM_ARCH_5T__
4067 v5te "-march=armv5te" __ARM_ARCH_5TE__
4068 v6 "-march=armv6" __ARM_ARCH_6__
4069 v6k "-march=armv6k" __ARM_ARCH_6K__
4070 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
4071 v6z "-march=armv6z" __ARM_ARCH_6Z__
4072 v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
4073 v7a "-march=armv7-a" __ARM_ARCH_7A__
4074 v7r "-march=armv7-r" __ARM_ARCH_7R__
4075 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
4076 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
4077 v7ve "-march=armv7ve -marm"
4078 "__ARM_ARCH_7A__ && __ARM_FEATURE_IDIV"
4079 v8a "-march=armv8-a" __ARM_ARCH_8A__
4080 v8_1a "-march=armv8.1a" __ARM_ARCH_8A__
4081 v8_2a "-march=armv8.2a" __ARM_ARCH_8A__
4082 v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft"
4083 __ARM_ARCH_8M_BASE__
4084 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
4085 v8r "-march=armv8-r" __ARM_ARCH_8R__ } {
4086 eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
4087 proc check_effective_target_arm_arch_FUNC_ok { } {
4088 if { [ string match "*-marm*" "FLAG" ] &&
4089 ![check_effective_target_arm_arm_ok] } {
4092 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
4099 proc add_options_for_arm_arch_FUNC { flags } {
4100 return "$flags FLAG"
4103 proc check_effective_target_arm_arch_FUNC_multilib { } {
4104 return [check_runtime arm_arch_FUNC_multilib {
4110 } [add_options_for_arm_arch_FUNC ""]]
4115 # Return 1 if GCC was configured with --with-mode=
4116 proc check_effective_target_default_mode { } {
4118 return [check_configured_with "with-mode="]
4121 # Return 1 if this is an ARM target where -marm causes ARM to be
4124 proc check_effective_target_arm_arm_ok { } {
4125 return [check_no_compiler_messages arm_arm_ok assembly {
4126 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
4127 #error !__arm__ || __thumb__ || __thumb2__
4133 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
4136 proc check_effective_target_arm_thumb1_ok { } {
4137 return [check_no_compiler_messages arm_thumb1_ok assembly {
4138 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4139 #error !__arm__ || !__thumb__ || __thumb2__
4141 int foo (int i) { return i; }
4145 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
4148 proc check_effective_target_arm_thumb2_ok { } {
4149 return [check_no_compiler_messages arm_thumb2_ok assembly {
4150 #if !defined(__thumb2__)
4153 int foo (int i) { return i; }
4157 # Return 1 if this is an ARM target where Thumb-1 is used without options
4158 # added by the test.
4160 proc check_effective_target_arm_thumb1 { } {
4161 return [check_no_compiler_messages arm_thumb1 assembly {
4162 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4163 #error !__arm__ || !__thumb__ || __thumb2__
4169 # Return 1 if this is an ARM target where Thumb-2 is used without options
4170 # added by the test.
4172 proc check_effective_target_arm_thumb2 { } {
4173 return [check_no_compiler_messages arm_thumb2 assembly {
4174 #if !defined(__thumb2__)
4181 # Return 1 if this is an ARM target where conditional execution is available.
4183 proc check_effective_target_arm_cond_exec { } {
4184 return [check_no_compiler_messages arm_cond_exec assembly {
4185 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
4192 # Return 1 if this is an ARM cortex-M profile cpu
4194 proc check_effective_target_arm_cortex_m { } {
4195 if { ![istarget arm*-*-*] } {
4198 return [check_no_compiler_messages arm_cortex_m assembly {
4199 #if defined(__ARM_ARCH_ISA_ARM)
4200 #error __ARM_ARCH_ISA_ARM is defined
4206 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4207 # used and MOVT/MOVW instructions to be available.
4209 proc check_effective_target_arm_thumb1_movt_ok {} {
4210 if [check_effective_target_arm_thumb1_ok] {
4211 return [check_no_compiler_messages arm_movt object {
4215 asm ("movt r0, #42");
4223 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4224 # used and CBZ and CBNZ instructions are available.
4226 proc check_effective_target_arm_thumb1_cbz_ok {} {
4227 if [check_effective_target_arm_thumb1_ok] {
4228 return [check_no_compiler_messages arm_movt object {
4232 asm ("cbz r0, 2f\n2:");
4240 # Return 1 if this is an ARM target where ARMv8-M Security Extensions is
4243 proc check_effective_target_arm_cmse_ok {} {
4244 return [check_no_compiler_messages arm_cmse object {
4253 # Return 1 if this compilation turns on string_ops_prefer_neon on.
4255 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
4256 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
4257 int foo (void) { return 0; }
4258 } "-O2 -mprint-tune-info" ]
4261 # Return 1 if the target supports executing NEON instructions, 0
4262 # otherwise. Cache the result.
4264 proc check_effective_target_arm_neon_hw { } {
4265 return [check_runtime arm_neon_hw_available {
4269 long long a = 0, b = 1;
4270 asm ("vorr %P0, %P1, %P2"
4272 : "0" (a), "w" (b));
4275 } [add_options_for_arm_neon ""]]
4278 proc check_effective_target_arm_neonv2_hw { } {
4279 return [check_runtime arm_neon_hwv2_available {
4280 #include "arm_neon.h"
4284 float32x2_t a, b, c;
4285 asm ("vfma.f32 %P0, %P1, %P2"
4287 : "w" (b), "w" (c));
4290 } [add_options_for_arm_neonv2 ""]]
4293 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
4294 # otherwise. The test is valid for AArch64 and ARM. Record the command
4295 # line options needed.
4297 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
4298 global et_arm_v8_1a_neon_flags
4299 set et_arm_v8_1a_neon_flags ""
4301 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4305 # Iterate through sets of options to find the compiler flags that
4306 # need to be added to the -march option. Start with the empty set
4307 # since AArch64 only needs the -march setting.
4308 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4309 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4310 foreach arches { "-march=armv8-a+rdma" "-march=armv8.1-a" } {
4311 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
4312 #if !defined (__ARM_FEATURE_QRDMX)
4313 #error "__ARM_FEATURE_QRDMX not defined"
4315 } "$flags $arches"] } {
4316 set et_arm_v8_1a_neon_flags "$flags $arches"
4325 proc check_effective_target_arm_v8_1a_neon_ok { } {
4326 return [check_cached_effective_target arm_v8_1a_neon_ok \
4327 check_effective_target_arm_v8_1a_neon_ok_nocache]
4330 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
4331 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4332 # Record the command line options needed.
4334 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
4335 global et_arm_v8_2a_fp16_scalar_flags
4336 set et_arm_v8_2a_fp16_scalar_flags ""
4338 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4342 # Iterate through sets of options to find the compiler flags that
4343 # need to be added to the -march option.
4344 foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
4345 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
4346 if { [check_no_compiler_messages_nocache \
4347 arm_v8_2a_fp16_scalar_ok object {
4348 #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC)
4349 #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
4351 } "$flags -march=armv8.2-a+fp16"] } {
4352 set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16"
4360 proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
4361 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
4362 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache]
4365 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
4366 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4367 # Record the command line options needed.
4369 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
4370 global et_arm_v8_2a_fp16_neon_flags
4371 set et_arm_v8_2a_fp16_neon_flags ""
4373 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4377 # Iterate through sets of options to find the compiler flags that
4378 # need to be added to the -march option.
4379 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4380 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4381 if { [check_no_compiler_messages_nocache \
4382 arm_v8_2a_fp16_neon_ok object {
4383 #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
4384 #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
4386 } "$flags -march=armv8.2-a+fp16"] } {
4387 set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16"
4395 proc check_effective_target_arm_v8_2a_fp16_neon_ok { } {
4396 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
4397 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache]
4400 # Return 1 if the target supports ARMv8.2 Adv.SIMD Dot Product
4401 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4402 # Record the command line options needed.
4404 proc check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache { } {
4405 global et_arm_v8_2a_dotprod_neon_flags
4406 set et_arm_v8_2a_dotprod_neon_flags ""
4408 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4412 # Iterate through sets of options to find the compiler flags that
4413 # need to be added to the -march option.
4414 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
4415 if { [check_no_compiler_messages_nocache \
4416 arm_v8_2a_dotprod_neon_ok object {
4417 #if !defined (__ARM_FEATURE_DOTPROD)
4418 #error "__ARM_FEATURE_DOTPROD not defined"
4420 } "$flags -march=armv8.2-a+dotprod"] } {
4421 set et_arm_v8_2a_dotprod_neon_flags "$flags -march=armv8.2-a+dotprod"
4429 proc check_effective_target_arm_v8_2a_dotprod_neon_ok { } {
4430 return [check_cached_effective_target arm_v8_2a_dotprod_neon_ok \
4431 check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache]
4434 proc add_options_for_arm_v8_2a_dotprod_neon { flags } {
4435 if { ! [check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
4438 global et_arm_v8_2a_dotprod_neon_flags
4439 return "$flags $et_arm_v8_2a_dotprod_neon_flags"
4442 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
4445 proc check_effective_target_arm_v8_neon_hw { } {
4446 return [check_runtime arm_v8_neon_hw_available {
4447 #include "arm_neon.h"
4451 float32x2_t a = { 1.0f, 2.0f };
4452 #ifdef __ARM_ARCH_ISA_A64
4453 asm ("frinta %0.2s, %1.2s"
4457 asm ("vrinta.f32 %P0, %P1"
4461 return a[0] == 2.0f;
4463 } [add_options_for_arm_v8_neon ""]]
4466 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
4467 # otherwise. The test is valid for AArch64 and ARM.
4469 proc check_effective_target_arm_v8_1a_neon_hw { } {
4470 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
4473 return [check_runtime arm_v8_1a_neon_hw_available {
4477 #ifdef __ARM_ARCH_ISA_A64
4478 __Int32x2_t a = {0, 1};
4479 __Int32x2_t b = {0, 2};
4482 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
4485 : /* No clobbers. */);
4489 __simd64_int32_t a = {0, 1};
4490 __simd64_int32_t b = {0, 2};
4491 __simd64_int32_t result;
4493 asm ("vqrdmlah.s32 %P0, %P1, %P2"
4496 : /* No clobbers. */);
4501 } [add_options_for_arm_v8_1a_neon ""]]
4504 # Return 1 if the target supports executing floating point instructions from
4505 # ARMv8.2 with the FP16 extension, 0 otherwise. The test is valid for ARM and
4508 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
4509 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
4512 return [check_runtime arm_v8_2a_fp16_scalar_hw_available {
4519 #ifdef __ARM_ARCH_ISA_A64
4521 asm ("fabs %h0, %h1"
4524 : /* No clobbers. */);
4528 asm ("vabs.f16 %0, %1"
4531 : /* No clobbers. */);
4535 return (result == 1.0) ? 0 : 1;
4537 } [add_options_for_arm_v8_2a_fp16_scalar ""]]
4540 # Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
4541 # with the FP16 extension, 0 otherwise. The test is valid for ARM and for
4544 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
4545 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
4548 return [check_runtime arm_v8_2a_fp16_neon_hw_available {
4552 #ifdef __ARM_ARCH_ISA_A64
4554 __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
4555 __Float16x4_t result;
4557 asm ("fabs %0.4h, %1.4h"
4560 : /* No clobbers. */);
4564 __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
4565 __simd64_float16_t result;
4567 asm ("vabs.f16 %P0, %P1"
4570 : /* No clobbers. */);
4574 return (result[0] == 1.0) ? 0 : 1;
4576 } [add_options_for_arm_v8_2a_fp16_neon ""]]
4579 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.2
4580 # with the Dot Product extension, 0 otherwise. The test is valid for ARM and for
4583 proc check_effective_target_arm_v8_2a_dotprod_neon_hw { } {
4584 if { ![check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
4587 return [check_runtime arm_v8_2a_dotprod_neon_hw_available {
4588 #include "arm_neon.h"
4593 uint32x2_t results = {0,0};
4594 uint8x8_t a = {1,1,1,1,2,2,2,2};
4595 uint8x8_t b = {2,2,2,2,3,3,3,3};
4597 #ifdef __ARM_ARCH_ISA_A64
4598 asm ("udot %0.2s, %1.8b, %2.8b"
4601 : /* No clobbers. */);
4604 asm ("vudot.u8 %P0, %P1, %P2"
4607 : /* No clobbers. */);
4610 return (results[0] == 8 && results[1] == 24) ? 1 : 0;
4612 } [add_options_for_arm_v8_2a_dotprod_neon ""]]
4615 # Return 1 if this is a ARM target with NEON enabled.
4617 proc check_effective_target_arm_neon { } {
4618 if { [check_effective_target_arm32] } {
4619 return [check_no_compiler_messages arm_neon object {
4620 #ifndef __ARM_NEON__
4631 proc check_effective_target_arm_neonv2 { } {
4632 if { [check_effective_target_arm32] } {
4633 return [check_no_compiler_messages arm_neon object {
4634 #ifndef __ARM_NEON__
4637 #ifndef __ARM_FEATURE_FMA
4649 # Return 1 if this is an ARM target with load acquire and store release
4650 # instructions for 8-, 16- and 32-bit types.
4652 proc check_effective_target_arm_acq_rel { } {
4653 return [check_no_compiler_messages arm_acq_rel object {
4655 load_acquire_store_release (void)
4657 asm ("lda r0, [r1]\n\t"
4663 : : : "r0", "memory");
4668 # Add the options needed for MIPS Paired-Single.
4670 proc add_options_for_mpaired_single { flags } {
4671 if { ! [check_effective_target_mpaired_single] } {
4674 return "$flags -mpaired-single"
4677 # Add the options needed for MIPS SIMD Architecture.
4679 proc add_options_for_mips_msa { flags } {
4680 if { ! [check_effective_target_mips_msa] } {
4683 return "$flags -mmsa"
4686 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
4687 # the Loongson vector modes.
4689 proc check_effective_target_mips_loongson { } {
4690 return [check_no_compiler_messages loongson assembly {
4691 #if !defined(__mips_loongson_vector_rev)
4692 #error !__mips_loongson_vector_rev
4697 # Return 1 if this is a MIPS target that supports the legacy NAN.
4699 proc check_effective_target_mips_nanlegacy { } {
4700 return [check_no_compiler_messages nanlegacy assembly {
4702 int main () { return 0; }
4706 # Return 1 if an MSA program can be compiled to object
4708 proc check_effective_target_mips_msa { } {
4709 if ![check_effective_target_nomips16] {
4712 return [check_no_compiler_messages msa object {
4713 #if !defined(__mips_msa)
4714 #error "MSA NOT AVAIL"
4716 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
4717 #error "MSA NOT AVAIL FOR ISA REV < 2"
4719 #if !defined(__mips_hard_float)
4720 #error "MSA HARD_FLOAT REQUIRED"
4722 #if __mips_fpr != 64
4723 #error "MSA 64-bit FPR REQUIRED"
4729 v8i16 v = __builtin_msa_ldi_h (1);
4737 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
4740 proc check_effective_target_arm_eabi { } {
4741 return [check_no_compiler_messages arm_eabi object {
4742 #ifndef __ARM_EABI__
4750 # Return 1 if this is an ARM target that adheres to the hard-float variant of
4751 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
4753 proc check_effective_target_arm_hf_eabi { } {
4754 return [check_no_compiler_messages arm_hf_eabi object {
4755 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
4756 #error not hard-float EABI
4763 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
4764 # Some multilibs may be incompatible with this option.
4766 proc check_effective_target_arm_iwmmxt_ok { } {
4767 if { [check_effective_target_arm32] } {
4768 return [check_no_compiler_messages arm_iwmmxt_ok object {
4776 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
4777 # for an ARM target.
4778 proc check_effective_target_arm_prefer_ldrd_strd { } {
4779 if { ![check_effective_target_arm32] } {
4783 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
4784 void foo (void) { __asm__ ("" ::: "r4", "r5"); }
4788 # Return 1 if this is a PowerPC target supporting -meabi.
4790 proc check_effective_target_powerpc_eabi_ok { } {
4791 if { [istarget powerpc*-*-*] } {
4792 return [check_no_compiler_messages powerpc_eabi_ok object {
4800 # Return 1 if this is a PowerPC target with floating-point registers.
4802 proc check_effective_target_powerpc_fprs { } {
4803 if { [istarget powerpc*-*-*]
4804 || [istarget rs6000-*-*] } {
4805 return [check_no_compiler_messages powerpc_fprs object {
4817 # Return 1 if this is a PowerPC target with hardware double-precision
4820 proc check_effective_target_powerpc_hard_double { } {
4821 if { [istarget powerpc*-*-*]
4822 || [istarget rs6000-*-*] } {
4823 return [check_no_compiler_messages powerpc_hard_double object {
4835 # Return 1 if this is a PowerPC target supporting -maltivec.
4837 proc check_effective_target_powerpc_altivec_ok { } {
4838 if { ([istarget powerpc*-*-*]
4839 && ![istarget powerpc-*-linux*paired*])
4840 || [istarget rs6000-*-*] } {
4841 # AltiVec is not supported on AIX before 5.3.
4842 if { [istarget powerpc*-*-aix4*]
4843 || [istarget powerpc*-*-aix5.1*]
4844 || [istarget powerpc*-*-aix5.2*] } {
4847 return [check_no_compiler_messages powerpc_altivec_ok object {
4855 # Return 1 if this is a PowerPC target supporting -mpower8-vector
4857 proc check_effective_target_powerpc_p8vector_ok { } {
4858 if { ([istarget powerpc*-*-*]
4859 && ![istarget powerpc-*-linux*paired*])
4860 || [istarget rs6000-*-*] } {
4861 # AltiVec is not supported on AIX before 5.3.
4862 if { [istarget powerpc*-*-aix4*]
4863 || [istarget powerpc*-*-aix5.1*]
4864 || [istarget powerpc*-*-aix5.2*] } {
4867 return [check_no_compiler_messages powerpc_p8vector_ok object {
4870 asm volatile ("xxlorc vs0,vs0,vs0");
4872 asm volatile ("xxlorc 0,0,0");
4876 } "-mpower8-vector"]
4882 # Return 1 if this is a PowerPC target supporting -mpower9-vector
4884 proc check_effective_target_powerpc_p9vector_ok { } {
4885 if { ([istarget powerpc*-*-*]
4886 && ![istarget powerpc-*-linux*paired*])
4887 || [istarget rs6000-*-*] } {
4888 # AltiVec is not supported on AIX before 5.3.
4889 if { [istarget powerpc*-*-aix4*]
4890 || [istarget powerpc*-*-aix5.1*]
4891 || [istarget powerpc*-*-aix5.2*] } {
4894 return [check_no_compiler_messages powerpc_p9vector_ok object {
4897 vector double v = (vector double) { 0.0, 0.0 };
4898 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
4901 } "-mpower9-vector"]
4907 # Return 1 if this is a PowerPC target supporting -mmodulo
4909 proc check_effective_target_powerpc_p9modulo_ok { } {
4910 if { ([istarget powerpc*-*-*]
4911 && ![istarget powerpc-*-linux*paired*])
4912 || [istarget rs6000-*-*] } {
4913 # AltiVec is not supported on AIX before 5.3.
4914 if { [istarget powerpc*-*-aix4*]
4915 || [istarget powerpc*-*-aix5.1*]
4916 || [istarget powerpc*-*-aix5.2*] } {
4919 return [check_no_compiler_messages powerpc_p9modulo_ok object {
4921 int i = 5, j = 3, r = -1;
4922 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
4931 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
4932 # software emulation on power7/power8 systems or hardware support on power9.
4934 proc check_effective_target_powerpc_float128_sw_ok { } {
4935 if { ([istarget powerpc*-*-*]
4936 && ![istarget powerpc-*-linux*paired*])
4937 || [istarget rs6000-*-*] } {
4938 # AltiVec is not supported on AIX before 5.3.
4939 if { [istarget powerpc*-*-aix4*]
4940 || [istarget powerpc*-*-aix5.1*]
4941 || [istarget powerpc*-*-aix5.2*] } {
4944 return [check_no_compiler_messages powerpc_float128_sw_ok object {
4945 volatile __float128 x = 1.0q;
4946 volatile __float128 y = 2.0q;
4948 __float128 z = x + y;
4951 } "-mfloat128 -mvsx"]
4957 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
4958 # support on power9.
4960 proc check_effective_target_powerpc_float128_hw_ok { } {
4961 if { ([istarget powerpc*-*-*]
4962 && ![istarget powerpc-*-linux*paired*])
4963 || [istarget rs6000-*-*] } {
4964 # AltiVec is not supported on AIX before 5.3.
4965 if { [istarget powerpc*-*-aix4*]
4966 || [istarget powerpc*-*-aix5.1*]
4967 || [istarget powerpc*-*-aix5.2*] } {
4970 return [check_no_compiler_messages powerpc_float128_hw_ok object {
4971 volatile __float128 x = 1.0q;
4972 volatile __float128 y = 2.0q;
4975 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
4978 } "-mfloat128-hardware"]
4984 # Return 1 if this is a PowerPC target supporting -mvsx
4986 proc check_effective_target_powerpc_vsx_ok { } {
4987 if { ([istarget powerpc*-*-*]
4988 && ![istarget powerpc-*-linux*paired*])
4989 || [istarget rs6000-*-*] } {
4990 # VSX is not supported on AIX before 7.1.
4991 if { [istarget powerpc*-*-aix4*]
4992 || [istarget powerpc*-*-aix5*]
4993 || [istarget powerpc*-*-aix6*] } {
4996 return [check_no_compiler_messages powerpc_vsx_ok object {
4999 asm volatile ("xxlor vs0,vs0,vs0");
5001 asm volatile ("xxlor 0,0,0");
5011 # Return 1 if this is a PowerPC target supporting -mhtm
5013 proc check_effective_target_powerpc_htm_ok { } {
5014 if { ([istarget powerpc*-*-*]
5015 && ![istarget powerpc-*-linux*paired*])
5016 || [istarget rs6000-*-*] } {
5017 # HTM is not supported on AIX yet.
5018 if { [istarget powerpc*-*-aix*] } {
5021 return [check_no_compiler_messages powerpc_htm_ok object {
5023 asm volatile ("tbegin. 0");
5032 # Return 1 if the target supports executing HTM hardware instructions,
5033 # 0 otherwise. Cache the result.
5035 proc check_htm_hw_available { } {
5036 return [check_cached_effective_target htm_hw_available {
5037 # For now, disable on Darwin
5038 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
5041 check_runtime_nocache htm_hw_available {
5051 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
5053 proc check_effective_target_powerpc_ppu_ok { } {
5054 if [check_effective_target_powerpc_altivec_ok] {
5055 return [check_no_compiler_messages cell_asm_available object {
5058 asm volatile ("lvlx v0,v0,v0");
5060 asm volatile ("lvlx 0,0,0");
5070 # Return 1 if this is a PowerPC target that supports SPU.
5072 proc check_effective_target_powerpc_spu { } {
5073 if { [istarget powerpc*-*-linux*] } {
5074 return [check_effective_target_powerpc_altivec_ok]
5080 # Return 1 if this is a PowerPC SPE target. The check includes options
5081 # specified by dg-options for this test, so don't cache the result.
5083 proc check_effective_target_powerpc_spe_nocache { } {
5084 if { [istarget powerpc*-*-*] } {
5085 return [check_no_compiler_messages_nocache powerpc_spe object {
5091 } [current_compiler_flags]]
5097 # Return 1 if this is a PowerPC target with SPE enabled.
5099 proc check_effective_target_powerpc_spe { } {
5100 if { [istarget powerpc*-*-*] } {
5101 return [check_no_compiler_messages powerpc_spe object {
5113 # Return 1 if this is a PowerPC target with Altivec enabled.
5115 proc check_effective_target_powerpc_altivec { } {
5116 if { [istarget powerpc*-*-*] } {
5117 return [check_no_compiler_messages powerpc_altivec object {
5129 # Return 1 if this is a PowerPC 405 target. The check includes options
5130 # specified by dg-options for this test, so don't cache the result.
5132 proc check_effective_target_powerpc_405_nocache { } {
5133 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
5134 return [check_no_compiler_messages_nocache powerpc_405 object {
5140 } [current_compiler_flags]]
5146 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
5148 proc check_effective_target_powerpc_elfv2 { } {
5149 if { [istarget powerpc*-*-*] } {
5150 return [check_no_compiler_messages powerpc_elfv2 object {
5152 #error not ELF v2 ABI
5162 # Return 1 if this is a SPU target with a toolchain that
5163 # supports automatic overlay generation.
5165 proc check_effective_target_spu_auto_overlay { } {
5166 if { [istarget spu*-*-elf*] } {
5167 return [check_no_compiler_messages spu_auto_overlay executable {
5169 } "-Wl,--auto-overlay" ]
5175 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
5176 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
5177 # test environment appears to run executables on such a simulator.
5179 proc check_effective_target_ultrasparc_hw { } {
5180 return [check_runtime ultrasparc_hw {
5181 int main() { return 0; }
5182 } "-mcpu=ultrasparc"]
5185 # Return 1 if the test environment supports executing UltraSPARC VIS2
5186 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
5188 proc check_effective_target_ultrasparc_vis2_hw { } {
5189 return [check_runtime ultrasparc_vis2_hw {
5190 int main() { __asm__(".word 0x81b00320"); return 0; }
5191 } "-mcpu=ultrasparc3"]
5194 # Return 1 if the test environment supports executing UltraSPARC VIS3
5195 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
5197 proc check_effective_target_ultrasparc_vis3_hw { } {
5198 return [check_runtime ultrasparc_vis3_hw {
5199 int main() { __asm__(".word 0x81b00220"); return 0; }
5203 # Return 1 if this is a SPARC-V9 target.
5205 proc check_effective_target_sparc_v9 { } {
5206 if { [istarget sparc*-*-*] } {
5207 return [check_no_compiler_messages sparc_v9 object {
5209 asm volatile ("return %i7+8");
5218 # Return 1 if this is a SPARC target with VIS enabled.
5220 proc check_effective_target_sparc_vis { } {
5221 if { [istarget sparc*-*-*] } {
5222 return [check_no_compiler_messages sparc_vis object {
5234 # Return 1 if the target supports hardware vector shift operation.
5236 proc check_effective_target_vect_shift { } {
5237 global et_vect_shift_saved
5240 if [info exists et_vect_shift_saved($et_index)] {
5241 verbose "check_effective_target_vect_shift: using cached result" 2
5243 set et_vect_shift_saved($et_index) 0
5244 if { ([istarget powerpc*-*-*]
5245 && ![istarget powerpc-*-linux*paired*])
5246 || [istarget ia64-*-*]
5247 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5248 || [istarget aarch64*-*-*]
5249 || [is-effective-target arm_neon]
5250 || ([istarget mips*-*-*]
5251 && ([et-is-effective-target mips_msa]
5252 || [et-is-effective-target mips_loongson]))
5253 || ([istarget s390*-*-*]
5254 && [check_effective_target_s390_vx]) } {
5255 set et_vect_shift_saved($et_index) 1
5259 verbose "check_effective_target_vect_shift:\
5260 returning $et_vect_shift_saved($et_index)" 2
5261 return $et_vect_shift_saved($et_index)
5264 proc check_effective_target_whole_vector_shift { } {
5265 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5266 || [istarget ia64-*-*]
5267 || [istarget aarch64*-*-*]
5268 || [istarget powerpc64*-*-*]
5269 || ([is-effective-target arm_neon]
5270 && [check_effective_target_arm_little_endian])
5271 || ([istarget mips*-*-*]
5272 && [et-is-effective-target mips_loongson])
5273 || ([istarget s390*-*-*]
5274 && [check_effective_target_s390_vx]) } {
5280 verbose "check_effective_target_vect_long: returning $answer" 2
5284 # Return 1 if the target supports vector bswap operations.
5286 proc check_effective_target_vect_bswap { } {
5287 global et_vect_bswap_saved
5290 if [info exists et_vect_bswap_saved($et_index)] {
5291 verbose "check_effective_target_vect_bswap: using cached result" 2
5293 set et_vect_bswap_saved($et_index) 0
5294 if { [istarget aarch64*-*-*]
5295 || [is-effective-target arm_neon]
5297 set et_vect_bswap_saved($et_index) 1
5301 verbose "check_effective_target_vect_bswap:\
5302 returning $et_vect_bswap_saved($et_index)" 2
5303 return $et_vect_bswap_saved($et_index)
5306 # Return 1 if the target supports hardware vector shift operation for char.
5308 proc check_effective_target_vect_shift_char { } {
5309 global et_vect_shift_char_saved
5312 if [info exists et_vect_shift_char_saved($et_index)] {
5313 verbose "check_effective_target_vect_shift_char: using cached result" 2
5315 set et_vect_shift_char_saved($et_index) 0
5316 if { ([istarget powerpc*-*-*]
5317 && ![istarget powerpc-*-linux*paired*])
5318 || [is-effective-target arm_neon]
5319 || ([istarget mips*-*-*]
5320 && [et-is-effective-target mips_msa])
5321 || ([istarget s390*-*-*]
5322 && [check_effective_target_s390_vx]) } {
5323 set et_vect_shift_char_saved($et_index) 1
5327 verbose "check_effective_target_vect_shift_char:\
5328 returning $et_vect_shift_char_saved($et_index)" 2
5329 return $et_vect_shift_char_saved($et_index)
5332 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
5334 # This can change for different subtargets so do not cache the result.
5336 proc check_effective_target_vect_long { } {
5337 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5338 || (([istarget powerpc*-*-*]
5339 && ![istarget powerpc-*-linux*paired*])
5340 && [check_effective_target_ilp32])
5341 || [is-effective-target arm_neon]
5342 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
5343 || [istarget aarch64*-*-*]
5344 || ([istarget mips*-*-*]
5345 && [et-is-effective-target mips_msa])
5346 || ([istarget s390*-*-*]
5347 && [check_effective_target_s390_vx]) } {
5353 verbose "check_effective_target_vect_long: returning $answer" 2
5357 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
5359 # This won't change for different subtargets so cache the result.
5361 proc check_effective_target_vect_float { } {
5362 global et_vect_float_saved
5365 if [info exists et_vect_float_saved($et_index)] {
5366 verbose "check_effective_target_vect_float: using cached result" 2
5368 set et_vect_float_saved($et_index) 0
5369 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5370 || [istarget powerpc*-*-*]
5371 || [istarget spu-*-*]
5372 || [istarget mips-sde-elf]
5373 || [istarget mipsisa64*-*-*]
5374 || [istarget ia64-*-*]
5375 || [istarget aarch64*-*-*]
5376 || ([istarget mips*-*-*]
5377 && [et-is-effective-target mips_msa])
5378 || [is-effective-target arm_neon]
5379 || ([istarget s390*-*-*]
5380 && [check_effective_target_s390_vxe]) } {
5381 set et_vect_float_saved($et_index) 1
5385 verbose "check_effective_target_vect_float:\
5386 returning $et_vect_float_saved($et_index)" 2
5387 return $et_vect_float_saved($et_index)
5390 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
5392 # This won't change for different subtargets so cache the result.
5394 proc check_effective_target_vect_double { } {
5395 global et_vect_double_saved
5398 if [info exists et_vect_double_saved($et_index)] {
5399 verbose "check_effective_target_vect_double: using cached result" 2
5401 set et_vect_double_saved($et_index) 0
5402 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
5403 && [check_no_compiler_messages vect_double assembly {
5404 #ifdef __tune_atom__
5405 # error No double vectorizer support.
5408 || [istarget aarch64*-*-*]
5409 || [istarget spu-*-*]
5410 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
5411 || ([istarget mips*-*-*]
5412 && [et-is-effective-target mips_msa])
5413 || ([istarget s390*-*-*]
5414 && [check_effective_target_s390_vx]) } {
5415 set et_vect_double_saved($et_index) 1
5419 verbose "check_effective_target_vect_double:\
5420 returning $et_vect_double_saved($et_index)" 2
5421 return $et_vect_double_saved($et_index)
5424 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
5426 # This won't change for different subtargets so cache the result.
5428 proc check_effective_target_vect_long_long { } {
5429 global et_vect_long_long_saved
5432 if [info exists et_vect_long_long_saved($et_index)] {
5433 verbose "check_effective_target_vect_long_long: using cached result" 2
5435 set et_vect_long_long_saved($et_index) 0
5436 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5437 || ([istarget mips*-*-*]
5438 && [et-is-effective-target mips_msa])
5439 || ([istarget s390*-*-*]
5440 && [check_effective_target_s390_vx]) } {
5441 set et_vect_long_long_saved($et_index) 1
5445 verbose "check_effective_target_vect_long_long:\
5446 returning $et_vect_long_long_saved($et_index)" 2
5447 return $et_vect_long_long_saved($et_index)
5451 # Return 1 if the target plus current options does not support a vector
5452 # max instruction on "int", 0 otherwise.
5454 # This won't change for different subtargets so cache the result.
5456 proc check_effective_target_vect_no_int_min_max { } {
5457 global et_vect_no_int_min_max_saved
5460 if [info exists et_vect_no_int_min_max_saved($et_index)] {
5461 verbose "check_effective_target_vect_no_int_min_max:\
5462 using cached result" 2
5464 set et_vect_no_int_min_max_saved($et_index) 0
5465 if { [istarget sparc*-*-*]
5466 || [istarget spu-*-*]
5467 || [istarget alpha*-*-*]
5468 || ([istarget mips*-*-*]
5469 && [et-is-effective-target mips_loongson]) } {
5470 set et_vect_no_int_min_max_saved($et_index) 1
5473 verbose "check_effective_target_vect_no_int_min_max:\
5474 returning $et_vect_no_int_min_max_saved($et_index)" 2
5475 return $et_vect_no_int_min_max_saved($et_index)
5478 # Return 1 if the target plus current options does not support a vector
5479 # add instruction on "int", 0 otherwise.
5481 # This won't change for different subtargets so cache the result.
5483 proc check_effective_target_vect_no_int_add { } {
5484 global et_vect_no_int_add_saved
5487 if [info exists et_vect_no_int_add_saved($et_index)] {
5488 verbose "check_effective_target_vect_no_int_add: using cached result" 2
5490 set et_vect_no_int_add_saved($et_index) 0
5491 # Alpha only supports vector add on V8QI and V4HI.
5492 if { [istarget alpha*-*-*] } {
5493 set et_vect_no_int_add_saved($et_index) 1
5496 verbose "check_effective_target_vect_no_int_add:\
5497 returning $et_vect_no_int_add_saved($et_index)" 2
5498 return $et_vect_no_int_add_saved($et_index)
5501 # Return 1 if the target plus current options does not support vector
5502 # bitwise instructions, 0 otherwise.
5504 # This won't change for different subtargets so cache the result.
5506 proc check_effective_target_vect_no_bitwise { } {
5507 global et_vect_no_bitwise_saved
5510 if [info exists et_vect_no_bitwise_saved($et_index)] {
5511 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
5513 set et_vect_no_bitwise_saved($et_index) 0
5515 verbose "check_effective_target_vect_no_bitwise:\
5516 returning $et_vect_no_bitwise_saved($et_index)" 2
5517 return $et_vect_no_bitwise_saved($et_index)
5520 # Return 1 if the target plus current options supports vector permutation,
5523 # This won't change for different subtargets so cache the result.
5525 proc check_effective_target_vect_perm { } {
5526 global et_vect_perm_saved
5529 if [info exists et_vect_perm_saved($et_index)] {
5530 verbose "check_effective_target_vect_perm: using cached result" 2
5532 set et_vect_perm_saved($et_index) 0
5533 if { [is-effective-target arm_neon]
5534 || [istarget aarch64*-*-*]
5535 || [istarget powerpc*-*-*]
5536 || [istarget spu-*-*]
5537 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5538 || ([istarget mips*-*-*]
5539 && ([et-is-effective-target mpaired_single]
5540 || [et-is-effective-target mips_msa]))
5541 || ([istarget s390*-*-*]
5542 && [check_effective_target_s390_vx]) } {
5543 set et_vect_perm_saved($et_index) 1
5546 verbose "check_effective_target_vect_perm:\
5547 returning $et_vect_perm_saved($et_index)" 2
5548 return $et_vect_perm_saved($et_index)
5551 # Return 1 if, for some VF:
5553 # - the target's default vector size is VF * ELEMENT_BITS bits
5555 # - it is possible to implement the equivalent of:
5557 # int<ELEMENT_BITS>_t s1[COUNT][COUNT * VF], s2[COUNT * VF];
5558 # for (int i = 0; i < COUNT; ++i)
5559 # for (int j = 0; j < COUNT * VF; ++j)
5560 # s1[i][j] = s2[j - j % COUNT + i]
5562 # using only a single 2-vector permute for each vector in s1.
5564 # E.g. for COUNT == 3 and vector length 4, the two arrays would be:
5566 # s2 | a0 a1 a2 a3 | b0 b1 b2 b3 | c0 c1 c2 c3
5567 # ------+-------------+-------------+------------
5568 # s1[0] | a0 a0 a0 a3 | a3 a3 b2 b2 | b2 c1 c1 c1
5569 # s1[1] | a1 a1 a1 b0 | b0 b0 b3 b3 | b3 c2 c2 c2
5570 # s1[2] | a2 a2 a2 b1 | b1 b1 c0 c0 | c0 c3 c3 c3
5572 # Each s1 permute requires only two of a, b and c.
5574 # The distance between the start of vector n in s1[0] and the start
5575 # of vector n in s2 is:
5577 # A = (n * VF) % COUNT
5579 # The corresponding value for the end of vector n is:
5581 # B = (n * VF + VF - 1) % COUNT
5583 # Subtracting i from each value gives the corresponding difference
5584 # for s1[i]. The condition being tested by this function is false
5585 # iff A - i > 0 and B - i < 0 for some i and n, such that the first
5586 # element for s1[i] comes from vector n - 1 of s2 and the last element
5587 # comes from vector n + 1 of s2. The condition is therefore true iff
5588 # A <= B for all n. This is turn means the condition is true iff:
5590 # (n * VF) % COUNT + (VF - 1) % COUNT < COUNT
5592 # for all n. COUNT - (n * VF) % COUNT is bounded by gcd (VF, COUNT),
5593 # and will be that value for at least one n in [0, COUNT), so we want:
5595 # (VF - 1) % COUNT < gcd (VF, COUNT)
5597 proc vect_perm_supported { count element_bits } {
5598 set vector_bits [lindex [available_vector_sizes] 0]
5599 if { $vector_bits <= 0 } {
5602 set vf [expr { $vector_bits / $element_bits }]
5604 # Compute gcd (VF, COUNT).
5607 while { $temp1 > 0 } {
5608 set temp2 [expr { $gcd % $temp1 }]
5612 return [expr { ($vf - 1) % $count < $gcd }]
5615 # Return 1 if the target supports SLP permutation of 3 vectors when each
5616 # element has 32 bits.
5618 proc check_effective_target_vect_perm3_int { } {
5619 return [expr { [check_effective_target_vect_perm]
5620 && [vect_perm_supported 3 32] }]
5623 # Return 1 if the target plus current options supports vector permutation
5624 # on byte-sized elements, 0 otherwise.
5626 # This won't change for different subtargets so cache the result.
5628 proc check_effective_target_vect_perm_byte { } {
5629 global et_vect_perm_byte_saved
5632 if [info exists et_vect_perm_byte_saved($et_index)] {
5633 verbose "check_effective_target_vect_perm_byte: using cached result" 2
5635 set et_vect_perm_byte_saved($et_index) 0
5636 if { ([is-effective-target arm_neon]
5637 && [is-effective-target arm_little_endian])
5638 || ([istarget aarch64*-*-*]
5639 && [is-effective-target aarch64_little_endian])
5640 || [istarget powerpc*-*-*]
5641 || [istarget spu-*-*]
5642 || ([istarget mips-*.*]
5643 && [et-is-effective-target mips_msa])
5644 || ([istarget s390*-*-*]
5645 && [check_effective_target_s390_vx]) } {
5646 set et_vect_perm_byte_saved($et_index) 1
5649 verbose "check_effective_target_vect_perm_byte:\
5650 returning $et_vect_perm_byte_saved($et_index)" 2
5651 return $et_vect_perm_byte_saved($et_index)
5654 # Return 1 if the target supports SLP permutation of 3 vectors when each
5655 # element has 8 bits.
5657 proc check_effective_target_vect_perm3_byte { } {
5658 return [expr { [check_effective_target_vect_perm_byte]
5659 && [vect_perm_supported 3 8] }]
5662 # Return 1 if the target plus current options supports vector permutation
5663 # on short-sized elements, 0 otherwise.
5665 # This won't change for different subtargets so cache the result.
5667 proc check_effective_target_vect_perm_short { } {
5668 global et_vect_perm_short_saved
5671 if [info exists et_vect_perm_short_saved($et_index)] {
5672 verbose "check_effective_target_vect_perm_short: using cached result" 2
5674 set et_vect_perm_short_saved($et_index) 0
5675 if { ([is-effective-target arm_neon]
5676 && [is-effective-target arm_little_endian])
5677 || ([istarget aarch64*-*-*]
5678 && [is-effective-target aarch64_little_endian])
5679 || [istarget powerpc*-*-*]
5680 || [istarget spu-*-*]
5681 || ([istarget mips*-*-*]
5682 && [et-is-effective-target mips_msa])
5683 || ([istarget s390*-*-*]
5684 && [check_effective_target_s390_vx]) } {
5685 set et_vect_perm_short_saved($et_index) 1
5688 verbose "check_effective_target_vect_perm_short:\
5689 returning $et_vect_perm_short_saved($et_index)" 2
5690 return $et_vect_perm_short_saved($et_index)
5693 # Return 1 if the target supports SLP permutation of 3 vectors when each
5694 # element has 16 bits.
5696 proc check_effective_target_vect_perm3_short { } {
5697 return [expr { [check_effective_target_vect_perm_short]
5698 && [vect_perm_supported 3 16] }]
5701 # Return 1 if the target plus current options supports folding of
5702 # copysign into XORSIGN.
5704 # This won't change for different subtargets so cache the result.
5706 proc check_effective_target_xorsign { } {
5707 global et_xorsign_saved
5710 if [info exists et_xorsign_saved($et_index)] {
5711 verbose "check_effective_target_xorsign: using cached result" 2
5713 set et_xorsign_saved($et_index) 0
5714 if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } {
5715 set et_xorsign_saved($et_index) 1
5718 verbose "check_effective_target_xorsign:\
5719 returning $et_xorsign_saved($et_index)" 2
5720 return $et_xorsign_saved($et_index)
5723 # Return 1 if the target plus current options supports a vector
5724 # widening summation of *short* args into *int* result, 0 otherwise.
5726 # This won't change for different subtargets so cache the result.
5728 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
5729 global et_vect_widen_sum_hi_to_si_pattern_saved
5732 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved($et_index)] {
5733 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5734 using cached result" 2
5736 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 0
5737 if { [istarget powerpc*-*-*]
5738 || [istarget aarch64*-*-*]
5739 || [is-effective-target arm_neon]
5740 || [istarget ia64-*-*] } {
5741 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 1
5744 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5745 returning $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)" 2
5746 return $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)
5749 # Return 1 if the target plus current options supports a vector
5750 # widening summation of *short* args into *int* result, 0 otherwise.
5751 # A target can also support this widening summation if it can support
5752 # promotion (unpacking) from shorts to ints.
5754 # This won't change for different subtargets so cache the result.
5756 proc check_effective_target_vect_widen_sum_hi_to_si { } {
5757 global et_vect_widen_sum_hi_to_si_saved
5760 if [info exists et_vect_widen_sum_hi_to_si_saved($et_index)] {
5761 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
5762 using cached result" 2
5764 set et_vect_widen_sum_hi_to_si_saved($et_index) \
5765 [check_effective_target_vect_unpack]
5766 if { [istarget powerpc*-*-*]
5767 || [istarget ia64-*-*] } {
5768 set et_vect_widen_sum_hi_to_si_saved($et_index) 1
5771 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
5772 returning $et_vect_widen_sum_hi_to_si_saved($et_index)" 2
5773 return $et_vect_widen_sum_hi_to_si_saved($et_index)
5776 # Return 1 if the target plus current options supports a vector
5777 # widening summation of *char* args into *short* result, 0 otherwise.
5778 # A target can also support this widening summation if it can support
5779 # promotion (unpacking) from chars to shorts.
5781 # This won't change for different subtargets so cache the result.
5783 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
5784 global et_vect_widen_sum_qi_to_hi_saved
5787 if [info exists et_vect_widen_sum_qi_to_hi_saved($et_index)] {
5788 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5789 using cached result" 2
5791 set et_vect_widen_sum_qi_to_hi_saved($et_index) 0
5792 if { [check_effective_target_vect_unpack]
5793 || [is-effective-target arm_neon]
5794 || [istarget ia64-*-*] } {
5795 set et_vect_widen_sum_qi_to_hi_saved($et_index) 1
5798 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5799 returning $et_vect_widen_sum_qi_to_hi_saved($et_index)" 2
5800 return $et_vect_widen_sum_qi_to_hi_saved($et_index)
5803 # Return 1 if the target plus current options supports a vector
5804 # widening summation of *char* args into *int* result, 0 otherwise.
5806 # This won't change for different subtargets so cache the result.
5808 proc check_effective_target_vect_widen_sum_qi_to_si { } {
5809 global et_vect_widen_sum_qi_to_si_saved
5812 if [info exists et_vect_widen_sum_qi_to_si_saved($et_index)] {
5813 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
5814 using cached result" 2
5816 set et_vect_widen_sum_qi_to_si_saved($et_index) 0
5817 if { [istarget powerpc*-*-*] } {
5818 set et_vect_widen_sum_qi_to_si_saved($et_index) 1
5821 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
5822 returning $et_vect_widen_sum_qi_to_si_saved($et_index)" 2
5823 return $et_vect_widen_sum_qi_to_si_saved($et_index)
5826 # Return 1 if the target plus current options supports a vector
5827 # widening multiplication of *char* args into *short* result, 0 otherwise.
5828 # A target can also support this widening multplication if it can support
5829 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
5830 # multiplication of shorts).
5832 # This won't change for different subtargets so cache the result.
5835 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
5836 global et_vect_widen_mult_qi_to_hi_saved
5839 if [info exists et_vect_widen_mult_qi_to_hi_saved($et_index)] {
5840 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
5841 using cached result" 2
5843 if { [check_effective_target_vect_unpack]
5844 && [check_effective_target_vect_short_mult] } {
5845 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
5847 set et_vect_widen_mult_qi_to_hi_saved($et_index) 0
5849 if { [istarget powerpc*-*-*]
5850 || [istarget aarch64*-*-*]
5851 || [is-effective-target arm_neon]
5852 || ([istarget s390*-*-*]
5853 && [check_effective_target_s390_vx]) } {
5854 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
5857 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
5858 returning $et_vect_widen_mult_qi_to_hi_saved($et_index)" 2
5859 return $et_vect_widen_mult_qi_to_hi_saved($et_index)
5862 # Return 1 if the target plus current options supports a vector
5863 # widening multiplication of *short* args into *int* result, 0 otherwise.
5864 # A target can also support this widening multplication if it can support
5865 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
5866 # multiplication of ints).
5868 # This won't change for different subtargets so cache the result.
5871 proc check_effective_target_vect_widen_mult_hi_to_si { } {
5872 global et_vect_widen_mult_hi_to_si_saved
5875 if [info exists et_vect_widen_mult_hi_to_si_saved($et_index)] {
5876 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
5877 using cached result" 2
5879 if { [check_effective_target_vect_unpack]
5880 && [check_effective_target_vect_int_mult] } {
5881 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
5883 set et_vect_widen_mult_hi_to_si_saved($et_index) 0
5885 if { [istarget powerpc*-*-*]
5886 || [istarget spu-*-*]
5887 || [istarget ia64-*-*]
5888 || [istarget aarch64*-*-*]
5889 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5890 || [is-effective-target arm_neon]
5891 || ([istarget s390*-*-*]
5892 && [check_effective_target_s390_vx]) } {
5893 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
5896 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
5897 returning $et_vect_widen_mult_hi_to_si_saved($et_index)" 2
5898 return $et_vect_widen_mult_hi_to_si_saved($et_index)
5901 # Return 1 if the target plus current options supports a vector
5902 # widening multiplication of *char* args into *short* result, 0 otherwise.
5904 # This won't change for different subtargets so cache the result.
5906 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
5907 global et_vect_widen_mult_qi_to_hi_pattern_saved
5910 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)] {
5911 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5912 using cached result" 2
5914 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 0
5915 if { [istarget powerpc*-*-*]
5916 || ([is-effective-target arm_neon]
5917 && [check_effective_target_arm_little_endian])
5918 || ([istarget s390*-*-*]
5919 && [check_effective_target_s390_vx]) } {
5920 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 1
5923 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
5924 returning $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)" 2
5925 return $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)
5928 # Return 1 if the target plus current options supports a vector
5929 # widening multiplication of *short* args into *int* result, 0 otherwise.
5931 # This won't change for different subtargets so cache the result.
5933 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
5934 global et_vect_widen_mult_hi_to_si_pattern_saved
5937 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved($et_index)] {
5938 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5939 using cached result" 2
5941 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 0
5942 if { [istarget powerpc*-*-*]
5943 || [istarget spu-*-*]
5944 || [istarget ia64-*-*]
5945 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5946 || ([is-effective-target arm_neon]
5947 && [check_effective_target_arm_little_endian])
5948 || ([istarget s390*-*-*]
5949 && [check_effective_target_s390_vx]) } {
5950 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 1
5953 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
5954 returning $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)" 2
5955 return $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)
5958 # Return 1 if the target plus current options supports a vector
5959 # widening multiplication of *int* args into *long* result, 0 otherwise.
5961 # This won't change for different subtargets so cache the result.
5963 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
5964 global et_vect_widen_mult_si_to_di_pattern_saved
5967 if [info exists et_vect_widen_mult_si_to_di_pattern_saved($et_index)] {
5968 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
5969 using cached result" 2
5971 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 0
5972 if {[istarget ia64-*-*]
5973 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5974 || ([istarget s390*-*-*]
5975 && [check_effective_target_s390_vx]) } {
5976 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 1
5979 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
5980 returning $et_vect_widen_mult_si_to_di_pattern_saved($et_index)" 2
5981 return $et_vect_widen_mult_si_to_di_pattern_saved($et_index)
5984 # Return 1 if the target plus current options supports a vector
5985 # widening shift, 0 otherwise.
5987 # This won't change for different subtargets so cache the result.
5989 proc check_effective_target_vect_widen_shift { } {
5990 global et_vect_widen_shift_saved
5993 if [info exists et_vect_shift_saved($et_index)] {
5994 verbose "check_effective_target_vect_widen_shift: using cached result" 2
5996 set et_vect_widen_shift_saved($et_index) 0
5997 if { [is-effective-target arm_neon] } {
5998 set et_vect_widen_shift_saved($et_index) 1
6001 verbose "check_effective_target_vect_widen_shift:\
6002 returning $et_vect_widen_shift_saved($et_index)" 2
6003 return $et_vect_widen_shift_saved($et_index)
6006 # Return 1 if the target plus current options supports a vector
6007 # dot-product of signed chars, 0 otherwise.
6009 # This won't change for different subtargets so cache the result.
6011 proc check_effective_target_vect_sdot_qi { } {
6012 global et_vect_sdot_qi_saved
6015 if [info exists et_vect_sdot_qi_saved($et_index)] {
6016 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
6018 set et_vect_sdot_qi_saved($et_index) 0
6019 if { [istarget ia64-*-*]
6020 || [istarget aarch64*-*-*]
6021 || [istarget arm*-*-*]
6022 || ([istarget mips*-*-*]
6023 && [et-is-effective-target mips_msa]) } {
6024 set et_vect_udot_qi_saved 1
6027 verbose "check_effective_target_vect_sdot_qi:\
6028 returning $et_vect_sdot_qi_saved($et_index)" 2
6029 return $et_vect_sdot_qi_saved($et_index)
6032 # Return 1 if the target plus current options supports a vector
6033 # dot-product of unsigned chars, 0 otherwise.
6035 # This won't change for different subtargets so cache the result.
6037 proc check_effective_target_vect_udot_qi { } {
6038 global et_vect_udot_qi_saved
6041 if [info exists et_vect_udot_qi_saved($et_index)] {
6042 verbose "check_effective_target_vect_udot_qi: using cached result" 2
6044 set et_vect_udot_qi_saved($et_index) 0
6045 if { [istarget powerpc*-*-*]
6046 || [istarget aarch64*-*-*]
6047 || [istarget arm*-*-*]
6048 || [istarget ia64-*-*]
6049 || ([istarget mips*-*-*]
6050 && [et-is-effective-target mips_msa]) } {
6051 set et_vect_udot_qi_saved($et_index) 1
6054 verbose "check_effective_target_vect_udot_qi:\
6055 returning $et_vect_udot_qi_saved($et_index)" 2
6056 return $et_vect_udot_qi_saved($et_index)
6059 # Return 1 if the target plus current options supports a vector
6060 # dot-product of signed shorts, 0 otherwise.
6062 # This won't change for different subtargets so cache the result.
6064 proc check_effective_target_vect_sdot_hi { } {
6065 global et_vect_sdot_hi_saved
6068 if [info exists et_vect_sdot_hi_saved($et_index)] {
6069 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
6071 set et_vect_sdot_hi_saved($et_index) 0
6072 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6073 || [istarget ia64-*-*]
6074 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6075 || ([istarget mips*-*-*]
6076 && [et-is-effective-target mips_msa]) } {
6077 set et_vect_sdot_hi_saved($et_index) 1
6080 verbose "check_effective_target_vect_sdot_hi:\
6081 returning $et_vect_sdot_hi_saved($et_index)" 2
6082 return $et_vect_sdot_hi_saved($et_index)
6085 # Return 1 if the target plus current options supports a vector
6086 # dot-product of unsigned shorts, 0 otherwise.
6088 # This won't change for different subtargets so cache the result.
6090 proc check_effective_target_vect_udot_hi { } {
6091 global et_vect_udot_hi_saved
6094 if [info exists et_vect_udot_hi_saved($et_index)] {
6095 verbose "check_effective_target_vect_udot_hi: using cached result" 2
6097 set et_vect_udot_hi_saved($et_index) 0
6098 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6099 || ([istarget mips*-*-*]
6100 && [et-is-effective-target mips_msa]) } {
6101 set et_vect_udot_hi_saved($et_index) 1
6104 verbose "check_effective_target_vect_udot_hi:\
6105 returning $et_vect_udot_hi_saved($et_index)" 2
6106 return $et_vect_udot_hi_saved($et_index)
6109 # Return 1 if the target plus current options supports a vector
6110 # sad operation of unsigned chars, 0 otherwise.
6112 # This won't change for different subtargets so cache the result.
6114 proc check_effective_target_vect_usad_char { } {
6115 global et_vect_usad_char_saved
6118 if [info exists et_vect_usad_char_saved($et_index)] {
6119 verbose "check_effective_target_vect_usad_char: using cached result" 2
6121 set et_vect_usad_char_saved($et_index) 0
6122 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
6123 set et_vect_usad_char_saved($et_index) 1
6126 verbose "check_effective_target_vect_usad_char:\
6127 returning $et_vect_usad_char_saved($et_index)" 2
6128 return $et_vect_usad_char_saved($et_index)
6131 # Return 1 if the target plus current options supports a vector
6132 # demotion (packing) of shorts (to chars) and ints (to shorts)
6133 # using modulo arithmetic, 0 otherwise.
6135 # This won't change for different subtargets so cache the result.
6137 proc check_effective_target_vect_pack_trunc { } {
6138 global et_vect_pack_trunc_saved
6141 if [info exists et_vect_pack_trunc_saved($et_index)] {
6142 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
6144 set et_vect_pack_trunc_saved($et_index) 0
6145 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6146 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6147 || [istarget aarch64*-*-*]
6148 || [istarget spu-*-*]
6149 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
6150 && [check_effective_target_arm_little_endian])
6151 || ([istarget mips*-*-*]
6152 && [et-is-effective-target mips_msa])
6153 || ([istarget s390*-*-*]
6154 && [check_effective_target_s390_vx]) } {
6155 set et_vect_pack_trunc_saved($et_index) 1
6158 verbose "check_effective_target_vect_pack_trunc:\
6159 returning $et_vect_pack_trunc_saved($et_index)" 2
6160 return $et_vect_pack_trunc_saved($et_index)
6163 # Return 1 if the target plus current options supports a vector
6164 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
6166 # This won't change for different subtargets so cache the result.
6168 proc check_effective_target_vect_unpack { } {
6169 global et_vect_unpack_saved
6172 if [info exists et_vect_unpack_saved($et_index)] {
6173 verbose "check_effective_target_vect_unpack: using cached result" 2
6175 set et_vect_unpack_saved($et_index) 0
6176 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
6177 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6178 || [istarget spu-*-*]
6179 || [istarget ia64-*-*]
6180 || [istarget aarch64*-*-*]
6181 || ([istarget mips*-*-*]
6182 && [et-is-effective-target mips_msa])
6183 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
6184 && [check_effective_target_arm_little_endian])
6185 || ([istarget s390*-*-*]
6186 && [check_effective_target_s390_vx]) } {
6187 set et_vect_unpack_saved($et_index) 1
6190 verbose "check_effective_target_vect_unpack:\
6191 returning $et_vect_unpack_saved($et_index)" 2
6192 return $et_vect_unpack_saved($et_index)
6195 # Return 1 if the target plus current options does not guarantee
6196 # that its STACK_BOUNDARY is >= the reguired vector alignment.
6198 # This won't change for different subtargets so cache the result.
6200 proc check_effective_target_unaligned_stack { } {
6201 global et_unaligned_stack_saved
6203 if [info exists et_unaligned_stack_saved] {
6204 verbose "check_effective_target_unaligned_stack: using cached result" 2
6206 set et_unaligned_stack_saved 0
6208 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
6209 return $et_unaligned_stack_saved
6212 # Return 1 if the target plus current options does not support a vector
6213 # alignment mechanism, 0 otherwise.
6215 # This won't change for different subtargets so cache the result.
6217 proc check_effective_target_vect_no_align { } {
6218 global et_vect_no_align_saved
6221 if [info exists et_vect_no_align_saved($et_index)] {
6222 verbose "check_effective_target_vect_no_align: using cached result" 2
6224 set et_vect_no_align_saved($et_index) 0
6225 if { [istarget mipsisa64*-*-*]
6226 || [istarget mips-sde-elf]
6227 || [istarget sparc*-*-*]
6228 || [istarget ia64-*-*]
6229 || [check_effective_target_arm_vect_no_misalign]
6230 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
6231 || ([istarget mips*-*-*]
6232 && [et-is-effective-target mips_loongson]) } {
6233 set et_vect_no_align_saved($et_index) 1
6236 verbose "check_effective_target_vect_no_align:\
6237 returning $et_vect_no_align_saved($et_index)" 2
6238 return $et_vect_no_align_saved($et_index)
6241 # Return 1 if the target supports a vector misalign access, 0 otherwise.
6243 # This won't change for different subtargets so cache the result.
6245 proc check_effective_target_vect_hw_misalign { } {
6246 global et_vect_hw_misalign_saved
6249 if [info exists et_vect_hw_misalign_saved($et_index)] {
6250 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
6252 set et_vect_hw_misalign_saved($et_index) 0
6253 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6254 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
6255 || [istarget aarch64*-*-*]
6256 || ([istarget mips*-*-*] && [et-is-effective-target mips_msa])
6257 || ([istarget s390*-*-*]
6258 && [check_effective_target_s390_vx]) } {
6259 set et_vect_hw_misalign_saved($et_index) 1
6261 if { [istarget arm*-*-*] } {
6262 set et_vect_hw_misalign_saved($et_index) [expr ![check_effective_target_arm_vect_no_misalign]]
6265 verbose "check_effective_target_vect_hw_misalign:\
6266 returning $et_vect_hw_misalign_saved($et_index)" 2
6267 return $et_vect_hw_misalign_saved($et_index)
6271 # Return 1 if arrays are aligned to the vector alignment
6272 # boundary, 0 otherwise.
6274 proc check_effective_target_vect_aligned_arrays { } {
6275 set et_vect_aligned_arrays 0
6276 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6277 && !([is-effective-target ia32]
6278 || ([check_avx_available] && ![check_prefer_avx128])))
6279 || [istarget spu-*-*] } {
6280 set et_vect_aligned_arrays 1
6283 verbose "check_effective_target_vect_aligned_arrays:\
6284 returning $et_vect_aligned_arrays" 2
6285 return $et_vect_aligned_arrays
6288 # Return 1 if types of size 32 bit or less are naturally aligned
6289 # (aligned to their type-size), 0 otherwise.
6291 # This won't change for different subtargets so cache the result.
6293 proc check_effective_target_natural_alignment_32 { } {
6294 global et_natural_alignment_32
6296 if [info exists et_natural_alignment_32_saved] {
6297 verbose "check_effective_target_natural_alignment_32: using cached result" 2
6299 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
6300 set et_natural_alignment_32_saved 1
6301 if { ([istarget *-*-darwin*] && [is-effective-target lp64])
6302 || [istarget avr-*-*] } {
6303 set et_natural_alignment_32_saved 0
6306 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
6307 return $et_natural_alignment_32_saved
6310 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
6311 # type-size), 0 otherwise.
6313 # This won't change for different subtargets so cache the result.
6315 proc check_effective_target_natural_alignment_64 { } {
6316 global et_natural_alignment_64
6318 if [info exists et_natural_alignment_64_saved] {
6319 verbose "check_effective_target_natural_alignment_64: using cached result" 2
6321 set et_natural_alignment_64_saved 0
6322 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
6323 || [istarget spu-*-*] } {
6324 set et_natural_alignment_64_saved 1
6327 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
6328 return $et_natural_alignment_64_saved
6331 # Return 1 if all vector types are naturally aligned (aligned to their
6332 # type-size), 0 otherwise.
6334 proc check_effective_target_vect_natural_alignment { } {
6335 set et_vect_natural_alignment 1
6336 if { [check_effective_target_arm_eabi]
6337 || [istarget nvptx-*-*]
6338 || [istarget s390*-*-*] } {
6339 set et_vect_natural_alignment 0
6341 verbose "check_effective_target_vect_natural_alignment:\
6342 returning $et_vect_natural_alignment" 2
6343 return $et_vect_natural_alignment
6346 # Return 1 if the target doesn't prefer any alignment beyond element
6347 # alignment during vectorization.
6349 proc check_effective_target_vect_element_align_preferred { } {
6350 return [check_effective_target_vect_variable_length]
6353 # Return 1 if we can align stack data to the preferred vector alignment.
6355 proc check_effective_target_vect_align_stack_vars { } {
6359 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
6361 proc check_effective_target_vector_alignment_reachable { } {
6362 set et_vector_alignment_reachable 0
6363 if { [check_effective_target_vect_aligned_arrays]
6364 || [check_effective_target_natural_alignment_32] } {
6365 set et_vector_alignment_reachable 1
6367 verbose "check_effective_target_vector_alignment_reachable:\
6368 returning $et_vector_alignment_reachable" 2
6369 return $et_vector_alignment_reachable
6372 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
6374 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
6375 set et_vector_alignment_reachable_for_64bit 0
6376 if { [check_effective_target_vect_aligned_arrays]
6377 || [check_effective_target_natural_alignment_64] } {
6378 set et_vector_alignment_reachable_for_64bit 1
6380 verbose "check_effective_target_vector_alignment_reachable_for_64bit:\
6381 returning $et_vector_alignment_reachable_for_64bit" 2
6382 return $et_vector_alignment_reachable_for_64bit
6385 # Return 1 if the target only requires element alignment for vector accesses
6387 proc check_effective_target_vect_element_align { } {
6388 global et_vect_element_align
6391 if [info exists et_vect_element_align($et_index)] {
6392 verbose "check_effective_target_vect_element_align:\
6393 using cached result" 2
6395 set et_vect_element_align($et_index) 0
6396 if { ([istarget arm*-*-*]
6397 && ![check_effective_target_arm_vect_no_misalign])
6398 || [check_effective_target_vect_hw_misalign] } {
6399 set et_vect_element_align($et_index) 1
6403 verbose "check_effective_target_vect_element_align:\
6404 returning $et_vect_element_align($et_index)" 2
6405 return $et_vect_element_align($et_index)
6408 # Return 1 if we expect to see unaligned accesses in at least some
6411 proc check_effective_target_vect_unaligned_possible { } {
6412 return [expr { ![check_effective_target_vect_element_align_preferred]
6413 && (![check_effective_target_vect_no_align]
6414 || [check_effective_target_vect_hw_misalign]) }]
6417 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
6419 proc check_effective_target_vect_load_lanes { } {
6420 global et_vect_load_lanes
6422 if [info exists et_vect_load_lanes] {
6423 verbose "check_effective_target_vect_load_lanes: using cached result" 2
6425 set et_vect_load_lanes 0
6426 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
6427 || [istarget aarch64*-*-*] } {
6428 set et_vect_load_lanes 1
6432 verbose "check_effective_target_vect_load_lanes: returning $et_vect_load_lanes" 2
6433 return $et_vect_load_lanes
6436 # Return 1 if the target supports vector masked stores.
6438 proc check_effective_target_vect_masked_store { } {
6442 # Return 1 if the target supports vector conditional operations, 0 otherwise.
6444 proc check_effective_target_vect_condition { } {
6445 global et_vect_cond_saved
6448 if [info exists et_vect_cond_saved($et_index)] {
6449 verbose "check_effective_target_vect_cond: using cached result" 2
6451 set et_vect_cond_saved($et_index) 0
6452 if { [istarget aarch64*-*-*]
6453 || [istarget powerpc*-*-*]
6454 || [istarget ia64-*-*]
6455 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6456 || [istarget spu-*-*]
6457 || ([istarget mips*-*-*]
6458 && [et-is-effective-target mips_msa])
6459 || ([istarget arm*-*-*]
6460 && [check_effective_target_arm_neon_ok])
6461 || ([istarget s390*-*-*]
6462 && [check_effective_target_s390_vx]) } {
6463 set et_vect_cond_saved($et_index) 1
6467 verbose "check_effective_target_vect_cond:\
6468 returning $et_vect_cond_saved($et_index)" 2
6469 return $et_vect_cond_saved($et_index)
6472 # Return 1 if the target supports vector conditional operations where
6473 # the comparison has different type from the lhs, 0 otherwise.
6475 proc check_effective_target_vect_cond_mixed { } {
6476 global et_vect_cond_mixed_saved
6479 if [info exists et_vect_cond_mixed_saved($et_index)] {
6480 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
6482 set et_vect_cond_mixed_saved($et_index) 0
6483 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6484 || [istarget aarch64*-*-*]
6485 || [istarget powerpc*-*-*]
6486 || ([istarget mips*-*-*]
6487 && [et-is-effective-target mips_msa])
6488 || ([istarget s390*-*-*]
6489 && [check_effective_target_s390_vx]) } {
6490 set et_vect_cond_mixed_saved($et_index) 1
6494 verbose "check_effective_target_vect_cond_mixed:\
6495 returning $et_vect_cond_mixed_saved($et_index)" 2
6496 return $et_vect_cond_mixed_saved($et_index)
6499 # Return 1 if the target supports vector char multiplication, 0 otherwise.
6501 proc check_effective_target_vect_char_mult { } {
6502 global et_vect_char_mult_saved
6505 if [info exists et_vect_char_mult_saved($et_index)] {
6506 verbose "check_effective_target_vect_char_mult: using cached result" 2
6508 set et_vect_char_mult_saved($et_index) 0
6509 if { [istarget aarch64*-*-*]
6510 || [istarget ia64-*-*]
6511 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6512 || [check_effective_target_arm32]
6513 || [check_effective_target_powerpc_altivec]
6514 || ([istarget mips*-*-*]
6515 && [et-is-effective-target mips_msa])
6516 || ([istarget s390*-*-*]
6517 && [check_effective_target_s390_vx]) } {
6518 set et_vect_char_mult_saved($et_index) 1
6522 verbose "check_effective_target_vect_char_mult:\
6523 returning $et_vect_char_mult_saved($et_index)" 2
6524 return $et_vect_char_mult_saved($et_index)
6527 # Return 1 if the target supports vector short multiplication, 0 otherwise.
6529 proc check_effective_target_vect_short_mult { } {
6530 global et_vect_short_mult_saved
6533 if [info exists et_vect_short_mult_saved($et_index)] {
6534 verbose "check_effective_target_vect_short_mult: using cached result" 2
6536 set et_vect_short_mult_saved($et_index) 0
6537 if { [istarget ia64-*-*]
6538 || [istarget spu-*-*]
6539 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6540 || [istarget powerpc*-*-*]
6541 || [istarget aarch64*-*-*]
6542 || [check_effective_target_arm32]
6543 || ([istarget mips*-*-*]
6544 && ([et-is-effective-target mips_msa]
6545 || [et-is-effective-target mips_loongson]))
6546 || ([istarget s390*-*-*]
6547 && [check_effective_target_s390_vx]) } {
6548 set et_vect_short_mult_saved($et_index) 1
6552 verbose "check_effective_target_vect_short_mult:\
6553 returning $et_vect_short_mult_saved($et_index)" 2
6554 return $et_vect_short_mult_saved($et_index)
6557 # Return 1 if the target supports vector int multiplication, 0 otherwise.
6559 proc check_effective_target_vect_int_mult { } {
6560 global et_vect_int_mult_saved
6563 if [info exists et_vect_int_mult_saved($et_index)] {
6564 verbose "check_effective_target_vect_int_mult: using cached result" 2
6566 set et_vect_int_mult_saved($et_index) 0
6567 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6568 || [istarget spu-*-*]
6569 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6570 || [istarget ia64-*-*]
6571 || [istarget aarch64*-*-*]
6572 || ([istarget mips*-*-*]
6573 && [et-is-effective-target mips_msa])
6574 || [check_effective_target_arm32]
6575 || ([istarget s390*-*-*]
6576 && [check_effective_target_s390_vx]) } {
6577 set et_vect_int_mult_saved($et_index) 1
6581 verbose "check_effective_target_vect_int_mult:\
6582 returning $et_vect_int_mult_saved($et_index)" 2
6583 return $et_vect_int_mult_saved($et_index)
6586 # Return 1 if the target supports 64 bit hardware vector
6587 # multiplication of long operands with a long result, 0 otherwise.
6589 # This can change for different subtargets so do not cache the result.
6591 proc check_effective_target_vect_long_mult { } {
6592 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6593 || (([istarget powerpc*-*-*]
6594 && ![istarget powerpc-*-linux*paired*])
6595 && [check_effective_target_ilp32])
6596 || [is-effective-target arm_neon]
6597 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
6598 || [istarget aarch64*-*-*]
6599 || ([istarget mips*-*-*]
6600 && [et-is-effective-target mips_msa]) } {
6606 verbose "check_effective_target_vect_long_mult: returning $answer" 2
6610 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
6612 proc check_effective_target_vect_extract_even_odd { } {
6613 global et_vect_extract_even_odd_saved
6616 if [info exists et_vect_extract_even_odd_saved($et_index)] {
6617 verbose "check_effective_target_vect_extract_even_odd:\
6618 using cached result" 2
6620 set et_vect_extract_even_odd_saved($et_index) 0
6621 if { [istarget aarch64*-*-*]
6622 || [istarget powerpc*-*-*]
6623 || [is-effective-target arm_neon]
6624 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6625 || [istarget ia64-*-*]
6626 || [istarget spu-*-*]
6627 || ([istarget mips*-*-*]
6628 && ([et-is-effective-target mips_msa]
6629 || [et-is-effective-target mpaired_single]))
6630 || ([istarget s390*-*-*]
6631 && [check_effective_target_s390_vx]) } {
6632 set et_vect_extract_even_odd_saved($et_index) 1
6636 verbose "check_effective_target_vect_extract_even_odd:\
6637 returning $et_vect_extract_even_odd_saved($et_index)" 2
6638 return $et_vect_extract_even_odd_saved($et_index)
6641 # Return 1 if the target supports vector interleaving, 0 otherwise.
6643 proc check_effective_target_vect_interleave { } {
6644 global et_vect_interleave_saved
6647 if [info exists et_vect_interleave_saved($et_index)] {
6648 verbose "check_effective_target_vect_interleave: using cached result" 2
6650 set et_vect_interleave_saved($et_index) 0
6651 if { [istarget aarch64*-*-*]
6652 || [istarget powerpc*-*-*]
6653 || [is-effective-target arm_neon]
6654 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6655 || [istarget ia64-*-*]
6656 || [istarget spu-*-*]
6657 || ([istarget mips*-*-*]
6658 && ([et-is-effective-target mpaired_single]
6659 || [et-is-effective-target mips_msa]))
6660 || ([istarget s390*-*-*]
6661 && [check_effective_target_s390_vx]) } {
6662 set et_vect_interleave_saved($et_index) 1
6666 verbose "check_effective_target_vect_interleave:\
6667 returning $et_vect_interleave_saved($et_index)" 2
6668 return $et_vect_interleave_saved($et_index)
6671 foreach N {2 3 4 8} {
6672 eval [string map [list N $N] {
6673 # Return 1 if the target supports 2-vector interleaving
6674 proc check_effective_target_vect_stridedN { } {
6675 global et_vect_stridedN_saved
6678 if [info exists et_vect_stridedN_saved($et_index)] {
6679 verbose "check_effective_target_vect_stridedN:\
6680 using cached result" 2
6682 set et_vect_stridedN_saved($et_index) 0
6684 && [check_effective_target_vect_interleave]
6685 && [check_effective_target_vect_extract_even_odd] } {
6686 set et_vect_stridedN_saved($et_index) 1
6688 if { ([istarget arm*-*-*]
6689 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
6690 set et_vect_stridedN_saved($et_index) 1
6694 verbose "check_effective_target_vect_stridedN:\
6695 returning $et_vect_stridedN_saved($et_index)" 2
6696 return $et_vect_stridedN_saved($et_index)
6701 # Return the list of vector sizes (in bits) that each target supports.
6702 # A vector length of "0" indicates variable-length vectors.
6704 proc available_vector_sizes { } {
6706 if { [istarget aarch64*-*-*] } {
6707 lappend result 128 64
6708 } elseif { [istarget arm*-*-*]
6709 && [check_effective_target_arm_neon_ok] } {
6710 lappend result 128 64
6711 } elseif { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6712 && ([check_avx_available] && ![check_prefer_avx128])) } {
6713 lappend result 256 128
6714 } elseif { [istarget sparc*-*-*] } {
6717 # The traditional default asumption.
6723 # Return 1 if the target supports multiple vector sizes
6725 proc check_effective_target_vect_multiple_sizes { } {
6726 return [expr { [llength [available_vector_sizes]] > 1 }]
6729 # Return true if variable-length vectors are supported.
6731 proc check_effective_target_vect_variable_length { } {
6732 return [expr { [lindex [available_vector_sizes] 0] == 0 }]
6735 # Return 1 if the target supports vectors of 64 bits.
6737 proc check_effective_target_vect64 { } {
6738 return [expr { [lsearch -exact [available_vector_sizes] 64] >= 0 }]
6741 # Return 1 if the target supports vector copysignf calls.
6743 proc check_effective_target_vect_call_copysignf { } {
6744 global et_vect_call_copysignf_saved
6747 if [info exists et_vect_call_copysignf_saved($et_index)] {
6748 verbose "check_effective_target_vect_call_copysignf:\
6749 using cached result" 2
6751 set et_vect_call_copysignf_saved($et_index) 0
6752 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6753 || [istarget powerpc*-*-*]
6754 || [istarget aarch64*-*-*] } {
6755 set et_vect_call_copysignf_saved($et_index) 1
6759 verbose "check_effective_target_vect_call_copysignf:\
6760 returning $et_vect_call_copysignf_saved($et_index)" 2
6761 return $et_vect_call_copysignf_saved($et_index)
6764 # Return 1 if the target supports hardware square root instructions.
6766 proc check_effective_target_sqrt_insn { } {
6767 global et_sqrt_insn_saved
6769 if [info exists et_sqrt_insn_saved] {
6770 verbose "check_effective_target_hw_sqrt: using cached result" 2
6772 set et_sqrt_insn_saved 0
6773 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6774 || [istarget powerpc*-*-*]
6775 || [istarget aarch64*-*-*]
6776 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok])
6777 || ([istarget s390*-*-*]
6778 && [check_effective_target_s390_vx]) } {
6779 set et_sqrt_insn_saved 1
6783 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
6784 return $et_sqrt_insn_saved
6787 # Return 1 if the target supports vector sqrtf calls.
6789 proc check_effective_target_vect_call_sqrtf { } {
6790 global et_vect_call_sqrtf_saved
6793 if [info exists et_vect_call_sqrtf_saved($et_index)] {
6794 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
6796 set et_vect_call_sqrtf_saved($et_index) 0
6797 if { [istarget aarch64*-*-*]
6798 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6799 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
6800 || ([istarget s390*-*-*]
6801 && [check_effective_target_s390_vx]) } {
6802 set et_vect_call_sqrtf_saved($et_index) 1
6806 verbose "check_effective_target_vect_call_sqrtf:\
6807 returning $et_vect_call_sqrtf_saved($et_index)" 2
6808 return $et_vect_call_sqrtf_saved($et_index)
6811 # Return 1 if the target supports vector lrint calls.
6813 proc check_effective_target_vect_call_lrint { } {
6814 set et_vect_call_lrint 0
6815 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6816 && [check_effective_target_ilp32]) } {
6817 set et_vect_call_lrint 1
6820 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
6821 return $et_vect_call_lrint
6824 # Return 1 if the target supports vector btrunc calls.
6826 proc check_effective_target_vect_call_btrunc { } {
6827 global et_vect_call_btrunc_saved
6830 if [info exists et_vect_call_btrunc_saved($et_index)] {
6831 verbose "check_effective_target_vect_call_btrunc:\
6832 using cached result" 2
6834 set et_vect_call_btrunc_saved($et_index) 0
6835 if { [istarget aarch64*-*-*] } {
6836 set et_vect_call_btrunc_saved($et_index) 1
6840 verbose "check_effective_target_vect_call_btrunc:\
6841 returning $et_vect_call_btrunc_saved($et_index)" 2
6842 return $et_vect_call_btrunc_saved($et_index)
6845 # Return 1 if the target supports vector btruncf calls.
6847 proc check_effective_target_vect_call_btruncf { } {
6848 global et_vect_call_btruncf_saved
6851 if [info exists et_vect_call_btruncf_saved($et_index)] {
6852 verbose "check_effective_target_vect_call_btruncf:\
6853 using cached result" 2
6855 set et_vect_call_btruncf_saved($et_index) 0
6856 if { [istarget aarch64*-*-*] } {
6857 set et_vect_call_btruncf_saved($et_index) 1
6861 verbose "check_effective_target_vect_call_btruncf:\
6862 returning $et_vect_call_btruncf_saved($et_index)" 2
6863 return $et_vect_call_btruncf_saved($et_index)
6866 # Return 1 if the target supports vector ceil calls.
6868 proc check_effective_target_vect_call_ceil { } {
6869 global et_vect_call_ceil_saved
6872 if [info exists et_vect_call_ceil_saved($et_index)] {
6873 verbose "check_effective_target_vect_call_ceil: using cached result" 2
6875 set et_vect_call_ceil_saved($et_index) 0
6876 if { [istarget aarch64*-*-*] } {
6877 set et_vect_call_ceil_saved($et_index) 1
6881 verbose "check_effective_target_vect_call_ceil:\
6882 returning $et_vect_call_ceil_saved($et_index)" 2
6883 return $et_vect_call_ceil_saved($et_index)
6886 # Return 1 if the target supports vector ceilf calls.
6888 proc check_effective_target_vect_call_ceilf { } {
6889 global et_vect_call_ceilf_saved
6892 if [info exists et_vect_call_ceilf_saved($et_index)] {
6893 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
6895 set et_vect_call_ceilf_saved($et_index) 0
6896 if { [istarget aarch64*-*-*] } {
6897 set et_vect_call_ceilf_saved($et_index) 1
6901 verbose "check_effective_target_vect_call_ceilf:\
6902 returning $et_vect_call_ceilf_saved($et_index)" 2
6903 return $et_vect_call_ceilf_saved($et_index)
6906 # Return 1 if the target supports vector floor calls.
6908 proc check_effective_target_vect_call_floor { } {
6909 global et_vect_call_floor_saved
6912 if [info exists et_vect_call_floor_saved($et_index)] {
6913 verbose "check_effective_target_vect_call_floor: using cached result" 2
6915 set et_vect_call_floor_saved($et_index) 0
6916 if { [istarget aarch64*-*-*] } {
6917 set et_vect_call_floor_saved($et_index) 1
6921 verbose "check_effective_target_vect_call_floor:\
6922 returning $et_vect_call_floor_saved($et_index)" 2
6923 return $et_vect_call_floor_saved($et_index)
6926 # Return 1 if the target supports vector floorf calls.
6928 proc check_effective_target_vect_call_floorf { } {
6929 global et_vect_call_floorf_saved
6932 if [info exists et_vect_call_floorf_saved($et_index)] {
6933 verbose "check_effective_target_vect_call_floorf: using cached result" 2
6935 set et_vect_call_floorf_saved($et_index) 0
6936 if { [istarget aarch64*-*-*] } {
6937 set et_vect_call_floorf_saved($et_index) 1
6941 verbose "check_effective_target_vect_call_floorf:\
6942 returning $et_vect_call_floorf_saved($et_index)" 2
6943 return $et_vect_call_floorf_saved($et_index)
6946 # Return 1 if the target supports vector lceil calls.
6948 proc check_effective_target_vect_call_lceil { } {
6949 global et_vect_call_lceil_saved
6952 if [info exists et_vect_call_lceil_saved($et_index)] {
6953 verbose "check_effective_target_vect_call_lceil: using cached result" 2
6955 set et_vect_call_lceil_saved($et_index) 0
6956 if { [istarget aarch64*-*-*] } {
6957 set et_vect_call_lceil_saved($et_index) 1
6961 verbose "check_effective_target_vect_call_lceil:\
6962 returning $et_vect_call_lceil_saved($et_index)" 2
6963 return $et_vect_call_lceil_saved($et_index)
6966 # Return 1 if the target supports vector lfloor calls.
6968 proc check_effective_target_vect_call_lfloor { } {
6969 global et_vect_call_lfloor_saved
6972 if [info exists et_vect_call_lfloor_saved($et_index)] {
6973 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
6975 set et_vect_call_lfloor_saved($et_index) 0
6976 if { [istarget aarch64*-*-*] } {
6977 set et_vect_call_lfloor_saved($et_index) 1
6981 verbose "check_effective_target_vect_call_lfloor:\
6982 returning $et_vect_call_lfloor_saved($et_index)" 2
6983 return $et_vect_call_lfloor_saved($et_index)
6986 # Return 1 if the target supports vector nearbyint calls.
6988 proc check_effective_target_vect_call_nearbyint { } {
6989 global et_vect_call_nearbyint_saved
6992 if [info exists et_vect_call_nearbyint_saved($et_index)] {
6993 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
6995 set et_vect_call_nearbyint_saved($et_index) 0
6996 if { [istarget aarch64*-*-*] } {
6997 set et_vect_call_nearbyint_saved($et_index) 1
7001 verbose "check_effective_target_vect_call_nearbyint:\
7002 returning $et_vect_call_nearbyint_saved($et_index)" 2
7003 return $et_vect_call_nearbyint_saved($et_index)
7006 # Return 1 if the target supports vector nearbyintf calls.
7008 proc check_effective_target_vect_call_nearbyintf { } {
7009 global et_vect_call_nearbyintf_saved
7012 if [info exists et_vect_call_nearbyintf_saved($et_index)] {
7013 verbose "check_effective_target_vect_call_nearbyintf:\
7014 using cached result" 2
7016 set et_vect_call_nearbyintf_saved($et_index) 0
7017 if { [istarget aarch64*-*-*] } {
7018 set et_vect_call_nearbyintf_saved($et_index) 1
7022 verbose "check_effective_target_vect_call_nearbyintf:\
7023 returning $et_vect_call_nearbyintf_saved($et_index)" 2
7024 return $et_vect_call_nearbyintf_saved($et_index)
7027 # Return 1 if the target supports vector round calls.
7029 proc check_effective_target_vect_call_round { } {
7030 global et_vect_call_round_saved
7033 if [info exists et_vect_call_round_saved($et_index)] {
7034 verbose "check_effective_target_vect_call_round: using cached result" 2
7036 set et_vect_call_round_saved($et_index) 0
7037 if { [istarget aarch64*-*-*] } {
7038 set et_vect_call_round_saved($et_index) 1
7042 verbose "check_effective_target_vect_call_round:\
7043 returning $et_vect_call_round_saved($et_index)" 2
7044 return $et_vect_call_round_saved($et_index)
7047 # Return 1 if the target supports vector roundf calls.
7049 proc check_effective_target_vect_call_roundf { } {
7050 global et_vect_call_roundf_saved
7053 if [info exists et_vect_call_roundf_saved($et_index)] {
7054 verbose "check_effective_target_vect_call_roundf: using cached result" 2
7056 set et_vect_call_roundf_saved($et_index) 0
7057 if { [istarget aarch64*-*-*] } {
7058 set et_vect_call_roundf_saved($et_index) 1
7062 verbose "check_effective_target_vect_call_roundf:\
7063 returning $et_vect_call_roundf_saved($et_index)" 2
7064 return $et_vect_call_roundf_saved($et_index)
7067 # Return 1 if the target supports section-anchors
7069 proc check_effective_target_section_anchors { } {
7070 global et_section_anchors_saved
7072 if [info exists et_section_anchors_saved] {
7073 verbose "check_effective_target_section_anchors: using cached result" 2
7075 set et_section_anchors_saved 0
7076 if { [istarget powerpc*-*-*]
7077 || [istarget arm*-*-*]
7078 || [istarget aarch64*-*-*] } {
7079 set et_section_anchors_saved 1
7083 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
7084 return $et_section_anchors_saved
7087 # Return 1 if the target supports atomic operations on "int_128" values.
7089 proc check_effective_target_sync_int_128 { } {
7090 if { [istarget spu-*-*] } {
7097 # Return 1 if the target supports atomic operations on "int_128" values
7098 # and can execute them.
7099 # This requires support for both compare-and-swap and true atomic loads.
7101 proc check_effective_target_sync_int_128_runtime { } {
7102 if { [istarget spu-*-*] } {
7109 # Return 1 if the target supports atomic operations on "long long".
7111 # Note: 32bit x86 targets require -march=pentium in dg-options.
7112 # Note: 32bit s390 targets require -mzarch in dg-options.
7114 proc check_effective_target_sync_long_long { } {
7115 if { [istarget i?86-*-*] || [istarget x86_64-*-*])
7116 || [istarget aarch64*-*-*]
7117 || [istarget arm*-*-*]
7118 || [istarget alpha*-*-*]
7119 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
7120 || [istarget s390*-*-*]
7121 || [istarget spu-*-*] } {
7128 # Return 1 if the target supports atomic operations on "long long"
7129 # and can execute them.
7131 # Note: 32bit x86 targets require -march=pentium in dg-options.
7133 proc check_effective_target_sync_long_long_runtime { } {
7134 if { (([istarget x86_64-*-*] || [istarget i?86-*-*])
7135 && [check_cached_effective_target sync_long_long_available {
7136 check_runtime_nocache sync_long_long_available {
7140 unsigned int eax, ebx, ecx, edx;
7141 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
7142 return !(edx & bit_CMPXCHG8B);
7147 || [istarget aarch64*-*-*]
7148 || ([istarget arm*-*-linux-*]
7149 && [check_runtime sync_longlong_runtime {
7155 if (sizeof (long long) != 8)
7158 /* Just check for native;
7159 checking for kernel fallback is tricky. */
7160 asm volatile ("ldrexd r0,r1, [%0]"
7161 : : "r" (&l1) : "r0", "r1");
7165 || [istarget alpha*-*-*]
7166 || ([istarget sparc*-*-*]
7167 && [check_effective_target_lp64]
7168 && [check_effective_target_ultrasparc_hw])
7169 || [istarget spu-*-*]
7170 || ([istarget powerpc*-*-*] && [check_effective_target_lp64]) } {
7177 # Return 1 if the target supports byte swap instructions.
7179 proc check_effective_target_bswap { } {
7180 global et_bswap_saved
7182 if [info exists et_bswap_saved] {
7183 verbose "check_effective_target_bswap: using cached result" 2
7185 set et_bswap_saved 0
7186 if { [istarget aarch64*-*-*]
7187 || [istarget alpha*-*-*]
7188 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7189 || [istarget m68k-*-*]
7190 || [istarget powerpc*-*-*]
7191 || [istarget rs6000-*-*]
7192 || [istarget s390*-*-*]
7193 || ([istarget arm*-*-*]
7194 && [check_no_compiler_messages_nocache arm_v6_or_later object {
7196 #error not armv6 or later
7200 set et_bswap_saved 1
7204 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
7205 return $et_bswap_saved
7208 # Return 1 if the target supports 16-bit byte swap instructions.
7210 proc check_effective_target_bswap16 { } {
7211 global et_bswap16_saved
7213 if [info exists et_bswap16_saved] {
7214 verbose "check_effective_target_bswap16: using cached result" 2
7216 set et_bswap16_saved 0
7217 if { [is-effective-target bswap]
7218 && ![istarget alpha*-*-*]
7219 && !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
7220 set et_bswap16_saved 1
7224 verbose "check_effective_target_bswap16: returning $et_bswap16_saved" 2
7225 return $et_bswap16_saved
7228 # Return 1 if the target supports 32-bit byte swap instructions.
7230 proc check_effective_target_bswap32 { } {
7231 global et_bswap32_saved
7233 if [info exists et_bswap32_saved] {
7234 verbose "check_effective_target_bswap32: using cached result" 2
7236 set et_bswap32_saved 0
7237 if { [is-effective-target bswap] } {
7238 set et_bswap32_saved 1
7242 verbose "check_effective_target_bswap32: returning $et_bswap32_saved" 2
7243 return $et_bswap32_saved
7246 # Return 1 if the target supports 64-bit byte swap instructions.
7248 # Note: 32bit s390 targets require -mzarch in dg-options.
7250 proc check_effective_target_bswap64 { } {
7251 global et_bswap64_saved
7253 # expand_unop can expand 64-bit byte swap on 32-bit targets
7254 if { [is-effective-target bswap] && [is-effective-target int32plus] } {
7260 # Return 1 if the target supports atomic operations on "int" and "long".
7262 proc check_effective_target_sync_int_long { } {
7263 global et_sync_int_long_saved
7265 if [info exists et_sync_int_long_saved] {
7266 verbose "check_effective_target_sync_int_long: using cached result" 2
7268 set et_sync_int_long_saved 0
7269 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
7270 # load-reserved/store-conditional instructions.
7271 if { [istarget ia64-*-*]
7272 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7273 || [istarget aarch64*-*-*]
7274 || [istarget alpha*-*-*]
7275 || [istarget arm*-*-linux-*]
7276 || ([istarget arm*-*-*]
7277 && [check_effective_target_arm_acq_rel])
7278 || [istarget bfin*-*linux*]
7279 || [istarget hppa*-*linux*]
7280 || [istarget s390*-*-*]
7281 || [istarget powerpc*-*-*]
7282 || [istarget crisv32-*-*] || [istarget cris-*-*]
7283 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
7284 || [istarget spu-*-*]
7285 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
7286 || [check_effective_target_mips_llsc] } {
7287 set et_sync_int_long_saved 1
7291 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
7292 return $et_sync_int_long_saved
7295 # Return 1 if the target supports atomic operations on "char" and "short".
7297 proc check_effective_target_sync_char_short { } {
7298 global et_sync_char_short_saved
7300 if [info exists et_sync_char_short_saved] {
7301 verbose "check_effective_target_sync_char_short: using cached result" 2
7303 set et_sync_char_short_saved 0
7304 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
7305 # load-reserved/store-conditional instructions.
7306 if { [istarget aarch64*-*-*]
7307 || [istarget ia64-*-*]
7308 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7309 || [istarget alpha*-*-*]
7310 || [istarget arm*-*-linux-*]
7311 || ([istarget arm*-*-*]
7312 && [check_effective_target_arm_acq_rel])
7313 || [istarget hppa*-*linux*]
7314 || [istarget s390*-*-*]
7315 || [istarget powerpc*-*-*]
7316 || [istarget crisv32-*-*] || [istarget cris-*-*]
7317 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
7318 || [istarget spu-*-*]
7319 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
7320 || [check_effective_target_mips_llsc] } {
7321 set et_sync_char_short_saved 1
7325 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
7326 return $et_sync_char_short_saved
7329 # Return 1 if the target uses a ColdFire FPU.
7331 proc check_effective_target_coldfire_fpu { } {
7332 return [check_no_compiler_messages coldfire_fpu assembly {
7339 # Return true if this is a uClibc target.
7341 proc check_effective_target_uclibc {} {
7342 return [check_no_compiler_messages uclibc object {
7343 #include <features.h>
7344 #if !defined (__UCLIBC__)
7350 # Return true if this is a uclibc target and if the uclibc feature
7351 # described by __$feature__ is not present.
7353 proc check_missing_uclibc_feature {feature} {
7354 return [check_no_compiler_messages $feature object "
7355 #include <features.h>
7356 #if !defined (__UCLIBC) || defined (__${feature}__)
7362 # Return true if this is a Newlib target.
7364 proc check_effective_target_newlib {} {
7365 return [check_no_compiler_messages newlib object {
7370 # Some newlib versions don't provide a frexpl and instead depend
7371 # on frexp to implement long double conversions in their printf-like
7372 # functions. This leads to broken results. Detect such versions here.
7374 proc check_effective_target_newlib_broken_long_double_io {} {
7375 if { [is-effective-target newlib] && ![is-effective-target frexpl] } {
7381 # Return true if this is NOT a Bionic target.
7383 proc check_effective_target_non_bionic {} {
7384 return [check_no_compiler_messages non_bionic object {
7386 #if defined (__BIONIC__)
7392 # Return true if this target has error.h header.
7394 proc check_effective_target_error_h {} {
7395 return [check_no_compiler_messages error_h object {
7400 # Return true if this target has tgmath.h header.
7402 proc check_effective_target_tgmath_h {} {
7403 return [check_no_compiler_messages tgmath_h object {
7408 # Return true if target's libc supports complex functions.
7410 proc check_effective_target_libc_has_complex_functions {} {
7411 return [check_no_compiler_messages libc_has_complex_functions object {
7412 #include <complex.h>
7417 # (a) an error of a few ULP is expected in string to floating-point
7418 # conversion functions; and
7419 # (b) overflow is not always detected correctly by those functions.
7421 proc check_effective_target_lax_strtofp {} {
7422 # By default, assume that all uClibc targets suffer from this.
7423 return [check_effective_target_uclibc]
7426 # Return 1 if this is a target for which wcsftime is a dummy
7427 # function that always returns 0.
7429 proc check_effective_target_dummy_wcsftime {} {
7430 # By default, assume that all uClibc targets suffer from this.
7431 return [check_effective_target_uclibc]
7434 # Return 1 if constructors with initialization priority arguments are
7435 # supposed on this target.
7437 proc check_effective_target_init_priority {} {
7438 return [check_no_compiler_messages init_priority assembly "
7439 void f() __attribute__((constructor (1000)));
7444 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
7445 # This can be used with any check_* proc that takes no argument and
7446 # returns only 1 or 0. It could be used with check_* procs that take
7447 # arguments with keywords that pass particular arguments.
7449 proc is-effective-target { arg } {
7452 if { ![info exists et_index] } {
7453 # Initialize the effective target index that is used in some
7454 # check_effective_target_* procs.
7457 if { [info procs check_effective_target_${arg}] != [list] } {
7458 set selected [check_effective_target_${arg}]
7461 "vmx_hw" { set selected [check_vmx_hw_available] }
7462 "vsx_hw" { set selected [check_vsx_hw_available] }
7463 "p8vector_hw" { set selected [check_p8vector_hw_available] }
7464 "p9vector_hw" { set selected [check_p9vector_hw_available] }
7465 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
7466 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
7467 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
7468 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
7469 "ppc_cpu_supports_hw" { set selected [check_ppc_cpu_supports_hw_available] }
7470 "dfp_hw" { set selected [check_dfp_hw_available] }
7471 "htm_hw" { set selected [check_htm_hw_available] }
7472 "named_sections" { set selected [check_named_sections_available] }
7473 "gc_sections" { set selected [check_gc_sections_available] }
7474 "cxa_atexit" { set selected [check_cxa_atexit_available] }
7475 default { error "unknown effective target keyword `$arg'" }
7478 verbose "is-effective-target: $arg $selected" 2
7482 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
7484 proc is-effective-target-keyword { arg } {
7485 if { [info procs check_effective_target_${arg}] != [list] } {
7488 # These have different names for their check_* procs.
7490 "vmx_hw" { return 1 }
7491 "vsx_hw" { return 1 }
7492 "p8vector_hw" { return 1 }
7493 "p9vector_hw" { return 1 }
7494 "p9modulo_hw" { return 1 }
7495 "ppc_float128_sw" { return 1 }
7496 "ppc_float128_hw" { return 1 }
7497 "ppc_recip_hw" { return 1 }
7498 "dfp_hw" { return 1 }
7499 "htm_hw" { return 1 }
7500 "named_sections" { return 1 }
7501 "gc_sections" { return 1 }
7502 "cxa_atexit" { return 1 }
7503 default { return 0 }
7508 # Execute tests for all targets in EFFECTIVE_TARGETS list. Set et_index to
7509 # indicate what target is currently being processed. This is for
7510 # the vectorizer tests, e.g. vect_int, to keep track what target supports
7513 proc et-dg-runtest { runtest testcases flags default-extra-flags } {
7514 global dg-do-what-default
7515 global EFFECTIVE_TARGETS
7518 if { [llength $EFFECTIVE_TARGETS] > 0 } {
7519 foreach target $EFFECTIVE_TARGETS {
7520 set target_flags $flags
7521 set dg-do-what-default compile
7522 set et_index [lsearch -exact $EFFECTIVE_TARGETS $target]
7523 if { [info procs add_options_for_${target}] != [list] } {
7524 set target_flags [add_options_for_${target} "$flags"]
7526 if { [info procs check_effective_target_${target}_runtime]
7527 != [list] && [check_effective_target_${target}_runtime] } {
7528 set dg-do-what-default run
7530 $runtest $testcases $target_flags ${default-extra-flags}
7534 $runtest $testcases $flags ${default-extra-flags}
7538 # Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
7539 # et_index, 0 otherwise.
7541 proc et-is-effective-target { target } {
7542 global EFFECTIVE_TARGETS
7545 if { [llength $EFFECTIVE_TARGETS] > $et_index
7546 && [lindex $EFFECTIVE_TARGETS $et_index] == $target } {
7552 # Return 1 if target default to short enums
7554 proc check_effective_target_short_enums { } {
7555 return [check_no_compiler_messages short_enums assembly {
7557 int s[sizeof (enum foo) == 1 ? 1 : -1];
7561 # Return 1 if target supports merging string constants at link time.
7563 proc check_effective_target_string_merging { } {
7564 return [check_no_messages_and_pattern string_merging \
7565 "rodata\\.str" assembly {
7566 const char *var = "String";
7570 # Return 1 if target has the basic signed and unsigned types in
7571 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
7572 # working <stdint.h> for all targets.
7574 proc check_effective_target_stdint_types { } {
7575 return [check_no_compiler_messages stdint_types assembly {
7577 int8_t a; int16_t b; int32_t c; int64_t d;
7578 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
7582 # Return 1 if target has the basic signed and unsigned types in
7583 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
7584 # these types agree with those in the header, as some systems have
7585 # only <inttypes.h>.
7587 proc check_effective_target_inttypes_types { } {
7588 return [check_no_compiler_messages inttypes_types assembly {
7589 #include <inttypes.h>
7590 int8_t a; int16_t b; int32_t c; int64_t d;
7591 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
7595 # Return 1 if programs are intended to be run on a simulator
7596 # (i.e. slowly) rather than hardware (i.e. fast).
7598 proc check_effective_target_simulator { } {
7600 # All "src/sim" simulators set this one.
7601 if [board_info target exists is_simulator] {
7602 return [board_info target is_simulator]
7605 # The "sid" simulators don't set that one, but at least they set
7607 if [board_info target exists slow_simulator] {
7608 return [board_info target slow_simulator]
7614 # Return 1 if programs are intended to be run on hardware rather than
7617 proc check_effective_target_hw { } {
7619 # All "src/sim" simulators set this one.
7620 if [board_info target exists is_simulator] {
7621 if [board_info target is_simulator] {
7628 # The "sid" simulators don't set that one, but at least they set
7630 if [board_info target exists slow_simulator] {
7631 if [board_info target slow_simulator] {
7641 # Return 1 if the target is a VxWorks kernel.
7643 proc check_effective_target_vxworks_kernel { } {
7644 return [check_no_compiler_messages vxworks_kernel assembly {
7645 #if !defined __vxworks || defined __RTP__
7651 # Return 1 if the target is a VxWorks RTP.
7653 proc check_effective_target_vxworks_rtp { } {
7654 return [check_no_compiler_messages vxworks_rtp assembly {
7655 #if !defined __vxworks || !defined __RTP__
7661 # Return 1 if the target is expected to provide wide character support.
7663 proc check_effective_target_wchar { } {
7664 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
7667 return [check_no_compiler_messages wchar assembly {
7672 # Return 1 if the target has <pthread.h>.
7674 proc check_effective_target_pthread_h { } {
7675 return [check_no_compiler_messages pthread_h assembly {
7676 #include <pthread.h>
7680 # Return 1 if the target can truncate a file from a file-descriptor,
7681 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
7682 # chsize. We test for a trivially functional truncation; no stubs.
7683 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
7684 # different function to be used.
7686 proc check_effective_target_fd_truncate { } {
7688 #define _FILE_OFFSET_BITS 64
7695 FILE *f = fopen ("tst.tmp", "wb");
7697 const char t[] = "test writing more than ten characters";
7701 write (fd, t, sizeof (t) - 1);
7703 if (ftruncate (fd, 10) != 0)
7712 f = fopen ("tst.tmp", "rb");
7713 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
7721 if { [check_runtime ftruncate $prog] } {
7725 regsub "ftruncate" $prog "chsize" prog
7726 return [check_runtime chsize $prog]
7729 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
7731 proc add_options_for_c99_runtime { flags } {
7732 if { [istarget *-*-solaris2*] } {
7733 return "$flags -std=c99"
7735 if { [istarget powerpc-*-darwin*] } {
7736 return "$flags -mmacosx-version-min=10.3"
7741 # Add to FLAGS all the target-specific flags needed to enable
7742 # full IEEE compliance mode.
7744 proc add_options_for_ieee { flags } {
7745 if { [istarget alpha*-*-*]
7746 || [istarget sh*-*-*] } {
7747 return "$flags -mieee"
7749 if { [istarget rx-*-*] } {
7750 return "$flags -mnofpu"
7755 if {![info exists flags_to_postpone]} {
7756 set flags_to_postpone ""
7759 # Add to FLAGS the flags needed to enable functions to bind locally
7760 # when using pic/PIC passes in the testsuite.
7761 proc add_options_for_bind_pic_locally { flags } {
7762 global flags_to_postpone
7764 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
7765 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
7766 # order to make sure that the multilib_flags doesn't override this.
7768 if {[check_no_compiler_messages using_pic2 assembly {
7773 set flags_to_postpone "-fPIE"
7776 if {[check_no_compiler_messages using_pic1 assembly {
7781 set flags_to_postpone "-fpie"
7787 # Add to FLAGS the flags needed to enable 64-bit vectors.
7789 proc add_options_for_double_vectors { flags } {
7790 if [is-effective-target arm_neon_ok] {
7791 return "$flags -mvectorize-with-neon-double"
7797 # Add to FLAGS the flags needed to define the STACK_SIZE macro.
7799 proc add_options_for_stack_size { flags } {
7800 if [is-effective-target stack_size] {
7801 set stack_size [dg-effective-target-value stack_size]
7802 return "$flags -DSTACK_SIZE=$stack_size"
7808 # Return 1 if the target provides a full C99 runtime.
7810 proc check_effective_target_c99_runtime { } {
7811 return [check_cached_effective_target c99_runtime {
7814 set file [open "$srcdir/gcc.dg/builtins-config.h"]
7815 set contents [read $file]
7818 #ifndef HAVE_C99_RUNTIME
7819 #error !HAVE_C99_RUNTIME
7822 check_no_compiler_messages_nocache c99_runtime assembly \
7823 $contents [add_options_for_c99_runtime ""]
7827 # Return 1 if target wchar_t is at least 4 bytes.
7829 proc check_effective_target_4byte_wchar_t { } {
7830 return [check_no_compiler_messages 4byte_wchar_t object {
7831 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
7835 # Return 1 if the target supports automatic stack alignment.
7837 proc check_effective_target_automatic_stack_alignment { } {
7838 # Ordinarily x86 supports automatic stack alignment ...
7839 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
7840 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
7841 # ... except Win64 SEH doesn't. Succeed for Win32 though.
7842 return [check_effective_target_ilp32];
7849 # Return true if we are compiling for AVX target.
7851 proc check_avx_available { } {
7852 if { [check_no_compiler_messages avx_available assembly {
7862 # Return true if 32- and 16-bytes vectors are available.
7864 proc check_effective_target_vect_sizes_32B_16B { } {
7865 return [expr { [available_vector_sizes] == [list 256 128] }]
7868 # Return true if 16- and 8-bytes vectors are available.
7870 proc check_effective_target_vect_sizes_16B_8B { } {
7871 if { [check_avx_available]
7872 || [is-effective-target arm_neon]
7873 || [istarget aarch64*-*-*] } {
7881 # Return true if 128-bits vectors are preferred even if 256-bits vectors
7884 proc check_prefer_avx128 { } {
7885 if ![check_avx_available] {
7888 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
7889 float a[1024],b[1024],c[1024];
7890 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
7891 } "-O2 -ftree-vectorize"]
7895 # Return 1 if avx512f instructions can be compiled.
7897 proc check_effective_target_avx512f { } {
7898 return [check_no_compiler_messages avx512f object {
7899 typedef double __m512d __attribute__ ((__vector_size__ (64)));
7901 __m512d _mm512_add (__m512d a)
7903 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
7908 # Return 1 if avx instructions can be compiled.
7910 proc check_effective_target_avx { } {
7911 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
7914 return [check_no_compiler_messages avx object {
7915 void _mm256_zeroall (void)
7917 __builtin_ia32_vzeroall ();
7922 # Return 1 if avx2 instructions can be compiled.
7923 proc check_effective_target_avx2 { } {
7924 return [check_no_compiler_messages avx2 object {
7925 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
7927 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
7929 return __builtin_ia32_andnotsi256 (__X, __Y);
7934 # Return 1 if sse instructions can be compiled.
7935 proc check_effective_target_sse { } {
7936 return [check_no_compiler_messages sse object {
7939 __builtin_ia32_stmxcsr ();
7945 # Return 1 if sse2 instructions can be compiled.
7946 proc check_effective_target_sse2 { } {
7947 return [check_no_compiler_messages sse2 object {
7948 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7950 __m128i _mm_srli_si128 (__m128i __A, int __N)
7952 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
7957 # Return 1 if sse4.1 instructions can be compiled.
7958 proc check_effective_target_sse4 { } {
7959 return [check_no_compiler_messages sse4.1 object {
7960 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
7961 typedef int __v4si __attribute__ ((__vector_size__ (16)));
7963 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
7965 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
7971 # Return 1 if F16C instructions can be compiled.
7973 proc check_effective_target_f16c { } {
7974 return [check_no_compiler_messages f16c object {
7975 #include "immintrin.h"
7977 foo (unsigned short val)
7979 return _cvtsh_ss (val);
7984 # Return 1 if C wchar_t type is compatible with char16_t.
7986 proc check_effective_target_wchar_t_char16_t_compatible { } {
7987 return [check_no_compiler_messages wchar_t_char16_t object {
7989 __CHAR16_TYPE__ *p16 = &wc;
7990 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
7994 # Return 1 if C wchar_t type is compatible with char32_t.
7996 proc check_effective_target_wchar_t_char32_t_compatible { } {
7997 return [check_no_compiler_messages wchar_t_char32_t object {
7999 __CHAR32_TYPE__ *p32 = &wc;
8000 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
8004 # Return 1 if pow10 function exists.
8006 proc check_effective_target_pow10 { } {
8007 return [check_runtime pow10 {
8017 # Return 1 if frexpl function exists.
8019 proc check_effective_target_frexpl { } {
8020 return [check_runtime frexpl {
8025 x = frexpl (5.0, &y);
8032 # Return 1 if issignaling function exists.
8033 proc check_effective_target_issignaling {} {
8034 return [check_runtime issignaling {
8039 return issignaling (0.0);
8044 # Return 1 if current options generate DFP instructions, 0 otherwise.
8045 proc check_effective_target_hard_dfp {} {
8046 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
8047 typedef float d64 __attribute__((mode(DD)));
8049 void foo (void) { z = x + y; }
8053 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
8054 # for strchr etc. functions.
8056 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
8057 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
8060 #if !defined(__cplusplus) \
8061 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
8062 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
8063 ISO C++ correct string.h and wchar.h protos not supported.
8070 # Return 1 if GNU as is used.
8072 proc check_effective_target_gas { } {
8073 global use_gas_saved
8076 if {![info exists use_gas_saved]} {
8077 # Check if the as used by gcc is GNU as.
8078 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
8079 # Provide /dev/null as input, otherwise gas times out reading from
8081 set status [remote_exec host "$gcc_as" "-v /dev/null"]
8082 set as_output [lindex $status 1]
8083 if { [ string first "GNU" $as_output ] >= 0 } {
8089 return $use_gas_saved
8092 # Return 1 if GNU ld is used.
8094 proc check_effective_target_gld { } {
8095 global use_gld_saved
8098 if {![info exists use_gld_saved]} {
8099 # Check if the ld used by gcc is GNU ld.
8100 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
8101 set status [remote_exec host "$gcc_ld" "--version"]
8102 set ld_output [lindex $status 1]
8103 if { [ string first "GNU" $ld_output ] >= 0 } {
8109 return $use_gld_saved
8112 # Return 1 if the compiler has been configure with link-time optimization
8115 proc check_effective_target_lto { } {
8116 if { [istarget nvptx-*-*] } {
8119 return [check_no_compiler_messages lto object {
8124 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
8126 proc check_effective_target_maybe_x32 { } {
8127 return [check_no_compiler_messages maybe_x32 object {
8129 } "-mx32 -maddress-mode=short"]
8132 # Return 1 if this target supports the -fsplit-stack option, 0
8135 proc check_effective_target_split_stack {} {
8136 return [check_no_compiler_messages split_stack object {
8141 # Return 1 if this target supports the -masm=intel option, 0
8144 proc check_effective_target_masm_intel {} {
8145 return [check_no_compiler_messages masm_intel object {
8146 extern void abort (void);
8150 # Return 1 if the language for the compiler under test is C.
8152 proc check_effective_target_c { } {
8154 if [string match $tool "gcc"] {
8160 # Return 1 if the language for the compiler under test is C++.
8162 proc check_effective_target_c++ { } {
8164 if { [string match $tool "g++"] || [string match $tool "libstdc++"] } {
8170 set cxx_default "c++14"
8171 # Check whether the current active language standard supports the features
8172 # of C++11/C++14 by checking for the presence of one of the -std flags.
8173 # This assumes that the default for the compiler is $cxx_default, and that
8174 # there will never be multiple -std= arguments on the command line.
8175 proc check_effective_target_c++11_only { } {
8177 if ![check_effective_target_c++] {
8180 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
8183 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
8188 proc check_effective_target_c++11 { } {
8189 if [check_effective_target_c++11_only] {
8192 return [check_effective_target_c++14]
8194 proc check_effective_target_c++11_down { } {
8195 if ![check_effective_target_c++] {
8198 return [expr ![check_effective_target_c++14] ]
8201 proc check_effective_target_c++14_only { } {
8203 if ![check_effective_target_c++] {
8206 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
8209 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
8215 proc check_effective_target_c++14 { } {
8216 if [check_effective_target_c++14_only] {
8219 return [check_effective_target_c++17]
8221 proc check_effective_target_c++14_down { } {
8222 if ![check_effective_target_c++] {
8225 return [expr ![check_effective_target_c++17] ]
8228 proc check_effective_target_c++98_only { } {
8230 if ![check_effective_target_c++] {
8233 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
8236 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
8242 proc check_effective_target_c++17_only { } {
8244 if ![check_effective_target_c++] {
8247 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
8250 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
8256 proc check_effective_target_c++17 { } {
8257 if [check_effective_target_c++17_only] {
8260 return [check_effective_target_c++2a]
8262 proc check_effective_target_c++17_down { } {
8263 if ![check_effective_target_c++] {
8266 return [expr ![check_effective_target_c++2a] ]
8269 proc check_effective_target_c++2a_only { } {
8271 if ![check_effective_target_c++] {
8274 if [check-flags { { } { } { -std=c++2a -std=gnu++2a } }] {
8277 if { $cxx_default == "c++20" && [check-flags { { } { } { } { -std=* } }] } {
8282 proc check_effective_target_c++2a { } {
8283 return [check_effective_target_c++2a_only]
8286 # Check for C++ Concepts TS support, i.e. -fconcepts flag.
8287 proc check_effective_target_concepts { } {
8288 return [check-flags { "" { } { -fconcepts } }]
8291 # Return 1 if expensive testcases should be run.
8293 proc check_effective_target_run_expensive_tests { } {
8294 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
8300 # Returns 1 if "mempcpy" is available on the target system.
8302 proc check_effective_target_mempcpy {} {
8303 return [check_function_available "mempcpy"]
8306 # Returns 1 if "stpcpy" is available on the target system.
8308 proc check_effective_target_stpcpy {} {
8309 return [check_function_available "stpcpy"]
8312 # Check whether the vectorizer tests are supported by the target and
8313 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
8314 # If a port wants to execute the tests more than once it should append
8315 # the supported target to EFFECTIVE_TARGETS instead, and the compile flags
8316 # will be added by a call to add_options_for_<target>.
8317 # Set dg-do-what-default to either compile or run, depending on target
8318 # capabilities. Do not set this if the supported target is appended to
8319 # EFFECTIVE_TARGETS. Flags and this variable will be set by et-dg-runtest
8320 # automatically. Return the number of effective targets if vectorizer tests
8321 # are supported, 0 otherwise.
8323 proc check_vect_support_and_set_flags { } {
8324 global DEFAULT_VECTCFLAGS
8325 global dg-do-what-default
8326 global EFFECTIVE_TARGETS
8328 if [istarget powerpc-*paired*] {
8329 lappend DEFAULT_VECTCFLAGS "-mpaired"
8330 if [check_750cl_hw_available] {
8331 set dg-do-what-default run
8333 set dg-do-what-default compile
8335 } elseif [istarget powerpc*-*-*] {
8336 # Skip targets not supporting -maltivec.
8337 if ![is-effective-target powerpc_altivec_ok] {
8341 lappend DEFAULT_VECTCFLAGS "-maltivec"
8342 if [check_p9vector_hw_available] {
8343 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
8344 } elseif [check_p8vector_hw_available] {
8345 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
8346 } elseif [check_vsx_hw_available] {
8347 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
8350 if [check_vmx_hw_available] {
8351 set dg-do-what-default run
8353 if [is-effective-target ilp32] {
8354 # Specify a cpu that supports VMX for compile-only tests.
8355 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
8357 set dg-do-what-default compile
8359 } elseif { [istarget spu-*-*] } {
8360 set dg-do-what-default run
8361 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8362 lappend DEFAULT_VECTCFLAGS "-msse2"
8363 if { [check_effective_target_sse2_runtime] } {
8364 set dg-do-what-default run
8366 set dg-do-what-default compile
8368 } elseif { [istarget mips*-*-*]
8369 && [check_effective_target_nomips16] } {
8370 if { [check_effective_target_mpaired_single] } {
8371 lappend EFFECTIVE_TARGETS mpaired_single
8373 if { [check_effective_target_mips_loongson] } {
8374 lappend EFFECTIVE_TARGETS mips_loongson
8376 if { [check_effective_target_mips_msa] } {
8377 lappend EFFECTIVE_TARGETS mips_msa
8379 return [llength $EFFECTIVE_TARGETS]
8380 } elseif [istarget sparc*-*-*] {
8381 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
8382 if [check_effective_target_ultrasparc_hw] {
8383 set dg-do-what-default run
8385 set dg-do-what-default compile
8387 } elseif [istarget alpha*-*-*] {
8388 # Alpha's vectorization capabilities are extremely limited.
8389 # It's more effort than its worth disabling all of the tests
8390 # that it cannot pass. But if you actually want to see what
8391 # does work, command out the return.
8394 lappend DEFAULT_VECTCFLAGS "-mmax"
8395 if [check_alpha_max_hw_available] {
8396 set dg-do-what-default run
8398 set dg-do-what-default compile
8400 } elseif [istarget ia64-*-*] {
8401 set dg-do-what-default run
8402 } elseif [is-effective-target arm_neon_ok] {
8403 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
8404 # NEON does not support denormals, so is not used for vectorization by
8405 # default to avoid loss of precision. We must pass -ffast-math to test
8406 # vectorization of float operations.
8407 lappend DEFAULT_VECTCFLAGS "-ffast-math"
8408 if [is-effective-target arm_neon_hw] {
8409 set dg-do-what-default run
8411 set dg-do-what-default compile
8413 } elseif [istarget "aarch64*-*-*"] {
8414 set dg-do-what-default run
8415 } elseif [istarget s390*-*-*] {
8416 # The S/390 backend set a default of 2 for that value.
8417 # Override it to have the same situation as with other
8419 lappend DEFAULT_VECTCFLAGS "--param" "min-vect-loop-bound=1"
8420 lappend DEFAULT_VECTCFLAGS "--param" "max-unrolled-insns=200"
8421 lappend DEFAULT_VECTCFLAGS "--param" "max-unroll-times=8"
8422 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peeled-insns=200"
8423 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peel-times=16"
8424 if [check_effective_target_s390_vxe] {
8425 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
8426 set dg-do-what-default run
8427 } elseif [check_effective_target_s390_vx] {
8428 lappend DEFAULT_VECTCFLAGS "-march=z13" "-mzarch"
8429 set dg-do-what-default run
8431 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
8432 set dg-do-what-default compile
8441 # Return 1 if the target does *not* require strict alignment.
8443 proc check_effective_target_non_strict_align {} {
8445 # On ARM, the default is to use STRICT_ALIGNMENT, but there
8446 # are interfaces defined for misaligned access and thus
8447 # depending on the architecture levels unaligned access is
8449 if [istarget "arm*-*-*"] {
8450 return [check_effective_target_arm_unaligned]
8453 return [check_no_compiler_messages non_strict_align assembly {
8455 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
8457 void foo(void) { z = (c *) y; }
8461 # Return 1 if the target has <ucontext.h>.
8463 proc check_effective_target_ucontext_h { } {
8464 return [check_no_compiler_messages ucontext_h assembly {
8465 #include <ucontext.h>
8469 proc check_effective_target_aarch64_tiny { } {
8470 if { [istarget aarch64*-*-*] } {
8471 return [check_no_compiler_messages aarch64_tiny object {
8472 #ifdef __AARCH64_CMODEL_TINY__
8475 #error target not AArch64 tiny code model
8483 # Create functions to check that the AArch64 assembler supports the
8484 # various architecture extensions via the .arch_extension pseudo-op.
8486 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod"} {
8487 eval [string map [list FUNC $aarch64_ext] {
8488 proc check_effective_target_aarch64_asm_FUNC_ok { } {
8489 if { [istarget aarch64*-*-*] } {
8490 return [check_no_compiler_messages aarch64_FUNC_assembler object {
8491 __asm__ (".arch_extension FUNC");
8492 } "-march=armv8-a+FUNC"]
8500 proc check_effective_target_aarch64_small { } {
8501 if { [istarget aarch64*-*-*] } {
8502 return [check_no_compiler_messages aarch64_small object {
8503 #ifdef __AARCH64_CMODEL_SMALL__
8506 #error target not AArch64 small code model
8514 proc check_effective_target_aarch64_large { } {
8515 if { [istarget aarch64*-*-*] } {
8516 return [check_no_compiler_messages aarch64_large object {
8517 #ifdef __AARCH64_CMODEL_LARGE__
8520 #error target not AArch64 large code model
8529 # Return 1 if this is a reduced AVR Tiny core. Such cores have different
8530 # register set, instruction set, addressing capabilities and ABI.
8532 proc check_effective_target_avr_tiny { } {
8533 if { [istarget avr*-*-*] } {
8534 return [check_no_compiler_messages avr_tiny object {
8538 #error target not a reduced AVR Tiny core
8546 # Return 1 if <fenv.h> is available with all the standard IEEE
8547 # exceptions and floating-point exceptions are raised by arithmetic
8548 # operations. (If the target requires special options for "inexact"
8549 # exceptions, those need to be specified in the testcases.)
8551 proc check_effective_target_fenv_exceptions {} {
8552 return [check_runtime fenv_exceptions {
8555 #ifndef FE_DIVBYZERO
8556 # error Missing FE_DIVBYZERO
8559 # error Missing FE_INEXACT
8562 # error Missing FE_INVALID
8565 # error Missing FE_OVERFLOW
8567 #ifndef FE_UNDERFLOW
8568 # error Missing FE_UNDERFLOW
8570 volatile float a = 0.0f, r;
8575 if (fetestexcept (FE_INVALID))
8580 } [add_options_for_ieee "-std=gnu99"]]
8583 proc check_effective_target_tiny {} {
8584 global et_target_tiny_saved
8586 if [info exists et_target_tiny_saved] {
8587 verbose "check_effective_target_tiny: using cached result" 2
8589 set et_target_tiny_saved 0
8590 if { [istarget aarch64*-*-*]
8591 && [check_effective_target_aarch64_tiny] } {
8592 set et_target_tiny_saved 1
8594 if { [istarget avr-*-*]
8595 && [check_effective_target_avr_tiny] } {
8596 set et_target_tiny_saved 1
8600 return $et_target_tiny_saved
8603 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
8605 proc check_effective_target_logical_op_short_circuit {} {
8606 if { [istarget mips*-*-*]
8607 || [istarget arc*-*-*]
8608 || [istarget avr*-*-*]
8609 || [istarget crisv32-*-*] || [istarget cris-*-*]
8610 || [istarget mmix-*-*]
8611 || [istarget s390*-*-*]
8612 || [istarget powerpc*-*-*]
8613 || [istarget nios2*-*-*]
8614 || [istarget riscv*-*-*]
8615 || [istarget visium-*-*]
8616 || [check_effective_target_arm_cortex_m] } {
8622 # Record that dg-final test TEST requires convential compilation.
8624 proc force_conventional_output_for { test } {
8625 if { [info proc $test] == "" } {
8626 perror "$test does not exist"
8629 proc ${test}_required_options {} {
8630 global gcc_force_conventional_output
8631 return $gcc_force_conventional_output
8635 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
8636 # otherwise. Cache the result.
8638 proc check_effective_target_pie_copyreloc { } {
8639 global pie_copyreloc_available_saved
8641 global GCC_UNDER_TEST
8643 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8647 # Need auto-host.h to check linker support.
8648 if { ![file exists ../../auto-host.h ] } {
8652 if [info exists pie_copyreloc_available_saved] {
8653 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
8655 # Set up and compile to see if linker supports PIE with copy
8656 # reloc. Include the current process ID in the file names to
8657 # prevent conflicts with invocations for multiple testsuites.
8662 set f [open $src "w"]
8663 puts $f "#include \"../../auto-host.h\""
8664 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
8665 puts $f "# error Linker does not support PIE with copy reloc."
8669 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
8670 set lines [${tool}_target_compile $src $obj object ""]
8675 if [string match "" $lines] then {
8676 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
8677 set pie_copyreloc_available_saved 1
8679 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
8680 set pie_copyreloc_available_saved 0
8684 return $pie_copyreloc_available_saved
8687 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
8688 # otherwise. Cache the result.
8690 proc check_effective_target_got32x_reloc { } {
8691 global got32x_reloc_available_saved
8693 global GCC_UNDER_TEST
8695 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8699 # Need auto-host.h to check linker support.
8700 if { ![file exists ../../auto-host.h ] } {
8704 if [info exists got32x_reloc_available_saved] {
8705 verbose "check_effective_target_got32x_reloc returning saved $got32x_reloc_available_saved" 2
8707 # Include the current process ID in the file names to prevent
8708 # conflicts with invocations for multiple testsuites.
8710 set src got32x[pid].c
8711 set obj got32x[pid].o
8713 set f [open $src "w"]
8714 puts $f "#include \"../../auto-host.h\""
8715 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
8716 puts $f "# error Assembler does not support R_386_GOT32X."
8720 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
8721 set lines [${tool}_target_compile $src $obj object ""]
8726 if [string match "" $lines] then {
8727 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
8728 set got32x_reloc_available_saved 1
8730 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
8731 set got32x_reloc_available_saved 0
8735 return $got32x_reloc_available_saved
8738 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
8739 # 0 otherwise. Cache the result.
8741 proc check_effective_target_tls_get_addr_via_got { } {
8742 global tls_get_addr_via_got_available_saved
8744 global GCC_UNDER_TEST
8746 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8750 # Need auto-host.h to check linker support.
8751 if { ![file exists ../../auto-host.h ] } {
8755 if [info exists tls_get_addr_via_got_available_saved] {
8756 verbose "check_effective_target_tls_get_addr_via_got returning saved $tls_get_addr_via_got_available_saved" 2
8758 # Include the current process ID in the file names to prevent
8759 # conflicts with invocations for multiple testsuites.
8761 set src tls_get_addr_via_got[pid].c
8762 set obj tls_get_addr_via_got[pid].o
8764 set f [open $src "w"]
8765 puts $f "#include \"../../auto-host.h\""
8766 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
8767 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
8771 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
8772 set lines [${tool}_target_compile $src $obj object ""]
8777 if [string match "" $lines] then {
8778 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
8779 set tls_get_addr_via_got_available_saved 1
8781 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
8782 set tls_get_addr_via_got_available_saved 0
8786 return $tls_get_addr_via_got_available_saved
8789 # Return 1 if the target uses comdat groups.
8791 proc check_effective_target_comdat_group {} {
8792 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
8794 inline int foo () { return 1; }
8799 # Return 1 if target supports __builtin_eh_return
8800 proc check_effective_target_builtin_eh_return { } {
8801 return [check_no_compiler_messages builtin_eh_return object {
8802 void test (long l, void *p)
8804 __builtin_eh_return (l, p);
8809 # Return 1 if the target supports max reduction for vectors.
8811 proc check_effective_target_vect_max_reduc { } {
8812 if { [istarget aarch64*-*-*] || [is-effective-target arm_neon] } {
8818 # Return 1 if there is an nvptx offload compiler.
8820 proc check_effective_target_offload_nvptx { } {
8821 return [check_no_compiler_messages offload_nvptx object {
8822 int main () {return 0;}
8823 } "-foffload=nvptx-none" ]
8826 # Return 1 if the compiler has been configured with hsa offloading.
8828 proc check_effective_target_offload_hsa { } {
8829 return [check_no_compiler_messages offload_hsa assembly {
8830 int main () {return 0;}
8834 # Return 1 if the target support -fprofile-update=atomic
8835 proc check_effective_target_profile_update_atomic {} {
8836 return [check_no_compiler_messages profile_update_atomic assembly {
8837 int main (void) { return 0; }
8838 } "-fprofile-update=atomic -fprofile-generate"]
8841 # Return 1 if vector (va - vector add) instructions are understood by
8842 # the assembler and can be executed. This also covers checking for
8843 # the VX kernel feature. A kernel without that feature does not
8844 # enable the vector facility and the following check will die with a
8846 proc check_effective_target_s390_vx { } {
8847 if ![istarget s390*-*-*] then {
8851 return [check_runtime s390_check_vx {
8854 asm ("va %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
8857 } "-march=z13 -mzarch" ]
8860 # Same as above but for the z14 vector enhancement facility. Test
8861 # is performed with the vector nand instruction.
8862 proc check_effective_target_s390_vxe { } {
8863 if ![istarget s390*-*-*] then {
8867 return [check_runtime s390_check_vxe {
8870 asm ("vnn %%v24, %%v26, %%v28" : : : "v24", "v26", "v28");
8873 } "-march=z14 -mzarch" ]
8876 #For versions of ARM architectures that have hardware div insn,
8877 #disable the divmod transform
8879 proc check_effective_target_arm_divmod_simode { } {
8880 return [check_no_compiler_messages arm_divmod assembly {
8881 #ifdef __ARM_ARCH_EXT_IDIV__
8888 # Return 1 if target supports divmod hardware insn or divmod libcall.
8890 proc check_effective_target_divmod { } {
8891 #TODO: Add checks for all targets that have either hardware divmod insn
8892 # or define libfunc for divmod.
8893 if { [istarget arm*-*-*]
8894 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8900 # Return 1 if target supports divmod for SImode. The reason for
8901 # separating this from check_effective_target_divmod is that
8902 # some versions of ARM architecture define div instruction
8903 # only for simode, and for these archs, we do not want to enable
8904 # divmod transform for simode.
8906 proc check_effective_target_divmod_simode { } {
8907 if { [istarget arm*-*-*] } {
8908 return [check_effective_target_arm_divmod_simode]
8911 return [check_effective_target_divmod]
8914 # Return 1 if store merging optimization is applicable for target.
8915 # Store merging is not profitable for targets like the avr which
8916 # can load/store only one byte at a time. Use int size as a proxy
8917 # for the number of bytes the target can write, and skip for targets
8918 # with a smallish (< 32) size.
8920 proc check_effective_target_store_merge { } {
8921 if { [is-effective-target non_strict_align ] && [is-effective-target int32plus] } {
8928 # Return 1 if we're able to assemble rdrand
8930 proc check_effective_target_rdrand { } {
8931 return [check_no_compiler_messages_nocache rdrand object {
8936 __builtin_ia32_rdrand32_step(&val);
8942 # Return 1 if the target supports coprocessor instructions: cdp, ldc, ldcl,
8943 # stc, stcl, mcr and mrc.
8944 proc check_effective_target_arm_coproc1_ok_nocache { } {
8945 if { ![istarget arm*-*-*] } {
8948 return [check_no_compiler_messages_nocache arm_coproc1_ok assembly {
8949 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 4
8955 proc check_effective_target_arm_coproc1_ok { } {
8956 return [check_cached_effective_target arm_coproc1_ok \
8957 check_effective_target_arm_coproc1_ok_nocache]
8960 # Return 1 if the target supports all coprocessor instructions checked by
8961 # check_effective_target_arm_coproc1_ok in addition to the following: cdp2,
8962 # ldc2, ldc2l, stc2, stc2l, mcr2 and mrc2.
8963 proc check_effective_target_arm_coproc2_ok_nocache { } {
8964 if { ![check_effective_target_arm_coproc1_ok] } {
8967 return [check_no_compiler_messages_nocache arm_coproc2_ok assembly {
8968 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 5
8974 proc check_effective_target_arm_coproc2_ok { } {
8975 return [check_cached_effective_target arm_coproc2_ok \
8976 check_effective_target_arm_coproc2_ok_nocache]
8979 # Return 1 if the target supports all coprocessor instructions checked by
8980 # check_effective_target_arm_coproc2_ok in addition the following: mcrr and
8982 proc check_effective_target_arm_coproc3_ok_nocache { } {
8983 if { ![check_effective_target_arm_coproc2_ok] } {
8986 return [check_no_compiler_messages_nocache arm_coproc3_ok assembly {
8987 #if (__thumb__ && !__thumb2__) \
8988 || (__ARM_ARCH < 6 && !defined (__ARM_ARCH_5TE__))
8994 proc check_effective_target_arm_coproc3_ok { } {
8995 return [check_cached_effective_target arm_coproc3_ok \
8996 check_effective_target_arm_coproc3_ok_nocache]
8999 # Return 1 if the target supports all coprocessor instructions checked by
9000 # check_effective_target_arm_coproc3_ok in addition the following: mcrr2 and
9002 proc check_effective_target_arm_coproc4_ok_nocache { } {
9003 if { ![check_effective_target_arm_coproc3_ok] } {
9006 return [check_no_compiler_messages_nocache arm_coproc4_ok assembly {
9007 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 6
9013 proc check_effective_target_arm_coproc4_ok { } {
9014 return [check_cached_effective_target arm_coproc4_ok \
9015 check_effective_target_arm_coproc4_ok_nocache]
9018 # Return 1 if the target supports the auto_inc_dec optimization pass.
9019 proc check_effective_target_autoincdec { } {
9020 if { ![check_no_compiler_messages auto_incdec assembly { void f () { }
9021 } "-O2 -fdump-rtl-auto_inc_dec" ] } {
9025 set dumpfile [glob -nocomplain "auto_incdec[pid].c.\[0-9\]\[0-9\]\[0-9\]r.auto_inc_dec"]
9026 if { [file exists $dumpfile ] } {
9027 file delete $dumpfile
9033 # Return 1 if the target has support for stack probing designed
9034 # to avoid stack-clash style attacks.
9036 # This is used to restrict the stack-clash mitigation tests to
9037 # just those targets that have been explicitly supported.
9039 # In addition to the prologue work on those targets, each target's
9040 # properties should be described in the functions below so that
9041 # tests do not become a mess of unreadable target conditions.
9043 proc check_effective_target_supports_stack_clash_protection { } {
9045 # Temporary until the target bits are fully ACK'd.
9046 # if { [istarget aarch*-*-*] } {
9050 if { [istarget x86_64-*-*] || [istarget i?86-*-*]
9051 || [istarget powerpc*-*-*] || [istarget rs6000*-*-*]
9052 || [istarget s390*-*-*] } {
9058 # Return 1 if the target creates a frame pointer for non-leaf functions
9059 # Note we ignore cases where we apply tail call optimization here.
9060 proc check_effective_target_frame_pointer_for_non_leaf { } {
9061 if { [istarget aarch*-*-*] } {
9065 # Solaris/x86 defaults to -fno-omit-frame-pointer.
9066 if { [istarget i?86-*-solaris*] || [istarget x86_64-*-solaris*] } {
9073 # Return 1 if the target's calling sequence or its ABI
9074 # create implicit stack probes at or prior to function entry.
9075 proc check_effective_target_caller_implicit_probes { } {
9077 # On x86/x86_64 the call instruction itself pushes the return
9078 # address onto the stack. That is an implicit probe of *sp.
9079 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
9083 # On PPC, the ABI mandates that the address of the outer
9084 # frame be stored at *sp. Thus each allocation of stack
9085 # space is itself an implicit probe of *sp.
9086 if { [istarget powerpc*-*-*] || [istarget rs6000*-*-*] } {
9090 # s390's ABI has a register save area allocated by the
9091 # caller for use by the callee. The mere existence does
9092 # not constitute a probe by the caller, but when the slots
9093 # used by the callee those stores are implicit probes.
9094 if { [istarget s390*-*-*] } {
9098 # Not strictly true on aarch64, but we have agreed that we will
9099 # consider any function that pushes SP more than 3kbytes into
9100 # the guard page as broken. This essentially means that we can
9101 # consider the aarch64 as having a caller implicit probe at
9103 if { [istarget aarch64*-*-*] } {
9110 # Targets that potentially realign the stack pointer often cause residual
9111 # stack allocations and make it difficult to elimination loops or residual
9112 # allocations for dynamic stack allocations
9113 proc check_effective_target_callee_realigns_stack { } {
9114 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
9120 # Return 1 if CET instructions can be compiled.
9121 proc check_effective_target_cet { } {
9122 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
9125 return [check_no_compiler_messages cet object {