[AArch64] Vectorise bswap[16,32,64]
[gcc.git] / gcc / testsuite / lib / target-supports.exp
1 # Copyright (C) 1999-2014 Free Software Foundation, Inc.
2
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
7 #
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
12 #
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
16
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
19
20 # This file defines procs for determining features supported by the target.
21
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
26 #
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
30 #
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
33 # "// C++" for c++,
34 # "! Fortran" for Fortran code,
35 # "/* ObjC", for ObjC
36 # "// ObjC++" for ObjC++
37 # and "// Go" for Go
38 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
39 # allow for ObjC/ObjC++ specific flags.
40 proc check_compile {basename type contents args} {
41 global tool
42 verbose "check_compile tool: $tool for $basename"
43
44 if { [llength $args] > 0 } {
45 set options [list "additional_flags=[lindex $args 0]"]
46 } else {
47 set options ""
48 }
49 switch -glob -- $contents {
50 "*! Fortran*" { set src ${basename}[pid].f90 }
51 "*// C++*" { set src ${basename}[pid].cc }
52 "*// ObjC++*" { set src ${basename}[pid].mm }
53 "*/* ObjC*" { set src ${basename}[pid].m }
54 "*// Go*" { set src ${basename}[pid].go }
55 default {
56 switch -- $tool {
57 "objc" { set src ${basename}[pid].m }
58 "obj-c++" { set src ${basename}[pid].mm }
59 default { set src ${basename}[pid].c }
60 }
61 }
62 }
63
64 set compile_type $type
65 switch -glob $type {
66 assembly { set output ${basename}[pid].s }
67 object { set output ${basename}[pid].o }
68 executable { set output ${basename}[pid].exe }
69 "rtl-*" {
70 set output ${basename}[pid].s
71 lappend options "additional_flags=-fdump-$type"
72 set compile_type assembly
73 }
74 }
75 set f [open $src "w"]
76 puts $f $contents
77 close $f
78 set lines [${tool}_target_compile $src $output $compile_type "$options"]
79 file delete $src
80
81 set scan_output $output
82 # Don't try folding this into the switch above; calling "glob" before the
83 # file is created won't work.
84 if [regexp "rtl-(.*)" $type dummy rtl_type] {
85 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
86 file delete $output
87 }
88
89 return [list $lines $scan_output]
90 }
91
92 proc current_target_name { } {
93 global target_info
94 if [info exists target_info(target,name)] {
95 set answer $target_info(target,name)
96 } else {
97 set answer ""
98 }
99 return $answer
100 }
101
102 # Implement an effective-target check for property PROP by invoking
103 # the Tcl command ARGS and seeing if it returns true.
104
105 proc check_cached_effective_target { prop args } {
106 global et_cache
107
108 set target [current_target_name]
109 if {![info exists et_cache($prop,target)]
110 || $et_cache($prop,target) != $target} {
111 verbose "check_cached_effective_target $prop: checking $target" 2
112 set et_cache($prop,target) $target
113 set et_cache($prop,value) [uplevel eval $args]
114 }
115 set value $et_cache($prop,value)
116 verbose "check_cached_effective_target $prop: returning $value for $target" 2
117 return $value
118 }
119
120 # Like check_compile, but delete the output file and return true if the
121 # compiler printed no messages.
122 proc check_no_compiler_messages_nocache {args} {
123 set result [eval check_compile $args]
124 set lines [lindex $result 0]
125 set output [lindex $result 1]
126 remote_file build delete $output
127 return [string match "" $lines]
128 }
129
130 # Like check_no_compiler_messages_nocache, but cache the result.
131 # PROP is the property we're checking, and doubles as a prefix for
132 # temporary filenames.
133 proc check_no_compiler_messages {prop args} {
134 return [check_cached_effective_target $prop {
135 eval [list check_no_compiler_messages_nocache $prop] $args
136 }]
137 }
138
139 # Like check_compile, but return true if the compiler printed no
140 # messages and if the contents of the output file satisfy PATTERN.
141 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
142 # don't match regular expression REGEXP, otherwise they satisfy it
143 # if they do match regular expression PATTERN. (PATTERN can start
144 # with something like "[!]" if the regular expression needs to match
145 # "!" as the first character.)
146 #
147 # Delete the output file before returning. The other arguments are
148 # as for check_compile.
149 proc check_no_messages_and_pattern_nocache {basename pattern args} {
150 global tool
151
152 set result [eval [list check_compile $basename] $args]
153 set lines [lindex $result 0]
154 set output [lindex $result 1]
155
156 set ok 0
157 if { [string match "" $lines] } {
158 set chan [open "$output"]
159 set invert [regexp {^!(.*)} $pattern dummy pattern]
160 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
161 close $chan
162 }
163
164 remote_file build delete $output
165 return $ok
166 }
167
168 # Like check_no_messages_and_pattern_nocache, but cache the result.
169 # PROP is the property we're checking, and doubles as a prefix for
170 # temporary filenames.
171 proc check_no_messages_and_pattern {prop pattern args} {
172 return [check_cached_effective_target $prop {
173 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
174 }]
175 }
176
177 # Try to compile and run an executable from code CONTENTS. Return true
178 # if the compiler reports no messages and if execution "passes" in the
179 # usual DejaGNU sense. The arguments are as for check_compile, with
180 # TYPE implicitly being "executable".
181 proc check_runtime_nocache {basename contents args} {
182 global tool
183
184 set result [eval [list check_compile $basename executable $contents] $args]
185 set lines [lindex $result 0]
186 set output [lindex $result 1]
187
188 set ok 0
189 if { [string match "" $lines] } {
190 # No error messages, everything is OK.
191 set result [remote_load target "./$output" "" ""]
192 set status [lindex $result 0]
193 verbose "check_runtime_nocache $basename: status is <$status>" 2
194 if { $status == "pass" } {
195 set ok 1
196 }
197 }
198 remote_file build delete $output
199 return $ok
200 }
201
202 # Like check_runtime_nocache, but cache the result. PROP is the
203 # property we're checking, and doubles as a prefix for temporary
204 # filenames.
205 proc check_runtime {prop args} {
206 global tool
207
208 return [check_cached_effective_target $prop {
209 eval [list check_runtime_nocache $prop] $args
210 }]
211 }
212
213 ###############################
214 # proc check_weak_available { }
215 ###############################
216
217 # weak symbols are only supported in some configs/object formats
218 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
219
220 proc check_weak_available { } {
221 global target_cpu
222
223 # All mips targets should support it
224
225 if { [ string first "mips" $target_cpu ] >= 0 } {
226 return 1
227 }
228
229 # All AIX targets should support it
230
231 if { [istarget *-*-aix*] } {
232 return 1
233 }
234
235 # All solaris2 targets should support it
236
237 if { [istarget *-*-solaris2*] } {
238 return 1
239 }
240
241 # Windows targets Cygwin and MingW32 support it
242
243 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
244 return 1
245 }
246
247 # HP-UX 10.X doesn't support it
248
249 if { [istarget hppa*-*-hpux10*] } {
250 return 0
251 }
252
253 # ELF and ECOFF support it. a.out does with gas/gld but may also with
254 # other linkers, so we should try it
255
256 set objformat [gcc_target_object_format]
257
258 switch $objformat {
259 elf { return 1 }
260 ecoff { return 1 }
261 a.out { return 1 }
262 mach-o { return 1 }
263 som { return 1 }
264 unknown { return -1 }
265 default { return 0 }
266 }
267 }
268
269 ###############################
270 # proc check_weak_override_available { }
271 ###############################
272
273 # Like check_weak_available, but return 0 if weak symbol definitions
274 # cannot be overridden.
275
276 proc check_weak_override_available { } {
277 if { [istarget *-*-mingw*] } {
278 return 0
279 }
280 return [check_weak_available]
281 }
282
283 ###############################
284 # proc check_visibility_available { what_kind }
285 ###############################
286
287 # The visibility attribute is only support in some object formats
288 # This proc returns 1 if it is supported, 0 if not.
289 # The argument is the kind of visibility, default/protected/hidden/internal.
290
291 proc check_visibility_available { what_kind } {
292 if [string match "" $what_kind] { set what_kind "hidden" }
293
294 return [check_no_compiler_messages visibility_available_$what_kind object "
295 void f() __attribute__((visibility(\"$what_kind\")));
296 void f() {}
297 "]
298 }
299
300 ###############################
301 # proc check_alias_available { }
302 ###############################
303
304 # Determine if the target toolchain supports the alias attribute.
305
306 # Returns 2 if the target supports aliases. Returns 1 if the target
307 # only supports weak aliased. Returns 0 if the target does not
308 # support aliases at all. Returns -1 if support for aliases could not
309 # be determined.
310
311 proc check_alias_available { } {
312 global alias_available_saved
313 global tool
314
315 if [info exists alias_available_saved] {
316 verbose "check_alias_available returning saved $alias_available_saved" 2
317 } else {
318 set src alias[pid].c
319 set obj alias[pid].o
320 verbose "check_alias_available compiling testfile $src" 2
321 set f [open $src "w"]
322 # Compile a small test program. The definition of "g" is
323 # necessary to keep the Solaris assembler from complaining
324 # about the program.
325 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
326 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
327 close $f
328 set lines [${tool}_target_compile $src $obj object ""]
329 file delete $src
330 remote_file build delete $obj
331
332 if [string match "" $lines] then {
333 # No error messages, everything is OK.
334 set alias_available_saved 2
335 } else {
336 if [regexp "alias definitions not supported" $lines] {
337 verbose "check_alias_available target does not support aliases" 2
338
339 set objformat [gcc_target_object_format]
340
341 if { $objformat == "elf" } {
342 verbose "check_alias_available but target uses ELF format, so it ought to" 2
343 set alias_available_saved -1
344 } else {
345 set alias_available_saved 0
346 }
347 } else {
348 if [regexp "only weak aliases are supported" $lines] {
349 verbose "check_alias_available target supports only weak aliases" 2
350 set alias_available_saved 1
351 } else {
352 set alias_available_saved -1
353 }
354 }
355 }
356
357 verbose "check_alias_available returning $alias_available_saved" 2
358 }
359
360 return $alias_available_saved
361 }
362
363 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
364
365 proc check_effective_target_alias { } {
366 if { [check_alias_available] < 2 } {
367 return 0
368 } else {
369 return 1
370 }
371 }
372
373 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
374
375 proc check_ifunc_available { } {
376 return [check_no_compiler_messages ifunc_available object {
377 #ifdef __cplusplus
378 extern "C"
379 #endif
380 void g() {}
381 void f() __attribute__((ifunc("g")));
382 }]
383 }
384
385 # Returns true if --gc-sections is supported on the target.
386
387 proc check_gc_sections_available { } {
388 global gc_sections_available_saved
389 global tool
390
391 if {![info exists gc_sections_available_saved]} {
392 # Some targets don't support gc-sections despite whatever's
393 # advertised by ld's options.
394 if { [istarget alpha*-*-*]
395 || [istarget ia64-*-*] } {
396 set gc_sections_available_saved 0
397 return 0
398 }
399
400 # elf2flt uses -q (--emit-relocs), which is incompatible with
401 # --gc-sections.
402 if { [board_info target exists ldflags]
403 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
404 set gc_sections_available_saved 0
405 return 0
406 }
407
408 # VxWorks kernel modules are relocatable objects linked with -r,
409 # while RTP executables are linked with -q (--emit-relocs).
410 # Both of these options are incompatible with --gc-sections.
411 if { [istarget *-*-vxworks*] } {
412 set gc_sections_available_saved 0
413 return 0
414 }
415
416 # Check if the ld used by gcc supports --gc-sections.
417 set gcc_spec [${tool}_target_compile "-dumpspecs" "" "none" ""]
418 regsub ".*\n\\*linker:\[ \t\]*\n(\[^ \t\n\]*).*" "$gcc_spec" {\1} linker
419 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=$linker" "" "none" ""] 0]
420 set ld_output [remote_exec host "$gcc_ld" "--help"]
421 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
422 set gc_sections_available_saved 1
423 } else {
424 set gc_sections_available_saved 0
425 }
426 }
427 return $gc_sections_available_saved
428 }
429
430 # Return 1 if according to target_info struct and explicit target list
431 # target is supposed to support trampolines.
432
433 proc check_effective_target_trampolines { } {
434 if [target_info exists no_trampolines] {
435 return 0
436 }
437 if { [istarget avr-*-*]
438 || [istarget msp430-*-*]
439 || [istarget hppa2.0w-hp-hpux11.23]
440 || [istarget hppa64-hp-hpux11.23] } {
441 return 0;
442 }
443 return 1
444 }
445
446 # Return 1 if according to target_info struct and explicit target list
447 # target is supposed to keep null pointer checks. This could be due to
448 # use of option fno-delete-null-pointer-checks or hardwired in target.
449
450 proc check_effective_target_keeps_null_pointer_checks { } {
451 if [target_info exists keeps_null_pointer_checks] {
452 return 1
453 }
454 if { [istarget avr-*-*] } {
455 return 1;
456 }
457 return 0
458 }
459
460 # Return true if profiling is supported on the target.
461
462 proc check_profiling_available { test_what } {
463 global profiling_available_saved
464
465 verbose "Profiling argument is <$test_what>" 1
466
467 # These conditions depend on the argument so examine them before
468 # looking at the cache variable.
469
470 # Tree profiling requires TLS runtime support.
471 if { $test_what == "-fprofile-generate" } {
472 if { ![check_effective_target_tls_runtime] } {
473 return 0
474 }
475 }
476
477 # Support for -p on solaris2 relies on mcrt1.o which comes with the
478 # vendor compiler. We cannot reliably predict the directory where the
479 # vendor compiler (and thus mcrt1.o) is installed so we can't
480 # necessarily find mcrt1.o even if we have it.
481 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
482 return 0
483 }
484
485 # We don't yet support profiling for MIPS16.
486 if { [istarget mips*-*-*]
487 && ![check_effective_target_nomips16]
488 && ($test_what == "-p" || $test_what == "-pg") } {
489 return 0
490 }
491
492 # MinGW does not support -p.
493 if { [istarget *-*-mingw*] && $test_what == "-p" } {
494 return 0
495 }
496
497 # cygwin does not support -p.
498 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
499 return 0
500 }
501
502 # uClibc does not have gcrt1.o.
503 if { [check_effective_target_uclibc]
504 && ($test_what == "-p" || $test_what == "-pg") } {
505 return 0
506 }
507
508 # Now examine the cache variable.
509 if {![info exists profiling_available_saved]} {
510 # Some targets don't have any implementation of __bb_init_func or are
511 # missing other needed machinery.
512 if { [istarget aarch64*-*-elf]
513 || [istarget am3*-*-linux*]
514 || [istarget arm*-*-eabi*]
515 || [istarget arm*-*-elf]
516 || [istarget arm*-*-symbianelf*]
517 || [istarget avr-*-*]
518 || [istarget bfin-*-*]
519 || [istarget cris-*-*]
520 || [istarget crisv32-*-*]
521 || [istarget fido-*-elf]
522 || [istarget h8300-*-*]
523 || [istarget lm32-*-*]
524 || [istarget m32c-*-elf]
525 || [istarget m68k-*-elf]
526 || [istarget m68k-*-uclinux*]
527 || [istarget mep-*-elf]
528 || [istarget mips*-*-elf*]
529 || [istarget mmix-*-*]
530 || [istarget mn10300-*-elf*]
531 || [istarget moxie-*-elf*]
532 || [istarget msp430-*-*]
533 || [istarget nds32*-*-elf]
534 || [istarget nios2-*-elf]
535 || [istarget picochip-*-*]
536 || [istarget powerpc-*-eabi*]
537 || [istarget powerpc-*-elf]
538 || [istarget rx-*-*]
539 || [istarget tic6x-*-elf]
540 || [istarget xstormy16-*]
541 || [istarget xtensa*-*-elf]
542 || [istarget *-*-rtems*]
543 || [istarget *-*-vxworks*] } {
544 set profiling_available_saved 0
545 } else {
546 set profiling_available_saved 1
547 }
548 }
549
550 return $profiling_available_saved
551 }
552
553 # Check to see if a target is "freestanding". This is as per the definition
554 # in Section 4 of C99 standard. Effectively, it is a target which supports no
555 # extra headers or libraries other than what is considered essential.
556 proc check_effective_target_freestanding { } {
557 if { [istarget picochip-*-*] } then {
558 return 1
559 } else {
560 return 0
561 }
562 }
563
564 # Return 1 if target has packed layout of structure members by
565 # default, 0 otherwise. Note that this is slightly different than
566 # whether the target has "natural alignment": both attributes may be
567 # false.
568
569 proc check_effective_target_default_packed { } {
570 return [check_no_compiler_messages default_packed assembly {
571 struct x { char a; long b; } c;
572 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
573 }]
574 }
575
576 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
577 # documentation, where the test also comes from.
578
579 proc check_effective_target_pcc_bitfield_type_matters { } {
580 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
581 # bitfields, but let's stick to the example code from the docs.
582 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
583 struct foo1 { char x; char :0; char y; };
584 struct foo2 { char x; int :0; char y; };
585 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
586 }]
587 }
588
589 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
590
591 proc add_options_for_tls { flags } {
592 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
593 # libthread, so always pass -pthread for native TLS. Same for AIX.
594 # Need to duplicate native TLS check from
595 # check_effective_target_tls_native to avoid recursion.
596 if { ([istarget powerpc-ibm-aix*]) &&
597 [check_no_messages_and_pattern tls_native "!emutls" assembly {
598 __thread int i;
599 int f (void) { return i; }
600 void g (int j) { i = j; }
601 }] } {
602 return "$flags -pthread"
603 }
604 return $flags
605 }
606
607 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
608
609 proc check_effective_target_tls {} {
610 return [check_no_compiler_messages tls assembly {
611 __thread int i;
612 int f (void) { return i; }
613 void g (int j) { i = j; }
614 }]
615 }
616
617 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
618
619 proc check_effective_target_tls_native {} {
620 # VxWorks uses emulated TLS machinery, but with non-standard helper
621 # functions, so we fail to automatically detect it.
622 if { [istarget *-*-vxworks*] } {
623 return 0
624 }
625
626 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
627 __thread int i;
628 int f (void) { return i; }
629 void g (int j) { i = j; }
630 }]
631 }
632
633 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
634
635 proc check_effective_target_tls_emulated {} {
636 # VxWorks uses emulated TLS machinery, but with non-standard helper
637 # functions, so we fail to automatically detect it.
638 if { [istarget *-*-vxworks*] } {
639 return 1
640 }
641
642 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
643 __thread int i;
644 int f (void) { return i; }
645 void g (int j) { i = j; }
646 }]
647 }
648
649 # Return 1 if TLS executables can run correctly, 0 otherwise.
650
651 proc check_effective_target_tls_runtime {} {
652 # MSP430 runtime does not have TLS support, but just
653 # running the test below is insufficient to show this.
654 if { [istarget msp430-*-*] } {
655 return 0
656 }
657 return [check_runtime tls_runtime {
658 __thread int thr = 0;
659 int main (void) { return thr; }
660 } [add_options_for_tls ""]]
661 }
662
663 # Return 1 if atomic compare-and-swap is supported on 'int'
664
665 proc check_effective_target_cas_char {} {
666 return [check_no_compiler_messages cas_char assembly {
667 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
668 #error unsupported
669 #endif
670 } ""]
671 }
672
673 proc check_effective_target_cas_int {} {
674 return [check_no_compiler_messages cas_int assembly {
675 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
676 /* ok */
677 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
678 /* ok */
679 #else
680 #error unsupported
681 #endif
682 } ""]
683 }
684
685 # Return 1 if -ffunction-sections is supported, 0 otherwise.
686
687 proc check_effective_target_function_sections {} {
688 # Darwin has its own scheme and silently accepts -ffunction-sections.
689 if { [istarget *-*-darwin*] } {
690 return 0
691 }
692
693 return [check_no_compiler_messages functionsections assembly {
694 void foo (void) { }
695 } "-ffunction-sections"]
696 }
697
698 # Return 1 if instruction scheduling is available, 0 otherwise.
699
700 proc check_effective_target_scheduling {} {
701 return [check_no_compiler_messages scheduling object {
702 void foo (void) { }
703 } "-fschedule-insns"]
704 }
705
706 # Return 1 if trapping arithmetic is available, 0 otherwise.
707
708 proc check_effective_target_trapping {} {
709 return [check_no_compiler_messages scheduling object {
710 add (int a, int b) { return a + b; }
711 } "-ftrapv"]
712 }
713
714 # Return 1 if compilation with -fgraphite is error-free for trivial
715 # code, 0 otherwise.
716
717 proc check_effective_target_fgraphite {} {
718 return [check_no_compiler_messages fgraphite object {
719 void foo (void) { }
720 } "-O1 -fgraphite"]
721 }
722
723 # Return 1 if compilation with -fopenmp is error-free for trivial
724 # code, 0 otherwise.
725
726 proc check_effective_target_fopenmp {} {
727 return [check_no_compiler_messages fopenmp object {
728 void foo (void) { }
729 } "-fopenmp"]
730 }
731
732 # Return 1 if compilation with -fgnu-tm is error-free for trivial
733 # code, 0 otherwise.
734
735 proc check_effective_target_fgnu_tm {} {
736 return [check_no_compiler_messages fgnu_tm object {
737 void foo (void) { }
738 } "-fgnu-tm"]
739 }
740
741 # Return 1 if the target supports mmap, 0 otherwise.
742
743 proc check_effective_target_mmap {} {
744 return [check_function_available "mmap"]
745 }
746
747 # Return 1 if the target supports dlopen, 0 otherwise.
748 proc check_effective_target_dlopen {} {
749 return [check_no_compiler_messages dlopen executable {
750 #include <dlfcn.h>
751 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
752 } [add_options_for_dlopen ""]]
753 }
754
755 proc add_options_for_dlopen { flags } {
756 return "$flags -ldl"
757 }
758
759 # Return 1 if the target supports clone, 0 otherwise.
760 proc check_effective_target_clone {} {
761 return [check_function_available "clone"]
762 }
763
764 # Return 1 if the target supports setrlimit, 0 otherwise.
765 proc check_effective_target_setrlimit {} {
766 # Darwin has non-posix compliant RLIMIT_AS
767 if { [istarget *-*-darwin*] } {
768 return 0
769 }
770 return [check_function_available "setrlimit"]
771 }
772
773 # Return 1 if the target supports swapcontext, 0 otherwise.
774 proc check_effective_target_swapcontext {} {
775 return [check_no_compiler_messages swapcontext executable {
776 #include <ucontext.h>
777 int main (void)
778 {
779 ucontext_t orig_context,child_context;
780 if (swapcontext(&child_context, &orig_context) < 0) { }
781 }
782 }]
783 }
784
785 # Return 1 if compilation with -pthread is error-free for trivial
786 # code, 0 otherwise.
787
788 proc check_effective_target_pthread {} {
789 return [check_no_compiler_messages pthread object {
790 void foo (void) { }
791 } "-pthread"]
792 }
793
794 # Return 1 if compilation with -mpe-aligned-commons is error-free
795 # for trivial code, 0 otherwise.
796
797 proc check_effective_target_pe_aligned_commons {} {
798 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
799 return [check_no_compiler_messages pe_aligned_commons object {
800 int foo;
801 } "-mpe-aligned-commons"]
802 }
803 return 0
804 }
805
806 # Return 1 if the target supports -static
807 proc check_effective_target_static {} {
808 return [check_no_compiler_messages static executable {
809 int main (void) { return 0; }
810 } "-static"]
811 }
812
813 # Return 1 if the target supports -fstack-protector
814 proc check_effective_target_fstack_protector {} {
815 return [check_runtime fstack_protector {
816 int main (void) { return 0; }
817 } "-fstack-protector"]
818 }
819
820 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
821 # for trivial code, 0 otherwise.
822
823 proc check_effective_target_freorder {} {
824 return [check_no_compiler_messages freorder object {
825 void foo (void) { }
826 } "-freorder-blocks-and-partition"]
827 }
828
829 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
830 # emitted, 0 otherwise. Whether a shared library can actually be built is
831 # out of scope for this test.
832
833 proc check_effective_target_fpic { } {
834 # Note that M68K has a multilib that supports -fpic but not
835 # -fPIC, so we need to check both. We test with a program that
836 # requires GOT references.
837 foreach arg {fpic fPIC} {
838 if [check_no_compiler_messages $arg object {
839 extern int foo (void); extern int bar;
840 int baz (void) { return foo () + bar; }
841 } "-$arg"] {
842 return 1
843 }
844 }
845 return 0
846 }
847
848 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
849
850 proc check_effective_target_pie { } {
851 if { [istarget *-*-darwin\[912\]*]
852 || [istarget *-*-linux*]
853 || [istarget *-*-gnu*] } {
854 return 1;
855 }
856 return 0
857 }
858
859 # Return true if the target supports -mpaired-single (as used on MIPS).
860
861 proc check_effective_target_mpaired_single { } {
862 return [check_no_compiler_messages mpaired_single object {
863 void foo (void) { }
864 } "-mpaired-single"]
865 }
866
867 # Return true if the target has access to FPU instructions.
868
869 proc check_effective_target_hard_float { } {
870 if { [istarget mips*-*-*] } {
871 return [check_no_compiler_messages hard_float assembly {
872 #if (defined __mips_soft_float || defined __mips16)
873 #error FOO
874 #endif
875 }]
876 }
877
878 # This proc is actually checking the availabilty of FPU
879 # support for doubles, so on the RX we must fail if the
880 # 64-bit double multilib has been selected.
881 if { [istarget rx-*-*] } {
882 return 0
883 # return [check_no_compiler_messages hard_float assembly {
884 #if defined __RX_64_BIT_DOUBLES__
885 #error FOO
886 #endif
887 # }]
888 }
889
890 # The generic test equates hard_float with "no call for adding doubles".
891 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
892 double a (double b, double c) { return b + c; }
893 }]
894 }
895
896 # Return true if the target is a 64-bit MIPS target.
897
898 proc check_effective_target_mips64 { } {
899 return [check_no_compiler_messages mips64 assembly {
900 #ifndef __mips64
901 #error FOO
902 #endif
903 }]
904 }
905
906 # Return true if the target is a MIPS target that does not produce
907 # MIPS16 code.
908
909 proc check_effective_target_nomips16 { } {
910 return [check_no_compiler_messages nomips16 object {
911 #ifndef __mips
912 #error FOO
913 #else
914 /* A cheap way of testing for -mflip-mips16. */
915 void foo (void) { asm ("addiu $20,$20,1"); }
916 void bar (void) { asm ("addiu $20,$20,1"); }
917 #endif
918 }]
919 }
920
921 # Add the options needed for MIPS16 function attributes. At the moment,
922 # we don't support MIPS16 PIC.
923
924 proc add_options_for_mips16_attribute { flags } {
925 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
926 }
927
928 # Return true if we can force a mode that allows MIPS16 code generation.
929 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
930 # for o32 and o64.
931
932 proc check_effective_target_mips16_attribute { } {
933 return [check_no_compiler_messages mips16_attribute assembly {
934 #ifdef PIC
935 #error FOO
936 #endif
937 #if defined __mips_hard_float \
938 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
939 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
940 #error FOO
941 #endif
942 } [add_options_for_mips16_attribute ""]]
943 }
944
945 # Return 1 if the target supports long double larger than double when
946 # using the new ABI, 0 otherwise.
947
948 proc check_effective_target_mips_newabi_large_long_double { } {
949 return [check_no_compiler_messages mips_newabi_large_long_double object {
950 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
951 } "-mabi=64"]
952 }
953
954 # Return true if the target is a MIPS target that has access
955 # to the LL and SC instructions.
956
957 proc check_effective_target_mips_llsc { } {
958 if { ![istarget mips*-*-*] } {
959 return 0
960 }
961 # Assume that these instructions are always implemented for
962 # non-elf* targets, via emulation if necessary.
963 if { ![istarget *-*-elf*] } {
964 return 1
965 }
966 # Otherwise assume LL/SC support for everything but MIPS I.
967 return [check_no_compiler_messages mips_llsc assembly {
968 #if __mips == 1
969 #error FOO
970 #endif
971 }]
972 }
973
974 # Return true if the target is a MIPS target that uses in-place relocations.
975
976 proc check_effective_target_mips_rel { } {
977 if { ![istarget mips*-*-*] } {
978 return 0
979 }
980 return [check_no_compiler_messages mips_rel object {
981 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
982 || (defined _ABI64 && _MIPS_SIM == _ABI64)
983 #error FOO
984 #endif
985 }]
986 }
987
988 # Return true if the target is a MIPS target that uses the EABI.
989
990 proc check_effective_target_mips_eabi { } {
991 if { ![istarget mips*-*-*] } {
992 return 0
993 }
994 return [check_no_compiler_messages mips_eabi object {
995 #ifndef __mips_eabi
996 #error FOO
997 #endif
998 }]
999 }
1000
1001 # Return 1 if the current multilib does not generate PIC by default.
1002
1003 proc check_effective_target_nonpic { } {
1004 return [check_no_compiler_messages nonpic assembly {
1005 #if __PIC__
1006 #error FOO
1007 #endif
1008 }]
1009 }
1010
1011 # Return 1 if the target does not use a status wrapper.
1012
1013 proc check_effective_target_unwrapped { } {
1014 if { [target_info needs_status_wrapper] != "" \
1015 && [target_info needs_status_wrapper] != "0" } {
1016 return 0
1017 }
1018 return 1
1019 }
1020
1021 # Return true if iconv is supported on the target. In particular IBM1047.
1022
1023 proc check_iconv_available { test_what } {
1024 global libiconv
1025
1026 # If the tool configuration file has not set libiconv, try "-liconv"
1027 if { ![info exists libiconv] } {
1028 set libiconv "-liconv"
1029 }
1030 set test_what [lindex $test_what 1]
1031 return [check_runtime_nocache $test_what [subst {
1032 #include <iconv.h>
1033 int main (void)
1034 {
1035 iconv_t cd;
1036
1037 cd = iconv_open ("$test_what", "UTF-8");
1038 if (cd == (iconv_t) -1)
1039 return 1;
1040 return 0;
1041 }
1042 }] $libiconv]
1043 }
1044
1045 # Return true if Cilk Library is supported on the target.
1046 proc check_libcilkrts_available { } {
1047 return [ check_no_compiler_messages_nocache libcilkrts_available executable {
1048 #ifdef __cplusplus
1049 extern "C"
1050 #endif
1051 int __cilkrts_set_param (const char *, const char *);
1052 int main (void) {
1053 int x = __cilkrts_set_param ("nworkers", "0");
1054 return x;
1055 }
1056 } "-fcilkplus -lcilkrts" ]
1057 }
1058
1059 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1060
1061 proc check_ascii_locale_available { } {
1062 return 1
1063 }
1064
1065 # Return true if named sections are supported on this target.
1066
1067 proc check_named_sections_available { } {
1068 return [check_no_compiler_messages named_sections assembly {
1069 int __attribute__ ((section("whatever"))) foo;
1070 }]
1071 }
1072
1073 # Return true if the "naked" function attribute is supported on this target.
1074
1075 proc check_effective_target_naked_functions { } {
1076 return [check_no_compiler_messages naked_functions assembly {
1077 void f() __attribute__((naked));
1078 }]
1079 }
1080
1081 # Return 1 if the target supports Fortran real kinds larger than real(8),
1082 # 0 otherwise.
1083 #
1084 # When the target name changes, replace the cached result.
1085
1086 proc check_effective_target_fortran_large_real { } {
1087 return [check_no_compiler_messages fortran_large_real executable {
1088 ! Fortran
1089 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1090 real(kind=k) :: x
1091 x = cos (x)
1092 end
1093 }]
1094 }
1095
1096 # Return 1 if the target supports Fortran real kind real(16),
1097 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1098 # this checks for Real(16) only; the other returned real(10) if
1099 # both real(10) and real(16) are available.
1100 #
1101 # When the target name changes, replace the cached result.
1102
1103 proc check_effective_target_fortran_real_16 { } {
1104 return [check_no_compiler_messages fortran_real_16 executable {
1105 ! Fortran
1106 real(kind=16) :: x
1107 x = cos (x)
1108 end
1109 }]
1110 }
1111
1112
1113 # Return 1 if the target supports SQRT for the largest floating-point
1114 # type. (Some targets lack the libm support for this FP type.)
1115 # On most targets, this check effectively checks either whether sqrtl is
1116 # available or on __float128 systems whether libquadmath is installed,
1117 # which provides sqrtq.
1118 #
1119 # When the target name changes, replace the cached result.
1120
1121 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1122 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1123 ! Fortran
1124 use iso_fortran_env, only: real_kinds
1125 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1126 real(kind=maxFP), volatile :: x
1127 x = 2.0_maxFP
1128 x = sqrt (x)
1129 end
1130 }]
1131 }
1132
1133
1134 # Return 1 if the target supports Fortran integer kinds larger than
1135 # integer(8), 0 otherwise.
1136 #
1137 # When the target name changes, replace the cached result.
1138
1139 proc check_effective_target_fortran_large_int { } {
1140 return [check_no_compiler_messages fortran_large_int executable {
1141 ! Fortran
1142 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1143 integer(kind=k) :: i
1144 end
1145 }]
1146 }
1147
1148 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1149 #
1150 # When the target name changes, replace the cached result.
1151
1152 proc check_effective_target_fortran_integer_16 { } {
1153 return [check_no_compiler_messages fortran_integer_16 executable {
1154 ! Fortran
1155 integer(16) :: i
1156 end
1157 }]
1158 }
1159
1160 # Return 1 if we can statically link libgfortran, 0 otherwise.
1161 #
1162 # When the target name changes, replace the cached result.
1163
1164 proc check_effective_target_static_libgfortran { } {
1165 return [check_no_compiler_messages static_libgfortran executable {
1166 ! Fortran
1167 print *, 'test'
1168 end
1169 } "-static"]
1170 }
1171
1172 # Return 1 if cilk-plus is supported by the target, 0 otherwise.
1173
1174 proc check_effective_target_cilkplus { } {
1175 # Skip cilk-plus tests on int16 and size16 targets for now.
1176 # The cilk-plus tests are not generic enough to cover these
1177 # cases and would throw hundreds of FAILs.
1178 if { [check_effective_target_int16]
1179 || ![check_effective_target_size32plus] } {
1180 return 0;
1181 }
1182
1183 # Skip AVR, its RAM is too small and too many tests would fail.
1184 if { [istarget avr-*-*] } {
1185 return 0;
1186 }
1187 return 1
1188 }
1189
1190 proc check_linker_plugin_available { } {
1191 return [check_no_compiler_messages_nocache linker_plugin executable {
1192 int main() { return 0; }
1193 } "-flto -fuse-linker-plugin"]
1194 }
1195
1196 # Return 1 if the target supports executing 750CL paired-single instructions, 0
1197 # otherwise. Cache the result.
1198
1199 proc check_750cl_hw_available { } {
1200 return [check_cached_effective_target 750cl_hw_available {
1201 # If this is not the right target then we can skip the test.
1202 if { ![istarget powerpc-*paired*] } {
1203 expr 0
1204 } else {
1205 check_runtime_nocache 750cl_hw_available {
1206 int main()
1207 {
1208 #ifdef __MACH__
1209 asm volatile ("ps_mul v0,v0,v0");
1210 #else
1211 asm volatile ("ps_mul 0,0,0");
1212 #endif
1213 return 0;
1214 }
1215 } "-mpaired"
1216 }
1217 }]
1218 }
1219
1220 # Return 1 if the target OS supports running SSE executables, 0
1221 # otherwise. Cache the result.
1222
1223 proc check_sse_os_support_available { } {
1224 return [check_cached_effective_target sse_os_support_available {
1225 # If this is not the right target then we can skip the test.
1226 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1227 expr 0
1228 } elseif { [istarget i?86-*-solaris2*] } {
1229 # The Solaris 2 kernel doesn't save and restore SSE registers
1230 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1231 check_runtime_nocache sse_os_support_available {
1232 int main ()
1233 {
1234 asm volatile ("movaps %xmm0,%xmm0");
1235 return 0;
1236 }
1237 } "-msse"
1238 } else {
1239 expr 1
1240 }
1241 }]
1242 }
1243
1244 # Return 1 if the target OS supports running AVX executables, 0
1245 # otherwise. Cache the result.
1246
1247 proc check_avx_os_support_available { } {
1248 return [check_cached_effective_target avx_os_support_available {
1249 # If this is not the right target then we can skip the test.
1250 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1251 expr 0
1252 } else {
1253 # Check that OS has AVX and SSE saving enabled.
1254 check_runtime_nocache avx_os_support_available {
1255 int main ()
1256 {
1257 unsigned int eax, edx;
1258
1259 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1260 return (eax & 6) != 6;
1261 }
1262 } ""
1263 }
1264 }]
1265 }
1266
1267 # Return 1 if the target supports executing SSE instructions, 0
1268 # otherwise. Cache the result.
1269
1270 proc check_sse_hw_available { } {
1271 return [check_cached_effective_target sse_hw_available {
1272 # If this is not the right target then we can skip the test.
1273 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1274 expr 0
1275 } else {
1276 check_runtime_nocache sse_hw_available {
1277 #include "cpuid.h"
1278 int main ()
1279 {
1280 unsigned int eax, ebx, ecx, edx;
1281 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1282 return !(edx & bit_SSE);
1283 return 1;
1284 }
1285 } ""
1286 }
1287 }]
1288 }
1289
1290 # Return 1 if the target supports executing SSE2 instructions, 0
1291 # otherwise. Cache the result.
1292
1293 proc check_sse2_hw_available { } {
1294 return [check_cached_effective_target sse2_hw_available {
1295 # If this is not the right target then we can skip the test.
1296 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1297 expr 0
1298 } else {
1299 check_runtime_nocache sse2_hw_available {
1300 #include "cpuid.h"
1301 int main ()
1302 {
1303 unsigned int eax, ebx, ecx, edx;
1304 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1305 return !(edx & bit_SSE2);
1306 return 1;
1307 }
1308 } ""
1309 }
1310 }]
1311 }
1312
1313 # Return 1 if the target supports executing AVX instructions, 0
1314 # otherwise. Cache the result.
1315
1316 proc check_avx_hw_available { } {
1317 return [check_cached_effective_target avx_hw_available {
1318 # If this is not the right target then we can skip the test.
1319 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1320 expr 0
1321 } else {
1322 check_runtime_nocache avx_hw_available {
1323 #include "cpuid.h"
1324 int main ()
1325 {
1326 unsigned int eax, ebx, ecx, edx;
1327 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1328 return ((ecx & (bit_AVX | bit_OSXSAVE))
1329 != (bit_AVX | bit_OSXSAVE));
1330 return 1;
1331 }
1332 } ""
1333 }
1334 }]
1335 }
1336
1337 # Return 1 if the target supports running SSE executables, 0 otherwise.
1338
1339 proc check_effective_target_sse_runtime { } {
1340 if { [check_effective_target_sse]
1341 && [check_sse_hw_available]
1342 && [check_sse_os_support_available] } {
1343 return 1
1344 }
1345 return 0
1346 }
1347
1348 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1349
1350 proc check_effective_target_sse2_runtime { } {
1351 if { [check_effective_target_sse2]
1352 && [check_sse2_hw_available]
1353 && [check_sse_os_support_available] } {
1354 return 1
1355 }
1356 return 0
1357 }
1358
1359 # Return 1 if the target supports running AVX executables, 0 otherwise.
1360
1361 proc check_effective_target_avx_runtime { } {
1362 if { [check_effective_target_avx]
1363 && [check_avx_hw_available]
1364 && [check_avx_os_support_available] } {
1365 return 1
1366 }
1367 return 0
1368 }
1369
1370 # Return 1 if the target supports executing power8 vector instructions, 0
1371 # otherwise. Cache the result.
1372
1373 proc check_p8vector_hw_available { } {
1374 return [check_cached_effective_target p8vector_hw_available {
1375 # Some simulators are known to not support VSX/power8 instructions.
1376 # For now, disable on Darwin
1377 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1378 expr 0
1379 } else {
1380 set options "-mpower8-vector"
1381 check_runtime_nocache p8vector_hw_available {
1382 int main()
1383 {
1384 #ifdef __MACH__
1385 asm volatile ("xxlorc vs0,vs0,vs0");
1386 #else
1387 asm volatile ("xxlorc 0,0,0");
1388 #endif
1389 return 0;
1390 }
1391 } $options
1392 }
1393 }]
1394 }
1395
1396 # Return 1 if the target supports executing VSX instructions, 0
1397 # otherwise. Cache the result.
1398
1399 proc check_vsx_hw_available { } {
1400 return [check_cached_effective_target vsx_hw_available {
1401 # Some simulators are known to not support VSX instructions.
1402 # For now, disable on Darwin
1403 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1404 expr 0
1405 } else {
1406 set options "-mvsx"
1407 check_runtime_nocache vsx_hw_available {
1408 int main()
1409 {
1410 #ifdef __MACH__
1411 asm volatile ("xxlor vs0,vs0,vs0");
1412 #else
1413 asm volatile ("xxlor 0,0,0");
1414 #endif
1415 return 0;
1416 }
1417 } $options
1418 }
1419 }]
1420 }
1421
1422 # Return 1 if the target supports executing AltiVec instructions, 0
1423 # otherwise. Cache the result.
1424
1425 proc check_vmx_hw_available { } {
1426 return [check_cached_effective_target vmx_hw_available {
1427 # Some simulators are known to not support VMX instructions.
1428 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
1429 expr 0
1430 } else {
1431 # Most targets don't require special flags for this test case, but
1432 # Darwin does. Just to be sure, make sure VSX is not enabled for
1433 # the altivec tests.
1434 if { [istarget *-*-darwin*]
1435 || [istarget *-*-aix*] } {
1436 set options "-maltivec -mno-vsx"
1437 } else {
1438 set options "-mno-vsx"
1439 }
1440 check_runtime_nocache vmx_hw_available {
1441 int main()
1442 {
1443 #ifdef __MACH__
1444 asm volatile ("vor v0,v0,v0");
1445 #else
1446 asm volatile ("vor 0,0,0");
1447 #endif
1448 return 0;
1449 }
1450 } $options
1451 }
1452 }]
1453 }
1454
1455 proc check_ppc_recip_hw_available { } {
1456 return [check_cached_effective_target ppc_recip_hw_available {
1457 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
1458 # For now, disable on Darwin
1459 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
1460 expr 0
1461 } else {
1462 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
1463 check_runtime_nocache ppc_recip_hw_available {
1464 volatile double d_recip, d_rsqrt, d_four = 4.0;
1465 volatile float f_recip, f_rsqrt, f_four = 4.0f;
1466 int main()
1467 {
1468 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
1469 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
1470 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
1471 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
1472 return 0;
1473 }
1474 } $options
1475 }
1476 }]
1477 }
1478
1479 # Return 1 if the target supports executing AltiVec and Cell PPU
1480 # instructions, 0 otherwise. Cache the result.
1481
1482 proc check_effective_target_cell_hw { } {
1483 return [check_cached_effective_target cell_hw_available {
1484 # Some simulators are known to not support VMX and PPU instructions.
1485 if { [istarget powerpc-*-eabi*] } {
1486 expr 0
1487 } else {
1488 # Most targets don't require special flags for this test
1489 # case, but Darwin and AIX do.
1490 if { [istarget *-*-darwin*]
1491 || [istarget *-*-aix*] } {
1492 set options "-maltivec -mcpu=cell"
1493 } else {
1494 set options "-mcpu=cell"
1495 }
1496 check_runtime_nocache cell_hw_available {
1497 int main()
1498 {
1499 #ifdef __MACH__
1500 asm volatile ("vor v0,v0,v0");
1501 asm volatile ("lvlx v0,r0,r0");
1502 #else
1503 asm volatile ("vor 0,0,0");
1504 asm volatile ("lvlx 0,0,0");
1505 #endif
1506 return 0;
1507 }
1508 } $options
1509 }
1510 }]
1511 }
1512
1513 # Return 1 if the target supports executing 64-bit instructions, 0
1514 # otherwise. Cache the result.
1515
1516 proc check_effective_target_powerpc64 { } {
1517 global powerpc64_available_saved
1518 global tool
1519
1520 if [info exists powerpc64_available_saved] {
1521 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
1522 } else {
1523 set powerpc64_available_saved 0
1524
1525 # Some simulators are known to not support powerpc64 instructions.
1526 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
1527 verbose "check_effective_target_powerpc64 returning 0" 2
1528 return $powerpc64_available_saved
1529 }
1530
1531 # Set up, compile, and execute a test program containing a 64-bit
1532 # instruction. Include the current process ID in the file
1533 # names to prevent conflicts with invocations for multiple
1534 # testsuites.
1535 set src ppc[pid].c
1536 set exe ppc[pid].x
1537
1538 set f [open $src "w"]
1539 puts $f "int main() {"
1540 puts $f "#ifdef __MACH__"
1541 puts $f " asm volatile (\"extsw r0,r0\");"
1542 puts $f "#else"
1543 puts $f " asm volatile (\"extsw 0,0\");"
1544 puts $f "#endif"
1545 puts $f " return 0; }"
1546 close $f
1547
1548 set opts "additional_flags=-mcpu=G5"
1549
1550 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
1551 set lines [${tool}_target_compile $src $exe executable "$opts"]
1552 file delete $src
1553
1554 if [string match "" $lines] then {
1555 # No error message, compilation succeeded.
1556 set result [${tool}_load "./$exe" "" ""]
1557 set status [lindex $result 0]
1558 remote_file build delete $exe
1559 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
1560
1561 if { $status == "pass" } then {
1562 set powerpc64_available_saved 1
1563 }
1564 } else {
1565 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
1566 }
1567 }
1568
1569 return $powerpc64_available_saved
1570 }
1571
1572 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
1573 # complex float arguments. This affects gfortran tests that call cabsf
1574 # in libm built by an earlier compiler. Return 1 if libm uses the same
1575 # argument passing as the compiler under test, 0 otherwise.
1576 #
1577 # When the target name changes, replace the cached result.
1578
1579 proc check_effective_target_broken_cplxf_arg { } {
1580 return [check_cached_effective_target broken_cplxf_arg {
1581 # Skip the work for targets known not to be affected.
1582 if { ![istarget powerpc64-*-linux*] } {
1583 expr 0
1584 } elseif { ![is-effective-target lp64] } {
1585 expr 0
1586 } else {
1587 check_runtime_nocache broken_cplxf_arg {
1588 #include <complex.h>
1589 extern void abort (void);
1590 float fabsf (float);
1591 float cabsf (_Complex float);
1592 int main ()
1593 {
1594 _Complex float cf;
1595 float f;
1596 cf = 3 + 4.0fi;
1597 f = cabsf (cf);
1598 if (fabsf (f - 5.0) > 0.0001)
1599 abort ();
1600 return 0;
1601 }
1602 } "-lm"
1603 }
1604 }]
1605 }
1606
1607 # Return 1 is this is a TI C6X target supporting C67X instructions
1608 proc check_effective_target_ti_c67x { } {
1609 return [check_no_compiler_messages ti_c67x assembly {
1610 #if !defined(_TMS320C6700)
1611 #error FOO
1612 #endif
1613 }]
1614 }
1615
1616 # Return 1 is this is a TI C6X target supporting C64X+ instructions
1617 proc check_effective_target_ti_c64xp { } {
1618 return [check_no_compiler_messages ti_c64xp assembly {
1619 #if !defined(_TMS320C6400_PLUS)
1620 #error FOO
1621 #endif
1622 }]
1623 }
1624
1625
1626 proc check_alpha_max_hw_available { } {
1627 return [check_runtime alpha_max_hw_available {
1628 int main() { return __builtin_alpha_amask(1<<8) != 0; }
1629 }]
1630 }
1631
1632 # Returns true iff the FUNCTION is available on the target system.
1633 # (This is essentially a Tcl implementation of Autoconf's
1634 # AC_CHECK_FUNC.)
1635
1636 proc check_function_available { function } {
1637 return [check_no_compiler_messages ${function}_available \
1638 executable [subst {
1639 #ifdef __cplusplus
1640 extern "C"
1641 #endif
1642 char $function ();
1643 int main () { $function (); }
1644 }] "-fno-builtin" ]
1645 }
1646
1647 # Returns true iff "fork" is available on the target system.
1648
1649 proc check_fork_available {} {
1650 return [check_function_available "fork"]
1651 }
1652
1653 # Returns true iff "mkfifo" is available on the target system.
1654
1655 proc check_mkfifo_available {} {
1656 if { [istarget *-*-cygwin*] } {
1657 # Cygwin has mkfifo, but support is incomplete.
1658 return 0
1659 }
1660
1661 return [check_function_available "mkfifo"]
1662 }
1663
1664 # Returns true iff "__cxa_atexit" is used on the target system.
1665
1666 proc check_cxa_atexit_available { } {
1667 return [check_cached_effective_target cxa_atexit_available {
1668 if { [istarget hppa*-*-hpux10*] } {
1669 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
1670 expr 0
1671 } elseif { [istarget *-*-vxworks] } {
1672 # vxworks doesn't have __cxa_atexit but subsequent test passes.
1673 expr 0
1674 } else {
1675 check_runtime_nocache cxa_atexit_available {
1676 // C++
1677 #include <stdlib.h>
1678 static unsigned int count;
1679 struct X
1680 {
1681 X() { count = 1; }
1682 ~X()
1683 {
1684 if (count != 3)
1685 exit(1);
1686 count = 4;
1687 }
1688 };
1689 void f()
1690 {
1691 static X x;
1692 }
1693 struct Y
1694 {
1695 Y() { f(); count = 2; }
1696 ~Y()
1697 {
1698 if (count != 2)
1699 exit(1);
1700 count = 3;
1701 }
1702 };
1703 Y y;
1704 int main() { return 0; }
1705 }
1706 }
1707 }]
1708 }
1709
1710 proc check_effective_target_objc2 { } {
1711 return [check_no_compiler_messages objc2 object {
1712 #ifdef __OBJC2__
1713 int dummy[1];
1714 #else
1715 #error
1716 #endif
1717 }]
1718 }
1719
1720 proc check_effective_target_next_runtime { } {
1721 return [check_no_compiler_messages objc2 object {
1722 #ifdef __NEXT_RUNTIME__
1723 int dummy[1];
1724 #else
1725 #error
1726 #endif
1727 }]
1728 }
1729
1730 # Return 1 if we're generating 32-bit code using default options, 0
1731 # otherwise.
1732
1733 proc check_effective_target_ilp32 { } {
1734 return [check_no_compiler_messages ilp32 object {
1735 int dummy[sizeof (int) == 4
1736 && sizeof (void *) == 4
1737 && sizeof (long) == 4 ? 1 : -1];
1738 }]
1739 }
1740
1741 # Return 1 if we're generating ia32 code using default options, 0
1742 # otherwise.
1743
1744 proc check_effective_target_ia32 { } {
1745 return [check_no_compiler_messages ia32 object {
1746 int dummy[sizeof (int) == 4
1747 && sizeof (void *) == 4
1748 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
1749 }]
1750 }
1751
1752 # Return 1 if we're generating x32 code using default options, 0
1753 # otherwise.
1754
1755 proc check_effective_target_x32 { } {
1756 return [check_no_compiler_messages x32 object {
1757 int dummy[sizeof (int) == 4
1758 && sizeof (void *) == 4
1759 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
1760 }]
1761 }
1762
1763 # Return 1 if we're generating 32-bit integers using default
1764 # options, 0 otherwise.
1765
1766 proc check_effective_target_int32 { } {
1767 return [check_no_compiler_messages int32 object {
1768 int dummy[sizeof (int) == 4 ? 1 : -1];
1769 }]
1770 }
1771
1772 # Return 1 if we're generating 32-bit or larger integers using default
1773 # options, 0 otherwise.
1774
1775 proc check_effective_target_int32plus { } {
1776 return [check_no_compiler_messages int32plus object {
1777 int dummy[sizeof (int) >= 4 ? 1 : -1];
1778 }]
1779 }
1780
1781 # Return 1 if we're generating 32-bit or larger pointers using default
1782 # options, 0 otherwise.
1783
1784 proc check_effective_target_ptr32plus { } {
1785 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
1786 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
1787 # cannot really hold a 32-bit address, so we always return false here.
1788 if { [istarget msp430-*-*] } {
1789 return 0
1790 }
1791
1792 return [check_no_compiler_messages ptr32plus object {
1793 int dummy[sizeof (void *) >= 4 ? 1 : -1];
1794 }]
1795 }
1796
1797 # Return 1 if we support 32-bit or larger array and structure sizes
1798 # using default options, 0 otherwise.
1799
1800 proc check_effective_target_size32plus { } {
1801 return [check_no_compiler_messages size32plus object {
1802 char dummy[65537];
1803 }]
1804 }
1805
1806 # Returns 1 if we're generating 16-bit or smaller integers with the
1807 # default options, 0 otherwise.
1808
1809 proc check_effective_target_int16 { } {
1810 return [check_no_compiler_messages int16 object {
1811 int dummy[sizeof (int) < 4 ? 1 : -1];
1812 }]
1813 }
1814
1815 # Return 1 if we're generating 64-bit code using default options, 0
1816 # otherwise.
1817
1818 proc check_effective_target_lp64 { } {
1819 return [check_no_compiler_messages lp64 object {
1820 int dummy[sizeof (int) == 4
1821 && sizeof (void *) == 8
1822 && sizeof (long) == 8 ? 1 : -1];
1823 }]
1824 }
1825
1826 # Return 1 if we're generating 64-bit code using default llp64 options,
1827 # 0 otherwise.
1828
1829 proc check_effective_target_llp64 { } {
1830 return [check_no_compiler_messages llp64 object {
1831 int dummy[sizeof (int) == 4
1832 && sizeof (void *) == 8
1833 && sizeof (long long) == 8
1834 && sizeof (long) == 4 ? 1 : -1];
1835 }]
1836 }
1837
1838 # Return 1 if long and int have different sizes,
1839 # 0 otherwise.
1840
1841 proc check_effective_target_long_neq_int { } {
1842 return [check_no_compiler_messages long_ne_int object {
1843 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
1844 }]
1845 }
1846
1847 # Return 1 if the target supports long double larger than double,
1848 # 0 otherwise.
1849
1850 proc check_effective_target_large_long_double { } {
1851 return [check_no_compiler_messages large_long_double object {
1852 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1853 }]
1854 }
1855
1856 # Return 1 if the target supports double larger than float,
1857 # 0 otherwise.
1858
1859 proc check_effective_target_large_double { } {
1860 return [check_no_compiler_messages large_double object {
1861 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
1862 }]
1863 }
1864
1865 # Return 1 if the target supports double of 64 bits,
1866 # 0 otherwise.
1867
1868 proc check_effective_target_double64 { } {
1869 return [check_no_compiler_messages double64 object {
1870 int dummy[sizeof(double) == 8 ? 1 : -1];
1871 }]
1872 }
1873
1874 # Return 1 if the target supports double of at least 64 bits,
1875 # 0 otherwise.
1876
1877 proc check_effective_target_double64plus { } {
1878 return [check_no_compiler_messages double64plus object {
1879 int dummy[sizeof(double) >= 8 ? 1 : -1];
1880 }]
1881 }
1882
1883 # Return 1 if the target supports 'w' suffix on floating constant
1884 # 0 otherwise.
1885
1886 proc check_effective_target_has_w_floating_suffix { } {
1887 set opts ""
1888 if [check_effective_target_c++] {
1889 append opts "-std=gnu++03"
1890 }
1891 return [check_no_compiler_messages w_fp_suffix object {
1892 float dummy = 1.0w;
1893 } "$opts"]
1894 }
1895
1896 # Return 1 if the target supports 'q' suffix on floating constant
1897 # 0 otherwise.
1898
1899 proc check_effective_target_has_q_floating_suffix { } {
1900 set opts ""
1901 if [check_effective_target_c++] {
1902 append opts "-std=gnu++03"
1903 }
1904 return [check_no_compiler_messages q_fp_suffix object {
1905 float dummy = 1.0q;
1906 } "$opts"]
1907 }
1908 # Return 1 if the target supports compiling fixed-point,
1909 # 0 otherwise.
1910
1911 proc check_effective_target_fixed_point { } {
1912 return [check_no_compiler_messages fixed_point object {
1913 _Sat _Fract x; _Sat _Accum y;
1914 }]
1915 }
1916
1917 # Return 1 if the target supports compiling decimal floating point,
1918 # 0 otherwise.
1919
1920 proc check_effective_target_dfp_nocache { } {
1921 verbose "check_effective_target_dfp_nocache: compiling source" 2
1922 set ret [check_no_compiler_messages_nocache dfp object {
1923 float x __attribute__((mode(DD)));
1924 }]
1925 verbose "check_effective_target_dfp_nocache: returning $ret" 2
1926 return $ret
1927 }
1928
1929 proc check_effective_target_dfprt_nocache { } {
1930 return [check_runtime_nocache dfprt {
1931 typedef float d64 __attribute__((mode(DD)));
1932 d64 x = 1.2df, y = 2.3dd, z;
1933 int main () { z = x + y; return 0; }
1934 }]
1935 }
1936
1937 # Return 1 if the target supports compiling Decimal Floating Point,
1938 # 0 otherwise.
1939 #
1940 # This won't change for different subtargets so cache the result.
1941
1942 proc check_effective_target_dfp { } {
1943 return [check_cached_effective_target dfp {
1944 check_effective_target_dfp_nocache
1945 }]
1946 }
1947
1948 # Return 1 if the target supports linking and executing Decimal Floating
1949 # Point, 0 otherwise.
1950 #
1951 # This won't change for different subtargets so cache the result.
1952
1953 proc check_effective_target_dfprt { } {
1954 return [check_cached_effective_target dfprt {
1955 check_effective_target_dfprt_nocache
1956 }]
1957 }
1958
1959 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
1960
1961 proc check_effective_target_ucn_nocache { } {
1962 # -std=c99 is only valid for C
1963 if [check_effective_target_c] {
1964 set ucnopts "-std=c99"
1965 }
1966 append ucnopts " -fextended-identifiers"
1967 verbose "check_effective_target_ucn_nocache: compiling source" 2
1968 set ret [check_no_compiler_messages_nocache ucn object {
1969 int \u00C0;
1970 } $ucnopts]
1971 verbose "check_effective_target_ucn_nocache: returning $ret" 2
1972 return $ret
1973 }
1974
1975 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
1976 #
1977 # This won't change for different subtargets, so cache the result.
1978
1979 proc check_effective_target_ucn { } {
1980 return [check_cached_effective_target ucn {
1981 check_effective_target_ucn_nocache
1982 }]
1983 }
1984
1985 # Return 1 if the target needs a command line argument to enable a SIMD
1986 # instruction set.
1987
1988 proc check_effective_target_vect_cmdline_needed { } {
1989 global et_vect_cmdline_needed_saved
1990 global et_vect_cmdline_needed_target_name
1991
1992 if { ![info exists et_vect_cmdline_needed_target_name] } {
1993 set et_vect_cmdline_needed_target_name ""
1994 }
1995
1996 # If the target has changed since we set the cached value, clear it.
1997 set current_target [current_target_name]
1998 if { $current_target != $et_vect_cmdline_needed_target_name } {
1999 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
2000 set et_vect_cmdline_needed_target_name $current_target
2001 if { [info exists et_vect_cmdline_needed_saved] } {
2002 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
2003 unset et_vect_cmdline_needed_saved
2004 }
2005 }
2006
2007 if [info exists et_vect_cmdline_needed_saved] {
2008 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
2009 } else {
2010 set et_vect_cmdline_needed_saved 1
2011 if { [istarget alpha*-*-*]
2012 || [istarget ia64-*-*]
2013 || (([istarget x86_64-*-*] || [istarget i?86-*-*])
2014 && ([check_effective_target_x32]
2015 || [check_effective_target_lp64]))
2016 || ([istarget powerpc*-*-*]
2017 && ([check_effective_target_powerpc_spe]
2018 || [check_effective_target_powerpc_altivec]))
2019 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
2020 || [istarget spu-*-*]
2021 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
2022 || [istarget aarch64*-*-*] } {
2023 set et_vect_cmdline_needed_saved 0
2024 }
2025 }
2026
2027 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
2028 return $et_vect_cmdline_needed_saved
2029 }
2030
2031 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
2032 #
2033 # This won't change for different subtargets so cache the result.
2034
2035 proc check_effective_target_vect_int { } {
2036 global et_vect_int_saved
2037
2038 if [info exists et_vect_int_saved] {
2039 verbose "check_effective_target_vect_int: using cached result" 2
2040 } else {
2041 set et_vect_int_saved 0
2042 if { [istarget i?86-*-*]
2043 || ([istarget powerpc*-*-*]
2044 && ![istarget powerpc-*-linux*paired*])
2045 || [istarget spu-*-*]
2046 || [istarget x86_64-*-*]
2047 || [istarget sparc*-*-*]
2048 || [istarget alpha*-*-*]
2049 || [istarget ia64-*-*]
2050 || [istarget aarch64*-*-*]
2051 || [check_effective_target_arm32]
2052 || ([istarget mips*-*-*]
2053 && [check_effective_target_mips_loongson]) } {
2054 set et_vect_int_saved 1
2055 }
2056 }
2057
2058 verbose "check_effective_target_vect_int: returning $et_vect_int_saved" 2
2059 return $et_vect_int_saved
2060 }
2061
2062 # Return 1 if the target supports signed int->float conversion
2063 #
2064
2065 proc check_effective_target_vect_intfloat_cvt { } {
2066 global et_vect_intfloat_cvt_saved
2067
2068 if [info exists et_vect_intfloat_cvt_saved] {
2069 verbose "check_effective_target_vect_intfloat_cvt: using cached result" 2
2070 } else {
2071 set et_vect_intfloat_cvt_saved 0
2072 if { [istarget i?86-*-*]
2073 || ([istarget powerpc*-*-*]
2074 && ![istarget powerpc-*-linux*paired*])
2075 || [istarget x86_64-*-*]
2076 || ([istarget arm*-*-*]
2077 && [check_effective_target_arm_neon_ok])} {
2078 set et_vect_intfloat_cvt_saved 1
2079 }
2080 }
2081
2082 verbose "check_effective_target_vect_intfloat_cvt: returning $et_vect_intfloat_cvt_saved" 2
2083 return $et_vect_intfloat_cvt_saved
2084 }
2085
2086 #Return 1 if we're supporting __int128 for target, 0 otherwise.
2087
2088 proc check_effective_target_int128 { } {
2089 return [check_no_compiler_messages int128 object {
2090 int dummy[
2091 #ifndef __SIZEOF_INT128__
2092 -1
2093 #else
2094 1
2095 #endif
2096 ];
2097 }]
2098 }
2099
2100 # Return 1 if the target supports unsigned int->float conversion
2101 #
2102
2103 proc check_effective_target_vect_uintfloat_cvt { } {
2104 global et_vect_uintfloat_cvt_saved
2105
2106 if [info exists et_vect_uintfloat_cvt_saved] {
2107 verbose "check_effective_target_vect_uintfloat_cvt: using cached result" 2
2108 } else {
2109 set et_vect_uintfloat_cvt_saved 0
2110 if { [istarget i?86-*-*]
2111 || ([istarget powerpc*-*-*]
2112 && ![istarget powerpc-*-linux*paired*])
2113 || [istarget x86_64-*-*]
2114 || [istarget aarch64*-*-*]
2115 || ([istarget arm*-*-*]
2116 && [check_effective_target_arm_neon_ok])} {
2117 set et_vect_uintfloat_cvt_saved 1
2118 }
2119 }
2120
2121 verbose "check_effective_target_vect_uintfloat_cvt: returning $et_vect_uintfloat_cvt_saved" 2
2122 return $et_vect_uintfloat_cvt_saved
2123 }
2124
2125
2126 # Return 1 if the target supports signed float->int conversion
2127 #
2128
2129 proc check_effective_target_vect_floatint_cvt { } {
2130 global et_vect_floatint_cvt_saved
2131
2132 if [info exists et_vect_floatint_cvt_saved] {
2133 verbose "check_effective_target_vect_floatint_cvt: using cached result" 2
2134 } else {
2135 set et_vect_floatint_cvt_saved 0
2136 if { [istarget i?86-*-*]
2137 || ([istarget powerpc*-*-*]
2138 && ![istarget powerpc-*-linux*paired*])
2139 || [istarget x86_64-*-*]
2140 || ([istarget arm*-*-*]
2141 && [check_effective_target_arm_neon_ok])} {
2142 set et_vect_floatint_cvt_saved 1
2143 }
2144 }
2145
2146 verbose "check_effective_target_vect_floatint_cvt: returning $et_vect_floatint_cvt_saved" 2
2147 return $et_vect_floatint_cvt_saved
2148 }
2149
2150 # Return 1 if the target supports unsigned float->int conversion
2151 #
2152
2153 proc check_effective_target_vect_floatuint_cvt { } {
2154 global et_vect_floatuint_cvt_saved
2155
2156 if [info exists et_vect_floatuint_cvt_saved] {
2157 verbose "check_effective_target_vect_floatuint_cvt: using cached result" 2
2158 } else {
2159 set et_vect_floatuint_cvt_saved 0
2160 if { ([istarget powerpc*-*-*]
2161 && ![istarget powerpc-*-linux*paired*])
2162 || ([istarget arm*-*-*]
2163 && [check_effective_target_arm_neon_ok])} {
2164 set et_vect_floatuint_cvt_saved 1
2165 }
2166 }
2167
2168 verbose "check_effective_target_vect_floatuint_cvt: returning $et_vect_floatuint_cvt_saved" 2
2169 return $et_vect_floatuint_cvt_saved
2170 }
2171
2172 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
2173 #
2174 # This won't change for different subtargets so cache the result.
2175
2176 proc check_effective_target_vect_simd_clones { } {
2177 global et_vect_simd_clones_saved
2178
2179 if [info exists et_vect_simd_clones_saved] {
2180 verbose "check_effective_target_vect_simd_clones: using cached result" 2
2181 } else {
2182 set et_vect_simd_clones_saved 0
2183 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2184 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx and
2185 # avx2 clone. Only the right clone for the specified arch will be
2186 # chosen, but still we need to at least be able to assemble
2187 # avx2.
2188 if { [check_effective_target_avx2] } {
2189 set et_vect_simd_clones_saved 1
2190 }
2191 }
2192 }
2193
2194 verbose "check_effective_target_vect_simd_clones: returning $et_vect_simd_clones_saved" 2
2195 return $et_vect_simd_clones_saved
2196 }
2197
2198 # Return 1 if this is a AArch64 target supporting big endian
2199 proc check_effective_target_aarch64_big_endian { } {
2200 return [check_no_compiler_messages aarch64_big_endian assembly {
2201 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
2202 #error FOO
2203 #endif
2204 }]
2205 }
2206
2207 # Return 1 if this is a AArch64 target supporting little endian
2208 proc check_effective_target_aarch64_little_endian { } {
2209 return [check_no_compiler_messages aarch64_little_endian assembly {
2210 #if !defined(__aarch64__) || defined(__AARCH64EB__)
2211 #error FOO
2212 #endif
2213 }]
2214 }
2215
2216 # Return 1 is this is an arm target using 32-bit instructions
2217 proc check_effective_target_arm32 { } {
2218 return [check_no_compiler_messages arm32 assembly {
2219 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
2220 #error FOO
2221 #endif
2222 }]
2223 }
2224
2225 # Return 1 is this is an arm target not using Thumb
2226 proc check_effective_target_arm_nothumb { } {
2227 return [check_no_compiler_messages arm_nothumb assembly {
2228 #if (defined(__thumb__) || defined(__thumb2__))
2229 #error FOO
2230 #endif
2231 }]
2232 }
2233
2234 # Return 1 if this is a little-endian ARM target
2235 proc check_effective_target_arm_little_endian { } {
2236 return [check_no_compiler_messages arm_little_endian assembly {
2237 #if !defined(__arm__) || !defined(__ARMEL__)
2238 #error FOO
2239 #endif
2240 }]
2241 }
2242
2243 # Return 1 if this is an ARM target that only supports aligned vector accesses
2244 proc check_effective_target_arm_vect_no_misalign { } {
2245 return [check_no_compiler_messages arm_vect_no_misalign assembly {
2246 #if !defined(__arm__) \
2247 || (defined(__ARMEL__) \
2248 && (!defined(__thumb__) || defined(__thumb2__)))
2249 #error FOO
2250 #endif
2251 }]
2252 }
2253
2254
2255 # Return 1 if this is an ARM target supporting -mfpu=vfp
2256 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
2257 # options.
2258
2259 proc check_effective_target_arm_vfp_ok { } {
2260 if { [check_effective_target_arm32] } {
2261 return [check_no_compiler_messages arm_vfp_ok object {
2262 int dummy;
2263 } "-mfpu=vfp -mfloat-abi=softfp"]
2264 } else {
2265 return 0
2266 }
2267 }
2268
2269 # Return 1 if this is an ARM target supporting -mfpu=vfp3
2270 # -mfloat-abi=softfp.
2271
2272 proc check_effective_target_arm_vfp3_ok { } {
2273 if { [check_effective_target_arm32] } {
2274 return [check_no_compiler_messages arm_vfp3_ok object {
2275 int dummy;
2276 } "-mfpu=vfp3 -mfloat-abi=softfp"]
2277 } else {
2278 return 0
2279 }
2280 }
2281
2282 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
2283 # -mfloat-abi=softfp.
2284 proc check_effective_target_arm_v8_vfp_ok {} {
2285 if { [check_effective_target_arm32] } {
2286 return [check_no_compiler_messages arm_v8_vfp_ok object {
2287 int foo (void)
2288 {
2289 __asm__ volatile ("vrinta.f32.f32 s0, s0");
2290 return 0;
2291 }
2292 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
2293 } else {
2294 return 0
2295 }
2296 }
2297
2298 # Return 1 if this is an ARM target supporting -mfpu=vfp
2299 # -mfloat-abi=hard. Some multilibs may be incompatible with these
2300 # options.
2301
2302 proc check_effective_target_arm_hard_vfp_ok { } {
2303 if { [check_effective_target_arm32]
2304 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
2305 return [check_no_compiler_messages arm_hard_vfp_ok executable {
2306 int main() { return 0;}
2307 } "-mfpu=vfp -mfloat-abi=hard"]
2308 } else {
2309 return 0
2310 }
2311 }
2312
2313 # Return 1 if this is an ARM target that supports DSP multiply with
2314 # current multilib flags.
2315
2316 proc check_effective_target_arm_dsp { } {
2317 return [check_no_compiler_messages arm_dsp assembly {
2318 #ifndef __ARM_FEATURE_DSP
2319 #error not DSP
2320 #endif
2321 int i;
2322 }]
2323 }
2324
2325 # Return 1 if this is an ARM target that supports unaligned word/halfword
2326 # load/store instructions.
2327
2328 proc check_effective_target_arm_unaligned { } {
2329 return [check_no_compiler_messages arm_unaligned assembly {
2330 #ifndef __ARM_FEATURE_UNALIGNED
2331 #error no unaligned support
2332 #endif
2333 int i;
2334 }]
2335 }
2336
2337 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2338 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2339 # incompatible with these options. Also set et_arm_crypto_flags to the
2340 # best options to add.
2341
2342 proc check_effective_target_arm_crypto_ok_nocache { } {
2343 global et_arm_crypto_flags
2344 set et_arm_crypto_flags ""
2345 if { [check_effective_target_arm32] } {
2346 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
2347 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
2348 #include "arm_neon.h"
2349 uint8x16_t
2350 foo (uint8x16_t a, uint8x16_t b)
2351 {
2352 return vaeseq_u8 (a, b);
2353 }
2354 } "$flags"] } {
2355 set et_arm_crypto_flags $flags
2356 return 1
2357 }
2358 }
2359 }
2360
2361 return 0
2362 }
2363
2364 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
2365
2366 proc check_effective_target_arm_crypto_ok { } {
2367 return [check_cached_effective_target arm_crypto_ok \
2368 check_effective_target_arm_crypto_ok_nocache]
2369 }
2370
2371 # Add options for crypto extensions.
2372 proc add_options_for_arm_crypto { flags } {
2373 if { ! [check_effective_target_arm_crypto_ok] } {
2374 return "$flags"
2375 }
2376 global et_arm_crypto_flags
2377 return "$flags $et_arm_crypto_flags"
2378 }
2379
2380 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2381 # or -mfloat-abi=hard, but if one is already specified by the
2382 # multilib, use it. Similarly, if a -mfpu option already enables
2383 # NEON, do not add -mfpu=neon.
2384
2385 proc add_options_for_arm_neon { flags } {
2386 if { ! [check_effective_target_arm_neon_ok] } {
2387 return "$flags"
2388 }
2389 global et_arm_neon_flags
2390 return "$flags $et_arm_neon_flags"
2391 }
2392
2393 proc add_options_for_arm_v8_vfp { flags } {
2394 if { ! [check_effective_target_arm_v8_vfp_ok] } {
2395 return "$flags"
2396 }
2397 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
2398 }
2399
2400 proc add_options_for_arm_v8_neon { flags } {
2401 if { ! [check_effective_target_arm_v8_neon_ok] } {
2402 return "$flags"
2403 }
2404 global et_arm_v8_neon_flags
2405 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
2406 }
2407
2408 proc add_options_for_arm_crc { flags } {
2409 if { ! [check_effective_target_arm_crc_ok] } {
2410 return "$flags"
2411 }
2412 global et_arm_crc_flags
2413 return "$flags $et_arm_crc_flags"
2414 }
2415
2416 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2417 # or -mfloat-abi=hard, but if one is already specified by the
2418 # multilib, use it. Similarly, if a -mfpu option already enables
2419 # NEON, do not add -mfpu=neon.
2420
2421 proc add_options_for_arm_neonv2 { flags } {
2422 if { ! [check_effective_target_arm_neonv2_ok] } {
2423 return "$flags"
2424 }
2425 global et_arm_neonv2_flags
2426 return "$flags $et_arm_neonv2_flags"
2427 }
2428
2429 # Add the options needed for vfp3.
2430 proc add_options_for_arm_vfp3 { flags } {
2431 if { ! [check_effective_target_arm_vfp3_ok] } {
2432 return "$flags"
2433 }
2434 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
2435 }
2436
2437 # Return 1 if this is an ARM target supporting -mfpu=neon
2438 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2439 # incompatible with these options. Also set et_arm_neon_flags to the
2440 # best options to add.
2441
2442 proc check_effective_target_arm_neon_ok_nocache { } {
2443 global et_arm_neon_flags
2444 set et_arm_neon_flags ""
2445 if { [check_effective_target_arm32] } {
2446 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp"} {
2447 if { [check_no_compiler_messages_nocache arm_neon_ok object {
2448 #include "arm_neon.h"
2449 int dummy;
2450 } "$flags"] } {
2451 set et_arm_neon_flags $flags
2452 return 1
2453 }
2454 }
2455 }
2456
2457 return 0
2458 }
2459
2460 proc check_effective_target_arm_neon_ok { } {
2461 return [check_cached_effective_target arm_neon_ok \
2462 check_effective_target_arm_neon_ok_nocache]
2463 }
2464
2465 proc check_effective_target_arm_crc_ok_nocache { } {
2466 global et_arm_crc_flags
2467 set et_arm_crc_flags "-march=armv8-a+crc"
2468 return [check_no_compiler_messages_nocache arm_crc_ok object {
2469 #if !defined (__ARM_FEATURE_CRC32)
2470 #error FOO
2471 #endif
2472 } "$et_arm_crc_flags"]
2473 }
2474
2475 proc check_effective_target_arm_crc_ok { } {
2476 return [check_cached_effective_target arm_crc_ok \
2477 check_effective_target_arm_crc_ok_nocache]
2478 }
2479
2480 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
2481 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2482 # incompatible with these options. Also set et_arm_neon_flags to the
2483 # best options to add.
2484
2485 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
2486 global et_arm_neon_fp16_flags
2487 set et_arm_neon_fp16_flags ""
2488 if { [check_effective_target_arm32] } {
2489 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
2490 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
2491 if { [check_no_compiler_messages_nocache arm_neon_fp_16_ok object {
2492 #include "arm_neon.h"
2493 float16x4_t
2494 foo (float32x4_t arg)
2495 {
2496 return vcvt_f16_f32 (arg);
2497 }
2498 } "$flags"] } {
2499 set et_arm_neon_fp16_flags $flags
2500 return 1
2501 }
2502 }
2503 }
2504
2505 return 0
2506 }
2507
2508 proc check_effective_target_arm_neon_fp16_ok { } {
2509 return [check_cached_effective_target arm_neon_fp16_ok \
2510 check_effective_target_arm_neon_fp16_ok_nocache]
2511 }
2512
2513 proc add_options_for_arm_neon_fp16 { flags } {
2514 if { ! [check_effective_target_arm_neon_fp16_ok] } {
2515 return "$flags"
2516 }
2517 global et_arm_neon_fp16_flags
2518 return "$flags $et_arm_neon_fp16_flags"
2519 }
2520
2521 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
2522 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2523 # incompatible with these options. Also set et_arm_v8_neon_flags to the
2524 # best options to add.
2525
2526 proc check_effective_target_arm_v8_neon_ok_nocache { } {
2527 global et_arm_v8_neon_flags
2528 set et_arm_v8_neon_flags ""
2529 if { [check_effective_target_arm32] } {
2530 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
2531 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
2532 #include "arm_neon.h"
2533 void
2534 foo ()
2535 {
2536 __asm__ volatile ("vrintn.f32 q0, q0");
2537 }
2538 } "$flags"] } {
2539 set et_arm_v8_neon_flags $flags
2540 return 1
2541 }
2542 }
2543 }
2544
2545 return 0
2546 }
2547
2548 proc check_effective_target_arm_v8_neon_ok { } {
2549 return [check_cached_effective_target arm_v8_neon_ok \
2550 check_effective_target_arm_v8_neon_ok_nocache]
2551 }
2552
2553 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
2554 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
2555 # incompatible with these options. Also set et_arm_neonv2_flags to the
2556 # best options to add.
2557
2558 proc check_effective_target_arm_neonv2_ok_nocache { } {
2559 global et_arm_neonv2_flags
2560 set et_arm_neonv2_flags ""
2561 if { [check_effective_target_arm32] } {
2562 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
2563 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
2564 #include "arm_neon.h"
2565 float32x2_t
2566 foo (float32x2_t a, float32x2_t b, float32x2_t c)
2567 {
2568 return vfma_f32 (a, b, c);
2569 }
2570 } "$flags"] } {
2571 set et_arm_neonv2_flags $flags
2572 return 1
2573 }
2574 }
2575 }
2576
2577 return 0
2578 }
2579
2580 proc check_effective_target_arm_neonv2_ok { } {
2581 return [check_cached_effective_target arm_neonv2_ok \
2582 check_effective_target_arm_neonv2_ok_nocache]
2583 }
2584
2585 # Add the options needed for NEON. We need either -mfloat-abi=softfp
2586 # or -mfloat-abi=hard, but if one is already specified by the
2587 # multilib, use it.
2588
2589 proc add_options_for_arm_fp16 { flags } {
2590 if { ! [check_effective_target_arm_fp16_ok] } {
2591 return "$flags"
2592 }
2593 global et_arm_fp16_flags
2594 return "$flags $et_arm_fp16_flags"
2595 }
2596
2597 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
2598 # Skip multilibs that are incompatible with these options and set
2599 # et_arm_fp16_flags to the best options to add.
2600
2601 proc check_effective_target_arm_fp16_ok_nocache { } {
2602 global et_arm_fp16_flags
2603 set et_arm_fp16_flags ""
2604 if { ! [check_effective_target_arm32] } {
2605 return 0;
2606 }
2607 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" "-mfpu=*fpv[1-9][0-9]*" } ]] {
2608 # Multilib flags would override -mfpu.
2609 return 0
2610 }
2611 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
2612 # Must generate floating-point instructions.
2613 return 0
2614 }
2615 if [check_effective_target_arm_hf_eabi] {
2616 # Use existing float-abi and force an fpu which supports fp16
2617 set et_arm_fp16_flags "-mfpu=vfpv4"
2618 return 1;
2619 }
2620 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
2621 # The existing -mfpu value is OK; use it, but add softfp.
2622 set et_arm_fp16_flags "-mfloat-abi=softfp"
2623 return 1;
2624 }
2625 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
2626 # macro to check for this support.
2627 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
2628 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
2629 int dummy;
2630 } "$flags"] } {
2631 set et_arm_fp16_flags "$flags"
2632 return 1
2633 }
2634
2635 return 0
2636 }
2637
2638 proc check_effective_target_arm_fp16_ok { } {
2639 return [check_cached_effective_target arm_fp16_ok \
2640 check_effective_target_arm_fp16_ok_nocache]
2641 }
2642
2643 # Creates a series of routines that return 1 if the given architecture
2644 # can be selected and a routine to give the flags to select that architecture
2645 # Note: Extra flags may be added to disable options from newer compilers
2646 # (Thumb in particular - but others may be added in the future)
2647 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
2648 # /* { dg-add-options arm_arch_v5 } */
2649 # /* { dg-require-effective-target arm_arch_v5_multilib } */
2650 foreach { armfunc armflag armdef } { v4 "-march=armv4 -marm" __ARM_ARCH_4__
2651 v4t "-march=armv4t" __ARM_ARCH_4T__
2652 v5 "-march=armv5 -marm" __ARM_ARCH_5__
2653 v5t "-march=armv5t" __ARM_ARCH_5T__
2654 v5te "-march=armv5te" __ARM_ARCH_5TE__
2655 v6 "-march=armv6" __ARM_ARCH_6__
2656 v6k "-march=armv6k" __ARM_ARCH_6K__
2657 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
2658 v6z "-march=armv6z" __ARM_ARCH_6Z__
2659 v6m "-march=armv6-m -mthumb" __ARM_ARCH_6M__
2660 v7a "-march=armv7-a" __ARM_ARCH_7A__
2661 v7ve "-march=armv7ve" __ARM_ARCH_7A__
2662 v7r "-march=armv7-r" __ARM_ARCH_7R__
2663 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
2664 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
2665 v8a "-march=armv8-a" __ARM_ARCH_8A__ } {
2666 eval [string map [list FUNC $armfunc FLAG $armflag DEF $armdef ] {
2667 proc check_effective_target_arm_arch_FUNC_ok { } {
2668 if { [ string match "*-marm*" "FLAG" ] &&
2669 ![check_effective_target_arm_arm_ok] } {
2670 return 0
2671 }
2672 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
2673 #if !defined (DEF)
2674 #error FOO
2675 #endif
2676 } "FLAG" ]
2677 }
2678
2679 proc add_options_for_arm_arch_FUNC { flags } {
2680 return "$flags FLAG"
2681 }
2682
2683 proc check_effective_target_arm_arch_FUNC_multilib { } {
2684 return [check_runtime arm_arch_FUNC_multilib {
2685 int
2686 main (void)
2687 {
2688 return 0;
2689 }
2690 } [add_options_for_arm_arch_FUNC ""]]
2691 }
2692 }]
2693 }
2694
2695 # Return 1 if this is an ARM target where -marm causes ARM to be
2696 # used (not Thumb)
2697
2698 proc check_effective_target_arm_arm_ok { } {
2699 return [check_no_compiler_messages arm_arm_ok assembly {
2700 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
2701 #error FOO
2702 #endif
2703 } "-marm"]
2704 }
2705
2706
2707 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
2708 # used.
2709
2710 proc check_effective_target_arm_thumb1_ok { } {
2711 return [check_no_compiler_messages arm_thumb1_ok assembly {
2712 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
2713 #error FOO
2714 #endif
2715 } "-mthumb"]
2716 }
2717
2718 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
2719 # used.
2720
2721 proc check_effective_target_arm_thumb2_ok { } {
2722 return [check_no_compiler_messages arm_thumb2_ok assembly {
2723 #if !defined(__thumb2__)
2724 #error FOO
2725 #endif
2726 } "-mthumb"]
2727 }
2728
2729 # Return 1 if this is an ARM target where Thumb-1 is used without options
2730 # added by the test.
2731
2732 proc check_effective_target_arm_thumb1 { } {
2733 return [check_no_compiler_messages arm_thumb1 assembly {
2734 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
2735 #error not thumb1
2736 #endif
2737 int i;
2738 } ""]
2739 }
2740
2741 # Return 1 if this is an ARM target where Thumb-2 is used without options
2742 # added by the test.
2743
2744 proc check_effective_target_arm_thumb2 { } {
2745 return [check_no_compiler_messages arm_thumb2 assembly {
2746 #if !defined(__thumb2__)
2747 #error FOO
2748 #endif
2749 int i;
2750 } ""]
2751 }
2752
2753 # Return 1 if this is an ARM target where conditional execution is available.
2754
2755 proc check_effective_target_arm_cond_exec { } {
2756 return [check_no_compiler_messages arm_cond_exec assembly {
2757 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
2758 #error FOO
2759 #endif
2760 int i;
2761 } ""]
2762 }
2763
2764 # Return 1 if this is an ARM cortex-M profile cpu
2765
2766 proc check_effective_target_arm_cortex_m { } {
2767 return [check_no_compiler_messages arm_cortex_m assembly {
2768 #if !defined(__ARM_ARCH_7M__) \
2769 && !defined (__ARM_ARCH_7EM__) \
2770 && !defined (__ARM_ARCH_6M__)
2771 #error FOO
2772 #endif
2773 int i;
2774 } "-mthumb"]
2775 }
2776
2777 # Return 1 if the target supports executing NEON instructions, 0
2778 # otherwise. Cache the result.
2779
2780 proc check_effective_target_arm_neon_hw { } {
2781 return [check_runtime arm_neon_hw_available {
2782 int
2783 main (void)
2784 {
2785 long long a = 0, b = 1;
2786 asm ("vorr %P0, %P1, %P2"
2787 : "=w" (a)
2788 : "0" (a), "w" (b));
2789 return (a != 1);
2790 }
2791 } [add_options_for_arm_neon ""]]
2792 }
2793
2794 proc check_effective_target_arm_neonv2_hw { } {
2795 return [check_runtime arm_neon_hwv2_available {
2796 #include "arm_neon.h"
2797 int
2798 main (void)
2799 {
2800 float32x2_t a, b, c;
2801 asm ("vfma.f32 %P0, %P1, %P2"
2802 : "=w" (a)
2803 : "w" (b), "w" (c));
2804 return 0;
2805 }
2806 } [add_options_for_arm_neonv2 ""]]
2807 }
2808
2809 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
2810 # otherwise.
2811
2812 proc check_effective_target_arm_v8_neon_hw { } {
2813 return [check_runtime arm_v8_neon_hw_available {
2814 #include "arm_neon.h"
2815 int
2816 main (void)
2817 {
2818 float32x2_t a;
2819 asm ("vrinta.f32 %P0, %P1"
2820 : "=w" (a)
2821 : "0" (a));
2822 return 0;
2823 }
2824 } [add_options_for_arm_v8_neon ""]]
2825 }
2826
2827 # Return 1 if this is a ARM target with NEON enabled.
2828
2829 proc check_effective_target_arm_neon { } {
2830 if { [check_effective_target_arm32] } {
2831 return [check_no_compiler_messages arm_neon object {
2832 #ifndef __ARM_NEON__
2833 #error not NEON
2834 #else
2835 int dummy;
2836 #endif
2837 }]
2838 } else {
2839 return 0
2840 }
2841 }
2842
2843 proc check_effective_target_arm_neonv2 { } {
2844 if { [check_effective_target_arm32] } {
2845 return [check_no_compiler_messages arm_neon object {
2846 #ifndef __ARM_NEON__
2847 #error not NEON
2848 #else
2849 #ifndef __ARM_FEATURE_FMA
2850 #error not NEONv2
2851 #else
2852 int dummy;
2853 #endif
2854 #endif
2855 }]
2856 } else {
2857 return 0
2858 }
2859 }
2860
2861 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
2862 # the Loongson vector modes.
2863
2864 proc check_effective_target_mips_loongson { } {
2865 return [check_no_compiler_messages loongson assembly {
2866 #if !defined(__mips_loongson_vector_rev)
2867 #error FOO
2868 #endif
2869 }]
2870 }
2871
2872 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
2873 # Architecture.
2874
2875 proc check_effective_target_arm_eabi { } {
2876 return [check_no_compiler_messages arm_eabi object {
2877 #ifndef __ARM_EABI__
2878 #error not EABI
2879 #else
2880 int dummy;
2881 #endif
2882 }]
2883 }
2884
2885 # Return 1 if this is an ARM target that adheres to the hard-float variant of
2886 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
2887
2888 proc check_effective_target_arm_hf_eabi { } {
2889 return [check_no_compiler_messages arm_hf_eabi object {
2890 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
2891 #error not hard-float EABI
2892 #else
2893 int dummy;
2894 #endif
2895 }]
2896 }
2897
2898 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
2899 # Some multilibs may be incompatible with this option.
2900
2901 proc check_effective_target_arm_iwmmxt_ok { } {
2902 if { [check_effective_target_arm32] } {
2903 return [check_no_compiler_messages arm_iwmmxt_ok object {
2904 int dummy;
2905 } "-mcpu=iwmmxt"]
2906 } else {
2907 return 0
2908 }
2909 }
2910
2911 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
2912 # for an ARM target.
2913 proc check_effective_target_arm_prefer_ldrd_strd { } {
2914 if { ![check_effective_target_arm32] } {
2915 return 0;
2916 }
2917
2918 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
2919 void foo (int *p) { p[0] = 1; p[1] = 0;}
2920 } "-O2 -mthumb" ]
2921 }
2922
2923 # Return 1 if this is a PowerPC target supporting -meabi.
2924
2925 proc check_effective_target_powerpc_eabi_ok { } {
2926 if { [istarget powerpc*-*-*] } {
2927 return [check_no_compiler_messages powerpc_eabi_ok object {
2928 int dummy;
2929 } "-meabi"]
2930 } else {
2931 return 0
2932 }
2933 }
2934
2935 # Return 1 if this is a PowerPC target with floating-point registers.
2936
2937 proc check_effective_target_powerpc_fprs { } {
2938 if { [istarget powerpc*-*-*]
2939 || [istarget rs6000-*-*] } {
2940 return [check_no_compiler_messages powerpc_fprs object {
2941 #ifdef __NO_FPRS__
2942 #error no FPRs
2943 #else
2944 int dummy;
2945 #endif
2946 }]
2947 } else {
2948 return 0
2949 }
2950 }
2951
2952 # Return 1 if this is a PowerPC target with hardware double-precision
2953 # floating point.
2954
2955 proc check_effective_target_powerpc_hard_double { } {
2956 if { [istarget powerpc*-*-*]
2957 || [istarget rs6000-*-*] } {
2958 return [check_no_compiler_messages powerpc_hard_double object {
2959 #ifdef _SOFT_DOUBLE
2960 #error soft double
2961 #else
2962 int dummy;
2963 #endif
2964 }]
2965 } else {
2966 return 0
2967 }
2968 }
2969
2970 # Return 1 if this is a PowerPC target supporting -maltivec.
2971
2972 proc check_effective_target_powerpc_altivec_ok { } {
2973 if { ([istarget powerpc*-*-*]
2974 && ![istarget powerpc-*-linux*paired*])
2975 || [istarget rs6000-*-*] } {
2976 # AltiVec is not supported on AIX before 5.3.
2977 if { [istarget powerpc*-*-aix4*]
2978 || [istarget powerpc*-*-aix5.1*]
2979 || [istarget powerpc*-*-aix5.2*] } {
2980 return 0
2981 }
2982 return [check_no_compiler_messages powerpc_altivec_ok object {
2983 int dummy;
2984 } "-maltivec"]
2985 } else {
2986 return 0
2987 }
2988 }
2989
2990 # Return 1 if this is a PowerPC target supporting -mpower8-vector
2991
2992 proc check_effective_target_powerpc_p8vector_ok { } {
2993 if { ([istarget powerpc*-*-*]
2994 && ![istarget powerpc-*-linux*paired*])
2995 || [istarget rs6000-*-*] } {
2996 # AltiVec is not supported on AIX before 5.3.
2997 if { [istarget powerpc*-*-aix4*]
2998 || [istarget powerpc*-*-aix5.1*]
2999 || [istarget powerpc*-*-aix5.2*] } {
3000 return 0
3001 }
3002 return [check_no_compiler_messages powerpc_p8vector_ok object {
3003 int main (void) {
3004 #ifdef __MACH__
3005 asm volatile ("xxlorc vs0,vs0,vs0");
3006 #else
3007 asm volatile ("xxlorc 0,0,0");
3008 #endif
3009 return 0;
3010 }
3011 } "-mpower8-vector"]
3012 } else {
3013 return 0
3014 }
3015 }
3016
3017 # Return 1 if this is a PowerPC target supporting -mvsx
3018
3019 proc check_effective_target_powerpc_vsx_ok { } {
3020 if { ([istarget powerpc*-*-*]
3021 && ![istarget powerpc-*-linux*paired*])
3022 || [istarget rs6000-*-*] } {
3023 # VSX is not supported on AIX before 7.1.
3024 if { [istarget powerpc*-*-aix4*]
3025 || [istarget powerpc*-*-aix5*]
3026 || [istarget powerpc*-*-aix6*] } {
3027 return 0
3028 }
3029 return [check_no_compiler_messages powerpc_vsx_ok object {
3030 int main (void) {
3031 #ifdef __MACH__
3032 asm volatile ("xxlor vs0,vs0,vs0");
3033 #else
3034 asm volatile ("xxlor 0,0,0");
3035 #endif
3036 return 0;
3037 }
3038 } "-mvsx"]
3039 } else {
3040 return 0
3041 }
3042 }
3043
3044 # Return 1 if this is a PowerPC target supporting -mhtm
3045
3046 proc check_effective_target_powerpc_htm_ok { } {
3047 if { ([istarget powerpc*-*-*]
3048 && ![istarget powerpc-*-linux*paired*])
3049 || [istarget rs6000-*-*] } {
3050 # HTM is not supported on AIX yet.
3051 if { [istarget powerpc*-*-aix*] } {
3052 return 0
3053 }
3054 return [check_no_compiler_messages powerpc_htm_ok object {
3055 int main (void) {
3056 asm volatile ("tbegin. 0");
3057 return 0;
3058 }
3059 } "-mhtm"]
3060 } else {
3061 return 0
3062 }
3063 }
3064
3065 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
3066
3067 proc check_effective_target_powerpc_ppu_ok { } {
3068 if [check_effective_target_powerpc_altivec_ok] {
3069 return [check_no_compiler_messages cell_asm_available object {
3070 int main (void) {
3071 #ifdef __MACH__
3072 asm volatile ("lvlx v0,v0,v0");
3073 #else
3074 asm volatile ("lvlx 0,0,0");
3075 #endif
3076 return 0;
3077 }
3078 }]
3079 } else {
3080 return 0
3081 }
3082 }
3083
3084 # Return 1 if this is a PowerPC target that supports SPU.
3085
3086 proc check_effective_target_powerpc_spu { } {
3087 if { [istarget powerpc*-*-linux*] } {
3088 return [check_effective_target_powerpc_altivec_ok]
3089 } else {
3090 return 0
3091 }
3092 }
3093
3094 # Return 1 if this is a PowerPC SPE target. The check includes options
3095 # specified by dg-options for this test, so don't cache the result.
3096
3097 proc check_effective_target_powerpc_spe_nocache { } {
3098 if { [istarget powerpc*-*-*] } {
3099 return [check_no_compiler_messages_nocache powerpc_spe object {
3100 #ifndef __SPE__
3101 #error not SPE
3102 #else
3103 int dummy;
3104 #endif
3105 } [current_compiler_flags]]
3106 } else {
3107 return 0
3108 }
3109 }
3110
3111 # Return 1 if this is a PowerPC target with SPE enabled.
3112
3113 proc check_effective_target_powerpc_spe { } {
3114 if { [istarget powerpc*-*-*] } {
3115 return [check_no_compiler_messages powerpc_spe object {
3116 #ifndef __SPE__
3117 #error not SPE
3118 #else
3119 int dummy;
3120 #endif
3121 }]
3122 } else {
3123 return 0
3124 }
3125 }
3126
3127 # Return 1 if this is a PowerPC target with Altivec enabled.
3128
3129 proc check_effective_target_powerpc_altivec { } {
3130 if { [istarget powerpc*-*-*] } {
3131 return [check_no_compiler_messages powerpc_altivec object {
3132 #ifndef __ALTIVEC__
3133 #error not Altivec
3134 #else
3135 int dummy;
3136 #endif
3137 }]
3138 } else {
3139 return 0
3140 }
3141 }
3142
3143 # Return 1 if this is a PowerPC 405 target. The check includes options
3144 # specified by dg-options for this test, so don't cache the result.
3145
3146 proc check_effective_target_powerpc_405_nocache { } {
3147 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
3148 return [check_no_compiler_messages_nocache powerpc_405 object {
3149 #ifdef __PPC405__
3150 int dummy;
3151 #else
3152 #error not a PPC405
3153 #endif
3154 } [current_compiler_flags]]
3155 } else {
3156 return 0
3157 }
3158 }
3159
3160 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
3161
3162 proc check_effective_target_powerpc_elfv2 { } {
3163 if { [istarget powerpc*-*-*] } {
3164 return [check_no_compiler_messages powerpc_elfv2 object {
3165 #if _CALL_ELF != 2
3166 #error not ELF v2 ABI
3167 #else
3168 int dummy;
3169 #endif
3170 }]
3171 } else {
3172 return 0
3173 }
3174 }
3175
3176 # Return 1 if this is a SPU target with a toolchain that
3177 # supports automatic overlay generation.
3178
3179 proc check_effective_target_spu_auto_overlay { } {
3180 if { [istarget spu*-*-elf*] } {
3181 return [check_no_compiler_messages spu_auto_overlay executable {
3182 int main (void) { }
3183 } "-Wl,--auto-overlay" ]
3184 } else {
3185 return 0
3186 }
3187 }
3188
3189 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
3190 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
3191 # test environment appears to run executables on such a simulator.
3192
3193 proc check_effective_target_ultrasparc_hw { } {
3194 return [check_runtime ultrasparc_hw {
3195 int main() { return 0; }
3196 } "-mcpu=ultrasparc"]
3197 }
3198
3199 # Return 1 if the test environment supports executing UltraSPARC VIS2
3200 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
3201
3202 proc check_effective_target_ultrasparc_vis2_hw { } {
3203 return [check_runtime ultrasparc_vis2_hw {
3204 int main() { __asm__(".word 0x81b00320"); return 0; }
3205 } "-mcpu=ultrasparc3"]
3206 }
3207
3208 # Return 1 if the test environment supports executing UltraSPARC VIS3
3209 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
3210
3211 proc check_effective_target_ultrasparc_vis3_hw { } {
3212 return [check_runtime ultrasparc_vis3_hw {
3213 int main() { __asm__(".word 0x81b00220"); return 0; }
3214 } "-mcpu=niagara3"]
3215 }
3216
3217 # Return 1 if this is a SPARC-V9 target.
3218
3219 proc check_effective_target_sparc_v9 { } {
3220 if { [istarget sparc*-*-*] } {
3221 return [check_no_compiler_messages sparc_v9 object {
3222 int main (void) {
3223 asm volatile ("return %i7+8");
3224 return 0;
3225 }
3226 }]
3227 } else {
3228 return 0
3229 }
3230 }
3231
3232 # Return 1 if this is a SPARC target with VIS enabled.
3233
3234 proc check_effective_target_sparc_vis { } {
3235 if { [istarget sparc*-*-*] } {
3236 return [check_no_compiler_messages sparc_vis object {
3237 #ifndef __VIS__
3238 #error not VIS
3239 #else
3240 int dummy;
3241 #endif
3242 }]
3243 } else {
3244 return 0
3245 }
3246 }
3247
3248 # Return 1 if the target supports hardware vector shift operation.
3249
3250 proc check_effective_target_vect_shift { } {
3251 global et_vect_shift_saved
3252
3253 if [info exists et_vect_shift_saved] {
3254 verbose "check_effective_target_vect_shift: using cached result" 2
3255 } else {
3256 set et_vect_shift_saved 0
3257 if { ([istarget powerpc*-*-*]
3258 && ![istarget powerpc-*-linux*paired*])
3259 || [istarget ia64-*-*]
3260 || [istarget i?86-*-*]
3261 || [istarget x86_64-*-*]
3262 || [istarget aarch64*-*-*]
3263 || [check_effective_target_arm32]
3264 || ([istarget mips*-*-*]
3265 && [check_effective_target_mips_loongson]) } {
3266 set et_vect_shift_saved 1
3267 }
3268 }
3269
3270 verbose "check_effective_target_vect_shift: returning $et_vect_shift_saved" 2
3271 return $et_vect_shift_saved
3272 }
3273
3274 # Return 1 if the target supports vector bswap operations.
3275
3276 proc check_effective_target_vect_bswap { } {
3277 global et_vect_bswap_saved
3278
3279 if [info exists et_vect_bswap_saved] {
3280 verbose "check_effective_target_vect_bswap: using cached result" 2
3281 } else {
3282 set et_vect_bswap_saved 0
3283 if { [istarget aarch64*-*-*] } {
3284 set et_vect_bswap_saved 1
3285 }
3286 }
3287
3288 verbose "check_effective_target_vect_bswap: returning $et_vect_bswap_saved" 2
3289 return $et_vect_bswap_saved
3290 }
3291
3292 # Return 1 if the target supports hardware vector shift operation for char.
3293
3294 proc check_effective_target_vect_shift_char { } {
3295 global et_vect_shift_char_saved
3296
3297 if [info exists et_vect_shift_char_saved] {
3298 verbose "check_effective_target_vect_shift_char: using cached result" 2
3299 } else {
3300 set et_vect_shift_char_saved 0
3301 if { ([istarget powerpc*-*-*]
3302 && ![istarget powerpc-*-linux*paired*])
3303 || [check_effective_target_arm32] } {
3304 set et_vect_shift_char_saved 1
3305 }
3306 }
3307
3308 verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
3309 return $et_vect_shift_char_saved
3310 }
3311
3312 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
3313 #
3314 # This can change for different subtargets so do not cache the result.
3315
3316 proc check_effective_target_vect_long { } {
3317 if { [istarget i?86-*-*]
3318 || (([istarget powerpc*-*-*]
3319 && ![istarget powerpc-*-linux*paired*])
3320 && [check_effective_target_ilp32])
3321 || [istarget x86_64-*-*]
3322 || [check_effective_target_arm32]
3323 || ([istarget sparc*-*-*] && [check_effective_target_ilp32]) } {
3324 set answer 1
3325 } else {
3326 set answer 0
3327 }
3328
3329 verbose "check_effective_target_vect_long: returning $answer" 2
3330 return $answer
3331 }
3332
3333 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
3334 #
3335 # This won't change for different subtargets so cache the result.
3336
3337 proc check_effective_target_vect_float { } {
3338 global et_vect_float_saved
3339
3340 if [info exists et_vect_float_saved] {
3341 verbose "check_effective_target_vect_float: using cached result" 2
3342 } else {
3343 set et_vect_float_saved 0
3344 if { [istarget i?86-*-*]
3345 || [istarget powerpc*-*-*]
3346 || [istarget spu-*-*]
3347 || [istarget mips-sde-elf]
3348 || [istarget mipsisa64*-*-*]
3349 || [istarget x86_64-*-*]
3350 || [istarget ia64-*-*]
3351 || [istarget aarch64*-*-*]
3352 || [check_effective_target_arm32] } {
3353 set et_vect_float_saved 1
3354 }
3355 }
3356
3357 verbose "check_effective_target_vect_float: returning $et_vect_float_saved" 2
3358 return $et_vect_float_saved
3359 }
3360
3361 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
3362 #
3363 # This won't change for different subtargets so cache the result.
3364
3365 proc check_effective_target_vect_double { } {
3366 global et_vect_double_saved
3367
3368 if [info exists et_vect_double_saved] {
3369 verbose "check_effective_target_vect_double: using cached result" 2
3370 } else {
3371 set et_vect_double_saved 0
3372 if { [istarget i?86-*-*]
3373 || [istarget aarch64*-*-*]
3374 || [istarget x86_64-*-*] } {
3375 if { [check_no_compiler_messages vect_double assembly {
3376 #ifdef __tune_atom__
3377 # error No double vectorizer support.
3378 #endif
3379 }] } {
3380 set et_vect_double_saved 1
3381 } else {
3382 set et_vect_double_saved 0
3383 }
3384 } elseif { [istarget spu-*-*] } {
3385 set et_vect_double_saved 1
3386 }
3387 }
3388
3389 verbose "check_effective_target_vect_double: returning $et_vect_double_saved" 2
3390 return $et_vect_double_saved
3391 }
3392
3393 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
3394 #
3395 # This won't change for different subtargets so cache the result.
3396
3397 proc check_effective_target_vect_long_long { } {
3398 global et_vect_long_long_saved
3399
3400 if [info exists et_vect_long_long_saved] {
3401 verbose "check_effective_target_vect_long_long: using cached result" 2
3402 } else {
3403 set et_vect_long_long_saved 0
3404 if { [istarget i?86-*-*]
3405 || [istarget x86_64-*-*] } {
3406 set et_vect_long_long_saved 1
3407 }
3408 }
3409
3410 verbose "check_effective_target_vect_long_long: returning $et_vect_long_long_saved" 2
3411 return $et_vect_long_long_saved
3412 }
3413
3414
3415 # Return 1 if the target plus current options does not support a vector
3416 # max instruction on "int", 0 otherwise.
3417 #
3418 # This won't change for different subtargets so cache the result.
3419
3420 proc check_effective_target_vect_no_int_max { } {
3421 global et_vect_no_int_max_saved
3422
3423 if [info exists et_vect_no_int_max_saved] {
3424 verbose "check_effective_target_vect_no_int_max: using cached result" 2
3425 } else {
3426 set et_vect_no_int_max_saved 0
3427 if { [istarget sparc*-*-*]
3428 || [istarget spu-*-*]
3429 || [istarget alpha*-*-*]
3430 || ([istarget mips*-*-*]
3431 && [check_effective_target_mips_loongson]) } {
3432 set et_vect_no_int_max_saved 1
3433 }
3434 }
3435 verbose "check_effective_target_vect_no_int_max: returning $et_vect_no_int_max_saved" 2
3436 return $et_vect_no_int_max_saved
3437 }
3438
3439 # Return 1 if the target plus current options does not support a vector
3440 # add instruction on "int", 0 otherwise.
3441 #
3442 # This won't change for different subtargets so cache the result.
3443
3444 proc check_effective_target_vect_no_int_add { } {
3445 global et_vect_no_int_add_saved
3446
3447 if [info exists et_vect_no_int_add_saved] {
3448 verbose "check_effective_target_vect_no_int_add: using cached result" 2
3449 } else {
3450 set et_vect_no_int_add_saved 0
3451 # Alpha only supports vector add on V8QI and V4HI.
3452 if { [istarget alpha*-*-*] } {
3453 set et_vect_no_int_add_saved 1
3454 }
3455 }
3456 verbose "check_effective_target_vect_no_int_add: returning $et_vect_no_int_add_saved" 2
3457 return $et_vect_no_int_add_saved
3458 }
3459
3460 # Return 1 if the target plus current options does not support vector
3461 # bitwise instructions, 0 otherwise.
3462 #
3463 # This won't change for different subtargets so cache the result.
3464
3465 proc check_effective_target_vect_no_bitwise { } {
3466 global et_vect_no_bitwise_saved
3467
3468 if [info exists et_vect_no_bitwise_saved] {
3469 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
3470 } else {
3471 set et_vect_no_bitwise_saved 0
3472 }
3473 verbose "check_effective_target_vect_no_bitwise: returning $et_vect_no_bitwise_saved" 2
3474 return $et_vect_no_bitwise_saved
3475 }
3476
3477 # Return 1 if the target plus current options supports vector permutation,
3478 # 0 otherwise.
3479 #
3480 # This won't change for different subtargets so cache the result.
3481
3482 proc check_effective_target_vect_perm { } {
3483 global et_vect_perm
3484
3485 if [info exists et_vect_perm_saved] {
3486 verbose "check_effective_target_vect_perm: using cached result" 2
3487 } else {
3488 set et_vect_perm_saved 0
3489 if { [is-effective-target arm_neon_ok]
3490 || ([istarget aarch64*-*-*]
3491 && [is-effective-target aarch64_little_endian])
3492 || [istarget powerpc*-*-*]
3493 || [istarget spu-*-*]
3494 || [istarget i?86-*-*]
3495 || [istarget x86_64-*-*]
3496 || ([istarget mips*-*-*]
3497 && [check_effective_target_mpaired_single]) } {
3498 set et_vect_perm_saved 1
3499 }
3500 }
3501 verbose "check_effective_target_vect_perm: returning $et_vect_perm_saved" 2
3502 return $et_vect_perm_saved
3503 }
3504
3505 # Return 1 if the target plus current options supports vector permutation
3506 # on byte-sized elements, 0 otherwise.
3507 #
3508 # This won't change for different subtargets so cache the result.
3509
3510 proc check_effective_target_vect_perm_byte { } {
3511 global et_vect_perm_byte
3512
3513 if [info exists et_vect_perm_byte_saved] {
3514 verbose "check_effective_target_vect_perm_byte: using cached result" 2
3515 } else {
3516 set et_vect_perm_byte_saved 0
3517 if { ([is-effective-target arm_neon_ok]
3518 && [is-effective-target arm_little_endian])
3519 || ([istarget aarch64*-*-*]
3520 && [is-effective-target aarch64_little_endian])
3521 || [istarget powerpc*-*-*]
3522 || [istarget spu-*-*] } {
3523 set et_vect_perm_byte_saved 1
3524 }
3525 }
3526 verbose "check_effective_target_vect_perm_byte: returning $et_vect_perm_byte_saved" 2
3527 return $et_vect_perm_byte_saved
3528 }
3529
3530 # Return 1 if the target plus current options supports vector permutation
3531 # on short-sized elements, 0 otherwise.
3532 #
3533 # This won't change for different subtargets so cache the result.
3534
3535 proc check_effective_target_vect_perm_short { } {
3536 global et_vect_perm_short
3537
3538 if [info exists et_vect_perm_short_saved] {
3539 verbose "check_effective_target_vect_perm_short: using cached result" 2
3540 } else {
3541 set et_vect_perm_short_saved 0
3542 if { ([is-effective-target arm_neon_ok]
3543 && [is-effective-target arm_little_endian])
3544 || ([istarget aarch64*-*-*]
3545 && [is-effective-target aarch64_little_endian])
3546 || [istarget powerpc*-*-*]
3547 || [istarget spu-*-*] } {
3548 set et_vect_perm_short_saved 1
3549 }
3550 }
3551 verbose "check_effective_target_vect_perm_short: returning $et_vect_perm_short_saved" 2
3552 return $et_vect_perm_short_saved
3553 }
3554
3555 # Return 1 if the target plus current options supports a vector
3556 # widening summation of *short* args into *int* result, 0 otherwise.
3557 #
3558 # This won't change for different subtargets so cache the result.
3559
3560 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
3561 global et_vect_widen_sum_hi_to_si_pattern
3562
3563 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved] {
3564 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: using cached result" 2
3565 } else {
3566 set et_vect_widen_sum_hi_to_si_pattern_saved 0
3567 if { [istarget powerpc*-*-*]
3568 || [istarget ia64-*-*] } {
3569 set et_vect_widen_sum_hi_to_si_pattern_saved 1
3570 }
3571 }
3572 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern: returning $et_vect_widen_sum_hi_to_si_pattern_saved" 2
3573 return $et_vect_widen_sum_hi_to_si_pattern_saved
3574 }
3575
3576 # Return 1 if the target plus current options supports a vector
3577 # widening summation of *short* args into *int* result, 0 otherwise.
3578 # A target can also support this widening summation if it can support
3579 # promotion (unpacking) from shorts to ints.
3580 #
3581 # This won't change for different subtargets so cache the result.
3582
3583 proc check_effective_target_vect_widen_sum_hi_to_si { } {
3584 global et_vect_widen_sum_hi_to_si
3585
3586 if [info exists et_vect_widen_sum_hi_to_si_saved] {
3587 verbose "check_effective_target_vect_widen_sum_hi_to_si: using cached result" 2
3588 } else {
3589 set et_vect_widen_sum_hi_to_si_saved [check_effective_target_vect_unpack]
3590 if { [istarget powerpc*-*-*]
3591 || [istarget ia64-*-*] } {
3592 set et_vect_widen_sum_hi_to_si_saved 1
3593 }
3594 }
3595 verbose "check_effective_target_vect_widen_sum_hi_to_si: returning $et_vect_widen_sum_hi_to_si_saved" 2
3596 return $et_vect_widen_sum_hi_to_si_saved
3597 }
3598
3599 # Return 1 if the target plus current options supports a vector
3600 # widening summation of *char* args into *short* result, 0 otherwise.
3601 # A target can also support this widening summation if it can support
3602 # promotion (unpacking) from chars to shorts.
3603 #
3604 # This won't change for different subtargets so cache the result.
3605
3606 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
3607 global et_vect_widen_sum_qi_to_hi
3608
3609 if [info exists et_vect_widen_sum_qi_to_hi_saved] {
3610 verbose "check_effective_target_vect_widen_sum_qi_to_hi: using cached result" 2
3611 } else {
3612 set et_vect_widen_sum_qi_to_hi_saved 0
3613 if { [check_effective_target_vect_unpack]
3614 || [check_effective_target_arm_neon_ok]
3615 || [istarget ia64-*-*] } {
3616 set et_vect_widen_sum_qi_to_hi_saved 1
3617 }
3618 }
3619 verbose "check_effective_target_vect_widen_sum_qi_to_hi: returning $et_vect_widen_sum_qi_to_hi_saved" 2
3620 return $et_vect_widen_sum_qi_to_hi_saved
3621 }
3622
3623 # Return 1 if the target plus current options supports a vector
3624 # widening summation of *char* args into *int* result, 0 otherwise.
3625 #
3626 # This won't change for different subtargets so cache the result.
3627
3628 proc check_effective_target_vect_widen_sum_qi_to_si { } {
3629 global et_vect_widen_sum_qi_to_si
3630
3631 if [info exists et_vect_widen_sum_qi_to_si_saved] {
3632 verbose "check_effective_target_vect_widen_sum_qi_to_si: using cached result" 2
3633 } else {
3634 set et_vect_widen_sum_qi_to_si_saved 0
3635 if { [istarget powerpc*-*-*] } {
3636 set et_vect_widen_sum_qi_to_si_saved 1
3637 }
3638 }
3639 verbose "check_effective_target_vect_widen_sum_qi_to_si: returning $et_vect_widen_sum_qi_to_si_saved" 2
3640 return $et_vect_widen_sum_qi_to_si_saved
3641 }
3642
3643 # Return 1 if the target plus current options supports a vector
3644 # widening multiplication of *char* args into *short* result, 0 otherwise.
3645 # A target can also support this widening multplication if it can support
3646 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
3647 # multiplication of shorts).
3648 #
3649 # This won't change for different subtargets so cache the result.
3650
3651
3652 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
3653 global et_vect_widen_mult_qi_to_hi
3654
3655 if [info exists et_vect_widen_mult_qi_to_hi_saved] {
3656 verbose "check_effective_target_vect_widen_mult_qi_to_hi: using cached result" 2
3657 } else {
3658 if { [check_effective_target_vect_unpack]
3659 && [check_effective_target_vect_short_mult] } {
3660 set et_vect_widen_mult_qi_to_hi_saved 1
3661 } else {
3662 set et_vect_widen_mult_qi_to_hi_saved 0
3663 }
3664 if { [istarget powerpc*-*-*]
3665 || [istarget aarch64*-*-*]
3666 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
3667 set et_vect_widen_mult_qi_to_hi_saved 1
3668 }
3669 }
3670 verbose "check_effective_target_vect_widen_mult_qi_to_hi: returning $et_vect_widen_mult_qi_to_hi_saved" 2
3671 return $et_vect_widen_mult_qi_to_hi_saved
3672 }
3673
3674 # Return 1 if the target plus current options supports a vector
3675 # widening multiplication of *short* args into *int* result, 0 otherwise.
3676 # A target can also support this widening multplication if it can support
3677 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
3678 # multiplication of ints).
3679 #
3680 # This won't change for different subtargets so cache the result.
3681
3682
3683 proc check_effective_target_vect_widen_mult_hi_to_si { } {
3684 global et_vect_widen_mult_hi_to_si
3685
3686 if [info exists et_vect_widen_mult_hi_to_si_saved] {
3687 verbose "check_effective_target_vect_widen_mult_hi_to_si: using cached result" 2
3688 } else {
3689 if { [check_effective_target_vect_unpack]
3690 && [check_effective_target_vect_int_mult] } {
3691 set et_vect_widen_mult_hi_to_si_saved 1
3692 } else {
3693 set et_vect_widen_mult_hi_to_si_saved 0
3694 }
3695 if { [istarget powerpc*-*-*]
3696 || [istarget spu-*-*]
3697 || [istarget ia64-*-*]
3698 || [istarget aarch64*-*-*]
3699 || [istarget i?86-*-*]
3700 || [istarget x86_64-*-*]
3701 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
3702 set et_vect_widen_mult_hi_to_si_saved 1
3703 }
3704 }
3705 verbose "check_effective_target_vect_widen_mult_hi_to_si: returning $et_vect_widen_mult_hi_to_si_saved" 2
3706 return $et_vect_widen_mult_hi_to_si_saved
3707 }
3708
3709 # Return 1 if the target plus current options supports a vector
3710 # widening multiplication of *char* args into *short* result, 0 otherwise.
3711 #
3712 # This won't change for different subtargets so cache the result.
3713
3714 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
3715 global et_vect_widen_mult_qi_to_hi_pattern
3716
3717 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved] {
3718 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: using cached result" 2
3719 } else {
3720 set et_vect_widen_mult_qi_to_hi_pattern_saved 0
3721 if { [istarget powerpc*-*-*]
3722 || ([istarget arm*-*-*]
3723 && [check_effective_target_arm_neon_ok]
3724 && [check_effective_target_arm_little_endian]) } {
3725 set et_vect_widen_mult_qi_to_hi_pattern_saved 1
3726 }
3727 }
3728 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern: returning $et_vect_widen_mult_qi_to_hi_pattern_saved" 2
3729 return $et_vect_widen_mult_qi_to_hi_pattern_saved
3730 }
3731
3732 # Return 1 if the target plus current options supports a vector
3733 # widening multiplication of *short* args into *int* result, 0 otherwise.
3734 #
3735 # This won't change for different subtargets so cache the result.
3736
3737 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
3738 global et_vect_widen_mult_hi_to_si_pattern
3739
3740 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved] {
3741 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: using cached result" 2
3742 } else {
3743 set et_vect_widen_mult_hi_to_si_pattern_saved 0
3744 if { [istarget powerpc*-*-*]
3745 || [istarget spu-*-*]
3746 || [istarget ia64-*-*]
3747 || [istarget i?86-*-*]
3748 || [istarget x86_64-*-*]
3749 || ([istarget arm*-*-*]
3750 && [check_effective_target_arm_neon_ok]
3751 && [check_effective_target_arm_little_endian]) } {
3752 set et_vect_widen_mult_hi_to_si_pattern_saved 1
3753 }
3754 }
3755 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern: returning $et_vect_widen_mult_hi_to_si_pattern_saved" 2
3756 return $et_vect_widen_mult_hi_to_si_pattern_saved
3757 }
3758
3759 # Return 1 if the target plus current options supports a vector
3760 # widening multiplication of *int* args into *long* result, 0 otherwise.
3761 #
3762 # This won't change for different subtargets so cache the result.
3763
3764 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
3765 global et_vect_widen_mult_si_to_di_pattern
3766
3767 if [info exists et_vect_widen_mult_si_to_di_pattern_saved] {
3768 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: using cached result" 2
3769 } else {
3770 set et_vect_widen_mult_si_to_di_pattern_saved 0
3771 if {[istarget ia64-*-*]
3772 || [istarget i?86-*-*]
3773 || [istarget x86_64-*-*] } {
3774 set et_vect_widen_mult_si_to_di_pattern_saved 1
3775 }
3776 }
3777 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern: returning $et_vect_widen_mult_si_to_di_pattern_saved" 2
3778 return $et_vect_widen_mult_si_to_di_pattern_saved
3779 }
3780
3781 # Return 1 if the target plus current options supports a vector
3782 # widening shift, 0 otherwise.
3783 #
3784 # This won't change for different subtargets so cache the result.
3785
3786 proc check_effective_target_vect_widen_shift { } {
3787 global et_vect_widen_shift_saved
3788
3789 if [info exists et_vect_shift_saved] {
3790 verbose "check_effective_target_vect_widen_shift: using cached result" 2
3791 } else {
3792 set et_vect_widen_shift_saved 0
3793 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
3794 set et_vect_widen_shift_saved 1
3795 }
3796 }
3797 verbose "check_effective_target_vect_widen_shift: returning $et_vect_widen_shift_saved" 2
3798 return $et_vect_widen_shift_saved
3799 }
3800
3801 # Return 1 if the target plus current options supports a vector
3802 # dot-product of signed chars, 0 otherwise.
3803 #
3804 # This won't change for different subtargets so cache the result.
3805
3806 proc check_effective_target_vect_sdot_qi { } {
3807 global et_vect_sdot_qi
3808
3809 if [info exists et_vect_sdot_qi_saved] {
3810 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
3811 } else {
3812 set et_vect_sdot_qi_saved 0
3813 if { [istarget ia64-*-*] } {
3814 set et_vect_udot_qi_saved 1
3815 }
3816 }
3817 verbose "check_effective_target_vect_sdot_qi: returning $et_vect_sdot_qi_saved" 2
3818 return $et_vect_sdot_qi_saved
3819 }
3820
3821 # Return 1 if the target plus current options supports a vector
3822 # dot-product of unsigned chars, 0 otherwise.
3823 #
3824 # This won't change for different subtargets so cache the result.
3825
3826 proc check_effective_target_vect_udot_qi { } {
3827 global et_vect_udot_qi
3828
3829 if [info exists et_vect_udot_qi_saved] {
3830 verbose "check_effective_target_vect_udot_qi: using cached result" 2
3831 } else {
3832 set et_vect_udot_qi_saved 0
3833 if { [istarget powerpc*-*-*]
3834 || [istarget ia64-*-*] } {
3835 set et_vect_udot_qi_saved 1
3836 }
3837 }
3838 verbose "check_effective_target_vect_udot_qi: returning $et_vect_udot_qi_saved" 2
3839 return $et_vect_udot_qi_saved
3840 }
3841
3842 # Return 1 if the target plus current options supports a vector
3843 # dot-product of signed shorts, 0 otherwise.
3844 #
3845 # This won't change for different subtargets so cache the result.
3846
3847 proc check_effective_target_vect_sdot_hi { } {
3848 global et_vect_sdot_hi
3849
3850 if [info exists et_vect_sdot_hi_saved] {
3851 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
3852 } else {
3853 set et_vect_sdot_hi_saved 0
3854 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
3855 || [istarget ia64-*-*]
3856 || [istarget i?86-*-*]
3857 || [istarget x86_64-*-*] } {
3858 set et_vect_sdot_hi_saved 1
3859 }
3860 }
3861 verbose "check_effective_target_vect_sdot_hi: returning $et_vect_sdot_hi_saved" 2
3862 return $et_vect_sdot_hi_saved
3863 }
3864
3865 # Return 1 if the target plus current options supports a vector
3866 # dot-product of unsigned shorts, 0 otherwise.
3867 #
3868 # This won't change for different subtargets so cache the result.
3869
3870 proc check_effective_target_vect_udot_hi { } {
3871 global et_vect_udot_hi
3872
3873 if [info exists et_vect_udot_hi_saved] {
3874 verbose "check_effective_target_vect_udot_hi: using cached result" 2
3875 } else {
3876 set et_vect_udot_hi_saved 0
3877 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*]) } {
3878 set et_vect_udot_hi_saved 1
3879 }
3880 }
3881 verbose "check_effective_target_vect_udot_hi: returning $et_vect_udot_hi_saved" 2
3882 return $et_vect_udot_hi_saved
3883 }
3884
3885
3886 # Return 1 if the target plus current options supports a vector
3887 # demotion (packing) of shorts (to chars) and ints (to shorts)
3888 # using modulo arithmetic, 0 otherwise.
3889 #
3890 # This won't change for different subtargets so cache the result.
3891
3892 proc check_effective_target_vect_pack_trunc { } {
3893 global et_vect_pack_trunc
3894
3895 if [info exists et_vect_pack_trunc_saved] {
3896 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
3897 } else {
3898 set et_vect_pack_trunc_saved 0
3899 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
3900 || [istarget i?86-*-*]
3901 || [istarget x86_64-*-*]
3902 || [istarget aarch64*-*-*]
3903 || [istarget spu-*-*]
3904 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
3905 && [check_effective_target_arm_little_endian]) } {
3906 set et_vect_pack_trunc_saved 1
3907 }
3908 }
3909 verbose "check_effective_target_vect_pack_trunc: returning $et_vect_pack_trunc_saved" 2
3910 return $et_vect_pack_trunc_saved
3911 }
3912
3913 # Return 1 if the target plus current options supports a vector
3914 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
3915 #
3916 # This won't change for different subtargets so cache the result.
3917
3918 proc check_effective_target_vect_unpack { } {
3919 global et_vect_unpack
3920
3921 if [info exists et_vect_unpack_saved] {
3922 verbose "check_effective_target_vect_unpack: using cached result" 2
3923 } else {
3924 set et_vect_unpack_saved 0
3925 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
3926 || [istarget i?86-*-*]
3927 || [istarget x86_64-*-*]
3928 || [istarget spu-*-*]
3929 || [istarget ia64-*-*]
3930 || [istarget aarch64*-*-*]
3931 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
3932 && [check_effective_target_arm_little_endian]) } {
3933 set et_vect_unpack_saved 1
3934 }
3935 }
3936 verbose "check_effective_target_vect_unpack: returning $et_vect_unpack_saved" 2
3937 return $et_vect_unpack_saved
3938 }
3939
3940 # Return 1 if the target plus current options does not guarantee
3941 # that its STACK_BOUNDARY is >= the reguired vector alignment.
3942 #
3943 # This won't change for different subtargets so cache the result.
3944
3945 proc check_effective_target_unaligned_stack { } {
3946 global et_unaligned_stack_saved
3947
3948 if [info exists et_unaligned_stack_saved] {
3949 verbose "check_effective_target_unaligned_stack: using cached result" 2
3950 } else {
3951 set et_unaligned_stack_saved 0
3952 }
3953 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
3954 return $et_unaligned_stack_saved
3955 }
3956
3957 # Return 1 if the target plus current options does not support a vector
3958 # alignment mechanism, 0 otherwise.
3959 #
3960 # This won't change for different subtargets so cache the result.
3961
3962 proc check_effective_target_vect_no_align { } {
3963 global et_vect_no_align_saved
3964
3965 if [info exists et_vect_no_align_saved] {
3966 verbose "check_effective_target_vect_no_align: using cached result" 2
3967 } else {
3968 set et_vect_no_align_saved 0
3969 if { [istarget mipsisa64*-*-*]
3970 || [istarget mips-sde-elf]
3971 || [istarget sparc*-*-*]
3972 || [istarget ia64-*-*]
3973 || [check_effective_target_arm_vect_no_misalign]
3974 || ([istarget mips*-*-*]
3975 && [check_effective_target_mips_loongson]) } {
3976 set et_vect_no_align_saved 1
3977 }
3978 }
3979 verbose "check_effective_target_vect_no_align: returning $et_vect_no_align_saved" 2
3980 return $et_vect_no_align_saved
3981 }
3982
3983 # Return 1 if the target supports a vector misalign access, 0 otherwise.
3984 #
3985 # This won't change for different subtargets so cache the result.
3986
3987 proc check_effective_target_vect_hw_misalign { } {
3988 global et_vect_hw_misalign_saved
3989
3990 if [info exists et_vect_hw_misalign_saved] {
3991 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
3992 } else {
3993 set et_vect_hw_misalign_saved 0
3994 if { ([istarget x86_64-*-*]
3995 || [istarget aarch64*-*-*]
3996 || [istarget i?86-*-*]) } {
3997 set et_vect_hw_misalign_saved 1
3998 }
3999 }
4000 verbose "check_effective_target_vect_hw_misalign: returning $et_vect_hw_misalign_saved" 2
4001 return $et_vect_hw_misalign_saved
4002 }
4003
4004
4005 # Return 1 if arrays are aligned to the vector alignment
4006 # boundary, 0 otherwise.
4007 #
4008 # This won't change for different subtargets so cache the result.
4009
4010 proc check_effective_target_vect_aligned_arrays { } {
4011 global et_vect_aligned_arrays
4012
4013 if [info exists et_vect_aligned_arrays_saved] {
4014 verbose "check_effective_target_vect_aligned_arrays: using cached result" 2
4015 } else {
4016 set et_vect_aligned_arrays_saved 0
4017 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4018 if { ([is-effective-target lp64]
4019 && ( ![check_avx_available]
4020 || [check_prefer_avx128])) } {
4021 set et_vect_aligned_arrays_saved 1
4022 }
4023 }
4024 if [istarget spu-*-*] {
4025 set et_vect_aligned_arrays_saved 1
4026 }
4027 }
4028 verbose "check_effective_target_vect_aligned_arrays: returning $et_vect_aligned_arrays_saved" 2
4029 return $et_vect_aligned_arrays_saved
4030 }
4031
4032 # Return 1 if types of size 32 bit or less are naturally aligned
4033 # (aligned to their type-size), 0 otherwise.
4034 #
4035 # This won't change for different subtargets so cache the result.
4036
4037 proc check_effective_target_natural_alignment_32 { } {
4038 global et_natural_alignment_32
4039
4040 if [info exists et_natural_alignment_32_saved] {
4041 verbose "check_effective_target_natural_alignment_32: using cached result" 2
4042 } else {
4043 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
4044 set et_natural_alignment_32_saved 1
4045 if { ([istarget *-*-darwin*] && [is-effective-target lp64]) } {
4046 set et_natural_alignment_32_saved 0
4047 }
4048 }
4049 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
4050 return $et_natural_alignment_32_saved
4051 }
4052
4053 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
4054 # type-size), 0 otherwise.
4055 #
4056 # This won't change for different subtargets so cache the result.
4057
4058 proc check_effective_target_natural_alignment_64 { } {
4059 global et_natural_alignment_64
4060
4061 if [info exists et_natural_alignment_64_saved] {
4062 verbose "check_effective_target_natural_alignment_64: using cached result" 2
4063 } else {
4064 set et_natural_alignment_64_saved 0
4065 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
4066 || [istarget spu-*-*] } {
4067 set et_natural_alignment_64_saved 1
4068 }
4069 }
4070 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
4071 return $et_natural_alignment_64_saved
4072 }
4073
4074 # Return 1 if all vector types are naturally aligned (aligned to their
4075 # type-size), 0 otherwise.
4076 #
4077 # This won't change for different subtargets so cache the result.
4078
4079 proc check_effective_target_vect_natural_alignment { } {
4080 global et_vect_natural_alignment
4081
4082 if [info exists et_vect_natural_alignment_saved] {
4083 verbose "check_effective_target_vect_natural_alignment: using cached result" 2
4084 } else {
4085 set et_vect_natural_alignment_saved 1
4086 if { [check_effective_target_arm_eabi] } {
4087 set et_vect_natural_alignment_saved 0
4088 }
4089 }
4090 verbose "check_effective_target_vect_natural_alignment: returning $et_vect_natural_alignment_saved" 2
4091 return $et_vect_natural_alignment_saved
4092 }
4093
4094 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
4095 #
4096 # This won't change for different subtargets so cache the result.
4097
4098 proc check_effective_target_vector_alignment_reachable { } {
4099 global et_vector_alignment_reachable
4100
4101 if [info exists et_vector_alignment_reachable_saved] {
4102 verbose "check_effective_target_vector_alignment_reachable: using cached result" 2
4103 } else {
4104 if { [check_effective_target_vect_aligned_arrays]
4105 || [check_effective_target_natural_alignment_32] } {
4106 set et_vector_alignment_reachable_saved 1
4107 } else {
4108 set et_vector_alignment_reachable_saved 0
4109 }
4110 }
4111 verbose "check_effective_target_vector_alignment_reachable: returning $et_vector_alignment_reachable_saved" 2
4112 return $et_vector_alignment_reachable_saved
4113 }
4114
4115 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
4116 #
4117 # This won't change for different subtargets so cache the result.
4118
4119 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
4120 global et_vector_alignment_reachable_for_64bit
4121
4122 if [info exists et_vector_alignment_reachable_for_64bit_saved] {
4123 verbose "check_effective_target_vector_alignment_reachable_for_64bit: using cached result" 2
4124 } else {
4125 if { [check_effective_target_vect_aligned_arrays]
4126 || [check_effective_target_natural_alignment_64] } {
4127 set et_vector_alignment_reachable_for_64bit_saved 1
4128 } else {
4129 set et_vector_alignment_reachable_for_64bit_saved 0
4130 }
4131 }
4132 verbose "check_effective_target_vector_alignment_reachable_for_64bit: returning $et_vector_alignment_reachable_for_64bit_saved" 2
4133 return $et_vector_alignment_reachable_for_64bit_saved
4134 }
4135
4136 # Return 1 if the target only requires element alignment for vector accesses
4137
4138 proc check_effective_target_vect_element_align { } {
4139 global et_vect_element_align
4140
4141 if [info exists et_vect_element_align] {
4142 verbose "check_effective_target_vect_element_align: using cached result" 2
4143 } else {
4144 set et_vect_element_align 0
4145 if { ([istarget arm*-*-*]
4146 && ![check_effective_target_arm_vect_no_misalign])
4147 || [check_effective_target_vect_hw_misalign] } {
4148 set et_vect_element_align 1
4149 }
4150 }
4151
4152 verbose "check_effective_target_vect_element_align: returning $et_vect_element_align" 2
4153 return $et_vect_element_align
4154 }
4155
4156 # Return 1 if the target supports vector conditional operations, 0 otherwise.
4157
4158 proc check_effective_target_vect_condition { } {
4159 global et_vect_cond_saved
4160
4161 if [info exists et_vect_cond_saved] {
4162 verbose "check_effective_target_vect_cond: using cached result" 2
4163 } else {
4164 set et_vect_cond_saved 0
4165 if { [istarget aarch64*-*-*]
4166 || [istarget powerpc*-*-*]
4167 || [istarget ia64-*-*]
4168 || [istarget i?86-*-*]
4169 || [istarget spu-*-*]
4170 || [istarget x86_64-*-*]
4171 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]) } {
4172 set et_vect_cond_saved 1
4173 }
4174 }
4175
4176 verbose "check_effective_target_vect_cond: returning $et_vect_cond_saved" 2
4177 return $et_vect_cond_saved
4178 }
4179
4180 # Return 1 if the target supports vector conditional operations where
4181 # the comparison has different type from the lhs, 0 otherwise.
4182
4183 proc check_effective_target_vect_cond_mixed { } {
4184 global et_vect_cond_mixed_saved
4185
4186 if [info exists et_vect_cond_mixed_saved] {
4187 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
4188 } else {
4189 set et_vect_cond_mixed_saved 0
4190 if { [istarget i?86-*-*]
4191 || [istarget x86_64-*-*]
4192 || [istarget powerpc*-*-*] } {
4193 set et_vect_cond_mixed_saved 1
4194 }
4195 }
4196
4197 verbose "check_effective_target_vect_cond_mixed: returning $et_vect_cond_mixed_saved" 2
4198 return $et_vect_cond_mixed_saved
4199 }
4200
4201 # Return 1 if the target supports vector char multiplication, 0 otherwise.
4202
4203 proc check_effective_target_vect_char_mult { } {
4204 global et_vect_char_mult_saved
4205
4206 if [info exists et_vect_char_mult_saved] {
4207 verbose "check_effective_target_vect_char_mult: using cached result" 2
4208 } else {
4209 set et_vect_char_mult_saved 0
4210 if { [istarget aarch64*-*-*]
4211 || [istarget ia64-*-*]
4212 || [istarget i?86-*-*]
4213 || [istarget x86_64-*-*]
4214 || [check_effective_target_arm32] } {
4215 set et_vect_char_mult_saved 1
4216 }
4217 }
4218
4219 verbose "check_effective_target_vect_char_mult: returning $et_vect_char_mult_saved" 2
4220 return $et_vect_char_mult_saved
4221 }
4222
4223 # Return 1 if the target supports vector short multiplication, 0 otherwise.
4224
4225 proc check_effective_target_vect_short_mult { } {
4226 global et_vect_short_mult_saved
4227
4228 if [info exists et_vect_short_mult_saved] {
4229 verbose "check_effective_target_vect_short_mult: using cached result" 2
4230 } else {
4231 set et_vect_short_mult_saved 0
4232 if { [istarget ia64-*-*]
4233 || [istarget spu-*-*]
4234 || [istarget i?86-*-*]
4235 || [istarget x86_64-*-*]
4236 || [istarget powerpc*-*-*]
4237 || [istarget aarch64*-*-*]
4238 || [check_effective_target_arm32]
4239 || ([istarget mips*-*-*]
4240 && [check_effective_target_mips_loongson]) } {
4241 set et_vect_short_mult_saved 1
4242 }
4243 }
4244
4245 verbose "check_effective_target_vect_short_mult: returning $et_vect_short_mult_saved" 2
4246 return $et_vect_short_mult_saved
4247 }
4248
4249 # Return 1 if the target supports vector int multiplication, 0 otherwise.
4250
4251 proc check_effective_target_vect_int_mult { } {
4252 global et_vect_int_mult_saved
4253
4254 if [info exists et_vect_int_mult_saved] {
4255 verbose "check_effective_target_vect_int_mult: using cached result" 2
4256 } else {
4257 set et_vect_int_mult_saved 0
4258 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
4259 || [istarget spu-*-*]
4260 || [istarget i?86-*-*]
4261 || [istarget x86_64-*-*]
4262 || [istarget ia64-*-*]
4263 || [istarget aarch64*-*-*]
4264 || [check_effective_target_arm32] } {
4265 set et_vect_int_mult_saved 1
4266 }
4267 }
4268
4269 verbose "check_effective_target_vect_int_mult: returning $et_vect_int_mult_saved" 2
4270 return $et_vect_int_mult_saved
4271 }
4272
4273 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
4274
4275 proc check_effective_target_vect_extract_even_odd { } {
4276 global et_vect_extract_even_odd_saved
4277
4278 if [info exists et_vect_extract_even_odd_saved] {
4279 verbose "check_effective_target_vect_extract_even_odd: using cached result" 2
4280 } else {
4281 set et_vect_extract_even_odd_saved 0
4282 if { [istarget aarch64*-*-*]
4283 || [istarget powerpc*-*-*]
4284 || [is-effective-target arm_neon_ok]
4285 || [istarget i?86-*-*]
4286 || [istarget x86_64-*-*]
4287 || [istarget ia64-*-*]
4288 || [istarget spu-*-*]
4289 || ([istarget mips*-*-*]
4290 && [check_effective_target_mpaired_single]) } {
4291 set et_vect_extract_even_odd_saved 1
4292 }
4293 }
4294
4295 verbose "check_effective_target_vect_extract_even_odd: returning $et_vect_extract_even_odd_saved" 2
4296 return $et_vect_extract_even_odd_saved
4297 }
4298
4299 # Return 1 if the target supports vector interleaving, 0 otherwise.
4300
4301 proc check_effective_target_vect_interleave { } {
4302 global et_vect_interleave_saved
4303
4304 if [info exists et_vect_interleave_saved] {
4305 verbose "check_effective_target_vect_interleave: using cached result" 2
4306 } else {
4307 set et_vect_interleave_saved 0
4308 if { [istarget aarch64*-*-*]
4309 || [istarget powerpc*-*-*]
4310 || [is-effective-target arm_neon_ok]
4311 || [istarget i?86-*-*]
4312 || [istarget x86_64-*-*]
4313 || [istarget ia64-*-*]
4314 || [istarget spu-*-*]
4315 || ([istarget mips*-*-*]
4316 && [check_effective_target_mpaired_single]) } {
4317 set et_vect_interleave_saved 1
4318 }
4319 }
4320
4321 verbose "check_effective_target_vect_interleave: returning $et_vect_interleave_saved" 2
4322 return $et_vect_interleave_saved
4323 }
4324
4325 foreach N {2 3 4 8} {
4326 eval [string map [list N $N] {
4327 # Return 1 if the target supports 2-vector interleaving
4328 proc check_effective_target_vect_stridedN { } {
4329 global et_vect_stridedN_saved
4330
4331 if [info exists et_vect_stridedN_saved] {
4332 verbose "check_effective_target_vect_stridedN: using cached result" 2
4333 } else {
4334 set et_vect_stridedN_saved 0
4335 if { (N & -N) == N
4336 && [check_effective_target_vect_interleave]
4337 && [check_effective_target_vect_extract_even_odd] } {
4338 set et_vect_stridedN_saved 1
4339 }
4340 if { ([istarget arm*-*-*]
4341 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
4342 set et_vect_stridedN_saved 1
4343 }
4344 }
4345
4346 verbose "check_effective_target_vect_stridedN: returning $et_vect_stridedN_saved" 2
4347 return $et_vect_stridedN_saved
4348 }
4349 }]
4350 }
4351
4352 # Return 1 if the target supports multiple vector sizes
4353
4354 proc check_effective_target_vect_multiple_sizes { } {
4355 global et_vect_multiple_sizes_saved
4356
4357 set et_vect_multiple_sizes_saved 0
4358 if { ([istarget aarch64*-*-*]
4359 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])) } {
4360 set et_vect_multiple_sizes_saved 1
4361 }
4362 if { ([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
4363 if { ([check_avx_available] && ![check_prefer_avx128]) } {
4364 set et_vect_multiple_sizes_saved 1
4365 }
4366 }
4367
4368 verbose "check_effective_target_vect_multiple_sizes: returning $et_vect_multiple_sizes_saved" 2
4369 return $et_vect_multiple_sizes_saved
4370 }
4371
4372 # Return 1 if the target supports vectors of 64 bits.
4373
4374 proc check_effective_target_vect64 { } {
4375 global et_vect64_saved
4376
4377 if [info exists et_vect64_saved] {
4378 verbose "check_effective_target_vect64: using cached result" 2
4379 } else {
4380 set et_vect64_saved 0
4381 if { ([istarget arm*-*-*]
4382 && [check_effective_target_arm_neon_ok]
4383 && [check_effective_target_arm_little_endian]) } {
4384 set et_vect64_saved 1
4385 }
4386 }
4387
4388 verbose "check_effective_target_vect64: returning $et_vect64_saved" 2
4389 return $et_vect64_saved
4390 }
4391
4392 # Return 1 if the target supports vector copysignf calls.
4393
4394 proc check_effective_target_vect_call_copysignf { } {
4395 global et_vect_call_copysignf_saved
4396
4397 if [info exists et_vect_call_copysignf_saved] {
4398 verbose "check_effective_target_vect_call_copysignf: using cached result" 2
4399 } else {
4400 set et_vect_call_copysignf_saved 0
4401 if { [istarget i?86-*-*]
4402 || [istarget x86_64-*-*]
4403 || [istarget powerpc*-*-*] } {
4404 set et_vect_call_copysignf_saved 1
4405 }
4406 }
4407
4408 verbose "check_effective_target_vect_call_copysignf: returning $et_vect_call_copysignf_saved" 2
4409 return $et_vect_call_copysignf_saved
4410 }
4411
4412 # Return 1 if the target supports vector sqrtf calls.
4413
4414 proc check_effective_target_vect_call_sqrtf { } {
4415 global et_vect_call_sqrtf_saved
4416
4417 if [info exists et_vect_call_sqrtf_saved] {
4418 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
4419 } else {
4420 set et_vect_call_sqrtf_saved 0
4421 if { [istarget aarch64*-*-*]
4422 || [istarget i?86-*-*]
4423 || [istarget x86_64-*-*]
4424 || ([istarget powerpc*-*-*] && [check_vsx_hw_available]) } {
4425 set et_vect_call_sqrtf_saved 1
4426 }
4427 }
4428
4429 verbose "check_effective_target_vect_call_sqrtf: returning $et_vect_call_sqrtf_saved" 2
4430 return $et_vect_call_sqrtf_saved
4431 }
4432
4433 # Return 1 if the target supports vector lrint calls.
4434
4435 proc check_effective_target_vect_call_lrint { } {
4436 set et_vect_call_lrint 0
4437 if { ([istarget i?86-*-*] || [istarget x86_64-*-*]) && [check_effective_target_ilp32] } {
4438 set et_vect_call_lrint 1
4439 }
4440
4441 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
4442 return $et_vect_call_lrint
4443 }
4444
4445 # Return 1 if the target supports vector btrunc calls.
4446
4447 proc check_effective_target_vect_call_btrunc { } {
4448 global et_vect_call_btrunc_saved
4449
4450 if [info exists et_vect_call_btrunc_saved] {
4451 verbose "check_effective_target_vect_call_btrunc: using cached result" 2
4452 } else {
4453 set et_vect_call_btrunc_saved 0
4454 if { [istarget aarch64*-*-*] } {
4455 set et_vect_call_btrunc_saved 1
4456 }
4457 }
4458
4459 verbose "check_effective_target_vect_call_btrunc: returning $et_vect_call_btrunc_saved" 2
4460 return $et_vect_call_btrunc_saved
4461 }
4462
4463 # Return 1 if the target supports vector btruncf calls.
4464
4465 proc check_effective_target_vect_call_btruncf { } {
4466 global et_vect_call_btruncf_saved
4467
4468 if [info exists et_vect_call_btruncf_saved] {
4469 verbose "check_effective_target_vect_call_btruncf: using cached result" 2
4470 } else {
4471 set et_vect_call_btruncf_saved 0
4472 if { [istarget aarch64*-*-*] } {
4473 set et_vect_call_btruncf_saved 1
4474 }
4475 }
4476
4477 verbose "check_effective_target_vect_call_btruncf: returning $et_vect_call_btruncf_saved" 2
4478 return $et_vect_call_btruncf_saved
4479 }
4480
4481 # Return 1 if the target supports vector ceil calls.
4482
4483 proc check_effective_target_vect_call_ceil { } {
4484 global et_vect_call_ceil_saved
4485
4486 if [info exists et_vect_call_ceil_saved] {
4487 verbose "check_effective_target_vect_call_ceil: using cached result" 2
4488 } else {
4489 set et_vect_call_ceil_saved 0
4490 if { [istarget aarch64*-*-*] } {
4491 set et_vect_call_ceil_saved 1
4492 }
4493 }
4494
4495 verbose "check_effective_target_vect_call_ceil: returning $et_vect_call_ceil_saved" 2
4496 return $et_vect_call_ceil_saved
4497 }
4498
4499 # Return 1 if the target supports vector ceilf calls.
4500
4501 proc check_effective_target_vect_call_ceilf { } {
4502 global et_vect_call_ceilf_saved
4503
4504 if [info exists et_vect_call_ceilf_saved] {
4505 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
4506 } else {
4507 set et_vect_call_ceilf_saved 0
4508 if { [istarget aarch64*-*-*] } {
4509 set et_vect_call_ceilf_saved 1
4510 }
4511 }
4512
4513 verbose "check_effective_target_vect_call_ceilf: returning $et_vect_call_ceilf_saved" 2
4514 return $et_vect_call_ceilf_saved
4515 }
4516
4517 # Return 1 if the target supports vector floor calls.
4518
4519 proc check_effective_target_vect_call_floor { } {
4520 global et_vect_call_floor_saved
4521
4522 if [info exists et_vect_call_floor_saved] {
4523 verbose "check_effective_target_vect_call_floor: using cached result" 2
4524 } else {
4525 set et_vect_call_floor_saved 0
4526 if { [istarget aarch64*-*-*] } {
4527 set et_vect_call_floor_saved 1
4528 }
4529 }
4530
4531 verbose "check_effective_target_vect_call_floor: returning $et_vect_call_floor_saved" 2
4532 return $et_vect_call_floor_saved
4533 }
4534
4535 # Return 1 if the target supports vector floorf calls.
4536
4537 proc check_effective_target_vect_call_floorf { } {
4538 global et_vect_call_floorf_saved
4539
4540 if [info exists et_vect_call_floorf_saved] {
4541 verbose "check_effective_target_vect_call_floorf: using cached result" 2
4542 } else {
4543 set et_vect_call_floorf_saved 0
4544 if { [istarget aarch64*-*-*] } {
4545 set et_vect_call_floorf_saved 1
4546 }
4547 }
4548
4549 verbose "check_effective_target_vect_call_floorf: returning $et_vect_call_floorf_saved" 2
4550 return $et_vect_call_floorf_saved
4551 }
4552
4553 # Return 1 if the target supports vector lceil calls.
4554
4555 proc check_effective_target_vect_call_lceil { } {
4556 global et_vect_call_lceil_saved
4557
4558 if [info exists et_vect_call_lceil_saved] {
4559 verbose "check_effective_target_vect_call_lceil: using cached result" 2
4560 } else {
4561 set et_vect_call_lceil_saved 0
4562 if { [istarget aarch64*-*-*] } {
4563 set et_vect_call_lceil_saved 1
4564 }
4565 }
4566
4567 verbose "check_effective_target_vect_call_lceil: returning $et_vect_call_lceil_saved" 2
4568 return $et_vect_call_lceil_saved
4569 }
4570
4571 # Return 1 if the target supports vector lfloor calls.
4572
4573 proc check_effective_target_vect_call_lfloor { } {
4574 global et_vect_call_lfloor_saved
4575
4576 if [info exists et_vect_call_lfloor_saved] {
4577 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
4578 } else {
4579 set et_vect_call_lfloor_saved 0
4580 if { [istarget aarch64*-*-*] } {
4581 set et_vect_call_lfloor_saved 1
4582 }
4583 }
4584
4585 verbose "check_effective_target_vect_call_lfloor: returning $et_vect_call_lfloor_saved" 2
4586 return $et_vect_call_lfloor_saved
4587 }
4588
4589 # Return 1 if the target supports vector nearbyint calls.
4590
4591 proc check_effective_target_vect_call_nearbyint { } {
4592 global et_vect_call_nearbyint_saved
4593
4594 if [info exists et_vect_call_nearbyint_saved] {
4595 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
4596 } else {
4597 set et_vect_call_nearbyint_saved 0
4598 if { [istarget aarch64*-*-*] } {
4599 set et_vect_call_nearbyint_saved 1
4600 }
4601 }
4602
4603 verbose "check_effective_target_vect_call_nearbyint: returning $et_vect_call_nearbyint_saved" 2
4604 return $et_vect_call_nearbyint_saved
4605 }
4606
4607 # Return 1 if the target supports vector nearbyintf calls.
4608
4609 proc check_effective_target_vect_call_nearbyintf { } {
4610 global et_vect_call_nearbyintf_saved
4611
4612 if [info exists et_vect_call_nearbyintf_saved] {
4613 verbose "check_effective_target_vect_call_nearbyintf: using cached result" 2
4614 } else {
4615 set et_vect_call_nearbyintf_saved 0
4616 if { [istarget aarch64*-*-*] } {
4617 set et_vect_call_nearbyintf_saved 1
4618 }
4619 }
4620
4621 verbose "check_effective_target_vect_call_nearbyintf: returning $et_vect_call_nearbyintf_saved" 2
4622 return $et_vect_call_nearbyintf_saved
4623 }
4624
4625 # Return 1 if the target supports vector round calls.
4626
4627 proc check_effective_target_vect_call_round { } {
4628 global et_vect_call_round_saved
4629
4630 if [info exists et_vect_call_round_saved] {
4631 verbose "check_effective_target_vect_call_round: using cached result" 2
4632 } else {
4633 set et_vect_call_round_saved 0
4634 if { [istarget aarch64*-*-*] } {
4635 set et_vect_call_round_saved 1
4636 }
4637 }
4638
4639 verbose "check_effective_target_vect_call_round: returning $et_vect_call_round_saved" 2
4640 return $et_vect_call_round_saved
4641 }
4642
4643 # Return 1 if the target supports vector roundf calls.
4644
4645 proc check_effective_target_vect_call_roundf { } {
4646 global et_vect_call_roundf_saved
4647
4648 if [info exists et_vect_call_roundf_saved] {
4649 verbose "check_effective_target_vect_call_roundf: using cached result" 2
4650 } else {
4651 set et_vect_call_roundf_saved 0
4652 if { [istarget aarch64*-*-*] } {
4653 set et_vect_call_roundf_saved 1
4654 }
4655 }
4656
4657 verbose "check_effective_target_vect_call_roundf: returning $et_vect_call_roundf_saved" 2
4658 return $et_vect_call_roundf_saved
4659 }
4660
4661 # Return 1 if the target supports section-anchors
4662
4663 proc check_effective_target_section_anchors { } {
4664 global et_section_anchors_saved
4665
4666 if [info exists et_section_anchors_saved] {
4667 verbose "check_effective_target_section_anchors: using cached result" 2
4668 } else {
4669 set et_section_anchors_saved 0
4670 if { [istarget powerpc*-*-*]
4671 || [istarget arm*-*-*] } {
4672 set et_section_anchors_saved 1
4673 }
4674 }
4675
4676 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
4677 return $et_section_anchors_saved
4678 }
4679
4680 # Return 1 if the target supports atomic operations on "int_128" values.
4681
4682 proc check_effective_target_sync_int_128 { } {
4683 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
4684 && ![is-effective-target ia32] } {
4685 return 1
4686 } else {
4687 return 0
4688 }
4689 }
4690
4691 # Return 1 if the target supports atomic operations on "int_128" values
4692 # and can execute them.
4693
4694 proc check_effective_target_sync_int_128_runtime { } {
4695 if { ([istarget x86_64-*-*] || [istarget i?86-*-*])
4696 && ![is-effective-target ia32] } {
4697 return [check_cached_effective_target sync_int_128_available {
4698 check_runtime_nocache sync_int_128_available {
4699 #include "cpuid.h"
4700 int main ()
4701 {
4702 unsigned int eax, ebx, ecx, edx;
4703 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
4704 return !(ecx & bit_CMPXCHG16B);
4705 return 1;
4706 }
4707 } ""
4708 }]
4709 } else {
4710 return 0
4711 }
4712 }
4713
4714 # Return 1 if the target supports atomic operations on "long long".
4715 #
4716 # Note: 32bit x86 targets require -march=pentium in dg-options.
4717
4718 proc check_effective_target_sync_long_long { } {
4719 if { [istarget x86_64-*-*]
4720 || [istarget i?86-*-*])
4721 || [istarget aarch64*-*-*]
4722 || [istarget arm*-*-*]
4723 || [istarget alpha*-*-*]
4724 || ([istarget sparc*-*-*] && [check_effective_target_lp64]) } {
4725 return 1
4726 } else {
4727 return 0
4728 }
4729 }
4730
4731 # Return 1 if the target supports atomic operations on "long long"
4732 # and can execute them.
4733 #
4734 # Note: 32bit x86 targets require -march=pentium in dg-options.
4735
4736 proc check_effective_target_sync_long_long_runtime { } {
4737 if { [istarget x86_64-*-*]
4738 || [istarget i?86-*-*] } {
4739 return [check_cached_effective_target sync_long_long_available {
4740 check_runtime_nocache sync_long_long_available {
4741 #include "cpuid.h"
4742 int main ()
4743 {
4744 unsigned int eax, ebx, ecx, edx;
4745 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
4746 return !(edx & bit_CMPXCHG8B);
4747 return 1;
4748 }
4749 } ""
4750 }]
4751 } elseif { [istarget aarch64*-*-*] } {
4752 return 1
4753 } elseif { [istarget arm*-*-linux-*] } {
4754 return [check_runtime sync_longlong_runtime {
4755 #include <stdlib.h>
4756 int main ()
4757 {
4758 long long l1;
4759
4760 if (sizeof (long long) != 8)
4761 exit (1);
4762
4763 /* Just check for native; checking for kernel fallback is tricky. */
4764 asm volatile ("ldrexd r0,r1, [%0]" : : "r" (&l1) : "r0", "r1");
4765
4766 exit (0);
4767 }
4768 } "" ]
4769 } elseif { [istarget alpha*-*-*] } {
4770 return 1
4771 } elseif { ([istarget sparc*-*-*]
4772 && [check_effective_target_lp64]
4773 && [check_effective_target_ultrasparc_hw]) } {
4774 return 1
4775 } elseif { [istarget powerpc*-*-*] && [check_effective_target_lp64] } {
4776 return 1
4777 } else {
4778 return 0
4779 }
4780 }
4781
4782 # Return 1 if the target supports atomic operations on "int" and "long".
4783
4784 proc check_effective_target_sync_int_long { } {
4785 global et_sync_int_long_saved
4786
4787 if [info exists et_sync_int_long_saved] {
4788 verbose "check_effective_target_sync_int_long: using cached result" 2
4789 } else {
4790 set et_sync_int_long_saved 0
4791 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
4792 # load-reserved/store-conditional instructions.
4793 if { [istarget ia64-*-*]
4794 || [istarget i?86-*-*]
4795 || [istarget x86_64-*-*]
4796 || [istarget aarch64*-*-*]
4797 || [istarget alpha*-*-*]
4798 || [istarget arm*-*-linux-*]
4799 || [istarget bfin*-*linux*]
4800 || [istarget hppa*-*linux*]
4801 || [istarget s390*-*-*]
4802 || [istarget powerpc*-*-*]
4803 || [istarget crisv32-*-*] || [istarget cris-*-*]
4804 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
4805 || [check_effective_target_mips_llsc] } {
4806 set et_sync_int_long_saved 1
4807 }
4808 }
4809
4810 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
4811 return $et_sync_int_long_saved
4812 }
4813
4814 # Return 1 if the target supports atomic operations on "char" and "short".
4815
4816 proc check_effective_target_sync_char_short { } {
4817 global et_sync_char_short_saved
4818
4819 if [info exists et_sync_char_short_saved] {
4820 verbose "check_effective_target_sync_char_short: using cached result" 2
4821 } else {
4822 set et_sync_char_short_saved 0
4823 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
4824 # load-reserved/store-conditional instructions.
4825 if { [istarget aarch64*-*-*]
4826 || [istarget ia64-*-*]
4827 || [istarget i?86-*-*]
4828 || [istarget x86_64-*-*]
4829 || [istarget alpha*-*-*]
4830 || [istarget arm*-*-linux-*]
4831 || [istarget hppa*-*linux*]
4832 || [istarget s390*-*-*]
4833 || [istarget powerpc*-*-*]
4834 || [istarget crisv32-*-*] || [istarget cris-*-*]
4835 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
4836 || [check_effective_target_mips_llsc] } {
4837 set et_sync_char_short_saved 1
4838 }
4839 }
4840
4841 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
4842 return $et_sync_char_short_saved
4843 }
4844
4845 # Return 1 if the target uses a ColdFire FPU.
4846
4847 proc check_effective_target_coldfire_fpu { } {
4848 return [check_no_compiler_messages coldfire_fpu assembly {
4849 #ifndef __mcffpu__
4850 #error FOO
4851 #endif
4852 }]
4853 }
4854
4855 # Return true if this is a uClibc target.
4856
4857 proc check_effective_target_uclibc {} {
4858 return [check_no_compiler_messages uclibc object {
4859 #include <features.h>
4860 #if !defined (__UCLIBC__)
4861 #error FOO
4862 #endif
4863 }]
4864 }
4865
4866 # Return true if this is a uclibc target and if the uclibc feature
4867 # described by __$feature__ is not present.
4868
4869 proc check_missing_uclibc_feature {feature} {
4870 return [check_no_compiler_messages $feature object "
4871 #include <features.h>
4872 #if !defined (__UCLIBC) || defined (__${feature}__)
4873 #error FOO
4874 #endif
4875 "]
4876 }
4877
4878 # Return true if this is a Newlib target.
4879
4880 proc check_effective_target_newlib {} {
4881 return [check_no_compiler_messages newlib object {
4882 #include <newlib.h>
4883 }]
4884 }
4885
4886 # Return true if this is NOT a Bionic target.
4887
4888 proc check_effective_target_non_bionic {} {
4889 return [check_no_compiler_messages non_bionic object {
4890 #include <ctype.h>
4891 #if defined (__BIONIC__)
4892 #error FOO
4893 #endif
4894 }]
4895 }
4896
4897 # Return 1 if
4898 # (a) an error of a few ULP is expected in string to floating-point
4899 # conversion functions; and
4900 # (b) overflow is not always detected correctly by those functions.
4901
4902 proc check_effective_target_lax_strtofp {} {
4903 # By default, assume that all uClibc targets suffer from this.
4904 return [check_effective_target_uclibc]
4905 }
4906
4907 # Return 1 if this is a target for which wcsftime is a dummy
4908 # function that always returns 0.
4909
4910 proc check_effective_target_dummy_wcsftime {} {
4911 # By default, assume that all uClibc targets suffer from this.
4912 return [check_effective_target_uclibc]
4913 }
4914
4915 # Return 1 if constructors with initialization priority arguments are
4916 # supposed on this target.
4917
4918 proc check_effective_target_init_priority {} {
4919 return [check_no_compiler_messages init_priority assembly "
4920 void f() __attribute__((constructor (1000)));
4921 void f() \{\}
4922 "]
4923 }
4924
4925 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
4926 # This can be used with any check_* proc that takes no argument and
4927 # returns only 1 or 0. It could be used with check_* procs that take
4928 # arguments with keywords that pass particular arguments.
4929
4930 proc is-effective-target { arg } {
4931 set selected 0
4932 if { [info procs check_effective_target_${arg}] != [list] } {
4933 set selected [check_effective_target_${arg}]
4934 } else {
4935 switch $arg {
4936 "vmx_hw" { set selected [check_vmx_hw_available] }
4937 "vsx_hw" { set selected [check_vsx_hw_available] }
4938 "p8vector_hw" { set selected [check_p8vector_hw_available] }
4939 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
4940 "named_sections" { set selected [check_named_sections_available] }
4941 "gc_sections" { set selected [check_gc_sections_available] }
4942 "cxa_atexit" { set selected [check_cxa_atexit_available] }
4943 default { error "unknown effective target keyword `$arg'" }
4944 }
4945 }
4946 verbose "is-effective-target: $arg $selected" 2
4947 return $selected
4948 }
4949
4950 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
4951
4952 proc is-effective-target-keyword { arg } {
4953 if { [info procs check_effective_target_${arg}] != [list] } {
4954 return 1
4955 } else {
4956 # These have different names for their check_* procs.
4957 switch $arg {
4958 "vmx_hw" { return 1 }
4959 "vsx_hw" { return 1 }
4960 "p8vector_hw" { return 1 }
4961 "ppc_recip_hw" { return 1 }
4962 "named_sections" { return 1 }
4963 "gc_sections" { return 1 }
4964 "cxa_atexit" { return 1 }
4965 default { return 0 }
4966 }
4967 }
4968 }
4969
4970 # Return 1 if target default to short enums
4971
4972 proc check_effective_target_short_enums { } {
4973 return [check_no_compiler_messages short_enums assembly {
4974 enum foo { bar };
4975 int s[sizeof (enum foo) == 1 ? 1 : -1];
4976 }]
4977 }
4978
4979 # Return 1 if target supports merging string constants at link time.
4980
4981 proc check_effective_target_string_merging { } {
4982 return [check_no_messages_and_pattern string_merging \
4983 "rodata\\.str" assembly {
4984 const char *var = "String";
4985 } {-O2}]
4986 }
4987
4988 # Return 1 if target has the basic signed and unsigned types in
4989 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
4990 # working <stdint.h> for all targets.
4991
4992 proc check_effective_target_stdint_types { } {
4993 return [check_no_compiler_messages stdint_types assembly {
4994 #include <stdint.h>
4995 int8_t a; int16_t b; int32_t c; int64_t d;
4996 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
4997 }]
4998 }
4999
5000 # Return 1 if target has the basic signed and unsigned types in
5001 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
5002 # these types agree with those in the header, as some systems have
5003 # only <inttypes.h>.
5004
5005 proc check_effective_target_inttypes_types { } {
5006 return [check_no_compiler_messages inttypes_types assembly {
5007 #include <inttypes.h>
5008 int8_t a; int16_t b; int32_t c; int64_t d;
5009 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
5010 }]
5011 }
5012
5013 # Return 1 if programs are intended to be run on a simulator
5014 # (i.e. slowly) rather than hardware (i.e. fast).
5015
5016 proc check_effective_target_simulator { } {
5017
5018 # All "src/sim" simulators set this one.
5019 if [board_info target exists is_simulator] {
5020 return [board_info target is_simulator]
5021 }
5022
5023 # The "sid" simulators don't set that one, but at least they set
5024 # this one.
5025 if [board_info target exists slow_simulator] {
5026 return [board_info target slow_simulator]
5027 }
5028
5029 return 0
5030 }
5031
5032 # Return 1 if programs are intended to be run on hardware rather than
5033 # on a simulator
5034
5035 proc check_effective_target_hw { } {
5036
5037 # All "src/sim" simulators set this one.
5038 if [board_info target exists is_simulator] {
5039 if [board_info target is_simulator] {
5040 return 0
5041 } else {
5042 return 1
5043 }
5044 }
5045
5046 # The "sid" simulators don't set that one, but at least they set
5047 # this one.
5048 if [board_info target exists slow_simulator] {
5049 if [board_info target slow_simulator] {
5050 return 0
5051 } else {
5052 return 1
5053 }
5054 }
5055
5056 return 1
5057 }
5058
5059 # Return 1 if the target is a VxWorks kernel.
5060
5061 proc check_effective_target_vxworks_kernel { } {
5062 return [check_no_compiler_messages vxworks_kernel assembly {
5063 #if !defined __vxworks || defined __RTP__
5064 #error NO
5065 #endif
5066 }]
5067 }
5068
5069 # Return 1 if the target is a VxWorks RTP.
5070
5071 proc check_effective_target_vxworks_rtp { } {
5072 return [check_no_compiler_messages vxworks_rtp assembly {
5073 #if !defined __vxworks || !defined __RTP__
5074 #error NO
5075 #endif
5076 }]
5077 }
5078
5079 # Return 1 if the target is expected to provide wide character support.
5080
5081 proc check_effective_target_wchar { } {
5082 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
5083 return 0
5084 }
5085 return [check_no_compiler_messages wchar assembly {
5086 #include <wchar.h>
5087 }]
5088 }
5089
5090 # Return 1 if the target has <pthread.h>.
5091
5092 proc check_effective_target_pthread_h { } {
5093 return [check_no_compiler_messages pthread_h assembly {
5094 #include <pthread.h>
5095 }]
5096 }
5097
5098 # Return 1 if the target can truncate a file from a file-descriptor,
5099 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
5100 # chsize. We test for a trivially functional truncation; no stubs.
5101 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
5102 # different function to be used.
5103
5104 proc check_effective_target_fd_truncate { } {
5105 set prog {
5106 #define _FILE_OFFSET_BITS 64
5107 #include <unistd.h>
5108 #include <stdio.h>
5109 #include <stdlib.h>
5110 int main ()
5111 {
5112 FILE *f = fopen ("tst.tmp", "wb");
5113 int fd;
5114 const char t[] = "test writing more than ten characters";
5115 char s[11];
5116 int status = 0;
5117 fd = fileno (f);
5118 write (fd, t, sizeof (t) - 1);
5119 lseek (fd, 0, 0);
5120 if (ftruncate (fd, 10) != 0)
5121 status = 1;
5122 close (fd);
5123 fclose (f);
5124 if (status)
5125 {
5126 unlink ("tst.tmp");
5127 exit (status);
5128 }
5129 f = fopen ("tst.tmp", "rb");
5130 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
5131 status = 1;
5132 fclose (f);
5133 unlink ("tst.tmp");
5134 exit (status);
5135 }
5136 }
5137
5138 if { [check_runtime ftruncate $prog] } {
5139 return 1;
5140 }
5141
5142 regsub "ftruncate" $prog "chsize" prog
5143 return [check_runtime chsize $prog]
5144 }
5145
5146 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
5147
5148 proc add_options_for_c99_runtime { flags } {
5149 if { [istarget *-*-solaris2*] } {
5150 return "$flags -std=c99"
5151 }
5152 if { [istarget powerpc-*-darwin*] } {
5153 return "$flags -mmacosx-version-min=10.3"
5154 }
5155 return $flags
5156 }
5157
5158 # Add to FLAGS all the target-specific flags needed to enable
5159 # full IEEE compliance mode.
5160
5161 proc add_options_for_ieee { flags } {
5162 if { [istarget alpha*-*-*]
5163 || [istarget sh*-*-*] } {
5164 return "$flags -mieee"
5165 }
5166 if { [istarget rx-*-*] } {
5167 return "$flags -mnofpu"
5168 }
5169 return $flags
5170 }
5171
5172 # Add to FLAGS the flags needed to enable functions to bind locally
5173 # when using pic/PIC passes in the testsuite.
5174
5175 proc add_options_for_bind_pic_locally { flags } {
5176 if {[check_no_compiler_messages using_pic2 assembly {
5177 #if __PIC__ != 2
5178 #error FOO
5179 #endif
5180 }]} {
5181 return "$flags -fPIE"
5182 }
5183 if {[check_no_compiler_messages using_pic1 assembly {
5184 #if __PIC__ != 1
5185 #error FOO
5186 #endif
5187 }]} {
5188 return "$flags -fpie"
5189 }
5190
5191 return $flags
5192 }
5193
5194 # Add to FLAGS the flags needed to enable 64-bit vectors.
5195
5196 proc add_options_for_double_vectors { flags } {
5197 if [is-effective-target arm_neon_ok] {
5198 return "$flags -mvectorize-with-neon-double"
5199 }
5200
5201 return $flags
5202 }
5203
5204 # Return 1 if the target provides a full C99 runtime.
5205
5206 proc check_effective_target_c99_runtime { } {
5207 return [check_cached_effective_target c99_runtime {
5208 global srcdir
5209
5210 set file [open "$srcdir/gcc.dg/builtins-config.h"]
5211 set contents [read $file]
5212 close $file
5213 append contents {
5214 #ifndef HAVE_C99_RUNTIME
5215 #error FOO
5216 #endif
5217 }
5218 check_no_compiler_messages_nocache c99_runtime assembly \
5219 $contents [add_options_for_c99_runtime ""]
5220 }]
5221 }
5222
5223 # Return 1 if target wchar_t is at least 4 bytes.
5224
5225 proc check_effective_target_4byte_wchar_t { } {
5226 return [check_no_compiler_messages 4byte_wchar_t object {
5227 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
5228 }]
5229 }
5230
5231 # Return 1 if the target supports automatic stack alignment.
5232
5233 proc check_effective_target_automatic_stack_alignment { } {
5234 # Ordinarily x86 supports automatic stack alignment ...
5235 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
5236 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
5237 # ... except Win64 SEH doesn't. Succeed for Win32 though.
5238 return [check_effective_target_ilp32];
5239 }
5240 return 1;
5241 }
5242 return 0;
5243 }
5244
5245 # Return true if we are compiling for AVX target.
5246
5247 proc check_avx_available { } {
5248 if { [check_no_compiler_messages avx_available assembly {
5249 #ifndef __AVX__
5250 #error unsupported
5251 #endif
5252 } ""] } {
5253 return 1;
5254 }
5255 return 0;
5256 }
5257
5258 # Return true if 32- and 16-bytes vectors are available.
5259
5260 proc check_effective_target_vect_sizes_32B_16B { } {
5261 return [check_avx_available];
5262 }
5263
5264 # Return true if 128-bits vectors are preferred even if 256-bits vectors
5265 # are available.
5266
5267 proc check_prefer_avx128 { } {
5268 if ![check_avx_available] {
5269 return 0;
5270 }
5271 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
5272 float a[1024],b[1024],c[1024];
5273 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
5274 } "-O2 -ftree-vectorize"]
5275 }
5276
5277
5278 # Return 1 if avx512f instructions can be compiled.
5279
5280 proc check_effective_target_avx512f { } {
5281 return [check_no_compiler_messages avx512f object {
5282 typedef double __m512d __attribute__ ((__vector_size__ (64)));
5283
5284 __m512d _mm512_add (__m512d a)
5285 {
5286 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
5287 }
5288 } "-O2 -mavx512f" ]
5289 }
5290
5291 # Return 1 if avx instructions can be compiled.
5292
5293 proc check_effective_target_avx { } {
5294 return [check_no_compiler_messages avx object {
5295 void _mm256_zeroall (void)
5296 {
5297 __builtin_ia32_vzeroall ();
5298 }
5299 } "-O2 -mavx" ]
5300 }
5301
5302 # Return 1 if avx2 instructions can be compiled.
5303 proc check_effective_target_avx2 { } {
5304 return [check_no_compiler_messages avx2 object {
5305 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
5306 __v4di
5307 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
5308 {
5309 return __builtin_ia32_andnotsi256 (__X, __Y);
5310 }
5311 } "-O0 -mavx2" ]
5312 }
5313
5314 # Return 1 if sse instructions can be compiled.
5315 proc check_effective_target_sse { } {
5316 return [check_no_compiler_messages sse object {
5317 int main ()
5318 {
5319 __builtin_ia32_stmxcsr ();
5320 return 0;
5321 }
5322 } "-O2 -msse" ]
5323 }
5324
5325 # Return 1 if sse2 instructions can be compiled.
5326 proc check_effective_target_sse2 { } {
5327 return [check_no_compiler_messages sse2 object {
5328 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
5329
5330 __m128i _mm_srli_si128 (__m128i __A, int __N)
5331 {
5332 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
5333 }
5334 } "-O2 -msse2" ]
5335 }
5336
5337 # Return 1 if F16C instructions can be compiled.
5338
5339 proc check_effective_target_f16c { } {
5340 return [check_no_compiler_messages f16c object {
5341 #include "immintrin.h"
5342 float
5343 foo (unsigned short val)
5344 {
5345 return _cvtsh_ss (val);
5346 }
5347 } "-O2 -mf16c" ]
5348 }
5349
5350 # Return 1 if C wchar_t type is compatible with char16_t.
5351
5352 proc check_effective_target_wchar_t_char16_t_compatible { } {
5353 return [check_no_compiler_messages wchar_t_char16_t object {
5354 __WCHAR_TYPE__ wc;
5355 __CHAR16_TYPE__ *p16 = &wc;
5356 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
5357 }]
5358 }
5359
5360 # Return 1 if C wchar_t type is compatible with char32_t.
5361
5362 proc check_effective_target_wchar_t_char32_t_compatible { } {
5363 return [check_no_compiler_messages wchar_t_char32_t object {
5364 __WCHAR_TYPE__ wc;
5365 __CHAR32_TYPE__ *p32 = &wc;
5366 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
5367 }]
5368 }
5369
5370 # Return 1 if pow10 function exists.
5371
5372 proc check_effective_target_pow10 { } {
5373 return [check_runtime pow10 {
5374 #include <math.h>
5375 int main () {
5376 double x;
5377 x = pow10 (1);
5378 return 0;
5379 }
5380 } "-lm" ]
5381 }
5382
5383 # Return 1 if current options generate DFP instructions, 0 otherwise.
5384
5385 proc check_effective_target_hard_dfp {} {
5386 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
5387 typedef float d64 __attribute__((mode(DD)));
5388 d64 x, y, z;
5389 void foo (void) { z = x + y; }
5390 }]
5391 }
5392
5393 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
5394 # for strchr etc. functions.
5395
5396 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
5397 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
5398 #include <string.h>
5399 #include <wchar.h>
5400 #if !defined(__cplusplus) \
5401 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
5402 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
5403 ISO C++ correct string.h and wchar.h protos not supported.
5404 #else
5405 int i;
5406 #endif
5407 }]
5408 }
5409
5410 # Return 1 if GNU as is used.
5411
5412 proc check_effective_target_gas { } {
5413 global use_gas_saved
5414 global tool
5415
5416 if {![info exists use_gas_saved]} {
5417 # Check if the as used by gcc is GNU as.
5418 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
5419 # Provide /dev/null as input, otherwise gas times out reading from
5420 # stdin.
5421 set status [remote_exec host "$gcc_as" "-v /dev/null"]
5422 set as_output [lindex $status 1]
5423 if { [ string first "GNU" $as_output ] >= 0 } {
5424 set use_gas_saved 1
5425 } else {
5426 set use_gas_saved 0
5427 }
5428 }
5429 return $use_gas_saved
5430 }
5431
5432 # Return 1 if GNU ld is used.
5433
5434 proc check_effective_target_gld { } {
5435 global use_gld_saved
5436 global tool
5437
5438 if {![info exists use_gld_saved]} {
5439 # Check if the ld used by gcc is GNU ld.
5440 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
5441 set status [remote_exec host "$gcc_ld" "--version"]
5442 set ld_output [lindex $status 1]
5443 if { [ string first "GNU" $ld_output ] >= 0 } {
5444 set use_gld_saved 1
5445 } else {
5446 set use_gld_saved 0
5447 }
5448 }
5449 return $use_gld_saved
5450 }
5451
5452 # Return 1 if the compiler has been configure with link-time optimization
5453 # (LTO) support.
5454
5455 proc check_effective_target_lto { } {
5456 global ENABLE_LTO
5457 return [info exists ENABLE_LTO]
5458 }
5459
5460 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
5461
5462 proc check_effective_target_maybe_x32 { } {
5463 return [check_no_compiler_messages maybe_x32 object {
5464 void foo (void) {}
5465 } "-mx32 -maddress-mode=short"]
5466 }
5467
5468 # Return 1 if this target supports the -fsplit-stack option, 0
5469 # otherwise.
5470
5471 proc check_effective_target_split_stack {} {
5472 return [check_no_compiler_messages split_stack object {
5473 void foo (void) { }
5474 } "-fsplit-stack"]
5475 }
5476
5477 # Return 1 if this target supports the -masm=intel option, 0
5478 # otherwise
5479
5480 proc check_effective_target_masm_intel {} {
5481 return [check_no_compiler_messages masm_intel object {
5482 extern void abort (void);
5483 } "-masm=intel"]
5484 }
5485
5486 # Return 1 if the language for the compiler under test is C.
5487
5488 proc check_effective_target_c { } {
5489 global tool
5490 if [string match $tool "gcc"] {
5491 return 1
5492 }
5493 return 0
5494 }
5495
5496 # Return 1 if the language for the compiler under test is C++.
5497
5498 proc check_effective_target_c++ { } {
5499 global tool
5500 if [string match $tool "g++"] {
5501 return 1
5502 }
5503 return 0
5504 }
5505
5506 # Check whether the current active language standard supports the features
5507 # of C++11/C++1y by checking for the presence of one of the -std
5508 # flags. This assumes that the default for the compiler is C++98, and that
5509 # there will never be multiple -std= arguments on the command line.
5510 proc check_effective_target_c++11_only { } {
5511 if ![check_effective_target_c++] {
5512 return 0
5513 }
5514 return [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }]
5515 }
5516 proc check_effective_target_c++11 { } {
5517 if [check_effective_target_c++11_only] {
5518 return 1
5519 }
5520 return [check_effective_target_c++1y]
5521 }
5522 proc check_effective_target_c++11_down { } {
5523 if ![check_effective_target_c++] {
5524 return 0
5525 }
5526 return ![check_effective_target_c++1y]
5527 }
5528
5529 proc check_effective_target_c++1y_only { } {
5530 if ![check_effective_target_c++] {
5531 return 0
5532 }
5533 return [check-flags { { } { } { -std=c++1y -std=gnu++1y -std=c++14 -std=gnu++14 } }]
5534 }
5535 proc check_effective_target_c++1y { } {
5536 return [check_effective_target_c++1y_only]
5537 }
5538
5539 proc check_effective_target_c++98_only { } {
5540 if ![check_effective_target_c++] {
5541 return 0
5542 }
5543 return ![check_effective_target_c++11]
5544 }
5545
5546 # Return 1 if expensive testcases should be run.
5547
5548 proc check_effective_target_run_expensive_tests { } {
5549 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
5550 return 1
5551 }
5552 return 0
5553 }
5554
5555 # Returns 1 if "mempcpy" is available on the target system.
5556
5557 proc check_effective_target_mempcpy {} {
5558 return [check_function_available "mempcpy"]
5559 }
5560
5561 # Check whether the vectorizer tests are supported by the target and
5562 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
5563 # Set dg-do-what-default to either compile or run, depending on target
5564 # capabilities. Return 1 if vectorizer tests are supported by
5565 # target, 0 otherwise.
5566
5567 proc check_vect_support_and_set_flags { } {
5568 global DEFAULT_VECTCFLAGS
5569 global dg-do-what-default
5570
5571 if [istarget powerpc-*paired*] {
5572 lappend DEFAULT_VECTCFLAGS "-mpaired"
5573 if [check_750cl_hw_available] {
5574 set dg-do-what-default run
5575 } else {
5576 set dg-do-what-default compile
5577 }
5578 } elseif [istarget powerpc*-*-*] {
5579 # Skip targets not supporting -maltivec.
5580 if ![is-effective-target powerpc_altivec_ok] {
5581 return 0
5582 }
5583
5584 lappend DEFAULT_VECTCFLAGS "-maltivec"
5585 if [check_p8vector_hw_available] {
5586 lappend DEFAULT_VECTCFLAGS "-mpower8-vector" "-mno-allow-movmisalign"
5587 } elseif [check_vsx_hw_available] {
5588 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
5589 }
5590
5591 if [check_vmx_hw_available] {
5592 set dg-do-what-default run
5593 } else {
5594 if [is-effective-target ilp32] {
5595 # Specify a cpu that supports VMX for compile-only tests.
5596 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
5597 }
5598 set dg-do-what-default compile
5599 }
5600 } elseif { [istarget spu-*-*] } {
5601 set dg-do-what-default run
5602 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
5603 lappend DEFAULT_VECTCFLAGS "-msse2"
5604 if { [check_effective_target_sse2_runtime] } {
5605 set dg-do-what-default run
5606 } else {
5607 set dg-do-what-default compile
5608 }
5609 } elseif { [istarget mips*-*-*]
5610 && ([check_effective_target_mpaired_single]
5611 || [check_effective_target_mips_loongson])
5612 && [check_effective_target_nomips16] } {
5613 if { [check_effective_target_mpaired_single] } {
5614 lappend DEFAULT_VECTCFLAGS "-mpaired-single"
5615 }
5616 set dg-do-what-default run
5617 } elseif [istarget sparc*-*-*] {
5618 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
5619 if [check_effective_target_ultrasparc_hw] {
5620 set dg-do-what-default run
5621 } else {
5622 set dg-do-what-default compile
5623 }
5624 } elseif [istarget alpha*-*-*] {
5625 # Alpha's vectorization capabilities are extremely limited.
5626 # It's more effort than its worth disabling all of the tests
5627 # that it cannot pass. But if you actually want to see what
5628 # does work, command out the return.
5629 return 0
5630
5631 lappend DEFAULT_VECTCFLAGS "-mmax"
5632 if [check_alpha_max_hw_available] {
5633 set dg-do-what-default run
5634 } else {
5635 set dg-do-what-default compile
5636 }
5637 } elseif [istarget ia64-*-*] {
5638 set dg-do-what-default run
5639 } elseif [is-effective-target arm_neon_ok] {
5640 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
5641 # NEON does not support denormals, so is not used for vectorization by
5642 # default to avoid loss of precision. We must pass -ffast-math to test
5643 # vectorization of float operations.
5644 lappend DEFAULT_VECTCFLAGS "-ffast-math"
5645 if [is-effective-target arm_neon_hw] {
5646 set dg-do-what-default run
5647 } else {
5648 set dg-do-what-default compile
5649 }
5650 } elseif [istarget "aarch64*-*-*"] {
5651 set dg-do-what-default run
5652 } else {
5653 return 0
5654 }
5655
5656 return 1
5657 }
5658
5659 proc check_effective_target_non_strict_align {} {
5660 return [check_no_compiler_messages non_strict_align assembly {
5661 char *y;
5662 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
5663 c *z;
5664 void foo(void) { z = (c *) y; }
5665 } "-Wcast-align"]
5666 }
5667
5668 # Return 1 if the target has <ucontext.h>.
5669
5670 proc check_effective_target_ucontext_h { } {
5671 return [check_no_compiler_messages ucontext_h assembly {
5672 #include <ucontext.h>
5673 }]
5674 }
5675
5676 proc check_effective_target_aarch64_tiny { } {
5677 if { [istarget aarch64*-*-*] } {
5678 return [check_no_compiler_messages aarch64_tiny object {
5679 #ifdef __AARCH64_CMODEL_TINY__
5680 int dummy;
5681 #else
5682 #error target not AArch64 tiny code model
5683 #endif
5684 }]
5685 } else {
5686 return 0
5687 }
5688 }
5689
5690 proc check_effective_target_aarch64_small { } {
5691 if { [istarget aarch64*-*-*] } {
5692 return [check_no_compiler_messages aarch64_small object {
5693 #ifdef __AARCH64_CMODEL_SMALL__
5694 int dummy;
5695 #else
5696 #error target not AArch64 small code model
5697 #endif
5698 }]
5699 } else {
5700 return 0
5701 }
5702 }
5703
5704 proc check_effective_target_aarch64_large { } {
5705 if { [istarget aarch64*-*-*] } {
5706 return [check_no_compiler_messages aarch64_large object {
5707 #ifdef __AARCH64_CMODEL_LARGE__
5708 int dummy;
5709 #else
5710 #error target not AArch64 large code model
5711 #endif
5712 }]
5713 } else {
5714 return 0
5715 }
5716 }
5717
5718 # Return 1 if <fenv.h> is available with all the standard IEEE
5719 # exceptions and floating-point exceptions are raised by arithmetic
5720 # operations. (If the target requires special options for "inexact"
5721 # exceptions, those need to be specified in the testcases.)
5722
5723 proc check_effective_target_fenv_exceptions {} {
5724 return [check_runtime fenv_exceptions {
5725 #include <fenv.h>
5726 #include <stdlib.h>
5727 #ifndef FE_DIVBYZERO
5728 # error Missing FE_DIVBYZERO
5729 #endif
5730 #ifndef FE_INEXACT
5731 # error Missing FE_INEXACT
5732 #endif
5733 #ifndef FE_INVALID
5734 # error Missing FE_INVALID
5735 #endif
5736 #ifndef FE_OVERFLOW
5737 # error Missing FE_OVERFLOW
5738 #endif
5739 #ifndef FE_UNDERFLOW
5740 # error Missing FE_UNDERFLOW
5741 #endif
5742 volatile float a = 0.0f, r;
5743 int
5744 main (void)
5745 {
5746 r = a / a;
5747 if (fetestexcept (FE_INVALID))
5748 exit (0);
5749 else
5750 abort ();
5751 }
5752 } "-std=gnu99"]
5753 }
5754
5755 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
5756
5757 proc check_effective_target_logical_op_short_circuit {} {
5758 if { [istarget mips*-*-*]
5759 || [istarget arc*-*-*]
5760 || [istarget avr*-*-*]
5761 || [istarget crisv32-*-*] || [istarget cris-*-*]
5762 || [istarget s390*-*-*]
5763 || [check_effective_target_arm_cortex_m] } {
5764 return 1
5765 }
5766 return 0
5767 }
5768
5769 # Record that dg-final test TEST requires convential compilation.
5770
5771 proc force_conventional_output_for { test } {
5772 if { [info proc $test] == "" } {
5773 perror "$test does not exist"
5774 exit 1
5775 }
5776 proc ${test}_required_options {} {
5777 global gcc_force_conventional_output
5778 return $gcc_force_conventional_output
5779 }
5780 }
5781