1 # Copyright (C) 1999-2018 Free Software Foundation, Inc.
3 # This program is free software; you can redistribute it and/or modify
4 # it under the terms of the GNU General Public License as published by
5 # the Free Software Foundation; either version 3 of the License, or
6 # (at your option) any later version.
8 # This program is distributed in the hope that it will be useful,
9 # but WITHOUT ANY WARRANTY; without even the implied warranty of
10 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 # GNU General Public License for more details.
13 # You should have received a copy of the GNU General Public License
14 # along with GCC; see the file COPYING3. If not see
15 # <http://www.gnu.org/licenses/>.
17 # Please email any bugs, comments, and/or additions to this file to:
18 # gcc-patches@gcc.gnu.org
20 # This file defines procs for determining features supported by the target.
22 # Try to compile the code given by CONTENTS into an output file of
23 # type TYPE, where TYPE is as for target_compile. Return a list
24 # whose first element contains the compiler messages and whose
25 # second element is the name of the output file.
27 # BASENAME is a prefix to use for source and output files.
28 # If ARGS is not empty, its first element is a string that
29 # should be added to the command line.
31 # Assume by default that CONTENTS is C code.
32 # Otherwise, code should contain:
34 # "! Fortran" for Fortran code,
36 # "// ObjC++" for ObjC++
38 # If the tool is ObjC/ObjC++ then we overide the extension to .m/.mm to
39 # allow for ObjC/ObjC++ specific flags.
40 proc check_compile {basename type contents args} {
42 verbose "check_compile tool: $tool for $basename"
44 # Save additional_sources to avoid compiling testsuite's sources
45 # against check_compile's source.
46 global additional_sources
47 if [info exists additional_sources] {
48 set tmp_additional_sources "$additional_sources"
49 set additional_sources ""
52 if { [llength $args] > 0 } {
53 set options [list "additional_flags=[lindex $args 0]"]
57 switch -glob -- $contents {
58 "*! Fortran*" { set src ${basename}[pid].f90 }
59 "*// C++*" { set src ${basename}[pid].cc }
60 "*// ObjC++*" { set src ${basename}[pid].mm }
61 "*/* ObjC*" { set src ${basename}[pid].m }
62 "*// Go*" { set src ${basename}[pid].go }
65 "objc" { set src ${basename}[pid].m }
66 "obj-c++" { set src ${basename}[pid].mm }
67 default { set src ${basename}[pid].c }
72 set compile_type $type
74 assembly { set output ${basename}[pid].s }
75 object { set output ${basename}[pid].o }
76 executable { set output ${basename}[pid].exe }
78 set output ${basename}[pid].s
79 lappend options "additional_flags=-fdump-$type"
80 set compile_type assembly
86 set lines [${tool}_target_compile $src $output $compile_type "$options"]
89 set scan_output $output
90 # Don't try folding this into the switch above; calling "glob" before the
91 # file is created won't work.
92 if [regexp "rtl-(.*)" $type dummy rtl_type] {
93 set scan_output "[glob $src.\[0-9\]\[0-9\]\[0-9\]r.$rtl_type]"
97 # Restore additional_sources.
98 if [info exists additional_sources] {
99 set additional_sources "$tmp_additional_sources"
102 return [list $lines $scan_output]
105 proc current_target_name { } {
107 if [info exists target_info(target,name)] {
108 set answer $target_info(target,name)
115 # Implement an effective-target check for property PROP by invoking
116 # the Tcl command ARGS and seeing if it returns true.
118 proc check_cached_effective_target { prop args } {
122 set target [current_target_name]
123 if {![info exists et_cache($prop,target)]
124 || $et_cache($prop,target) != $target} {
125 verbose "check_cached_effective_target $prop: checking $target" 2
126 set et_cache($prop,target) $target
127 set et_cache($prop,value) [uplevel eval $args]
128 if {![info exists et_prop_list]
129 || [lsearch $et_prop_list $prop] < 0} {
130 lappend et_prop_list $prop
132 verbose "check_cached_effective_target cached list is now: $et_prop_list" 2
134 set value $et_cache($prop,value)
135 verbose "check_cached_effective_target $prop: returning $value for $target" 2
139 # Clear effective-target cache. This is useful after testing
140 # effective-target features and overriding TEST_ALWAYS_FLAGS and/or
142 # If one changes ALWAYS_CXXFLAGS or TEST_ALWAYS_FLAGS then they should
143 # do a clear_effective_target_cache at the end as the target cache can
144 # make decisions based upon the flags, and those decisions need to be
145 # redone when the flags change. An example of this is the
146 # asan_init/asan_finish pair.
148 proc clear_effective_target_cache { } {
152 if {[info exists et_prop_list]} {
153 verbose "clear_effective_target_cache: $et_prop_list" 2
154 foreach prop $et_prop_list {
155 unset et_cache($prop,value)
156 unset et_cache($prop,target)
162 # Like check_compile, but delete the output file and return true if the
163 # compiler printed no messages.
164 proc check_no_compiler_messages_nocache {args} {
165 set result [eval check_compile $args]
166 set lines [lindex $result 0]
167 set output [lindex $result 1]
168 remote_file build delete $output
169 return [string match "" $lines]
172 # Like check_no_compiler_messages_nocache, but cache the result.
173 # PROP is the property we're checking, and doubles as a prefix for
174 # temporary filenames.
175 proc check_no_compiler_messages {prop args} {
176 return [check_cached_effective_target $prop {
177 eval [list check_no_compiler_messages_nocache $prop] $args
181 # Like check_compile, but return true if the compiler printed no
182 # messages and if the contents of the output file satisfy PATTERN.
183 # If PATTERN has the form "!REGEXP", the contents satisfy it if they
184 # don't match regular expression REGEXP, otherwise they satisfy it
185 # if they do match regular expression PATTERN. (PATTERN can start
186 # with something like "[!]" if the regular expression needs to match
187 # "!" as the first character.)
189 # Delete the output file before returning. The other arguments are
190 # as for check_compile.
191 proc check_no_messages_and_pattern_nocache {basename pattern args} {
194 set result [eval [list check_compile $basename] $args]
195 set lines [lindex $result 0]
196 set output [lindex $result 1]
199 if { [string match "" $lines] } {
200 set chan [open "$output"]
201 set invert [regexp {^!(.*)} $pattern dummy pattern]
202 set ok [expr { [regexp $pattern [read $chan]] != $invert }]
206 remote_file build delete $output
210 # Like check_no_messages_and_pattern_nocache, but cache the result.
211 # PROP is the property we're checking, and doubles as a prefix for
212 # temporary filenames.
213 proc check_no_messages_and_pattern {prop pattern args} {
214 return [check_cached_effective_target $prop {
215 eval [list check_no_messages_and_pattern_nocache $prop $pattern] $args
219 # Try to compile and run an executable from code CONTENTS. Return true
220 # if the compiler reports no messages and if execution "passes" in the
221 # usual DejaGNU sense. The arguments are as for check_compile, with
222 # TYPE implicitly being "executable".
223 proc check_runtime_nocache {basename contents args} {
226 set result [eval [list check_compile $basename executable $contents] $args]
227 set lines [lindex $result 0]
228 set output [lindex $result 1]
231 if { [string match "" $lines] } {
232 # No error messages, everything is OK.
233 set result [remote_load target "./$output" "" ""]
234 set status [lindex $result 0]
235 verbose "check_runtime_nocache $basename: status is <$status>" 2
236 if { $status == "pass" } {
240 remote_file build delete $output
244 # Like check_runtime_nocache, but cache the result. PROP is the
245 # property we're checking, and doubles as a prefix for temporary
247 proc check_runtime {prop args} {
250 return [check_cached_effective_target $prop {
251 eval [list check_runtime_nocache $prop] $args
255 # Return 1 if GCC was configured with $pattern.
256 proc check_configured_with { pattern } {
259 set gcc_output [${tool}_target_compile "-v" "" "none" ""]
260 if { [ regexp "Configured with: \[^\n\]*$pattern" $gcc_output ] } {
261 verbose "Matched: $pattern" 2
265 verbose "Failed to match: $pattern" 2
269 ###############################
270 # proc check_weak_available { }
271 ###############################
273 # weak symbols are only supported in some configs/object formats
274 # this proc returns 1 if they're supported, 0 if they're not, or -1 if unsure
276 proc check_weak_available { } {
279 # All mips targets should support it
281 if { [ string first "mips" $target_cpu ] >= 0 } {
285 # All AIX targets should support it
287 if { [istarget *-*-aix*] } {
291 # All solaris2 targets should support it
293 if { [istarget *-*-solaris2*] } {
297 # Windows targets Cygwin and MingW32 support it
299 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
303 # HP-UX 10.X doesn't support it
305 if { [istarget hppa*-*-hpux10*] } {
309 # nvptx (nearly) supports it
311 if { [istarget nvptx-*-*] } {
315 # ELF and ECOFF support it. a.out does with gas/gld but may also with
316 # other linkers, so we should try it
318 set objformat [gcc_target_object_format]
326 unknown { return -1 }
331 # return 1 if weak undefined symbols are supported.
333 proc check_effective_target_weak_undefined { } {
334 return [check_runtime weak_undefined {
335 extern void foo () __attribute__((weak));
336 int main (void) { if (foo) return 1; return 0; }
340 ###############################
341 # proc check_weak_override_available { }
342 ###############################
344 # Like check_weak_available, but return 0 if weak symbol definitions
345 # cannot be overridden.
347 proc check_weak_override_available { } {
348 if { [istarget *-*-mingw*] } {
351 return [check_weak_available]
354 ###############################
355 # proc check_visibility_available { what_kind }
356 ###############################
358 # The visibility attribute is only support in some object formats
359 # This proc returns 1 if it is supported, 0 if not.
360 # The argument is the kind of visibility, default/protected/hidden/internal.
362 proc check_visibility_available { what_kind } {
363 if [string match "" $what_kind] { set what_kind "hidden" }
365 return [check_no_compiler_messages visibility_available_$what_kind object "
366 void f() __attribute__((visibility(\"$what_kind\")));
371 ###############################
372 # proc check_alias_available { }
373 ###############################
375 # Determine if the target toolchain supports the alias attribute.
377 # Returns 2 if the target supports aliases. Returns 1 if the target
378 # only supports weak aliased. Returns 0 if the target does not
379 # support aliases at all. Returns -1 if support for aliases could not
382 proc check_alias_available { } {
383 global alias_available_saved
386 if [info exists alias_available_saved] {
387 verbose "check_alias_available returning saved $alias_available_saved" 2
391 verbose "check_alias_available compiling testfile $src" 2
392 set f [open $src "w"]
393 # Compile a small test program. The definition of "g" is
394 # necessary to keep the Solaris assembler from complaining
396 puts $f "#ifdef __cplusplus\nextern \"C\"\n#endif\n"
397 puts $f "void g() {} void f() __attribute__((alias(\"g\")));"
399 set lines [${tool}_target_compile $src $obj object ""]
401 remote_file build delete $obj
403 if [string match "" $lines] then {
404 # No error messages, everything is OK.
405 set alias_available_saved 2
407 if [regexp "alias definitions not supported" $lines] {
408 verbose "check_alias_available target does not support aliases" 2
410 set objformat [gcc_target_object_format]
412 if { $objformat == "elf" } {
413 verbose "check_alias_available but target uses ELF format, so it ought to" 2
414 set alias_available_saved -1
416 set alias_available_saved 0
419 if [regexp "only weak aliases are supported" $lines] {
420 verbose "check_alias_available target supports only weak aliases" 2
421 set alias_available_saved 1
423 set alias_available_saved -1
428 verbose "check_alias_available returning $alias_available_saved" 2
431 return $alias_available_saved
434 # Returns 1 if the target toolchain supports strong aliases, 0 otherwise.
436 proc check_effective_target_alias { } {
437 if { [check_alias_available] < 2 } {
444 # Returns 1 if the target toolchain supports ifunc, 0 otherwise.
446 proc check_ifunc_available { } {
447 return [check_no_compiler_messages ifunc_available object {
451 typedef void F (void);
453 void f () __attribute__ ((ifunc ("g")));
460 # Returns true if --gc-sections is supported on the target.
462 proc check_gc_sections_available { } {
463 global gc_sections_available_saved
466 if {![info exists gc_sections_available_saved]} {
467 # Some targets don't support gc-sections despite whatever's
468 # advertised by ld's options.
469 if { [istarget alpha*-*-*]
470 || [istarget ia64-*-*] } {
471 set gc_sections_available_saved 0
475 # elf2flt uses -q (--emit-relocs), which is incompatible with
477 if { [board_info target exists ldflags]
478 && [regexp " -elf2flt\[ =\]" " [board_info target ldflags] "] } {
479 set gc_sections_available_saved 0
483 # VxWorks kernel modules are relocatable objects linked with -r,
484 # while RTP executables are linked with -q (--emit-relocs).
485 # Both of these options are incompatible with --gc-sections.
486 if { [istarget *-*-vxworks*] } {
487 set gc_sections_available_saved 0
491 # Check if the ld used by gcc supports --gc-sections.
492 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
493 set ld_output [remote_exec host "$gcc_ld" "--help"]
494 if { [ string first "--gc-sections" $ld_output ] >= 0 } {
495 set gc_sections_available_saved 1
497 set gc_sections_available_saved 0
500 return $gc_sections_available_saved
503 # Return 1 if according to target_info struct and explicit target list
504 # target is supposed to support trampolines.
506 proc check_effective_target_trampolines { } {
507 if [target_info exists gcc,no_trampolines] {
510 if { [istarget avr-*-*]
511 || [istarget msp430-*-*]
512 || [istarget nvptx-*-*]
513 || [istarget hppa2.0w-hp-hpux11.23]
514 || [istarget hppa64-hp-hpux11.23] } {
520 # Return 1 if target has limited stack size.
522 proc check_effective_target_stack_size { } {
523 if [target_info exists gcc,stack_size] {
529 # Return the value attribute of an effective target, otherwise return 0.
531 proc dg-effective-target-value { effective_target } {
532 if { "$effective_target" == "stack_size" } {
533 if [check_effective_target_stack_size] {
534 return [target_info gcc,stack_size]
541 # Return 1 if signal.h is supported.
543 proc check_effective_target_signal { } {
544 if [target_info exists gcc,signal_suppress] {
550 # Return 1 if according to target_info struct and explicit target list
551 # target disables -fdelete-null-pointer-checks. Targets should return 0
552 # if they simply default to -fno-delete-null-pointer-checks but obey
553 # -fdelete-null-pointer-checks when passed explicitly (and tests that
554 # depend on this option should do that).
556 proc check_effective_target_keeps_null_pointer_checks { } {
557 if [target_info exists keeps_null_pointer_checks] {
560 if { [istarget avr-*-*]
561 || [istarget msp430-*-*] } {
567 # Return the autofdo profile wrapper
569 # Linux by default allows 516KB of perf event buffers
570 # in /proc/sys/kernel/perf_event_mlock_kb
571 # Each individual perf tries to grab it
572 # This causes problems with parallel test suite runs. Instead
573 # limit us to 8 pages (32K), which should be good enough
574 # for the small test programs. With the default settings
575 # this allows parallelism of 16 and higher of parallel gcc-auto-profile
576 proc profopt-perf-wrapper { } {
578 return "$srcdir/../config/i386/gcc-auto-profile -o perf.data -m8 "
581 # Return true if profiling is supported on the target.
583 proc check_profiling_available { test_what } {
584 global profiling_available_saved
586 verbose "Profiling argument is <$test_what>" 1
588 # These conditions depend on the argument so examine them before
589 # looking at the cache variable.
591 # Tree profiling requires TLS runtime support.
592 if { $test_what == "-fprofile-generate" } {
593 if { ![check_effective_target_tls_runtime] } {
598 if { $test_what == "-fauto-profile" } {
599 if { !([istarget i?86-*-linux*] || [istarget x86_64-*-linux*]) } {
600 verbose "autofdo only supported on linux"
603 # not cross compiling?
605 verbose "autofdo not supported for non native builds"
608 set event [profopt-perf-wrapper]
610 verbose "autofdo not supported"
614 set status [remote_exec host "$srcdir/../config/i386/gcc-auto-profile" "true -v >/dev/null"]
615 if { [lindex $status 0] != 0 } {
616 verbose "autofdo not supported because perf does not work"
620 # no good way to check this in advance -- check later instead.
621 #set status [remote_exec host "create_gcov" "2>/dev/null"]
622 #if { [lindex $status 0] != 255 } {
623 # verbose "autofdo not supported due to missing create_gcov"
628 # Support for -p on solaris2 relies on mcrt1.o which comes with the
629 # vendor compiler. We cannot reliably predict the directory where the
630 # vendor compiler (and thus mcrt1.o) is installed so we can't
631 # necessarily find mcrt1.o even if we have it.
632 if { [istarget *-*-solaris2*] && $test_what == "-p" } {
636 # We don't yet support profiling for MIPS16.
637 if { [istarget mips*-*-*]
638 && ![check_effective_target_nomips16]
639 && ($test_what == "-p" || $test_what == "-pg") } {
643 # MinGW does not support -p.
644 if { [istarget *-*-mingw*] && $test_what == "-p" } {
648 # cygwin does not support -p.
649 if { [istarget *-*-cygwin*] && $test_what == "-p" } {
653 # uClibc does not have gcrt1.o.
654 if { [check_effective_target_uclibc]
655 && ($test_what == "-p" || $test_what == "-pg") } {
659 # Now examine the cache variable.
660 if {![info exists profiling_available_saved]} {
661 # Some targets don't have any implementation of __bb_init_func or are
662 # missing other needed machinery.
663 if {[istarget aarch64*-*-elf]
664 || [istarget am3*-*-linux*]
665 || [istarget arm*-*-eabi*]
666 || [istarget arm*-*-elf]
667 || [istarget arm*-*-symbianelf*]
668 || [istarget avr-*-*]
669 || [istarget bfin-*-*]
670 || [istarget cris-*-*]
671 || [istarget crisv32-*-*]
672 || [istarget fido-*-elf]
673 || [istarget h8300-*-*]
674 || [istarget lm32-*-*]
675 || [istarget m32c-*-elf]
676 || [istarget m68k-*-elf]
677 || [istarget m68k-*-uclinux*]
678 || [istarget mips*-*-elf*]
679 || [istarget mmix-*-*]
680 || [istarget mn10300-*-elf*]
681 || [istarget moxie-*-elf*]
682 || [istarget msp430-*-*]
683 || [istarget nds32*-*-elf]
684 || [istarget nios2-*-elf]
685 || [istarget nvptx-*-*]
686 || [istarget powerpc-*-eabi*]
687 || [istarget powerpc-*-elf]
689 || [istarget tic6x-*-elf]
690 || [istarget visium-*-*]
691 || [istarget xstormy16-*]
692 || [istarget xtensa*-*-elf]
693 || [istarget *-*-rtems*]
694 || [istarget *-*-vxworks*] } {
695 set profiling_available_saved 0
697 set profiling_available_saved 1
701 # -pg link test result can't be cached since it may change between
703 set profiling_working $profiling_available_saved
704 if { $profiling_available_saved == 1
705 && ![check_no_compiler_messages_nocache profiling executable {
706 int main() { return 0; } } "-pg"] } {
707 set profiling_working 0
710 return $profiling_working
713 # Check to see if a target is "freestanding". This is as per the definition
714 # in Section 4 of C99 standard. Effectively, it is a target which supports no
715 # extra headers or libraries other than what is considered essential.
716 proc check_effective_target_freestanding { } {
717 if { [istarget nvptx-*-*] } {
723 # Return 1 if target has packed layout of structure members by
724 # default, 0 otherwise. Note that this is slightly different than
725 # whether the target has "natural alignment": both attributes may be
728 proc check_effective_target_default_packed { } {
729 return [check_no_compiler_messages default_packed assembly {
730 struct x { char a; long b; } c;
731 int s[sizeof (c) == sizeof (char) + sizeof (long) ? 1 : -1];
735 # Return 1 if target has PCC_BITFIELD_TYPE_MATTERS defined. See
736 # documentation, where the test also comes from.
738 proc check_effective_target_pcc_bitfield_type_matters { } {
739 # PCC_BITFIELD_TYPE_MATTERS isn't just about unnamed or empty
740 # bitfields, but let's stick to the example code from the docs.
741 return [check_no_compiler_messages pcc_bitfield_type_matters assembly {
742 struct foo1 { char x; char :0; char y; };
743 struct foo2 { char x; int :0; char y; };
744 int s[sizeof (struct foo1) != sizeof (struct foo2) ? 1 : -1];
748 # Add to FLAGS all the target-specific flags needed to use thread-local storage.
750 proc add_options_for_tls { flags } {
751 # On Solaris 9, __tls_get_addr/___tls_get_addr only lives in
752 # libthread, so always pass -pthread for native TLS. Same for AIX.
753 # Need to duplicate native TLS check from
754 # check_effective_target_tls_native to avoid recursion.
755 if { ([istarget powerpc-ibm-aix*]) &&
756 [check_no_messages_and_pattern tls_native "!emutls" assembly {
758 int f (void) { return i; }
759 void g (int j) { i = j; }
761 return "-pthread [g++_link_flags [get_multilibs "-pthread"] ] $flags "
766 # Return 1 if indirect jumps are supported, 0 otherwise.
768 proc check_effective_target_indirect_jumps {} {
769 if { [istarget nvptx-*-*] } {
775 # Return 1 if nonlocal goto is supported, 0 otherwise.
777 proc check_effective_target_nonlocal_goto {} {
778 if { [istarget nvptx-*-*] } {
784 # Return 1 if global constructors are supported, 0 otherwise.
786 proc check_effective_target_global_constructor {} {
787 if { [istarget nvptx-*-*] } {
793 # Return 1 if taking label values is supported, 0 otherwise.
795 proc check_effective_target_label_values {} {
796 if { [istarget nvptx-*-*] || [target_info exists gcc,no_label_values] } {
803 # Return 1 if builtin_return_address and builtin_frame_address are
804 # supported, 0 otherwise.
806 proc check_effective_target_return_address {} {
807 if { [istarget nvptx-*-*] } {
813 # Return 1 if the assembler does not verify function types against
814 # calls, 0 otherwise. Such verification will typically show up problems
815 # with K&R C function declarations.
817 proc check_effective_target_untyped_assembly {} {
818 if { [istarget nvptx-*-*] } {
824 # Return 1 if alloca is supported, 0 otherwise.
826 proc check_effective_target_alloca {} {
827 if { [istarget nvptx-*-*] } {
828 return [check_no_compiler_messages alloca assembly {
830 void g (int n) { f (__builtin_alloca (n)); }
836 # Return 1 if thread local storage (TLS) is supported, 0 otherwise.
838 proc check_effective_target_tls {} {
839 return [check_no_compiler_messages tls assembly {
841 int f (void) { return i; }
842 void g (int j) { i = j; }
846 # Return 1 if *native* thread local storage (TLS) is supported, 0 otherwise.
848 proc check_effective_target_tls_native {} {
849 # VxWorks uses emulated TLS machinery, but with non-standard helper
850 # functions, so we fail to automatically detect it.
851 if { [istarget *-*-vxworks*] } {
855 return [check_no_messages_and_pattern tls_native "!emutls" assembly {
857 int f (void) { return i; }
858 void g (int j) { i = j; }
862 # Return 1 if *emulated* thread local storage (TLS) is supported, 0 otherwise.
864 proc check_effective_target_tls_emulated {} {
865 # VxWorks uses emulated TLS machinery, but with non-standard helper
866 # functions, so we fail to automatically detect it.
867 if { [istarget *-*-vxworks*] } {
871 return [check_no_messages_and_pattern tls_emulated "emutls" assembly {
873 int f (void) { return i; }
874 void g (int j) { i = j; }
878 # Return 1 if TLS executables can run correctly, 0 otherwise.
880 proc check_effective_target_tls_runtime {} {
881 # The runtime does not have TLS support, but just
882 # running the test below is insufficient to show this.
883 if { [istarget msp430-*-*] || [istarget visium-*-*] } {
886 return [check_runtime tls_runtime {
887 __thread int thr = 0;
888 int main (void) { return thr; }
889 } [add_options_for_tls ""]]
892 # Return 1 if atomic compare-and-swap is supported on 'int'
894 proc check_effective_target_cas_char {} {
895 return [check_no_compiler_messages cas_char assembly {
896 #ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1
902 proc check_effective_target_cas_int {} {
903 return [check_no_compiler_messages cas_int assembly {
904 #if __INT_MAX__ == 0x7fff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2
906 #elif __INT_MAX__ == 0x7fffffff && __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
914 # Return 1 if -ffunction-sections is supported, 0 otherwise.
916 proc check_effective_target_function_sections {} {
917 # Darwin has its own scheme and silently accepts -ffunction-sections.
918 if { [istarget *-*-darwin*] } {
922 return [check_no_compiler_messages functionsections assembly {
924 } "-ffunction-sections"]
927 # Return 1 if instruction scheduling is available, 0 otherwise.
929 proc check_effective_target_scheduling {} {
930 return [check_no_compiler_messages scheduling object {
932 } "-fschedule-insns"]
935 # Return 1 if trapping arithmetic is available, 0 otherwise.
937 proc check_effective_target_trapping {} {
938 return [check_no_compiler_messages trapping object {
939 int add (int a, int b) { return a + b; }
943 # Return 1 if compilation with -fgraphite is error-free for trivial
946 proc check_effective_target_fgraphite {} {
947 return [check_no_compiler_messages fgraphite object {
952 # Return 1 if compilation with -fopenacc is error-free for trivial
955 proc check_effective_target_fopenacc {} {
956 # nvptx can be built with the device-side bits of openacc, but it
957 # does not make sense to test it as an openacc host.
958 if [istarget nvptx-*-*] { return 0 }
960 return [check_no_compiler_messages fopenacc object {
965 # Return 1 if compilation with -fopenmp is error-free for trivial
968 proc check_effective_target_fopenmp {} {
969 # nvptx can be built with the device-side bits of libgomp, but it
970 # does not make sense to test it as an openmp host.
971 if [istarget nvptx-*-*] { return 0 }
973 return [check_no_compiler_messages fopenmp object {
978 # Return 1 if compilation with -fgnu-tm is error-free for trivial
981 proc check_effective_target_fgnu_tm {} {
982 return [check_no_compiler_messages fgnu_tm object {
987 # Return 1 if the target supports mmap, 0 otherwise.
989 proc check_effective_target_mmap {} {
990 return [check_function_available "mmap"]
993 # Return 1 if the target supports dlopen, 0 otherwise.
994 proc check_effective_target_dlopen {} {
995 return [check_no_compiler_messages dlopen executable {
997 int main(void) { dlopen ("dummy.so", RTLD_NOW); }
998 } [add_options_for_dlopen ""]]
1001 proc add_options_for_dlopen { flags } {
1002 return "$flags -ldl"
1005 # Return 1 if the target supports clone, 0 otherwise.
1006 proc check_effective_target_clone {} {
1007 return [check_function_available "clone"]
1010 # Return 1 if the target supports setrlimit, 0 otherwise.
1011 proc check_effective_target_setrlimit {} {
1012 # Darwin has non-posix compliant RLIMIT_AS
1013 if { [istarget *-*-darwin*] } {
1016 return [check_function_available "setrlimit"]
1019 # Return 1 if the target supports gettimeofday, 0 otherwise.
1020 proc check_effective_target_gettimeofday {} {
1021 return [check_function_available "gettimeofday"]
1024 # Return 1 if the target supports swapcontext, 0 otherwise.
1025 proc check_effective_target_swapcontext {} {
1026 return [check_no_compiler_messages swapcontext executable {
1027 #include <ucontext.h>
1030 ucontext_t orig_context,child_context;
1031 if (swapcontext(&child_context, &orig_context) < 0) { }
1036 # Return 1 if compilation with -pthread is error-free for trivial
1037 # code, 0 otherwise.
1039 proc check_effective_target_pthread {} {
1040 return [check_no_compiler_messages pthread object {
1045 # Return 1 if compilation with -gstabs is error-free for trivial
1046 # code, 0 otherwise.
1048 proc check_effective_target_stabs {} {
1049 return [check_no_compiler_messages stabs object {
1054 # Return 1 if compilation with -mpe-aligned-commons is error-free
1055 # for trivial code, 0 otherwise.
1057 proc check_effective_target_pe_aligned_commons {} {
1058 if { [istarget *-*-cygwin*] || [istarget *-*-mingw*] } {
1059 return [check_no_compiler_messages pe_aligned_commons object {
1061 } "-mpe-aligned-commons"]
1066 # Return 1 if the target supports -static
1067 proc check_effective_target_static {} {
1068 return [check_no_compiler_messages static executable {
1069 int main (void) { return 0; }
1073 # Return 1 if the target supports -fstack-protector
1074 proc check_effective_target_fstack_protector {} {
1075 return [check_runtime fstack_protector {
1077 int main (int argc, char *argv[]) {
1079 return !strcpy (buf, strrchr (argv[0], '/'));
1081 } "-fstack-protector"]
1084 # Return 1 if the target supports -fstack-check or -fstack-check=$stack_kind
1085 proc check_stack_check_available { stack_kind } {
1086 if [string match "" $stack_kind] then {
1087 set stack_opt "-fstack-check"
1088 } else { set stack_opt "-fstack-check=$stack_kind" }
1090 return [check_no_compiler_messages stack_check_$stack_kind executable {
1091 int main (void) { return 0; }
1095 # Return 1 if compilation with -freorder-blocks-and-partition is error-free
1096 # for trivial code, 0 otherwise. As some targets (ARM for example) only
1097 # warn when -fprofile-use is also supplied we test that combination too.
1099 proc check_effective_target_freorder {} {
1100 if { [check_no_compiler_messages freorder object {
1102 } "-freorder-blocks-and-partition"]
1103 && [check_no_compiler_messages fprofile_use_freorder object {
1105 } "-fprofile-use -freorder-blocks-and-partition"] } {
1111 # Return 1 if -fpic and -fPIC are supported, as in no warnings or errors
1112 # emitted, 0 otherwise. Whether a shared library can actually be built is
1113 # out of scope for this test.
1115 proc check_effective_target_fpic { } {
1116 # Note that M68K has a multilib that supports -fpic but not
1117 # -fPIC, so we need to check both. We test with a program that
1118 # requires GOT references.
1119 foreach arg {fpic fPIC} {
1120 if [check_no_compiler_messages $arg object {
1121 extern int foo (void); extern int bar;
1122 int baz (void) { return foo () + bar; }
1130 # On AArch64, if -fpic is not supported, then we will fall back to -fPIC
1131 # silently. So, we can't rely on above "check_effective_target_fpic" as it
1132 # assumes compiler will give warning if -fpic not supported. Here we check
1133 # whether binutils supports those new -fpic relocation modifiers, and assume
1134 # -fpic is supported if there is binutils support. GCC configuration will
1135 # enable -fpic for AArch64 in this case.
1137 # "check_effective_target_aarch64_small_fpic" is dedicated for checking small
1138 # memory model -fpic relocation types.
1140 proc check_effective_target_aarch64_small_fpic { } {
1141 if { [istarget aarch64*-*-*] } {
1142 return [check_no_compiler_messages aarch64_small_fpic object {
1143 void foo (void) { asm ("ldr x0, [x2, #:gotpage_lo15:globalsym]"); }
1150 # On AArch64, instruction sequence for TLS LE under -mtls-size=32 will utilize
1151 # the relocation modifier "tprel_g0_nc" together with MOVK, it's only supported
1152 # in binutils since 2015-03-04 as PR gas/17843.
1154 # This test directive make sure binutils support all features needed by TLS LE
1155 # under -mtls-size=32 on AArch64.
1157 proc check_effective_target_aarch64_tlsle32 { } {
1158 if { [istarget aarch64*-*-*] } {
1159 return [check_no_compiler_messages aarch64_tlsle32 object {
1160 void foo (void) { asm ("movk x1,#:tprel_g0_nc:t1"); }
1167 # Return 1 if -shared is supported, as in no warnings or errors
1168 # emitted, 0 otherwise.
1170 proc check_effective_target_shared { } {
1171 # Note that M68K has a multilib that supports -fpic but not
1172 # -fPIC, so we need to check both. We test with a program that
1173 # requires GOT references.
1174 return [check_no_compiler_messages shared executable {
1175 extern int foo (void); extern int bar;
1176 int baz (void) { return foo () + bar; }
1180 # Return 1 if -pie, -fpie and -fPIE are supported, 0 otherwise.
1182 proc check_effective_target_pie { } {
1183 if { [istarget *-*-darwin\[912\]*]
1184 || [istarget *-*-dragonfly*]
1185 || [istarget *-*-freebsd*]
1186 || [istarget *-*-linux*]
1187 || [istarget *-*-gnu*] } {
1190 if { [istarget *-*-solaris2.1\[1-9\]*] } {
1191 # Full PIE support was added in Solaris 11.3, but gcc errors out
1192 # if missing, so check for that.
1193 return [check_no_compiler_messages pie executable {
1194 int main (void) { return 0; }
1200 # Return true if the target supports -mpaired-single (as used on MIPS).
1202 proc check_effective_target_mpaired_single { } {
1203 return [check_no_compiler_messages mpaired_single object {
1205 } "-mpaired-single"]
1208 # Return true if the target has access to FPU instructions.
1210 proc check_effective_target_hard_float { } {
1211 if { [istarget mips*-*-*] } {
1212 return [check_no_compiler_messages hard_float assembly {
1213 #if (defined __mips_soft_float || defined __mips16)
1214 #error __mips_soft_float || __mips16
1219 # This proc is actually checking the availabilty of FPU
1220 # support for doubles, so on the RX we must fail if the
1221 # 64-bit double multilib has been selected.
1222 if { [istarget rx-*-*] } {
1224 # return [check_no_compiler_messages hard_float assembly {
1225 #if defined __RX_64_BIT_DOUBLES__
1226 #error __RX_64_BIT_DOUBLES__
1231 # The generic test equates hard_float with "no call for adding doubles".
1232 return [check_no_messages_and_pattern hard_float "!\\(call" rtl-expand {
1233 double a (double b, double c) { return b + c; }
1237 # Return true if the target is a 64-bit MIPS target.
1239 proc check_effective_target_mips64 { } {
1240 return [check_no_compiler_messages mips64 assembly {
1247 # Return true if the target is a MIPS target that does not produce
1250 proc check_effective_target_nomips16 { } {
1251 return [check_no_compiler_messages nomips16 object {
1255 /* A cheap way of testing for -mflip-mips16. */
1256 void foo (void) { asm ("addiu $20,$20,1"); }
1257 void bar (void) { asm ("addiu $20,$20,1"); }
1262 # Add the options needed for MIPS16 function attributes. At the moment,
1263 # we don't support MIPS16 PIC.
1265 proc add_options_for_mips16_attribute { flags } {
1266 return "$flags -mno-abicalls -fno-pic -DMIPS16=__attribute__((mips16))"
1269 # Return true if we can force a mode that allows MIPS16 code generation.
1270 # We don't support MIPS16 PIC, and only support MIPS16 -mhard-float
1273 proc check_effective_target_mips16_attribute { } {
1274 return [check_no_compiler_messages mips16_attribute assembly {
1278 #if defined __mips_hard_float \
1279 && (!defined _ABIO32 || _MIPS_SIM != _ABIO32) \
1280 && (!defined _ABIO64 || _MIPS_SIM != _ABIO64)
1281 #error __mips_hard_float && (!_ABIO32 || !_ABIO64)
1283 } [add_options_for_mips16_attribute ""]]
1286 # Return 1 if the target supports long double larger than double when
1287 # using the new ABI, 0 otherwise.
1289 proc check_effective_target_mips_newabi_large_long_double { } {
1290 return [check_no_compiler_messages mips_newabi_large_long_double object {
1291 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
1295 # Return true if the target is a MIPS target that has access
1296 # to the LL and SC instructions.
1298 proc check_effective_target_mips_llsc { } {
1299 if { ![istarget mips*-*-*] } {
1302 # Assume that these instructions are always implemented for
1303 # non-elf* targets, via emulation if necessary.
1304 if { ![istarget *-*-elf*] } {
1307 # Otherwise assume LL/SC support for everything but MIPS I.
1308 return [check_no_compiler_messages mips_llsc assembly {
1315 # Return true if the target is a MIPS target that uses in-place relocations.
1317 proc check_effective_target_mips_rel { } {
1318 if { ![istarget mips*-*-*] } {
1321 return [check_no_compiler_messages mips_rel object {
1322 #if (defined _ABIN32 && _MIPS_SIM == _ABIN32) \
1323 || (defined _ABI64 && _MIPS_SIM == _ABI64)
1324 #error _ABIN32 && (_ABIN32 || _ABI64)
1329 # Return true if the target is a MIPS target that uses the EABI.
1331 proc check_effective_target_mips_eabi { } {
1332 if { ![istarget mips*-*-*] } {
1335 return [check_no_compiler_messages mips_eabi object {
1342 # Return 1 if the current multilib does not generate PIC by default.
1344 proc check_effective_target_nonpic { } {
1345 return [check_no_compiler_messages nonpic assembly {
1352 # Return 1 if the current multilib generates PIE by default.
1354 proc check_effective_target_pie_enabled { } {
1355 return [check_no_compiler_messages pie_enabled assembly {
1362 # Return 1 if the target generates -fstack-protector by default.
1364 proc check_effective_target_fstack_protector_enabled {} {
1365 return [ check_no_compiler_messages fstack_protector_enabled assembly {
1366 #if !defined(__SSP__) && !defined(__SSP_ALL__) && \
1367 !defined(__SSP_STRONG__) && !defined(__SSP_EXPICIT__)
1373 # Return 1 if the target does not use a status wrapper.
1375 proc check_effective_target_unwrapped { } {
1376 if { [target_info needs_status_wrapper] != "" \
1377 && [target_info needs_status_wrapper] != "0" } {
1383 # Return true if iconv is supported on the target. In particular IBM1047.
1385 proc check_iconv_available { test_what } {
1388 # If the tool configuration file has not set libiconv, try "-liconv"
1389 if { ![info exists libiconv] } {
1390 set libiconv "-liconv"
1392 set test_what [lindex $test_what 1]
1393 return [check_runtime_nocache $test_what [subst {
1399 cd = iconv_open ("$test_what", "UTF-8");
1400 if (cd == (iconv_t) -1)
1407 # Return true if the atomic library is supported on the target.
1408 proc check_effective_target_libatomic_available { } {
1409 return [check_no_compiler_messages libatomic_available executable {
1410 int main (void) { return 0; }
1414 # Return 1 if an ASCII locale is supported on this host, 0 otherwise.
1416 proc check_ascii_locale_available { } {
1420 # Return true if named sections are supported on this target.
1422 proc check_named_sections_available { } {
1423 return [check_no_compiler_messages named_sections assembly {
1424 int __attribute__ ((section("whatever"))) foo;
1428 # Return true if the "naked" function attribute is supported on this target.
1430 proc check_effective_target_naked_functions { } {
1431 return [check_no_compiler_messages naked_functions assembly {
1432 void f() __attribute__((naked));
1436 # Return 1 if the target supports Fortran real kinds larger than real(8),
1439 # When the target name changes, replace the cached result.
1441 proc check_effective_target_fortran_large_real { } {
1442 return [check_no_compiler_messages fortran_large_real executable {
1444 integer,parameter :: k = selected_real_kind (precision (0.0_8) + 1)
1451 # Return 1 if the target supports Fortran real kind real(16),
1452 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1453 # this checks for Real(16) only; the other returned real(10) if
1454 # both real(10) and real(16) are available.
1456 # When the target name changes, replace the cached result.
1458 proc check_effective_target_fortran_real_16 { } {
1459 return [check_no_compiler_messages fortran_real_16 executable {
1467 # Return 1 if the target supports Fortran real kind 10,
1468 # 0 otherwise. Contrary to check_effective_target_fortran_large_real
1469 # this checks for real(10) only.
1471 # When the target name changes, replace the cached result.
1473 proc check_effective_target_fortran_real_10 { } {
1474 return [check_no_compiler_messages fortran_real_10 executable {
1482 # Return 1 if the target supports Fortran's IEEE modules,
1485 # When the target name changes, replace the cached result.
1487 proc check_effective_target_fortran_ieee { flags } {
1488 return [check_no_compiler_messages fortran_ieee executable {
1490 use, intrinsic :: ieee_features
1496 # Return 1 if the target supports SQRT for the largest floating-point
1497 # type. (Some targets lack the libm support for this FP type.)
1498 # On most targets, this check effectively checks either whether sqrtl is
1499 # available or on __float128 systems whether libquadmath is installed,
1500 # which provides sqrtq.
1502 # When the target name changes, replace the cached result.
1504 proc check_effective_target_fortran_largest_fp_has_sqrt { } {
1505 return [check_no_compiler_messages fortran_largest_fp_has_sqrt executable {
1507 use iso_fortran_env, only: real_kinds
1508 integer,parameter:: maxFP = real_kinds(ubound(real_kinds,dim=1))
1509 real(kind=maxFP), volatile :: x
1517 # Return 1 if the target supports Fortran integer kinds larger than
1518 # integer(8), 0 otherwise.
1520 # When the target name changes, replace the cached result.
1522 proc check_effective_target_fortran_large_int { } {
1523 return [check_no_compiler_messages fortran_large_int executable {
1525 integer,parameter :: k = selected_int_kind (range (0_8) + 1)
1526 integer(kind=k) :: i
1531 # Return 1 if the target supports Fortran integer(16), 0 otherwise.
1533 # When the target name changes, replace the cached result.
1535 proc check_effective_target_fortran_integer_16 { } {
1536 return [check_no_compiler_messages fortran_integer_16 executable {
1543 # Return 1 if we can statically link libgfortran, 0 otherwise.
1545 # When the target name changes, replace the cached result.
1547 proc check_effective_target_static_libgfortran { } {
1548 return [check_no_compiler_messages static_libgfortran executable {
1555 # Return 1 if we can use the -rdynamic option, 0 otherwise.
1557 proc check_effective_target_rdynamic { } {
1558 return [check_no_compiler_messages rdynamic executable {
1559 int main() { return 0; }
1563 proc check_linker_plugin_available { } {
1564 return [check_no_compiler_messages_nocache linker_plugin executable {
1565 int main() { return 0; }
1566 } "-flto -fuse-linker-plugin"]
1569 # Return 1 if the target OS supports running SSE executables, 0
1570 # otherwise. Cache the result.
1572 proc check_sse_os_support_available { } {
1573 return [check_cached_effective_target sse_os_support_available {
1574 # If this is not the right target then we can skip the test.
1575 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1577 } elseif { [istarget i?86-*-solaris2*] } {
1578 # The Solaris 2 kernel doesn't save and restore SSE registers
1579 # before Solaris 9 4/04. Before that, executables die with SIGILL.
1580 check_runtime_nocache sse_os_support_available {
1583 asm volatile ("movaps %xmm0,%xmm0");
1593 # Return 1 if the target OS supports running AVX executables, 0
1594 # otherwise. Cache the result.
1596 proc check_avx_os_support_available { } {
1597 return [check_cached_effective_target avx_os_support_available {
1598 # If this is not the right target then we can skip the test.
1599 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1602 # Check that OS has AVX and SSE saving enabled.
1603 check_runtime_nocache avx_os_support_available {
1606 unsigned int eax, edx;
1608 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1609 return (eax & 0x06) != 0x06;
1616 # Return 1 if the target OS supports running AVX executables, 0
1617 # otherwise. Cache the result.
1619 proc check_avx512_os_support_available { } {
1620 return [check_cached_effective_target avx512_os_support_available {
1621 # If this is not the right target then we can skip the test.
1622 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1625 # Check that OS has AVX512, AVX and SSE saving enabled.
1626 check_runtime_nocache avx512_os_support_available {
1629 unsigned int eax, edx;
1631 asm ("xgetbv" : "=a" (eax), "=d" (edx) : "c" (0));
1632 return (eax & 0xe6) != 0xe6;
1639 # Return 1 if the target supports executing SSE instructions, 0
1640 # otherwise. Cache the result.
1642 proc check_sse_hw_available { } {
1643 return [check_cached_effective_target sse_hw_available {
1644 # If this is not the right target then we can skip the test.
1645 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1648 check_runtime_nocache sse_hw_available {
1652 unsigned int eax, ebx, ecx, edx;
1653 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1656 return !(edx & bit_SSE);
1663 # Return 1 if the target supports executing SSE2 instructions, 0
1664 # otherwise. Cache the result.
1666 proc check_sse2_hw_available { } {
1667 return [check_cached_effective_target sse2_hw_available {
1668 # If this is not the right target then we can skip the test.
1669 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1672 check_runtime_nocache sse2_hw_available {
1676 unsigned int eax, ebx, ecx, edx;
1677 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1680 return !(edx & bit_SSE2);
1687 # Return 1 if the target supports executing SSE4 instructions, 0
1688 # otherwise. Cache the result.
1690 proc check_sse4_hw_available { } {
1691 return [check_cached_effective_target sse4_hw_available {
1692 # If this is not the right target then we can skip the test.
1693 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1696 check_runtime_nocache sse4_hw_available {
1700 unsigned int eax, ebx, ecx, edx;
1701 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1704 return !(ecx & bit_SSE4_2);
1711 # Return 1 if the target supports executing AVX instructions, 0
1712 # otherwise. Cache the result.
1714 proc check_avx_hw_available { } {
1715 return [check_cached_effective_target avx_hw_available {
1716 # If this is not the right target then we can skip the test.
1717 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1720 check_runtime_nocache avx_hw_available {
1724 unsigned int eax, ebx, ecx, edx;
1725 if (!__get_cpuid (1, &eax, &ebx, &ecx, &edx))
1728 return ((ecx & (bit_AVX | bit_OSXSAVE))
1729 != (bit_AVX | bit_OSXSAVE));
1736 # Return 1 if the target supports executing AVX2 instructions, 0
1737 # otherwise. Cache the result.
1739 proc check_avx2_hw_available { } {
1740 return [check_cached_effective_target avx2_hw_available {
1741 # If this is not the right target then we can skip the test.
1742 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1745 check_runtime_nocache avx2_hw_available {
1750 unsigned int eax, ebx, ecx, edx;
1752 if (__get_cpuid_max (0, NULL) < 7)
1755 __cpuid (1, eax, ebx, ecx, edx);
1757 if (!(ecx & bit_OSXSAVE))
1760 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1762 return !(ebx & bit_AVX2);
1769 # Return 1 if the target supports executing AVX512 foundation instructions, 0
1770 # otherwise. Cache the result.
1772 proc check_avx512f_hw_available { } {
1773 return [check_cached_effective_target avx512f_hw_available {
1774 # If this is not the right target then we can skip the test.
1775 if { !([istarget x86_64-*-*] || [istarget i?86-*-*]) } {
1778 check_runtime_nocache avx512f_hw_available {
1783 unsigned int eax, ebx, ecx, edx;
1785 if (__get_cpuid_max (0, NULL) < 7)
1788 __cpuid (1, eax, ebx, ecx, edx);
1790 if (!(ecx & bit_OSXSAVE))
1793 __cpuid_count (7, 0, eax, ebx, ecx, edx);
1795 return !(ebx & bit_AVX512F);
1802 # Return 1 if the target supports running SSE executables, 0 otherwise.
1804 proc check_effective_target_sse_runtime { } {
1805 if { [check_effective_target_sse]
1806 && [check_sse_hw_available]
1807 && [check_sse_os_support_available] } {
1813 # Return 1 if the target supports running SSE2 executables, 0 otherwise.
1815 proc check_effective_target_sse2_runtime { } {
1816 if { [check_effective_target_sse2]
1817 && [check_sse2_hw_available]
1818 && [check_sse_os_support_available] } {
1824 # Return 1 if the target supports running SSE4 executables, 0 otherwise.
1826 proc check_effective_target_sse4_runtime { } {
1827 if { [check_effective_target_sse4]
1828 && [check_sse4_hw_available]
1829 && [check_sse_os_support_available] } {
1835 # Return 1 if the target supports running AVX executables, 0 otherwise.
1837 proc check_effective_target_avx_runtime { } {
1838 if { [check_effective_target_avx]
1839 && [check_avx_hw_available]
1840 && [check_avx_os_support_available] } {
1846 # Return 1 if the target supports running AVX2 executables, 0 otherwise.
1848 proc check_effective_target_avx2_runtime { } {
1849 if { [check_effective_target_avx2]
1850 && [check_avx2_hw_available]
1851 && [check_avx_os_support_available] } {
1857 # Return 1 if the target supports running AVX512f executables, 0 otherwise.
1859 proc check_effective_target_avx512f_runtime { } {
1860 if { [check_effective_target_avx512f]
1861 && [check_avx512f_hw_available]
1862 && [check_avx512_os_support_available] } {
1868 # Return 1 if bmi2 instructions can be compiled.
1869 proc check_effective_target_bmi2 { } {
1870 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
1873 return [check_no_compiler_messages bmi2 object {
1875 _bzhi_u32 (unsigned int __X, unsigned int __Y)
1877 return __builtin_ia32_bzhi_si (__X, __Y);
1882 # Return 1 if the target supports executing MIPS Paired-Single instructions,
1883 # 0 otherwise. Cache the result.
1885 proc check_mpaired_single_hw_available { } {
1886 return [check_cached_effective_target mpaired_single_hw_available {
1887 # If this is not the right target then we can skip the test.
1888 if { !([istarget mips*-*-*]) } {
1891 check_runtime_nocache mpaired_single_hw_available {
1894 asm volatile ("pll.ps $f2,$f4,$f6");
1902 # Return 1 if the target supports executing Loongson vector instructions,
1903 # 0 otherwise. Cache the result.
1905 proc check_mips_loongson_hw_available { } {
1906 return [check_cached_effective_target mips_loongson_hw_available {
1907 # If this is not the right target then we can skip the test.
1908 if { !([istarget mips*-*-*]) } {
1911 check_runtime_nocache mips_loongson_hw_available {
1912 #include <loongson.h>
1915 asm volatile ("paddw $f2,$f4,$f6");
1923 # Return 1 if the target supports executing MIPS MSA instructions, 0
1924 # otherwise. Cache the result.
1926 proc check_mips_msa_hw_available { } {
1927 return [check_cached_effective_target mips_msa_hw_available {
1928 # If this is not the right target then we can skip the test.
1929 if { !([istarget mips*-*-*]) } {
1932 check_runtime_nocache mips_msa_hw_available {
1933 #if !defined(__mips_msa)
1934 #error "MSA NOT AVAIL"
1936 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
1937 #error "MSA NOT AVAIL FOR ISA REV < 2"
1939 #if !defined(__mips_hard_float)
1940 #error "MSA HARD_FLOAT REQUIRED"
1942 #if __mips_fpr != 64
1943 #error "MSA 64-bit FPR REQUIRED"
1949 v8i16 v = __builtin_msa_ldi_h (0);
1959 # Return 1 if the target supports running MIPS Paired-Single
1960 # executables, 0 otherwise.
1962 proc check_effective_target_mpaired_single_runtime { } {
1963 if { [check_effective_target_mpaired_single]
1964 && [check_mpaired_single_hw_available] } {
1970 # Return 1 if the target supports running Loongson executables, 0 otherwise.
1972 proc check_effective_target_mips_loongson_runtime { } {
1973 if { [check_effective_target_mips_loongson]
1974 && [check_mips_loongson_hw_available] } {
1980 # Return 1 if the target supports running MIPS MSA executables, 0 otherwise.
1982 proc check_effective_target_mips_msa_runtime { } {
1983 if { [check_effective_target_mips_msa]
1984 && [check_mips_msa_hw_available] } {
1990 # Return 1 if we are compiling for 64-bit PowerPC but we do not use direct
1991 # move instructions for moves from GPR to FPR.
1993 proc check_effective_target_powerpc64_no_dm { } {
1994 # The "mulld" checks if we are generating PowerPC64 code. The "lfd"
1995 # checks if we do not use direct moves, but use the old-fashioned
1996 # slower move-via-the-stack.
1997 return [check_no_messages_and_pattern powerpc64_no_dm \
1998 {\mmulld\M.*\mlfd} assembly {
1999 double f(long long x) { return x*x; }
2003 # Return 1 if the target supports the __builtin_cpu_supports built-in,
2004 # including having a new enough library to support the test. Cache the result.
2005 # Require at least a power7 to run on.
2007 proc check_ppc_cpu_supports_hw_available { } {
2008 return [check_cached_effective_target ppc_cpu_supports_hw_available {
2009 # Some simulators are known to not support VSX/power8 instructions.
2010 # For now, disable on Darwin
2011 if { [istarget powerpc-*-eabi]
2012 || [istarget powerpc*-*-eabispe]
2013 || [istarget *-*-darwin*]} {
2017 check_runtime_nocache ppc_cpu_supports_hw_available {
2021 asm volatile ("xxlor vs0,vs0,vs0");
2023 asm volatile ("xxlor 0,0,0");
2025 if (!__builtin_cpu_supports ("vsx"))
2034 # Return 1 if the target supports executing 750CL paired-single instructions, 0
2035 # otherwise. Cache the result.
2037 proc check_750cl_hw_available { } {
2038 return [check_cached_effective_target 750cl_hw_available {
2039 # If this is not the right target then we can skip the test.
2040 if { ![istarget powerpc-*paired*] } {
2043 check_runtime_nocache 750cl_hw_available {
2047 asm volatile ("ps_mul v0,v0,v0");
2049 asm volatile ("ps_mul 0,0,0");
2058 # Return 1 if the target supports executing power8 vector instructions, 0
2059 # otherwise. Cache the result.
2061 proc check_p8vector_hw_available { } {
2062 return [check_cached_effective_target p8vector_hw_available {
2063 # Some simulators are known to not support VSX/power8 instructions.
2064 # For now, disable on Darwin
2065 if { [istarget powerpc-*-eabi]
2066 || [istarget powerpc*-*-eabispe]
2067 || [istarget *-*-darwin*]} {
2070 set options "-mpower8-vector"
2071 check_runtime_nocache p8vector_hw_available {
2075 asm volatile ("xxlorc vs0,vs0,vs0");
2077 asm volatile ("xxlorc 0,0,0");
2086 # Return 1 if the target supports executing power9 vector instructions, 0
2087 # otherwise. Cache the result.
2089 proc check_p9vector_hw_available { } {
2090 return [check_cached_effective_target p9vector_hw_available {
2091 # Some simulators are known to not support VSX/power8/power9
2092 # instructions. For now, disable on Darwin.
2093 if { [istarget powerpc-*-eabi]
2094 || [istarget powerpc*-*-eabispe]
2095 || [istarget *-*-darwin*]} {
2098 set options "-mpower9-vector"
2099 check_runtime_nocache p9vector_hw_available {
2103 vector double v = (vector double) { 0.0, 0.0 };
2104 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
2112 # Return 1 if the target supports executing power9 modulo instructions, 0
2113 # otherwise. Cache the result.
2115 proc check_p9modulo_hw_available { } {
2116 return [check_cached_effective_target p9modulo_hw_available {
2117 # Some simulators are known to not support VSX/power8/power9
2118 # instructions. For now, disable on Darwin.
2119 if { [istarget powerpc-*-eabi]
2120 || [istarget powerpc*-*-eabispe]
2121 || [istarget *-*-darwin*]} {
2124 set options "-mmodulo"
2125 check_runtime_nocache p9modulo_hw_available {
2128 int i = 5, j = 3, r = -1;
2129 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
2137 # Return 1 if the target supports executing __float128 on PowerPC via software
2138 # emulation, 0 otherwise. Cache the result.
2140 proc check_ppc_float128_sw_available { } {
2141 return [check_cached_effective_target ppc_float128_sw_available {
2142 # Some simulators are known to not support VSX/power8/power9
2143 # instructions. For now, disable on Darwin.
2144 if { [istarget powerpc-*-eabi]
2145 || [istarget powerpc*-*-eabispe]
2146 || [istarget *-*-darwin*]} {
2149 set options "-mfloat128 -mvsx"
2150 check_runtime_nocache ppc_float128_sw_available {
2151 volatile __float128 x = 1.0q;
2152 volatile __float128 y = 2.0q;
2155 __float128 z = x + y;
2163 # Return 1 if the target supports executing __float128 on PowerPC via power9
2164 # hardware instructions, 0 otherwise. Cache the result.
2166 proc check_ppc_float128_hw_available { } {
2167 return [check_cached_effective_target ppc_float128_hw_available {
2168 # Some simulators are known to not support VSX/power8/power9
2169 # instructions. For now, disable on Darwin.
2170 if { [istarget powerpc-*-eabi]
2171 || [istarget powerpc*-*-eabispe]
2172 || [istarget *-*-darwin*]} {
2175 set options "-mfloat128 -mvsx -mfloat128-hardware -mpower9-vector"
2176 check_runtime_nocache ppc_float128_hw_available {
2177 volatile __float128 x = 1.0q;
2178 volatile __float128 y = 2.0q;
2181 __float128 z = x + y;
2182 __float128 w = -1.0q;
2184 __asm__ ("xsaddqp %0,%1,%2" : "+v" (w) : "v" (x), "v" (y));
2185 return ((z != 3.0q) || (z != w);
2192 # Return 1 if the target supports executing VSX instructions, 0
2193 # otherwise. Cache the result.
2195 proc check_vsx_hw_available { } {
2196 return [check_cached_effective_target vsx_hw_available {
2197 # Some simulators are known to not support VSX instructions.
2198 # For now, disable on Darwin
2199 if { [istarget powerpc-*-eabi]
2200 || [istarget powerpc*-*-eabispe]
2201 || [istarget *-*-darwin*]} {
2205 check_runtime_nocache vsx_hw_available {
2209 asm volatile ("xxlor vs0,vs0,vs0");
2211 asm volatile ("xxlor 0,0,0");
2220 # Return 1 if the target supports executing AltiVec instructions, 0
2221 # otherwise. Cache the result.
2223 proc check_vmx_hw_available { } {
2224 return [check_cached_effective_target vmx_hw_available {
2225 # Some simulators are known to not support VMX instructions.
2226 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] } {
2229 # Most targets don't require special flags for this test case, but
2230 # Darwin does. Just to be sure, make sure VSX is not enabled for
2231 # the altivec tests.
2232 if { [istarget *-*-darwin*]
2233 || [istarget *-*-aix*] } {
2234 set options "-maltivec -mno-vsx"
2236 set options "-mno-vsx"
2238 check_runtime_nocache vmx_hw_available {
2242 asm volatile ("vor v0,v0,v0");
2244 asm volatile ("vor 0,0,0");
2253 proc check_ppc_recip_hw_available { } {
2254 return [check_cached_effective_target ppc_recip_hw_available {
2255 # Some simulators may not support FRE/FRES/FRSQRTE/FRSQRTES
2256 # For now, disable on Darwin
2257 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2260 set options "-mpowerpc-gfxopt -mpowerpc-gpopt -mpopcntb"
2261 check_runtime_nocache ppc_recip_hw_available {
2262 volatile double d_recip, d_rsqrt, d_four = 4.0;
2263 volatile float f_recip, f_rsqrt, f_four = 4.0f;
2266 asm volatile ("fres %0,%1" : "=f" (f_recip) : "f" (f_four));
2267 asm volatile ("fre %0,%1" : "=d" (d_recip) : "d" (d_four));
2268 asm volatile ("frsqrtes %0,%1" : "=f" (f_rsqrt) : "f" (f_four));
2269 asm volatile ("frsqrte %0,%1" : "=f" (d_rsqrt) : "d" (d_four));
2277 # Return 1 if the target supports executing AltiVec and Cell PPU
2278 # instructions, 0 otherwise. Cache the result.
2280 proc check_effective_target_cell_hw { } {
2281 return [check_cached_effective_target cell_hw_available {
2282 # Some simulators are known to not support VMX and PPU instructions.
2283 if { [istarget powerpc-*-eabi*] } {
2286 # Most targets don't require special flags for this test
2287 # case, but Darwin and AIX do.
2288 if { [istarget *-*-darwin*]
2289 || [istarget *-*-aix*] } {
2290 set options "-maltivec -mcpu=cell"
2292 set options "-mcpu=cell"
2294 check_runtime_nocache cell_hw_available {
2298 asm volatile ("vor v0,v0,v0");
2299 asm volatile ("lvlx v0,r0,r0");
2301 asm volatile ("vor 0,0,0");
2302 asm volatile ("lvlx 0,0,0");
2311 # Return 1 if the target supports executing 64-bit instructions, 0
2312 # otherwise. Cache the result.
2314 proc check_effective_target_powerpc64 { } {
2315 global powerpc64_available_saved
2318 if [info exists powerpc64_available_saved] {
2319 verbose "check_effective_target_powerpc64 returning saved $powerpc64_available_saved" 2
2321 set powerpc64_available_saved 0
2323 # Some simulators are known to not support powerpc64 instructions.
2324 if { [istarget powerpc-*-eabi*] || [istarget powerpc-ibm-aix*] } {
2325 verbose "check_effective_target_powerpc64 returning 0" 2
2326 return $powerpc64_available_saved
2329 # Set up, compile, and execute a test program containing a 64-bit
2330 # instruction. Include the current process ID in the file
2331 # names to prevent conflicts with invocations for multiple
2336 set f [open $src "w"]
2337 puts $f "int main() {"
2338 puts $f "#ifdef __MACH__"
2339 puts $f " asm volatile (\"extsw r0,r0\");"
2341 puts $f " asm volatile (\"extsw 0,0\");"
2343 puts $f " return 0; }"
2346 set opts "additional_flags=-mcpu=G5"
2348 verbose "check_effective_target_powerpc64 compiling testfile $src" 2
2349 set lines [${tool}_target_compile $src $exe executable "$opts"]
2352 if [string match "" $lines] then {
2353 # No error message, compilation succeeded.
2354 set result [${tool}_load "./$exe" "" ""]
2355 set status [lindex $result 0]
2356 remote_file build delete $exe
2357 verbose "check_effective_target_powerpc64 testfile status is <$status>" 2
2359 if { $status == "pass" } then {
2360 set powerpc64_available_saved 1
2363 verbose "check_effective_target_powerpc64 testfile compilation failed" 2
2367 return $powerpc64_available_saved
2370 # GCC 3.4.0 for powerpc64-*-linux* included an ABI fix for passing
2371 # complex float arguments. This affects gfortran tests that call cabsf
2372 # in libm built by an earlier compiler. Return 0 if libm uses the same
2373 # argument passing as the compiler under test, 1 otherwise.
2375 proc check_effective_target_broken_cplxf_arg { } {
2376 # Skip the work for targets known not to be affected.
2377 if { ![istarget powerpc*-*-linux*] || ![is-effective-target lp64] } {
2381 return [check_cached_effective_target broken_cplxf_arg {
2382 check_runtime_nocache broken_cplxf_arg {
2383 #include <complex.h>
2384 extern void abort (void);
2385 float fabsf (float);
2386 float cabsf (_Complex float);
2393 if (fabsf (f - 5.0) > 0.0001)
2394 /* Yes, it's broken. */
2396 /* All fine, not broken. */
2403 # Return 1 is this is a TI C6X target supporting C67X instructions
2404 proc check_effective_target_ti_c67x { } {
2405 return [check_no_compiler_messages ti_c67x assembly {
2406 #if !defined(_TMS320C6700)
2407 #error !_TMS320C6700
2412 # Return 1 is this is a TI C6X target supporting C64X+ instructions
2413 proc check_effective_target_ti_c64xp { } {
2414 return [check_no_compiler_messages ti_c64xp assembly {
2415 #if !defined(_TMS320C6400_PLUS)
2416 #error !_TMS320C6400_PLUS
2422 proc check_alpha_max_hw_available { } {
2423 return [check_runtime alpha_max_hw_available {
2424 int main() { return __builtin_alpha_amask(1<<8) != 0; }
2428 # Returns true iff the FUNCTION is available on the target system.
2429 # (This is essentially a Tcl implementation of Autoconf's
2432 proc check_function_available { function } {
2433 return [check_no_compiler_messages ${function}_available \
2439 int main () { $function (); }
2443 # Returns true iff "fork" is available on the target system.
2445 proc check_fork_available {} {
2446 return [check_function_available "fork"]
2449 # Returns true iff "mkfifo" is available on the target system.
2451 proc check_mkfifo_available {} {
2452 if { [istarget *-*-cygwin*] } {
2453 # Cygwin has mkfifo, but support is incomplete.
2457 return [check_function_available "mkfifo"]
2460 # Returns true iff "__cxa_atexit" is used on the target system.
2462 proc check_cxa_atexit_available { } {
2463 return [check_cached_effective_target cxa_atexit_available {
2464 if { [istarget hppa*-*-hpux10*] } {
2465 # HP-UX 10 doesn't have __cxa_atexit but subsequent test passes.
2467 } elseif { [istarget *-*-vxworks] } {
2468 # vxworks doesn't have __cxa_atexit but subsequent test passes.
2471 check_runtime_nocache cxa_atexit_available {
2474 static unsigned int count;
2491 Y() { f(); count = 2; }
2500 int main() { return 0; }
2506 proc check_effective_target_objc2 { } {
2507 return [check_no_compiler_messages objc2 object {
2516 proc check_effective_target_next_runtime { } {
2517 return [check_no_compiler_messages objc2 object {
2518 #ifdef __NEXT_RUNTIME__
2521 #error !__NEXT_RUNTIME__
2526 # Return 1 if we're generating 32-bit code using default options, 0
2529 proc check_effective_target_ilp32 { } {
2530 return [check_no_compiler_messages ilp32 object {
2531 int dummy[sizeof (int) == 4
2532 && sizeof (void *) == 4
2533 && sizeof (long) == 4 ? 1 : -1];
2537 # Return 1 if we're generating ia32 code using default options, 0
2540 proc check_effective_target_ia32 { } {
2541 return [check_no_compiler_messages ia32 object {
2542 int dummy[sizeof (int) == 4
2543 && sizeof (void *) == 4
2544 && sizeof (long) == 4 ? 1 : -1] = { __i386__ };
2548 # Return 1 if we're generating x32 code using default options, 0
2551 proc check_effective_target_x32 { } {
2552 return [check_no_compiler_messages x32 object {
2553 int dummy[sizeof (int) == 4
2554 && sizeof (void *) == 4
2555 && sizeof (long) == 4 ? 1 : -1] = { __x86_64__ };
2559 # Return 1 if we're generating 32-bit integers using default
2560 # options, 0 otherwise.
2562 proc check_effective_target_int32 { } {
2563 return [check_no_compiler_messages int32 object {
2564 int dummy[sizeof (int) == 4 ? 1 : -1];
2568 # Return 1 if we're generating 32-bit or larger integers using default
2569 # options, 0 otherwise.
2571 proc check_effective_target_int32plus { } {
2572 return [check_no_compiler_messages int32plus object {
2573 int dummy[sizeof (int) >= 4 ? 1 : -1];
2577 # Return 1 if we're generating 32-bit or larger pointers using default
2578 # options, 0 otherwise.
2580 proc check_effective_target_ptr32plus { } {
2581 # The msp430 has 16-bit or 20-bit pointers. The 20-bit pointer is stored
2582 # in a 32-bit slot when in memory, so sizeof(void *) returns 4, but it
2583 # cannot really hold a 32-bit address, so we always return false here.
2584 if { [istarget msp430-*-*] } {
2588 return [check_no_compiler_messages ptr32plus object {
2589 int dummy[sizeof (void *) >= 4 ? 1 : -1];
2593 # Return 1 if we support 32-bit or larger array and structure sizes
2594 # using default options, 0 otherwise. Avoid false positive on
2595 # targets with 20 or 24 bit address spaces.
2597 proc check_effective_target_size32plus { } {
2598 return [check_no_compiler_messages size32plus object {
2599 char dummy[16777217L];
2603 # Returns 1 if we're generating 16-bit or smaller integers with the
2604 # default options, 0 otherwise.
2606 proc check_effective_target_int16 { } {
2607 return [check_no_compiler_messages int16 object {
2608 int dummy[sizeof (int) < 4 ? 1 : -1];
2612 # Return 1 if we're generating 64-bit code using default options, 0
2615 proc check_effective_target_lp64 { } {
2616 return [check_no_compiler_messages lp64 object {
2617 int dummy[sizeof (int) == 4
2618 && sizeof (void *) == 8
2619 && sizeof (long) == 8 ? 1 : -1];
2623 # Return 1 if we're generating 64-bit code using default llp64 options,
2626 proc check_effective_target_llp64 { } {
2627 return [check_no_compiler_messages llp64 object {
2628 int dummy[sizeof (int) == 4
2629 && sizeof (void *) == 8
2630 && sizeof (long long) == 8
2631 && sizeof (long) == 4 ? 1 : -1];
2635 # Return 1 if long and int have different sizes,
2638 proc check_effective_target_long_neq_int { } {
2639 return [check_no_compiler_messages long_ne_int object {
2640 int dummy[sizeof (int) != sizeof (long) ? 1 : -1];
2644 # Return 1 if the target supports long double larger than double,
2647 proc check_effective_target_large_long_double { } {
2648 return [check_no_compiler_messages large_long_double object {
2649 int dummy[sizeof(long double) > sizeof(double) ? 1 : -1];
2653 # Return 1 if the target supports double larger than float,
2656 proc check_effective_target_large_double { } {
2657 return [check_no_compiler_messages large_double object {
2658 int dummy[sizeof(double) > sizeof(float) ? 1 : -1];
2662 # Return 1 if the target supports long double of 128 bits,
2665 proc check_effective_target_longdouble128 { } {
2666 return [check_no_compiler_messages longdouble128 object {
2667 int dummy[sizeof(long double) == 16 ? 1 : -1];
2671 # Return 1 if the target supports double of 64 bits,
2674 proc check_effective_target_double64 { } {
2675 return [check_no_compiler_messages double64 object {
2676 int dummy[sizeof(double) == 8 ? 1 : -1];
2680 # Return 1 if the target supports double of at least 64 bits,
2683 proc check_effective_target_double64plus { } {
2684 return [check_no_compiler_messages double64plus object {
2685 int dummy[sizeof(double) >= 8 ? 1 : -1];
2689 # Return 1 if the target supports 'w' suffix on floating constant
2692 proc check_effective_target_has_w_floating_suffix { } {
2694 if [check_effective_target_c++] {
2695 append opts "-std=gnu++03"
2697 return [check_no_compiler_messages w_fp_suffix object {
2702 # Return 1 if the target supports 'q' suffix on floating constant
2705 proc check_effective_target_has_q_floating_suffix { } {
2707 if [check_effective_target_c++] {
2708 append opts "-std=gnu++03"
2710 return [check_no_compiler_messages q_fp_suffix object {
2715 # Return 1 if the target supports the _FloatN / _FloatNx type
2716 # indicated in the function name, 0 otherwise.
2718 proc check_effective_target_float16 {} {
2719 return [check_no_compiler_messages_nocache float16 object {
2721 } [add_options_for_float16 ""]]
2724 proc check_effective_target_float32 {} {
2725 return [check_no_compiler_messages_nocache float32 object {
2727 } [add_options_for_float32 ""]]
2730 proc check_effective_target_float64 {} {
2731 return [check_no_compiler_messages_nocache float64 object {
2733 } [add_options_for_float64 ""]]
2736 proc check_effective_target_float128 {} {
2737 return [check_no_compiler_messages_nocache float128 object {
2739 } [add_options_for_float128 ""]]
2742 proc check_effective_target_float32x {} {
2743 return [check_no_compiler_messages_nocache float32x object {
2745 } [add_options_for_float32x ""]]
2748 proc check_effective_target_float64x {} {
2749 return [check_no_compiler_messages_nocache float64x object {
2751 } [add_options_for_float64x ""]]
2754 proc check_effective_target_float128x {} {
2755 return [check_no_compiler_messages_nocache float128x object {
2757 } [add_options_for_float128x ""]]
2760 # Likewise, but runtime support for any special options used as well
2761 # as compile-time support is required.
2763 proc check_effective_target_float16_runtime {} {
2764 return [check_effective_target_float16]
2767 proc check_effective_target_float32_runtime {} {
2768 return [check_effective_target_float32]
2771 proc check_effective_target_float64_runtime {} {
2772 return [check_effective_target_float64]
2775 proc check_effective_target_float128_runtime {} {
2776 if { ![check_effective_target_float128] } {
2779 if { [istarget powerpc*-*-*] } {
2780 return [check_effective_target_base_quadfloat_support]
2785 proc check_effective_target_float32x_runtime {} {
2786 return [check_effective_target_float32x]
2789 proc check_effective_target_float64x_runtime {} {
2790 if { ![check_effective_target_float64x] } {
2793 if { [istarget powerpc*-*-*] } {
2794 return [check_effective_target_base_quadfloat_support]
2799 proc check_effective_target_float128x_runtime {} {
2800 return [check_effective_target_float128x]
2803 # Return 1 if the target hardware supports any options added for
2804 # _FloatN and _FloatNx types, 0 otherwise.
2806 proc check_effective_target_floatn_nx_runtime {} {
2807 if { [istarget powerpc*-*-aix*] } {
2810 if { [istarget powerpc*-*-*] } {
2811 return [check_effective_target_base_quadfloat_support]
2816 # Add options needed to use the _FloatN / _FloatNx type indicated in
2817 # the function name.
2819 proc add_options_for_float16 { flags } {
2820 if { [istarget arm*-*-*] } {
2821 return "$flags -mfp16-format=ieee"
2826 proc add_options_for_float32 { flags } {
2830 proc add_options_for_float64 { flags } {
2834 proc add_options_for_float128 { flags } {
2835 return [add_options_for___float128 "$flags"]
2838 proc add_options_for_float32x { flags } {
2842 proc add_options_for_float64x { flags } {
2843 return [add_options_for___float128 "$flags"]
2846 proc add_options_for_float128x { flags } {
2850 # Return 1 if the target supports __float128,
2853 proc check_effective_target___float128 { } {
2854 if { [istarget powerpc*-*-*] } {
2855 return [check_ppc_float128_sw_available]
2857 if { [istarget ia64-*-*]
2858 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
2864 proc add_options_for___float128 { flags } {
2865 if { [istarget powerpc*-*-*] } {
2866 return "$flags -mfloat128 -mvsx"
2871 # Return 1 if the target supports any special run-time requirements
2872 # for __float128 or _Float128,
2875 proc check_effective_target_base_quadfloat_support { } {
2876 if { [istarget powerpc*-*-*] } {
2877 return [check_vsx_hw_available]
2882 # Return 1 if the target supports compiling fixed-point,
2885 proc check_effective_target_fixed_point { } {
2886 return [check_no_compiler_messages fixed_point object {
2887 _Sat _Fract x; _Sat _Accum y;
2891 # Return 1 if the target supports compiling decimal floating point,
2894 proc check_effective_target_dfp_nocache { } {
2895 verbose "check_effective_target_dfp_nocache: compiling source" 2
2896 set ret [check_no_compiler_messages_nocache dfp object {
2897 float x __attribute__((mode(DD)));
2899 verbose "check_effective_target_dfp_nocache: returning $ret" 2
2903 proc check_effective_target_dfprt_nocache { } {
2904 return [check_runtime_nocache dfprt {
2905 typedef float d64 __attribute__((mode(DD)));
2906 d64 x = 1.2df, y = 2.3dd, z;
2907 int main () { z = x + y; return 0; }
2911 # Return 1 if the target supports compiling Decimal Floating Point,
2914 # This won't change for different subtargets so cache the result.
2916 proc check_effective_target_dfp { } {
2917 return [check_cached_effective_target dfp {
2918 check_effective_target_dfp_nocache
2922 # Return 1 if the target supports linking and executing Decimal Floating
2923 # Point, 0 otherwise.
2925 # This won't change for different subtargets so cache the result.
2927 proc check_effective_target_dfprt { } {
2928 return [check_cached_effective_target dfprt {
2929 check_effective_target_dfprt_nocache
2933 proc check_effective_target_powerpc_popcntb_ok { } {
2934 return [check_cached_effective_target powerpc_popcntb_ok {
2936 # Disable on Darwin.
2937 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2940 check_runtime_nocache powerpc_popcntb_ok {
2942 volatile int a = 0x12345678;
2945 asm volatile ("popcntb %0,%1" : "=r" (r) : "r" (a));
2953 # Return 1 if the target supports executing DFP hardware instructions,
2954 # 0 otherwise. Cache the result.
2956 proc check_dfp_hw_available { } {
2957 return [check_cached_effective_target dfp_hw_available {
2958 # For now, disable on Darwin
2959 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
2962 check_runtime_nocache dfp_hw_available {
2963 volatile _Decimal64 r;
2964 volatile _Decimal64 a = 4.0DD;
2965 volatile _Decimal64 b = 2.0DD;
2968 asm volatile ("dadd %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2969 asm volatile ("dsub %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2970 asm volatile ("dmul %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2971 asm volatile ("ddiv %0,%1,%2" : "=d" (r) : "d" (a), "d" (b));
2974 } "-mcpu=power6 -mhard-float"
2979 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2981 proc check_effective_target_ucn_nocache { } {
2982 # -std=c99 is only valid for C
2983 if [check_effective_target_c] {
2984 set ucnopts "-std=c99"
2988 verbose "check_effective_target_ucn_nocache: compiling source" 2
2989 set ret [check_no_compiler_messages_nocache ucn object {
2992 verbose "check_effective_target_ucn_nocache: returning $ret" 2
2996 # Return 1 if the target supports compiling and assembling UCN, 0 otherwise.
2998 # This won't change for different subtargets, so cache the result.
3000 proc check_effective_target_ucn { } {
3001 return [check_cached_effective_target ucn {
3002 check_effective_target_ucn_nocache
3006 # Return 1 if the target needs a command line argument to enable a SIMD
3009 proc check_effective_target_vect_cmdline_needed { } {
3010 global et_vect_cmdline_needed_saved
3011 global et_vect_cmdline_needed_target_name
3013 if { ![info exists et_vect_cmdline_needed_target_name] } {
3014 set et_vect_cmdline_needed_target_name ""
3017 # If the target has changed since we set the cached value, clear it.
3018 set current_target [current_target_name]
3019 if { $current_target != $et_vect_cmdline_needed_target_name } {
3020 verbose "check_effective_target_vect_cmdline_needed: `$et_vect_cmdline_needed_target_name' `$current_target'" 2
3021 set et_vect_cmdline_needed_target_name $current_target
3022 if { [info exists et_vect_cmdline_needed_saved] } {
3023 verbose "check_effective_target_vect_cmdline_needed: removing cached result" 2
3024 unset et_vect_cmdline_needed_saved
3028 if [info exists et_vect_cmdline_needed_saved] {
3029 verbose "check_effective_target_vect_cmdline_needed: using cached result" 2
3031 set et_vect_cmdline_needed_saved 1
3032 if { [istarget alpha*-*-*]
3033 || [istarget ia64-*-*]
3034 || (([istarget i?86-*-*] || [istarget x86_64-*-*])
3035 && ![is-effective-target ia32])
3036 || ([istarget powerpc*-*-*]
3037 && ([check_effective_target_powerpc_spe]
3038 || [check_effective_target_powerpc_altivec]))
3039 || ([istarget sparc*-*-*] && [check_effective_target_sparc_vis])
3040 || [istarget spu-*-*]
3041 || ([istarget arm*-*-*] && [check_effective_target_arm_neon])
3042 || [istarget aarch64*-*-*] } {
3043 set et_vect_cmdline_needed_saved 0
3047 verbose "check_effective_target_vect_cmdline_needed: returning $et_vect_cmdline_needed_saved" 2
3048 return $et_vect_cmdline_needed_saved
3051 # Return 1 if the target supports hardware vectors of int, 0 otherwise.
3053 # This won't change for different subtargets so cache the result.
3055 proc check_effective_target_vect_int { } {
3056 global et_vect_int_saved
3059 if [info exists et_vect_int_saved($et_index)] {
3060 verbose "check_effective_target_vect_int: using cached result" 2
3062 set et_vect_int_saved($et_index) 0
3063 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3064 || ([istarget powerpc*-*-*]
3065 && ![istarget powerpc-*-linux*paired*])
3066 || [istarget spu-*-*]
3067 || [istarget sparc*-*-*]
3068 || [istarget alpha*-*-*]
3069 || [istarget ia64-*-*]
3070 || [istarget aarch64*-*-*]
3071 || [is-effective-target arm_neon]
3072 || ([istarget mips*-*-*]
3073 && ([et-is-effective-target mips_loongson]
3074 || [et-is-effective-target mips_msa]))
3075 || ([istarget s390*-*-*]
3076 && [check_effective_target_s390_vx]) } {
3077 set et_vect_int_saved($et_index) 1
3081 verbose "check_effective_target_vect_int:\
3082 returning $et_vect_int_saved($et_index)" 2
3083 return $et_vect_int_saved($et_index)
3086 # Return 1 if the target supports signed int->float conversion
3089 proc check_effective_target_vect_intfloat_cvt { } {
3090 global et_vect_intfloat_cvt_saved
3093 if [info exists et_vect_intfloat_cvt_saved($et_index)] {
3094 verbose "check_effective_target_vect_intfloat_cvt:\
3095 using cached result" 2
3097 set et_vect_intfloat_cvt_saved($et_index) 0
3098 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3099 || ([istarget powerpc*-*-*]
3100 && ![istarget powerpc-*-linux*paired*])
3101 || [is-effective-target arm_neon]
3102 || ([istarget mips*-*-*]
3103 && [et-is-effective-target mips_msa]) } {
3104 set et_vect_intfloat_cvt_saved($et_index) 1
3108 verbose "check_effective_target_vect_intfloat_cvt:\
3109 returning $et_vect_intfloat_cvt_saved($et_index)" 2
3110 return $et_vect_intfloat_cvt_saved($et_index)
3113 # Return 1 if the target supports signed double->int conversion
3116 proc check_effective_target_vect_doubleint_cvt { } {
3117 global et_vect_doubleint_cvt_saved
3120 if [info exists et_vect_doubleint_cvt_saved($et_index)] {
3121 verbose "check_effective_target_vect_doubleint_cvt: using cached result" 2
3123 set et_vect_doubleint_cvt_saved($et_index) 0
3124 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3125 && [check_no_compiler_messages vect_doubleint_cvt assembly {
3126 #ifdef __tune_atom__
3127 # error No double vectorizer support.
3130 || [istarget aarch64*-*-*]
3131 || [istarget spu-*-*]
3132 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3133 || ([istarget mips*-*-*]
3134 && [et-is-effective-target mips_msa]) } {
3135 set et_vect_doubleint_cvt_saved($et_index) 1
3139 verbose "check_effective_target_vect_doubleint_cvt:\
3140 returning $et_vect_doubleint_cvt_saved($et_index)" 2
3141 return $et_vect_doubleint_cvt_saved($et_index)
3144 # Return 1 if the target supports signed int->double conversion
3147 proc check_effective_target_vect_intdouble_cvt { } {
3148 global et_vect_intdouble_cvt_saved
3151 if [info exists et_vect_intdouble_cvt_saved($et_index)] {
3152 verbose "check_effective_target_vect_intdouble_cvt: using cached result" 2
3154 set et_vect_intdouble_cvt_saved($et_index) 0
3155 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3156 && [check_no_compiler_messages vect_intdouble_cvt assembly {
3157 #ifdef __tune_atom__
3158 # error No double vectorizer support.
3161 || [istarget aarch64*-*-*]
3162 || [istarget spu-*-*]
3163 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
3164 || ([istarget mips*-*-*]
3165 && [et-is-effective-target mips_msa]) } {
3166 set et_vect_intdouble_cvt_saved($et_index) 1
3170 verbose "check_effective_target_vect_intdouble_cvt:\
3171 returning $et_vect_intdouble_cvt_saved($et_index)" 2
3172 return $et_vect_intdouble_cvt_saved($et_index)
3175 #Return 1 if we're supporting __int128 for target, 0 otherwise.
3177 proc check_effective_target_int128 { } {
3178 return [check_no_compiler_messages int128 object {
3180 #ifndef __SIZEOF_INT128__
3189 # Return 1 if the target supports unsigned int->float conversion
3192 proc check_effective_target_vect_uintfloat_cvt { } {
3193 global et_vect_uintfloat_cvt_saved
3196 if [info exists et_vect_uintfloat_cvt_saved($et_index)] {
3197 verbose "check_effective_target_vect_uintfloat_cvt:\
3198 using cached result" 2
3200 set et_vect_uintfloat_cvt_saved($et_index) 0
3201 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3202 || ([istarget powerpc*-*-*]
3203 && ![istarget powerpc-*-linux*paired*])
3204 || [istarget aarch64*-*-*]
3205 || [is-effective-target arm_neon]
3206 || ([istarget mips*-*-*]
3207 && [et-is-effective-target mips_msa]) } {
3208 set et_vect_uintfloat_cvt_saved($et_index) 1
3212 verbose "check_effective_target_vect_uintfloat_cvt:\
3213 returning $et_vect_uintfloat_cvt_saved($et_index)" 2
3214 return $et_vect_uintfloat_cvt_saved($et_index)
3218 # Return 1 if the target supports signed float->int conversion
3221 proc check_effective_target_vect_floatint_cvt { } {
3222 global et_vect_floatint_cvt_saved
3225 if [info exists et_vect_floatint_cvt_saved($et_index)] {
3226 verbose "check_effective_target_vect_floatint_cvt:\
3227 using cached result" 2
3229 set et_vect_floatint_cvt_saved($et_index) 0
3230 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
3231 || ([istarget powerpc*-*-*]
3232 && ![istarget powerpc-*-linux*paired*])
3233 || [is-effective-target arm_neon]
3234 || ([istarget mips*-*-*]
3235 && [et-is-effective-target mips_msa]) } {
3236 set et_vect_floatint_cvt_saved($et_index) 1
3240 verbose "check_effective_target_vect_floatint_cvt:\
3241 returning $et_vect_floatint_cvt_saved($et_index)" 2
3242 return $et_vect_floatint_cvt_saved($et_index)
3245 # Return 1 if the target supports unsigned float->int conversion
3248 proc check_effective_target_vect_floatuint_cvt { } {
3249 global et_vect_floatuint_cvt_saved
3252 if [info exists et_vect_floatuint_cvt_saved($et_index)] {
3253 verbose "check_effective_target_vect_floatuint_cvt:\
3254 using cached result" 2
3256 set et_vect_floatuint_cvt_saved($et_index) 0
3257 if { ([istarget powerpc*-*-*]
3258 && ![istarget powerpc-*-linux*paired*])
3259 || [is-effective-target arm_neon]
3260 || ([istarget mips*-*-*]
3261 && [et-is-effective-target mips_msa]) } {
3262 set et_vect_floatuint_cvt_saved($et_index) 1
3266 verbose "check_effective_target_vect_floatuint_cvt:\
3267 returning $et_vect_floatuint_cvt_saved($et_index)" 2
3268 return $et_vect_floatuint_cvt_saved($et_index)
3271 # Return 1 if peeling for alignment might be profitable on the target
3274 proc check_effective_target_vect_peeling_profitable { } {
3275 global et_vect_peeling_profitable_saved
3278 if [info exists et_vect_peeling_profitable_saved($et_index)] {
3279 verbose "check_effective_target_vect_peeling_profitable: using cached result" 2
3281 set et_vect_peeling_profitable_saved($et_index) 1
3282 if { ([istarget s390*-*-*]
3283 && [check_effective_target_s390_vx])
3284 || [check_effective_target_vect_element_align_preferred] } {
3285 set et_vect_peeling_profitable_saved($et_index) 0
3289 verbose "check_effective_target_vect_peeling_profitable:\
3290 returning $et_vect_peeling_profitable_saved($et_index)" 2
3291 return $et_vect_peeling_profitable_saved($et_index)
3294 # Return 1 if the target supports #pragma omp declare simd, 0 otherwise.
3296 # This won't change for different subtargets so cache the result.
3298 proc check_effective_target_vect_simd_clones { } {
3299 global et_vect_simd_clones_saved
3302 if [info exists et_vect_simd_clones_saved($et_index)] {
3303 verbose "check_effective_target_vect_simd_clones: using cached result" 2
3305 set et_vect_simd_clones_saved($et_index) 0
3306 # On i?86/x86_64 #pragma omp declare simd builds a sse2, avx,
3307 # avx2 and avx512f clone. Only the right clone for the
3308 # specified arch will be chosen, but still we need to at least
3309 # be able to assemble avx512f.
3310 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
3311 && [check_effective_target_avx512f]) } {
3312 set et_vect_simd_clones_saved($et_index) 1
3316 verbose "check_effective_target_vect_simd_clones:\
3317 returning $et_vect_simd_clones_saved($et_index)" 2
3318 return $et_vect_simd_clones_saved($et_index)
3321 # Return 1 if this is a AArch64 target supporting big endian
3322 proc check_effective_target_aarch64_big_endian { } {
3323 return [check_no_compiler_messages aarch64_big_endian assembly {
3324 #if !defined(__aarch64__) || !defined(__AARCH64EB__)
3325 #error !__aarch64__ || !__AARCH64EB__
3330 # Return 1 if this is a AArch64 target supporting little endian
3331 proc check_effective_target_aarch64_little_endian { } {
3332 if { ![istarget aarch64*-*-*] } {
3336 return [check_no_compiler_messages aarch64_little_endian assembly {
3337 #if !defined(__aarch64__) || defined(__AARCH64EB__)
3343 # Return 1 if this is an AArch64 target supporting SVE.
3344 proc check_effective_target_aarch64_sve { } {
3345 if { ![istarget aarch64*-*-*] } {
3348 return [check_no_compiler_messages aarch64_sve assembly {
3349 #if !defined (__ARM_FEATURE_SVE)
3355 # Return the size in bits of an SVE vector, or 0 if the size is variable.
3356 proc aarch64_sve_bits { } {
3357 return [check_cached_effective_target aarch64_sve_bits {
3360 set src dummy[pid].c
3361 set f [open $src "w"]
3362 puts $f "int bits = __ARM_FEATURE_SVE_BITS;"
3364 set output [${tool}_target_compile $src "" preprocess ""]
3367 regsub {.*bits = ([^;]*);.*} $output {\1} bits
3372 # Return 1 if this is a compiler supporting ARC atomic operations
3373 proc check_effective_target_arc_atomic { } {
3374 return [check_no_compiler_messages arc_atomic assembly {
3375 #if !defined(__ARC_ATOMIC__)
3381 # Return 1 if this is an arm target using 32-bit instructions
3382 proc check_effective_target_arm32 { } {
3383 if { ![istarget arm*-*-*] } {
3387 return [check_no_compiler_messages arm32 assembly {
3388 #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
3389 #error !__arm || __thumb__ && !__thumb2__
3394 # Return 1 if this is an arm target not using Thumb
3395 proc check_effective_target_arm_nothumb { } {
3396 if { ![istarget arm*-*-*] } {
3400 return [check_no_compiler_messages arm_nothumb assembly {
3401 #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
3402 #error !__arm__ || __thumb || __thumb2__
3407 # Return 1 if this is a little-endian ARM target
3408 proc check_effective_target_arm_little_endian { } {
3409 if { ![istarget arm*-*-*] } {
3413 return [check_no_compiler_messages arm_little_endian assembly {
3414 #if !defined(__arm__) || !defined(__ARMEL__)
3415 #error !__arm__ || !__ARMEL__
3420 # Return 1 if this is an ARM target that only supports aligned vector accesses
3421 proc check_effective_target_arm_vect_no_misalign { } {
3422 if { ![istarget arm*-*-*] } {
3426 return [check_no_compiler_messages arm_vect_no_misalign assembly {
3427 #if !defined(__arm__) \
3428 || (defined(__ARM_FEATURE_UNALIGNED) \
3429 && defined(__ARMEL__))
3430 #error !__arm__ || (__ARMEL__ && __ARM_FEATURE_UNALIGNED)
3436 # Return 1 if this is an ARM target supporting -mfloat-abi=soft. Some
3437 # multilibs may be incompatible with this option.
3439 proc check_effective_target_arm_soft_ok { } {
3440 if { [check_effective_target_arm32] } {
3441 return [check_no_compiler_messages arm_soft_ok executable {
3442 int main() { return 0;}
3443 } "-mfloat-abi=soft"]
3449 # Return 1 if this is an ARM target supporting -mfpu=vfp
3450 # -mfloat-abi=softfp. Some multilibs may be incompatible with these
3453 proc check_effective_target_arm_vfp_ok { } {
3454 if { [check_effective_target_arm32] } {
3455 return [check_no_compiler_messages arm_vfp_ok object {
3457 } "-mfpu=vfp -mfloat-abi=softfp"]
3463 # Return 1 if this is an ARM target supporting -mfpu=vfp3
3464 # -mfloat-abi=softfp.
3466 proc check_effective_target_arm_vfp3_ok { } {
3467 if { [check_effective_target_arm32] } {
3468 return [check_no_compiler_messages arm_vfp3_ok object {
3470 } "-mfpu=vfp3 -mfloat-abi=softfp"]
3476 # Return 1 if this is an ARM target supporting -mfpu=fp-armv8
3477 # -mfloat-abi=softfp.
3478 proc check_effective_target_arm_v8_vfp_ok {} {
3479 if { [check_effective_target_arm32] } {
3480 return [check_no_compiler_messages arm_v8_vfp_ok object {
3483 __asm__ volatile ("vrinta.f32.f32 s0, s0");
3486 } "-mfpu=fp-armv8 -mfloat-abi=softfp"]
3492 # Return 1 if this is an ARM target supporting -mfpu=vfp
3493 # -mfloat-abi=hard. Some multilibs may be incompatible with these
3496 proc check_effective_target_arm_hard_vfp_ok { } {
3497 if { [check_effective_target_arm32]
3498 && ! [check-flags [list "" { *-*-* } { "-mfloat-abi=*" } { "-mfloat-abi=hard" }]] } {
3499 return [check_no_compiler_messages arm_hard_vfp_ok executable {
3500 int main() { return 0;}
3501 } "-mfpu=vfp -mfloat-abi=hard"]
3507 # Return 1 if this is an ARM target defining __ARM_FP. We may need
3508 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3509 # incompatible with these options. Also set et_arm_fp_flags to the
3510 # best options to add.
3512 proc check_effective_target_arm_fp_ok_nocache { } {
3513 global et_arm_fp_flags
3514 set et_arm_fp_flags ""
3515 if { [check_effective_target_arm32] } {
3516 foreach flags {"" "-mfloat-abi=softfp" "-mfloat-abi=hard"} {
3517 if { [check_no_compiler_messages_nocache arm_fp_ok object {
3519 #error __ARM_FP not defined
3522 set et_arm_fp_flags $flags
3531 proc check_effective_target_arm_fp_ok { } {
3532 return [check_cached_effective_target arm_fp_ok \
3533 check_effective_target_arm_fp_ok_nocache]
3536 # Add the options needed to define __ARM_FP. We need either
3537 # -mfloat-abi=softfp or -mfloat-abi=hard, but if one is already
3538 # specified by the multilib, use it.
3540 proc add_options_for_arm_fp { flags } {
3541 if { ! [check_effective_target_arm_fp_ok] } {
3544 global et_arm_fp_flags
3545 return "$flags $et_arm_fp_flags"
3548 # Return 1 if this is an ARM target that supports DSP multiply with
3549 # current multilib flags.
3551 proc check_effective_target_arm_dsp { } {
3552 return [check_no_compiler_messages arm_dsp assembly {
3553 #ifndef __ARM_FEATURE_DSP
3560 # Return 1 if this is an ARM target that supports unaligned word/halfword
3561 # load/store instructions.
3563 proc check_effective_target_arm_unaligned { } {
3564 return [check_no_compiler_messages arm_unaligned assembly {
3565 #ifndef __ARM_FEATURE_UNALIGNED
3566 #error no unaligned support
3572 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3573 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3574 # incompatible with these options. Also set et_arm_crypto_flags to the
3575 # best options to add.
3577 proc check_effective_target_arm_crypto_ok_nocache { } {
3578 global et_arm_crypto_flags
3579 set et_arm_crypto_flags ""
3580 if { [check_effective_target_arm_v8_neon_ok] } {
3581 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=crypto-neon-fp-armv8" "-mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp"} {
3582 if { [check_no_compiler_messages_nocache arm_crypto_ok object {
3583 #include "arm_neon.h"
3585 foo (uint8x16_t a, uint8x16_t b)
3587 return vaeseq_u8 (a, b);
3590 set et_arm_crypto_flags $flags
3599 # Return 1 if this is an ARM target supporting -mfpu=crypto-neon-fp-armv8
3601 proc check_effective_target_arm_crypto_ok { } {
3602 return [check_cached_effective_target arm_crypto_ok \
3603 check_effective_target_arm_crypto_ok_nocache]
3606 # Add options for crypto extensions.
3607 proc add_options_for_arm_crypto { flags } {
3608 if { ! [check_effective_target_arm_crypto_ok] } {
3611 global et_arm_crypto_flags
3612 return "$flags $et_arm_crypto_flags"
3615 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3616 # or -mfloat-abi=hard, but if one is already specified by the
3617 # multilib, use it. Similarly, if a -mfpu option already enables
3618 # NEON, do not add -mfpu=neon.
3620 proc add_options_for_arm_neon { flags } {
3621 if { ! [check_effective_target_arm_neon_ok] } {
3624 global et_arm_neon_flags
3625 return "$flags $et_arm_neon_flags"
3628 proc add_options_for_arm_v8_vfp { flags } {
3629 if { ! [check_effective_target_arm_v8_vfp_ok] } {
3632 return "$flags -mfpu=fp-armv8 -mfloat-abi=softfp"
3635 proc add_options_for_arm_v8_neon { flags } {
3636 if { ! [check_effective_target_arm_v8_neon_ok] } {
3639 global et_arm_v8_neon_flags
3640 return "$flags $et_arm_v8_neon_flags -march=armv8-a"
3643 # Add the options needed for ARMv8.1 Adv.SIMD. Also adds the ARMv8 NEON
3644 # options for AArch64 and for ARM.
3646 proc add_options_for_arm_v8_1a_neon { flags } {
3647 if { ! [check_effective_target_arm_v8_1a_neon_ok] } {
3650 global et_arm_v8_1a_neon_flags
3651 return "$flags $et_arm_v8_1a_neon_flags"
3654 # Add the options needed for ARMv8.2 with the scalar FP16 extension.
3655 # Also adds the ARMv8 FP options for ARM and for AArch64.
3657 proc add_options_for_arm_v8_2a_fp16_scalar { flags } {
3658 if { ! [check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
3661 global et_arm_v8_2a_fp16_scalar_flags
3662 return "$flags $et_arm_v8_2a_fp16_scalar_flags"
3665 # Add the options needed for ARMv8.2 with the FP16 extension. Also adds
3666 # the ARMv8 NEON options for ARM and for AArch64.
3668 proc add_options_for_arm_v8_2a_fp16_neon { flags } {
3669 if { ! [check_effective_target_arm_v8_2a_fp16_neon_ok] } {
3672 global et_arm_v8_2a_fp16_neon_flags
3673 return "$flags $et_arm_v8_2a_fp16_neon_flags"
3676 proc add_options_for_arm_crc { flags } {
3677 if { ! [check_effective_target_arm_crc_ok] } {
3680 global et_arm_crc_flags
3681 return "$flags $et_arm_crc_flags"
3684 # Add the options needed for NEON. We need either -mfloat-abi=softfp
3685 # or -mfloat-abi=hard, but if one is already specified by the
3686 # multilib, use it. Similarly, if a -mfpu option already enables
3687 # NEON, do not add -mfpu=neon.
3689 proc add_options_for_arm_neonv2 { flags } {
3690 if { ! [check_effective_target_arm_neonv2_ok] } {
3693 global et_arm_neonv2_flags
3694 return "$flags $et_arm_neonv2_flags"
3697 # Add the options needed for vfp3.
3698 proc add_options_for_arm_vfp3 { flags } {
3699 if { ! [check_effective_target_arm_vfp3_ok] } {
3702 return "$flags -mfpu=vfp3 -mfloat-abi=softfp"
3705 # Return 1 if this is an ARM target supporting -mfpu=neon
3706 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3707 # incompatible with these options. Also set et_arm_neon_flags to the
3708 # best options to add.
3710 proc check_effective_target_arm_neon_ok_nocache { } {
3711 global et_arm_neon_flags
3712 set et_arm_neon_flags ""
3713 if { [check_effective_target_arm32] } {
3714 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp" "-mfpu=neon -mfloat-abi=softfp -march=armv7-a" "-mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard" "-mfpu=neon -mfloat-abi=hard -march=armv7-a"} {
3715 if { [check_no_compiler_messages_nocache arm_neon_ok object {
3716 #include <arm_neon.h>
3718 #ifndef __ARM_NEON__
3721 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3722 configured for -mcpu=arm926ej-s, for example. */
3723 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
3724 #error Architecture does not support NEON.
3727 set et_arm_neon_flags $flags
3736 proc check_effective_target_arm_neon_ok { } {
3737 return [check_cached_effective_target arm_neon_ok \
3738 check_effective_target_arm_neon_ok_nocache]
3741 # Return 1 if this is an ARM target supporting -mfpu=neon without any
3742 # -mfloat-abi= option. Useful in tests where add_options is not
3743 # supported (such as lto tests).
3745 proc check_effective_target_arm_neon_ok_no_float_abi_nocache { } {
3746 if { [check_effective_target_arm32] } {
3747 foreach flags {"-mfpu=neon"} {
3748 if { [check_no_compiler_messages_nocache arm_neon_ok_no_float_abi object {
3749 #include <arm_neon.h>
3751 #ifndef __ARM_NEON__
3754 /* Avoid the case where a test adds -mfpu=neon, but the toolchain is
3755 configured for -mcpu=arm926ej-s, for example. */
3756 #if __ARM_ARCH < 7 || __ARM_ARCH_PROFILE == 'M'
3757 #error Architecture does not support NEON.
3768 proc check_effective_target_arm_neon_ok_no_float_abi { } {
3769 return [check_cached_effective_target arm_neon_ok_no_float_abi \
3770 check_effective_target_arm_neon_ok_no_float_abi_nocache]
3773 proc check_effective_target_arm_crc_ok_nocache { } {
3774 global et_arm_crc_flags
3775 set et_arm_crc_flags "-march=armv8-a+crc"
3776 return [check_no_compiler_messages_nocache arm_crc_ok object {
3777 #if !defined (__ARM_FEATURE_CRC32)
3780 } "$et_arm_crc_flags"]
3783 proc check_effective_target_arm_crc_ok { } {
3784 return [check_cached_effective_target arm_crc_ok \
3785 check_effective_target_arm_crc_ok_nocache]
3788 # Return 1 if this is an ARM target supporting -mfpu=neon-fp16
3789 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3790 # incompatible with these options. Also set et_arm_neon_fp16_flags to
3791 # the best options to add.
3793 proc check_effective_target_arm_neon_fp16_ok_nocache { } {
3794 global et_arm_neon_fp16_flags
3795 global et_arm_neon_flags
3796 set et_arm_neon_fp16_flags ""
3797 if { [check_effective_target_arm32]
3798 && [check_effective_target_arm_neon_ok] } {
3799 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3800 "-mfpu=neon-fp16 -mfloat-abi=softfp"
3801 "-mfp16-format=ieee"
3802 "-mfloat-abi=softfp -mfp16-format=ieee"
3803 "-mfpu=neon-fp16 -mfp16-format=ieee"
3804 "-mfpu=neon-fp16 -mfloat-abi=softfp -mfp16-format=ieee"} {
3805 if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
3806 #include "arm_neon.h"
3808 foo (float32x4_t arg)
3810 return vcvt_f16_f32 (arg);
3812 } "$et_arm_neon_flags $flags"] } {
3813 set et_arm_neon_fp16_flags [concat $et_arm_neon_flags $flags]
3822 proc check_effective_target_arm_neon_fp16_ok { } {
3823 return [check_cached_effective_target arm_neon_fp16_ok \
3824 check_effective_target_arm_neon_fp16_ok_nocache]
3827 proc check_effective_target_arm_neon_fp16_hw { } {
3828 if {! [check_effective_target_arm_neon_fp16_ok] } {
3831 global et_arm_neon_fp16_flags
3832 check_runtime_nocache arm_neon_fp16_hw {
3834 main (int argc, char **argv)
3836 asm ("vcvt.f32.f16 q1, d0");
3839 } $et_arm_neon_fp16_flags
3842 proc add_options_for_arm_neon_fp16 { flags } {
3843 if { ! [check_effective_target_arm_neon_fp16_ok] } {
3846 global et_arm_neon_fp16_flags
3847 return "$flags $et_arm_neon_fp16_flags"
3850 # Return 1 if this is an ARM target supporting the FP16 alternative
3851 # format. Some multilibs may be incompatible with the options needed. Also
3852 # set et_arm_neon_fp16_flags to the best options to add.
3854 proc check_effective_target_arm_fp16_alternative_ok_nocache { } {
3855 global et_arm_neon_fp16_flags
3856 set et_arm_neon_fp16_flags ""
3857 if { [check_effective_target_arm32] } {
3858 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3859 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3860 if { [check_no_compiler_messages_nocache \
3861 arm_fp16_alternative_ok object {
3862 #if !defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3863 #error __ARM_FP16_FORMAT_ALTERNATIVE not defined
3865 } "$flags -mfp16-format=alternative"] } {
3866 set et_arm_neon_fp16_flags "$flags -mfp16-format=alternative"
3875 proc check_effective_target_arm_fp16_alternative_ok { } {
3876 return [check_cached_effective_target arm_fp16_alternative_ok \
3877 check_effective_target_arm_fp16_alternative_ok_nocache]
3880 # Return 1 if this is an ARM target supports specifying the FP16 none
3881 # format. Some multilibs may be incompatible with the options needed.
3883 proc check_effective_target_arm_fp16_none_ok_nocache { } {
3884 if { [check_effective_target_arm32] } {
3885 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp16"
3886 "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
3887 if { [check_no_compiler_messages_nocache \
3888 arm_fp16_none_ok object {
3889 #if defined (__ARM_FP16_FORMAT_ALTERNATIVE)
3890 #error __ARM_FP16_FORMAT_ALTERNATIVE defined
3892 #if defined (__ARM_FP16_FORMAT_IEEE)
3893 #error __ARM_FP16_FORMAT_IEEE defined
3895 } "$flags -mfp16-format=none"] } {
3904 proc check_effective_target_arm_fp16_none_ok { } {
3905 return [check_cached_effective_target arm_fp16_none_ok \
3906 check_effective_target_arm_fp16_none_ok_nocache]
3909 # Return 1 if this is an ARM target supporting -mfpu=neon-fp-armv8
3910 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3911 # incompatible with these options. Also set et_arm_v8_neon_flags to the
3912 # best options to add.
3914 proc check_effective_target_arm_v8_neon_ok_nocache { } {
3915 global et_arm_v8_neon_flags
3916 set et_arm_v8_neon_flags ""
3917 if { [check_effective_target_arm32] } {
3918 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-fp-armv8" "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
3919 if { [check_no_compiler_messages_nocache arm_v8_neon_ok object {
3921 #error not armv8 or later
3923 #include "arm_neon.h"
3927 __asm__ volatile ("vrintn.f32 q0, q0");
3929 } "$flags -march=armv8-a"] } {
3930 set et_arm_v8_neon_flags $flags
3939 proc check_effective_target_arm_v8_neon_ok { } {
3940 return [check_cached_effective_target arm_v8_neon_ok \
3941 check_effective_target_arm_v8_neon_ok_nocache]
3944 # Return 1 if this is an ARM target supporting -mfpu=neon-vfpv4
3945 # -mfloat-abi=softfp or equivalent options. Some multilibs may be
3946 # incompatible with these options. Also set et_arm_neonv2_flags to the
3947 # best options to add.
3949 proc check_effective_target_arm_neonv2_ok_nocache { } {
3950 global et_arm_neonv2_flags
3951 global et_arm_neon_flags
3952 set et_arm_neonv2_flags ""
3953 if { [check_effective_target_arm32]
3954 && [check_effective_target_arm_neon_ok] } {
3955 foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon-vfpv4" "-mfpu=neon-vfpv4 -mfloat-abi=softfp"} {
3956 if { [check_no_compiler_messages_nocache arm_neonv2_ok object {
3957 #include "arm_neon.h"
3959 foo (float32x2_t a, float32x2_t b, float32x2_t c)
3961 return vfma_f32 (a, b, c);
3963 } "$et_arm_neon_flags $flags"] } {
3964 set et_arm_neonv2_flags [concat $et_arm_neon_flags $flags]
3973 proc check_effective_target_arm_neonv2_ok { } {
3974 return [check_cached_effective_target arm_neonv2_ok \
3975 check_effective_target_arm_neonv2_ok_nocache]
3978 # Add the options needed for VFP FP16 support. We need either
3979 # -mfloat-abi=softfp or -mfloat-abi=hard. If one is already specified by
3980 # the multilib, use it.
3982 proc add_options_for_arm_fp16 { flags } {
3983 if { ! [check_effective_target_arm_fp16_ok] } {
3986 global et_arm_fp16_flags
3987 return "$flags $et_arm_fp16_flags"
3990 # Add the options needed to enable support for IEEE format
3991 # half-precision support. This is valid for ARM targets.
3993 proc add_options_for_arm_fp16_ieee { flags } {
3994 if { ! [check_effective_target_arm_fp16_ok] } {
3997 global et_arm_fp16_flags
3998 return "$flags $et_arm_fp16_flags -mfp16-format=ieee"
4001 # Add the options needed to enable support for ARM Alternative format
4002 # half-precision support. This is valid for ARM targets.
4004 proc add_options_for_arm_fp16_alternative { flags } {
4005 if { ! [check_effective_target_arm_fp16_ok] } {
4008 global et_arm_fp16_flags
4009 return "$flags $et_arm_fp16_flags -mfp16-format=alternative"
4012 # Return 1 if this is an ARM target that can support a VFP fp16 variant.
4013 # Skip multilibs that are incompatible with these options and set
4014 # et_arm_fp16_flags to the best options to add. This test is valid for
4017 proc check_effective_target_arm_fp16_ok_nocache { } {
4018 global et_arm_fp16_flags
4019 set et_arm_fp16_flags ""
4020 if { ! [check_effective_target_arm32] } {
4024 [list "" { *-*-* } { "-mfpu=*" } \
4025 { "-mfpu=*fp16*" "-mfpu=*fpv[4-9]*" \
4026 "-mfpu=*fpv[1-9][0-9]*" "-mfpu=*fp-armv8*" } ]] {
4027 # Multilib flags would override -mfpu.
4030 if [check-flags [list "" { *-*-* } { "-mfloat-abi=soft" } { "" } ]] {
4031 # Must generate floating-point instructions.
4034 if [check_effective_target_arm_hf_eabi] {
4035 # Use existing float-abi and force an fpu which supports fp16
4036 set et_arm_fp16_flags "-mfpu=vfpv4"
4039 if [check-flags [list "" { *-*-* } { "-mfpu=*" } { "" } ]] {
4040 # The existing -mfpu value is OK; use it, but add softfp.
4041 set et_arm_fp16_flags "-mfloat-abi=softfp"
4044 # Add -mfpu for a VFP fp16 variant since there is no preprocessor
4045 # macro to check for this support.
4046 set flags "-mfpu=vfpv4 -mfloat-abi=softfp"
4047 if { [check_no_compiler_messages_nocache arm_fp16_ok assembly {
4050 set et_arm_fp16_flags "$flags"
4057 proc check_effective_target_arm_fp16_ok { } {
4058 return [check_cached_effective_target arm_fp16_ok \
4059 check_effective_target_arm_fp16_ok_nocache]
4062 # Return 1 if the target supports executing VFP FP16 instructions, 0
4063 # otherwise. This test is valid for ARM only.
4065 proc check_effective_target_arm_fp16_hw { } {
4066 if {! [check_effective_target_arm_fp16_ok] } {
4069 global et_arm_fp16_flags
4070 check_runtime_nocache arm_fp16_hw {
4072 main (int argc, char **argv)
4076 asm ("vcvtb.f32.f16 %0, %1"
4077 : "=w" (r) : "w" (a)
4078 : /* No clobbers. */);
4079 return (r == 1.0) ? 0 : 1;
4081 } "$et_arm_fp16_flags -mfp16-format=ieee"
4084 # Creates a series of routines that return 1 if the given architecture
4085 # can be selected and a routine to give the flags to select that architecture
4086 # Note: Extra flags may be added to disable options from newer compilers
4087 # (Thumb in particular - but others may be added in the future).
4088 # Warning: Do not use check_effective_target_arm_arch_*_ok for architecture
4089 # extension (eg. ARMv8.1-A) since there is no macro defined for them. See
4090 # how only __ARM_ARCH_8A__ is checked for ARMv8.1-A.
4091 # Usage: /* { dg-require-effective-target arm_arch_v5_ok } */
4092 # /* { dg-add-options arm_arch_v5 } */
4093 # /* { dg-require-effective-target arm_arch_v5_multilib } */
4094 foreach { armfunc armflag armdefs } {
4095 v4 "-march=armv4 -marm" __ARM_ARCH_4__
4096 v4t "-march=armv4t" __ARM_ARCH_4T__
4097 v5 "-march=armv5 -marm" __ARM_ARCH_5__
4098 v5t "-march=armv5t" __ARM_ARCH_5T__
4099 v5te "-march=armv5te" __ARM_ARCH_5TE__
4100 v6 "-march=armv6" __ARM_ARCH_6__
4101 v6k "-march=armv6k" __ARM_ARCH_6K__
4102 v6t2 "-march=armv6t2" __ARM_ARCH_6T2__
4103 v6z "-march=armv6z" __ARM_ARCH_6Z__
4104 v6m "-march=armv6-m -mthumb -mfloat-abi=soft" __ARM_ARCH_6M__
4105 v7a "-march=armv7-a" __ARM_ARCH_7A__
4106 v7r "-march=armv7-r" __ARM_ARCH_7R__
4107 v7m "-march=armv7-m -mthumb" __ARM_ARCH_7M__
4108 v7em "-march=armv7e-m -mthumb" __ARM_ARCH_7EM__
4109 v7ve "-march=armv7ve -marm"
4110 "__ARM_ARCH_7A__ && __ARM_FEATURE_IDIV"
4111 v8a "-march=armv8-a" __ARM_ARCH_8A__
4112 v8_1a "-march=armv8.1-a" __ARM_ARCH_8A__
4113 v8_2a "-march=armv8.2-a" __ARM_ARCH_8A__
4114 v8m_base "-march=armv8-m.base -mthumb -mfloat-abi=soft"
4115 __ARM_ARCH_8M_BASE__
4116 v8m_main "-march=armv8-m.main -mthumb" __ARM_ARCH_8M_MAIN__
4117 v8r "-march=armv8-r" __ARM_ARCH_8R__ } {
4118 eval [string map [list FUNC $armfunc FLAG $armflag DEFS $armdefs ] {
4119 proc check_effective_target_arm_arch_FUNC_ok { } {
4120 if { [ string match "*-marm*" "FLAG" ] &&
4121 ![check_effective_target_arm_arm_ok] } {
4124 return [check_no_compiler_messages arm_arch_FUNC_ok assembly {
4131 proc add_options_for_arm_arch_FUNC { flags } {
4132 return "$flags FLAG"
4135 proc check_effective_target_arm_arch_FUNC_multilib { } {
4136 return [check_runtime arm_arch_FUNC_multilib {
4142 } [add_options_for_arm_arch_FUNC ""]]
4147 # Return 1 if GCC was configured with --with-mode=
4148 proc check_effective_target_default_mode { } {
4150 return [check_configured_with "with-mode="]
4153 # Return 1 if this is an ARM target where -marm causes ARM to be
4156 proc check_effective_target_arm_arm_ok { } {
4157 return [check_no_compiler_messages arm_arm_ok assembly {
4158 #if !defined (__arm__) || defined (__thumb__) || defined (__thumb2__)
4159 #error !__arm__ || __thumb__ || __thumb2__
4165 # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
4168 proc check_effective_target_arm_thumb1_ok { } {
4169 return [check_no_compiler_messages arm_thumb1_ok assembly {
4170 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4171 #error !__arm__ || !__thumb__ || __thumb2__
4173 int foo (int i) { return i; }
4177 # Return 1 is this is an ARM target where -mthumb causes Thumb-2 to be
4180 proc check_effective_target_arm_thumb2_ok { } {
4181 return [check_no_compiler_messages arm_thumb2_ok assembly {
4182 #if !defined(__thumb2__)
4185 int foo (int i) { return i; }
4189 # Return 1 if this is an ARM target where Thumb-1 is used without options
4190 # added by the test.
4192 proc check_effective_target_arm_thumb1 { } {
4193 return [check_no_compiler_messages arm_thumb1 assembly {
4194 #if !defined(__arm__) || !defined(__thumb__) || defined(__thumb2__)
4195 #error !__arm__ || !__thumb__ || __thumb2__
4201 # Return 1 if this is an ARM target where Thumb-2 is used without options
4202 # added by the test.
4204 proc check_effective_target_arm_thumb2 { } {
4205 return [check_no_compiler_messages arm_thumb2 assembly {
4206 #if !defined(__thumb2__)
4213 # Return 1 if this is an ARM target where conditional execution is available.
4215 proc check_effective_target_arm_cond_exec { } {
4216 return [check_no_compiler_messages arm_cond_exec assembly {
4217 #if defined(__arm__) && defined(__thumb__) && !defined(__thumb2__)
4224 # Return 1 if this is an ARM cortex-M profile cpu
4226 proc check_effective_target_arm_cortex_m { } {
4227 if { ![istarget arm*-*-*] } {
4230 return [check_no_compiler_messages arm_cortex_m assembly {
4231 #if defined(__ARM_ARCH_ISA_ARM)
4232 #error __ARM_ARCH_ISA_ARM is defined
4238 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4239 # used and MOVT/MOVW instructions to be available.
4241 proc check_effective_target_arm_thumb1_movt_ok {} {
4242 if [check_effective_target_arm_thumb1_ok] {
4243 return [check_no_compiler_messages arm_movt object {
4247 asm ("movt r0, #42");
4255 # Return 1 if this is an ARM target where -mthumb causes Thumb-1 to be
4256 # used and CBZ and CBNZ instructions are available.
4258 proc check_effective_target_arm_thumb1_cbz_ok {} {
4259 if [check_effective_target_arm_thumb1_ok] {
4260 return [check_no_compiler_messages arm_movt object {
4264 asm ("cbz r0, 2f\n2:");
4272 # Return 1 if this is an ARM target where ARMv8-M Security Extensions is
4275 proc check_effective_target_arm_cmse_ok {} {
4276 return [check_no_compiler_messages arm_cmse object {
4285 # Return 1 if this compilation turns on string_ops_prefer_neon on.
4287 proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
4288 return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon "@string_ops_prefer_neon:\t1" assembly {
4289 int foo (void) { return 0; }
4290 } "-O2 -mprint-tune-info" ]
4293 # Return 1 if the target supports executing NEON instructions, 0
4294 # otherwise. Cache the result.
4296 proc check_effective_target_arm_neon_hw { } {
4297 return [check_runtime arm_neon_hw_available {
4301 long long a = 0, b = 1;
4302 asm ("vorr %P0, %P1, %P2"
4304 : "0" (a), "w" (b));
4307 } [add_options_for_arm_neon ""]]
4310 # Return true if this is an AArch64 target that can run SVE code.
4312 proc check_effective_target_aarch64_sve_hw { } {
4313 if { ![istarget aarch64*-*-*] } {
4316 return [check_runtime aarch64_sve_hw_available {
4320 asm volatile ("ptrue p0.b");
4326 # Return true if this is an AArch64 target that can run SVE code and
4327 # if its SVE vectors have exactly BITS bits.
4329 proc aarch64_sve_hw_bits { bits } {
4330 if { ![check_effective_target_aarch64_sve_hw] } {
4333 return [check_runtime aarch64_sve${bits}_hw [subst {
4338 asm volatile ("cntd %0" : "=r" (res));
4339 if (res * 64 != $bits)
4346 # Return true if this is an AArch64 target that can run SVE code and
4347 # if its SVE vectors have exactly 256 bits.
4349 proc check_effective_target_aarch64_sve256_hw { } {
4350 return [aarch64_sve_hw_bits 256]
4353 proc check_effective_target_arm_neonv2_hw { } {
4354 return [check_runtime arm_neon_hwv2_available {
4355 #include "arm_neon.h"
4359 float32x2_t a, b, c;
4360 asm ("vfma.f32 %P0, %P1, %P2"
4362 : "w" (b), "w" (c));
4365 } [add_options_for_arm_neonv2 ""]]
4368 # Return 1 if the target supports the ARMv8.1 Adv.SIMD extension, 0
4369 # otherwise. The test is valid for AArch64 and ARM. Record the command
4370 # line options needed.
4372 proc check_effective_target_arm_v8_1a_neon_ok_nocache { } {
4373 global et_arm_v8_1a_neon_flags
4374 set et_arm_v8_1a_neon_flags ""
4376 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4380 # Iterate through sets of options to find the compiler flags that
4381 # need to be added to the -march option. Start with the empty set
4382 # since AArch64 only needs the -march setting.
4383 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4384 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4385 foreach arches { "-march=armv8-a+rdma" "-march=armv8.1-a" } {
4386 if { [check_no_compiler_messages_nocache arm_v8_1a_neon_ok object {
4387 #if !defined (__ARM_FEATURE_QRDMX)
4388 #error "__ARM_FEATURE_QRDMX not defined"
4390 } "$flags $arches"] } {
4391 set et_arm_v8_1a_neon_flags "$flags $arches"
4400 proc check_effective_target_arm_v8_1a_neon_ok { } {
4401 return [check_cached_effective_target arm_v8_1a_neon_ok \
4402 check_effective_target_arm_v8_1a_neon_ok_nocache]
4405 # Return 1 if the target supports ARMv8.2 scalar FP16 arithmetic
4406 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4407 # Record the command line options needed.
4409 proc check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache { } {
4410 global et_arm_v8_2a_fp16_scalar_flags
4411 set et_arm_v8_2a_fp16_scalar_flags ""
4413 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4417 # Iterate through sets of options to find the compiler flags that
4418 # need to be added to the -march option.
4419 foreach flags {"" "-mfpu=fp-armv8" "-mfloat-abi=softfp" \
4420 "-mfpu=fp-armv8 -mfloat-abi=softfp"} {
4421 if { [check_no_compiler_messages_nocache \
4422 arm_v8_2a_fp16_scalar_ok object {
4423 #if !defined (__ARM_FEATURE_FP16_SCALAR_ARITHMETIC)
4424 #error "__ARM_FEATURE_FP16_SCALAR_ARITHMETIC not defined"
4426 } "$flags -march=armv8.2-a+fp16"] } {
4427 set et_arm_v8_2a_fp16_scalar_flags "$flags -march=armv8.2-a+fp16"
4435 proc check_effective_target_arm_v8_2a_fp16_scalar_ok { } {
4436 return [check_cached_effective_target arm_v8_2a_fp16_scalar_ok \
4437 check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache]
4440 # Return 1 if the target supports ARMv8.2 Adv.SIMD FP16 arithmetic
4441 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4442 # Record the command line options needed.
4444 proc check_effective_target_arm_v8_2a_fp16_neon_ok_nocache { } {
4445 global et_arm_v8_2a_fp16_neon_flags
4446 set et_arm_v8_2a_fp16_neon_flags ""
4448 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4452 # Iterate through sets of options to find the compiler flags that
4453 # need to be added to the -march option.
4454 foreach flags {"" "-mfpu=neon-fp-armv8" "-mfloat-abi=softfp" \
4455 "-mfpu=neon-fp-armv8 -mfloat-abi=softfp"} {
4456 if { [check_no_compiler_messages_nocache \
4457 arm_v8_2a_fp16_neon_ok object {
4458 #if !defined (__ARM_FEATURE_FP16_VECTOR_ARITHMETIC)
4459 #error "__ARM_FEATURE_FP16_VECTOR_ARITHMETIC not defined"
4461 } "$flags -march=armv8.2-a+fp16"] } {
4462 set et_arm_v8_2a_fp16_neon_flags "$flags -march=armv8.2-a+fp16"
4470 proc check_effective_target_arm_v8_2a_fp16_neon_ok { } {
4471 return [check_cached_effective_target arm_v8_2a_fp16_neon_ok \
4472 check_effective_target_arm_v8_2a_fp16_neon_ok_nocache]
4475 # Return 1 if the target supports ARMv8.2 Adv.SIMD Dot Product
4476 # instructions, 0 otherwise. The test is valid for ARM and for AArch64.
4477 # Record the command line options needed.
4479 proc check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache { } {
4480 global et_arm_v8_2a_dotprod_neon_flags
4481 set et_arm_v8_2a_dotprod_neon_flags ""
4483 if { ![istarget arm*-*-*] && ![istarget aarch64*-*-*] } {
4487 # Iterate through sets of options to find the compiler flags that
4488 # need to be added to the -march option.
4489 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
4490 if { [check_no_compiler_messages_nocache \
4491 arm_v8_2a_dotprod_neon_ok object {
4492 #if !defined (__ARM_FEATURE_DOTPROD)
4493 #error "__ARM_FEATURE_DOTPROD not defined"
4495 } "$flags -march=armv8.2-a+dotprod"] } {
4496 set et_arm_v8_2a_dotprod_neon_flags "$flags -march=armv8.2-a+dotprod"
4504 proc check_effective_target_arm_v8_2a_dotprod_neon_ok { } {
4505 return [check_cached_effective_target arm_v8_2a_dotprod_neon_ok \
4506 check_effective_target_arm_v8_2a_dotprod_neon_ok_nocache]
4509 proc add_options_for_arm_v8_2a_dotprod_neon { flags } {
4510 if { ! [check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
4513 global et_arm_v8_2a_dotprod_neon_flags
4514 return "$flags $et_arm_v8_2a_dotprod_neon_flags"
4517 # Return 1 if the target supports FP16 VFMAL and VFMSL
4518 # instructions, 0 otherwise.
4519 # Record the command line options needed.
4521 proc check_effective_target_arm_fp16fml_neon_ok_nocache { } {
4522 global et_arm_fp16fml_neon_flags
4523 set et_arm_fp16fml_neon_flags ""
4525 if { ![istarget arm*-*-*] } {
4529 # Iterate through sets of options to find the compiler flags that
4530 # need to be added to the -march option.
4531 foreach flags {"" "-mfloat-abi=softfp -mfpu=neon-fp-armv8" "-mfloat-abi=hard -mfpu=neon-fp-armv8"} {
4532 if { [check_no_compiler_messages_nocache \
4533 arm_fp16fml_neon_ok assembly {
4534 #include <arm_neon.h>
4536 foo (float32x2_t r, float16x4_t a, float16x4_t b)
4538 return vfmlal_high_u32 (r, a, b);
4540 } "$flags -march=armv8.2-a+fp16fml"] } {
4541 set et_arm_fp16fml_neon_flags "$flags -march=armv8.2-a+fp16fml"
4549 proc check_effective_target_arm_fp16fml_neon_ok { } {
4550 return [check_cached_effective_target arm_fp16fml_neon_ok \
4551 check_effective_target_arm_fp16fml_neon_ok_nocache]
4554 proc add_options_for_arm_fp16fml_neon { flags } {
4555 if { ! [check_effective_target_arm_fp16fml_neon_ok] } {
4558 global et_arm_fp16fml_neon_flags
4559 return "$flags $et_arm_fp16fml_neon_flags"
4562 # Return 1 if the target supports executing ARMv8 NEON instructions, 0
4565 proc check_effective_target_arm_v8_neon_hw { } {
4566 return [check_runtime arm_v8_neon_hw_available {
4567 #include "arm_neon.h"
4571 float32x2_t a = { 1.0f, 2.0f };
4572 #ifdef __ARM_ARCH_ISA_A64
4573 asm ("frinta %0.2s, %1.2s"
4577 asm ("vrinta.f32 %P0, %P1"
4581 return a[0] == 2.0f;
4583 } [add_options_for_arm_v8_neon ""]]
4586 # Return 1 if the target supports executing the ARMv8.1 Adv.SIMD extension, 0
4587 # otherwise. The test is valid for AArch64 and ARM.
4589 proc check_effective_target_arm_v8_1a_neon_hw { } {
4590 if { ![check_effective_target_arm_v8_1a_neon_ok] } {
4593 return [check_runtime arm_v8_1a_neon_hw_available {
4597 #ifdef __ARM_ARCH_ISA_A64
4598 __Int32x2_t a = {0, 1};
4599 __Int32x2_t b = {0, 2};
4602 asm ("sqrdmlah %0.2s, %1.2s, %2.2s"
4605 : /* No clobbers. */);
4609 __simd64_int32_t a = {0, 1};
4610 __simd64_int32_t b = {0, 2};
4611 __simd64_int32_t result;
4613 asm ("vqrdmlah.s32 %P0, %P1, %P2"
4616 : /* No clobbers. */);
4621 } [add_options_for_arm_v8_1a_neon ""]]
4624 # Return 1 if the target supports executing floating point instructions from
4625 # ARMv8.2 with the FP16 extension, 0 otherwise. The test is valid for ARM and
4628 proc check_effective_target_arm_v8_2a_fp16_scalar_hw { } {
4629 if { ![check_effective_target_arm_v8_2a_fp16_scalar_ok] } {
4632 return [check_runtime arm_v8_2a_fp16_scalar_hw_available {
4639 #ifdef __ARM_ARCH_ISA_A64
4641 asm ("fabs %h0, %h1"
4644 : /* No clobbers. */);
4648 asm ("vabs.f16 %0, %1"
4651 : /* No clobbers. */);
4655 return (result == 1.0) ? 0 : 1;
4657 } [add_options_for_arm_v8_2a_fp16_scalar ""]]
4660 # Return 1 if the target supports executing Adv.SIMD instructions from ARMv8.2
4661 # with the FP16 extension, 0 otherwise. The test is valid for ARM and for
4664 proc check_effective_target_arm_v8_2a_fp16_neon_hw { } {
4665 if { ![check_effective_target_arm_v8_2a_fp16_neon_ok] } {
4668 return [check_runtime arm_v8_2a_fp16_neon_hw_available {
4672 #ifdef __ARM_ARCH_ISA_A64
4674 __Float16x4_t a = {1.0, -1.0, 1.0, -1.0};
4675 __Float16x4_t result;
4677 asm ("fabs %0.4h, %1.4h"
4680 : /* No clobbers. */);
4684 __simd64_float16_t a = {1.0, -1.0, 1.0, -1.0};
4685 __simd64_float16_t result;
4687 asm ("vabs.f16 %P0, %P1"
4690 : /* No clobbers. */);
4694 return (result[0] == 1.0) ? 0 : 1;
4696 } [add_options_for_arm_v8_2a_fp16_neon ""]]
4699 # Return 1 if the target supports executing AdvSIMD instructions from ARMv8.2
4700 # with the Dot Product extension, 0 otherwise. The test is valid for ARM and for
4703 proc check_effective_target_arm_v8_2a_dotprod_neon_hw { } {
4704 if { ![check_effective_target_arm_v8_2a_dotprod_neon_ok] } {
4707 return [check_runtime arm_v8_2a_dotprod_neon_hw_available {
4708 #include "arm_neon.h"
4713 uint32x2_t results = {0,0};
4714 uint8x8_t a = {1,1,1,1,2,2,2,2};
4715 uint8x8_t b = {2,2,2,2,3,3,3,3};
4717 #ifdef __ARM_ARCH_ISA_A64
4718 asm ("udot %0.2s, %1.8b, %2.8b"
4721 : /* No clobbers. */);
4724 asm ("vudot.u8 %P0, %P1, %P2"
4727 : /* No clobbers. */);
4730 return (results[0] == 8 && results[1] == 24) ? 1 : 0;
4732 } [add_options_for_arm_v8_2a_dotprod_neon ""]]
4735 # Return 1 if this is a ARM target with NEON enabled.
4737 proc check_effective_target_arm_neon { } {
4738 if { [check_effective_target_arm32] } {
4739 return [check_no_compiler_messages arm_neon object {
4740 #ifndef __ARM_NEON__
4751 proc check_effective_target_arm_neonv2 { } {
4752 if { [check_effective_target_arm32] } {
4753 return [check_no_compiler_messages arm_neon object {
4754 #ifndef __ARM_NEON__
4757 #ifndef __ARM_FEATURE_FMA
4769 # Return 1 if this is an ARM target with load acquire and store release
4770 # instructions for 8-, 16- and 32-bit types.
4772 proc check_effective_target_arm_acq_rel { } {
4773 return [check_no_compiler_messages arm_acq_rel object {
4775 load_acquire_store_release (void)
4777 asm ("lda r0, [r1]\n\t"
4783 : : : "r0", "memory");
4788 # Add the options needed for MIPS Paired-Single.
4790 proc add_options_for_mpaired_single { flags } {
4791 if { ! [check_effective_target_mpaired_single] } {
4794 return "$flags -mpaired-single"
4797 # Add the options needed for MIPS SIMD Architecture.
4799 proc add_options_for_mips_msa { flags } {
4800 if { ! [check_effective_target_mips_msa] } {
4803 return "$flags -mmsa"
4806 # Return 1 if this a Loongson-2E or -2F target using an ABI that supports
4807 # the Loongson vector modes.
4809 proc check_effective_target_mips_loongson { } {
4810 return [check_no_compiler_messages loongson assembly {
4811 #if !defined(__mips_loongson_vector_rev)
4812 #error !__mips_loongson_vector_rev
4817 # Return 1 if this is a MIPS target that supports the legacy NAN.
4819 proc check_effective_target_mips_nanlegacy { } {
4820 return [check_no_compiler_messages nanlegacy assembly {
4822 int main () { return 0; }
4826 # Return 1 if an MSA program can be compiled to object
4828 proc check_effective_target_mips_msa { } {
4829 if ![check_effective_target_nomips16] {
4832 return [check_no_compiler_messages msa object {
4833 #if !defined(__mips_msa)
4834 #error "MSA NOT AVAIL"
4836 #if !(((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2))
4837 #error "MSA NOT AVAIL FOR ISA REV < 2"
4839 #if !defined(__mips_hard_float)
4840 #error "MSA HARD_FLOAT REQUIRED"
4842 #if __mips_fpr != 64
4843 #error "MSA 64-bit FPR REQUIRED"
4849 v8i16 v = __builtin_msa_ldi_h (1);
4857 # Return 1 if this is an ARM target that adheres to the ABI for the ARM
4860 proc check_effective_target_arm_eabi { } {
4861 return [check_no_compiler_messages arm_eabi object {
4862 #ifndef __ARM_EABI__
4870 # Return 1 if this is an ARM target that adheres to the hard-float variant of
4871 # the ABI for the ARM Architecture (e.g. -mfloat-abi=hard).
4873 proc check_effective_target_arm_hf_eabi { } {
4874 return [check_no_compiler_messages arm_hf_eabi object {
4875 #if !defined(__ARM_EABI__) || !defined(__ARM_PCS_VFP)
4876 #error not hard-float EABI
4883 # Return 1 if this is an ARM target supporting -mcpu=iwmmxt.
4884 # Some multilibs may be incompatible with this option.
4886 proc check_effective_target_arm_iwmmxt_ok { } {
4887 if { [check_effective_target_arm32] } {
4888 return [check_no_compiler_messages arm_iwmmxt_ok object {
4896 # Return true if LDRD/STRD instructions are prefered over LDM/STM instructions
4897 # for an ARM target.
4898 proc check_effective_target_arm_prefer_ldrd_strd { } {
4899 if { ![check_effective_target_arm32] } {
4903 return [check_no_messages_and_pattern arm_prefer_ldrd_strd "strd\tr" assembly {
4904 void foo (void) { __asm__ ("" ::: "r4", "r5"); }
4908 # Return 1 if this is a PowerPC target supporting -meabi.
4910 proc check_effective_target_powerpc_eabi_ok { } {
4911 if { [istarget powerpc*-*-*] } {
4912 return [check_no_compiler_messages powerpc_eabi_ok object {
4920 # Return 1 if this is a PowerPC target with floating-point registers.
4922 proc check_effective_target_powerpc_fprs { } {
4923 if { [istarget powerpc*-*-*]
4924 || [istarget rs6000-*-*] } {
4925 return [check_no_compiler_messages powerpc_fprs object {
4937 # Return 1 if this is a PowerPC target with hardware double-precision
4940 proc check_effective_target_powerpc_hard_double { } {
4941 if { [istarget powerpc*-*-*]
4942 || [istarget rs6000-*-*] } {
4943 return [check_no_compiler_messages powerpc_hard_double object {
4955 # Return 1 if this is a PowerPC target supporting -maltivec.
4957 proc check_effective_target_powerpc_altivec_ok { } {
4958 if { ([istarget powerpc*-*-*]
4959 && ![istarget powerpc-*-linux*paired*])
4960 || [istarget rs6000-*-*] } {
4961 # AltiVec is not supported on AIX before 5.3.
4962 if { [istarget powerpc*-*-aix4*]
4963 || [istarget powerpc*-*-aix5.1*]
4964 || [istarget powerpc*-*-aix5.2*] } {
4967 return [check_no_compiler_messages powerpc_altivec_ok object {
4975 # Return 1 if this is a PowerPC target supporting -mpower8-vector
4977 proc check_effective_target_powerpc_p8vector_ok { } {
4978 if { ([istarget powerpc*-*-*]
4979 && ![istarget powerpc-*-linux*paired*])
4980 || [istarget rs6000-*-*] } {
4981 # AltiVec is not supported on AIX before 5.3.
4982 if { [istarget powerpc*-*-aix4*]
4983 || [istarget powerpc*-*-aix5.1*]
4984 || [istarget powerpc*-*-aix5.2*] } {
4987 return [check_no_compiler_messages powerpc_p8vector_ok object {
4990 asm volatile ("xxlorc vs0,vs0,vs0");
4992 asm volatile ("xxlorc 0,0,0");
4996 } "-mpower8-vector"]
5002 # Return 1 if this is a PowerPC target supporting -mpower9-vector
5004 proc check_effective_target_powerpc_p9vector_ok { } {
5005 if { ([istarget powerpc*-*-*]
5006 && ![istarget powerpc-*-linux*paired*])
5007 || [istarget rs6000-*-*] } {
5008 # AltiVec is not supported on AIX before 5.3.
5009 if { [istarget powerpc*-*-aix4*]
5010 || [istarget powerpc*-*-aix5.1*]
5011 || [istarget powerpc*-*-aix5.2*] } {
5014 return [check_no_compiler_messages powerpc_p9vector_ok object {
5017 vector double v = (vector double) { 0.0, 0.0 };
5018 asm ("xsxexpdp %0,%1" : "+r" (e) : "wa" (v));
5021 } "-mpower9-vector"]
5027 # Return 1 if this is a PowerPC target supporting -mmodulo
5029 proc check_effective_target_powerpc_p9modulo_ok { } {
5030 if { ([istarget powerpc*-*-*]
5031 && ![istarget powerpc-*-linux*paired*])
5032 || [istarget rs6000-*-*] } {
5033 # AltiVec is not supported on AIX before 5.3.
5034 if { [istarget powerpc*-*-aix4*]
5035 || [istarget powerpc*-*-aix5.1*]
5036 || [istarget powerpc*-*-aix5.2*] } {
5039 return [check_no_compiler_messages powerpc_p9modulo_ok object {
5041 int i = 5, j = 3, r = -1;
5042 asm ("modsw %0,%1,%2" : "+r" (r) : "r" (i), "r" (j));
5051 # Return 1 if this is a PowerPC target supporting -mfloat128 via either
5052 # software emulation on power7/power8 systems or hardware support on power9.
5054 proc check_effective_target_powerpc_float128_sw_ok { } {
5055 if { ([istarget powerpc*-*-*]
5056 && ![istarget powerpc-*-linux*paired*])
5057 || [istarget rs6000-*-*] } {
5058 # AltiVec is not supported on AIX before 5.3.
5059 if { [istarget powerpc*-*-aix4*]
5060 || [istarget powerpc*-*-aix5.1*]
5061 || [istarget powerpc*-*-aix5.2*] } {
5064 return [check_no_compiler_messages powerpc_float128_sw_ok object {
5065 volatile __float128 x = 1.0q;
5066 volatile __float128 y = 2.0q;
5068 __float128 z = x + y;
5071 } "-mfloat128 -mvsx"]
5077 # Return 1 if this is a PowerPC target supporting -mfloat128 via hardware
5078 # support on power9.
5080 proc check_effective_target_powerpc_float128_hw_ok { } {
5081 if { ([istarget powerpc*-*-*]
5082 && ![istarget powerpc-*-linux*paired*])
5083 || [istarget rs6000-*-*] } {
5084 # AltiVec is not supported on AIX before 5.3.
5085 if { [istarget powerpc*-*-aix4*]
5086 || [istarget powerpc*-*-aix5.1*]
5087 || [istarget powerpc*-*-aix5.2*] } {
5090 return [check_no_compiler_messages powerpc_float128_hw_ok object {
5091 volatile __float128 x = 1.0q;
5092 volatile __float128 y = 2.0q;
5095 __asm__ ("xsaddqp %0,%1,%2" : "=v" (z) : "v" (x), "v" (y));
5098 } "-mfloat128-hardware"]
5104 # Return 1 if this is a PowerPC target supporting -mvsx
5106 proc check_effective_target_powerpc_vsx_ok { } {
5107 if { ([istarget powerpc*-*-*]
5108 && ![istarget powerpc-*-linux*paired*])
5109 || [istarget rs6000-*-*] } {
5110 # VSX is not supported on AIX before 7.1.
5111 if { [istarget powerpc*-*-aix4*]
5112 || [istarget powerpc*-*-aix5*]
5113 || [istarget powerpc*-*-aix6*] } {
5116 return [check_no_compiler_messages powerpc_vsx_ok object {
5119 asm volatile ("xxlor vs0,vs0,vs0");
5121 asm volatile ("xxlor 0,0,0");
5131 # Return 1 if this is a PowerPC target supporting -mhtm
5133 proc check_effective_target_powerpc_htm_ok { } {
5134 if { ([istarget powerpc*-*-*]
5135 && ![istarget powerpc-*-linux*paired*])
5136 || [istarget rs6000-*-*] } {
5137 # HTM is not supported on AIX yet.
5138 if { [istarget powerpc*-*-aix*] } {
5141 return [check_no_compiler_messages powerpc_htm_ok object {
5143 asm volatile ("tbegin. 0");
5152 # Return 1 if the target supports executing HTM hardware instructions,
5153 # 0 otherwise. Cache the result.
5155 proc check_htm_hw_available { } {
5156 return [check_cached_effective_target htm_hw_available {
5157 # For now, disable on Darwin
5158 if { [istarget powerpc-*-eabi] || [istarget powerpc*-*-eabispe] || [istarget *-*-darwin*]} {
5161 check_runtime_nocache htm_hw_available {
5171 # Return 1 if this is a PowerPC target supporting -mcpu=cell.
5173 proc check_effective_target_powerpc_ppu_ok { } {
5174 if [check_effective_target_powerpc_altivec_ok] {
5175 return [check_no_compiler_messages cell_asm_available object {
5178 asm volatile ("lvlx v0,v0,v0");
5180 asm volatile ("lvlx 0,0,0");
5190 # Return 1 if this is a PowerPC target that supports SPU.
5192 proc check_effective_target_powerpc_spu { } {
5193 if { [istarget powerpc*-*-linux*] } {
5194 return [check_effective_target_powerpc_altivec_ok]
5200 # Return 1 if this is a PowerPC SPE target. The check includes options
5201 # specified by dg-options for this test, so don't cache the result.
5203 proc check_effective_target_powerpc_spe_nocache { } {
5204 if { [istarget powerpc*-*-*] } {
5205 return [check_no_compiler_messages_nocache powerpc_spe object {
5211 } [current_compiler_flags]]
5217 # Return 1 if this is a PowerPC target with SPE enabled.
5219 proc check_effective_target_powerpc_spe { } {
5220 if { [istarget powerpc*-*-*] } {
5221 return [check_no_compiler_messages powerpc_spe object {
5233 # Return 1 if this is a PowerPC target with Altivec enabled.
5235 proc check_effective_target_powerpc_altivec { } {
5236 if { [istarget powerpc*-*-*] } {
5237 return [check_no_compiler_messages powerpc_altivec object {
5249 # Return 1 if this is a PowerPC 405 target. The check includes options
5250 # specified by dg-options for this test, so don't cache the result.
5252 proc check_effective_target_powerpc_405_nocache { } {
5253 if { [istarget powerpc*-*-*] || [istarget rs6000-*-*] } {
5254 return [check_no_compiler_messages_nocache powerpc_405 object {
5260 } [current_compiler_flags]]
5266 # Return 1 if this is a PowerPC target using the ELFv2 ABI.
5268 proc check_effective_target_powerpc_elfv2 { } {
5269 if { [istarget powerpc*-*-*] } {
5270 return [check_no_compiler_messages powerpc_elfv2 object {
5272 #error not ELF v2 ABI
5282 # Return 1 if this is a SPU target with a toolchain that
5283 # supports automatic overlay generation.
5285 proc check_effective_target_spu_auto_overlay { } {
5286 if { [istarget spu*-*-elf*] } {
5287 return [check_no_compiler_messages spu_auto_overlay executable {
5289 } "-Wl,--auto-overlay" ]
5295 # The VxWorks SPARC simulator accepts only EM_SPARC executables and
5296 # chokes on EM_SPARC32PLUS or EM_SPARCV9 executables. Return 1 if the
5297 # test environment appears to run executables on such a simulator.
5299 proc check_effective_target_ultrasparc_hw { } {
5300 return [check_runtime ultrasparc_hw {
5301 int main() { return 0; }
5302 } "-mcpu=ultrasparc"]
5305 # Return 1 if the test environment supports executing UltraSPARC VIS2
5306 # instructions. We check this by attempting: "bmask %g0, %g0, %g0"
5308 proc check_effective_target_ultrasparc_vis2_hw { } {
5309 return [check_runtime ultrasparc_vis2_hw {
5310 int main() { __asm__(".word 0x81b00320"); return 0; }
5311 } "-mcpu=ultrasparc3"]
5314 # Return 1 if the test environment supports executing UltraSPARC VIS3
5315 # instructions. We check this by attempting: "addxc %g0, %g0, %g0"
5317 proc check_effective_target_ultrasparc_vis3_hw { } {
5318 return [check_runtime ultrasparc_vis3_hw {
5319 int main() { __asm__(".word 0x81b00220"); return 0; }
5323 # Return 1 if this is a SPARC-V9 target.
5325 proc check_effective_target_sparc_v9 { } {
5326 if { [istarget sparc*-*-*] } {
5327 return [check_no_compiler_messages sparc_v9 object {
5329 asm volatile ("return %i7+8");
5338 # Return 1 if this is a SPARC target with VIS enabled.
5340 proc check_effective_target_sparc_vis { } {
5341 if { [istarget sparc*-*-*] } {
5342 return [check_no_compiler_messages sparc_vis object {
5354 # Return 1 if the target supports hardware vector shift operation.
5356 proc check_effective_target_vect_shift { } {
5357 global et_vect_shift_saved
5360 if [info exists et_vect_shift_saved($et_index)] {
5361 verbose "check_effective_target_vect_shift: using cached result" 2
5363 set et_vect_shift_saved($et_index) 0
5364 if { ([istarget powerpc*-*-*]
5365 && ![istarget powerpc-*-linux*paired*])
5366 || [istarget ia64-*-*]
5367 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5368 || [istarget aarch64*-*-*]
5369 || [is-effective-target arm_neon]
5370 || ([istarget mips*-*-*]
5371 && ([et-is-effective-target mips_msa]
5372 || [et-is-effective-target mips_loongson]))
5373 || ([istarget s390*-*-*]
5374 && [check_effective_target_s390_vx]) } {
5375 set et_vect_shift_saved($et_index) 1
5379 verbose "check_effective_target_vect_shift:\
5380 returning $et_vect_shift_saved($et_index)" 2
5381 return $et_vect_shift_saved($et_index)
5384 proc check_effective_target_whole_vector_shift { } {
5385 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5386 || [istarget ia64-*-*]
5387 || [istarget aarch64*-*-*]
5388 || [istarget powerpc64*-*-*]
5389 || ([is-effective-target arm_neon]
5390 && [check_effective_target_arm_little_endian])
5391 || ([istarget mips*-*-*]
5392 && [et-is-effective-target mips_loongson])
5393 || ([istarget s390*-*-*]
5394 && [check_effective_target_s390_vx]) } {
5400 verbose "check_effective_target_vect_long: returning $answer" 2
5404 # Return 1 if the target supports vector bswap operations.
5406 proc check_effective_target_vect_bswap { } {
5407 global et_vect_bswap_saved
5410 if [info exists et_vect_bswap_saved($et_index)] {
5411 verbose "check_effective_target_vect_bswap: using cached result" 2
5413 set et_vect_bswap_saved($et_index) 0
5414 if { [istarget aarch64*-*-*]
5415 || [is-effective-target arm_neon]
5417 set et_vect_bswap_saved($et_index) 1
5421 verbose "check_effective_target_vect_bswap:\
5422 returning $et_vect_bswap_saved($et_index)" 2
5423 return $et_vect_bswap_saved($et_index)
5426 # Return 1 if the target supports hardware vector shift operation for char.
5428 proc check_effective_target_vect_shift_char { } {
5429 global et_vect_shift_char_saved
5432 if [info exists et_vect_shift_char_saved($et_index)] {
5433 verbose "check_effective_target_vect_shift_char: using cached result" 2
5435 set et_vect_shift_char_saved($et_index) 0
5436 if { ([istarget powerpc*-*-*]
5437 && ![istarget powerpc-*-linux*paired*])
5438 || [is-effective-target arm_neon]
5439 || ([istarget mips*-*-*]
5440 && [et-is-effective-target mips_msa])
5441 || ([istarget s390*-*-*]
5442 && [check_effective_target_s390_vx]) } {
5443 set et_vect_shift_char_saved($et_index) 1
5447 verbose "check_effective_target_vect_shift_char:\
5448 returning $et_vect_shift_char_saved($et_index)" 2
5449 return $et_vect_shift_char_saved($et_index)
5452 # Return 1 if the target supports hardware vectors of long, 0 otherwise.
5454 # This can change for different subtargets so do not cache the result.
5456 proc check_effective_target_vect_long { } {
5457 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5458 || (([istarget powerpc*-*-*]
5459 && ![istarget powerpc-*-linux*paired*])
5460 && [check_effective_target_ilp32])
5461 || [is-effective-target arm_neon]
5462 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
5463 || [istarget aarch64*-*-*]
5464 || ([istarget mips*-*-*]
5465 && [et-is-effective-target mips_msa])
5466 || ([istarget s390*-*-*]
5467 && [check_effective_target_s390_vx]) } {
5473 verbose "check_effective_target_vect_long: returning $answer" 2
5477 # Return 1 if the target supports hardware vectors of float, 0 otherwise.
5479 # This won't change for different subtargets so cache the result.
5481 proc check_effective_target_vect_float { } {
5482 global et_vect_float_saved
5485 if [info exists et_vect_float_saved($et_index)] {
5486 verbose "check_effective_target_vect_float: using cached result" 2
5488 set et_vect_float_saved($et_index) 0
5489 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5490 || [istarget powerpc*-*-*]
5491 || [istarget spu-*-*]
5492 || [istarget mips-sde-elf]
5493 || [istarget mipsisa64*-*-*]
5494 || [istarget ia64-*-*]
5495 || [istarget aarch64*-*-*]
5496 || ([istarget mips*-*-*]
5497 && [et-is-effective-target mips_msa])
5498 || [is-effective-target arm_neon]
5499 || ([istarget s390*-*-*]
5500 && [check_effective_target_s390_vxe]) } {
5501 set et_vect_float_saved($et_index) 1
5505 verbose "check_effective_target_vect_float:\
5506 returning $et_vect_float_saved($et_index)" 2
5507 return $et_vect_float_saved($et_index)
5510 # Return 1 if the target supports hardware vectors of double, 0 otherwise.
5512 # This won't change for different subtargets so cache the result.
5514 proc check_effective_target_vect_double { } {
5515 global et_vect_double_saved
5518 if [info exists et_vect_double_saved($et_index)] {
5519 verbose "check_effective_target_vect_double: using cached result" 2
5521 set et_vect_double_saved($et_index) 0
5522 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
5523 && [check_no_compiler_messages vect_double assembly {
5524 #ifdef __tune_atom__
5525 # error No double vectorizer support.
5528 || [istarget aarch64*-*-*]
5529 || [istarget spu-*-*]
5530 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
5531 || ([istarget mips*-*-*]
5532 && [et-is-effective-target mips_msa])
5533 || ([istarget s390*-*-*]
5534 && [check_effective_target_s390_vx]) } {
5535 set et_vect_double_saved($et_index) 1
5539 verbose "check_effective_target_vect_double:\
5540 returning $et_vect_double_saved($et_index)" 2
5541 return $et_vect_double_saved($et_index)
5544 # Return 1 if the target supports hardware vectors of long long, 0 otherwise.
5546 # This won't change for different subtargets so cache the result.
5548 proc check_effective_target_vect_long_long { } {
5549 global et_vect_long_long_saved
5552 if [info exists et_vect_long_long_saved($et_index)] {
5553 verbose "check_effective_target_vect_long_long: using cached result" 2
5555 set et_vect_long_long_saved($et_index) 0
5556 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
5557 || ([istarget mips*-*-*]
5558 && [et-is-effective-target mips_msa])
5559 || ([istarget s390*-*-*]
5560 && [check_effective_target_s390_vx]) } {
5561 set et_vect_long_long_saved($et_index) 1
5565 verbose "check_effective_target_vect_long_long:\
5566 returning $et_vect_long_long_saved($et_index)" 2
5567 return $et_vect_long_long_saved($et_index)
5571 # Return 1 if the target plus current options does not support a vector
5572 # max instruction on "int", 0 otherwise.
5574 # This won't change for different subtargets so cache the result.
5576 proc check_effective_target_vect_no_int_min_max { } {
5577 global et_vect_no_int_min_max_saved
5580 if [info exists et_vect_no_int_min_max_saved($et_index)] {
5581 verbose "check_effective_target_vect_no_int_min_max:\
5582 using cached result" 2
5584 set et_vect_no_int_min_max_saved($et_index) 0
5585 if { [istarget sparc*-*-*]
5586 || [istarget spu-*-*]
5587 || [istarget alpha*-*-*]
5588 || ([istarget mips*-*-*]
5589 && [et-is-effective-target mips_loongson]) } {
5590 set et_vect_no_int_min_max_saved($et_index) 1
5593 verbose "check_effective_target_vect_no_int_min_max:\
5594 returning $et_vect_no_int_min_max_saved($et_index)" 2
5595 return $et_vect_no_int_min_max_saved($et_index)
5598 # Return 1 if the target plus current options does not support a vector
5599 # add instruction on "int", 0 otherwise.
5601 # This won't change for different subtargets so cache the result.
5603 proc check_effective_target_vect_no_int_add { } {
5604 global et_vect_no_int_add_saved
5607 if [info exists et_vect_no_int_add_saved($et_index)] {
5608 verbose "check_effective_target_vect_no_int_add: using cached result" 2
5610 set et_vect_no_int_add_saved($et_index) 0
5611 # Alpha only supports vector add on V8QI and V4HI.
5612 if { [istarget alpha*-*-*] } {
5613 set et_vect_no_int_add_saved($et_index) 1
5616 verbose "check_effective_target_vect_no_int_add:\
5617 returning $et_vect_no_int_add_saved($et_index)" 2
5618 return $et_vect_no_int_add_saved($et_index)
5621 # Return 1 if the target plus current options does not support vector
5622 # bitwise instructions, 0 otherwise.
5624 # This won't change for different subtargets so cache the result.
5626 proc check_effective_target_vect_no_bitwise { } {
5627 global et_vect_no_bitwise_saved
5630 if [info exists et_vect_no_bitwise_saved($et_index)] {
5631 verbose "check_effective_target_vect_no_bitwise: using cached result" 2
5633 set et_vect_no_bitwise_saved($et_index) 0
5635 verbose "check_effective_target_vect_no_bitwise:\
5636 returning $et_vect_no_bitwise_saved($et_index)" 2
5637 return $et_vect_no_bitwise_saved($et_index)
5640 # Return 1 if the target plus current options supports vector permutation,
5643 # This won't change for different subtargets so cache the result.
5645 proc check_effective_target_vect_perm { } {
5646 global et_vect_perm_saved
5649 if [info exists et_vect_perm_saved($et_index)] {
5650 verbose "check_effective_target_vect_perm: using cached result" 2
5652 set et_vect_perm_saved($et_index) 0
5653 if { [is-effective-target arm_neon]
5654 || ([istarget aarch64*-*-*]
5655 && ![check_effective_target_vect_variable_length])
5656 || [istarget powerpc*-*-*]
5657 || [istarget spu-*-*]
5658 || [istarget i?86-*-*] || [istarget x86_64-*-*]
5659 || ([istarget mips*-*-*]
5660 && ([et-is-effective-target mpaired_single]
5661 || [et-is-effective-target mips_msa]))
5662 || ([istarget s390*-*-*]
5663 && [check_effective_target_s390_vx]) } {
5664 set et_vect_perm_saved($et_index) 1
5667 verbose "check_effective_target_vect_perm:\
5668 returning $et_vect_perm_saved($et_index)" 2
5669 return $et_vect_perm_saved($et_index)
5672 # Return 1 if, for some VF:
5674 # - the target's default vector size is VF * ELEMENT_BITS bits
5676 # - it is possible to implement the equivalent of:
5678 # int<ELEMENT_BITS>_t s1[COUNT][COUNT * VF], s2[COUNT * VF];
5679 # for (int i = 0; i < COUNT; ++i)
5680 # for (int j = 0; j < COUNT * VF; ++j)
5681 # s1[i][j] = s2[j - j % COUNT + i]
5683 # using only a single 2-vector permute for each vector in s1.
5685 # E.g. for COUNT == 3 and vector length 4, the two arrays would be:
5687 # s2 | a0 a1 a2 a3 | b0 b1 b2 b3 | c0 c1 c2 c3
5688 # ------+-------------+-------------+------------
5689 # s1[0] | a0 a0 a0 a3 | a3 a3 b2 b2 | b2 c1 c1 c1
5690 # s1[1] | a1 a1 a1 b0 | b0 b0 b3 b3 | b3 c2 c2 c2
5691 # s1[2] | a2 a2 a2 b1 | b1 b1 c0 c0 | c0 c3 c3 c3
5693 # Each s1 permute requires only two of a, b and c.
5695 # The distance between the start of vector n in s1[0] and the start
5696 # of vector n in s2 is:
5698 # A = (n * VF) % COUNT
5700 # The corresponding value for the end of vector n is:
5702 # B = (n * VF + VF - 1) % COUNT
5704 # Subtracting i from each value gives the corresponding difference
5705 # for s1[i]. The condition being tested by this function is false
5706 # iff A - i > 0 and B - i < 0 for some i and n, such that the first
5707 # element for s1[i] comes from vector n - 1 of s2 and the last element
5708 # comes from vector n + 1 of s2. The condition is therefore true iff
5709 # A <= B for all n. This is turn means the condition is true iff:
5711 # (n * VF) % COUNT + (VF - 1) % COUNT < COUNT
5713 # for all n. COUNT - (n * VF) % COUNT is bounded by gcd (VF, COUNT),
5714 # and will be that value for at least one n in [0, COUNT), so we want:
5716 # (VF - 1) % COUNT < gcd (VF, COUNT)
5718 proc vect_perm_supported { count element_bits } {
5719 set vector_bits [lindex [available_vector_sizes] 0]
5720 if { $vector_bits <= 0 } {
5723 set vf [expr { $vector_bits / $element_bits }]
5725 # Compute gcd (VF, COUNT).
5728 while { $temp1 > 0 } {
5729 set temp2 [expr { $gcd % $temp1 }]
5733 return [expr { ($vf - 1) % $count < $gcd }]
5736 # Return 1 if the target supports SLP permutation of 3 vectors when each
5737 # element has 32 bits.
5739 proc check_effective_target_vect_perm3_int { } {
5740 return [expr { [check_effective_target_vect_perm]
5741 && [vect_perm_supported 3 32] }]
5744 # Return 1 if the target plus current options supports vector permutation
5745 # on byte-sized elements, 0 otherwise.
5747 # This won't change for different subtargets so cache the result.
5749 proc check_effective_target_vect_perm_byte { } {
5750 global et_vect_perm_byte_saved
5753 if [info exists et_vect_perm_byte_saved($et_index)] {
5754 verbose "check_effective_target_vect_perm_byte: using cached result" 2
5756 set et_vect_perm_byte_saved($et_index) 0
5757 if { ([is-effective-target arm_neon]
5758 && [is-effective-target arm_little_endian])
5759 || ([istarget aarch64*-*-*]
5760 && [is-effective-target aarch64_little_endian]
5761 && ![check_effective_target_vect_variable_length])
5762 || [istarget powerpc*-*-*]
5763 || [istarget spu-*-*]
5764 || ([istarget mips-*.*]
5765 && [et-is-effective-target mips_msa])
5766 || ([istarget s390*-*-*]
5767 && [check_effective_target_s390_vx]) } {
5768 set et_vect_perm_byte_saved($et_index) 1
5771 verbose "check_effective_target_vect_perm_byte:\
5772 returning $et_vect_perm_byte_saved($et_index)" 2
5773 return $et_vect_perm_byte_saved($et_index)
5776 # Return 1 if the target supports SLP permutation of 3 vectors when each
5777 # element has 8 bits.
5779 proc check_effective_target_vect_perm3_byte { } {
5780 return [expr { [check_effective_target_vect_perm_byte]
5781 && [vect_perm_supported 3 8] }]
5784 # Return 1 if the target plus current options supports vector permutation
5785 # on short-sized elements, 0 otherwise.
5787 # This won't change for different subtargets so cache the result.
5789 proc check_effective_target_vect_perm_short { } {
5790 global et_vect_perm_short_saved
5793 if [info exists et_vect_perm_short_saved($et_index)] {
5794 verbose "check_effective_target_vect_perm_short: using cached result" 2
5796 set et_vect_perm_short_saved($et_index) 0
5797 if { ([is-effective-target arm_neon]
5798 && [is-effective-target arm_little_endian])
5799 || ([istarget aarch64*-*-*]
5800 && [is-effective-target aarch64_little_endian]
5801 && ![check_effective_target_vect_variable_length])
5802 || [istarget powerpc*-*-*]
5803 || [istarget spu-*-*]
5804 || ([istarget mips*-*-*]
5805 && [et-is-effective-target mips_msa])
5806 || ([istarget s390*-*-*]
5807 && [check_effective_target_s390_vx]) } {
5808 set et_vect_perm_short_saved($et_index) 1
5811 verbose "check_effective_target_vect_perm_short:\
5812 returning $et_vect_perm_short_saved($et_index)" 2
5813 return $et_vect_perm_short_saved($et_index)
5816 # Return 1 if the target supports SLP permutation of 3 vectors when each
5817 # element has 16 bits.
5819 proc check_effective_target_vect_perm3_short { } {
5820 return [expr { [check_effective_target_vect_perm_short]
5821 && [vect_perm_supported 3 16] }]
5824 # Return 1 if the target plus current options supports folding of
5825 # copysign into XORSIGN.
5827 # This won't change for different subtargets so cache the result.
5829 proc check_effective_target_xorsign { } {
5830 global et_xorsign_saved
5833 if [info exists et_xorsign_saved($et_index)] {
5834 verbose "check_effective_target_xorsign: using cached result" 2
5836 set et_xorsign_saved($et_index) 0
5837 if { [istarget aarch64*-*-*] || [istarget arm*-*-*] } {
5838 set et_xorsign_saved($et_index) 1
5841 verbose "check_effective_target_xorsign:\
5842 returning $et_xorsign_saved($et_index)" 2
5843 return $et_xorsign_saved($et_index)
5846 # Return 1 if the target plus current options supports a vector
5847 # widening summation of *short* args into *int* result, 0 otherwise.
5849 # This won't change for different subtargets so cache the result.
5851 proc check_effective_target_vect_widen_sum_hi_to_si_pattern { } {
5852 global et_vect_widen_sum_hi_to_si_pattern_saved
5855 if [info exists et_vect_widen_sum_hi_to_si_pattern_saved($et_index)] {
5856 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5857 using cached result" 2
5859 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 0
5860 if { [istarget powerpc*-*-*]
5861 || ([istarget aarch64*-*-*]
5862 && ![check_effective_target_aarch64_sve])
5863 || [is-effective-target arm_neon]
5864 || [istarget ia64-*-*] } {
5865 set et_vect_widen_sum_hi_to_si_pattern_saved($et_index) 1
5868 verbose "check_effective_target_vect_widen_sum_hi_to_si_pattern:\
5869 returning $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)" 2
5870 return $et_vect_widen_sum_hi_to_si_pattern_saved($et_index)
5873 # Return 1 if the target plus current options supports a vector
5874 # widening summation of *short* args into *int* result, 0 otherwise.
5875 # A target can also support this widening summation if it can support
5876 # promotion (unpacking) from shorts to ints.
5878 # This won't change for different subtargets so cache the result.
5880 proc check_effective_target_vect_widen_sum_hi_to_si { } {
5881 global et_vect_widen_sum_hi_to_si_saved
5884 if [info exists et_vect_widen_sum_hi_to_si_saved($et_index)] {
5885 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
5886 using cached result" 2
5888 set et_vect_widen_sum_hi_to_si_saved($et_index) \
5889 [check_effective_target_vect_unpack]
5890 if { [istarget powerpc*-*-*]
5891 || [istarget ia64-*-*] } {
5892 set et_vect_widen_sum_hi_to_si_saved($et_index) 1
5895 verbose "check_effective_target_vect_widen_sum_hi_to_si:\
5896 returning $et_vect_widen_sum_hi_to_si_saved($et_index)" 2
5897 return $et_vect_widen_sum_hi_to_si_saved($et_index)
5900 # Return 1 if the target plus current options supports a vector
5901 # widening summation of *char* args into *short* result, 0 otherwise.
5902 # A target can also support this widening summation if it can support
5903 # promotion (unpacking) from chars to shorts.
5905 # This won't change for different subtargets so cache the result.
5907 proc check_effective_target_vect_widen_sum_qi_to_hi { } {
5908 global et_vect_widen_sum_qi_to_hi_saved
5911 if [info exists et_vect_widen_sum_qi_to_hi_saved($et_index)] {
5912 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5913 using cached result" 2
5915 set et_vect_widen_sum_qi_to_hi_saved($et_index) 0
5916 if { [check_effective_target_vect_unpack]
5917 || [is-effective-target arm_neon]
5918 || [istarget ia64-*-*] } {
5919 set et_vect_widen_sum_qi_to_hi_saved($et_index) 1
5922 verbose "check_effective_target_vect_widen_sum_qi_to_hi:\
5923 returning $et_vect_widen_sum_qi_to_hi_saved($et_index)" 2
5924 return $et_vect_widen_sum_qi_to_hi_saved($et_index)
5927 # Return 1 if the target plus current options supports a vector
5928 # widening summation of *char* args into *int* result, 0 otherwise.
5930 # This won't change for different subtargets so cache the result.
5932 proc check_effective_target_vect_widen_sum_qi_to_si { } {
5933 global et_vect_widen_sum_qi_to_si_saved
5936 if [info exists et_vect_widen_sum_qi_to_si_saved($et_index)] {
5937 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
5938 using cached result" 2
5940 set et_vect_widen_sum_qi_to_si_saved($et_index) 0
5941 if { [istarget powerpc*-*-*] } {
5942 set et_vect_widen_sum_qi_to_si_saved($et_index) 1
5945 verbose "check_effective_target_vect_widen_sum_qi_to_si:\
5946 returning $et_vect_widen_sum_qi_to_si_saved($et_index)" 2
5947 return $et_vect_widen_sum_qi_to_si_saved($et_index)
5950 # Return 1 if the target plus current options supports a vector
5951 # widening multiplication of *char* args into *short* result, 0 otherwise.
5952 # A target can also support this widening multplication if it can support
5953 # promotion (unpacking) from chars to shorts, and vect_short_mult (non-widening
5954 # multiplication of shorts).
5956 # This won't change for different subtargets so cache the result.
5959 proc check_effective_target_vect_widen_mult_qi_to_hi { } {
5960 global et_vect_widen_mult_qi_to_hi_saved
5963 if [info exists et_vect_widen_mult_qi_to_hi_saved($et_index)] {
5964 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
5965 using cached result" 2
5967 if { [check_effective_target_vect_unpack]
5968 && [check_effective_target_vect_short_mult] } {
5969 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
5971 set et_vect_widen_mult_qi_to_hi_saved($et_index) 0
5973 if { [istarget powerpc*-*-*]
5974 || ([istarget aarch64*-*-*]
5975 && ![check_effective_target_aarch64_sve])
5976 || [is-effective-target arm_neon]
5977 || ([istarget s390*-*-*]
5978 && [check_effective_target_s390_vx]) } {
5979 set et_vect_widen_mult_qi_to_hi_saved($et_index) 1
5982 verbose "check_effective_target_vect_widen_mult_qi_to_hi:\
5983 returning $et_vect_widen_mult_qi_to_hi_saved($et_index)" 2
5984 return $et_vect_widen_mult_qi_to_hi_saved($et_index)
5987 # Return 1 if the target plus current options supports a vector
5988 # widening multiplication of *short* args into *int* result, 0 otherwise.
5989 # A target can also support this widening multplication if it can support
5990 # promotion (unpacking) from shorts to ints, and vect_int_mult (non-widening
5991 # multiplication of ints).
5993 # This won't change for different subtargets so cache the result.
5996 proc check_effective_target_vect_widen_mult_hi_to_si { } {
5997 global et_vect_widen_mult_hi_to_si_saved
6000 if [info exists et_vect_widen_mult_hi_to_si_saved($et_index)] {
6001 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
6002 using cached result" 2
6004 if { [check_effective_target_vect_unpack]
6005 && [check_effective_target_vect_int_mult] } {
6006 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
6008 set et_vect_widen_mult_hi_to_si_saved($et_index) 0
6010 if { [istarget powerpc*-*-*]
6011 || [istarget spu-*-*]
6012 || [istarget ia64-*-*]
6013 || ([istarget aarch64*-*-*]
6014 && ![check_effective_target_aarch64_sve])
6015 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6016 || [is-effective-target arm_neon]
6017 || ([istarget s390*-*-*]
6018 && [check_effective_target_s390_vx]) } {
6019 set et_vect_widen_mult_hi_to_si_saved($et_index) 1
6022 verbose "check_effective_target_vect_widen_mult_hi_to_si:\
6023 returning $et_vect_widen_mult_hi_to_si_saved($et_index)" 2
6024 return $et_vect_widen_mult_hi_to_si_saved($et_index)
6027 # Return 1 if the target plus current options supports a vector
6028 # widening multiplication of *char* args into *short* result, 0 otherwise.
6030 # This won't change for different subtargets so cache the result.
6032 proc check_effective_target_vect_widen_mult_qi_to_hi_pattern { } {
6033 global et_vect_widen_mult_qi_to_hi_pattern_saved
6036 if [info exists et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)] {
6037 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
6038 using cached result" 2
6040 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 0
6041 if { [istarget powerpc*-*-*]
6042 || ([is-effective-target arm_neon]
6043 && [check_effective_target_arm_little_endian])
6044 || ([istarget s390*-*-*]
6045 && [check_effective_target_s390_vx]) } {
6046 set et_vect_widen_mult_qi_to_hi_pattern_saved($et_index) 1
6049 verbose "check_effective_target_vect_widen_mult_qi_to_hi_pattern:\
6050 returning $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)" 2
6051 return $et_vect_widen_mult_qi_to_hi_pattern_saved($et_index)
6054 # Return 1 if the target plus current options supports a vector
6055 # widening multiplication of *short* args into *int* result, 0 otherwise.
6057 # This won't change for different subtargets so cache the result.
6059 proc check_effective_target_vect_widen_mult_hi_to_si_pattern { } {
6060 global et_vect_widen_mult_hi_to_si_pattern_saved
6063 if [info exists et_vect_widen_mult_hi_to_si_pattern_saved($et_index)] {
6064 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
6065 using cached result" 2
6067 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 0
6068 if { [istarget powerpc*-*-*]
6069 || [istarget spu-*-*]
6070 || [istarget ia64-*-*]
6071 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6072 || ([is-effective-target arm_neon]
6073 && [check_effective_target_arm_little_endian])
6074 || ([istarget s390*-*-*]
6075 && [check_effective_target_s390_vx]) } {
6076 set et_vect_widen_mult_hi_to_si_pattern_saved($et_index) 1
6079 verbose "check_effective_target_vect_widen_mult_hi_to_si_pattern:\
6080 returning $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)" 2
6081 return $et_vect_widen_mult_hi_to_si_pattern_saved($et_index)
6084 # Return 1 if the target plus current options supports a vector
6085 # widening multiplication of *int* args into *long* result, 0 otherwise.
6087 # This won't change for different subtargets so cache the result.
6089 proc check_effective_target_vect_widen_mult_si_to_di_pattern { } {
6090 global et_vect_widen_mult_si_to_di_pattern_saved
6093 if [info exists et_vect_widen_mult_si_to_di_pattern_saved($et_index)] {
6094 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
6095 using cached result" 2
6097 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 0
6098 if {[istarget ia64-*-*]
6099 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6100 || ([istarget s390*-*-*]
6101 && [check_effective_target_s390_vx]) } {
6102 set et_vect_widen_mult_si_to_di_pattern_saved($et_index) 1
6105 verbose "check_effective_target_vect_widen_mult_si_to_di_pattern:\
6106 returning $et_vect_widen_mult_si_to_di_pattern_saved($et_index)" 2
6107 return $et_vect_widen_mult_si_to_di_pattern_saved($et_index)
6110 # Return 1 if the target plus current options supports a vector
6111 # widening shift, 0 otherwise.
6113 # This won't change for different subtargets so cache the result.
6115 proc check_effective_target_vect_widen_shift { } {
6116 global et_vect_widen_shift_saved
6119 if [info exists et_vect_shift_saved($et_index)] {
6120 verbose "check_effective_target_vect_widen_shift: using cached result" 2
6122 set et_vect_widen_shift_saved($et_index) 0
6123 if { [is-effective-target arm_neon] } {
6124 set et_vect_widen_shift_saved($et_index) 1
6127 verbose "check_effective_target_vect_widen_shift:\
6128 returning $et_vect_widen_shift_saved($et_index)" 2
6129 return $et_vect_widen_shift_saved($et_index)
6132 # Return 1 if the target plus current options supports a vector
6133 # dot-product of signed chars, 0 otherwise.
6135 # This won't change for different subtargets so cache the result.
6137 proc check_effective_target_vect_sdot_qi { } {
6138 global et_vect_sdot_qi_saved
6141 if [info exists et_vect_sdot_qi_saved($et_index)] {
6142 verbose "check_effective_target_vect_sdot_qi: using cached result" 2
6144 set et_vect_sdot_qi_saved($et_index) 0
6145 if { [istarget ia64-*-*]
6146 || [istarget aarch64*-*-*]
6147 || [istarget arm*-*-*]
6148 || ([istarget mips*-*-*]
6149 && [et-is-effective-target mips_msa]) } {
6150 set et_vect_udot_qi_saved 1
6153 verbose "check_effective_target_vect_sdot_qi:\
6154 returning $et_vect_sdot_qi_saved($et_index)" 2
6155 return $et_vect_sdot_qi_saved($et_index)
6158 # Return 1 if the target plus current options supports a vector
6159 # dot-product of unsigned chars, 0 otherwise.
6161 # This won't change for different subtargets so cache the result.
6163 proc check_effective_target_vect_udot_qi { } {
6164 global et_vect_udot_qi_saved
6167 if [info exists et_vect_udot_qi_saved($et_index)] {
6168 verbose "check_effective_target_vect_udot_qi: using cached result" 2
6170 set et_vect_udot_qi_saved($et_index) 0
6171 if { [istarget powerpc*-*-*]
6172 || [istarget aarch64*-*-*]
6173 || [istarget arm*-*-*]
6174 || [istarget ia64-*-*]
6175 || ([istarget mips*-*-*]
6176 && [et-is-effective-target mips_msa]) } {
6177 set et_vect_udot_qi_saved($et_index) 1
6180 verbose "check_effective_target_vect_udot_qi:\
6181 returning $et_vect_udot_qi_saved($et_index)" 2
6182 return $et_vect_udot_qi_saved($et_index)
6185 # Return 1 if the target plus current options supports a vector
6186 # dot-product of signed shorts, 0 otherwise.
6188 # This won't change for different subtargets so cache the result.
6190 proc check_effective_target_vect_sdot_hi { } {
6191 global et_vect_sdot_hi_saved
6194 if [info exists et_vect_sdot_hi_saved($et_index)] {
6195 verbose "check_effective_target_vect_sdot_hi: using cached result" 2
6197 set et_vect_sdot_hi_saved($et_index) 0
6198 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6199 || [istarget ia64-*-*]
6200 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6201 || ([istarget mips*-*-*]
6202 && [et-is-effective-target mips_msa]) } {
6203 set et_vect_sdot_hi_saved($et_index) 1
6206 verbose "check_effective_target_vect_sdot_hi:\
6207 returning $et_vect_sdot_hi_saved($et_index)" 2
6208 return $et_vect_sdot_hi_saved($et_index)
6211 # Return 1 if the target plus current options supports a vector
6212 # dot-product of unsigned shorts, 0 otherwise.
6214 # This won't change for different subtargets so cache the result.
6216 proc check_effective_target_vect_udot_hi { } {
6217 global et_vect_udot_hi_saved
6220 if [info exists et_vect_udot_hi_saved($et_index)] {
6221 verbose "check_effective_target_vect_udot_hi: using cached result" 2
6223 set et_vect_udot_hi_saved($et_index) 0
6224 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6225 || ([istarget mips*-*-*]
6226 && [et-is-effective-target mips_msa]) } {
6227 set et_vect_udot_hi_saved($et_index) 1
6230 verbose "check_effective_target_vect_udot_hi:\
6231 returning $et_vect_udot_hi_saved($et_index)" 2
6232 return $et_vect_udot_hi_saved($et_index)
6235 # Return 1 if the target plus current options supports a vector
6236 # sad operation of unsigned chars, 0 otherwise.
6238 # This won't change for different subtargets so cache the result.
6240 proc check_effective_target_vect_usad_char { } {
6241 global et_vect_usad_char_saved
6244 if [info exists et_vect_usad_char_saved($et_index)] {
6245 verbose "check_effective_target_vect_usad_char: using cached result" 2
6247 set et_vect_usad_char_saved($et_index) 0
6248 if { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
6249 set et_vect_usad_char_saved($et_index) 1
6252 verbose "check_effective_target_vect_usad_char:\
6253 returning $et_vect_usad_char_saved($et_index)" 2
6254 return $et_vect_usad_char_saved($et_index)
6257 # Return 1 if the target plus current options supports a vector
6258 # demotion (packing) of shorts (to chars) and ints (to shorts)
6259 # using modulo arithmetic, 0 otherwise.
6261 # This won't change for different subtargets so cache the result.
6263 proc check_effective_target_vect_pack_trunc { } {
6264 global et_vect_pack_trunc_saved
6267 if [info exists et_vect_pack_trunc_saved($et_index)] {
6268 verbose "check_effective_target_vect_pack_trunc: using cached result" 2
6270 set et_vect_pack_trunc_saved($et_index) 0
6271 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6272 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6273 || [istarget aarch64*-*-*]
6274 || [istarget spu-*-*]
6275 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
6276 && [check_effective_target_arm_little_endian])
6277 || ([istarget mips*-*-*]
6278 && [et-is-effective-target mips_msa])
6279 || ([istarget s390*-*-*]
6280 && [check_effective_target_s390_vx]) } {
6281 set et_vect_pack_trunc_saved($et_index) 1
6284 verbose "check_effective_target_vect_pack_trunc:\
6285 returning $et_vect_pack_trunc_saved($et_index)" 2
6286 return $et_vect_pack_trunc_saved($et_index)
6289 # Return 1 if the target plus current options supports a vector
6290 # promotion (unpacking) of chars (to shorts) and shorts (to ints), 0 otherwise.
6292 # This won't change for different subtargets so cache the result.
6294 proc check_effective_target_vect_unpack { } {
6295 global et_vect_unpack_saved
6298 if [info exists et_vect_unpack_saved($et_index)] {
6299 verbose "check_effective_target_vect_unpack: using cached result" 2
6301 set et_vect_unpack_saved($et_index) 0
6302 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
6303 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6304 || [istarget spu-*-*]
6305 || [istarget ia64-*-*]
6306 || [istarget aarch64*-*-*]
6307 || ([istarget mips*-*-*]
6308 && [et-is-effective-target mips_msa])
6309 || ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok]
6310 && [check_effective_target_arm_little_endian])
6311 || ([istarget s390*-*-*]
6312 && [check_effective_target_s390_vx]) } {
6313 set et_vect_unpack_saved($et_index) 1
6316 verbose "check_effective_target_vect_unpack:\
6317 returning $et_vect_unpack_saved($et_index)" 2
6318 return $et_vect_unpack_saved($et_index)
6321 # Return 1 if the target plus current options does not guarantee
6322 # that its STACK_BOUNDARY is >= the reguired vector alignment.
6324 # This won't change for different subtargets so cache the result.
6326 proc check_effective_target_unaligned_stack { } {
6327 global et_unaligned_stack_saved
6329 if [info exists et_unaligned_stack_saved] {
6330 verbose "check_effective_target_unaligned_stack: using cached result" 2
6332 set et_unaligned_stack_saved 0
6334 verbose "check_effective_target_unaligned_stack: returning $et_unaligned_stack_saved" 2
6335 return $et_unaligned_stack_saved
6338 # Return 1 if the target plus current options does not have
6339 # slow unaligned access when using word size accesses.
6341 # This won't change for different subtargets so cache the result.
6343 proc check_effective_target_word_mode_no_slow_unalign { } {
6344 global et_word_mode_no_slow_unalign_saved
6347 if [info exists et_word_mode_no_slow_unalign_saved($et_index)] {
6348 verbose "check_effective_target_word_mode_no_slow_unalign: \
6349 using cached result" 2
6351 set et_word_mode_no_slow_unalign_saved($et_index) 0
6352 if { [is-effective-target non_strict_align]
6353 && !([istarget arm*-*-*])
6355 set et_word_mode_no_slow_unalign_saved($et_index) 1
6358 verbose "check_effective_target_word_mode_no_slow_unalign:\
6359 returning $et_word_mode_no_slow_unalign_saved($et_index)" 2
6360 return $et_word_mode_no_slow_unalign_saved($et_index)
6363 # Return 1 if the target plus current options does not support a vector
6364 # alignment mechanism, 0 otherwise.
6366 # This won't change for different subtargets so cache the result.
6368 proc check_effective_target_vect_no_align { } {
6369 global et_vect_no_align_saved
6372 if [info exists et_vect_no_align_saved($et_index)] {
6373 verbose "check_effective_target_vect_no_align: using cached result" 2
6375 set et_vect_no_align_saved($et_index) 0
6376 if { [istarget mipsisa64*-*-*]
6377 || [istarget mips-sde-elf]
6378 || [istarget sparc*-*-*]
6379 || [istarget ia64-*-*]
6380 || [check_effective_target_arm_vect_no_misalign]
6381 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
6382 || ([istarget mips*-*-*]
6383 && [et-is-effective-target mips_loongson]) } {
6384 set et_vect_no_align_saved($et_index) 1
6387 verbose "check_effective_target_vect_no_align:\
6388 returning $et_vect_no_align_saved($et_index)" 2
6389 return $et_vect_no_align_saved($et_index)
6392 # Return 1 if the target supports a vector misalign access, 0 otherwise.
6394 # This won't change for different subtargets so cache the result.
6396 proc check_effective_target_vect_hw_misalign { } {
6397 global et_vect_hw_misalign_saved
6400 if [info exists et_vect_hw_misalign_saved($et_index)] {
6401 verbose "check_effective_target_vect_hw_misalign: using cached result" 2
6403 set et_vect_hw_misalign_saved($et_index) 0
6404 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6405 || ([istarget powerpc*-*-*] && [check_p8vector_hw_available])
6406 || [istarget aarch64*-*-*]
6407 || ([istarget mips*-*-*] && [et-is-effective-target mips_msa])
6408 || ([istarget s390*-*-*]
6409 && [check_effective_target_s390_vx]) } {
6410 set et_vect_hw_misalign_saved($et_index) 1
6412 if { [istarget arm*-*-*] } {
6413 set et_vect_hw_misalign_saved($et_index) [expr ![check_effective_target_arm_vect_no_misalign]]
6416 verbose "check_effective_target_vect_hw_misalign:\
6417 returning $et_vect_hw_misalign_saved($et_index)" 2
6418 return $et_vect_hw_misalign_saved($et_index)
6422 # Return 1 if arrays are aligned to the vector alignment
6423 # boundary, 0 otherwise.
6425 proc check_effective_target_vect_aligned_arrays { } {
6426 set et_vect_aligned_arrays 0
6427 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6428 && !([is-effective-target ia32]
6429 || ([check_avx_available] && ![check_prefer_avx128])))
6430 || [istarget spu-*-*] } {
6431 set et_vect_aligned_arrays 1
6434 verbose "check_effective_target_vect_aligned_arrays:\
6435 returning $et_vect_aligned_arrays" 2
6436 return $et_vect_aligned_arrays
6439 # Return 1 if types of size 32 bit or less are naturally aligned
6440 # (aligned to their type-size), 0 otherwise.
6442 # This won't change for different subtargets so cache the result.
6444 proc check_effective_target_natural_alignment_32 { } {
6445 global et_natural_alignment_32
6447 if [info exists et_natural_alignment_32_saved] {
6448 verbose "check_effective_target_natural_alignment_32: using cached result" 2
6450 # FIXME: 32bit powerpc: guaranteed only if MASK_ALIGN_NATURAL/POWER.
6451 set et_natural_alignment_32_saved 1
6452 if { ([istarget *-*-darwin*] && [is-effective-target lp64])
6453 || [istarget avr-*-*] } {
6454 set et_natural_alignment_32_saved 0
6457 verbose "check_effective_target_natural_alignment_32: returning $et_natural_alignment_32_saved" 2
6458 return $et_natural_alignment_32_saved
6461 # Return 1 if types of size 64 bit or less are naturally aligned (aligned to their
6462 # type-size), 0 otherwise.
6464 # This won't change for different subtargets so cache the result.
6466 proc check_effective_target_natural_alignment_64 { } {
6467 global et_natural_alignment_64
6469 if [info exists et_natural_alignment_64_saved] {
6470 verbose "check_effective_target_natural_alignment_64: using cached result" 2
6472 set et_natural_alignment_64_saved 0
6473 if { ([is-effective-target lp64] && ![istarget *-*-darwin*])
6474 || [istarget spu-*-*] } {
6475 set et_natural_alignment_64_saved 1
6478 verbose "check_effective_target_natural_alignment_64: returning $et_natural_alignment_64_saved" 2
6479 return $et_natural_alignment_64_saved
6482 # Return 1 if all vector types are naturally aligned (aligned to their
6483 # type-size), 0 otherwise.
6485 proc check_effective_target_vect_natural_alignment { } {
6486 set et_vect_natural_alignment 1
6487 if { [check_effective_target_arm_eabi]
6488 || [istarget nvptx-*-*]
6489 || [istarget s390*-*-*] } {
6490 set et_vect_natural_alignment 0
6492 verbose "check_effective_target_vect_natural_alignment:\
6493 returning $et_vect_natural_alignment" 2
6494 return $et_vect_natural_alignment
6497 # Return true if fully-masked loops are supported.
6499 proc check_effective_target_vect_fully_masked { } {
6500 return [check_effective_target_aarch64_sve]
6503 # Return 1 if the target doesn't prefer any alignment beyond element
6504 # alignment during vectorization.
6506 proc check_effective_target_vect_element_align_preferred { } {
6507 return [expr { [check_effective_target_aarch64_sve]
6508 && [check_effective_target_vect_variable_length] }]
6511 # Return 1 if we can align stack data to the preferred vector alignment.
6513 proc check_effective_target_vect_align_stack_vars { } {
6514 if { [check_effective_target_aarch64_sve] } {
6515 return [check_effective_target_vect_variable_length]
6520 # Return 1 if vector alignment (for types of size 32 bit or less) is reachable, 0 otherwise.
6522 proc check_effective_target_vector_alignment_reachable { } {
6523 set et_vector_alignment_reachable 0
6524 if { [check_effective_target_vect_aligned_arrays]
6525 || [check_effective_target_natural_alignment_32] } {
6526 set et_vector_alignment_reachable 1
6528 verbose "check_effective_target_vector_alignment_reachable:\
6529 returning $et_vector_alignment_reachable" 2
6530 return $et_vector_alignment_reachable
6533 # Return 1 if vector alignment for 64 bit is reachable, 0 otherwise.
6535 proc check_effective_target_vector_alignment_reachable_for_64bit { } {
6536 set et_vector_alignment_reachable_for_64bit 0
6537 if { [check_effective_target_vect_aligned_arrays]
6538 || [check_effective_target_natural_alignment_64] } {
6539 set et_vector_alignment_reachable_for_64bit 1
6541 verbose "check_effective_target_vector_alignment_reachable_for_64bit:\
6542 returning $et_vector_alignment_reachable_for_64bit" 2
6543 return $et_vector_alignment_reachable_for_64bit
6546 # Return 1 if the target only requires element alignment for vector accesses
6548 proc check_effective_target_vect_element_align { } {
6549 global et_vect_element_align
6552 if [info exists et_vect_element_align($et_index)] {
6553 verbose "check_effective_target_vect_element_align:\
6554 using cached result" 2
6556 set et_vect_element_align($et_index) 0
6557 if { ([istarget arm*-*-*]
6558 && ![check_effective_target_arm_vect_no_misalign])
6559 || [check_effective_target_vect_hw_misalign] } {
6560 set et_vect_element_align($et_index) 1
6564 verbose "check_effective_target_vect_element_align:\
6565 returning $et_vect_element_align($et_index)" 2
6566 return $et_vect_element_align($et_index)
6569 # Return 1 if we expect to see unaligned accesses in at least some
6572 proc check_effective_target_vect_unaligned_possible { } {
6573 return [expr { ![check_effective_target_vect_element_align_preferred]
6574 && (![check_effective_target_vect_no_align]
6575 || [check_effective_target_vect_hw_misalign]) }]
6578 # Return 1 if the target supports vector LOAD_LANES operations, 0 otherwise.
6580 proc check_effective_target_vect_load_lanes { } {
6581 global et_vect_load_lanes
6583 if [info exists et_vect_load_lanes] {
6584 verbose "check_effective_target_vect_load_lanes: using cached result" 2
6586 set et_vect_load_lanes 0
6587 if { ([istarget arm*-*-*] && [check_effective_target_arm_neon_ok])
6588 || [istarget aarch64*-*-*] } {
6589 set et_vect_load_lanes 1
6593 verbose "check_effective_target_vect_load_lanes: returning $et_vect_load_lanes" 2
6594 return $et_vect_load_lanes
6597 # Return 1 if the target supports vector masked stores.
6599 proc check_effective_target_vect_masked_store { } {
6600 return [check_effective_target_aarch64_sve]
6603 # Return 1 if the target supports vector scatter stores.
6605 proc check_effective_target_vect_scatter_store { } {
6606 return [check_effective_target_aarch64_sve]
6609 # Return 1 if the target supports vector conditional operations, 0 otherwise.
6611 proc check_effective_target_vect_condition { } {
6612 global et_vect_cond_saved
6615 if [info exists et_vect_cond_saved($et_index)] {
6616 verbose "check_effective_target_vect_cond: using cached result" 2
6618 set et_vect_cond_saved($et_index) 0
6619 if { [istarget aarch64*-*-*]
6620 || [istarget powerpc*-*-*]
6621 || [istarget ia64-*-*]
6622 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6623 || [istarget spu-*-*]
6624 || ([istarget mips*-*-*]
6625 && [et-is-effective-target mips_msa])
6626 || ([istarget arm*-*-*]
6627 && [check_effective_target_arm_neon_ok])
6628 || ([istarget s390*-*-*]
6629 && [check_effective_target_s390_vx]) } {
6630 set et_vect_cond_saved($et_index) 1
6634 verbose "check_effective_target_vect_cond:\
6635 returning $et_vect_cond_saved($et_index)" 2
6636 return $et_vect_cond_saved($et_index)
6639 # Return 1 if the target supports vector conditional operations where
6640 # the comparison has different type from the lhs, 0 otherwise.
6642 proc check_effective_target_vect_cond_mixed { } {
6643 global et_vect_cond_mixed_saved
6646 if [info exists et_vect_cond_mixed_saved($et_index)] {
6647 verbose "check_effective_target_vect_cond_mixed: using cached result" 2
6649 set et_vect_cond_mixed_saved($et_index) 0
6650 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6651 || [istarget aarch64*-*-*]
6652 || [istarget powerpc*-*-*]
6653 || ([istarget mips*-*-*]
6654 && [et-is-effective-target mips_msa])
6655 || ([istarget s390*-*-*]
6656 && [check_effective_target_s390_vx]) } {
6657 set et_vect_cond_mixed_saved($et_index) 1
6661 verbose "check_effective_target_vect_cond_mixed:\
6662 returning $et_vect_cond_mixed_saved($et_index)" 2
6663 return $et_vect_cond_mixed_saved($et_index)
6666 # Return 1 if the target supports vector char multiplication, 0 otherwise.
6668 proc check_effective_target_vect_char_mult { } {
6669 global et_vect_char_mult_saved
6672 if [info exists et_vect_char_mult_saved($et_index)] {
6673 verbose "check_effective_target_vect_char_mult: using cached result" 2
6675 set et_vect_char_mult_saved($et_index) 0
6676 if { [istarget aarch64*-*-*]
6677 || [istarget ia64-*-*]
6678 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6679 || [check_effective_target_arm32]
6680 || [check_effective_target_powerpc_altivec]
6681 || ([istarget mips*-*-*]
6682 && [et-is-effective-target mips_msa])
6683 || ([istarget s390*-*-*]
6684 && [check_effective_target_s390_vx]) } {
6685 set et_vect_char_mult_saved($et_index) 1
6689 verbose "check_effective_target_vect_char_mult:\
6690 returning $et_vect_char_mult_saved($et_index)" 2
6691 return $et_vect_char_mult_saved($et_index)
6694 # Return 1 if the target supports vector short multiplication, 0 otherwise.
6696 proc check_effective_target_vect_short_mult { } {
6697 global et_vect_short_mult_saved
6700 if [info exists et_vect_short_mult_saved($et_index)] {
6701 verbose "check_effective_target_vect_short_mult: using cached result" 2
6703 set et_vect_short_mult_saved($et_index) 0
6704 if { [istarget ia64-*-*]
6705 || [istarget spu-*-*]
6706 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6707 || [istarget powerpc*-*-*]
6708 || [istarget aarch64*-*-*]
6709 || [check_effective_target_arm32]
6710 || ([istarget mips*-*-*]
6711 && ([et-is-effective-target mips_msa]
6712 || [et-is-effective-target mips_loongson]))
6713 || ([istarget s390*-*-*]
6714 && [check_effective_target_s390_vx]) } {
6715 set et_vect_short_mult_saved($et_index) 1
6719 verbose "check_effective_target_vect_short_mult:\
6720 returning $et_vect_short_mult_saved($et_index)" 2
6721 return $et_vect_short_mult_saved($et_index)
6724 # Return 1 if the target supports vector int multiplication, 0 otherwise.
6726 proc check_effective_target_vect_int_mult { } {
6727 global et_vect_int_mult_saved
6730 if [info exists et_vect_int_mult_saved($et_index)] {
6731 verbose "check_effective_target_vect_int_mult: using cached result" 2
6733 set et_vect_int_mult_saved($et_index) 0
6734 if { ([istarget powerpc*-*-*] && ![istarget powerpc-*-linux*paired*])
6735 || [istarget spu-*-*]
6736 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6737 || [istarget ia64-*-*]
6738 || [istarget aarch64*-*-*]
6739 || ([istarget mips*-*-*]
6740 && [et-is-effective-target mips_msa])
6741 || [check_effective_target_arm32]
6742 || ([istarget s390*-*-*]
6743 && [check_effective_target_s390_vx]) } {
6744 set et_vect_int_mult_saved($et_index) 1
6748 verbose "check_effective_target_vect_int_mult:\
6749 returning $et_vect_int_mult_saved($et_index)" 2
6750 return $et_vect_int_mult_saved($et_index)
6753 # Return 1 if the target supports 64 bit hardware vector
6754 # multiplication of long operands with a long result, 0 otherwise.
6756 # This can change for different subtargets so do not cache the result.
6758 proc check_effective_target_vect_long_mult { } {
6759 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6760 || (([istarget powerpc*-*-*]
6761 && ![istarget powerpc-*-linux*paired*])
6762 && [check_effective_target_ilp32])
6763 || [is-effective-target arm_neon]
6764 || ([istarget sparc*-*-*] && [check_effective_target_ilp32])
6765 || [istarget aarch64*-*-*]
6766 || ([istarget mips*-*-*]
6767 && [et-is-effective-target mips_msa]) } {
6773 verbose "check_effective_target_vect_long_mult: returning $answer" 2
6777 # Return 1 if the target supports vector even/odd elements extraction, 0 otherwise.
6779 proc check_effective_target_vect_extract_even_odd { } {
6780 global et_vect_extract_even_odd_saved
6783 if [info exists et_vect_extract_even_odd_saved($et_index)] {
6784 verbose "check_effective_target_vect_extract_even_odd:\
6785 using cached result" 2
6787 set et_vect_extract_even_odd_saved($et_index) 0
6788 if { [istarget aarch64*-*-*]
6789 || [istarget powerpc*-*-*]
6790 || [is-effective-target arm_neon]
6791 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6792 || [istarget ia64-*-*]
6793 || [istarget spu-*-*]
6794 || ([istarget mips*-*-*]
6795 && ([et-is-effective-target mips_msa]
6796 || [et-is-effective-target mpaired_single]))
6797 || ([istarget s390*-*-*]
6798 && [check_effective_target_s390_vx]) } {
6799 set et_vect_extract_even_odd_saved($et_index) 1
6803 verbose "check_effective_target_vect_extract_even_odd:\
6804 returning $et_vect_extract_even_odd_saved($et_index)" 2
6805 return $et_vect_extract_even_odd_saved($et_index)
6808 # Return 1 if the target supports vector interleaving, 0 otherwise.
6810 proc check_effective_target_vect_interleave { } {
6811 global et_vect_interleave_saved
6814 if [info exists et_vect_interleave_saved($et_index)] {
6815 verbose "check_effective_target_vect_interleave: using cached result" 2
6817 set et_vect_interleave_saved($et_index) 0
6818 if { [istarget aarch64*-*-*]
6819 || [istarget powerpc*-*-*]
6820 || [is-effective-target arm_neon]
6821 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6822 || [istarget ia64-*-*]
6823 || [istarget spu-*-*]
6824 || ([istarget mips*-*-*]
6825 && ([et-is-effective-target mpaired_single]
6826 || [et-is-effective-target mips_msa]))
6827 || ([istarget s390*-*-*]
6828 && [check_effective_target_s390_vx]) } {
6829 set et_vect_interleave_saved($et_index) 1
6833 verbose "check_effective_target_vect_interleave:\
6834 returning $et_vect_interleave_saved($et_index)" 2
6835 return $et_vect_interleave_saved($et_index)
6838 foreach N {2 3 4 8} {
6839 eval [string map [list N $N] {
6840 # Return 1 if the target supports 2-vector interleaving
6841 proc check_effective_target_vect_stridedN { } {
6842 global et_vect_stridedN_saved
6845 if [info exists et_vect_stridedN_saved($et_index)] {
6846 verbose "check_effective_target_vect_stridedN:\
6847 using cached result" 2
6849 set et_vect_stridedN_saved($et_index) 0
6851 && [check_effective_target_vect_interleave]
6852 && [check_effective_target_vect_extract_even_odd] } {
6853 set et_vect_stridedN_saved($et_index) 1
6855 if { ([istarget arm*-*-*]
6856 || [istarget aarch64*-*-*]) && N >= 2 && N <= 4 } {
6857 set et_vect_stridedN_saved($et_index) 1
6861 verbose "check_effective_target_vect_stridedN:\
6862 returning $et_vect_stridedN_saved($et_index)" 2
6863 return $et_vect_stridedN_saved($et_index)
6868 # Return the list of vector sizes (in bits) that each target supports.
6869 # A vector length of "0" indicates variable-length vectors.
6871 proc available_vector_sizes { } {
6873 if { [istarget aarch64*-*-*] } {
6874 if { [check_effective_target_aarch64_sve] } {
6875 lappend result [aarch64_sve_bits]
6877 lappend result 128 64
6878 } elseif { [istarget arm*-*-*]
6879 && [check_effective_target_arm_neon_ok] } {
6880 lappend result 128 64
6881 } elseif { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6882 && ([check_avx_available] && ![check_prefer_avx128])) } {
6883 lappend result 256 128
6884 } elseif { [istarget sparc*-*-*] } {
6887 # The traditional default asumption.
6893 # Return 1 if the target supports multiple vector sizes
6895 proc check_effective_target_vect_multiple_sizes { } {
6896 return [expr { [llength [available_vector_sizes]] > 1 }]
6899 # Return true if variable-length vectors are supported.
6901 proc check_effective_target_vect_variable_length { } {
6902 return [expr { [lindex [available_vector_sizes] 0] == 0 }]
6905 # Return 1 if the target supports vectors of 64 bits.
6907 proc check_effective_target_vect64 { } {
6908 return [expr { [lsearch -exact [available_vector_sizes] 64] >= 0 }]
6911 # Return 1 if the target supports vector copysignf calls.
6913 proc check_effective_target_vect_call_copysignf { } {
6914 global et_vect_call_copysignf_saved
6917 if [info exists et_vect_call_copysignf_saved($et_index)] {
6918 verbose "check_effective_target_vect_call_copysignf:\
6919 using cached result" 2
6921 set et_vect_call_copysignf_saved($et_index) 0
6922 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6923 || [istarget powerpc*-*-*]
6924 || [istarget aarch64*-*-*] } {
6925 set et_vect_call_copysignf_saved($et_index) 1
6929 verbose "check_effective_target_vect_call_copysignf:\
6930 returning $et_vect_call_copysignf_saved($et_index)" 2
6931 return $et_vect_call_copysignf_saved($et_index)
6934 # Return 1 if the target supports hardware square root instructions.
6936 proc check_effective_target_sqrt_insn { } {
6937 global et_sqrt_insn_saved
6939 if [info exists et_sqrt_insn_saved] {
6940 verbose "check_effective_target_hw_sqrt: using cached result" 2
6942 set et_sqrt_insn_saved 0
6943 if { [istarget i?86-*-*] || [istarget x86_64-*-*]
6944 || [istarget powerpc*-*-*]
6945 || [istarget aarch64*-*-*]
6946 || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok])
6947 || ([istarget s390*-*-*]
6948 && [check_effective_target_s390_vx]) } {
6949 set et_sqrt_insn_saved 1
6953 verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
6954 return $et_sqrt_insn_saved
6957 # Return 1 if the target supports vector sqrtf calls.
6959 proc check_effective_target_vect_call_sqrtf { } {
6960 global et_vect_call_sqrtf_saved
6963 if [info exists et_vect_call_sqrtf_saved($et_index)] {
6964 verbose "check_effective_target_vect_call_sqrtf: using cached result" 2
6966 set et_vect_call_sqrtf_saved($et_index) 0
6967 if { [istarget aarch64*-*-*]
6968 || [istarget i?86-*-*] || [istarget x86_64-*-*]
6969 || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
6970 || ([istarget s390*-*-*]
6971 && [check_effective_target_s390_vx]) } {
6972 set et_vect_call_sqrtf_saved($et_index) 1
6976 verbose "check_effective_target_vect_call_sqrtf:\
6977 returning $et_vect_call_sqrtf_saved($et_index)" 2
6978 return $et_vect_call_sqrtf_saved($et_index)
6981 # Return 1 if the target supports vector lrint calls.
6983 proc check_effective_target_vect_call_lrint { } {
6984 set et_vect_call_lrint 0
6985 if { (([istarget i?86-*-*] || [istarget x86_64-*-*])
6986 && [check_effective_target_ilp32]) } {
6987 set et_vect_call_lrint 1
6990 verbose "check_effective_target_vect_call_lrint: returning $et_vect_call_lrint" 2
6991 return $et_vect_call_lrint
6994 # Return 1 if the target supports vector btrunc calls.
6996 proc check_effective_target_vect_call_btrunc { } {
6997 global et_vect_call_btrunc_saved
7000 if [info exists et_vect_call_btrunc_saved($et_index)] {
7001 verbose "check_effective_target_vect_call_btrunc:\
7002 using cached result" 2
7004 set et_vect_call_btrunc_saved($et_index) 0
7005 if { [istarget aarch64*-*-*] } {
7006 set et_vect_call_btrunc_saved($et_index) 1
7010 verbose "check_effective_target_vect_call_btrunc:\
7011 returning $et_vect_call_btrunc_saved($et_index)" 2
7012 return $et_vect_call_btrunc_saved($et_index)
7015 # Return 1 if the target supports vector btruncf calls.
7017 proc check_effective_target_vect_call_btruncf { } {
7018 global et_vect_call_btruncf_saved
7021 if [info exists et_vect_call_btruncf_saved($et_index)] {
7022 verbose "check_effective_target_vect_call_btruncf:\
7023 using cached result" 2
7025 set et_vect_call_btruncf_saved($et_index) 0
7026 if { [istarget aarch64*-*-*] } {
7027 set et_vect_call_btruncf_saved($et_index) 1
7031 verbose "check_effective_target_vect_call_btruncf:\
7032 returning $et_vect_call_btruncf_saved($et_index)" 2
7033 return $et_vect_call_btruncf_saved($et_index)
7036 # Return 1 if the target supports vector ceil calls.
7038 proc check_effective_target_vect_call_ceil { } {
7039 global et_vect_call_ceil_saved
7042 if [info exists et_vect_call_ceil_saved($et_index)] {
7043 verbose "check_effective_target_vect_call_ceil: using cached result" 2
7045 set et_vect_call_ceil_saved($et_index) 0
7046 if { [istarget aarch64*-*-*] } {
7047 set et_vect_call_ceil_saved($et_index) 1
7051 verbose "check_effective_target_vect_call_ceil:\
7052 returning $et_vect_call_ceil_saved($et_index)" 2
7053 return $et_vect_call_ceil_saved($et_index)
7056 # Return 1 if the target supports vector ceilf calls.
7058 proc check_effective_target_vect_call_ceilf { } {
7059 global et_vect_call_ceilf_saved
7062 if [info exists et_vect_call_ceilf_saved($et_index)] {
7063 verbose "check_effective_target_vect_call_ceilf: using cached result" 2
7065 set et_vect_call_ceilf_saved($et_index) 0
7066 if { [istarget aarch64*-*-*] } {
7067 set et_vect_call_ceilf_saved($et_index) 1
7071 verbose "check_effective_target_vect_call_ceilf:\
7072 returning $et_vect_call_ceilf_saved($et_index)" 2
7073 return $et_vect_call_ceilf_saved($et_index)
7076 # Return 1 if the target supports vector floor calls.
7078 proc check_effective_target_vect_call_floor { } {
7079 global et_vect_call_floor_saved
7082 if [info exists et_vect_call_floor_saved($et_index)] {
7083 verbose "check_effective_target_vect_call_floor: using cached result" 2
7085 set et_vect_call_floor_saved($et_index) 0
7086 if { [istarget aarch64*-*-*] } {
7087 set et_vect_call_floor_saved($et_index) 1
7091 verbose "check_effective_target_vect_call_floor:\
7092 returning $et_vect_call_floor_saved($et_index)" 2
7093 return $et_vect_call_floor_saved($et_index)
7096 # Return 1 if the target supports vector floorf calls.
7098 proc check_effective_target_vect_call_floorf { } {
7099 global et_vect_call_floorf_saved
7102 if [info exists et_vect_call_floorf_saved($et_index)] {
7103 verbose "check_effective_target_vect_call_floorf: using cached result" 2
7105 set et_vect_call_floorf_saved($et_index) 0
7106 if { [istarget aarch64*-*-*] } {
7107 set et_vect_call_floorf_saved($et_index) 1
7111 verbose "check_effective_target_vect_call_floorf:\
7112 returning $et_vect_call_floorf_saved($et_index)" 2
7113 return $et_vect_call_floorf_saved($et_index)
7116 # Return 1 if the target supports vector lceil calls.
7118 proc check_effective_target_vect_call_lceil { } {
7119 global et_vect_call_lceil_saved
7122 if [info exists et_vect_call_lceil_saved($et_index)] {
7123 verbose "check_effective_target_vect_call_lceil: using cached result" 2
7125 set et_vect_call_lceil_saved($et_index) 0
7126 if { [istarget aarch64*-*-*] } {
7127 set et_vect_call_lceil_saved($et_index) 1
7131 verbose "check_effective_target_vect_call_lceil:\
7132 returning $et_vect_call_lceil_saved($et_index)" 2
7133 return $et_vect_call_lceil_saved($et_index)
7136 # Return 1 if the target supports vector lfloor calls.
7138 proc check_effective_target_vect_call_lfloor { } {
7139 global et_vect_call_lfloor_saved
7142 if [info exists et_vect_call_lfloor_saved($et_index)] {
7143 verbose "check_effective_target_vect_call_lfloor: using cached result" 2
7145 set et_vect_call_lfloor_saved($et_index) 0
7146 if { [istarget aarch64*-*-*] } {
7147 set et_vect_call_lfloor_saved($et_index) 1
7151 verbose "check_effective_target_vect_call_lfloor:\
7152 returning $et_vect_call_lfloor_saved($et_index)" 2
7153 return $et_vect_call_lfloor_saved($et_index)
7156 # Return 1 if the target supports vector nearbyint calls.
7158 proc check_effective_target_vect_call_nearbyint { } {
7159 global et_vect_call_nearbyint_saved
7162 if [info exists et_vect_call_nearbyint_saved($et_index)] {
7163 verbose "check_effective_target_vect_call_nearbyint: using cached result" 2
7165 set et_vect_call_nearbyint_saved($et_index) 0
7166 if { [istarget aarch64*-*-*] } {
7167 set et_vect_call_nearbyint_saved($et_index) 1
7171 verbose "check_effective_target_vect_call_nearbyint:\
7172 returning $et_vect_call_nearbyint_saved($et_index)" 2
7173 return $et_vect_call_nearbyint_saved($et_index)
7176 # Return 1 if the target supports vector nearbyintf calls.
7178 proc check_effective_target_vect_call_nearbyintf { } {
7179 global et_vect_call_nearbyintf_saved
7182 if [info exists et_vect_call_nearbyintf_saved($et_index)] {
7183 verbose "check_effective_target_vect_call_nearbyintf:\
7184 using cached result" 2
7186 set et_vect_call_nearbyintf_saved($et_index) 0
7187 if { [istarget aarch64*-*-*] } {
7188 set et_vect_call_nearbyintf_saved($et_index) 1
7192 verbose "check_effective_target_vect_call_nearbyintf:\
7193 returning $et_vect_call_nearbyintf_saved($et_index)" 2
7194 return $et_vect_call_nearbyintf_saved($et_index)
7197 # Return 1 if the target supports vector round calls.
7199 proc check_effective_target_vect_call_round { } {
7200 global et_vect_call_round_saved
7203 if [info exists et_vect_call_round_saved($et_index)] {
7204 verbose "check_effective_target_vect_call_round: using cached result" 2
7206 set et_vect_call_round_saved($et_index) 0
7207 if { [istarget aarch64*-*-*] } {
7208 set et_vect_call_round_saved($et_index) 1
7212 verbose "check_effective_target_vect_call_round:\
7213 returning $et_vect_call_round_saved($et_index)" 2
7214 return $et_vect_call_round_saved($et_index)
7217 # Return 1 if the target supports vector roundf calls.
7219 proc check_effective_target_vect_call_roundf { } {
7220 global et_vect_call_roundf_saved
7223 if [info exists et_vect_call_roundf_saved($et_index)] {
7224 verbose "check_effective_target_vect_call_roundf: using cached result" 2
7226 set et_vect_call_roundf_saved($et_index) 0
7227 if { [istarget aarch64*-*-*] } {
7228 set et_vect_call_roundf_saved($et_index) 1
7232 verbose "check_effective_target_vect_call_roundf:\
7233 returning $et_vect_call_roundf_saved($et_index)" 2
7234 return $et_vect_call_roundf_saved($et_index)
7237 # Return 1 if the target supports AND, OR and XOR reduction.
7239 proc check_effective_target_vect_logical_reduc { } {
7240 return [check_effective_target_aarch64_sve]
7243 # Return 1 if the target supports the fold_extract_last optab.
7245 proc check_effective_target_vect_fold_extract_last { } {
7246 return [check_effective_target_aarch64_sve]
7249 # Return 1 if the target supports section-anchors
7251 proc check_effective_target_section_anchors { } {
7252 global et_section_anchors_saved
7254 if [info exists et_section_anchors_saved] {
7255 verbose "check_effective_target_section_anchors: using cached result" 2
7257 set et_section_anchors_saved 0
7258 if { [istarget powerpc*-*-*]
7259 || [istarget arm*-*-*]
7260 || [istarget aarch64*-*-*] } {
7261 set et_section_anchors_saved 1
7265 verbose "check_effective_target_section_anchors: returning $et_section_anchors_saved" 2
7266 return $et_section_anchors_saved
7269 # Return 1 if the target supports atomic operations on "int_128" values.
7271 proc check_effective_target_sync_int_128 { } {
7272 if { [istarget spu-*-*] } {
7279 # Return 1 if the target supports atomic operations on "int_128" values
7280 # and can execute them.
7281 # This requires support for both compare-and-swap and true atomic loads.
7283 proc check_effective_target_sync_int_128_runtime { } {
7284 if { [istarget spu-*-*] } {
7291 # Return 1 if the target supports atomic operations on "long long".
7293 # Note: 32bit x86 targets require -march=pentium in dg-options.
7294 # Note: 32bit s390 targets require -mzarch in dg-options.
7296 proc check_effective_target_sync_long_long { } {
7297 if { [istarget i?86-*-*] || [istarget x86_64-*-*])
7298 || [istarget aarch64*-*-*]
7299 || [istarget arm*-*-*]
7300 || [istarget alpha*-*-*]
7301 || ([istarget sparc*-*-*] && [check_effective_target_lp64])
7302 || [istarget s390*-*-*]
7303 || [istarget spu-*-*] } {
7310 # Return 1 if the target supports atomic operations on "long long"
7311 # and can execute them.
7313 # Note: 32bit x86 targets require -march=pentium in dg-options.
7315 proc check_effective_target_sync_long_long_runtime { } {
7316 if { (([istarget x86_64-*-*] || [istarget i?86-*-*])
7317 && [check_cached_effective_target sync_long_long_available {
7318 check_runtime_nocache sync_long_long_available {
7322 unsigned int eax, ebx, ecx, edx;
7323 if (__get_cpuid (1, &eax, &ebx, &ecx, &edx))
7324 return !(edx & bit_CMPXCHG8B);
7329 || [istarget aarch64*-*-*]
7330 || ([istarget arm*-*-linux-*]
7331 && [check_runtime sync_longlong_runtime {
7337 if (sizeof (long long) != 8)
7340 /* Just check for native;
7341 checking for kernel fallback is tricky. */
7342 asm volatile ("ldrexd r0,r1, [%0]"
7343 : : "r" (&l1) : "r0", "r1");
7347 || [istarget alpha*-*-*]
7348 || ([istarget sparc*-*-*]
7349 && [check_effective_target_lp64]
7350 && [check_effective_target_ultrasparc_hw])
7351 || [istarget spu-*-*]
7352 || ([istarget powerpc*-*-*] && [check_effective_target_lp64]) } {
7359 # Return 1 if the target supports byte swap instructions.
7361 proc check_effective_target_bswap { } {
7362 global et_bswap_saved
7364 if [info exists et_bswap_saved] {
7365 verbose "check_effective_target_bswap: using cached result" 2
7367 set et_bswap_saved 0
7368 if { [istarget aarch64*-*-*]
7369 || [istarget alpha*-*-*]
7370 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7371 || [istarget m68k-*-*]
7372 || [istarget powerpc*-*-*]
7373 || [istarget rs6000-*-*]
7374 || [istarget s390*-*-*]
7375 || ([istarget arm*-*-*]
7376 && [check_no_compiler_messages_nocache arm_v6_or_later object {
7378 #error not armv6 or later
7382 set et_bswap_saved 1
7386 verbose "check_effective_target_bswap: returning $et_bswap_saved" 2
7387 return $et_bswap_saved
7390 # Return 1 if the target supports atomic operations on "int" and "long".
7392 proc check_effective_target_sync_int_long { } {
7393 global et_sync_int_long_saved
7395 if [info exists et_sync_int_long_saved] {
7396 verbose "check_effective_target_sync_int_long: using cached result" 2
7398 set et_sync_int_long_saved 0
7399 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
7400 # load-reserved/store-conditional instructions.
7401 if { [istarget ia64-*-*]
7402 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7403 || [istarget aarch64*-*-*]
7404 || [istarget alpha*-*-*]
7405 || [istarget arm*-*-linux-*]
7406 || ([istarget arm*-*-*]
7407 && [check_effective_target_arm_acq_rel])
7408 || [istarget bfin*-*linux*]
7409 || [istarget hppa*-*linux*]
7410 || [istarget s390*-*-*]
7411 || [istarget powerpc*-*-*]
7412 || [istarget crisv32-*-*] || [istarget cris-*-*]
7413 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
7414 || [istarget spu-*-*]
7415 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
7416 || [check_effective_target_mips_llsc] } {
7417 set et_sync_int_long_saved 1
7421 verbose "check_effective_target_sync_int_long: returning $et_sync_int_long_saved" 2
7422 return $et_sync_int_long_saved
7425 # Return 1 if the target supports atomic operations on "char" and "short".
7427 proc check_effective_target_sync_char_short { } {
7428 global et_sync_char_short_saved
7430 if [info exists et_sync_char_short_saved] {
7431 verbose "check_effective_target_sync_char_short: using cached result" 2
7433 set et_sync_char_short_saved 0
7434 # This is intentionally powerpc but not rs6000, rs6000 doesn't have the
7435 # load-reserved/store-conditional instructions.
7436 if { [istarget aarch64*-*-*]
7437 || [istarget ia64-*-*]
7438 || [istarget i?86-*-*] || [istarget x86_64-*-*]
7439 || [istarget alpha*-*-*]
7440 || [istarget arm*-*-linux-*]
7441 || ([istarget arm*-*-*]
7442 && [check_effective_target_arm_acq_rel])
7443 || [istarget hppa*-*linux*]
7444 || [istarget s390*-*-*]
7445 || [istarget powerpc*-*-*]
7446 || [istarget crisv32-*-*] || [istarget cris-*-*]
7447 || ([istarget sparc*-*-*] && [check_effective_target_sparc_v9])
7448 || [istarget spu-*-*]
7449 || ([istarget arc*-*-*] && [check_effective_target_arc_atomic])
7450 || [check_effective_target_mips_llsc] } {
7451 set et_sync_char_short_saved 1
7455 verbose "check_effective_target_sync_char_short: returning $et_sync_char_short_saved" 2
7456 return $et_sync_char_short_saved
7459 # Return 1 if the target uses a ColdFire FPU.
7461 proc check_effective_target_coldfire_fpu { } {
7462 return [check_no_compiler_messages coldfire_fpu assembly {
7469 # Return true if this is a uClibc target.
7471 proc check_effective_target_uclibc {} {
7472 return [check_no_compiler_messages uclibc object {
7473 #include <features.h>
7474 #if !defined (__UCLIBC__)
7480 # Return true if this is a uclibc target and if the uclibc feature
7481 # described by __$feature__ is not present.
7483 proc check_missing_uclibc_feature {feature} {
7484 return [check_no_compiler_messages $feature object "
7485 #include <features.h>
7486 #if !defined (__UCLIBC) || defined (__${feature}__)
7492 # Return true if this is a Newlib target.
7494 proc check_effective_target_newlib {} {
7495 return [check_no_compiler_messages newlib object {
7500 # Some newlib versions don't provide a frexpl and instead depend
7501 # on frexp to implement long double conversions in their printf-like
7502 # functions. This leads to broken results. Detect such versions here.
7504 proc check_effective_target_newlib_broken_long_double_io {} {
7505 if { [is-effective-target newlib] && ![is-effective-target frexpl] } {
7511 # Return true if this is NOT a Bionic target.
7513 proc check_effective_target_non_bionic {} {
7514 return [check_no_compiler_messages non_bionic object {
7516 #if defined (__BIONIC__)
7522 # Return true if this target has error.h header.
7524 proc check_effective_target_error_h {} {
7525 return [check_no_compiler_messages error_h object {
7530 # Return true if this target has tgmath.h header.
7532 proc check_effective_target_tgmath_h {} {
7533 return [check_no_compiler_messages tgmath_h object {
7538 # Return true if target's libc supports complex functions.
7540 proc check_effective_target_libc_has_complex_functions {} {
7541 return [check_no_compiler_messages libc_has_complex_functions object {
7542 #include <complex.h>
7547 # (a) an error of a few ULP is expected in string to floating-point
7548 # conversion functions; and
7549 # (b) overflow is not always detected correctly by those functions.
7551 proc check_effective_target_lax_strtofp {} {
7552 # By default, assume that all uClibc targets suffer from this.
7553 return [check_effective_target_uclibc]
7556 # Return 1 if this is a target for which wcsftime is a dummy
7557 # function that always returns 0.
7559 proc check_effective_target_dummy_wcsftime {} {
7560 # By default, assume that all uClibc targets suffer from this.
7561 return [check_effective_target_uclibc]
7564 # Return 1 if constructors with initialization priority arguments are
7565 # supposed on this target.
7567 proc check_effective_target_init_priority {} {
7568 return [check_no_compiler_messages init_priority assembly "
7569 void f() __attribute__((constructor (1000)));
7574 # Return 1 if the target matches the effective target 'arg', 0 otherwise.
7575 # This can be used with any check_* proc that takes no argument and
7576 # returns only 1 or 0. It could be used with check_* procs that take
7577 # arguments with keywords that pass particular arguments.
7579 proc is-effective-target { arg } {
7582 if { ![info exists et_index] } {
7583 # Initialize the effective target index that is used in some
7584 # check_effective_target_* procs.
7587 if { [info procs check_effective_target_${arg}] != [list] } {
7588 set selected [check_effective_target_${arg}]
7591 "vmx_hw" { set selected [check_vmx_hw_available] }
7592 "vsx_hw" { set selected [check_vsx_hw_available] }
7593 "p8vector_hw" { set selected [check_p8vector_hw_available] }
7594 "p9vector_hw" { set selected [check_p9vector_hw_available] }
7595 "p9modulo_hw" { set selected [check_p9modulo_hw_available] }
7596 "ppc_float128_sw" { set selected [check_ppc_float128_sw_available] }
7597 "ppc_float128_hw" { set selected [check_ppc_float128_hw_available] }
7598 "ppc_recip_hw" { set selected [check_ppc_recip_hw_available] }
7599 "ppc_cpu_supports_hw" { set selected [check_ppc_cpu_supports_hw_available] }
7600 "dfp_hw" { set selected [check_dfp_hw_available] }
7601 "htm_hw" { set selected [check_htm_hw_available] }
7602 "named_sections" { set selected [check_named_sections_available] }
7603 "gc_sections" { set selected [check_gc_sections_available] }
7604 "cxa_atexit" { set selected [check_cxa_atexit_available] }
7605 default { error "unknown effective target keyword `$arg'" }
7608 verbose "is-effective-target: $arg $selected" 2
7612 # Return 1 if the argument is an effective-target keyword, 0 otherwise.
7614 proc is-effective-target-keyword { arg } {
7615 if { [info procs check_effective_target_${arg}] != [list] } {
7618 # These have different names for their check_* procs.
7620 "vmx_hw" { return 1 }
7621 "vsx_hw" { return 1 }
7622 "p8vector_hw" { return 1 }
7623 "p9vector_hw" { return 1 }
7624 "p9modulo_hw" { return 1 }
7625 "ppc_float128_sw" { return 1 }
7626 "ppc_float128_hw" { return 1 }
7627 "ppc_recip_hw" { return 1 }
7628 "dfp_hw" { return 1 }
7629 "htm_hw" { return 1 }
7630 "named_sections" { return 1 }
7631 "gc_sections" { return 1 }
7632 "cxa_atexit" { return 1 }
7633 default { return 0 }
7638 # Execute tests for all targets in EFFECTIVE_TARGETS list. Set et_index to
7639 # indicate what target is currently being processed. This is for
7640 # the vectorizer tests, e.g. vect_int, to keep track what target supports
7643 proc et-dg-runtest { runtest testcases flags default-extra-flags } {
7644 global dg-do-what-default
7645 global EFFECTIVE_TARGETS
7648 if { [llength $EFFECTIVE_TARGETS] > 0 } {
7649 foreach target $EFFECTIVE_TARGETS {
7650 set target_flags $flags
7651 set dg-do-what-default compile
7652 set et_index [lsearch -exact $EFFECTIVE_TARGETS $target]
7653 if { [info procs add_options_for_${target}] != [list] } {
7654 set target_flags [add_options_for_${target} "$flags"]
7656 if { [info procs check_effective_target_${target}_runtime]
7657 != [list] && [check_effective_target_${target}_runtime] } {
7658 set dg-do-what-default run
7660 $runtest $testcases $target_flags ${default-extra-flags}
7664 $runtest $testcases $flags ${default-extra-flags}
7668 # Return 1 if a target matches the target in EFFECTIVE_TARGETS at index
7669 # et_index, 0 otherwise.
7671 proc et-is-effective-target { target } {
7672 global EFFECTIVE_TARGETS
7675 if { [llength $EFFECTIVE_TARGETS] > $et_index
7676 && [lindex $EFFECTIVE_TARGETS $et_index] == $target } {
7682 # Return 1 if target default to short enums
7684 proc check_effective_target_short_enums { } {
7685 return [check_no_compiler_messages short_enums assembly {
7687 int s[sizeof (enum foo) == 1 ? 1 : -1];
7691 # Return 1 if target supports merging string constants at link time.
7693 proc check_effective_target_string_merging { } {
7694 return [check_no_messages_and_pattern string_merging \
7695 "rodata\\.str" assembly {
7696 const char *var = "String";
7700 # Return 1 if target has the basic signed and unsigned types in
7701 # <stdint.h>, 0 otherwise. This will be obsolete when GCC ensures a
7702 # working <stdint.h> for all targets.
7704 proc check_effective_target_stdint_types { } {
7705 return [check_no_compiler_messages stdint_types assembly {
7707 int8_t a; int16_t b; int32_t c; int64_t d;
7708 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
7712 # Return 1 if target has the basic signed and unsigned types in
7713 # <inttypes.h>, 0 otherwise. This is for tests that GCC's notions of
7714 # these types agree with those in the header, as some systems have
7715 # only <inttypes.h>.
7717 proc check_effective_target_inttypes_types { } {
7718 return [check_no_compiler_messages inttypes_types assembly {
7719 #include <inttypes.h>
7720 int8_t a; int16_t b; int32_t c; int64_t d;
7721 uint8_t e; uint16_t f; uint32_t g; uint64_t h;
7725 # Return 1 if programs are intended to be run on a simulator
7726 # (i.e. slowly) rather than hardware (i.e. fast).
7728 proc check_effective_target_simulator { } {
7730 # All "src/sim" simulators set this one.
7731 if [board_info target exists is_simulator] {
7732 return [board_info target is_simulator]
7735 # The "sid" simulators don't set that one, but at least they set
7737 if [board_info target exists slow_simulator] {
7738 return [board_info target slow_simulator]
7744 # Return 1 if programs are intended to be run on hardware rather than
7747 proc check_effective_target_hw { } {
7749 # All "src/sim" simulators set this one.
7750 if [board_info target exists is_simulator] {
7751 if [board_info target is_simulator] {
7758 # The "sid" simulators don't set that one, but at least they set
7760 if [board_info target exists slow_simulator] {
7761 if [board_info target slow_simulator] {
7771 # Return 1 if the target is a VxWorks kernel.
7773 proc check_effective_target_vxworks_kernel { } {
7774 return [check_no_compiler_messages vxworks_kernel assembly {
7775 #if !defined __vxworks || defined __RTP__
7781 # Return 1 if the target is a VxWorks RTP.
7783 proc check_effective_target_vxworks_rtp { } {
7784 return [check_no_compiler_messages vxworks_rtp assembly {
7785 #if !defined __vxworks || !defined __RTP__
7791 # Return 1 if the target is expected to provide wide character support.
7793 proc check_effective_target_wchar { } {
7794 if {[check_missing_uclibc_feature UCLIBC_HAS_WCHAR]} {
7797 return [check_no_compiler_messages wchar assembly {
7802 # Return 1 if the target has <pthread.h>.
7804 proc check_effective_target_pthread_h { } {
7805 return [check_no_compiler_messages pthread_h assembly {
7806 #include <pthread.h>
7810 # Return 1 if the target can truncate a file from a file-descriptor,
7811 # as used by libgfortran/io/unix.c:fd_truncate; i.e. ftruncate or
7812 # chsize. We test for a trivially functional truncation; no stubs.
7813 # As libgfortran uses _FILE_OFFSET_BITS 64, we do too; it'll cause a
7814 # different function to be used.
7816 proc check_effective_target_fd_truncate { } {
7818 #define _FILE_OFFSET_BITS 64
7825 FILE *f = fopen ("tst.tmp", "wb");
7827 const char t[] = "test writing more than ten characters";
7831 write (fd, t, sizeof (t) - 1);
7833 if (ftruncate (fd, 10) != 0)
7842 f = fopen ("tst.tmp", "rb");
7843 if (fread (s, 1, sizeof (s), f) != 10 || strncmp (s, t, 10) != 0)
7851 if { [check_runtime ftruncate $prog] } {
7855 regsub "ftruncate" $prog "chsize" prog
7856 return [check_runtime chsize $prog]
7859 # Add to FLAGS all the target-specific flags needed to access the c99 runtime.
7861 proc add_options_for_c99_runtime { flags } {
7862 if { [istarget *-*-solaris2*] } {
7863 return "$flags -std=c99"
7865 if { [istarget powerpc-*-darwin*] } {
7866 return "$flags -mmacosx-version-min=10.3"
7871 # Add to FLAGS all the target-specific flags needed to enable
7872 # full IEEE compliance mode.
7874 proc add_options_for_ieee { flags } {
7875 if { [istarget alpha*-*-*]
7876 || [istarget sh*-*-*] } {
7877 return "$flags -mieee"
7879 if { [istarget rx-*-*] } {
7880 return "$flags -mnofpu"
7885 if {![info exists flags_to_postpone]} {
7886 set flags_to_postpone ""
7889 # Add to FLAGS the flags needed to enable functions to bind locally
7890 # when using pic/PIC passes in the testsuite.
7891 proc add_options_for_bind_pic_locally { flags } {
7892 global flags_to_postpone
7894 # Instead of returning 'flags' with the -fPIE or -fpie appended, we save it
7895 # in 'flags_to_postpone' and append it later in gcc_target_compile procedure in
7896 # order to make sure that the multilib_flags doesn't override this.
7898 if {[check_no_compiler_messages using_pic2 assembly {
7903 set flags_to_postpone "-fPIE"
7906 if {[check_no_compiler_messages using_pic1 assembly {
7911 set flags_to_postpone "-fpie"
7917 # Add to FLAGS the flags needed to enable 64-bit vectors.
7919 proc add_options_for_double_vectors { flags } {
7920 if [is-effective-target arm_neon_ok] {
7921 return "$flags -mvectorize-with-neon-double"
7927 # Add to FLAGS the flags needed to define the STACK_SIZE macro.
7929 proc add_options_for_stack_size { flags } {
7930 if [is-effective-target stack_size] {
7931 set stack_size [dg-effective-target-value stack_size]
7932 return "$flags -DSTACK_SIZE=$stack_size"
7938 # Return 1 if the target provides a full C99 runtime.
7940 proc check_effective_target_c99_runtime { } {
7941 return [check_cached_effective_target c99_runtime {
7944 set file [open "$srcdir/gcc.dg/builtins-config.h"]
7945 set contents [read $file]
7948 #ifndef HAVE_C99_RUNTIME
7949 #error !HAVE_C99_RUNTIME
7952 check_no_compiler_messages_nocache c99_runtime assembly \
7953 $contents [add_options_for_c99_runtime ""]
7957 # Return 1 if target wchar_t is at least 4 bytes.
7959 proc check_effective_target_4byte_wchar_t { } {
7960 return [check_no_compiler_messages 4byte_wchar_t object {
7961 int dummy[sizeof (__WCHAR_TYPE__) >= 4 ? 1 : -1];
7965 # Return 1 if the target supports automatic stack alignment.
7967 proc check_effective_target_automatic_stack_alignment { } {
7968 # Ordinarily x86 supports automatic stack alignment ...
7969 if { [istarget i?86*-*-*] || [istarget x86_64-*-*] } then {
7970 if { [istarget *-*-mingw*] || [istarget *-*-cygwin*] } {
7971 # ... except Win64 SEH doesn't. Succeed for Win32 though.
7972 return [check_effective_target_ilp32];
7979 # Return true if we are compiling for AVX target.
7981 proc check_avx_available { } {
7982 if { [check_no_compiler_messages avx_available assembly {
7992 # Return true if 32- and 16-bytes vectors are available.
7994 proc check_effective_target_vect_sizes_32B_16B { } {
7995 return [expr { [available_vector_sizes] == [list 256 128] }]
7998 # Return true if 16- and 8-bytes vectors are available.
8000 proc check_effective_target_vect_sizes_16B_8B { } {
8001 if { [check_avx_available]
8002 || [is-effective-target arm_neon]
8003 || [istarget aarch64*-*-*] } {
8011 # Return true if 128-bits vectors are preferred even if 256-bits vectors
8014 proc check_prefer_avx128 { } {
8015 if ![check_avx_available] {
8018 return [check_no_messages_and_pattern avx_explicit "xmm" assembly {
8019 float a[1024],b[1024],c[1024];
8020 void foo (void) { int i; for (i = 0; i < 1024; i++) a[i]=b[i]+c[i];}
8021 } "-O2 -ftree-vectorize"]
8025 # Return 1 if avx512f instructions can be compiled.
8027 proc check_effective_target_avx512f { } {
8028 return [check_no_compiler_messages avx512f object {
8029 typedef double __m512d __attribute__ ((__vector_size__ (64)));
8030 typedef double __m128d __attribute__ ((__vector_size__ (16)));
8032 __m512d _mm512_add (__m512d a)
8034 return __builtin_ia32_addpd512_mask (a, a, a, 1, 4);
8037 __m128d _mm128_add (__m128d a)
8039 return __builtin_ia32_addsd_round (a, a, 8);
8042 __m128d _mm128_getmant (__m128d a)
8044 return __builtin_ia32_getmantsd_round (a, a, 0, 8);
8049 # Return 1 if avx instructions can be compiled.
8051 proc check_effective_target_avx { } {
8052 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8055 return [check_no_compiler_messages avx object {
8056 void _mm256_zeroall (void)
8058 __builtin_ia32_vzeroall ();
8063 # Return 1 if avx2 instructions can be compiled.
8064 proc check_effective_target_avx2 { } {
8065 return [check_no_compiler_messages avx2 object {
8066 typedef long long __v4di __attribute__ ((__vector_size__ (32)));
8068 mm256_is32_andnotsi256 (__v4di __X, __v4di __Y)
8070 return __builtin_ia32_andnotsi256 (__X, __Y);
8075 # Return 1 if sse instructions can be compiled.
8076 proc check_effective_target_sse { } {
8077 return [check_no_compiler_messages sse object {
8080 __builtin_ia32_stmxcsr ();
8086 # Return 1 if sse2 instructions can be compiled.
8087 proc check_effective_target_sse2 { } {
8088 return [check_no_compiler_messages sse2 object {
8089 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8091 __m128i _mm_srli_si128 (__m128i __A, int __N)
8093 return (__m128i)__builtin_ia32_psrldqi128 (__A, 8);
8098 # Return 1 if sse4.1 instructions can be compiled.
8099 proc check_effective_target_sse4 { } {
8100 return [check_no_compiler_messages sse4.1 object {
8101 typedef long long __m128i __attribute__ ((__vector_size__ (16)));
8102 typedef int __v4si __attribute__ ((__vector_size__ (16)));
8104 __m128i _mm_mullo_epi32 (__m128i __X, __m128i __Y)
8106 return (__m128i) __builtin_ia32_pmulld128 ((__v4si)__X,
8112 # Return 1 if F16C instructions can be compiled.
8114 proc check_effective_target_f16c { } {
8115 return [check_no_compiler_messages f16c object {
8116 #include "immintrin.h"
8118 foo (unsigned short val)
8120 return _cvtsh_ss (val);
8125 # Return 1 if C wchar_t type is compatible with char16_t.
8127 proc check_effective_target_wchar_t_char16_t_compatible { } {
8128 return [check_no_compiler_messages wchar_t_char16_t object {
8130 __CHAR16_TYPE__ *p16 = &wc;
8131 char t[(((__CHAR16_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
8135 # Return 1 if C wchar_t type is compatible with char32_t.
8137 proc check_effective_target_wchar_t_char32_t_compatible { } {
8138 return [check_no_compiler_messages wchar_t_char32_t object {
8140 __CHAR32_TYPE__ *p32 = &wc;
8141 char t[(((__CHAR32_TYPE__) -1) < 0 == ((__WCHAR_TYPE__) -1) < 0) ? 1 : -1];
8145 # Return 1 if pow10 function exists.
8147 proc check_effective_target_pow10 { } {
8148 return [check_runtime pow10 {
8158 # Return 1 if frexpl function exists.
8160 proc check_effective_target_frexpl { } {
8161 return [check_runtime frexpl {
8166 x = frexpl (5.0, &y);
8173 # Return 1 if issignaling function exists.
8174 proc check_effective_target_issignaling {} {
8175 return [check_runtime issignaling {
8180 return issignaling (0.0);
8185 # Return 1 if current options generate DFP instructions, 0 otherwise.
8186 proc check_effective_target_hard_dfp {} {
8187 return [check_no_messages_and_pattern hard_dfp "!adddd3" assembly {
8188 typedef float d64 __attribute__((mode(DD)));
8190 void foo (void) { z = x + y; }
8194 # Return 1 if string.h and wchar.h headers provide C++ requires overloads
8195 # for strchr etc. functions.
8197 proc check_effective_target_correct_iso_cpp_string_wchar_protos { } {
8198 return [check_no_compiler_messages correct_iso_cpp_string_wchar_protos assembly {
8201 #if !defined(__cplusplus) \
8202 || !defined(__CORRECT_ISO_CPP_STRING_H_PROTO) \
8203 || !defined(__CORRECT_ISO_CPP_WCHAR_H_PROTO)
8204 ISO C++ correct string.h and wchar.h protos not supported.
8211 # Return 1 if GNU as is used.
8213 proc check_effective_target_gas { } {
8214 global use_gas_saved
8217 if {![info exists use_gas_saved]} {
8218 # Check if the as used by gcc is GNU as.
8219 set gcc_as [lindex [${tool}_target_compile "-print-prog-name=as" "" "none" ""] 0]
8220 # Provide /dev/null as input, otherwise gas times out reading from
8222 set status [remote_exec host "$gcc_as" "-v /dev/null"]
8223 set as_output [lindex $status 1]
8224 if { [ string first "GNU" $as_output ] >= 0 } {
8230 return $use_gas_saved
8233 # Return 1 if GNU ld is used.
8235 proc check_effective_target_gld { } {
8236 global use_gld_saved
8239 if {![info exists use_gld_saved]} {
8240 # Check if the ld used by gcc is GNU ld.
8241 set gcc_ld [lindex [${tool}_target_compile "-print-prog-name=ld" "" "none" ""] 0]
8242 set status [remote_exec host "$gcc_ld" "--version"]
8243 set ld_output [lindex $status 1]
8244 if { [ string first "GNU" $ld_output ] >= 0 } {
8250 return $use_gld_saved
8253 # Return 1 if the compiler has been configure with link-time optimization
8256 proc check_effective_target_lto { } {
8257 if { [istarget nvptx-*-*] } {
8260 return [check_no_compiler_messages lto object {
8265 # Return 1 if -mx32 -maddress-mode=short can compile, 0 otherwise.
8267 proc check_effective_target_maybe_x32 { } {
8268 return [check_no_compiler_messages maybe_x32 object {
8270 } "-mx32 -maddress-mode=short"]
8273 # Return 1 if this target supports the -fsplit-stack option, 0
8276 proc check_effective_target_split_stack {} {
8277 return [check_no_compiler_messages split_stack object {
8282 # Return 1 if this target supports the -masm=intel option, 0
8285 proc check_effective_target_masm_intel {} {
8286 return [check_no_compiler_messages masm_intel object {
8287 extern void abort (void);
8291 # Return 1 if the language for the compiler under test is C.
8293 proc check_effective_target_c { } {
8295 if [string match $tool "gcc"] {
8301 # Return 1 if the language for the compiler under test is C++.
8303 proc check_effective_target_c++ { } {
8305 if { [string match $tool "g++"] || [string match $tool "libstdc++"] } {
8311 set cxx_default "c++14"
8312 # Check whether the current active language standard supports the features
8313 # of C++11/C++14 by checking for the presence of one of the -std flags.
8314 # This assumes that the default for the compiler is $cxx_default, and that
8315 # there will never be multiple -std= arguments on the command line.
8316 proc check_effective_target_c++11_only { } {
8318 if ![check_effective_target_c++] {
8321 if [check-flags { { } { } { -std=c++0x -std=gnu++0x -std=c++11 -std=gnu++11 } }] {
8324 if { $cxx_default == "c++11" && [check-flags { { } { } { } { -std=* } }] } {
8329 proc check_effective_target_c++11 { } {
8330 if [check_effective_target_c++11_only] {
8333 return [check_effective_target_c++14]
8335 proc check_effective_target_c++11_down { } {
8336 if ![check_effective_target_c++] {
8339 return [expr ![check_effective_target_c++14] ]
8342 proc check_effective_target_c++14_only { } {
8344 if ![check_effective_target_c++] {
8347 if [check-flags { { } { } { -std=c++14 -std=gnu++14 -std=c++14 -std=gnu++14 } }] {
8350 if { $cxx_default == "c++14" && [check-flags { { } { } { } { -std=* } }] } {
8356 proc check_effective_target_c++14 { } {
8357 if [check_effective_target_c++14_only] {
8360 return [check_effective_target_c++17]
8362 proc check_effective_target_c++14_down { } {
8363 if ![check_effective_target_c++] {
8366 return [expr ![check_effective_target_c++17] ]
8369 proc check_effective_target_c++98_only { } {
8371 if ![check_effective_target_c++] {
8374 if [check-flags { { } { } { -std=c++98 -std=gnu++98 -std=c++03 -std=gnu++03 } }] {
8377 if { $cxx_default == "c++98" && [check-flags { { } { } { } { -std=* } }] } {
8383 proc check_effective_target_c++17_only { } {
8385 if ![check_effective_target_c++] {
8388 if [check-flags { { } { } { -std=c++17 -std=gnu++17 -std=c++1z -std=gnu++1z } }] {
8391 if { $cxx_default == "c++17" && [check-flags { { } { } { } { -std=* } }] } {
8397 proc check_effective_target_c++17 { } {
8398 if [check_effective_target_c++17_only] {
8401 return [check_effective_target_c++2a]
8403 proc check_effective_target_c++17_down { } {
8404 if ![check_effective_target_c++] {
8407 return [expr ![check_effective_target_c++2a] ]
8410 proc check_effective_target_c++2a_only { } {
8412 if ![check_effective_target_c++] {
8415 if [check-flags { { } { } { -std=c++2a -std=gnu++2a } }] {
8418 if { $cxx_default == "c++20" && [check-flags { { } { } { } { -std=* } }] } {
8423 proc check_effective_target_c++2a { } {
8424 return [check_effective_target_c++2a_only]
8427 # Check for C++ Concepts TS support, i.e. -fconcepts flag.
8428 proc check_effective_target_concepts { } {
8429 return [check-flags { "" { } { -fconcepts } }]
8432 # Return 1 if expensive testcases should be run.
8434 proc check_effective_target_run_expensive_tests { } {
8435 if { [getenv GCC_TEST_RUN_EXPENSIVE] != "" } {
8441 # Returns 1 if "mempcpy" is available on the target system.
8443 proc check_effective_target_mempcpy {} {
8444 return [check_function_available "mempcpy"]
8447 # Returns 1 if "stpcpy" is available on the target system.
8449 proc check_effective_target_stpcpy {} {
8450 return [check_function_available "stpcpy"]
8453 # Check whether the vectorizer tests are supported by the target and
8454 # append additional target-dependent compile flags to DEFAULT_VECTCFLAGS.
8455 # If a port wants to execute the tests more than once it should append
8456 # the supported target to EFFECTIVE_TARGETS instead, and the compile flags
8457 # will be added by a call to add_options_for_<target>.
8458 # Set dg-do-what-default to either compile or run, depending on target
8459 # capabilities. Do not set this if the supported target is appended to
8460 # EFFECTIVE_TARGETS. Flags and this variable will be set by et-dg-runtest
8461 # automatically. Return the number of effective targets if vectorizer tests
8462 # are supported, 0 otherwise.
8464 proc check_vect_support_and_set_flags { } {
8465 global DEFAULT_VECTCFLAGS
8466 global dg-do-what-default
8467 global EFFECTIVE_TARGETS
8469 if [istarget powerpc-*paired*] {
8470 lappend DEFAULT_VECTCFLAGS "-mpaired"
8471 if [check_750cl_hw_available] {
8472 set dg-do-what-default run
8474 set dg-do-what-default compile
8476 } elseif [istarget powerpc*-*-*] {
8477 # Skip targets not supporting -maltivec.
8478 if ![is-effective-target powerpc_altivec_ok] {
8482 lappend DEFAULT_VECTCFLAGS "-maltivec"
8483 if [check_p9vector_hw_available] {
8484 lappend DEFAULT_VECTCFLAGS "-mpower9-vector"
8485 } elseif [check_p8vector_hw_available] {
8486 lappend DEFAULT_VECTCFLAGS "-mpower8-vector"
8487 } elseif [check_vsx_hw_available] {
8488 lappend DEFAULT_VECTCFLAGS "-mvsx" "-mno-allow-movmisalign"
8491 if [check_vmx_hw_available] {
8492 set dg-do-what-default run
8494 if [is-effective-target ilp32] {
8495 # Specify a cpu that supports VMX for compile-only tests.
8496 lappend DEFAULT_VECTCFLAGS "-mcpu=970"
8498 set dg-do-what-default compile
8500 } elseif { [istarget spu-*-*] } {
8501 set dg-do-what-default run
8502 } elseif { [istarget i?86-*-*] || [istarget x86_64-*-*] } {
8503 lappend DEFAULT_VECTCFLAGS "-msse2"
8504 if { [check_effective_target_sse2_runtime] } {
8505 set dg-do-what-default run
8507 set dg-do-what-default compile
8509 } elseif { [istarget mips*-*-*]
8510 && [check_effective_target_nomips16] } {
8511 if { [check_effective_target_mpaired_single] } {
8512 lappend EFFECTIVE_TARGETS mpaired_single
8514 if { [check_effective_target_mips_loongson] } {
8515 lappend EFFECTIVE_TARGETS mips_loongson
8517 if { [check_effective_target_mips_msa] } {
8518 lappend EFFECTIVE_TARGETS mips_msa
8520 return [llength $EFFECTIVE_TARGETS]
8521 } elseif [istarget sparc*-*-*] {
8522 lappend DEFAULT_VECTCFLAGS "-mcpu=ultrasparc" "-mvis"
8523 if [check_effective_target_ultrasparc_hw] {
8524 set dg-do-what-default run
8526 set dg-do-what-default compile
8528 } elseif [istarget alpha*-*-*] {
8529 # Alpha's vectorization capabilities are extremely limited.
8530 # It's more effort than its worth disabling all of the tests
8531 # that it cannot pass. But if you actually want to see what
8532 # does work, command out the return.
8535 lappend DEFAULT_VECTCFLAGS "-mmax"
8536 if [check_alpha_max_hw_available] {
8537 set dg-do-what-default run
8539 set dg-do-what-default compile
8541 } elseif [istarget ia64-*-*] {
8542 set dg-do-what-default run
8543 } elseif [is-effective-target arm_neon_ok] {
8544 eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
8545 # NEON does not support denormals, so is not used for vectorization by
8546 # default to avoid loss of precision. We must pass -ffast-math to test
8547 # vectorization of float operations.
8548 lappend DEFAULT_VECTCFLAGS "-ffast-math"
8549 if [is-effective-target arm_neon_hw] {
8550 set dg-do-what-default run
8552 set dg-do-what-default compile
8554 } elseif [istarget "aarch64*-*-*"] {
8555 set dg-do-what-default run
8556 } elseif [istarget s390*-*-*] {
8557 # The S/390 backend set a default of 2 for that value.
8558 # Override it to have the same situation as with other
8560 lappend DEFAULT_VECTCFLAGS "--param" "min-vect-loop-bound=1"
8561 lappend DEFAULT_VECTCFLAGS "--param" "max-unrolled-insns=200"
8562 lappend DEFAULT_VECTCFLAGS "--param" "max-unroll-times=8"
8563 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peeled-insns=200"
8564 lappend DEFAULT_VECTCFLAGS "--param" "max-completely-peel-times=16"
8565 if [check_effective_target_s390_vxe] {
8566 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
8567 set dg-do-what-default run
8568 } elseif [check_effective_target_s390_vx] {
8569 lappend DEFAULT_VECTCFLAGS "-march=z13" "-mzarch"
8570 set dg-do-what-default run
8572 lappend DEFAULT_VECTCFLAGS "-march=z14" "-mzarch"
8573 set dg-do-what-default compile
8582 # Return 1 if the target does *not* require strict alignment.
8584 proc check_effective_target_non_strict_align {} {
8586 # On ARM, the default is to use STRICT_ALIGNMENT, but there
8587 # are interfaces defined for misaligned access and thus
8588 # depending on the architecture levels unaligned access is
8590 if [istarget "arm*-*-*"] {
8591 return [check_effective_target_arm_unaligned]
8594 return [check_no_compiler_messages non_strict_align assembly {
8596 typedef char __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))) c;
8598 void foo(void) { z = (c *) y; }
8602 # Return 1 if the target has <ucontext.h>.
8604 proc check_effective_target_ucontext_h { } {
8605 return [check_no_compiler_messages ucontext_h assembly {
8606 #include <ucontext.h>
8610 proc check_effective_target_aarch64_tiny { } {
8611 if { [istarget aarch64*-*-*] } {
8612 return [check_no_compiler_messages aarch64_tiny object {
8613 #ifdef __AARCH64_CMODEL_TINY__
8616 #error target not AArch64 tiny code model
8624 # Create functions to check that the AArch64 assembler supports the
8625 # various architecture extensions via the .arch_extension pseudo-op.
8627 foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve"} {
8628 eval [string map [list FUNC $aarch64_ext] {
8629 proc check_effective_target_aarch64_asm_FUNC_ok { } {
8630 if { [istarget aarch64*-*-*] } {
8631 return [check_no_compiler_messages aarch64_FUNC_assembler object {
8632 __asm__ (".arch_extension FUNC");
8633 } "-march=armv8-a+FUNC"]
8641 proc check_effective_target_aarch64_small { } {
8642 if { [istarget aarch64*-*-*] } {
8643 return [check_no_compiler_messages aarch64_small object {
8644 #ifdef __AARCH64_CMODEL_SMALL__
8647 #error target not AArch64 small code model
8655 proc check_effective_target_aarch64_large { } {
8656 if { [istarget aarch64*-*-*] } {
8657 return [check_no_compiler_messages aarch64_large object {
8658 #ifdef __AARCH64_CMODEL_LARGE__
8661 #error target not AArch64 large code model
8670 # Return 1 if this is a reduced AVR Tiny core. Such cores have different
8671 # register set, instruction set, addressing capabilities and ABI.
8673 proc check_effective_target_avr_tiny { } {
8674 if { [istarget avr*-*-*] } {
8675 return [check_no_compiler_messages avr_tiny object {
8679 #error target not a reduced AVR Tiny core
8687 # Return 1 if <fenv.h> is available with all the standard IEEE
8688 # exceptions and floating-point exceptions are raised by arithmetic
8689 # operations. (If the target requires special options for "inexact"
8690 # exceptions, those need to be specified in the testcases.)
8692 proc check_effective_target_fenv_exceptions {} {
8693 return [check_runtime fenv_exceptions {
8696 #ifndef FE_DIVBYZERO
8697 # error Missing FE_DIVBYZERO
8700 # error Missing FE_INEXACT
8703 # error Missing FE_INVALID
8706 # error Missing FE_OVERFLOW
8708 #ifndef FE_UNDERFLOW
8709 # error Missing FE_UNDERFLOW
8711 volatile float a = 0.0f, r;
8716 if (fetestexcept (FE_INVALID))
8721 } [add_options_for_ieee "-std=gnu99"]]
8724 proc check_effective_target_tiny {} {
8725 global et_target_tiny_saved
8727 if [info exists et_target_tiny_saved] {
8728 verbose "check_effective_target_tiny: using cached result" 2
8730 set et_target_tiny_saved 0
8731 if { [istarget aarch64*-*-*]
8732 && [check_effective_target_aarch64_tiny] } {
8733 set et_target_tiny_saved 1
8735 if { [istarget avr-*-*]
8736 && [check_effective_target_avr_tiny] } {
8737 set et_target_tiny_saved 1
8741 return $et_target_tiny_saved
8744 # Return 1 if LOGICAL_OP_NON_SHORT_CIRCUIT is set to 0 for the current target.
8746 proc check_effective_target_logical_op_short_circuit {} {
8747 if { [istarget mips*-*-*]
8748 || [istarget arc*-*-*]
8749 || [istarget avr*-*-*]
8750 || [istarget crisv32-*-*] || [istarget cris-*-*]
8751 || [istarget mmix-*-*]
8752 || [istarget s390*-*-*]
8753 || [istarget powerpc*-*-*]
8754 || [istarget nios2*-*-*]
8755 || [istarget riscv*-*-*]
8756 || [istarget visium-*-*]
8757 || [check_effective_target_arm_cortex_m] } {
8763 # Return 1 if the target supports -mbranch-cost=N option.
8765 proc check_effective_target_branch_cost {} {
8766 if { [ istarget arm*-*-*]
8767 || [istarget avr*-*-*]
8768 || [istarget epiphany*-*-*]
8769 || [istarget frv*-*-*]
8770 || [istarget i?86-*-*] || [istarget x86_64-*-*]
8771 || [istarget mips*-*-*]
8772 || [istarget s390*-*-*]
8773 || [istarget riscv*-*-*]
8774 || [istarget sh*-*-*]
8775 || [istarget spu*-*-*] } {
8781 # Record that dg-final test TEST requires convential compilation.
8783 proc force_conventional_output_for { test } {
8784 if { [info proc $test] == "" } {
8785 perror "$test does not exist"
8788 proc ${test}_required_options {} {
8789 global gcc_force_conventional_output
8790 return $gcc_force_conventional_output
8794 # Return 1 if the x86-64 target supports PIE with copy reloc, 0
8795 # otherwise. Cache the result.
8797 proc check_effective_target_pie_copyreloc { } {
8798 global pie_copyreloc_available_saved
8800 global GCC_UNDER_TEST
8802 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8806 # Need auto-host.h to check linker support.
8807 if { ![file exists ../../auto-host.h ] } {
8811 if [info exists pie_copyreloc_available_saved] {
8812 verbose "check_effective_target_pie_copyreloc returning saved $pie_copyreloc_available_saved" 2
8814 # Set up and compile to see if linker supports PIE with copy
8815 # reloc. Include the current process ID in the file names to
8816 # prevent conflicts with invocations for multiple testsuites.
8821 set f [open $src "w"]
8822 puts $f "#include \"../../auto-host.h\""
8823 puts $f "#if HAVE_LD_PIE_COPYRELOC == 0"
8824 puts $f "# error Linker does not support PIE with copy reloc."
8828 verbose "check_effective_target_pie_copyreloc compiling testfile $src" 2
8829 set lines [${tool}_target_compile $src $obj object ""]
8834 if [string match "" $lines] then {
8835 verbose "check_effective_target_pie_copyreloc testfile compilation passed" 2
8836 set pie_copyreloc_available_saved 1
8838 verbose "check_effective_target_pie_copyreloc testfile compilation failed" 2
8839 set pie_copyreloc_available_saved 0
8843 return $pie_copyreloc_available_saved
8846 # Return 1 if the x86 target supports R_386_GOT32X relocation, 0
8847 # otherwise. Cache the result.
8849 proc check_effective_target_got32x_reloc { } {
8850 global got32x_reloc_available_saved
8852 global GCC_UNDER_TEST
8854 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8858 # Need auto-host.h to check linker support.
8859 if { ![file exists ../../auto-host.h ] } {
8863 if [info exists got32x_reloc_available_saved] {
8864 verbose "check_effective_target_got32x_reloc returning saved $got32x_reloc_available_saved" 2
8866 # Include the current process ID in the file names to prevent
8867 # conflicts with invocations for multiple testsuites.
8869 set src got32x[pid].c
8870 set obj got32x[pid].o
8872 set f [open $src "w"]
8873 puts $f "#include \"../../auto-host.h\""
8874 puts $f "#if HAVE_AS_IX86_GOT32X == 0"
8875 puts $f "# error Assembler does not support R_386_GOT32X."
8879 verbose "check_effective_target_got32x_reloc compiling testfile $src" 2
8880 set lines [${tool}_target_compile $src $obj object ""]
8885 if [string match "" $lines] then {
8886 verbose "check_effective_target_got32x_reloc testfile compilation passed" 2
8887 set got32x_reloc_available_saved 1
8889 verbose "check_effective_target_got32x_reloc testfile compilation failed" 2
8890 set got32x_reloc_available_saved 0
8894 return $got32x_reloc_available_saved
8897 # Return 1 if the x86 target supports calling ___tls_get_addr via GOT,
8898 # 0 otherwise. Cache the result.
8900 proc check_effective_target_tls_get_addr_via_got { } {
8901 global tls_get_addr_via_got_available_saved
8903 global GCC_UNDER_TEST
8905 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
8909 # Need auto-host.h to check linker support.
8910 if { ![file exists ../../auto-host.h ] } {
8914 if [info exists tls_get_addr_via_got_available_saved] {
8915 verbose "check_effective_target_tls_get_addr_via_got returning saved $tls_get_addr_via_got_available_saved" 2
8917 # Include the current process ID in the file names to prevent
8918 # conflicts with invocations for multiple testsuites.
8920 set src tls_get_addr_via_got[pid].c
8921 set obj tls_get_addr_via_got[pid].o
8923 set f [open $src "w"]
8924 puts $f "#include \"../../auto-host.h\""
8925 puts $f "#if HAVE_AS_IX86_TLS_GET_ADDR_GOT == 0"
8926 puts $f "# error Assembler/linker do not support calling ___tls_get_addr via GOT."
8930 verbose "check_effective_target_tls_get_addr_via_got compiling testfile $src" 2
8931 set lines [${tool}_target_compile $src $obj object ""]
8936 if [string match "" $lines] then {
8937 verbose "check_effective_target_tls_get_addr_via_got testfile compilation passed" 2
8938 set tls_get_addr_via_got_available_saved 1
8940 verbose "check_effective_target_tls_get_addr_via_got testfile compilation failed" 2
8941 set tls_get_addr_via_got_available_saved 0
8945 return $tls_get_addr_via_got_available_saved
8948 # Return 1 if the target uses comdat groups.
8950 proc check_effective_target_comdat_group {} {
8951 return [check_no_messages_and_pattern comdat_group "\.section\[^\n\r]*,comdat" assembly {
8953 inline int foo () { return 1; }
8958 # Return 1 if target supports __builtin_eh_return
8959 proc check_effective_target_builtin_eh_return { } {
8960 return [check_no_compiler_messages builtin_eh_return object {
8961 void test (long l, void *p)
8963 __builtin_eh_return (l, p);
8968 # Return 1 if the target supports max reduction for vectors.
8970 proc check_effective_target_vect_max_reduc { } {
8971 if { [istarget aarch64*-*-*] || [is-effective-target arm_neon] } {
8977 # Return 1 if there is an nvptx offload compiler.
8979 proc check_effective_target_offload_nvptx { } {
8980 return [check_no_compiler_messages offload_nvptx object {
8981 int main () {return 0;}
8982 } "-foffload=nvptx-none" ]
8985 # Return 1 if the compiler has been configured with hsa offloading.
8987 proc check_effective_target_offload_hsa { } {
8988 return [check_no_compiler_messages offload_hsa assembly {
8989 int main () {return 0;}
8993 # Return 1 if the target support -fprofile-update=atomic
8994 proc check_effective_target_profile_update_atomic {} {
8995 return [check_no_compiler_messages profile_update_atomic assembly {
8996 int main (void) { return 0; }
8997 } "-fprofile-update=atomic -fprofile-generate"]
9000 # Return 1 if vector (va - vector add) instructions are understood by
9001 # the assembler and can be executed. This also covers checking for
9002 # the VX kernel feature. A kernel without that feature does not
9003 # enable the vector facility and the following check will die with a
9005 proc check_effective_target_s390_vx { } {
9006 if ![istarget s390*-*-*] then {
9010 return [check_runtime s390_check_vx {
9013 asm ("va %%v24, %%v26, %%v28, 3" : : : "v24", "v26", "v28");
9016 } "-march=z13 -mzarch" ]
9019 # Same as above but for the z14 vector enhancement facility. Test
9020 # is performed with the vector nand instruction.
9021 proc check_effective_target_s390_vxe { } {
9022 if ![istarget s390*-*-*] then {
9026 return [check_runtime s390_check_vxe {
9029 asm ("vnn %%v24, %%v26, %%v28" : : : "v24", "v26", "v28");
9032 } "-march=z14 -mzarch" ]
9035 #For versions of ARM architectures that have hardware div insn,
9036 #disable the divmod transform
9038 proc check_effective_target_arm_divmod_simode { } {
9039 return [check_no_compiler_messages arm_divmod assembly {
9040 #ifdef __ARM_ARCH_EXT_IDIV__
9047 # Return 1 if target supports divmod hardware insn or divmod libcall.
9049 proc check_effective_target_divmod { } {
9050 #TODO: Add checks for all targets that have either hardware divmod insn
9051 # or define libfunc for divmod.
9052 if { [istarget arm*-*-*]
9053 || [istarget i?86-*-*] || [istarget x86_64-*-*] } {
9059 # Return 1 if target supports divmod for SImode. The reason for
9060 # separating this from check_effective_target_divmod is that
9061 # some versions of ARM architecture define div instruction
9062 # only for simode, and for these archs, we do not want to enable
9063 # divmod transform for simode.
9065 proc check_effective_target_divmod_simode { } {
9066 if { [istarget arm*-*-*] } {
9067 return [check_effective_target_arm_divmod_simode]
9070 return [check_effective_target_divmod]
9073 # Return 1 if store merging optimization is applicable for target.
9074 # Store merging is not profitable for targets like the avr which
9075 # can load/store only one byte at a time. Use int size as a proxy
9076 # for the number of bytes the target can write, and skip for targets
9077 # with a smallish (< 32) size.
9079 proc check_effective_target_store_merge { } {
9080 if { [is-effective-target non_strict_align ] && [is-effective-target int32plus] } {
9087 # Return 1 if we're able to assemble rdrand
9089 proc check_effective_target_rdrand { } {
9090 return [check_no_compiler_messages_nocache rdrand object {
9095 __builtin_ia32_rdrand32_step(&val);
9101 # Return 1 if the target supports coprocessor instructions: cdp, ldc, ldcl,
9102 # stc, stcl, mcr and mrc.
9103 proc check_effective_target_arm_coproc1_ok_nocache { } {
9104 if { ![istarget arm*-*-*] } {
9107 return [check_no_compiler_messages_nocache arm_coproc1_ok assembly {
9108 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 4
9114 proc check_effective_target_arm_coproc1_ok { } {
9115 return [check_cached_effective_target arm_coproc1_ok \
9116 check_effective_target_arm_coproc1_ok_nocache]
9119 # Return 1 if the target supports all coprocessor instructions checked by
9120 # check_effective_target_arm_coproc1_ok in addition to the following: cdp2,
9121 # ldc2, ldc2l, stc2, stc2l, mcr2 and mrc2.
9122 proc check_effective_target_arm_coproc2_ok_nocache { } {
9123 if { ![check_effective_target_arm_coproc1_ok] } {
9126 return [check_no_compiler_messages_nocache arm_coproc2_ok assembly {
9127 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 5
9133 proc check_effective_target_arm_coproc2_ok { } {
9134 return [check_cached_effective_target arm_coproc2_ok \
9135 check_effective_target_arm_coproc2_ok_nocache]
9138 # Return 1 if the target supports all coprocessor instructions checked by
9139 # check_effective_target_arm_coproc2_ok in addition the following: mcrr and
9141 proc check_effective_target_arm_coproc3_ok_nocache { } {
9142 if { ![check_effective_target_arm_coproc2_ok] } {
9145 return [check_no_compiler_messages_nocache arm_coproc3_ok assembly {
9146 #if (__thumb__ && !__thumb2__) \
9147 || (__ARM_ARCH < 6 && !defined (__ARM_ARCH_5TE__))
9153 proc check_effective_target_arm_coproc3_ok { } {
9154 return [check_cached_effective_target arm_coproc3_ok \
9155 check_effective_target_arm_coproc3_ok_nocache]
9158 # Return 1 if the target supports all coprocessor instructions checked by
9159 # check_effective_target_arm_coproc3_ok in addition the following: mcrr2 and
9161 proc check_effective_target_arm_coproc4_ok_nocache { } {
9162 if { ![check_effective_target_arm_coproc3_ok] } {
9165 return [check_no_compiler_messages_nocache arm_coproc4_ok assembly {
9166 #if (__thumb__ && !__thumb2__) || __ARM_ARCH < 6
9172 proc check_effective_target_arm_coproc4_ok { } {
9173 return [check_cached_effective_target arm_coproc4_ok \
9174 check_effective_target_arm_coproc4_ok_nocache]
9177 # Return 1 if the target supports the auto_inc_dec optimization pass.
9178 proc check_effective_target_autoincdec { } {
9179 if { ![check_no_compiler_messages auto_incdec assembly { void f () { }
9180 } "-O2 -fdump-rtl-auto_inc_dec" ] } {
9184 set dumpfile [glob -nocomplain "auto_incdec[pid].c.\[0-9\]\[0-9\]\[0-9\]r.auto_inc_dec"]
9185 if { [file exists $dumpfile ] } {
9186 file delete $dumpfile
9192 # Return 1 if the target has support for stack probing designed
9193 # to avoid stack-clash style attacks.
9195 # This is used to restrict the stack-clash mitigation tests to
9196 # just those targets that have been explicitly supported.
9198 # In addition to the prologue work on those targets, each target's
9199 # properties should be described in the functions below so that
9200 # tests do not become a mess of unreadable target conditions.
9202 proc check_effective_target_supports_stack_clash_protection { } {
9204 # Temporary until the target bits are fully ACK'd.
9205 # if { [istarget aarch*-*-*] } {
9209 if { [istarget x86_64-*-*] || [istarget i?86-*-*]
9210 || [istarget powerpc*-*-*] || [istarget rs6000*-*-*]
9211 || [istarget s390*-*-*] } {
9217 # Return 1 if the target creates a frame pointer for non-leaf functions
9218 # Note we ignore cases where we apply tail call optimization here.
9219 proc check_effective_target_frame_pointer_for_non_leaf { } {
9220 if { [istarget aarch*-*-*] } {
9224 # Solaris/x86 defaults to -fno-omit-frame-pointer.
9225 if { [istarget i?86-*-solaris*] || [istarget x86_64-*-solaris*] } {
9232 # Return 1 if the target's calling sequence or its ABI
9233 # create implicit stack probes at or prior to function entry.
9234 proc check_effective_target_caller_implicit_probes { } {
9236 # On x86/x86_64 the call instruction itself pushes the return
9237 # address onto the stack. That is an implicit probe of *sp.
9238 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
9242 # On PPC, the ABI mandates that the address of the outer
9243 # frame be stored at *sp. Thus each allocation of stack
9244 # space is itself an implicit probe of *sp.
9245 if { [istarget powerpc*-*-*] || [istarget rs6000*-*-*] } {
9249 # s390's ABI has a register save area allocated by the
9250 # caller for use by the callee. The mere existence does
9251 # not constitute a probe by the caller, but when the slots
9252 # used by the callee those stores are implicit probes.
9253 if { [istarget s390*-*-*] } {
9257 # Not strictly true on aarch64, but we have agreed that we will
9258 # consider any function that pushes SP more than 3kbytes into
9259 # the guard page as broken. This essentially means that we can
9260 # consider the aarch64 as having a caller implicit probe at
9262 if { [istarget aarch64*-*-*] } {
9269 # Targets that potentially realign the stack pointer often cause residual
9270 # stack allocations and make it difficult to elimination loops or residual
9271 # allocations for dynamic stack allocations
9272 proc check_effective_target_callee_realigns_stack { } {
9273 if { [istarget x86_64-*-*] || [istarget i?86-*-*] } {
9279 # Return 1 if CET instructions can be compiled.
9280 proc check_effective_target_cet { } {
9281 if { !([istarget i?86-*-*] || [istarget x86_64-*-*]) } {
9284 return [check_no_compiler_messages cet object {