gdb/aarch64-linux-nat.c

   1 /* Native-dependent code for GNU/Linux AArch64.
   2
   3    Copyright (C) 2011-2021 Free Software Foundation, Inc.
   4    Contributed by ARM Ltd.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #include "defs.h"
  22
  23 #include "inferior.h"
  24 #include "gdbcore.h"
  25 #include "regcache.h"
  26 #include "linux-nat.h"
  27 #include "target-descriptions.h"
  28 #include "auxv.h"
  29 #include "gdbcmd.h"
  30 #include "aarch64-tdep.h"
  31 #include "aarch64-linux-tdep.h"
  32 #include "aarch32-linux-nat.h"
  33 #include "aarch32-tdep.h"
  34 #include "arch/arm.h"
  35 #include "nat/aarch64-linux.h"
  36 #include "nat/aarch64-linux-hw-point.h"
  37 #include "nat/aarch64-sve-linux-ptrace.h"
  38
  39 #include "elf/external.h"
  40 #include "elf/common.h"
  41
  42 #include "nat/gdb_ptrace.h"
  43 #include <sys/utsname.h>
  44 #include <asm/ptrace.h>
  45
  46 #include "gregset.h"
  47 #include "linux-tdep.h"
  48
  49 /* Defines ps_err_e, struct ps_prochandle.  */
  50 #include "gdb_proc_service.h"
  51 #include "arch-utils.h"
  52
  53 #include "arch/aarch64-mte-linux.h"
  54
  55 #include "nat/aarch64-mte-linux-ptrace.h"
  56
  57 #ifndef TRAP_HWBKPT
  58 #define TRAP_HWBKPT 0x0004
  59 #endif
  60
  61 class aarch64_linux_nat_target final : public linux_nat_target
  62 {
  63 public:
  64   /* Add our register access methods.  */
  65   void fetch_registers (struct regcache *, int) override;
  66   void store_registers (struct regcache *, int) override;
  67
  68   const struct target_desc *read_description () override;
  69
  70   /* Add our hardware breakpoint and watchpoint implementation.  */
  71   int can_use_hw_breakpoint (enum bptype, int, int) override;
  72   int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  73   int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  74   int region_ok_for_hw_watchpoint (CORE_ADDR, int) override;
  75   int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  76                          struct expression *) override;
  77   int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  78                          struct expression *) override;
  79   bool stopped_by_watchpoint () override;
  80   bool stopped_data_address (CORE_ADDR *) override;
  81   bool watchpoint_addr_within_range (CORE_ADDR, CORE_ADDR, int) override;
  82
  83   int can_do_single_step () override;
  84
  85   /* Override the GNU/Linux inferior startup hook.  */
  86   void post_startup_inferior (ptid_t) override;
  87
  88   /* Override the GNU/Linux post attach hook.  */
  89   void post_attach (int pid) override;
  90
  91   /* These three defer to common nat/ code.  */
  92   void low_new_thread (struct lwp_info *lp) override
  93   { aarch64_linux_new_thread (lp); }
  94   void low_delete_thread (struct arch_lwp_info *lp) override
  95   { aarch64_linux_delete_thread (lp); }
  96   void low_prepare_to_resume (struct lwp_info *lp) override
  97   { aarch64_linux_prepare_to_resume (lp); }
  98
  99   void low_new_fork (struct lwp_info *parent, pid_t child_pid) override;
 100   void low_forget_process (pid_t pid) override;
 101
 102   /* Add our siginfo layout converter.  */
 103   bool low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction)
 104     override;
 105
 106   struct gdbarch *thread_architecture (ptid_t) override;
 107
 108   bool supports_memory_tagging () override;
 109
 110   /* Read memory allocation tags from memory via PTRACE.  */
 111   bool fetch_memtags (CORE_ADDR address, size_t len,
 112                       gdb::byte_vector &tags, int type) override;
 113
 114   /* Write allocation tags to memory via PTRACE.  */
 115   bool store_memtags (CORE_ADDR address, size_t len,
 116                       const gdb::byte_vector &tags, int type) override;
 117 };
 118
 119 static aarch64_linux_nat_target the_aarch64_linux_nat_target;
 120
 121 /* Per-process data.  We don't bind this to a per-inferior registry
 122    because of targets like x86 GNU/Linux that need to keep track of
 123    processes that aren't bound to any inferior (e.g., fork children,
 124    checkpoints).  */
 125
 126 struct aarch64_process_info
 127 {
 128   /* Linked list.  */
 129   struct aarch64_process_info *next;
 130
 131   /* The process identifier.  */
 132   pid_t pid;
 133
 134   /* Copy of aarch64 hardware debug registers.  */
 135   struct aarch64_debug_reg_state state;
 136 };
 137
 138 static struct aarch64_process_info *aarch64_process_list = NULL;
 139
 140 /* Find process data for process PID.  */
 141
 142 static struct aarch64_process_info *
 143 aarch64_find_process_pid (pid_t pid)
 144 {
 145   struct aarch64_process_info *proc;
 146
 147   for (proc = aarch64_process_list; proc; proc = proc->next)
 148     if (proc->pid == pid)
 149       return proc;
 150
 151   return NULL;
 152 }
 153
 154 /* Add process data for process PID.  Returns newly allocated info
 155    object.  */
 156
 157 static struct aarch64_process_info *
 158 aarch64_add_process (pid_t pid)
 159 {
 160   struct aarch64_process_info *proc;
 161
 162   proc = XCNEW (struct aarch64_process_info);
 163   proc->pid = pid;
 164
 165   proc->next = aarch64_process_list;
 166   aarch64_process_list = proc;
 167
 168   return proc;
 169 }
 170
 171 /* Get data specific info for process PID, creating it if necessary.
 172    Never returns NULL.  */
 173
 174 static struct aarch64_process_info *
 175 aarch64_process_info_get (pid_t pid)
 176 {
 177   struct aarch64_process_info *proc;
 178
 179   proc = aarch64_find_process_pid (pid);
 180   if (proc == NULL)
 181     proc = aarch64_add_process (pid);
 182
 183   return proc;
 184 }
 185
 186 /* Called whenever GDB is no longer debugging process PID.  It deletes
 187    data structures that keep track of debug register state.  */
 188
 189 void
 190 aarch64_linux_nat_target::low_forget_process (pid_t pid)
 191 {
 192   struct aarch64_process_info *proc, **proc_link;
 193
 194   proc = aarch64_process_list;
 195   proc_link = &aarch64_process_list;
 196
 197   while (proc != NULL)
 198     {
 199       if (proc->pid == pid)
 200         {
 201           *proc_link = proc->next;
 202
 203           xfree (proc);
 204           return;
 205         }
 206
 207       proc_link = &proc->next;
 208       proc = *proc_link;
 209     }
 210 }
 211
 212 /* Get debug registers state for process PID.  */
 213
 214 struct aarch64_debug_reg_state *
 215 aarch64_get_debug_reg_state (pid_t pid)
 216 {
 217   return &aarch64_process_info_get (pid)->state;
 218 }
 219
 220 /* Fill GDB's register array with the general-purpose register values
 221    from the current thread.  */
 222
 223 static void
 224 fetch_gregs_from_thread (struct regcache *regcache)
 225 {
 226   int ret, tid;
 227   struct gdbarch *gdbarch = regcache->arch ();
 228   elf_gregset_t regs;
 229   struct iovec iovec;
 230
 231   /* Make sure REGS can hold all registers contents on both aarch64
 232      and arm.  */
 233   gdb_static_assert (sizeof (regs) >= 18 * 4);
 234
 235   tid = regcache->ptid ().lwp ();
 236
 237   iovec.iov_base = &regs;
 238   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 239     iovec.iov_len = 18 * 4;
 240   else
 241     iovec.iov_len = sizeof (regs);
 242
 243   ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
 244   if (ret < 0)
 245     perror_with_name (_("Unable to fetch general registers."));
 246
 247   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 248     aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, 1);
 249   else
 250     {
 251       int regno;
 252
 253       for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
 254         regcache->raw_supply (regno, &regs[regno - AARCH64_X0_REGNUM]);
 255     }
 256 }
 257
 258 /* Store to the current thread the valid general-purpose register
 259    values in the GDB's register array.  */
 260
 261 static void
 262 store_gregs_to_thread (const struct regcache *regcache)
 263 {
 264   int ret, tid;
 265   elf_gregset_t regs;
 266   struct iovec iovec;
 267   struct gdbarch *gdbarch = regcache->arch ();
 268
 269   /* Make sure REGS can hold all registers contents on both aarch64
 270      and arm.  */
 271   gdb_static_assert (sizeof (regs) >= 18 * 4);
 272   tid = regcache->ptid ().lwp ();
 273
 274   iovec.iov_base = &regs;
 275   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 276     iovec.iov_len = 18 * 4;
 277   else
 278     iovec.iov_len = sizeof (regs);
 279
 280   ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
 281   if (ret < 0)
 282     perror_with_name (_("Unable to fetch general registers."));
 283
 284   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 285     aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, 1);
 286   else
 287     {
 288       int regno;
 289
 290       for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
 291         if (REG_VALID == regcache->get_register_status (regno))
 292           regcache->raw_collect (regno, &regs[regno - AARCH64_X0_REGNUM]);
 293     }
 294
 295   ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iovec);
 296   if (ret < 0)
 297     perror_with_name (_("Unable to store general registers."));
 298 }
 299
 300 /* Fill GDB's register array with the fp/simd register values
 301    from the current thread.  */
 302
 303 static void
 304 fetch_fpregs_from_thread (struct regcache *regcache)
 305 {
 306   int ret, tid;
 307   elf_fpregset_t regs;
 308   struct iovec iovec;
 309   struct gdbarch *gdbarch = regcache->arch ();
 310
 311   /* Make sure REGS can hold all VFP registers contents on both aarch64
 312      and arm.  */
 313   gdb_static_assert (sizeof regs >= ARM_VFP3_REGS_SIZE);
 314
 315   tid = regcache->ptid ().lwp ();
 316
 317   iovec.iov_base = &regs;
 318
 319   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 320     {
 321       iovec.iov_len = ARM_VFP3_REGS_SIZE;
 322
 323       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 324       if (ret < 0)
 325         perror_with_name (_("Unable to fetch VFP registers."));
 326
 327       aarch32_vfp_regcache_supply (regcache, (gdb_byte *) &regs, 32);
 328     }
 329   else
 330     {
 331       int regno;
 332
 333       iovec.iov_len = sizeof (regs);
 334
 335       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
 336       if (ret < 0)
 337         perror_with_name (_("Unable to fetch vFP/SIMD registers."));
 338
 339       for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
 340         regcache->raw_supply (regno, &regs.vregs[regno - AARCH64_V0_REGNUM]);
 341
 342       regcache->raw_supply (AARCH64_FPSR_REGNUM, &regs.fpsr);
 343       regcache->raw_supply (AARCH64_FPCR_REGNUM, &regs.fpcr);
 344     }
 345 }
 346
 347 /* Store to the current thread the valid fp/simd register
 348    values in the GDB's register array.  */
 349
 350 static void
 351 store_fpregs_to_thread (const struct regcache *regcache)
 352 {
 353   int ret, tid;
 354   elf_fpregset_t regs;
 355   struct iovec iovec;
 356   struct gdbarch *gdbarch = regcache->arch ();
 357
 358   /* Make sure REGS can hold all VFP registers contents on both aarch64
 359      and arm.  */
 360   gdb_static_assert (sizeof regs >= ARM_VFP3_REGS_SIZE);
 361   tid = regcache->ptid ().lwp ();
 362
 363   iovec.iov_base = &regs;
 364
 365   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 366     {
 367       iovec.iov_len = ARM_VFP3_REGS_SIZE;
 368
 369       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 370       if (ret < 0)
 371         perror_with_name (_("Unable to fetch VFP registers."));
 372
 373       aarch32_vfp_regcache_collect (regcache, (gdb_byte *) &regs, 32);
 374     }
 375   else
 376     {
 377       int regno;
 378
 379       iovec.iov_len = sizeof (regs);
 380
 381       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
 382       if (ret < 0)
 383         perror_with_name (_("Unable to fetch FP/SIMD registers."));
 384
 385       for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
 386         if (REG_VALID == regcache->get_register_status (regno))
 387           regcache->raw_collect
 388             (regno, (char *) &regs.vregs[regno - AARCH64_V0_REGNUM]);
 389
 390       if (REG_VALID == regcache->get_register_status (AARCH64_FPSR_REGNUM))
 391         regcache->raw_collect (AARCH64_FPSR_REGNUM, (char *) &regs.fpsr);
 392       if (REG_VALID == regcache->get_register_status (AARCH64_FPCR_REGNUM))
 393         regcache->raw_collect (AARCH64_FPCR_REGNUM, (char *) &regs.fpcr);
 394     }
 395
 396   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 397     {
 398       ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iovec);
 399       if (ret < 0)
 400         perror_with_name (_("Unable to store VFP registers."));
 401     }
 402   else
 403     {
 404       ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iovec);
 405       if (ret < 0)
 406         perror_with_name (_("Unable to store FP/SIMD registers."));
 407     }
 408 }
 409
 410 /* Fill GDB's register array with the sve register values
 411    from the current thread.  */
 412
 413 static void
 414 fetch_sveregs_from_thread (struct regcache *regcache)
 415 {
 416   std::unique_ptr<gdb_byte[]> base
 417     = aarch64_sve_get_sveregs (regcache->ptid ().lwp ());
 418   aarch64_sve_regs_copy_to_reg_buf (regcache, base.get ());
 419 }
 420
 421 /* Store to the current thread the valid sve register
 422    values in the GDB's register array.  */
 423
 424 static void
 425 store_sveregs_to_thread (struct regcache *regcache)
 426 {
 427   int ret;
 428   struct iovec iovec;
 429   int tid = regcache->ptid ().lwp ();
 430
 431   /* First store vector length to the thread.  This is done first to ensure the
 432      ptrace buffers read from the kernel are the correct size.  */
 433   if (!aarch64_sve_set_vq (tid, regcache))
 434     perror_with_name (_("Unable to set VG register."));
 435
 436   /* Obtain a dump of SVE registers from ptrace.  */
 437   std::unique_ptr<gdb_byte[]> base = aarch64_sve_get_sveregs (tid);
 438
 439   /* Overwrite with regcache state.  */
 440   aarch64_sve_regs_copy_from_reg_buf (regcache, base.get ());
 441
 442   /* Write back to the kernel.  */
 443   iovec.iov_base = base.get ();
 444   iovec.iov_len = ((struct user_sve_header *) base.get ())->size;
 445   ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_SVE, &iovec);
 446
 447   if (ret < 0)
 448     perror_with_name (_("Unable to store sve registers"));
 449 }
 450
 451 /* Fill GDB's register array with the pointer authentication mask values from
 452    the current thread.  */
 453
 454 static void
 455 fetch_pauth_masks_from_thread (struct regcache *regcache)
 456 {
 457   aarch64_gdbarch_tdep *tdep
 458     = (aarch64_gdbarch_tdep *) gdbarch_tdep (regcache->arch ());
 459   int ret;
 460   struct iovec iovec;
 461   uint64_t pauth_regset[2] = {0, 0};
 462   int tid = regcache->ptid ().lwp ();
 463
 464   iovec.iov_base = &pauth_regset;
 465   iovec.iov_len = sizeof (pauth_regset);
 466
 467   ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_PAC_MASK, &iovec);
 468   if (ret != 0)
 469     perror_with_name (_("unable to fetch pauth registers."));
 470
 471   regcache->raw_supply (AARCH64_PAUTH_DMASK_REGNUM (tdep->pauth_reg_base),
 472                         &pauth_regset[0]);
 473   regcache->raw_supply (AARCH64_PAUTH_CMASK_REGNUM (tdep->pauth_reg_base),
 474                         &pauth_regset[1]);
 475 }
 476
 477 /* Fill GDB's register array with the MTE register values from
 478    the current thread.  */
 479
 480 static void
 481 fetch_mteregs_from_thread (struct regcache *regcache)
 482 {
 483   aarch64_gdbarch_tdep *tdep
 484     = (aarch64_gdbarch_tdep *) gdbarch_tdep (regcache->arch ());
 485   int regno = tdep->mte_reg_base;
 486
 487   gdb_assert (regno != -1);
 488
 489   uint64_t tag_ctl = 0;
 490   struct iovec iovec;
 491
 492   iovec.iov_base = &tag_ctl;
 493   iovec.iov_len = sizeof (tag_ctl);
 494
 495   int tid = get_ptrace_pid (regcache->ptid ());
 496   if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_TAGGED_ADDR_CTRL, &iovec) != 0)
 497       perror_with_name (_("unable to fetch MTE registers."));
 498
 499   regcache->raw_supply (regno, &tag_ctl);
 500 }
 501
 502 /* Store to the current thread the valid MTE register set in the GDB's
 503    register array.  */
 504
 505 static void
 506 store_mteregs_to_thread (struct regcache *regcache)
 507 {
 508   aarch64_gdbarch_tdep *tdep
 509     = (aarch64_gdbarch_tdep *) gdbarch_tdep (regcache->arch ());
 510   int regno = tdep->mte_reg_base;
 511
 512   gdb_assert (regno != -1);
 513
 514   uint64_t tag_ctl = 0;
 515
 516   if (REG_VALID != regcache->get_register_status (regno))
 517     return;
 518
 519   regcache->raw_collect (regno, (char *) &tag_ctl);
 520
 521   struct iovec iovec;
 522
 523   iovec.iov_base = &tag_ctl;
 524   iovec.iov_len = sizeof (tag_ctl);
 525
 526   int tid = get_ptrace_pid (regcache->ptid ());
 527   if (ptrace (PTRACE_SETREGSET, tid, NT_ARM_TAGGED_ADDR_CTRL, &iovec) != 0)
 528     perror_with_name (_("unable to store MTE registers."));
 529 }
 530
 531 /* Implement the "fetch_registers" target_ops method.  */
 532
 533 void
 534 aarch64_linux_nat_target::fetch_registers (struct regcache *regcache,
 535                                            int regno)
 536 {
 537   aarch64_gdbarch_tdep *tdep
 538     = (aarch64_gdbarch_tdep *) gdbarch_tdep (regcache->arch ());
 539
 540   if (regno == -1)
 541     {
 542       fetch_gregs_from_thread (regcache);
 543       if (tdep->has_sve ())
 544         fetch_sveregs_from_thread (regcache);
 545       else
 546         fetch_fpregs_from_thread (regcache);
 547
 548       if (tdep->has_pauth ())
 549         fetch_pauth_masks_from_thread (regcache);
 550
 551       if (tdep->has_mte ())
 552         fetch_mteregs_from_thread (regcache);
 553     }
 554   else if (regno < AARCH64_V0_REGNUM)
 555     fetch_gregs_from_thread (regcache);
 556   else if (tdep->has_sve ())
 557     fetch_sveregs_from_thread (regcache);
 558   else
 559     fetch_fpregs_from_thread (regcache);
 560
 561   if (tdep->has_pauth ())
 562     {
 563       if (regno == AARCH64_PAUTH_DMASK_REGNUM (tdep->pauth_reg_base)
 564           || regno == AARCH64_PAUTH_CMASK_REGNUM (tdep->pauth_reg_base))
 565         fetch_pauth_masks_from_thread (regcache);
 566     }
 567
 568   /* Fetch individual MTE registers.  */
 569   if (tdep->has_mte ()
 570       && (regno == tdep->mte_reg_base))
 571     fetch_mteregs_from_thread (regcache);
 572 }
 573
 574 /* Implement the "store_registers" target_ops method.  */
 575
 576 void
 577 aarch64_linux_nat_target::store_registers (struct regcache *regcache,
 578                                            int regno)
 579 {
 580   aarch64_gdbarch_tdep *tdep
 581     = (aarch64_gdbarch_tdep *) gdbarch_tdep (regcache->arch ());
 582
 583   if (regno == -1)
 584     {
 585       store_gregs_to_thread (regcache);
 586       if (tdep->has_sve ())
 587         store_sveregs_to_thread (regcache);
 588       else
 589         store_fpregs_to_thread (regcache);
 590
 591       if (tdep->has_mte ())
 592         store_mteregs_to_thread (regcache);
 593     }
 594   else if (regno < AARCH64_V0_REGNUM)
 595     store_gregs_to_thread (regcache);
 596   else if (tdep->has_sve ())
 597     store_sveregs_to_thread (regcache);
 598   else
 599     store_fpregs_to_thread (regcache);
 600
 601   /* Store MTE registers.  */
 602   if (tdep->has_mte ()
 603       && (regno == tdep->mte_reg_base))
 604     store_mteregs_to_thread (regcache);
 605 }
 606
 607 /* Fill register REGNO (if it is a general-purpose register) in
 608    *GREGSETPS with the value in GDB's register array.  If REGNO is -1,
 609    do this for all registers.  */
 610
 611 void
 612 fill_gregset (const struct regcache *regcache,
 613               gdb_gregset_t *gregsetp, int regno)
 614 {
 615   regcache_collect_regset (&aarch64_linux_gregset, regcache,
 616                            regno, (gdb_byte *) gregsetp,
 617                            AARCH64_LINUX_SIZEOF_GREGSET);
 618 }
 619
 620 /* Fill GDB's register array with the general-purpose register values
 621    in *GREGSETP.  */
 622
 623 void
 624 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
 625 {
 626   regcache_supply_regset (&aarch64_linux_gregset, regcache, -1,
 627                           (const gdb_byte *) gregsetp,
 628                           AARCH64_LINUX_SIZEOF_GREGSET);
 629 }
 630
 631 /* Fill register REGNO (if it is a floating-point register) in
 632    *FPREGSETP with the value in GDB's register array.  If REGNO is -1,
 633    do this for all registers.  */
 634
 635 void
 636 fill_fpregset (const struct regcache *regcache,
 637                gdb_fpregset_t *fpregsetp, int regno)
 638 {
 639   regcache_collect_regset (&aarch64_linux_fpregset, regcache,
 640                            regno, (gdb_byte *) fpregsetp,
 641                            AARCH64_LINUX_SIZEOF_FPREGSET);
 642 }
 643
 644 /* Fill GDB's register array with the floating-point register values
 645    in *FPREGSETP.  */
 646
 647 void
 648 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
 649 {
 650   regcache_supply_regset (&aarch64_linux_fpregset, regcache, -1,
 651                           (const gdb_byte *) fpregsetp,
 652                           AARCH64_LINUX_SIZEOF_FPREGSET);
 653 }
 654
 655 /* linux_nat_new_fork hook.   */
 656
 657 void
 658 aarch64_linux_nat_target::low_new_fork (struct lwp_info *parent,
 659                                         pid_t child_pid)
 660 {
 661   pid_t parent_pid;
 662   struct aarch64_debug_reg_state *parent_state;
 663   struct aarch64_debug_reg_state *child_state;
 664
 665   /* NULL means no watchpoint has ever been set in the parent.  In
 666      that case, there's nothing to do.  */
 667   if (parent->arch_private == NULL)
 668     return;
 669
 670   /* GDB core assumes the child inherits the watchpoints/hw
 671      breakpoints of the parent, and will remove them all from the
 672      forked off process.  Copy the debug registers mirrors into the
 673      new process so that all breakpoints and watchpoints can be
 674      removed together.  */
 675
 676   parent_pid = parent->ptid.pid ();
 677   parent_state = aarch64_get_debug_reg_state (parent_pid);
 678   child_state = aarch64_get_debug_reg_state (child_pid);
 679   *child_state = *parent_state;
 680 }
 681 \f
 682
 683 /* Called by libthread_db.  Returns a pointer to the thread local
 684    storage (or its descriptor).  */
 685
 686 ps_err_e
 687 ps_get_thread_area (struct ps_prochandle *ph,
 688                     lwpid_t lwpid, int idx, void **base)
 689 {
 690   int is_64bit_p
 691     = (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 64);
 692
 693   return aarch64_ps_get_thread_area (ph, lwpid, idx, base, is_64bit_p);
 694 }
 695 \f
 696
 697 /* Implement the "post_startup_inferior" target_ops method.  */
 698
 699 void
 700 aarch64_linux_nat_target::post_startup_inferior (ptid_t ptid)
 701 {
 702   low_forget_process (ptid.pid ());
 703   aarch64_linux_get_debug_reg_capacity (ptid.pid ());
 704   linux_nat_target::post_startup_inferior (ptid);
 705 }
 706
 707 /* Implement the "post_attach" target_ops method.  */
 708
 709 void
 710 aarch64_linux_nat_target::post_attach (int pid)
 711 {
 712   low_forget_process (pid);
 713   /* Set the hardware debug register capacity.  If
 714      aarch64_linux_get_debug_reg_capacity is not called
 715      (as it is in aarch64_linux_child_post_startup_inferior) then
 716      software watchpoints will be used instead of hardware
 717      watchpoints when attaching to a target.  */
 718   aarch64_linux_get_debug_reg_capacity (pid);
 719   linux_nat_target::post_attach (pid);
 720 }
 721
 722 /* Implement the "read_description" target_ops method.  */
 723
 724 const struct target_desc *
 725 aarch64_linux_nat_target::read_description ()
 726 {
 727   int ret, tid;
 728   gdb_byte regbuf[ARM_VFP3_REGS_SIZE];
 729   struct iovec iovec;
 730
 731   tid = inferior_ptid.pid ();
 732
 733   iovec.iov_base = regbuf;
 734   iovec.iov_len = ARM_VFP3_REGS_SIZE;
 735
 736   ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 737   if (ret == 0)
 738     return aarch32_read_description ();
 739
 740   CORE_ADDR hwcap = linux_get_hwcap (this);
 741   CORE_ADDR hwcap2 = linux_get_hwcap2 (this);
 742
 743   bool pauth_p = hwcap & AARCH64_HWCAP_PACA;
 744   bool mte_p = hwcap2 & HWCAP2_MTE;
 745
 746   return aarch64_read_description (aarch64_sve_get_vq (tid), pauth_p, mte_p);
 747 }
 748
 749 /* Convert a native/host siginfo object, into/from the siginfo in the
 750    layout of the inferiors' architecture.  Returns true if any
 751    conversion was done; false otherwise.  If DIRECTION is 1, then copy
 752    from INF to NATIVE.  If DIRECTION is 0, copy from NATIVE to
 753    INF.  */
 754
 755 bool
 756 aarch64_linux_nat_target::low_siginfo_fixup (siginfo_t *native, gdb_byte *inf,
 757                                              int direction)
 758 {
 759   struct gdbarch *gdbarch = get_frame_arch (get_current_frame ());
 760
 761   /* Is the inferior 32-bit?  If so, then do fixup the siginfo
 762      object.  */
 763   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 764     {
 765       if (direction == 0)
 766         aarch64_compat_siginfo_from_siginfo ((struct compat_siginfo *) inf,
 767                                              native);
 768       else
 769         aarch64_siginfo_from_compat_siginfo (native,
 770                                              (struct compat_siginfo *) inf);
 771
 772       return true;
 773     }
 774
 775   return false;
 776 }
 777
 778 /* Returns the number of hardware watchpoints of type TYPE that we can
 779    set.  Value is positive if we can set CNT watchpoints, zero if
 780    setting watchpoints of type TYPE is not supported, and negative if
 781    CNT is more than the maximum number of watchpoints of type TYPE
 782    that we can support.  TYPE is one of bp_hardware_watchpoint,
 783    bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
 784    CNT is the number of such watchpoints used so far (including this
 785    one).  OTHERTYPE is non-zero if other types of watchpoints are
 786    currently enabled.  */
 787
 788 int
 789 aarch64_linux_nat_target::can_use_hw_breakpoint (enum bptype type,
 790                                                  int cnt, int othertype)
 791 {
 792   if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
 793       || type == bp_access_watchpoint || type == bp_watchpoint)
 794     {
 795       if (aarch64_num_wp_regs == 0)
 796         return 0;
 797     }
 798   else if (type == bp_hardware_breakpoint)
 799     {
 800       if (aarch64_num_bp_regs == 0)
 801         return 0;
 802     }
 803   else
 804     gdb_assert_not_reached ("unexpected breakpoint type");
 805
 806   /* We always return 1 here because we don't have enough information
 807      about possible overlap of addresses that they want to watch.  As an
 808      extreme example, consider the case where all the watchpoints watch
 809      the same address and the same region length: then we can handle a
 810      virtually unlimited number of watchpoints, due to debug register
 811      sharing implemented via reference counts.  */
 812   return 1;
 813 }
 814
 815 /* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address.
 816    Return 0 on success, -1 on failure.  */
 817
 818 int
 819 aarch64_linux_nat_target::insert_hw_breakpoint (struct gdbarch *gdbarch,
 820                                                 struct bp_target_info *bp_tgt)
 821 {
 822   int ret;
 823   CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address;
 824   int len;
 825   const enum target_hw_bp_type type = hw_execute;
 826   struct aarch64_debug_reg_state *state
 827     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 828
 829   gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
 830
 831   if (show_debug_regs)
 832     fprintf_unfiltered
 833       (gdb_stdlog,
 834        "insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
 835        (unsigned long) addr, len);
 836
 837   ret = aarch64_handle_breakpoint (type, addr, len, 1 /* is_insert */, state);
 838
 839   if (show_debug_regs)
 840     {
 841       aarch64_show_debug_reg_state (state,
 842                                     "insert_hw_breakpoint", addr, len, type);
 843     }
 844
 845   return ret;
 846 }
 847
 848 /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
 849    Return 0 on success, -1 on failure.  */
 850
 851 int
 852 aarch64_linux_nat_target::remove_hw_breakpoint (struct gdbarch *gdbarch,
 853                                                 struct bp_target_info *bp_tgt)
 854 {
 855   int ret;
 856   CORE_ADDR addr = bp_tgt->placed_address;
 857   int len = 4;
 858   const enum target_hw_bp_type type = hw_execute;
 859   struct aarch64_debug_reg_state *state
 860     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 861
 862   gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
 863
 864   if (show_debug_regs)
 865     fprintf_unfiltered
 866       (gdb_stdlog, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
 867        (unsigned long) addr, len);
 868
 869   ret = aarch64_handle_breakpoint (type, addr, len, 0 /* is_insert */, state);
 870
 871   if (show_debug_regs)
 872     {
 873       aarch64_show_debug_reg_state (state,
 874                                     "remove_hw_watchpoint", addr, len, type);
 875     }
 876
 877   return ret;
 878 }
 879
 880 /* Implement the "insert_watchpoint" target_ops method.
 881
 882    Insert a watchpoint to watch a memory region which starts at
 883    address ADDR and whose length is LEN bytes.  Watch memory accesses
 884    of the type TYPE.  Return 0 on success, -1 on failure.  */
 885
 886 int
 887 aarch64_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len,
 888                                              enum target_hw_bp_type type,
 889                                              struct expression *cond)
 890 {
 891   int ret;
 892   struct aarch64_debug_reg_state *state
 893     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 894
 895   if (show_debug_regs)
 896     fprintf_unfiltered (gdb_stdlog,
 897                         "insert_watchpoint on entry (addr=0x%08lx, len=%d)\n",
 898                         (unsigned long) addr, len);
 899
 900   gdb_assert (type != hw_execute);
 901
 902   ret = aarch64_handle_watchpoint (type, addr, len, 1 /* is_insert */, state);
 903
 904   if (show_debug_regs)
 905     {
 906       aarch64_show_debug_reg_state (state,
 907                                     "insert_watchpoint", addr, len, type);
 908     }
 909
 910   return ret;
 911 }
 912
 913 /* Implement the "remove_watchpoint" target_ops method.
 914    Remove a watchpoint that watched the memory region which starts at
 915    address ADDR, whose length is LEN bytes, and for accesses of the
 916    type TYPE.  Return 0 on success, -1 on failure.  */
 917
 918 int
 919 aarch64_linux_nat_target::remove_watchpoint (CORE_ADDR addr, int len,
 920                                              enum target_hw_bp_type type,
 921                                              struct expression *cond)
 922 {
 923   int ret;
 924   struct aarch64_debug_reg_state *state
 925     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 926
 927   if (show_debug_regs)
 928     fprintf_unfiltered (gdb_stdlog,
 929                         "remove_watchpoint on entry (addr=0x%08lx, len=%d)\n",
 930                         (unsigned long) addr, len);
 931
 932   gdb_assert (type != hw_execute);
 933
 934   ret = aarch64_handle_watchpoint (type, addr, len, 0 /* is_insert */, state);
 935
 936   if (show_debug_regs)
 937     {
 938       aarch64_show_debug_reg_state (state,
 939                                     "remove_watchpoint", addr, len, type);
 940     }
 941
 942   return ret;
 943 }
 944
 945 /* Implement the "region_ok_for_hw_watchpoint" target_ops method.  */
 946
 947 int
 948 aarch64_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
 949 {
 950   return aarch64_linux_region_ok_for_watchpoint (addr, len);
 951 }
 952
 953 /* Implement the "stopped_data_address" target_ops method.  */
 954
 955 bool
 956 aarch64_linux_nat_target::stopped_data_address (CORE_ADDR *addr_p)
 957 {
 958   siginfo_t siginfo;
 959   int i;
 960   struct aarch64_debug_reg_state *state;
 961
 962   if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
 963     return false;
 964
 965   /* This must be a hardware breakpoint.  */
 966   if (siginfo.si_signo != SIGTRAP
 967       || (siginfo.si_code & 0xffff) != TRAP_HWBKPT)
 968     return false;
 969
 970   /* Make sure to ignore the top byte, otherwise we may not recognize a
 971      hardware watchpoint hit.  The stopped data addresses coming from the
 972      kernel can potentially be tagged addresses.  */
 973   struct gdbarch *gdbarch = thread_architecture (inferior_ptid);
 974   const CORE_ADDR addr_trap
 975     = address_significant (gdbarch, (CORE_ADDR) siginfo.si_addr);
 976
 977   /* Check if the address matches any watched address.  */
 978   state = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 979   for (i = aarch64_num_wp_regs - 1; i >= 0; --i)
 980     {
 981       const unsigned int offset
 982         = aarch64_watchpoint_offset (state->dr_ctrl_wp[i]);
 983       const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]);
 984       const CORE_ADDR addr_watch = state->dr_addr_wp[i] + offset;
 985       const CORE_ADDR addr_watch_aligned = align_down (state->dr_addr_wp[i], 8);
 986       const CORE_ADDR addr_orig = state->dr_addr_orig_wp[i];
 987
 988       if (state->dr_ref_count_wp[i]
 989           && DR_CONTROL_ENABLED (state->dr_ctrl_wp[i])
 990           && addr_trap >= addr_watch_aligned
 991           && addr_trap < addr_watch + len)
 992         {
 993           /* ADDR_TRAP reports the first address of the memory range
 994              accessed by the CPU, regardless of what was the memory
 995              range watched.  Thus, a large CPU access that straddles
 996              the ADDR_WATCH..ADDR_WATCH+LEN range may result in an
 997              ADDR_TRAP that is lower than the
 998              ADDR_WATCH..ADDR_WATCH+LEN range.  E.g.:
 999
1000              addr: |   4   |   5   |   6   |   7   |   8   |
1001                                    |---- range watched ----|
1002                    |----------- range accessed ------------|
1003
1004              In this case, ADDR_TRAP will be 4.
1005
1006              To match a watchpoint known to GDB core, we must never
1007              report *ADDR_P outside of any ADDR_WATCH..ADDR_WATCH+LEN
1008              range.  ADDR_WATCH <= ADDR_TRAP < ADDR_ORIG is a false
1009              positive on kernels older than 4.10.  See PR
1010              external/20207.  */
1011           *addr_p = addr_orig;
1012           return true;
1013         }
1014     }
1015
1016   return false;
1017 }
1018
1019 /* Implement the "stopped_by_watchpoint" target_ops method.  */
1020
1021 bool
1022 aarch64_linux_nat_target::stopped_by_watchpoint ()
1023 {
1024   CORE_ADDR addr;
1025
1026   return stopped_data_address (&addr);
1027 }
1028
1029 /* Implement the "watchpoint_addr_within_range" target_ops method.  */
1030
1031 bool
1032 aarch64_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr,
1033                                                         CORE_ADDR start, int length)
1034 {
1035   return start <= addr && start + length - 1 >= addr;
1036 }
1037
1038 /* Implement the "can_do_single_step" target_ops method.  */
1039
1040 int
1041 aarch64_linux_nat_target::can_do_single_step ()
1042 {
1043   return 1;
1044 }
1045
1046 /* Implement the "thread_architecture" target_ops method.  */
1047
1048 struct gdbarch *
1049 aarch64_linux_nat_target::thread_architecture (ptid_t ptid)
1050 {
1051   /* Return the gdbarch for the current thread.  If the vector length has
1052      changed since the last time this was called, then do a further lookup.  */
1053
1054   uint64_t vq = aarch64_sve_get_vq (ptid.lwp ());
1055
1056   /* Find the current gdbarch the same way as process_stratum_target.  Only
1057      return it if the current vector length matches the one in the tdep.  */
1058   inferior *inf = find_inferior_ptid (this, ptid);
1059   gdb_assert (inf != NULL);
1060   aarch64_gdbarch_tdep *tdep
1061     = (aarch64_gdbarch_tdep *) gdbarch_tdep (inf->gdbarch);
1062   if (vq == tdep->vq)
1063     return inf->gdbarch;
1064
1065   /* We reach here if the vector length for the thread is different from its
1066      value at process start.  Lookup gdbarch via info (potentially creating a
1067      new one), stashing the vector length inside id.  Use -1 for when SVE
1068      unavailable, to distinguish from an unset value of 0.  */
1069   struct gdbarch_info info;
1070   info.bfd_arch_info = bfd_lookup_arch (bfd_arch_aarch64, bfd_mach_aarch64);
1071   info.id = (int *) (vq == 0 ? -1 : vq);
1072   return gdbarch_find_by_info (info);
1073 }
1074
1075 /* Implement the "supports_memory_tagging" target_ops method.  */
1076
1077 bool
1078 aarch64_linux_nat_target::supports_memory_tagging ()
1079 {
1080   return (linux_get_hwcap2 (this) & HWCAP2_MTE) != 0;
1081 }
1082
1083 /* Implement the "fetch_memtags" target_ops method.  */
1084
1085 bool
1086 aarch64_linux_nat_target::fetch_memtags (CORE_ADDR address, size_t len,
1087                                          gdb::byte_vector &tags, int type)
1088 {
1089   int tid = get_ptrace_pid (inferior_ptid);
1090
1091   /* Allocation tags?  */
1092   if (type == static_cast<int> (aarch64_memtag_type::mte_allocation))
1093     return aarch64_mte_fetch_memtags (tid, address, len, tags);
1094
1095   return false;
1096 }
1097
1098 /* Implement the "store_memtags" target_ops method.  */
1099
1100 bool
1101 aarch64_linux_nat_target::store_memtags (CORE_ADDR address, size_t len,
1102                                          const gdb::byte_vector &tags, int type)
1103 {
1104   int tid = get_ptrace_pid (inferior_ptid);
1105
1106   /* Allocation tags?  */
1107   if (type == static_cast<int> (aarch64_memtag_type::mte_allocation))
1108     return aarch64_mte_store_memtags (tid, address, len, tags);
1109
1110   return false;
1111 }
1112
1113 /* Define AArch64 maintenance commands.  */
1114
1115 static void
1116 add_show_debug_regs_command (void)
1117 {
1118   /* A maintenance command to enable printing the internal DRi mirror
1119      variables.  */
1120   add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
1121                            &show_debug_regs, _("\
1122 Set whether to show variables that mirror the AArch64 debug registers."), _("\
1123 Show whether to show variables that mirror the AArch64 debug registers."), _("\
1124 Use \"on\" to enable, \"off\" to disable.\n\
1125 If enabled, the debug registers values are shown when GDB inserts\n\
1126 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
1127 triggers a breakpoint or watchpoint."),
1128                            NULL,
1129                            NULL,
1130                            &maintenance_set_cmdlist,
1131                            &maintenance_show_cmdlist);
1132 }
1133
1134 void _initialize_aarch64_linux_nat ();
1135 void
1136 _initialize_aarch64_linux_nat ()
1137 {
1138   add_show_debug_regs_command ();
1139
1140   /* Register the target.  */
1141   linux_target = &the_aarch64_linux_nat_target;
1142   add_inf_child_target (&the_aarch64_linux_nat_target);
1143 }