gdb/aarch64-tdep.h

   1 /* Common target dependent code for GDB on AArch64 systems.
   2
   3    Copyright (C) 2009-2022 Free Software Foundation, Inc.
   4    Contributed by ARM Ltd.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21
  22 #ifndef AARCH64_TDEP_H
  23 #define AARCH64_TDEP_H
  24
  25 #include "arch/aarch64.h"
  26 #include "displaced-stepping.h"
  27 #include "infrun.h"
  28 #include "gdbarch.h"
  29
  30 /* Forward declarations.  */
  31 struct gdbarch;
  32 struct regset;
  33
  34 /* AArch64 Dwarf register numbering.  */
  35 #define AARCH64_DWARF_X0   0
  36 #define AARCH64_DWARF_SP  31
  37 #define AARCH64_DWARF_PAUTH_RA_STATE  34
  38 #define AARCH64_DWARF_PAUTH_DMASK  35
  39 #define AARCH64_DWARF_PAUTH_CMASK  36
  40 #define AARCH64_DWARF_V0  64
  41 #define AARCH64_DWARF_SVE_VG   46
  42 #define AARCH64_DWARF_SVE_FFR  47
  43 #define AARCH64_DWARF_SVE_P0   48
  44 #define AARCH64_DWARF_SVE_Z0   96
  45
  46 /* Size of integer registers.  */
  47 #define X_REGISTER_SIZE  8
  48 #define B_REGISTER_SIZE  1
  49 #define H_REGISTER_SIZE  2
  50 #define S_REGISTER_SIZE  4
  51 #define D_REGISTER_SIZE  8
  52 #define Q_REGISTER_SIZE 16
  53
  54 /* Total number of general (X) registers.  */
  55 #define AARCH64_X_REGISTER_COUNT 32
  56 /* Total number of D registers.  */
  57 #define AARCH64_D_REGISTER_COUNT 32
  58
  59 /* The maximum number of modified instructions generated for one
  60    single-stepped instruction.  */
  61 #define AARCH64_DISPLACED_MODIFIED_INSNS 1
  62
  63 /* Target-dependent structure in gdbarch.  */
  64 struct aarch64_gdbarch_tdep : gdbarch_tdep
  65 {
  66   /* Lowest address at which instructions will appear.  */
  67   CORE_ADDR lowest_pc = 0;
  68
  69   /* Offset to PC value in jump buffer.  If this is negative, longjmp
  70      support will be disabled.  */
  71   int jb_pc = 0;
  72
  73   /* And the size of each entry in the buf.  */
  74   size_t jb_elt_size = 0;
  75
  76   /* Types for AdvSISD registers.  */
  77   struct type *vnq_type = nullptr;
  78   struct type *vnd_type = nullptr;
  79   struct type *vns_type = nullptr;
  80   struct type *vnh_type = nullptr;
  81   struct type *vnb_type = nullptr;
  82   struct type *vnv_type = nullptr;
  83
  84   /* syscall record.  */
  85   int (*aarch64_syscall_record) (struct regcache *regcache,
  86                                  unsigned long svc_number) = nullptr;
  87
  88   /* The VQ value for SVE targets, or zero if SVE is not supported.  */
  89   uint64_t vq = 0;
  90
  91   /* Returns true if the target supports SVE.  */
  92   bool has_sve () const
  93   {
  94     return vq != 0;
  95   }
  96
  97   int pauth_reg_base = 0;
  98   int pauth_ra_state_regnum = 0;
  99
 100   /* Returns true if the target supports pauth.  */
 101   bool has_pauth () const
 102   {
 103     return pauth_reg_base != -1;
 104   }
 105
 106   /* First MTE register.  This is -1 if no MTE registers are available.  */
 107   int mte_reg_base = 0;
 108
 109   /* Returns true if the target supports MTE.  */
 110   bool has_mte () const
 111   {
 112     return mte_reg_base != -1;
 113   }
 114 };
 115
 116 const target_desc *aarch64_read_description (uint64_t vq, bool pauth_p,
 117                                              bool mte_p);
 118
 119 extern int aarch64_process_record (struct gdbarch *gdbarch,
 120                                struct regcache *regcache, CORE_ADDR addr);
 121
 122 displaced_step_copy_insn_closure_up
 123   aarch64_displaced_step_copy_insn (struct gdbarch *gdbarch,
 124                                     CORE_ADDR from, CORE_ADDR to,
 125                                     struct regcache *regs);
 126
 127 void aarch64_displaced_step_fixup (struct gdbarch *gdbarch,
 128                                    displaced_step_copy_insn_closure *dsc,
 129                                    CORE_ADDR from, CORE_ADDR to,
 130                                    struct regcache *regs);
 131
 132 bool aarch64_displaced_step_hw_singlestep (struct gdbarch *gdbarch);
 133
 134 #endif /* aarch64-tdep.h */