1 /* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
3 Copyright (C) 1993-2017 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "frame-unwind.h"
24 #include "frame-base.h"
25 #include "dwarf2-frame.h"
36 #include "reggroups.h"
37 #include "arch-utils.h"
41 #include "trad-frame.h"
45 #include "alpha-tdep.h"
48 /* Instruction decoding. The notations for registers, immediates and
49 opcodes are the same as the one used in Compaq's Alpha architecture
52 #define INSN_OPCODE(insn) ((insn & 0xfc000000) >> 26)
54 /* Memory instruction format */
55 #define MEM_RA(insn) ((insn & 0x03e00000) >> 21)
56 #define MEM_RB(insn) ((insn & 0x001f0000) >> 16)
57 #define MEM_DISP(insn) \
58 (((insn & 0x8000) == 0) ? (insn & 0xffff) : -((-insn) & 0xffff))
60 static const int lda_opcode
= 0x08;
61 static const int stq_opcode
= 0x2d;
63 /* Branch instruction format */
64 #define BR_RA(insn) MEM_RA(insn)
66 static const int br_opcode
= 0x30;
67 static const int bne_opcode
= 0x3d;
69 /* Operate instruction format */
70 #define OPR_FUNCTION(insn) ((insn & 0xfe0) >> 5)
71 #define OPR_HAS_IMMEDIATE(insn) ((insn & 0x1000) == 0x1000)
72 #define OPR_RA(insn) MEM_RA(insn)
73 #define OPR_RC(insn) ((insn & 0x1f))
74 #define OPR_LIT(insn) ((insn & 0x1fe000) >> 13)
76 static const int subq_opcode
= 0x10;
77 static const int subq_function
= 0x29;
80 /* Return the name of the REGNO register.
82 An empty name corresponds to a register number that used to
83 be used for a virtual register. That virtual register has
84 been removed, but the index is still reserved to maintain
85 compatibility with existing remote alpha targets. */
88 alpha_register_name (struct gdbarch
*gdbarch
, int regno
)
90 static const char * const register_names
[] =
92 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
93 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
94 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
95 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
96 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
97 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
98 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
99 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
105 if (regno
>= ARRAY_SIZE(register_names
))
107 return register_names
[regno
];
111 alpha_cannot_fetch_register (struct gdbarch
*gdbarch
, int regno
)
113 return (strlen (alpha_register_name (gdbarch
, regno
)) == 0);
117 alpha_cannot_store_register (struct gdbarch
*gdbarch
, int regno
)
119 return (regno
== ALPHA_ZERO_REGNUM
120 || strlen (alpha_register_name (gdbarch
, regno
)) == 0);
124 alpha_register_type (struct gdbarch
*gdbarch
, int regno
)
126 if (regno
== ALPHA_SP_REGNUM
|| regno
== ALPHA_GP_REGNUM
)
127 return builtin_type (gdbarch
)->builtin_data_ptr
;
128 if (regno
== ALPHA_PC_REGNUM
)
129 return builtin_type (gdbarch
)->builtin_func_ptr
;
131 /* Don't need to worry about little vs big endian until
132 some jerk tries to port to alpha-unicosmk. */
133 if (regno
>= ALPHA_FP0_REGNUM
&& regno
< ALPHA_FP0_REGNUM
+ 31)
134 return builtin_type (gdbarch
)->builtin_double
;
136 return builtin_type (gdbarch
)->builtin_int64
;
139 /* Is REGNUM a member of REGGROUP? */
142 alpha_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
143 struct reggroup
*group
)
145 /* Filter out any registers eliminated, but whose regnum is
146 reserved for backward compatibility, e.g. the vfp. */
147 if (gdbarch_register_name (gdbarch
, regnum
) == NULL
148 || *gdbarch_register_name (gdbarch
, regnum
) == '\0')
151 if (group
== all_reggroup
)
154 /* Zero should not be saved or restored. Technically it is a general
155 register (just as $f31 would be a float if we represented it), but
156 there's no point displaying it during "info regs", so leave it out
157 of all groups except for "all". */
158 if (regnum
== ALPHA_ZERO_REGNUM
)
161 /* All other registers are saved and restored. */
162 if (group
== save_reggroup
|| group
== restore_reggroup
)
165 /* All other groups are non-overlapping. */
167 /* Since this is really a PALcode memory slot... */
168 if (regnum
== ALPHA_UNIQUE_REGNUM
)
169 return group
== system_reggroup
;
171 /* Force the FPCR to be considered part of the floating point state. */
172 if (regnum
== ALPHA_FPCR_REGNUM
)
173 return group
== float_reggroup
;
175 if (regnum
>= ALPHA_FP0_REGNUM
&& regnum
< ALPHA_FP0_REGNUM
+ 31)
176 return group
== float_reggroup
;
178 return group
== general_reggroup
;
181 /* The following represents exactly the conversion performed by
182 the LDS instruction. This applies to both single-precision
183 floating point and 32-bit integers. */
186 alpha_lds (struct gdbarch
*gdbarch
, void *out
, const void *in
)
188 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
190 = extract_unsigned_integer ((const gdb_byte
*) in
, 4, byte_order
);
191 ULONGEST frac
= (mem
>> 0) & 0x7fffff;
192 ULONGEST sign
= (mem
>> 31) & 1;
193 ULONGEST exp_msb
= (mem
>> 30) & 1;
194 ULONGEST exp_low
= (mem
>> 23) & 0x7f;
197 exp
= (exp_msb
<< 10) | exp_low
;
209 reg
= (sign
<< 63) | (exp
<< 52) | (frac
<< 29);
210 store_unsigned_integer ((gdb_byte
*) out
, 8, byte_order
, reg
);
213 /* Similarly, this represents exactly the conversion performed by
214 the STS instruction. */
217 alpha_sts (struct gdbarch
*gdbarch
, void *out
, const void *in
)
219 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
222 reg
= extract_unsigned_integer ((const gdb_byte
*) in
, 8, byte_order
);
223 mem
= ((reg
>> 32) & 0xc0000000) | ((reg
>> 29) & 0x3fffffff);
224 store_unsigned_integer ((gdb_byte
*) out
, 4, byte_order
, mem
);
227 /* The alpha needs a conversion between register and memory format if the
228 register is a floating point register and memory format is float, as the
229 register format must be double or memory format is an integer with 4
230 bytes, as the representation of integers in floating point
231 registers is different. */
234 alpha_convert_register_p (struct gdbarch
*gdbarch
, int regno
,
237 return (regno
>= ALPHA_FP0_REGNUM
&& regno
< ALPHA_FP0_REGNUM
+ 31
238 && TYPE_LENGTH (type
) == 4);
242 alpha_register_to_value (struct frame_info
*frame
, int regnum
,
243 struct type
*valtype
, gdb_byte
*out
,
244 int *optimizedp
, int *unavailablep
)
246 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
247 struct value
*value
= get_frame_register_value (frame
, regnum
);
249 gdb_assert (value
!= NULL
);
250 *optimizedp
= value_optimized_out (value
);
251 *unavailablep
= !value_entirely_available (value
);
253 if (*optimizedp
|| *unavailablep
)
255 release_value (value
);
260 /* Convert to VALTYPE. */
262 gdb_assert (TYPE_LENGTH (valtype
) == 4);
263 alpha_sts (gdbarch
, out
, value_contents_all (value
));
265 release_value (value
);
271 alpha_value_to_register (struct frame_info
*frame
, int regnum
,
272 struct type
*valtype
, const gdb_byte
*in
)
274 gdb_byte out
[ALPHA_REGISTER_SIZE
];
276 gdb_assert (TYPE_LENGTH (valtype
) == 4);
277 gdb_assert (register_size (get_frame_arch (frame
), regnum
)
278 <= ALPHA_REGISTER_SIZE
);
279 alpha_lds (get_frame_arch (frame
), out
, in
);
281 put_frame_register (frame
, regnum
, out
);
285 /* The alpha passes the first six arguments in the registers, the rest on
286 the stack. The register arguments are stored in ARG_REG_BUFFER, and
287 then moved into the register file; this simplifies the passing of a
288 large struct which extends from the registers to the stack, plus avoids
289 three ptrace invocations per word.
291 We don't bother tracking which register values should go in integer
292 regs or fp regs; we load the same values into both.
294 If the called function is returning a structure, the address of the
295 structure to be returned is passed as a hidden first argument. */
298 alpha_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
299 struct regcache
*regcache
, CORE_ADDR bp_addr
,
300 int nargs
, struct value
**args
, CORE_ADDR sp
,
301 int struct_return
, CORE_ADDR struct_addr
)
303 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
305 int accumulate_size
= struct_return
? 8 : 0;
308 const gdb_byte
*contents
;
312 struct alpha_arg
*alpha_args
= XALLOCAVEC (struct alpha_arg
, nargs
);
313 struct alpha_arg
*m_arg
;
314 gdb_byte arg_reg_buffer
[ALPHA_REGISTER_SIZE
* ALPHA_NUM_ARG_REGS
];
315 int required_arg_regs
;
316 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
318 /* The ABI places the address of the called function in T12. */
319 regcache_cooked_write_signed (regcache
, ALPHA_T12_REGNUM
, func_addr
);
321 /* Set the return address register to point to the entry point
322 of the program, where a breakpoint lies in wait. */
323 regcache_cooked_write_signed (regcache
, ALPHA_RA_REGNUM
, bp_addr
);
325 /* Lay out the arguments in memory. */
326 for (i
= 0, m_arg
= alpha_args
; i
< nargs
; i
++, m_arg
++)
328 struct value
*arg
= args
[i
];
329 struct type
*arg_type
= check_typedef (value_type (arg
));
331 /* Cast argument to long if necessary as the compiler does it too. */
332 switch (TYPE_CODE (arg_type
))
337 case TYPE_CODE_RANGE
:
339 if (TYPE_LENGTH (arg_type
) == 4)
341 /* 32-bit values must be sign-extended to 64 bits
342 even if the base data type is unsigned. */
343 arg_type
= builtin_type (gdbarch
)->builtin_int32
;
344 arg
= value_cast (arg_type
, arg
);
346 if (TYPE_LENGTH (arg_type
) < ALPHA_REGISTER_SIZE
)
348 arg_type
= builtin_type (gdbarch
)->builtin_int64
;
349 arg
= value_cast (arg_type
, arg
);
354 /* "float" arguments loaded in registers must be passed in
355 register format, aka "double". */
356 if (accumulate_size
< sizeof (arg_reg_buffer
)
357 && TYPE_LENGTH (arg_type
) == 4)
359 arg_type
= builtin_type (gdbarch
)->builtin_double
;
360 arg
= value_cast (arg_type
, arg
);
362 /* Tru64 5.1 has a 128-bit long double, and passes this by
363 invisible reference. No one else uses this data type. */
364 else if (TYPE_LENGTH (arg_type
) == 16)
366 /* Allocate aligned storage. */
367 sp
= (sp
& -16) - 16;
369 /* Write the real data into the stack. */
370 write_memory (sp
, value_contents (arg
), 16);
372 /* Construct the indirection. */
373 arg_type
= lookup_pointer_type (arg_type
);
374 arg
= value_from_pointer (arg_type
, sp
);
378 case TYPE_CODE_COMPLEX
:
379 /* ??? The ABI says that complex values are passed as two
380 separate scalar values. This distinction only matters
381 for complex float. However, GCC does not implement this. */
383 /* Tru64 5.1 has a 128-bit long double, and passes this by
384 invisible reference. */
385 if (TYPE_LENGTH (arg_type
) == 32)
387 /* Allocate aligned storage. */
388 sp
= (sp
& -16) - 16;
390 /* Write the real data into the stack. */
391 write_memory (sp
, value_contents (arg
), 32);
393 /* Construct the indirection. */
394 arg_type
= lookup_pointer_type (arg_type
);
395 arg
= value_from_pointer (arg_type
, sp
);
402 m_arg
->len
= TYPE_LENGTH (arg_type
);
403 m_arg
->offset
= accumulate_size
;
404 accumulate_size
= (accumulate_size
+ m_arg
->len
+ 7) & ~7;
405 m_arg
->contents
= value_contents (arg
);
408 /* Determine required argument register loads, loading an argument register
409 is expensive as it uses three ptrace calls. */
410 required_arg_regs
= accumulate_size
/ 8;
411 if (required_arg_regs
> ALPHA_NUM_ARG_REGS
)
412 required_arg_regs
= ALPHA_NUM_ARG_REGS
;
414 /* Make room for the arguments on the stack. */
415 if (accumulate_size
< sizeof(arg_reg_buffer
))
418 accumulate_size
-= sizeof(arg_reg_buffer
);
419 sp
-= accumulate_size
;
421 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
424 /* `Push' arguments on the stack. */
425 for (i
= nargs
; m_arg
--, --i
>= 0;)
427 const gdb_byte
*contents
= m_arg
->contents
;
428 int offset
= m_arg
->offset
;
429 int len
= m_arg
->len
;
431 /* Copy the bytes destined for registers into arg_reg_buffer. */
432 if (offset
< sizeof(arg_reg_buffer
))
434 if (offset
+ len
<= sizeof(arg_reg_buffer
))
436 memcpy (arg_reg_buffer
+ offset
, contents
, len
);
441 int tlen
= sizeof(arg_reg_buffer
) - offset
;
442 memcpy (arg_reg_buffer
+ offset
, contents
, tlen
);
449 /* Everything else goes to the stack. */
450 write_memory (sp
+ offset
- sizeof(arg_reg_buffer
), contents
, len
);
453 store_unsigned_integer (arg_reg_buffer
, ALPHA_REGISTER_SIZE
,
454 byte_order
, struct_addr
);
456 /* Load the argument registers. */
457 for (i
= 0; i
< required_arg_regs
; i
++)
459 regcache_cooked_write (regcache
, ALPHA_A0_REGNUM
+ i
,
460 arg_reg_buffer
+ i
*ALPHA_REGISTER_SIZE
);
461 regcache_cooked_write (regcache
, ALPHA_FPA0_REGNUM
+ i
,
462 arg_reg_buffer
+ i
*ALPHA_REGISTER_SIZE
);
465 /* Finally, update the stack pointer. */
466 regcache_cooked_write_signed (regcache
, ALPHA_SP_REGNUM
, sp
);
471 /* Extract from REGCACHE the value about to be returned from a function
472 and copy it into VALBUF. */
475 alpha_extract_return_value (struct type
*valtype
, struct regcache
*regcache
,
478 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
479 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
480 gdb_byte raw_buffer
[ALPHA_REGISTER_SIZE
];
483 switch (TYPE_CODE (valtype
))
486 switch (TYPE_LENGTH (valtype
))
489 regcache_cooked_read (regcache
, ALPHA_FP0_REGNUM
, raw_buffer
);
490 alpha_sts (gdbarch
, valbuf
, raw_buffer
);
494 regcache_cooked_read (regcache
, ALPHA_FP0_REGNUM
, valbuf
);
498 regcache_cooked_read_unsigned (regcache
, ALPHA_V0_REGNUM
, &l
);
499 read_memory (l
, valbuf
, 16);
503 internal_error (__FILE__
, __LINE__
,
504 _("unknown floating point width"));
508 case TYPE_CODE_COMPLEX
:
509 switch (TYPE_LENGTH (valtype
))
512 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
513 regcache_cooked_read (regcache
, ALPHA_FP0_REGNUM
, valbuf
);
517 regcache_cooked_read (regcache
, ALPHA_FP0_REGNUM
, valbuf
);
518 regcache_cooked_read (regcache
, ALPHA_FP0_REGNUM
+ 1, valbuf
+ 8);
522 regcache_cooked_read_unsigned (regcache
, ALPHA_V0_REGNUM
, &l
);
523 read_memory (l
, valbuf
, 32);
527 internal_error (__FILE__
, __LINE__
,
528 _("unknown floating point width"));
533 /* Assume everything else degenerates to an integer. */
534 regcache_cooked_read_unsigned (regcache
, ALPHA_V0_REGNUM
, &l
);
535 store_unsigned_integer (valbuf
, TYPE_LENGTH (valtype
), byte_order
, l
);
540 /* Insert the given value into REGCACHE as if it was being
541 returned by a function. */
544 alpha_store_return_value (struct type
*valtype
, struct regcache
*regcache
,
545 const gdb_byte
*valbuf
)
547 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
548 gdb_byte raw_buffer
[ALPHA_REGISTER_SIZE
];
551 switch (TYPE_CODE (valtype
))
554 switch (TYPE_LENGTH (valtype
))
557 alpha_lds (gdbarch
, raw_buffer
, valbuf
);
558 regcache_cooked_write (regcache
, ALPHA_FP0_REGNUM
, raw_buffer
);
562 regcache_cooked_write (regcache
, ALPHA_FP0_REGNUM
, valbuf
);
566 /* FIXME: 128-bit long doubles are returned like structures:
567 by writing into indirect storage provided by the caller
568 as the first argument. */
569 error (_("Cannot set a 128-bit long double return value."));
572 internal_error (__FILE__
, __LINE__
,
573 _("unknown floating point width"));
577 case TYPE_CODE_COMPLEX
:
578 switch (TYPE_LENGTH (valtype
))
581 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
582 regcache_cooked_write (regcache
, ALPHA_FP0_REGNUM
, valbuf
);
586 regcache_cooked_write (regcache
, ALPHA_FP0_REGNUM
, valbuf
);
587 regcache_cooked_write (regcache
, ALPHA_FP0_REGNUM
+ 1, valbuf
+ 8);
591 /* FIXME: 128-bit long doubles are returned like structures:
592 by writing into indirect storage provided by the caller
593 as the first argument. */
594 error (_("Cannot set a 128-bit long double return value."));
597 internal_error (__FILE__
, __LINE__
,
598 _("unknown floating point width"));
603 /* Assume everything else degenerates to an integer. */
604 /* 32-bit values must be sign-extended to 64 bits
605 even if the base data type is unsigned. */
606 if (TYPE_LENGTH (valtype
) == 4)
607 valtype
= builtin_type (gdbarch
)->builtin_int32
;
608 l
= unpack_long (valtype
, valbuf
);
609 regcache_cooked_write_unsigned (regcache
, ALPHA_V0_REGNUM
, l
);
614 static enum return_value_convention
615 alpha_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
616 struct type
*type
, struct regcache
*regcache
,
617 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
619 enum type_code code
= TYPE_CODE (type
);
621 if ((code
== TYPE_CODE_STRUCT
622 || code
== TYPE_CODE_UNION
623 || code
== TYPE_CODE_ARRAY
)
624 && gdbarch_tdep (gdbarch
)->return_in_memory (type
))
629 regcache_raw_read_unsigned (regcache
, ALPHA_V0_REGNUM
, &addr
);
630 read_memory (addr
, readbuf
, TYPE_LENGTH (type
));
633 return RETURN_VALUE_ABI_RETURNS_ADDRESS
;
637 alpha_extract_return_value (type
, regcache
, readbuf
);
639 alpha_store_return_value (type
, regcache
, writebuf
);
641 return RETURN_VALUE_REGISTER_CONVENTION
;
645 alpha_return_in_memory_always (struct type
*type
)
651 constexpr gdb_byte alpha_break_insn
[] = { 0x80, 0, 0, 0 }; /* call_pal bpt */
653 typedef BP_MANIPULATION (alpha_break_insn
) alpha_breakpoint
;
656 /* This returns the PC of the first insn after the prologue.
657 If we can't find the prologue, then return 0. */
660 alpha_after_prologue (CORE_ADDR pc
)
662 struct symtab_and_line sal
;
663 CORE_ADDR func_addr
, func_end
;
665 if (!find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
668 sal
= find_pc_line (func_addr
, 0);
669 if (sal
.end
< func_end
)
672 /* The line after the prologue is after the end of the function. In this
673 case, tell the caller to find the prologue the hard way. */
677 /* Read an instruction from memory at PC, looking through breakpoints. */
680 alpha_read_insn (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
682 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
683 gdb_byte buf
[ALPHA_INSN_SIZE
];
686 res
= target_read_memory (pc
, buf
, sizeof (buf
));
688 memory_error (TARGET_XFER_E_IO
, pc
);
689 return extract_unsigned_integer (buf
, sizeof (buf
), byte_order
);
692 /* To skip prologues, I use this predicate. Returns either PC itself
693 if the code at PC does not look like a function prologue; otherwise
694 returns an address that (if we're lucky) follows the prologue. If
695 LENIENT, then we must skip everything which is involved in setting
696 up the frame (it's OK to skip more, just so long as we don't skip
697 anything which might clobber the registers which are being saved. */
700 alpha_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
704 CORE_ADDR post_prologue_pc
;
705 gdb_byte buf
[ALPHA_INSN_SIZE
];
707 /* Silently return the unaltered pc upon memory errors.
708 This could happen on OSF/1 if decode_line_1 tries to skip the
709 prologue for quickstarted shared library functions when the
710 shared library is not yet mapped in.
711 Reading target memory is slow over serial lines, so we perform
712 this check only if the target has shared libraries (which all
713 Alpha targets do). */
714 if (target_read_memory (pc
, buf
, sizeof (buf
)))
717 /* See if we can determine the end of the prologue via the symbol table.
718 If so, then return either PC, or the PC after the prologue, whichever
721 post_prologue_pc
= alpha_after_prologue (pc
);
722 if (post_prologue_pc
!= 0)
723 return std::max (pc
, post_prologue_pc
);
725 /* Can't determine prologue from the symbol table, need to examine
728 /* Skip the typical prologue instructions. These are the stack adjustment
729 instruction and the instructions that save registers on the stack
730 or in the gcc frame. */
731 for (offset
= 0; offset
< 100; offset
+= ALPHA_INSN_SIZE
)
733 inst
= alpha_read_insn (gdbarch
, pc
+ offset
);
735 if ((inst
& 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
737 if ((inst
& 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
739 if ((inst
& 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
741 if ((inst
& 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
744 if (((inst
& 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
745 || (inst
& 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
746 && (inst
& 0x03e00000) != 0x03e00000) /* reg != $zero */
749 if (inst
== 0x47de040f) /* bis sp,sp,fp */
751 if (inst
== 0x47fe040f) /* bis zero,sp,fp */
760 static const int ldl_l_opcode
= 0x2a;
761 static const int ldq_l_opcode
= 0x2b;
762 static const int stl_c_opcode
= 0x2e;
763 static const int stq_c_opcode
= 0x2f;
765 /* Checks for an atomic sequence of instructions beginning with a LDL_L/LDQ_L
766 instruction and ending with a STL_C/STQ_C instruction. If such a sequence
767 is found, attempt to step through it. A breakpoint is placed at the end of
770 static std::vector
<CORE_ADDR
>
771 alpha_deal_with_atomic_sequence (struct regcache
*regcache
)
773 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
774 CORE_ADDR pc
= regcache_read_pc (regcache
);
775 CORE_ADDR breaks
[2] = {-1, -1};
777 CORE_ADDR closing_insn
; /* Instruction that closes the atomic sequence. */
778 unsigned int insn
= alpha_read_insn (gdbarch
, loc
);
781 int last_breakpoint
= 0; /* Defaults to 0 (no breakpoints placed). */
782 const int atomic_sequence_length
= 16; /* Instruction sequence length. */
783 int bc_insn_count
= 0; /* Conditional branch instruction count. */
785 /* Assume all atomic sequences start with a LDL_L/LDQ_L instruction. */
786 if (INSN_OPCODE (insn
) != ldl_l_opcode
787 && INSN_OPCODE (insn
) != ldq_l_opcode
)
790 /* Assume that no atomic sequence is longer than "atomic_sequence_length"
792 for (insn_count
= 0; insn_count
< atomic_sequence_length
; ++insn_count
)
794 loc
+= ALPHA_INSN_SIZE
;
795 insn
= alpha_read_insn (gdbarch
, loc
);
797 /* Assume that there is at most one branch in the atomic
798 sequence. If a branch is found, put a breakpoint in
799 its destination address. */
800 if (INSN_OPCODE (insn
) >= br_opcode
)
802 int immediate
= (insn
& 0x001fffff) << 2;
804 immediate
= (immediate
^ 0x400000) - 0x400000;
806 if (bc_insn_count
>= 1)
807 return {}; /* More than one branch found, fallback
808 to the standard single-step code. */
810 breaks
[1] = loc
+ ALPHA_INSN_SIZE
+ immediate
;
816 if (INSN_OPCODE (insn
) == stl_c_opcode
817 || INSN_OPCODE (insn
) == stq_c_opcode
)
821 /* Assume that the atomic sequence ends with a STL_C/STQ_C instruction. */
822 if (INSN_OPCODE (insn
) != stl_c_opcode
823 && INSN_OPCODE (insn
) != stq_c_opcode
)
827 loc
+= ALPHA_INSN_SIZE
;
829 /* Insert a breakpoint right after the end of the atomic sequence. */
832 /* Check for duplicated breakpoints. Check also for a breakpoint
833 placed (branch instruction's destination) anywhere in sequence. */
835 && (breaks
[1] == breaks
[0]
836 || (breaks
[1] >= pc
&& breaks
[1] <= closing_insn
)))
839 std::vector
<CORE_ADDR
> next_pcs
;
841 for (index
= 0; index
<= last_breakpoint
; index
++)
842 next_pcs
.push_back (breaks
[index
]);
848 /* Figure out where the longjmp will land.
849 We expect the first arg to be a pointer to the jmp_buf structure from
850 which we extract the PC (JB_PC) that we will land at. The PC is copied
851 into the "pc". This routine returns true on success. */
854 alpha_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
856 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
857 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
858 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
860 gdb_byte raw_buffer
[ALPHA_REGISTER_SIZE
];
862 jb_addr
= get_frame_register_unsigned (frame
, ALPHA_A0_REGNUM
);
864 if (target_read_memory (jb_addr
+ (tdep
->jb_pc
* tdep
->jb_elt_size
),
865 raw_buffer
, tdep
->jb_elt_size
))
868 *pc
= extract_unsigned_integer (raw_buffer
, tdep
->jb_elt_size
, byte_order
);
873 /* Frame unwinder for signal trampolines. We use alpha tdep bits that
874 describe the location and shape of the sigcontext structure. After
875 that, all registers are in memory, so it's easy. */
876 /* ??? Shouldn't we be able to do this generically, rather than with
877 OSABI data specific to Alpha? */
879 struct alpha_sigtramp_unwind_cache
881 CORE_ADDR sigcontext_addr
;
884 static struct alpha_sigtramp_unwind_cache
*
885 alpha_sigtramp_frame_unwind_cache (struct frame_info
*this_frame
,
886 void **this_prologue_cache
)
888 struct alpha_sigtramp_unwind_cache
*info
;
889 struct gdbarch_tdep
*tdep
;
891 if (*this_prologue_cache
)
892 return (struct alpha_sigtramp_unwind_cache
*) *this_prologue_cache
;
894 info
= FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache
);
895 *this_prologue_cache
= info
;
897 tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
898 info
->sigcontext_addr
= tdep
->sigcontext_addr (this_frame
);
903 /* Return the address of REGNUM in a sigtramp frame. Since this is
904 all arithmetic, it doesn't seem worthwhile to cache it. */
907 alpha_sigtramp_register_address (struct gdbarch
*gdbarch
,
908 CORE_ADDR sigcontext_addr
, int regnum
)
910 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
912 if (regnum
>= 0 && regnum
< 32)
913 return sigcontext_addr
+ tdep
->sc_regs_offset
+ regnum
* 8;
914 else if (regnum
>= ALPHA_FP0_REGNUM
&& regnum
< ALPHA_FP0_REGNUM
+ 32)
915 return sigcontext_addr
+ tdep
->sc_fpregs_offset
+ regnum
* 8;
916 else if (regnum
== ALPHA_PC_REGNUM
)
917 return sigcontext_addr
+ tdep
->sc_pc_offset
;
922 /* Given a GDB frame, determine the address of the calling function's
923 frame. This will be used to create a new GDB frame struct. */
926 alpha_sigtramp_frame_this_id (struct frame_info
*this_frame
,
927 void **this_prologue_cache
,
928 struct frame_id
*this_id
)
930 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
931 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
932 struct alpha_sigtramp_unwind_cache
*info
933 = alpha_sigtramp_frame_unwind_cache (this_frame
, this_prologue_cache
);
934 CORE_ADDR stack_addr
, code_addr
;
936 /* If the OSABI couldn't locate the sigcontext, give up. */
937 if (info
->sigcontext_addr
== 0)
940 /* If we have dynamic signal trampolines, find their start.
941 If we do not, then we must assume there is a symbol record
942 that can provide the start address. */
943 if (tdep
->dynamic_sigtramp_offset
)
946 code_addr
= get_frame_pc (this_frame
);
947 offset
= tdep
->dynamic_sigtramp_offset (gdbarch
, code_addr
);
954 code_addr
= get_frame_func (this_frame
);
956 /* The stack address is trivially read from the sigcontext. */
957 stack_addr
= alpha_sigtramp_register_address (gdbarch
, info
->sigcontext_addr
,
959 stack_addr
= get_frame_memory_unsigned (this_frame
, stack_addr
,
960 ALPHA_REGISTER_SIZE
);
962 *this_id
= frame_id_build (stack_addr
, code_addr
);
965 /* Retrieve the value of REGNUM in FRAME. Don't give up! */
967 static struct value
*
968 alpha_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
969 void **this_prologue_cache
, int regnum
)
971 struct alpha_sigtramp_unwind_cache
*info
972 = alpha_sigtramp_frame_unwind_cache (this_frame
, this_prologue_cache
);
975 if (info
->sigcontext_addr
!= 0)
977 /* All integer and fp registers are stored in memory. */
978 addr
= alpha_sigtramp_register_address (get_frame_arch (this_frame
),
979 info
->sigcontext_addr
, regnum
);
981 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
984 /* This extra register may actually be in the sigcontext, but our
985 current description of it in alpha_sigtramp_frame_unwind_cache
986 doesn't include it. Too bad. Fall back on whatever's in the
988 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
992 alpha_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
993 struct frame_info
*this_frame
,
994 void **this_prologue_cache
)
996 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
997 CORE_ADDR pc
= get_frame_pc (this_frame
);
1000 /* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead
1001 look at tramp-frame.h and other simplier per-architecture
1002 sigtramp unwinders. */
1004 /* We shouldn't even bother to try if the OSABI didn't register a
1005 sigcontext_addr handler or pc_in_sigtramp hander. */
1006 if (gdbarch_tdep (gdbarch
)->sigcontext_addr
== NULL
)
1008 if (gdbarch_tdep (gdbarch
)->pc_in_sigtramp
== NULL
)
1011 /* Otherwise we should be in a signal frame. */
1012 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
1013 if (gdbarch_tdep (gdbarch
)->pc_in_sigtramp (gdbarch
, pc
, name
))
1019 static const struct frame_unwind alpha_sigtramp_frame_unwind
= {
1021 default_frame_unwind_stop_reason
,
1022 alpha_sigtramp_frame_this_id
,
1023 alpha_sigtramp_frame_prev_register
,
1025 alpha_sigtramp_frame_sniffer
1030 /* Heuristic_proc_start may hunt through the text section for a long
1031 time across a 2400 baud serial line. Allows the user to limit this
1033 static int heuristic_fence_post
= 0;
1035 /* Attempt to locate the start of the function containing PC. We assume that
1036 the previous function ends with an about_to_return insn. Not foolproof by
1037 any means, since gcc is happy to put the epilogue in the middle of a
1038 function. But we're guessing anyway... */
1041 alpha_heuristic_proc_start (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1043 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
1044 CORE_ADDR last_non_nop
= pc
;
1045 CORE_ADDR fence
= pc
- heuristic_fence_post
;
1046 CORE_ADDR orig_pc
= pc
;
1048 struct inferior
*inf
;
1053 /* First see if we can find the start of the function from minimal
1054 symbol information. This can succeed with a binary that doesn't
1055 have debug info, but hasn't been stripped. */
1056 func
= get_pc_function_start (pc
);
1060 if (heuristic_fence_post
== -1
1061 || fence
< tdep
->vm_min_address
)
1062 fence
= tdep
->vm_min_address
;
1064 /* Search back for previous return; also stop at a 0, which might be
1065 seen for instance before the start of a code section. Don't include
1066 nops, since this usually indicates padding between functions. */
1067 for (pc
-= ALPHA_INSN_SIZE
; pc
>= fence
; pc
-= ALPHA_INSN_SIZE
)
1069 unsigned int insn
= alpha_read_insn (gdbarch
, pc
);
1072 case 0: /* invalid insn */
1073 case 0x6bfa8001: /* ret $31,($26),1 */
1074 return last_non_nop
;
1076 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
1077 case 0x47ff041f: /* nop: bis $31,$31,$31 */
1086 inf
= current_inferior ();
1088 /* It's not clear to me why we reach this point when stopping quietly,
1089 but with this test, at least we don't print out warnings for every
1090 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
1091 if (inf
->control
.stop_soon
== NO_STOP_QUIETLY
)
1093 static int blurb_printed
= 0;
1095 if (fence
== tdep
->vm_min_address
)
1096 warning (_("Hit beginning of text section without finding \
1097 enclosing function for address %s"), paddress (gdbarch
, orig_pc
));
1099 warning (_("Hit heuristic-fence-post without finding \
1100 enclosing function for address %s"), paddress (gdbarch
, orig_pc
));
1104 printf_filtered (_("\
1105 This warning occurs if you are debugging a function without any symbols\n\
1106 (for example, in a stripped executable). In that case, you may wish to\n\
1107 increase the size of the search with the `set heuristic-fence-post' command.\n\
1109 Otherwise, you told GDB there was a function where there isn't one, or\n\
1110 (more likely) you have encountered a bug in GDB.\n"));
1118 /* Fallback alpha frame unwinder. Uses instruction scanning and knows
1119 something about the traditional layout of alpha stack frames. */
1121 struct alpha_heuristic_unwind_cache
1125 struct trad_frame_saved_reg
*saved_regs
;
1129 /* If a probing loop sequence starts at PC, simulate it and compute
1130 FRAME_SIZE and PC after its execution. Otherwise, return with PC and
1131 FRAME_SIZE unchanged. */
1134 alpha_heuristic_analyze_probing_loop (struct gdbarch
*gdbarch
, CORE_ADDR
*pc
,
1137 CORE_ADDR cur_pc
= *pc
;
1138 int cur_frame_size
= *frame_size
;
1139 int nb_of_iterations
, reg_index
, reg_probe
;
1142 /* The following pattern is recognized as a probing loop:
1144 lda REG_INDEX,NB_OF_ITERATIONS
1145 lda REG_PROBE,<immediate>(sp)
1148 stq zero,<immediate>(REG_PROBE)
1149 subq REG_INDEX,0x1,REG_INDEX
1150 lda REG_PROBE,<immediate>(REG_PROBE)
1151 bne REG_INDEX, LOOP_START
1153 lda sp,<immediate>(REG_PROBE)
1155 If anything different is found, the function returns without
1156 changing PC and FRAME_SIZE. Otherwise, PC will point immediately
1157 after this sequence, and FRAME_SIZE will be updated. */
1159 /* lda REG_INDEX,NB_OF_ITERATIONS */
1161 insn
= alpha_read_insn (gdbarch
, cur_pc
);
1162 if (INSN_OPCODE (insn
) != lda_opcode
)
1164 reg_index
= MEM_RA (insn
);
1165 nb_of_iterations
= MEM_DISP (insn
);
1167 /* lda REG_PROBE,<immediate>(sp) */
1169 cur_pc
+= ALPHA_INSN_SIZE
;
1170 insn
= alpha_read_insn (gdbarch
, cur_pc
);
1171 if (INSN_OPCODE (insn
) != lda_opcode
1172 || MEM_RB (insn
) != ALPHA_SP_REGNUM
)
1174 reg_probe
= MEM_RA (insn
);
1175 cur_frame_size
-= MEM_DISP (insn
);
1177 /* stq zero,<immediate>(REG_PROBE) */
1179 cur_pc
+= ALPHA_INSN_SIZE
;
1180 insn
= alpha_read_insn (gdbarch
, cur_pc
);
1181 if (INSN_OPCODE (insn
) != stq_opcode
1182 || MEM_RA (insn
) != 0x1f
1183 || MEM_RB (insn
) != reg_probe
)
1186 /* subq REG_INDEX,0x1,REG_INDEX */
1188 cur_pc
+= ALPHA_INSN_SIZE
;
1189 insn
= alpha_read_insn (gdbarch
, cur_pc
);
1190 if (INSN_OPCODE (insn
) != subq_opcode
1191 || !OPR_HAS_IMMEDIATE (insn
)
1192 || OPR_FUNCTION (insn
) != subq_function
1193 || OPR_LIT(insn
) != 1
1194 || OPR_RA (insn
) != reg_index
1195 || OPR_RC (insn
) != reg_index
)
1198 /* lda REG_PROBE,<immediate>(REG_PROBE) */
1200 cur_pc
+= ALPHA_INSN_SIZE
;
1201 insn
= alpha_read_insn (gdbarch
, cur_pc
);
1202 if (INSN_OPCODE (insn
) != lda_opcode
1203 || MEM_RA (insn
) != reg_probe
1204 || MEM_RB (insn
) != reg_probe
)
1206 cur_frame_size
-= MEM_DISP (insn
) * nb_of_iterations
;
1208 /* bne REG_INDEX, LOOP_START */
1210 cur_pc
+= ALPHA_INSN_SIZE
;
1211 insn
= alpha_read_insn (gdbarch
, cur_pc
);
1212 if (INSN_OPCODE (insn
) != bne_opcode
1213 || MEM_RA (insn
) != reg_index
)
1216 /* lda sp,<immediate>(REG_PROBE) */
1218 cur_pc
+= ALPHA_INSN_SIZE
;
1219 insn
= alpha_read_insn (gdbarch
, cur_pc
);
1220 if (INSN_OPCODE (insn
) != lda_opcode
1221 || MEM_RA (insn
) != ALPHA_SP_REGNUM
1222 || MEM_RB (insn
) != reg_probe
)
1224 cur_frame_size
-= MEM_DISP (insn
);
1227 *frame_size
= cur_frame_size
;
1230 static struct alpha_heuristic_unwind_cache
*
1231 alpha_heuristic_frame_unwind_cache (struct frame_info
*this_frame
,
1232 void **this_prologue_cache
,
1235 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1236 struct alpha_heuristic_unwind_cache
*info
;
1238 CORE_ADDR limit_pc
, cur_pc
;
1239 int frame_reg
, frame_size
, return_reg
, reg
;
1241 if (*this_prologue_cache
)
1242 return (struct alpha_heuristic_unwind_cache
*) *this_prologue_cache
;
1244 info
= FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache
);
1245 *this_prologue_cache
= info
;
1246 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
1248 limit_pc
= get_frame_pc (this_frame
);
1250 start_pc
= alpha_heuristic_proc_start (gdbarch
, limit_pc
);
1251 info
->start_pc
= start_pc
;
1253 frame_reg
= ALPHA_SP_REGNUM
;
1257 /* If we've identified a likely place to start, do code scanning. */
1260 /* Limit the forward search to 50 instructions. */
1261 if (start_pc
+ 200 < limit_pc
)
1262 limit_pc
= start_pc
+ 200;
1264 for (cur_pc
= start_pc
; cur_pc
< limit_pc
; cur_pc
+= ALPHA_INSN_SIZE
)
1266 unsigned int word
= alpha_read_insn (gdbarch
, cur_pc
);
1268 if ((word
& 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
1272 /* Consider only the first stack allocation instruction
1273 to contain the static size of the frame. */
1274 if (frame_size
== 0)
1275 frame_size
= (-word
) & 0xffff;
1279 /* Exit loop if a positive stack adjustment is found, which
1280 usually means that the stack cleanup code in the function
1281 epilogue is reached. */
1285 else if ((word
& 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1287 reg
= (word
& 0x03e00000) >> 21;
1289 /* Ignore this instruction if we have already encountered
1290 an instruction saving the same register earlier in the
1291 function code. The current instruction does not tell
1292 us where the original value upon function entry is saved.
1293 All it says is that the function we are scanning reused
1294 that register for some computation of its own, and is now
1295 saving its result. */
1296 if (trad_frame_addr_p(info
->saved_regs
, reg
))
1302 /* Do not compute the address where the register was saved yet,
1303 because we don't know yet if the offset will need to be
1304 relative to $sp or $fp (we can not compute the address
1305 relative to $sp if $sp is updated during the execution of
1306 the current subroutine, for instance when doing some alloca).
1307 So just store the offset for the moment, and compute the
1308 address later when we know whether this frame has a frame
1310 /* Hack: temporarily add one, so that the offset is non-zero
1311 and we can tell which registers have save offsets below. */
1312 info
->saved_regs
[reg
].addr
= (word
& 0xffff) + 1;
1314 /* Starting with OSF/1-3.2C, the system libraries are shipped
1315 without local symbols, but they still contain procedure
1316 descriptors without a symbol reference. GDB is currently
1317 unable to find these procedure descriptors and uses
1318 heuristic_proc_desc instead.
1319 As some low level compiler support routines (__div*, __add*)
1320 use a non-standard return address register, we have to
1321 add some heuristics to determine the return address register,
1322 or stepping over these routines will fail.
1323 Usually the return address register is the first register
1324 saved on the stack, but assembler optimization might
1325 rearrange the register saves.
1326 So we recognize only a few registers (t7, t9, ra) within
1327 the procedure prologue as valid return address registers.
1328 If we encounter a return instruction, we extract the
1329 return address register from it.
1331 FIXME: Rewriting GDB to access the procedure descriptors,
1332 e.g. via the minimal symbol table, might obviate this
1334 if (return_reg
== -1
1335 && cur_pc
< (start_pc
+ 80)
1336 && (reg
== ALPHA_T7_REGNUM
1337 || reg
== ALPHA_T9_REGNUM
1338 || reg
== ALPHA_RA_REGNUM
))
1341 else if ((word
& 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1342 return_reg
= (word
>> 16) & 0x1f;
1343 else if (word
== 0x47de040f) /* bis sp,sp,fp */
1344 frame_reg
= ALPHA_GCC_FP_REGNUM
;
1345 else if (word
== 0x47fe040f) /* bis zero,sp,fp */
1346 frame_reg
= ALPHA_GCC_FP_REGNUM
;
1348 alpha_heuristic_analyze_probing_loop (gdbarch
, &cur_pc
, &frame_size
);
1351 /* If we haven't found a valid return address register yet, keep
1352 searching in the procedure prologue. */
1353 if (return_reg
== -1)
1355 while (cur_pc
< (limit_pc
+ 80) && cur_pc
< (start_pc
+ 80))
1357 unsigned int word
= alpha_read_insn (gdbarch
, cur_pc
);
1359 if ((word
& 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1361 reg
= (word
& 0x03e00000) >> 21;
1362 if (reg
== ALPHA_T7_REGNUM
1363 || reg
== ALPHA_T9_REGNUM
1364 || reg
== ALPHA_RA_REGNUM
)
1370 else if ((word
& 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1372 return_reg
= (word
>> 16) & 0x1f;
1376 cur_pc
+= ALPHA_INSN_SIZE
;
1381 /* Failing that, do default to the customary RA. */
1382 if (return_reg
== -1)
1383 return_reg
= ALPHA_RA_REGNUM
;
1384 info
->return_reg
= return_reg
;
1386 val
= get_frame_register_unsigned (this_frame
, frame_reg
);
1387 info
->vfp
= val
+ frame_size
;
1389 /* Convert offsets to absolute addresses. See above about adding
1390 one to the offsets to make all detected offsets non-zero. */
1391 for (reg
= 0; reg
< ALPHA_NUM_REGS
; ++reg
)
1392 if (trad_frame_addr_p(info
->saved_regs
, reg
))
1393 info
->saved_regs
[reg
].addr
+= val
- 1;
1395 /* The stack pointer of the previous frame is computed by popping
1396 the current stack frame. */
1397 if (!trad_frame_addr_p (info
->saved_regs
, ALPHA_SP_REGNUM
))
1398 trad_frame_set_value (info
->saved_regs
, ALPHA_SP_REGNUM
, info
->vfp
);
1403 /* Given a GDB frame, determine the address of the calling function's
1404 frame. This will be used to create a new GDB frame struct. */
1407 alpha_heuristic_frame_this_id (struct frame_info
*this_frame
,
1408 void **this_prologue_cache
,
1409 struct frame_id
*this_id
)
1411 struct alpha_heuristic_unwind_cache
*info
1412 = alpha_heuristic_frame_unwind_cache (this_frame
, this_prologue_cache
, 0);
1414 *this_id
= frame_id_build (info
->vfp
, info
->start_pc
);
1417 /* Retrieve the value of REGNUM in FRAME. Don't give up! */
1419 static struct value
*
1420 alpha_heuristic_frame_prev_register (struct frame_info
*this_frame
,
1421 void **this_prologue_cache
, int regnum
)
1423 struct alpha_heuristic_unwind_cache
*info
1424 = alpha_heuristic_frame_unwind_cache (this_frame
, this_prologue_cache
, 0);
1426 /* The PC of the previous frame is stored in the link register of
1427 the current frame. Frob regnum so that we pull the value from
1428 the correct place. */
1429 if (regnum
== ALPHA_PC_REGNUM
)
1430 regnum
= info
->return_reg
;
1432 return trad_frame_get_prev_register (this_frame
, info
->saved_regs
, regnum
);
1435 static const struct frame_unwind alpha_heuristic_frame_unwind
= {
1437 default_frame_unwind_stop_reason
,
1438 alpha_heuristic_frame_this_id
,
1439 alpha_heuristic_frame_prev_register
,
1441 default_frame_sniffer
1445 alpha_heuristic_frame_base_address (struct frame_info
*this_frame
,
1446 void **this_prologue_cache
)
1448 struct alpha_heuristic_unwind_cache
*info
1449 = alpha_heuristic_frame_unwind_cache (this_frame
, this_prologue_cache
, 0);
1454 static const struct frame_base alpha_heuristic_frame_base
= {
1455 &alpha_heuristic_frame_unwind
,
1456 alpha_heuristic_frame_base_address
,
1457 alpha_heuristic_frame_base_address
,
1458 alpha_heuristic_frame_base_address
1461 /* Just like reinit_frame_cache, but with the right arguments to be
1462 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
1465 reinit_frame_cache_sfunc (char *args
, int from_tty
, struct cmd_list_element
*c
)
1467 reinit_frame_cache ();
1471 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1472 dummy frame. The frame ID's base needs to match the TOS value
1473 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1476 static struct frame_id
1477 alpha_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1480 base
= get_frame_register_unsigned (this_frame
, ALPHA_SP_REGNUM
);
1481 return frame_id_build (base
, get_frame_pc (this_frame
));
1485 alpha_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1488 pc
= frame_unwind_register_unsigned (next_frame
, ALPHA_PC_REGNUM
);
1493 /* Helper routines for alpha*-nat.c files to move register sets to and
1494 from core files. The UNIQUE pointer is allowed to be NULL, as most
1495 targets don't supply this value in their core files. */
1498 alpha_supply_int_regs (struct regcache
*regcache
, int regno
,
1499 const void *r0_r30
, const void *pc
, const void *unique
)
1501 const gdb_byte
*regs
= (const gdb_byte
*) r0_r30
;
1504 for (i
= 0; i
< 31; ++i
)
1505 if (regno
== i
|| regno
== -1)
1506 regcache_raw_supply (regcache
, i
, regs
+ i
* 8);
1508 if (regno
== ALPHA_ZERO_REGNUM
|| regno
== -1)
1510 const gdb_byte zero
[8] = { 0 };
1512 regcache_raw_supply (regcache
, ALPHA_ZERO_REGNUM
, zero
);
1515 if (regno
== ALPHA_PC_REGNUM
|| regno
== -1)
1516 regcache_raw_supply (regcache
, ALPHA_PC_REGNUM
, pc
);
1518 if (regno
== ALPHA_UNIQUE_REGNUM
|| regno
== -1)
1519 regcache_raw_supply (regcache
, ALPHA_UNIQUE_REGNUM
, unique
);
1523 alpha_fill_int_regs (const struct regcache
*regcache
,
1524 int regno
, void *r0_r30
, void *pc
, void *unique
)
1526 gdb_byte
*regs
= (gdb_byte
*) r0_r30
;
1529 for (i
= 0; i
< 31; ++i
)
1530 if (regno
== i
|| regno
== -1)
1531 regcache_raw_collect (regcache
, i
, regs
+ i
* 8);
1533 if (regno
== ALPHA_PC_REGNUM
|| regno
== -1)
1534 regcache_raw_collect (regcache
, ALPHA_PC_REGNUM
, pc
);
1536 if (unique
&& (regno
== ALPHA_UNIQUE_REGNUM
|| regno
== -1))
1537 regcache_raw_collect (regcache
, ALPHA_UNIQUE_REGNUM
, unique
);
1541 alpha_supply_fp_regs (struct regcache
*regcache
, int regno
,
1542 const void *f0_f30
, const void *fpcr
)
1544 const gdb_byte
*regs
= (const gdb_byte
*) f0_f30
;
1547 for (i
= ALPHA_FP0_REGNUM
; i
< ALPHA_FP0_REGNUM
+ 31; ++i
)
1548 if (regno
== i
|| regno
== -1)
1549 regcache_raw_supply (regcache
, i
,
1550 regs
+ (i
- ALPHA_FP0_REGNUM
) * 8);
1552 if (regno
== ALPHA_FPCR_REGNUM
|| regno
== -1)
1553 regcache_raw_supply (regcache
, ALPHA_FPCR_REGNUM
, fpcr
);
1557 alpha_fill_fp_regs (const struct regcache
*regcache
,
1558 int regno
, void *f0_f30
, void *fpcr
)
1560 gdb_byte
*regs
= (gdb_byte
*) f0_f30
;
1563 for (i
= ALPHA_FP0_REGNUM
; i
< ALPHA_FP0_REGNUM
+ 31; ++i
)
1564 if (regno
== i
|| regno
== -1)
1565 regcache_raw_collect (regcache
, i
,
1566 regs
+ (i
- ALPHA_FP0_REGNUM
) * 8);
1568 if (regno
== ALPHA_FPCR_REGNUM
|| regno
== -1)
1569 regcache_raw_collect (regcache
, ALPHA_FPCR_REGNUM
, fpcr
);
1574 /* Return nonzero if the G_floating register value in REG is equal to
1575 zero for FP control instructions. */
1578 fp_register_zero_p (LONGEST reg
)
1580 /* Check that all bits except the sign bit are zero. */
1581 const LONGEST zero_mask
= ((LONGEST
) 1 << 63) ^ -1;
1583 return ((reg
& zero_mask
) == 0);
1586 /* Return the value of the sign bit for the G_floating register
1587 value held in REG. */
1590 fp_register_sign_bit (LONGEST reg
)
1592 const LONGEST sign_mask
= (LONGEST
) 1 << 63;
1594 return ((reg
& sign_mask
) != 0);
1597 /* alpha_software_single_step() is called just before we want to resume
1598 the inferior, if we want to single-step it but there is no hardware
1599 or kernel single-step support (NetBSD on Alpha, for example). We find
1600 the target of the coming instruction and breakpoint it. */
1603 alpha_next_pc (struct regcache
*regcache
, CORE_ADDR pc
)
1605 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
1612 insn
= alpha_read_insn (gdbarch
, pc
);
1614 /* Opcode is top 6 bits. */
1615 op
= (insn
>> 26) & 0x3f;
1619 /* Jump format: target PC is:
1621 return (regcache_raw_get_unsigned (regcache
, (insn
>> 16) & 0x1f) & ~3);
1624 if ((op
& 0x30) == 0x30)
1626 /* Branch format: target PC is:
1627 (new PC) + (4 * sext(displacement)) */
1628 if (op
== 0x30 /* BR */
1629 || op
== 0x34) /* BSR */
1632 offset
= (insn
& 0x001fffff);
1633 if (offset
& 0x00100000)
1634 offset
|= 0xffe00000;
1635 offset
*= ALPHA_INSN_SIZE
;
1636 return (pc
+ ALPHA_INSN_SIZE
+ offset
);
1639 /* Need to determine if branch is taken; read RA. */
1640 regno
= (insn
>> 21) & 0x1f;
1643 case 0x31: /* FBEQ */
1644 case 0x36: /* FBGE */
1645 case 0x37: /* FBGT */
1646 case 0x33: /* FBLE */
1647 case 0x32: /* FBLT */
1648 case 0x35: /* FBNE */
1649 regno
+= gdbarch_fp0_regnum (gdbarch
);
1652 rav
= regcache_raw_get_signed (regcache
, regno
);
1656 case 0x38: /* BLBC */
1660 case 0x3c: /* BLBS */
1664 case 0x39: /* BEQ */
1668 case 0x3d: /* BNE */
1672 case 0x3a: /* BLT */
1676 case 0x3b: /* BLE */
1680 case 0x3f: /* BGT */
1684 case 0x3e: /* BGE */
1689 /* Floating point branches. */
1691 case 0x31: /* FBEQ */
1692 if (fp_register_zero_p (rav
))
1695 case 0x36: /* FBGE */
1696 if (fp_register_sign_bit (rav
) == 0 || fp_register_zero_p (rav
))
1699 case 0x37: /* FBGT */
1700 if (fp_register_sign_bit (rav
) == 0 && ! fp_register_zero_p (rav
))
1703 case 0x33: /* FBLE */
1704 if (fp_register_sign_bit (rav
) == 1 || fp_register_zero_p (rav
))
1707 case 0x32: /* FBLT */
1708 if (fp_register_sign_bit (rav
) == 1 && ! fp_register_zero_p (rav
))
1711 case 0x35: /* FBNE */
1712 if (! fp_register_zero_p (rav
))
1718 /* Not a branch or branch not taken; target PC is:
1720 return (pc
+ ALPHA_INSN_SIZE
);
1723 std::vector
<CORE_ADDR
>
1724 alpha_software_single_step (struct regcache
*regcache
)
1726 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
1729 pc
= alpha_next_pc (regcache
, regcache_read_pc (regcache
));
1735 /* Initialize the current architecture based on INFO. If possible, re-use an
1736 architecture from ARCHES, which is a list of architectures already created
1737 during this debugging session.
1739 Called e.g. at program startup, when reading a core file, and when reading
1742 static struct gdbarch
*
1743 alpha_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1745 struct gdbarch_tdep
*tdep
;
1746 struct gdbarch
*gdbarch
;
1748 /* Find a candidate among extant architectures. */
1749 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1751 return arches
->gdbarch
;
1753 tdep
= XCNEW (struct gdbarch_tdep
);
1754 gdbarch
= gdbarch_alloc (&info
, tdep
);
1756 /* Lowest text address. This is used by heuristic_proc_start()
1757 to decide when to stop looking. */
1758 tdep
->vm_min_address
= (CORE_ADDR
) 0x120000000LL
;
1760 tdep
->dynamic_sigtramp_offset
= NULL
;
1761 tdep
->sigcontext_addr
= NULL
;
1762 tdep
->sc_pc_offset
= 2 * 8;
1763 tdep
->sc_regs_offset
= 4 * 8;
1764 tdep
->sc_fpregs_offset
= tdep
->sc_regs_offset
+ 32 * 8 + 8;
1766 tdep
->jb_pc
= -1; /* longjmp support not enabled by default. */
1768 tdep
->return_in_memory
= alpha_return_in_memory_always
;
1771 set_gdbarch_short_bit (gdbarch
, 16);
1772 set_gdbarch_int_bit (gdbarch
, 32);
1773 set_gdbarch_long_bit (gdbarch
, 64);
1774 set_gdbarch_long_long_bit (gdbarch
, 64);
1775 set_gdbarch_wchar_bit (gdbarch
, 64);
1776 set_gdbarch_wchar_signed (gdbarch
, 0);
1777 set_gdbarch_float_bit (gdbarch
, 32);
1778 set_gdbarch_double_bit (gdbarch
, 64);
1779 set_gdbarch_long_double_bit (gdbarch
, 64);
1780 set_gdbarch_ptr_bit (gdbarch
, 64);
1783 set_gdbarch_num_regs (gdbarch
, ALPHA_NUM_REGS
);
1784 set_gdbarch_sp_regnum (gdbarch
, ALPHA_SP_REGNUM
);
1785 set_gdbarch_pc_regnum (gdbarch
, ALPHA_PC_REGNUM
);
1786 set_gdbarch_fp0_regnum (gdbarch
, ALPHA_FP0_REGNUM
);
1788 set_gdbarch_register_name (gdbarch
, alpha_register_name
);
1789 set_gdbarch_register_type (gdbarch
, alpha_register_type
);
1791 set_gdbarch_cannot_fetch_register (gdbarch
, alpha_cannot_fetch_register
);
1792 set_gdbarch_cannot_store_register (gdbarch
, alpha_cannot_store_register
);
1794 set_gdbarch_convert_register_p (gdbarch
, alpha_convert_register_p
);
1795 set_gdbarch_register_to_value (gdbarch
, alpha_register_to_value
);
1796 set_gdbarch_value_to_register (gdbarch
, alpha_value_to_register
);
1798 set_gdbarch_register_reggroup_p (gdbarch
, alpha_register_reggroup_p
);
1800 /* Prologue heuristics. */
1801 set_gdbarch_skip_prologue (gdbarch
, alpha_skip_prologue
);
1805 set_gdbarch_return_value (gdbarch
, alpha_return_value
);
1807 /* Settings for calling functions in the inferior. */
1808 set_gdbarch_push_dummy_call (gdbarch
, alpha_push_dummy_call
);
1810 /* Methods for saving / extracting a dummy frame's ID. */
1811 set_gdbarch_dummy_id (gdbarch
, alpha_dummy_id
);
1813 /* Return the unwound PC value. */
1814 set_gdbarch_unwind_pc (gdbarch
, alpha_unwind_pc
);
1816 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1817 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1819 set_gdbarch_breakpoint_kind_from_pc (gdbarch
,
1820 alpha_breakpoint::kind_from_pc
);
1821 set_gdbarch_sw_breakpoint_from_kind (gdbarch
,
1822 alpha_breakpoint::bp_from_kind
);
1823 set_gdbarch_decr_pc_after_break (gdbarch
, ALPHA_INSN_SIZE
);
1824 set_gdbarch_cannot_step_breakpoint (gdbarch
, 1);
1826 /* Handles single stepping of atomic sequences. */
1827 set_gdbarch_software_single_step (gdbarch
, alpha_deal_with_atomic_sequence
);
1829 /* Hook in ABI-specific overrides, if they have been registered. */
1830 gdbarch_init_osabi (info
, gdbarch
);
1832 /* Now that we have tuned the configuration, set a few final things
1833 based on what the OS ABI has told us. */
1835 if (tdep
->jb_pc
>= 0)
1836 set_gdbarch_get_longjmp_target (gdbarch
, alpha_get_longjmp_target
);
1838 frame_unwind_append_unwinder (gdbarch
, &alpha_sigtramp_frame_unwind
);
1839 frame_unwind_append_unwinder (gdbarch
, &alpha_heuristic_frame_unwind
);
1841 frame_base_set_default (gdbarch
, &alpha_heuristic_frame_base
);
1847 alpha_dwarf2_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1849 dwarf2_append_unwinders (gdbarch
);
1850 frame_base_append_sniffer (gdbarch
, dwarf2_frame_base_sniffer
);
1853 extern initialize_file_ftype _initialize_alpha_tdep
; /* -Wmissing-prototypes */
1856 _initialize_alpha_tdep (void)
1859 gdbarch_register (bfd_arch_alpha
, alpha_gdbarch_init
, NULL
);
1861 /* Let the user set the fence post for heuristic_proc_start. */
1863 /* We really would like to have both "0" and "unlimited" work, but
1864 command.c doesn't deal with that. So make it a var_zinteger
1865 because the user can always use "999999" or some such for unlimited. */
1866 /* We need to throw away the frame cache when we set this, since it
1867 might change our ability to get backtraces. */
1868 add_setshow_zinteger_cmd ("heuristic-fence-post", class_support
,
1869 &heuristic_fence_post
, _("\
1870 Set the distance searched for the start of a function."), _("\
1871 Show the distance searched for the start of a function."), _("\
1872 If you are debugging a stripped executable, GDB needs to search through the\n\
1873 program for the start of a function. This command sets the distance of the\n\
1874 search. The only need to set it is when debugging a stripped executable."),
1875 reinit_frame_cache_sfunc
,
1876 NULL
, /* FIXME: i18n: The distance searched for
1877 the start of a function is \"%d\". */
1878 &setlist
, &showlist
);